xc3sprog 0+svn795+dfsg-4 source package in Ubuntu

Changelog

xc3sprog (0+svn795+dfsg-4) unstable; urgency=medium

  * Fix build with gcc-11 (Closes: #984412)

 -- Ricardo Ribalda Delgado <email address hidden>  Thu, 04 Mar 2021 19:48:47 +0100

Upload details

Uploaded by:
Ricardo Ribalda Delgado
Uploaded to:
Sid
Original maintainer:
Ricardo Ribalda Delgado
Architectures:
any
Section:
misc
Urgency:
Medium Urgency

See full publishing history Publishing

Series Pocket Published Component Section
Oracular release universe misc
Noble release universe misc
Mantic release universe misc
Lunar release universe misc
Jammy release universe misc

Downloads

File Size SHA-256 Checksum
xc3sprog_0+svn795+dfsg-4.dsc 1.9 KiB 0d228ec8852b4af76ca2671ade6c67ee76fcd072ca77fece94ae33a008947571
xc3sprog_0+svn795+dfsg.orig.tar.gz 247.1 KiB aacc9aa9601a199ea17a7d51df36da1e07462d39eee5c4e566b0c8ae58a8c027
xc3sprog_0+svn795+dfsg-4.debian.tar.xz 4.9 KiB 3a533c669f26a5796acbed6e6f7e1e4c28f0d76cb4f362c17f56ab6860ced36c

No changes file available.

Binary packages built by this source

xc3sprog: JTAG flashing tool for FPGAs, CPLDs and EEPROMs

 xc3sprog is a suite of utilities for programming Xilinx FPGAs, CPLDs, and
 EEPROMs with the Xilinx Parallel Cable and other JTAG adapters under Linux.
 xc3sprog runs as a command-line application.
 .
 The main features include:
  - Reading a .BIT file from Xilinx design tools and programming it into an
    FPGA.
  - Reading a JEDEC file and programming it into a CPLD.
  - Programming a .BIT file into an on-board configuration PROM.
  - Programming a binary image into on-board SPI flash memory.
  - Reading the contents of a PROM chip back to a file.
  - Programming AVR microcontrollers.
 .
 The functionality of xc3sprog is similar to that of Xilinx IMPACT. There are
 also similarities with other free JTAG tools, such as UrJTAG. However,
 xc3sprog has a number of advantages:
 .
  - xc3sprog is free software.
  - It is a command-line tool.
  - It works on Linux without the need to install binary "cable-drivers".
    (Although some types of JTAG cables need to load firmware.)
  - It uses an optional configuration file to recognize new JTAG devices.
  - It contains programming algorithms for the supported devices, enabling
    the direct use of binary files (.BIT / JEDEC) from design tools (as opposed
    to intermediate SVF/STAPLE files).

xc3sprog-dbgsym: debug symbols for xc3sprog