linux-riscv 6.5.0-7.7.2 source package in Ubuntu

Changelog

linux-riscv (6.5.0-7.7.2) mantic; urgency=medium

  * mantic/linux-riscv: 6.5.0-7.7.2 -proposed tracker (LP: #2037659)

  * Packaging resync (LP: #1786013)
    - debian/dkms-versions -- update from kernel-versions (main/d2023.09.27)

  * Enable StarFive VisionFive 2 board (LP: #2013232)
    - dt-bindings: clock: Add StarFive JH7110 PLL clock generator
    - dt-bindings: soc: starfive: Add StarFive syscon module
    - dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs
    - dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset
      generator
    - dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset
      generator
    - dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset
      generator
    - clk: starfive: Add StarFive JH7110 PLL clock driver
    - clk: starfive: jh7110-sys: Add PLL clocks source from DTS
    - clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
    - clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
    - clk: starfive: Add StarFive JH7110 Video-Output clock driver
    - reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support
    - media: dt-bindings: cadence-csi2rx: Convert to DT schema
    - media: dt-bindings: cadence-csi2rx: Add resets property
    - media: cadence: Add operation on reset
    - media: cadence: Add support for external dphy
    - media: cadence: Add support for JH7110 SoC
    - dt-bindings: net: motorcomm: Add pad driver strength cfg
    - net: phy: motorcomm: Add pad drive strength cfg support
    - crypto: starfive - Add AES skcipher and aead support
    - dt-bindings: spi: add reference file to YAML
    - usb: cdns3: Add PHY mode switch to usb2 PHY
    - dt-bindings: phy: Add StarFive JH7110 USB PHY
    - dt-bindings: phy: Add StarFive JH7110 PCIe PHY
    - phy: starfive: Add JH7110 USB 2.0 PHY driver
    - phy: starfive: Add JH7110 PCIE 2.0 PHY driver
    - phy: starfive: fix error code in probe
    - dt-bindings: phy: Add starfive,jh7110-dphy-rx
    - phy: starfive: Add mipi dphy rx support
    - phy: starfive: make phys depend on HAS_IOMEM
    - phy: starfive: StarFive PHYs should depend on ARCH_STARFIVE
    - dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC
    - spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI
    - riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks
    - riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes
    - riscv: dts: starfive: jh7110: Add syscon nodes
    - riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node
    - riscv: dts: starfive: jh7110: Add ethernet device nodes
    - riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
    - riscv: dts: starfive: jh7100: Add temperature sensor node and thermal-zones
    - riscv: dts: starfive: jh7110: Add temperature sensor node and thermal-zones
    - riscv: dts: starfive: Add USB and PCIe PHY nodes for JH7110
    - riscv: dts: starfive: Add USB dts node for JH7110
    - riscv: dts: starfive: Add spi node and pins configuration
    - riscv: dts: starfive: jh7110: add dma controller node
    - riscv: dts: starfive: jh7110: add the node and pins configuration for tdm
    - riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC
    - riscv: dts: starfive: enable DCDC1&ALDO4 node in axp15060
    - riscv: dts: starfive: Add mmc nodes on VisionFive 2 board
    - riscv: dts: starfive - Add crypto and DMA node for JH7110
    - riscv: dts: starfive - Add hwrng node for JH7110 SoC
    - riscv: dts: starfive: jh7110: Fix GMAC configuration
    - riscv: dts: starfive: fix jh7110 qspi sort order
    - riscv: dts: starfive: fix NOR flash reserved-data partition size
    - riscv: dts: starfive: visionfive 2: Enable usb0
    - riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order
    - SAUCE: pinctrl: starfive: jh7110: Fix failure to set irq after CONFIG_PM is
      enabled
    - SAUCE: pinctrl: starfive: jh7110: Add system pm ops to save and restore
      context
    - SAUCE: riscv: Kconfig: Add select ARM_AMBA to SOC_STARFIVE
    - SAUCE: PCI: microchip: Enable building driver as a module
    - SAUCE: PCI: microchip: Align register, offset, and mask names with hw docs
    - SAUCE: PCI: microchip: Enable event handlers to access bridge and ctrl ptrs
    - SAUCE: PCI: microchip: Clean up initialisation of interrupts
    - SAUCE: PCI: microchip: Gather MSI information from hardware config registers
    - SAUCE: PCI: microchip: Re-partition code between probe() and init()
    - SAUCE: dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties
    - SAUCE: PCI: microchip: Move pcie-microchip-host.c to plda directory
    - SAUCE: PCI: microchip: Move PLDA IP register macros to pcie-plda.h
    - SAUCE: PCI: microchip: Rename data structure
    - SAUCE: PCI: microchip: Rename two setup functions
    - SAUCE: PCI: microchip: Change the argument of plda_pcie_setup_iomems()
    - SAUCE: PCI: plda: Move the setup functions to pcie-plda-host.c
    - SAUCE: PCI: plda: Add event interrupt codes and IRQ domain ops
    - SAUCE: PCI: microchip: Rename interrupt related functions
    - SAUCE: PCI: microchip: Add num_events field to struct plda_pcie_rp
    - SAUCE: PCI: microchip: Add request_event_irq() callback function
    - SAUCE: PCI: microchip: Add INTx and MSI event num to struct plda_event
    - SAUCE: PCI: microchip: Add get_events() callback function
    - SAUCE: PCI: microchip: Add event IRQ domain ops to struct plda_event
    - SAUCE: PCI: microchip: Move IRQ functions to pcie-plda-host.c
    - SAUCE: PCI: plda: Set plda_event_handler() and event ops to static
    - SAUCE: dt-bindings: PCI: Add StarFive JH7110 PCIe controller
    - SAUCE: PCI: starfive: Add JH7110 PCIe controller
    - SAUCE: riscv: dts: starfive: add PCIe dts configuration for JH7110
    - SAUCE: clk: starfive: jh7110-sys: Fix lower rate of CPUfreq by setting PLL0
      rate to 1.5GHz
    - SAUCE: dt-bindings: mmc: Remove properties from required
    - SAUCE: mmc: starfive: Change tuning implementation
    - SAUCE: riscv: dts: starfive: add assigned-clock* to limit frquency
    - SAUCE: dt-bindings: pwm: Add StarFive PWM module
    - SAUCE: pwm: starfive: Add PWM driver support
    - SAUCE: riscv: dts: starfive: jh7110: Add PWM node and pins configuration
    - SAUCE: riscv: dts: starfive: jh7100: Add PWM node and pins configuration
    - SAUCE: riscv: dts: starfive: Disable JH7110 crypto peripheral
    - SAUCE: riscv: dts: starfive: Add VisionFive 2 reserved memory node
    - [Config] riscv: updateconfigs for JH7110

  * Enable Nezha board (LP: #1975592)
    - riscv: errata: fix T-Head dcache.cva encoding
    - dt-bindings: net: can: Add support for Allwinner D1 CAN controller
    - riscv: dts: allwinner: d1: Add CAN controller nodes
    - iio: adc: Kconfig change description for Allwinner GPADC
    - iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
    - dt-bindings: iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
    - riscv: dts: allwinner: d1: Add GPADC node
    - SAUCE: mmc: sunxi-mmc: Correct the maximum segment size
    - SAUCE: riscv: dts: allwinner: d1: Add misc nodes
    - SAUCE: riscv: dts: allwinner: Keep aldo regulator on
    - SAUCE: riscv: dts: allwinner: Add button on the Nezha board
    - SAUCE: riscv: dts: allwinner: Add button on the Lichee RV Dock
    - SAUCE: dt-bindings: nvmem: Allow bit offsets greater than a byte
    - SAUCE: nvmem: core: Support reading cells with >= 8 bit offsets
    - SAUCE: regulator: dt-bindings: Add Allwinner D1 LDOs
    - SAUCE: regulator: sun20i: Add support for Allwinner D1 LDOs
    - SAUCE: dt-bindings: sram: sunxi-sram: Add optional regulators child
    - SAUCE: dt-bindings: thermal: sun8i: Add compatible for D1
    - SAUCE: thermal: sun8i: Document the unknown field
    - SAUCE: thermal: sun8i: Set the event type for new samples
    - SAUCE: thermal: sun8i: Ensure vref is powered
    - SAUCE: thermal: sun8i: Add support for the D1 variant
    - SAUCE: riscv: dts: allwinner: d1: Add thermal sensor and zone
    - SAUCE: pwm: sun8i-v536: document device tree bindings
    - SAUCE: pwm: sunxi: Add Allwinner SoC PWM controller driver
    - SAUCE: pwm: sun8i-v536: Add support for the Allwinner D1
    - SAUCE: riscv: dts: allwinner: d1: Add PWM support
    - SAUCE: riscv: dts: allwinner: d1: Hook up PWM-controlled CPU voltage
      regulators
    - SAUCE: drm/sun4i: dsi: Allow panel attach before card registration
    - SAUCE: drm/sun4i: mixer: Remove unused CMA headers
    - SAUCE: drm/sun4i: tcon: Always protect the LCD dotclock rate
    - SAUCE: drm/sun4i: tcon_top: Register reset, clock gates in probe
    - SAUCE: riscv: dts: allwinner: lichee-rv-86-panel-480p: Add panel
    - SAUCE: riscv: dts: allwinner: d1: Add HDMI pipeline
    - SAUCE: riscv: dts: allwinner: d1: Enable HDMI on supported boards
    - SAUCE: dt-bindings: display: sun4i-tcon: Add external LVDS PHY
    - SAUCE: riscv: dts: allwinner: d1: Add LVDS0 PHY
    - SAUCE: dt-bindings: leds: Add Allwinner A100 LED controller
    - SAUCE: leds: sun50i-a100: New driver for the A100 LED controller
    - SAUCE: riscv: dts: allwinner: d1: Add LED controller node
    - SAUCE: riscv: dts: allwinner: d1: Add RGB LEDs to boards
    - SAUCE: ASoC: sun20i-codec: New driver for D1 internal codec
    - SAUCE: [WIP] ASoC: sun20i-codec: What is this ramp thing?
    - SAUCE: riscv: dts: allwinner: d1: Add sound cards to boards
    - SAUCE: dt-bindings: display: sun8i-a83t-dw-hdmi: Remove #phy-cells
    - SAUCE: dt-bindings: display: Add D1 HDMI compatibles
    - SAUCE: drm/sun4i: Add support for D1 HDMI
    - SAUCE: drm/sun4i: sun8i-hdmi-phy: Add support for D1 PHY
    - SAUCE: [HACK] drm/sun4i: Copy in BSP code for D1 HDMI PHY
    - SAUCE: dt-bindings: iommu: sun50i: Add compatible for Allwinner D1
    - SAUCE: iommu/sun50i: Support variants without an external reset
    - SAUCE: iommu/sun50i: Ensure bypass is disabled
    - SAUCE: iommu/sun50i: Add support for the D1 variant
    - SAUCE: iommu/sun50i: Ensure the IOMMU can be used for DMA
    - SAUCE: riscv: dts: allwinner: d1: Add IOMMU node
    - SAUCE: riscv: mm: Use IOMMU for DMA when available
    - SAUCE: riscv: dts: allwinner: Add Nezha and Lichee RV SPI nodes
    - SAUCE: dt-bindings: display: Add Sitronix ST7701s panel binding
    - SAUCE: drm/panel: Add driver for ST7701s DPI LCD panel
    - SAUCE: regulator: sun20i: Use device_node_to_regmap()
    - [Config] riscv: updateconfigs for Allwinner D1 support

  * efivar fails to read variables (LP: #2034705)
    - efivarfs: fix statfs() on efivarfs

  * Excessive size of kernel modules on RISC-V - modules unstripped
    (LP: #1964335)
    - SAUCE: scripts/Makefile.modinst discard-locals from modules

  * Miscellaneous Ubuntu changes
    - [Packaging] Create linux-riscv sameport

 -- Emil Renner Berthing <email address hidden>  Thu, 05 Oct 2023 14:15:25 +0200