Ubuntu

Number of NUMA nodes in kernel 4.4.0.79

Asked by Huseyin Cotuk

Hello,

I have dual socket E5 CPU based servers, and in order to reduce the L1/L2/L3 cache and memory miss, i am pinning CPUs to the specific applications. I also pin specific devices like ethernet cards and nvme ssds to CPUs as well.

While I was using kernel 4.4.0.72, when I use "lstopo" command of hwloc package, it was showing 2 NUMA nodes as expected. But after upgrading to kernel 4.4.0.79, same command reports only one NUMA node, and i can not pin cpus to applications any more. It reports two sockets but it shows only one NUMA node. How can it be possible? Doesn't have every CPU its own L1/L2/L3 cahe and bounded memory? How does a single NUMA node manage two sockets?

Is this an expected behavior on 4.4.0.79 or is it a bug? How does the kernel manage this process? How does it know which device is bounded to which CPU?

Best,
Huseyin

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Huseyin Cotuk (hcotuk) said : 		#1

This is the output of lscpu command:

root@ceph01:~# lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 32
On-line CPU(s) list: 0-31
Thread(s) per core: 2
Core(s) per socket: 8
Socket(s): 2
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 79
Model name: Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
Stepping: 1
CPU MHz: 2300.648
CPU max MHz: 3000.0000
CPU min MHz: 1200.0000
BogoMIPS: 4201.53
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 20480K
NUMA node0 CPU(s): 0-31
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdseed adx smap xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts

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Huseyin Cotuk (hcotuk) said : 		#2

and this the output of lstopo command:

Machine (63GB)
  Package L#0 + L3 L#0 (20MB)
    L2 L#0 (256KB) + L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0
      PU L#0 (P#0)
      PU L#1 (P#16)
    L2 L#1 (256KB) + L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1
      PU L#2 (P#2)
      PU L#3 (P#18)
    L2 L#2 (256KB) + L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2
      PU L#4 (P#4)
      PU L#5 (P#20)
    L2 L#3 (256KB) + L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3
      PU L#6 (P#6)
      PU L#7 (P#22)
    L2 L#4 (256KB) + L1d L#4 (32KB) + L1i L#4 (32KB) + Core L#4
      PU L#8 (P#8)
      PU L#9 (P#24)
    L2 L#5 (256KB) + L1d L#5 (32KB) + L1i L#5 (32KB) + Core L#5
      PU L#10 (P#10)
      PU L#11 (P#26)
    L2 L#6 (256KB) + L1d L#6 (32KB) + L1i L#6 (32KB) + Core L#6
      PU L#12 (P#12)
      PU L#13 (P#28)
    L2 L#7 (256KB) + L1d L#7 (32KB) + L1i L#7 (32KB) + Core L#7
      PU L#14 (P#14)
      PU L#15 (P#30)
  Package L#1 + L3 L#1 (20MB)
    L2 L#8 (256KB) + L1d L#8 (32KB) + L1i L#8 (32KB) + Core L#8
      PU L#16 (P#1)
      PU L#17 (P#17)
    L2 L#9 (256KB) + L1d L#9 (32KB) + L1i L#9 (32KB) + Core L#9
      PU L#18 (P#3)
      PU L#19 (P#19)
    L2 L#10 (256KB) + L1d L#10 (32KB) + L1i L#10 (32KB) + Core L#10
      PU L#20 (P#5)
      PU L#21 (P#21)
    L2 L#11 (256KB) + L1d L#11 (32KB) + L1i L#11 (32KB) + Core L#11
      PU L#22 (P#7)
      PU L#23 (P#23)
    L2 L#12 (256KB) + L1d L#12 (32KB) + L1i L#12 (32KB) + Core L#12
      PU L#24 (P#9)
      PU L#25 (P#25)
    L2 L#13 (256KB) + L1d L#13 (32KB) + L1i L#13 (32KB) + Core L#13
      PU L#26 (P#11)
      PU L#27 (P#27)
    L2 L#14 (256KB) + L1d L#14 (32KB) + L1i L#14 (32KB) + Core L#14
      PU L#28 (P#13)
      PU L#29 (P#29)
    L2 L#15 (256KB) + L1d L#15 (32KB) + L1i L#15 (32KB) + Core L#15
      PU L#30 (P#15)
      PU L#31 (P#31)
  HostBridge L#0
    PCIBridge
      PCI 1000:005d
        Block(Disk) L#0 "sda"
        Block(Disk) L#1 "sdb"
        Block(Disk) L#2 "sdc"
        Block(Disk) L#3 "sdd"
        Block(Disk) L#4 "sde"
        Block(Disk) L#5 "sdf"
        Block(Disk) L#6 "sdg"
        Block(Disk) L#7 "sdh"
        Block(Disk) L#8 "sdi"
        Block(Disk) L#9 "sdj"
        Block(Disk) L#10 "sdl"
        Block(Disk) L#11 "sdk"
    PCIBridge
      PCI 8086:1521
        Net L#12 "eno1"
      PCI 8086:1521
        Net L#13 "eno2"
      PCI 8086:1521
        Net L#14 "eno3"
      PCI 8086:1521
        Net L#15 "eno4"
    PCIBridge
      PCI 8086:0953
    PCI 8086:8d62
    PCIBridge
      PCIBridge
        PCIBridge
          PCIBridge
            PCI 102b:0534
    PCI 8086:8d02
  HostBridge L#8
    PCIBridge
      PCI 8086:1572
        Net L#16 "enp129s0f0"
      PCI 8086:1572
        Net L#17 "enp129s0f1"
    PCIBridge
      PCI 8086:1572
        Net L#18 "enp130s0f0"
      PCI 8086:1572
        Net L#19 "enp130s0f1"
    PCIBridge
      PCI 8086:0953

Revision history for this message
actionparsnip (andrew-woodhead666) said : 		#3

The L1, L2 and L3 caches are part of the CPU

Revision history for this message
Huseyin Cotuk (hcotuk) said : 		#4

I know they are parts of the CPU. So, if an application uses the other CPU every time, it can not use the data L1, L2, and L3 cache. So cache misses reduces the performance.

This is similar for the pci devices. If you can pin the same CPU for the application and its related device like ethernet cards or disks, you can reduce cache and memory misses. So you can improve performance.

Revision history for this message
actionparsnip (andrew-woodhead666) said : 		#5

The kernel manages CPU access to maximize the use of resources to provide maximum efficiency.

If you are not seeing this then I suggest you report a bug.

Personally, I'd wager this is already happening.

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