--- linux-raspi-6.8.0.orig/Documentation/ABI/testing/debugfs-driver-qat +++ linux-raspi-6.8.0/Documentation/ABI/testing/debugfs-driver-qat @@ -81,3 +81,29 @@ : Number of Compress and Verify (CnV) errors and type of the last CnV error detected by Acceleration Engine N. + +What: /sys/kernel/debug/qat__/heartbeat/inject_error +Date: March 2024 +KernelVersion: 6.8 +Contact: qat-linux@intel.com +Description: (WO) Write to inject an error that simulates an heartbeat + failure. This is to be used for testing purposes. + + After writing this file, the driver stops arbitration on a + random engine and disables the fetching of heartbeat counters. + If a workload is running on the device, a job submitted to the + accelerator might not get a response and a read of the + `heartbeat/status` attribute might report -1, i.e. device + unresponsive. + The error is unrecoverable thus the device must be restarted to + restore its functionality. + + This attribute is available only when the kernel is built with + CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION=y. + + A write of 1 enables error injection. + + The following example shows how to enable error injection:: + + # cd /sys/kernel/debug/qat__ + # echo 1 > heartbeat/inject_error --- linux-raspi-6.8.0.orig/Documentation/ABI/testing/ima_policy +++ linux-raspi-6.8.0/Documentation/ABI/testing/ima_policy @@ -26,7 +26,7 @@ [uid=] [euid=] [gid=] [egid=] [fowner=] [fgroup=]] lsm: [[subj_user=] [subj_role=] [subj_type=] - [obj_user=] [obj_role=] [obj_type=]] + [obj_user=] [obj_role=] [obj_type=] [lsm=]] option: [digest_type=] [template=] [permit_directio] [appraise_type=] [appraise_flag=] [appraise_algos=] [keyrings=] @@ -138,6 +138,12 @@ measure subj_user=_ func=FILE_CHECK mask=MAY_READ + It is possible to explicitly specify which security + module a rule applies to using lsm=. If the security + module specified is not active on the system the rule + will be rejected. If lsm= is not specified the first + security module registered on the system will be assumed. + Example of measure rules using alternate PCRs:: measure func=KEXEC_KERNEL_CHECK pcr=4 --- linux-raspi-6.8.0.orig/Documentation/ABI/testing/sysfs-devices-system-cpu +++ linux-raspi-6.8.0/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -516,6 +516,7 @@ /sys/devices/system/cpu/vulnerabilities/mds /sys/devices/system/cpu/vulnerabilities/meltdown /sys/devices/system/cpu/vulnerabilities/mmio_stale_data + /sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling /sys/devices/system/cpu/vulnerabilities/retbleed /sys/devices/system/cpu/vulnerabilities/spec_store_bypass /sys/devices/system/cpu/vulnerabilities/spectre_v1 --- linux-raspi-6.8.0.orig/Documentation/ABI/testing/sysfs-driver-qat +++ linux-raspi-6.8.0/Documentation/ABI/testing/sysfs-driver-qat @@ -141,3 +141,23 @@ 64 This attribute is only available for qat_4xxx devices. + +What: /sys/bus/pci/devices//qat/auto_reset +Date: March 2024 +KernelVersion: 6.8 +Contact: qat-linux@intel.com +Description: (RW) Reports the current state of the autoreset feature + for a QAT device + + Write to the attribute to enable or disable device auto reset. + + Device auto reset is disabled by default. + + The values are: + + * 1/Yy/on: auto reset enabled. If the device encounters an + unrecoverable error, it will be reset automatically. + * 0/Nn/off: auto reset disabled. If the device encounters an + unrecoverable error, it will not be reset. + + This attribute is only available for qat_4xxx devices. --- linux-raspi-6.8.0.orig/Documentation/Makefile +++ linux-raspi-6.8.0/Documentation/Makefile @@ -112,7 +112,7 @@ $(Q)$(YNL_TOOL) -i $< -o $@ htmldocs: $(YNL_INDEX) - @$(srctree)/scripts/sphinx-pre-install --version-check + @$(srctree)/scripts/sphinx-pre-install --version-check --no-virtualenv @+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var))) # If Rust support is available and .config exists, add rustdoc generated contents. --- linux-raspi-6.8.0.orig/Documentation/admin-guide/hw-vuln/index.rst +++ linux-raspi-6.8.0/Documentation/admin-guide/hw-vuln/index.rst @@ -21,3 +21,4 @@ cross-thread-rsb srso gather_data_sampling + reg-file-data-sampling --- linux-raspi-6.8.0.orig/Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst +++ linux-raspi-6.8.0/Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst @@ -0,0 +1,104 @@ +================================== +Register File Data Sampling (RFDS) +================================== + +Register File Data Sampling (RFDS) is a microarchitectural vulnerability that +only affects Intel Atom parts(also branded as E-cores). RFDS may allow +a malicious actor to infer data values previously used in floating point +registers, vector registers, or integer registers. RFDS does not provide the +ability to choose which data is inferred. CVE-2023-28746 is assigned to RFDS. + +Affected Processors +=================== +Below is the list of affected Intel processors [#f1]_: + + =================== ============ + Common name Family_Model + =================== ============ + ATOM_GOLDMONT 06_5CH + ATOM_GOLDMONT_D 06_5FH + ATOM_GOLDMONT_PLUS 06_7AH + ATOM_TREMONT_D 06_86H + ATOM_TREMONT 06_96H + ALDERLAKE 06_97H + ALDERLAKE_L 06_9AH + ATOM_TREMONT_L 06_9CH + RAPTORLAKE 06_B7H + RAPTORLAKE_P 06_BAH + ATOM_GRACEMONT 06_BEH + RAPTORLAKE_S 06_BFH + =================== ============ + +As an exception to this table, Intel Xeon E family parts ALDERLAKE(06_97H) and +RAPTORLAKE(06_B7H) codenamed Catlow are not affected. They are reported as +vulnerable in Linux because they share the same family/model with an affected +part. Unlike their affected counterparts, they do not enumerate RFDS_CLEAR or +CPUID.HYBRID. This information could be used to distinguish between the +affected and unaffected parts, but it is deemed not worth adding complexity as +the reporting is fixed automatically when these parts enumerate RFDS_NO. + +Mitigation +========== +Intel released a microcode update that enables software to clear sensitive +information using the VERW instruction. Like MDS, RFDS deploys the same +mitigation strategy to force the CPU to clear the affected buffers before an +attacker can extract the secrets. This is achieved by using the otherwise +unused and obsolete VERW instruction in combination with a microcode update. +The microcode clears the affected CPU buffers when the VERW instruction is +executed. + +Mitigation points +----------------- +VERW is executed by the kernel before returning to user space, and by KVM +before VMentry. None of the affected cores support SMT, so VERW is not required +at C-state transitions. + +New bits in IA32_ARCH_CAPABILITIES +---------------------------------- +Newer processors and microcode update on existing affected processors added new +bits to IA32_ARCH_CAPABILITIES MSR. These bits can be used to enumerate +vulnerability and mitigation capability: + +- Bit 27 - RFDS_NO - When set, processor is not affected by RFDS. +- Bit 28 - RFDS_CLEAR - When set, processor is affected by RFDS, and has the + microcode that clears the affected buffers on VERW execution. + +Mitigation control on the kernel command line +--------------------------------------------- +The kernel command line allows to control RFDS mitigation at boot time with the +parameter "reg_file_data_sampling=". The valid arguments are: + + ========== ================================================================= + on If the CPU is vulnerable, enable mitigation; CPU buffer clearing + on exit to userspace and before entering a VM. + off Disables mitigation. + ========== ================================================================= + +Mitigation default is selected by CONFIG_MITIGATION_RFDS. + +Mitigation status information +----------------------------- +The Linux kernel provides a sysfs interface to enumerate the current +vulnerability status of the system: whether the system is vulnerable, and +which mitigations are active. The relevant sysfs file is: + + /sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling + +The possible values in this file are: + + .. list-table:: + + * - 'Not affected' + - The processor is not vulnerable + * - 'Vulnerable' + - The processor is vulnerable, but no mitigation enabled + * - 'Vulnerable: No microcode' + - The processor is vulnerable but microcode is not updated. + * - 'Mitigation: Clear Register File' + - The processor is vulnerable and the CPU buffer clearing mitigation is + enabled. + +References +---------- +.. [#f1] Affected Processors + https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html --- linux-raspi-6.8.0.orig/Documentation/admin-guide/hw-vuln/spectre.rst +++ linux-raspi-6.8.0/Documentation/admin-guide/hw-vuln/spectre.rst @@ -138,11 +138,10 @@ the BHB might be shared across privilege levels even in the presence of Enhanced IBRS. -Currently the only known real-world BHB attack vector is via -unprivileged eBPF. Therefore, it's highly recommended to not enable -unprivileged eBPF, especially when eIBRS is used (without retpolines). -For a full mitigation against BHB attacks, it's recommended to use -retpolines (or eIBRS combined with retpolines). +Previously the only known real-world BHB attack vector was via unprivileged +eBPF. Further research has found attacks that don't require unprivileged eBPF. +For a full mitigation against BHB attacks it is recommended to set BHI_DIS_S or +use the BHB clearing sequence. Attack scenarios ---------------- @@ -430,6 +429,23 @@ 'PBRSB-eIBRS: Not affected' CPU is not affected by PBRSB =========================== ======================================================= + - Branch History Injection (BHI) protection status: + +.. list-table:: + + * - BHI: Not affected + - System is not affected + * - BHI: Retpoline + - System is protected by retpoline + * - BHI: BHI_DIS_S + - System is protected by BHI_DIS_S + * - BHI: SW loop; KVM SW loop + - System is protected by software clearing sequence + * - BHI: Syscall hardening + - Syscalls are hardened against BHI + * - BHI: Syscall hardening; KVM: SW loop + - System is protected from userspace attacks by syscall hardening; KVM is protected by software clearing sequence + Full mitigation might require a microcode update from the CPU vendor. When the necessary microcode is not available, the kernel will report vulnerability. @@ -484,7 +500,11 @@ Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at boot, by setting the IBRS bit, and they're automatically protected against - Spectre v2 variant attacks. + some Spectre v2 variant attacks. The BHB can still influence the choice of + indirect branch predictor entry, and although branch predictor entries are + isolated between modes when eIBRS is enabled, the BHB itself is not isolated + between modes. Systems which support BHI_DIS_S will set it to protect against + BHI attacks. On Intel's enhanced IBRS systems, this includes cross-thread branch target injections on SMT systems (STIBP). In other words, Intel eIBRS enables @@ -638,6 +658,22 @@ spectre_v2=off. Spectre variant 1 mitigations cannot be disabled. + spectre_bhi= + + [X86] Control mitigation of Branch History Injection + (BHI) vulnerability. Syscalls are hardened against BHI + regardless of this setting. This setting affects the deployment + of the HW BHI control and the SW BHB clearing sequence. + + on + unconditionally enable. + off + unconditionally disable. + auto + enable if hardware mitigation + control(BHI_DIS_S) is available, otherwise + enable alternate mitigation in KVM. + For spectre_v2_user see Documentation/admin-guide/kernel-parameters.txt Mitigation selection guide --- linux-raspi-6.8.0.orig/Documentation/admin-guide/kernel-parameters.txt +++ linux-raspi-6.8.0/Documentation/admin-guide/kernel-parameters.txt @@ -848,6 +848,10 @@ Format: ,,,[,] + cpufreq_driver= [X86] Allow only the named cpu frequency scaling driver + to register. Example: cpufreq_driver=powernow-k8 + Format: { none | STRING } + cpuidle.off=1 [CPU_IDLE] disable the cpuidle sub-system @@ -1150,6 +1154,26 @@ The filter can be disabled or changed to another driver later using sysfs. + reg_file_data_sampling= + [X86] Controls mitigation for Register File Data + Sampling (RFDS) vulnerability. RFDS is a CPU + vulnerability which may allow userspace to infer + kernel data values previously stored in floating point + registers, vector registers, or integer registers. + RFDS only affects Intel Atom processors. + + on: Turns ON the mitigation. + off: Turns OFF the mitigation. + + This parameter overrides the compile time default set + by CONFIG_MITIGATION_RFDS. Mitigation cannot be + disabled when other VERW based mitigations (like MDS) + are enabled. In order to disable RFDS mitigation all + VERW based mitigations need to be disabled. + + For details see: + Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst + driver_async_probe= [KNL] List of driver names to be probed asynchronously. * matches with all driver names. If * is specified, the @@ -3398,6 +3422,7 @@ nospectre_bhb [ARM64] nospectre_v1 [X86,PPC] nospectre_v2 [X86,PPC,S390,ARM64] + reg_file_data_sampling=off [X86] retbleed=off [X86] spec_store_bypass_disable=off [X86,PPC] spectre_v2_user=off [X86] @@ -4370,6 +4395,12 @@ nomsi [MSI] If the PCI_MSI kernel config parameter is enabled, this kernel boot option can be used to disable the use of MSI interrupts system-wide. + clearmsi [X86] Clears MSI/MSI-X enable bits early in boot + time in order to avoid issues like adapters + screaming irqs and preventing boot progress. + Also, it enforces the PCI Local Bus spec + rule that those bits should be 0 in system reset + events (useful for kexec/kdump cases). noioapicquirk [APIC] Disable all boot interrupt quirks. Safety option to keep boot IRQs enabled. This should never be necessary. @@ -5034,6 +5065,11 @@ this kernel boot parameter, forcibly setting it to zero. + rcutree.enable_rcu_lazy= [KNL] + To save power, batch RCU callbacks and flush after + delay, memory pressure or callback list growing too + big. + rcuscale.gp_async= [KNL] Measure performance of asynchronous grace-period primitives such as call_rcu(). @@ -6012,6 +6048,18 @@ sonypi.*= [HW] Sony Programmable I/O Control Device driver See Documentation/admin-guide/laptops/sonypi.rst + spectre_bhi= [X86] Control mitigation of Branch History Injection + (BHI) vulnerability. Syscalls are hardened against BHI + reglardless of this setting. This setting affects the + deployment of the HW BHI control and the SW BHB + clearing sequence. + + on - unconditionally enable. + off - unconditionally disable. + auto - (default) enable hardware mitigation + (BHI_DIS_S) if available, otherwise enable + alternate mitigation in KVM. + spectre_v2= [X86] Control mitigation of Spectre variant 2 (indirect branch speculation) vulnerability. The default operation protects the kernel from --- linux-raspi-6.8.0.orig/Documentation/admin-guide/media/bcm2835-isp.rst +++ linux-raspi-6.8.0/Documentation/admin-guide/media/bcm2835-isp.rst @@ -0,0 +1,127 @@ +.. SPDX-License-Identifier: GPL-2.0 + +BCM2835 ISP Driver +================== + +Introduction +------------ + +The BCM2835 Image Sensor Pipeline (ISP) is a fixed function hardware pipeline +for performing image processing operations. Images are fed to the input +of the ISP through memory frame buffers. These images may be in various YUV, +RGB, or Bayer formats. A typical use case would have Bayer images obtained from +an image sensor by the BCM2835 Unicam peripheral, written to a memory +frame buffer, and finally fed into the input of the ISP. Two concurrent output +images may be generated in YUV or RGB format at different resolutions. +Statistics output is also generated for Bayer input images. + +The bcm2835-isp driver exposes the following media pads as V4L2 device nodes: + +.. tabularcolumns:: |l|l|l|l| + +.. cssclass: longtable + +.. flat-table:: + + * - *Pad* + - *Direction* + - *Purpose* + - *Formats* + + * - "bcm2835-isp0-output0" + - sink + - Accepts Bayer, RGB or YUV format frame buffers as input to the ISP HW + pipeline. + - :ref:`RAW8 `, + :ref:`RAW10P `, + :ref:`RAW12P `, + :ref:`RAW14P `, + :ref:`RAW16 `, + :ref:`RGB24/BGR24 `, + :ref:`YUYV `, + :ref:`YVYU `, + :ref:`UYVY `, + :ref:`VYUY `, + :ref:`YUV420/YVU420 ` + + * - "bcm2835-isp0-capture1" + - source + - High resolution YUV or RGB processed output from the ISP. + - :ref:`RGB565 `, + :ref:`RGB24/BGR24 `, + :ref:`ABGR32 `, + :ref:`YUYV `, + :ref:`YVYU `, + :ref:`UYVY `, + :ref:`VYUY `. + :ref:`YUV420/YVU420 `, + :ref:`NV12/NV21 `, + + * - "bcm2835-isp0-capture2" + - source + - Low resolution YUV processed output from the ISP. The output of + this pad cannot have a resolution larger than the "bcm2835-isp0-capture1" pad in any dimension. + - :ref:`YUYV `, + :ref:`YVYU `, + :ref:`UYVY `, + :ref:`VYUY `. + :ref:`YUV420/YVU420 `, + :ref:`NV12/NV21 `, + + * - "bcm2835-isp0-capture1" + - source + - Image statistics calculated from the input image provided on the + "bcm2835-isp0-output0" pad. Statistics are only available for Bayer + format input images. + - :ref:`v4l2-meta-fmt-bcm2835-isp-stats`. + +Pipeline Configuration +---------------------- + +The ISP pipeline can be configure through user-space by calling +:ref:`VIDIOC_S_EXT_CTRLS ` on the “bcm2835-isp0-output0” +node with the appropriate parameters as shown in the table below. + +.. tabularcolumns:: |p{2cm}|p{5.0cm}| + +.. cssclass: longtable + +.. flat-table:: + + * - *id* + - *Parameter* + + * - ``V4L2_CID_USER_BCM2835_ISP_CC_MATRIX`` + - struct :c:type:`bcm2835_isp_custom_ccm` + + * - ``V4L2_CID_USER_BCM2835_ISP_LENS_SHADING`` + - struct :c:type:`bcm2835_isp_lens_shading` + + * - ``V4L2_CID_USER_BCM2835_ISP_BLACK_LEVEL`` + - struct :c:type:`bcm2835_isp_black_level` + + * - ``V4L2_CID_USER_BCM2835_ISP_GEQ`` + - struct :c:type:`bcm2835_isp_geq` + + * - ``V4L2_CID_USER_BCM2835_ISP_GAMMA`` + - struct :c:type:`bcm2835_isp_gamma` + + * - ``V4L2_CID_USER_BCM2835_ISP_DENOISE`` + - struct :c:type:`bcm2835_isp_denoise` + + * - ``V4L2_CID_USER_BCM2835_ISP_SHARPEN`` + - struct :c:type:`bcm2835_isp_sharpen` + + * - ``V4L2_CID_USER_BCM2835_ISP_DPC`` + - struct :c:type:`bcm2835_isp_dpc` + +++++++++++++++++++++++++ +Configuration Parameters +++++++++++++++++++++++++ + +.. kernel-doc:: include/uapi/linux/bcm2835-isp.h + :functions: bcm2835_isp_rational bcm2835_isp_ccm bcm2835_isp_custom_ccm + bcm2835_isp_gain_format bcm2835_isp_lens_shading + bcm2835_isp_black_level bcm2835_isp_geq bcm2835_isp_gamma + bcm2835_isp_denoise bcm2835_isp_sharpen + bcm2835_isp_dpc_mode bcm2835_isp_dpc --- linux-raspi-6.8.0.orig/Documentation/cgroups/namespace.txt +++ linux-raspi-6.8.0/Documentation/cgroups/namespace.txt @@ -0,0 +1,142 @@ + CGroup Namespaces + +CGroup Namespace provides a mechanism to virtualize the view of the +/proc//cgroup file. The CLONE_NEWCGROUP clone-flag can be used with +clone() and unshare() syscalls to create a new cgroup namespace. +The process running inside the cgroup namespace will have its /proc//cgroup +output restricted to cgroupns-root. cgroupns-root is the cgroup of the process +at the time of creation of the cgroup namespace. + +Prior to CGroup Namespace, the /proc//cgroup file used to show complete +path of the cgroup of a process. In a container setup (where a set of cgroups +and namespaces are intended to isolate processes), the /proc//cgroup file +may leak potential system level information to the isolated processes. + +For Example: + $ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/batchjobs/container_id1 + +The path '/batchjobs/container_id1' can generally be considered as system-data +and its desirable to not expose it to the isolated process. + +CGroup Namespaces can be used to restrict visibility of this path. +For Example: + # Before creating cgroup namespace + $ ls -l /proc/self/ns/cgroup + lrwxrwxrwx 1 root root 0 2014-07-15 10:37 /proc/self/ns/cgroup -> cgroup:[4026531835] + $ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/batchjobs/container_id1 + + # unshare(CLONE_NEWCGROUP) and exec /bin/bash + $ ~/unshare -c + [ns]$ ls -l /proc/self/ns/cgroup + lrwxrwxrwx 1 root root 0 2014-07-15 10:35 /proc/self/ns/cgroup -> cgroup:[4026532183] + # From within new cgroupns, process sees that its in the root cgroup + [ns]$ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/ + + # From global cgroupns: + $ cat /proc//cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/batchjobs/container_id1 + + # Unshare cgroupns along with userns and mountns + # Following calls unshare(CLONE_NEWCGROUP|CLONE_NEWUSER|CLONE_NEWNS), then + # sets up uid/gid map and execs /bin/bash + $ ~/unshare -c -u -m + # Originally, we were in /batchjobs/container_id1 cgroup. Mount our own cgroup + # hierarchy. + [ns]$ mount -t cgroup cgroup /tmp/cgroup + [ns]$ ls -l /tmp/cgroup + total 0 + -r--r--r-- 1 root root 0 2014-10-13 09:32 cgroup.controllers + -r--r--r-- 1 root root 0 2014-10-13 09:32 cgroup.populated + -rw-r--r-- 1 root root 0 2014-10-13 09:25 cgroup.procs + -rw-r--r-- 1 root root 0 2014-10-13 09:32 cgroup.subtree_control + +The cgroupns-root (/batchjobs/container_id1 in above example) becomes the +filesystem root for the namespace specific cgroupfs mount. + +The virtualization of /proc/self/cgroup file combined with restricting +the view of cgroup hierarchy by namespace-private cgroupfs mount +should provide a completely isolated cgroup view inside the container. + +In its current form, the cgroup namespaces patcheset provides following +behavior: + +(1) The 'cgroupns-root' for a cgroup namespace is the cgroup in which + the process calling unshare is running. + For ex. if a process in /batchjobs/container_id1 cgroup calls unshare, + cgroup /batchjobs/container_id1 becomes the cgroupns-root. + For the init_cgroup_ns, this is the real root ('/') cgroup + (identified in code as cgrp_dfl_root.cgrp). + +(2) The cgroupns-root cgroup does not change even if the namespace + creator process later moves to a different cgroup. + $ ~/unshare -c # unshare cgroupns in some cgroup + [ns]$ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/ + [ns]$ mkdir sub_cgrp_1 + [ns]$ echo 0 > sub_cgrp_1/cgroup.procs + [ns]$ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/sub_cgrp_1 + +(3) Each process gets its CGROUPNS specific view of /proc//cgroup +(a) Processes running inside the cgroup namespace will be able to see + cgroup paths (in /proc/self/cgroup) only inside their root cgroup + [ns]$ sleep 100000 & # From within unshared cgroupns + [1] 7353 + [ns]$ echo 7353 > sub_cgrp_1/cgroup.procs + [ns]$ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/sub_cgrp_1 + +(b) From global cgroupns, the real cgroup path will be visible: + $ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/batchjobs/container_id1/sub_cgrp_1 + +(c) From a sibling cgroupns (cgroupns root-ed at a different cgroup), cgroup + path relative to its own cgroupns-root will be shown: + # ns2's cgroupns-root is at '/batchjobs/container_id2' + [ns2]$ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/../container_id2/sub_cgrp_1 + + Note that the relative path always starts with '/' to indicate that its + relative to the cgroupns-root of the caller. + +(4) Processes inside a cgroupns can move in-and-out of the cgroupns-root + (if they have proper access to external cgroups). + # From inside cgroupns (with cgroupns-root at /batchjobs/container_id1), and + # assuming that the global hierarchy is still accessible inside cgroupns: + $ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/sub_cgrp_1 + $ echo 7353 > batchjobs/container_id2/cgroup.procs + $ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/../container_id2 + + Note that this kind of setup is not encouraged. A task inside cgroupns + should only be exposed to its own cgroupns hierarchy. Otherwise it makes + the virtualization of /proc//cgroup less useful. + +(5) Setns to another cgroup namespace is allowed when: + (a) the process has CAP_SYS_ADMIN in its current userns + (b) the process has CAP_SYS_ADMIN in the target cgroupns' userns + No implicit cgroup changes happen with attaching to another cgroupns. It + is expected that the somone moves the attaching process under the target + cgroupns-root. + +(6) When some thread from a multi-threaded process unshares its + cgroup-namespace, the new cgroupns gets applied to the entire process (all + the threads). For the unified-hierarchy this is expected as it only allows + process-level containerization. For the legacy hierarchies this may be + unexpected. So all the threads in the process will have the same cgroup. + +(7) The cgroup namespace is alive as long as there is atleast 1 + process inside it. When the last process exits, the cgroup + namespace is destroyed. The cgroupns-root and the actual cgroups + remain though. + +(8) Namespace specific cgroup hierarchy can be mounted by a process running + inside cgroupns: + $ mount -t cgroup -o __DEVEL__sane_behavior cgroup $MOUNT_POINT + + This will mount the unified cgroup hierarchy with cgroupns-root as the + filesystem root. The process needs CAP_SYS_ADMIN in its userns and mntns. --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml @@ -14,6 +14,8 @@ enum: - brcm,bcm2711-hdmi0 - brcm,bcm2711-hdmi1 + - brcm,bcm2712-hdmi0 + - brcm,bcm2712-hdmi1 reg: items: --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml @@ -21,6 +21,7 @@ - brcm,bcm2711-dsi1 - brcm,bcm2835-dsi0 - brcm,bcm2835-dsi1 + - brcm,bcm2711-dsi1 reg: maxItems: 1 --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml @@ -13,6 +13,7 @@ compatible: enum: - brcm,bcm2711-hvs + - brcm,bcm2712-hvs - brcm,bcm2835-hvs reg: @@ -36,7 +37,9 @@ properties: compatible: contains: - const: brcm,bcm2711-hvs + enum: + - brcm,bcm2711-hvs + - brcm,bcm2712-hvs then: required: --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml @@ -20,6 +20,9 @@ - brcm,bcm2711-pixelvalve2 - brcm,bcm2711-pixelvalve3 - brcm,bcm2711-pixelvalve4 + - brcm,bcm2712-pixelvalve0 + - brcm,bcm2712-pixelvalve1 + - brcm,bcm2712-pixelvalve2 reg: maxItems: 1 --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/brcm,bcm2835-txp.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/brcm,bcm2835-txp.yaml @@ -11,7 +11,10 @@ properties: compatible: - const: brcm,bcm2835-txp + enum: + - brcm,bcm2712-mop + - brcm,bcm2712-moplet + - brcm,bcm2835-txp reg: maxItems: 1 --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml @@ -18,6 +18,7 @@ compatible: enum: - brcm,bcm2711-vc5 + - brcm,bcm2712-vc6 - brcm,bcm2835-vc4 - brcm,cygnus-vc4 --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml @@ -21,6 +21,8 @@ - feixin,k101-im2byl02 - tdo,tl050hdv35 - wanchanglong,w552946aba + - raspberrypi,dsi-5inch + - raspberrypi,dsi-7inch - const: ilitek,ili9881c backlight: true --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/panel/panel-dsi.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/panel/panel-dsi.yaml @@ -0,0 +1,118 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/panel-dsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic MIPI DSI Panel + +maintainers: + - Timon Skerutsch + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + description: + Shall contain a panel specific compatible and "panel-dsi" + in that order. + items: + - {} + - const: panel-dsi + + dsi-color-format: + description: | + The color format used by the panel. Only DSI supported formats are allowed. + enum: + - RGB888 + - RGB666 + - RGB666_PACKED + - RGB565 + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Panel MIPI DSI input + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: true + + required: + - data-lanes + + mode: + description: | + DSI mode flags. See DSI Specs for details. + These are driver independent features of the DSI bus. + items: + - const: MODE_VIDEO + - const: MODE_VIDEO_BURST + - const: MODE_VIDEO_SYNC_PULSE + - const: MODE_VIDEO_AUTO_VERT + - const: MODE_VIDEO_HSE + - const: MODE_VIDEO_NO_HFP + - const: MODE_VIDEO_NO_HBP + - const: MODE_VIDEO_NO_HSA + - const: MODE_VSYNC_FLUSH + - const: MODE_NO_EOT_PACKET + - const: CLOCK_NON_CONTINUOUS + - const: MODE_LPM + - const: HS_PKT_END_ALIGNED + + reg: true + backlight: true + enable-gpios: true + width-mm: true + height-mm: true + panel-timing: true + power-supply: true + reset-gpios: true + ddc-i2c-bus: true + +required: + - panel-timing + - reg + - power-supply + - dsi-color-format + - port + +additionalProperties: false + +examples: + - | + panel { + compatible = "panel-mfgr,generic-dsi-panel","panel-dsi"; + power-supply = <&vcc_supply>; + backlight = <&backlight>; + dsi-color-format = "RGB888"; + reg = <0>; + mode = "MODE_VIDEO", "MODE_VIDEO_BURST", "MODE_NO_EOT_PACKET"; + + port { + panel_dsi_port: endpoint { + data-lanes = <1 2>; + remote-endpoint = <&dsi_out>; + }; + }; + + panel-timing { + clock-frequency = <9200000>; + hactive = <800>; + vactive = <480>; + hfront-porch = <8>; + hback-porch = <4>; + hsync-len = <41>; + vback-porch = <2>; + vfront-porch = <4>; + vsync-len = <10>; + }; + }; + +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -156,6 +156,8 @@ - frida,frd350h54004 # FriendlyELEC HD702E 800x1280 LCD panel - friendlyarm,hd702e + # Geekworm MZP280 2.8" 480x640 LCD panel with capacitive touch + - geekworm,mzp280 # GiantPlus GPG48273QS5 4.3" (480x272) WQVGA TFT LCD panel - giantplus,gpg48273qs5 # GiantPlus GPM940B0 3.0" QVGA TFT LCD panel @@ -170,6 +172,8 @@ - ivo,m133nwf4-r0 # Innolux AT043TN24 4.3" WQVGA TFT LCD panel - innolux,at043tn24 + # Innolux AT056tN53V1 5.6" VGA (640x480) TFT LCD panel + - innolux,at056tn53v1 # Innolux AT070TN92 7.0" WQVGA TFT LCD panel - innolux,at070tn92 # Innolux G070ACE-L01 7" WVGA (800x480) TFT LCD panel --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml @@ -16,6 +16,7 @@ compatible: enum: + - brcm,2712-v3d - brcm,2711-v3d - brcm,2712-v3d - brcm,7268-v3d --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/hwmon/emc2305.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip EMC230[1|2|3|5] RPM-based PWM Fan Speed Controller + +properties: + compatible: + enum: + - microchip,emc2305 + - microchip,emc2301 + emc2305,pwm-min: + description: + Min pwm of emc2305 + maxItems: 1 + emc2305,pwm-max: + description: + Max pwm of emc2305 + maxItems: 1 + emc2305,pwm-channel: + description: + Max number of pwm channels + maxItems: 1 + emcs205,max-state: + description: + maxItems: 1 + emc2305,cooling-levels: + description: + Quantity of cooling level state. + maxItems: 1 + +required: + - compatible + +optional: + - emc2305,min-pwm + - emc2305,max-pwm + - emc2305,pwm-channels + - emc2305,cooling-levels + +additionalProperties: false + +examples: + - | + fan { + compatible = "microchip,emc2305"; + emc2305,pwm-min = <0>; + emc2305,pwm-max = <255>; + emc2305,pwm-channel = <5> + emc2305,cooling-levels = <10>; + }; --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/bcm2835-unicam.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/bcm2835-unicam.txt @@ -0,0 +1,85 @@ +Broadcom BCM283x Camera Interface (Unicam) +------------------------------------------ + +The Unicam block on BCM283x SoCs is the receiver for either +CSI-2 or CCP2 data from image sensors or similar devices. + +The main platform using this SoC is the Raspberry Pi family of boards. +On the Pi the VideoCore firmware can also control this hardware block, +and driving it from two different processors will cause issues. +To avoid this, the firmware checks the device tree configuration +during boot. If it finds device tree nodes called csi0 or csi1 then +it will stop the firmware accessing the block, and it can then +safely be used via the device tree binding. + +Required properties: +=================== +- compatible : must be "brcm,bcm2835-unicam". +- reg : physical base address and length of the register sets for the + device. +- interrupts : should contain the IRQ line for this Unicam instance. +- clocks : list of clock specifiers, corresponding to entries in + clock-names property. +- clock-names : must contain "lp" and "vpu" entries, matching entries in the + clocks property. + +Unicam supports a single port node. It should contain one 'port' child node +with child 'endpoint' node. Please refer to the bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Within the endpoint node the "remote-endpoint" and "data-lanes" properties +are mandatory. +Data lane reordering is not supported so the data lanes must be in order, +starting at 1. The number of data lanes should represent the number of +usable lanes for the hardware block. That may be limited by either the SoC or +how the platform presents the interface, and the lower value must be used. + +Lane reordering is not supported on the clock lane either, so the optional +property "clock-lane" will implicitly be <0>. +Similarly lane inversion is not supported, therefore "lane-polarities" will +implicitly be <0 0 0 0 0>. +Neither of these values will be checked. + +Example: + csi1: csi1@7e801000 { + compatible = "brcm,bcm2835-unicam"; + reg = <0x7e801000 0x800>, + <0x7e802004 0x4>; + interrupts = <2 7>; + clocks = <&clocks BCM2835_CLOCK_CAM1>, + <&firmware_clocks 4>; + clock-names = "lp", "vpu"; + port { + csi1_ep: endpoint { + remote-endpoint = <&tc358743_0>; + data-lanes = <1 2>; + }; + }; + }; + + i2c0: i2c@7e205000 { + tc358743: csi-hdmi-bridge@0f { + compatible = "toshiba,tc358743"; + reg = <0x0f>; + + clocks = <&tc358743_clk>; + clock-names = "refclk"; + + tc358743_clk: bridge-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + + port { + tc358743_0: endpoint { + remote-endpoint = <&csi1_ep>; + clock-lanes = <0>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = + /bits/ 64 <297000000>; + }; + }; + }; + }; --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/ad5398.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/ad5398.txt @@ -0,0 +1,20 @@ +* Analog Devices AD5398 autofocus coil + +Required Properties: + + - compatible: Must contain one of: + - "adi,ad5398" + + - reg: I2C slave address + + - VANA-supply: supply of voltage for VANA pin + +Example: + + ad5398: coil@c { + compatible = "adi,ad5398"; + reg = <0x0c>; + + VANA-supply = <&vaux4>; + }; + --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/arducam,64mp.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/arducam,64mp.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/arducam,64mp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arducam 1/1.7-Inch 64Mpixel CMOS Digital Image Sensor + +maintainers: + - Lee Jackson + +description: |- + The Arducam 1/1.7-Inch 64Mpixel CMOS active pixel digital image sensor + with an active array size of 9248 x 6944. It is programmable through + I2C interface. The I2C address is fixed to 0x1A as per sensor data sheet. + Image data is sent through MIPI CSI-2, which can be configured for operation + with either 2 or 4 data lanes. + +properties: + compatible: + const: arducam,64mp + + reg: + description: I2C device address + maxItems: 1 + + clocks: + maxItems: 1 + + VDIG-supply: + description: + Digital I/O voltage supply, 1.05 volts + + VANA-supply: + description: + Analog voltage supply, 2.8 volts + + VDDL-supply: + description: + Digital core voltage supply, 1.8 volts + + reset-gpios: + description: |- + Reference to the GPIO connected to the xclr pin, if any. + Must be released (set high) after all supplies and INCK are applied. + + # See ../video-interfaces.txt for more details + port: + type: object + properties: + endpoint: + type: object + properties: + data-lanes: + description: |- + The sensor supports either two-lane, or four-lane operation. + For two-lane operation the property must be set to <1 2>. + anyOf: + - items: + - const: 1 + - const: 2 + - items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + clock-noncontinuous: true + + link-frequencies: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-array + description: + Allowed data bus frequencies. + + required: + - link-frequencies + +required: + - compatible + - reg + - clocks + - VANA-supply + - VDIG-supply + - VDDL-supply + - port + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + arducam_64mp: sensor@1a { + compatible = "arducam,64mp"; + reg = <0x1a>; + clocks = <&arducam_64mp_clk>; + VANA-supply = <&arducam_64mp_vana>; /* 2.8v */ + VDIG-supply = <&arducam_64mp_vdig>; /* 1.05v */ + VDDL-supply = <&arducam_64mp_vddl>; /* 1.8v */ + + port { + arducam_64mp_0: endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <456000000>; + }; + }; + }; + }; + +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/arducam-pivariety.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/arducam-pivariety.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/arducam-pivariety.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arducam Pivariety Series CMOS Digital Image Sensor + +maintainers: + - Lee Jackson + +description: |- + Arducam Pivariety series cameras make compatibility layers for various CMOS + sensors and provide a unified command interface. It is programmable through + I2C interface. The I2C address is fixed to 0x0C. Image data is sent through + MIPI CSI-2, which is configured as either 1, 2 or 4 data lanes. + +properties: + compatible: + const: arducam,arducam-pivariety + + reg: + description: I2C device address + maxItems: 1 + + clocks: + maxItems: 1 + + VDIG-supply: + description: + Digital I/O voltage supply, 1.05 volts + + VANA-supply: + description: + Analog voltage supply, 2.8 volts + + VDDL-supply: + description: + Digital core voltage supply, 1.8 volts + + reset-gpios: + description: |- + Reference to the GPIO connected to the xclr pin, if any. + Must be released (set high) after all supplies and INCK are applied. + + # See ../video-interfaces.txt for more details + port: + type: object + properties: + endpoint: + type: object + properties: + data-lanes: + description: |- + The sensor supports either two-lane, or four-lane operation. + For two-lane operation the property must be set to <1 2>. + items: + - const: 1 + - const: 2 + + clock-noncontinuous: + type: boolean + description: |- + MIPI CSI-2 clock is non-continuous if this property is present, + otherwise it's continuous. + + link-frequencies: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-array + description: + Allowed data bus frequencies. + + required: + - link-frequencies + +required: + - compatible + - reg + - clocks + - VANA-supply + - VDIG-supply + - VDDL-supply + - port + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + arducam_pivariety: sensor@0c { + compatible = "arducam,arducam-pivariety"; + reg = <0x0c>; + clocks = <&arducam_pivariety_clk>; + VANA-supply = <&arducam_pivariety_vana>; /* 2.8v */ + VDIG-supply = <&arducam_pivariety_vdig>; /* 1.05v */ + VDDL-supply = <&arducam_pivariety_vddl>; /* 1.8v */ + + port { + arducam_pivariety_0: endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <493500000>; + }; + }; + }; + }; + +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml @@ -5,22 +5,32 @@ $id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9807-vcm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Dongwoon Anatech DW9807 voice coil lens driver +title: Dongwoon Anatech DW9807 and DW9817 voice coil lens driver maintainers: - Sakari Ailus description: | DW9807 is a 10-bit DAC with current sink capability. It is intended for - controlling voice coil lenses. + controlling voice coil lenses. The output drive is 0-100mA. + DW9817 is very similar as a 10-bit DAC with current sink capability, + however the output drive is a bidirection -100 to +100mA. + properties: compatible: - const: dongwoon,dw9807-vcm + items: + - enum: + - dongwoon,dw9807-vcm + - dongwoon,dw9817-vcm reg: maxItems: 1 + VDD-supply: + description: + Definition of the regulator used as VDD power supply to the driver. + required: - compatible - reg --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/imx378.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/imx378.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/imx378.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony 1/2.3-Inch 12Mpixel CMOS Digital Image Sensor + +maintainers: + - Naushir Patuck + +description: |- + The Sony IMX378 is a 1/2.3-inch CMOS active pixel digital image sensor + with an active array size of 4056H x 3040V. It is programmable through + I2C interface. The I2C address is fixed to 0x1A as per sensor data sheet. + Image data is sent through MIPI CSI-2, which is configured as either 2 or + 4 data lanes. + +properties: + compatible: + const: sony,imx378 + + reg: + description: I2C device address + maxItems: 1 + + clocks: + maxItems: 1 + + VDIG-supply: + description: + Digital I/O voltage supply, 1.05 volts + + VANA-supply: + description: + Analog voltage supply, 2.8 volts + + VDDL-supply: + description: + Digital core voltage supply, 1.8 volts + + reset-gpios: + description: |- + Reference to the GPIO connected to the xclr pin, if any. + Must be released (set high) after all supplies and INCK are applied. + + # See ../video-interfaces.txt for more details + port: + type: object + properties: + endpoint: + type: object + properties: + data-lanes: + description: |- + The sensor supports either two-lane, or four-lane operation. + For two-lane operation the property must be set to <1 2>. + items: + - const: 1 + - const: 2 + + clock-noncontinuous: + type: boolean + description: |- + MIPI CSI-2 clock is non-continuous if this property is present, + otherwise it's continuous. + + link-frequencies: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-array + description: + Allowed data bus frequencies. + + required: + - link-frequencies + +required: + - compatible + - reg + - clocks + - VANA-supply + - VDIG-supply + - VDDL-supply + - port + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + imx378: sensor@10 { + compatible = "sony,imx378"; + reg = <0x1a>; + clocks = <&imx378_clk>; + VANA-supply = <&imx378_vana>; /* 2.8v */ + VDIG-supply = <&imx378_vdig>; /* 1.05v */ + VDDL-supply = <&imx378_vddl>; /* 1.8v */ + + port { + imx378_0: endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <450000000>; + }; + }; + }; + }; + +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/imx477.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/imx477.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/imx477.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony 1/2.3-Inch 12Mpixel CMOS Digital Image Sensor + +maintainers: + - Naushir Patuck + +description: |- + The Sony IMX477 is a 1/2.3-inch CMOS active pixel digital image sensor + with an active array size of 4056H x 3040V. It is programmable through + I2C interface. The I2C address is fixed to 0x1A as per sensor data sheet. + Image data is sent through MIPI CSI-2, which is configured as either 2 or + 4 data lanes. + +properties: + compatible: + const: sony,imx477 + + reg: + description: I2C device address + maxItems: 1 + + clocks: + maxItems: 1 + + VDIG-supply: + description: + Digital I/O voltage supply, 1.05 volts + + VANA-supply: + description: + Analog voltage supply, 2.8 volts + + VDDL-supply: + description: + Digital core voltage supply, 1.8 volts + + reset-gpios: + description: |- + Reference to the GPIO connected to the xclr pin, if any. + Must be released (set high) after all all supplies and INCK are applied. + + # See ../video-interfaces.txt for more details + port: + type: object + properties: + endpoint: + type: object + properties: + data-lanes: + description: |- + The sensor supports either two-lane, or four-lane operation. + For two-lane operation the property must be set to <1 2>. + items: + - const: 1 + - const: 2 + + clock-noncontinuous: + type: boolean + description: |- + MIPI CSI-2 clock is non-continuous if this property is present, + otherwise it's continuous. + + link-frequencies: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-array + description: + Allowed data bus frequencies. + + required: + - link-frequencies + +required: + - compatible + - reg + - clocks + - VANA-supply + - VDIG-supply + - VDDL-supply + - port + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + imx477: sensor@10 { + compatible = "sony,imx477"; + reg = <0x1a>; + clocks = <&imx477_clk>; + VANA-supply = <&imx477_vana>; /* 2.8v */ + VDIG-supply = <&imx477_vdig>; /* 1.05v */ + VDDL-supply = <&imx477_vddl>; /* 1.8v */ + + port { + imx477_0: endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <450000000>; + }; + }; + }; + }; + +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/imx519.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/imx519.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/imx519.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony 1/2.5-Inch 16Mpixel CMOS Digital Image Sensor + +maintainers: + - Lee Jackson + +description: |- + The Sony IMX519 is a 1/2.5-inch CMOS active pixel digital image sensor + with an active array size of 4656H x 3496V. It is programmable through + I2C interface. The I2C address is fixed to 0x1A as per sensor data sheet. + Image data is sent through MIPI CSI-2, which is configured as either 2 or + 4 data lanes. + +properties: + compatible: + const: sony,imx519 + + reg: + description: I2C device address + maxItems: 1 + + clocks: + maxItems: 1 + + VDIG-supply: + description: + Digital I/O voltage supply, 1.05 volts + + VANA-supply: + description: + Analog voltage supply, 2.8 volts + + VDDL-supply: + description: + Digital core voltage supply, 1.8 volts + + reset-gpios: + description: |- + Reference to the GPIO connected to the xclr pin, if any. + Must be released (set high) after all supplies and INCK are applied. + + # See ../video-interfaces.txt for more details + port: + type: object + properties: + endpoint: + type: object + properties: + data-lanes: + description: |- + The sensor supports either two-lane, or four-lane operation. + For two-lane operation the property must be set to <1 2>. + items: + - const: 1 + - const: 2 + + clock-noncontinuous: + type: boolean + description: |- + MIPI CSI-2 clock is non-continuous if this property is present, + otherwise it's continuous. + + link-frequencies: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-array + description: + Allowed data bus frequencies. + + required: + - link-frequencies + +required: + - compatible + - reg + - clocks + - VANA-supply + - VDIG-supply + - VDDL-supply + - port + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + imx519: sensor@1a { + compatible = "sony,imx519"; + reg = <0x1a>; + clocks = <&imx519_clk>; + VANA-supply = <&imx519_vana>; /* 2.8v */ + VDIG-supply = <&imx519_vdig>; /* 1.05v */ + VDDL-supply = <&imx519_vddl>; /* 1.8v */ + + port { + imx519_0: endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <493500000>; + }; + }; + }; + }; + +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/irs1125.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/irs1125.txt @@ -0,0 +1,48 @@ +* Infineon irs1125 time of flight sensor + +The Infineon irs1125 is a time of flight digital image sensor with +an active array size of 352H x 286V. It is programmable through I2C +interface. The I2C address defaults to 0x3D, but can be reconfigured +to address 0x3C or 0x41 via I2C commands. Image data is sent through +MIPI CSI-2, which is configured as either 1 or 2 data lanes. + +Required Properties: +- compatible: value should be "infineon,irs1125" for irs1125 sensor +- reg: I2C bus address of the device +- clocks: reference to the xclk input clock. +- pwdn-gpios: reference to the GPIO connected to the reset pin. + This is an active low signal to the iirs1125. + +The irs1125 device node should contain one 'port' child node with +an 'endpoint' subnode. For further reading on port node refer to +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Endpoint node required properties for CSI-2 connection are: +- remote-endpoint: a phandle to the bus receiver's endpoint node. +- clock-lanes: should be set to <0> (clock lane on hardware lane 0) +- data-lanes: should be set to <1> or <1 2> (one or two lane CSI-2 + supported) + +Example: + sensor@10 { + compatible = "infineon,irs1125"; + reg = <0x3D>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&irs1125_clk>; + pwdn-gpios = <&gpio 5 0>; + + irs1125_clk: camera-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + port { + sensor_out: endpoint { + remote-endpoint = <&csiss_in>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/rohm,bu64754.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/rohm,bu64754.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2023 Ideas on Board Oy. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/rohm,bu64754.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BU64754 Actuator Driver for Camera Autofocus + +maintainers: + - Kieran Bingham + +description: | + The BU64754GWZ is an actuator driver IC which can control the actuator + position precisely using an internal Hall Sensor. + +properties: + compatible: + items: + - enum: + - rohm,bu64754 + + reg: + maxItems: 1 + + vdd-supply: + description: + Definition of the regulator used as VDD power supply to the driver. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + lens@76 { + compatible = "rohm,bu64754"; + reg = <0x76>; + vdd-supply = <&cam1_reg>; + }; + }; +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/sony,imx258.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/sony,imx258.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/sony,imx258.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony IMX258 13 Mpixel CMOS Digital Image Sensor + +maintainers: + - Krzysztof Kozlowski + +description: |- + IMX258 is a diagonal 5.867mm (Type 1/3.06) 13 Mega-pixel CMOS active pixel + type stacked image sensor with a square pixel array of size 4208 x 3120. It + is programmable through I2C interface. Image data is sent through MIPI + CSI-2. + There are a number of variants of the sensor which cannot be detected at + runtime, so multiple compatible strings are required to differentiate these. + +properties: + compatible: + oneOf: + - enum: + - sony,imx258 + - sony,imx258-pdaf + + assigned-clocks: true + assigned-clock-parents: true + assigned-clock-rates: true + + clocks: + description: + Clock frequency from 6 to 27 MHz. + maxItems: 1 + + reg: + maxItems: 1 + + reset-gpios: + description: |- + Reference to the GPIO connected to the XCLR pin, if any. + + vana-supply: + description: + Analog voltage (VANA) supply, 2.7 V + + vdig-supply: + description: + Digital I/O voltage (VDIG) supply, 1.2 V + + vif-supply: + description: + Interface voltage (VIF) supply, 1.8 V + + # See ../video-interfaces.txt for more details + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + oneOf: + - items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + - items: + - const: 1 + - const: 2 + + link-frequencies: true + + required: + - data-lanes + - link-frequencies + +required: + - compatible + - reg + - port + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sensor@6c { + compatible = "sony,imx258"; + reg = <0x6c>; + clocks = <&imx258_clk>; + + port { + endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <320000000>; + }; + }; + }; + }; + + /* Oscillator on the camera board */ + imx258_clk: clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + }; + + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sensor@6c { + compatible = "sony,imx258"; + reg = <0x6c>; + clocks = <&imx258_clk>; + + assigned-clocks = <&imx258_clk>; + assigned-clock-rates = <19200000>; + + port { + endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <633600000>; + }; + }; + }; + }; --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/sony,imx708.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/i2c/sony,imx708.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/sony,imx708.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony 1/2.3-Inch 12Mpixel CMOS Digital Image Sensor + +maintainers: + - Raspberry Pi Kernel Maintenance + +description: |- + The Sony IMX708 is a 1/2.3-inch CMOS active pixel digital image sensor + with an active array size of 4608H x 2592V. It is programmable through + I2C interface. The I2C address is fixed to 0x1A as per sensor data sheet. + Image data is sent through MIPI CSI-2, which is configured as either 2 or + 4 data lanes. + +properties: + compatible: + const: sony,imx708 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + description: Input clock (6 to 27 MHz) + items: + - const: inck + + vdig-supply: + description: + Digital I/O voltage supply, 1.1 volts + + vana1-supply: + description: + Analog1 voltage supply, 2.8 volts + + vana2-supply: + description: + Analog2 voltage supply, 1.8 volts + + vddl-supply: + description: + Digital core voltage supply, 1.8 volts + + reset-gpios: + description: Sensor reset (XCLR) GPIO + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + description: | + Video output port + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + anyOf: + - items: + - const: 1 + - const: 2 + - items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + link-frequencies: true + + required: + - data-lanes + - link-frequencies + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - vdig-supply + - vana1-supply + - vana2-supply + - vddl-supply + - port + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + imx708: camera-sensor@1a { + compatible = "sony,imx708"; + reg = <0x1a>; + + clocks = <&clk 90>; + clock-names = "inck"; + + vdig-supply = <&camera_vdig>; + vana1-supply = <&camera_vana1>; + vana2-supply = <&camera_vana2>; + vddl-supply = <&camera_vddl>; + + reset-gpios = <&gpio 35 GPIO_ACTIVE_LOW>; + + port { + imx708_ep: endpoint { + data-lanes = <1 2>; + link-frequencies = /bits/ 64 <450000000>; + remote-endpoint = <&csi_ep>; + }; + }; + }; + }; +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/media/rpivid_hevc.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/media/rpivid_hevc.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rpivid_hevc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Raspberry Pi HEVC Decoder + +maintainers: + - Raspberry Pi + +description: |- + The Camera Adaptation Layer (CAL) is a key component for image capture + applications. The capture module provides the system interface and the + processing capability to connect CSI2 image-sensor modules to the + DRA72x device. + +properties: + compatible: + enum: + - raspberrypi,rpivid-vid-decoder + + reg: + minItems: 2 + items: + - description: The HEVC main register region + - description: The Interrupt controller register region + + reg-names: + minItems: 2 + items: + - const: hevc + - const: intc + + interrupts: + maxItems: 1 + + clocks: + items: + - description: The HEVC block clock + + clock-names: + items: + - const: hevc + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + + video-codec@7eb10000 { + compatible = "raspberrypi,rpivid-vid-decoder"; + reg = <0x0 0x7eb10000 0x1000>, /* INTC */ + <0x0 0x7eb00000 0x10000>; /* HEVC */ + reg-names = "intc", + "hevc"; + + interrupts = ; + + clocks = <&clk 0>; + clock-names = "hevc"; + }; + +... --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/misc/brcm,bcm2835-smi-dev.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/misc/brcm,bcm2835-smi-dev.txt @@ -0,0 +1,17 @@ +* Broadcom BCM2835 SMI character device driver. + +SMI or secondary memory interface is a peripheral specific to certain Broadcom +SOCs, and is helpful for talking to things like parallel-interface displays +and NAND flashes (in fact, most things with a parallel register interface). + +This driver adds a character device which provides a user-space interface to +an instance of the SMI driver. + +Required properties: +- compatible: "brcm,bcm2835-smi-dev" +- smi_handle: a phandle to the smi node. + +Optional properties: +- None. + + --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/misc/brcm,bcm2835-smi.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/misc/brcm,bcm2835-smi.txt @@ -0,0 +1,48 @@ +* Broadcom BCM2835 SMI driver. + +SMI or secondary memory interface is a peripheral specific to certain Broadcom +SOCs, and is helpful for talking to things like parallel-interface displays +and NAND flashes (in fact, most things with a parallel register interface). + +Required properties: +- compatible: "brcm,bcm2835-smi" +- reg: Should contain location and length of SMI registers and SMI clkman regs +- interrupts: *the* SMI interrupt. +- pinctrl-names: should be "default". +- pinctrl-0: the phandle of the gpio pin node. +- brcm,smi-clock-source: the clock source for clkman +- brcm,smi-clock-divisor: the integer clock divisor for clkman +- dmas: the dma controller phandle and the DREQ number (4 on a 2835) +- dma-names: the name used by the driver to request its channel. + Should be "rx-tx". + +Optional properties: +- None. + +Examples: + +8 data pin configuration: + +smi: smi@7e600000 { + compatible = "brcm,bcm2835-smi"; + reg = <0x7e600000 0x44>, <0x7e1010b0 0x8>; + interrupts = <2 16>; + pinctrl-names = "default"; + pinctrl-0 = <&smi_pins>; + brcm,smi-clock-source = <6>; + brcm,smi-clock-divisor = <4>; + dmas = <&dma 4>; + dma-names = "rx-tx"; + + status = "okay"; +}; + +smi_pins: smi_pins { + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15>; + /* Alt 1: SMI */ + brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5>; + /* /CS, /WE and /OE are pulled high, as they are + generally active low signals */ + brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0>; +}; + --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -16,6 +16,7 @@ properties: compatible: enum: + - raspberrypi,rp1-dwcmshc - rockchip,rk3568-dwcmshc - rockchip,rk3588-dwcmshc - snps,dwcmshc-sdhci @@ -35,6 +36,8 @@ - description: axi clock for rockchip specified - description: block clock for rockchip specified - description: timer clock for rockchip specified + - description: timeout clock for rp1 specified + - description: sdio clock generator for rp1 specified clock-names: @@ -45,6 +48,8 @@ - const: axi - const: block - const: timer + - const: timeout + - const: sdio resets: maxItems: 5 --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -131,6 +131,22 @@ Node containing PHY children. If this node is not present, then PHYs will be direct children. + cdns,aw2w-max-pipe: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Maximum number of outstanding AXI write requests + + cdns,ar2r-max-pipe: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Maximum number of outstanding AXI read requests + + cdns,use-aw2b-fill: + type: boolean + description: + If set, the maximum number of outstanding write transactions operates + between the AW to B AXI channel, instead of the AW to W AXI channel. + patternProperties: "^ethernet-phy@[0-9a-f]$": type: object --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/net/microchip,lan78xx.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/net/microchip,lan78xx.txt @@ -14,6 +14,9 @@ - microchip,led-modes: a 0..4 element vector, with each element configuring the operating mode of an LED. Omitted LEDs are turned off. Allowed values are defined in "include/dt-bindings/net/microchip-lan78xx.h". +- microchip,downshift-after: sets the number of failed auto-negotiation + attempts after which the link is downgraded from 1000BASE-T. Should be one of + 2, 3, 4, 5 or 0, where 0 means never downshift. Example: --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -95,6 +95,14 @@ minItems: 1 maxItems: 3 + brcm,tperst-clk-ms: + category: optional + type: int + description: u32 giving the number of milliseconds to extend + the time between internal release of fundamental reset and + the deassertion of the external PERST# pin. This has the + effect of increasing the Tperst_clk phase of link init. + required: - compatible - reg --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt @@ -0,0 +1,59 @@ +Brcmstb PCIe Host Controller Device Tree Bindings + +Required Properties: +- compatible + "brcm,bcm7425-pcie" -- for 7425 family MIPS-based SOCs. + "brcm,bcm7435-pcie" -- for 7435 family MIPS-based SOCs. + "brcm,bcm7445-pcie" -- for 7445 and later ARM based SOCs (not including + the 7278). + "brcm,bcm7278-pcie" -- for 7278 family ARM-based SOCs. + +- reg -- the register start address and length for the PCIe reg block. +- interrupts -- two interrupts are specified; the first interrupt is for + the PCI host controller and the second is for MSI if the built-in + MSI controller is to be used. +- interrupt-names -- names of the interrupts (above): "pcie" and "msi". +- #address-cells -- set to <3>. +- #size-cells -- set to <2>. +- #interrupt-cells: set to <1>. +- interrupt-map-mask and interrupt-map, standard PCI properties to define the + mapping of the PCIe interface to interrupt numbers. +- ranges: ranges for the PCI memory and I/O regions. +- linux,pci-domain -- should be unique per host controller. + +Optional Properties: +- clocks -- phandle of pcie clock. +- clock-names -- set to "sw_pcie" if clocks is used. +- dma-ranges -- Specifies the inbound memory mapping regions when + an "identity map" is not possible. +- msi-controller -- this property is typically specified to have the + PCIe controller use its internal MSI controller. +- msi-parent -- set to use an external MSI interrupt controller. +- brcm,enable-ssc -- (boolean) indicates usage of spread-spectrum clocking. +- max-link-speed -- (integer) indicates desired generation of link: + 1 => 2.5 Gbps (gen1), 2 => 5.0 Gbps (gen2), 3 => 8.0 Gbps (gen3). + +Example Node: + +pcie0: pcie@f0460000 { + reg = <0x0 0xf0460000 0x0 0x9310>; + interrupts = <0x0 0x0 0x4>; + compatible = "brcm,bcm7445-pcie"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x02000000 0x00000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x08000000 + 0x02000000 0x00000000 0x08000000 0x00000000 0xc8000000 0x00000000 0x08000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &intc 0 47 3 + 0 0 0 2 &intc 0 48 3 + 0 0 0 3 &intc 0 49 3 + 0 0 0 4 &intc 0 50 3>; + clocks = <&sw_pcie0>; + clock-names = "sw_pcie"; + msi-parent = <&pcie0>; /* use PCIe's internal MSI controller */ + msi-controller; /* use PCIe's internal MSI controller */ + brcm,ssc; + max-link-speed = <1>; + linux,pci-domain = <0>; + }; --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/power/reset/gpio-poweroff.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/power/reset/gpio-poweroff.yaml @@ -50,6 +50,10 @@ default: 3000 description: Time to wait before assuming the power off sequence failed. + export: + type: boolean + description: Export the GPIO line to the sysfs system + required: - compatible - gpios --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/pwm/pwm-rp1.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/pwm/pwm-rp1.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/pwm-rp1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Raspberry Pi RP1 PWM controller + +maintainers: + - Naushir Patuck + +properties: + compatible: + enum: + - raspberrypi,rp1-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 3 + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + pwm0: pwm@98000 { + compatible = "raspberrypi,rp1-pwm"; + reg = <0x0 0x98000 0x0 0x100>; + clocks = <&rp1_sys>; + #pwm-cells = <3>; + }; --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/rtc/rtc-rpi.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/rtc/rtc-rpi.txt @@ -0,0 +1,22 @@ +* Raspberry Pi RTC + +This is a Linux interface to an RTC managed by firmware, hence it's +virtual from a Linux perspective. + +The interface uses the firmware mailbox api to access the RTC registers. + +Required properties: +compatible: should be "raspberrypi,rpi-rtc" +firmware: Reference to the RPi firmware device node. + +Optional property: +trickle-charge-microvolt: specify a trickle charge voltage for the backup + battery in microvolts. + +Example: + + rpi_rtc: rpi_rtc { + compatible = "raspberrypi,rpi-rtc"; + firmware = <&firmware>; + trickle-charge-microvolt = <3000000>; + }; --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/serial/pl011.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/serial/pl011.yaml @@ -101,6 +101,12 @@ on the device. enum: [1, 4] + cts-event-workaround: + description: + Enables the (otherwise vendor-specific) workaround for the + CTS-induced TX lockup. + type: boolean + required: - compatible - reg --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/spi/spi-gpio.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/spi/spi-gpio.yaml @@ -43,6 +43,10 @@ with no chip select is connected. $ref: /schemas/types.yaml#/definitions/uint32 + sck-idle-input: + description: Make SCK an input when inactive. + type: boolean + # Deprecated properties gpio-sck: false gpio-miso: false --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/vendor-prefixes.txt +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -0,0 +1,463 @@ +Device tree binding vendor prefix registry. Keep list in alphabetical order. + +This isn't an exhaustive list, but you should add new prefixes to it before +using them to avoid name-space collisions. + +abilis Abilis Systems +abracon Abracon Corporation +actions Actions Semiconductor Co., Ltd. +active-semi Active-Semi International Inc +ad Avionic Design GmbH +adafruit Adafruit Industries, LLC +adapteva Adapteva, Inc. +adaptrum Adaptrum, Inc. +adh AD Holdings Plc. +adi Analog Devices, Inc. +advantech Advantech Corporation +aeroflexgaisler Aeroflex Gaisler AB +al Annapurna Labs +allo Allo.com +allwinner Allwinner Technology Co., Ltd. +alphascale AlphaScale Integrated Circuits Systems, Inc. +altr Altera Corp. +amarula Amarula Solutions +amazon Amazon.com, Inc. +amcc Applied Micro Circuits Corporation (APM, formally AMCC) +amd Advanced Micro Devices (AMD), Inc. +amediatech Shenzhen Amediatech Technology Co., Ltd +amlogic Amlogic, Inc. +ampire Ampire Co., Ltd. +ams AMS AG +amstaos AMS-Taos Inc. +analogix Analogix Semiconductor, Inc. +andestech Andes Technology Corporation +apm Applied Micro Circuits Corporation (APM) +aptina Aptina Imaging +arasan Arasan Chip Systems +archermind ArcherMind Technology (Nanjing) Co., Ltd. +arctic Arctic Sand +aries Aries Embedded GmbH +arm ARM Ltd. +armadeus ARMadeus Systems SARL +arrow Arrow Electronics +artesyn Artesyn Embedded Technologies Inc. +asahi-kasei Asahi Kasei Corp. +aspeed ASPEED Technology Inc. +asus AsusTek Computer Inc. +atlas Atlas Scientific LLC +atmel Atmel Corporation +auo AU Optronics Corporation +auvidea Auvidea GmbH +avago Avago Technologies +avia avia semiconductor +avic Shanghai AVIC Optoelectronics Co., Ltd. +avnet Avnet, Inc. +axentia Axentia Technologies AB +axis Axis Communications AB +bananapi BIPAI KEJI LIMITED +bhf Beckhoff Automation GmbH & Co. KG +bitmain Bitmain Technologies +blokaslabs Vilniaus Blokas UAB +boe BOE Technology Group Co., Ltd. +bosch Bosch Sensortec GmbH +boundary Boundary Devices Inc. +brcm Broadcom Corporation +buffalo Buffalo, Inc. +bticino Bticino International +calxeda Calxeda +capella Capella Microsystems, Inc +cascoda Cascoda, Ltd. +catalyst Catalyst Semiconductor, Inc. +cavium Cavium, Inc. +cdns Cadence Design Systems Inc. +cdtech CDTech(H.K.) Electronics Limited +ceva Ceva, Inc. +chipidea Chipidea, Inc +chipone ChipOne +chipspark ChipSPARK +chrp Common Hardware Reference Platform +chunghwa Chunghwa Picture Tubes Ltd. +ciaa Computadora Industrial Abierta Argentina +cirrus Cirrus Logic, Inc. +cloudengines Cloud Engines, Inc. +cnm Chips&Media, Inc. +cnxt Conexant Systems, Inc. +compulab CompuLab Ltd. +cortina Cortina Systems, Inc. +cosmic Cosmic Circuits +crane Crane Connectivity Solutions +creative Creative Technology Ltd +crystalfontz Crystalfontz America, Inc. +csky Hangzhou C-SKY Microsystems Co., Ltd +cubietech Cubietech, Ltd. +cypress Cypress Semiconductor Corporation +cznic CZ.NIC, z.s.p.o. +dallas Maxim Integrated Products (formerly Dallas Semiconductor) +dataimage DataImage, Inc. +davicom DAVICOM Semiconductor, Inc. +delta Delta Electronics, Inc. +denx Denx Software Engineering +devantech Devantech, Ltd. +dh DH electronics GmbH +digi Digi International Inc. +digilent Diglent, Inc. +dioo Dioo Microcircuit Co., Ltd +dlc DLC Display Co., Ltd. +dlg Dialog Semiconductor +dlink D-Link Corporation +dmo Data Modul AG +domintech Domintech Co., Ltd. +dongwoon Dongwoon Anatech +dptechnics DPTechnics +dragino Dragino Technology Co., Limited +ea Embedded Artists AB +ebs-systart EBS-SYSTART GmbH +ebv EBV Elektronik +eckelmann Eckelmann AG +edt Emerging Display Technologies +eeti eGalax_eMPIA Technology Inc +elan Elan Microelectronic Corp. +elgin Elgin S/A. +embest Shenzhen Embest Technology Co., Ltd. +emlid Emlid, Ltd. +emmicro EM Microelectronic +emtrion emtrion GmbH +endless Endless Mobile, Inc. +energymicro Silicon Laboratories (formerly Energy Micro AS) +engicam Engicam S.r.l. +epcos EPCOS AG +epfl Ecole Polytechnique Fédérale de Lausanne +epson Seiko Epson Corp. +est ESTeem Wireless Modems +ettus NI Ettus Research +eukrea Eukréa Electromatique +everest Everest Semiconductor Co. Ltd. +everspin Everspin Technologies, Inc. +exar Exar Corporation +excito Excito +ezchip EZchip Semiconductor +facebook Facebook +fairphone Fairphone B.V. +faraday Faraday Technology Corporation +fastrax Fastrax Oy +fcs Fairchild Semiconductor +feiyang Shenzhen Fly Young Technology Co.,LTD. +firefly Firefly +focaltech FocalTech Systems Co.,Ltd +friendlyarm Guangzhou FriendlyARM Computer Tech Co., Ltd +fsl Freescale Semiconductor +fujitsu Fujitsu Ltd. +gateworks Gateworks Corporation +gcw Game Consoles Worldwide +ge General Electric Company +geekbuying GeekBuying +gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. +GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. +geniatech Geniatech, Inc. +giantec Giantec Semiconductor, Inc. +giantplus Giantplus Technology Co., Ltd. +globalscale Globalscale Technologies, Inc. +globaltop GlobalTop Technology, Inc. +gmt Global Mixed-mode Technology, Inc. +goodix Shenzhen Huiding Technology Co., Ltd. +google Google, Inc. +grinn Grinn +grmn Garmin Limited +gumstix Gumstix, Inc. +gw Gateworks Corporation +hannstar HannStar Display Corporation +haoyu Haoyu Microelectronic Co. Ltd. +hardkernel Hardkernel Co., Ltd +hideep HiDeep Inc. +himax Himax Technologies, Inc. +hisilicon Hisilicon Limited. +hit Hitachi Ltd. +hitex Hitex Development Tools +holt Holt Integrated Circuits, Inc. +honeywell Honeywell +hp Hewlett Packard +holtek Holtek Semiconductor, Inc. +hwacom HwaCom Systems Inc. +i2se I2SE GmbH +ibm International Business Machines (IBM) +icplus IC Plus Corp. +idt Integrated Device Technologies, Inc. +ifi Ingenieurburo Fur Ic-Technologie (I/F/I) +ilitek ILI Technology Corporation (ILITEK) +img Imagination Technologies Ltd. +infineon Infineon Technologies +inforce Inforce Computing +ingenic Ingenic Semiconductor +innolux Innolux Corporation +inside-secure INSIDE Secure +intel Intel Corporation +intercontrol Inter Control Group +invensense InvenSense Inc. +inversepath Inverse Path +iom Iomega Corporation +isee ISEE 2007 S.L. +isil Intersil +issi Integrated Silicon Solutions Inc. +itead ITEAD Intelligent Systems Co.Ltd +iwave iWave Systems Technologies Pvt. Ltd. +jdi Japan Display Inc. +jedec JEDEC Solid State Technology Association +jianda Jiandangjing Technology Co., Ltd. +karo Ka-Ro electronics GmbH +keithkoep Keith & Koep GmbH +keymile Keymile GmbH +khadas Khadas +kiebackpeter Kieback & Peter GmbH +kinetic Kinetic Technologies +kingdisplay King & Display Technology Co., Ltd. +kingnovel Kingnovel Technology Co., Ltd. +koe Kaohsiung Opto-Electronics Inc. +kosagi Sutajio Ko-Usagi PTE Ltd. +kyo Kyocera Corporation +lacie LaCie +laird Laird PLC +lantiq Lantiq Semiconductor +lattice Lattice Semiconductor +lego LEGO Systems A/S +lemaker Shenzhen LeMaker Technology Co., Ltd. +lenovo Lenovo Group Ltd. +lg LG Corporation +libretech Shenzhen Libre Technology Co., Ltd +licheepi Lichee Pi +linaro Linaro Limited +linksys Belkin International, Inc. (Linksys) +linux Linux-specific binding +linx Linx Technologies +lltc Linear Technology Corporation +logicpd Logic PD, Inc. +lsi LSI Corp. (LSI Logic) +lwn Liebherr-Werk Nenzing GmbH +macnica Macnica Americas +marvell Marvell Technology Group Ltd. +maxim Maxim Integrated Products +mbvl Mobiveil Inc. +mcube mCube +meas Measurement Specialties +mediatek MediaTek Inc. +megachips MegaChips +mele Shenzhen MeLE Digital Technology Ltd. +melexis Melexis N.V. +melfas MELFAS Inc. +mellanox Mellanox Technologies +memsic MEMSIC Inc. +merrii Merrii Technology Co., Ltd. +micrel Micrel Inc. +microchip Microchip Technology Inc. +microcrystal Micro Crystal AG +micron Micron Technology Inc. +mikroe MikroElektronika d.o.o. +minix MINIX Technology Ltd. +miramems MiraMEMS Sensing Technology Co., Ltd. +mitsubishi Mitsubishi Electric Corporation +mosaixtech Mosaix Technologies, Inc. +motorola Motorola, Inc. +moxa Moxa Inc. +mpl MPL AG +mqmaker mqmaker Inc. +mscc Microsemi Corporation +msi Micro-Star International Co. Ltd. +mti Imagination Technologies Ltd. (formerly MIPS Technologies Inc.) +multi-inno Multi-Inno Technology Co.,Ltd +mundoreader Mundo Reader S.L. +murata Murata Manufacturing Co., Ltd. +mxicy Macronix International Co., Ltd. +myir MYIR Tech Limited +national National Semiconductor +nec NEC LCD Technologies, Ltd. +neonode Neonode Inc. +netgear NETGEAR +netlogic Broadcom Corporation (formerly NetLogic Microsystems) +netron-dy Netron DY +netxeon Shenzhen Netxeon Technology CO., LTD +nexbox Nexbox +nextthing Next Thing Co. +newhaven Newhaven Display International +ni National Instruments +nintendo Nintendo +nlt NLT Technologies, Ltd. +nokia Nokia +nordic Nordic Semiconductor +novtech NovTech, Inc. +nutsboard NutsBoard +nuvoton Nuvoton Technology Corporation +nvd New Vision Display +nvidia NVIDIA +nxp NXP Semiconductors +okaya Okaya Electric America, Inc. +oki Oki Electric Industry Co., Ltd. +olimex OLIMEX Ltd. +olpc One Laptop Per Child +onion Onion Corporation +onnn ON Semiconductor Corp. +ontat On Tat Industrial Company +opalkelly Opal Kelly Incorporated +opencores OpenCores.org +openrisc OpenRISC.io +option Option NV +oranth Shenzhen Oranth Technology Co., Ltd. +ORCL Oracle Corporation +orisetech Orise Technology +ortustech Ortus Technology Co., Ltd. +ovti OmniVision Technologies +oxsemi Oxford Semiconductor, Ltd. +panasonic Panasonic Corporation +parade Parade Technologies Inc. +pda Precision Design Associates, Inc. +pericom Pericom Technology Inc. +pervasive Pervasive Displays, Inc. +phicomm PHICOMM Co., Ltd. +phytec PHYTEC Messtechnik GmbH +picochip Picochip Ltd +pine64 Pine64 +pixcir PIXCIR MICROELECTRONICS Co., Ltd +plantower Plantower Co., Ltd +plathome Plat'Home Co., Ltd. +plda PLDA +plx Broadcom Corporation (formerly PLX Technology) +pni PNI Sensor Corporation +portwell Portwell Inc. +poslab Poslab Technology Co., Ltd. +powervr PowerVR (deprecated, use img) +probox2 PROBOX2 (by W2COMP Co., Ltd.) +pulsedlight PulsedLight, Inc +qca Qualcomm Atheros, Inc. +qcom Qualcomm Technologies, Inc +qemu QEMU, a generic and open source machine emulator and virtualizer +qi Qi Hardware +qiaodian QiaoDian XianShi Corporation +qnap QNAP Systems, Inc. +radxa Radxa +raidsonic RaidSonic Technology GmbH +ralink Mediatek/Ralink Technology Corp. +ramtron Ramtron International +raspberrypi Raspberry Pi Foundation +raydium Raydium Semiconductor Corp. +rda Unisoc Communications, Inc. +realtek Realtek Semiconductor Corp. +renesas Renesas Electronics Corporation +richtek Richtek Technology Corporation +ricoh Ricoh Co. Ltd. +rikomagic Rikomagic Tech Corp. Ltd +riscv RISC-V Foundation +rockchip Fuzhou Rockchip Electronics Co., Ltd +rohm ROHM Semiconductor Co., Ltd +roofull Shenzhen Roofull Technology Co, Ltd +samsung Samsung Semiconductor +samtec Samtec/Softing company +sancloud Sancloud Ltd +sandisk Sandisk Corporation +sbs Smart Battery System +schindler Schindler +seagate Seagate Technology PLC +semtech Semtech Corporation +sensirion Sensirion AG +sff Small Form Factor Committee +sgd Solomon Goldentek Display Corporation +sgx SGX Sensortech +sharp Sharp Corporation +shimafuji Shimafuji Electric, Inc. +si-en Si-En Technology Ltd. +sifive SiFive, Inc. +sigma Sigma Designs, Inc. +sii Seiko Instruments, Inc. +sil Silicon Image +silabs Silicon Laboratories +silead Silead Inc. +silergy Silergy Corp. +siliconmitus Silicon Mitus, Inc. +simtek +sirf SiRF Technology, Inc. +sis Silicon Integrated Systems Corp. +sitronix Sitronix Technology Corporation +skyworks Skyworks Solutions, Inc. +smsc Standard Microsystems Corporation +snps Synopsys, Inc. +socionext Socionext Inc. +solidrun SolidRun +solomon Solomon Systech Limited +sony Sony Corporation +spansion Spansion Inc. +sprd Spreadtrum Communications Inc. +sst Silicon Storage Technology, Inc. +st STMicroelectronics +starry Starry Electronic Technology (ShenZhen) Co., LTD +startek Startek +ste ST-Ericsson +stericsson ST-Ericsson +summit Summit microelectronics +sunchip Shenzhen Sunchip Technology Co., Ltd +SUNW Sun Microsystems, Inc +swir Sierra Wireless +syna Synaptics Inc. +synology Synology, Inc. +tbs TBS Technologies +tbs-biometrics Touchless Biometric Systems AG +tcg Trusted Computing Group +tcl Toby Churchill Ltd. +technexion TechNexion +technologic Technologic Systems +tempo Tempo Semiconductor +techstar Shenzhen Techstar Electronics Co., Ltd. +terasic Terasic Inc. +thine THine Electronics, Inc. +ti Texas Instruments +tianma Tianma Micro-electronics Co., Ltd. +tlm Trusted Logic Mobility +tmt Tecon Microprocessor Technologies, LLC. +topeet Topeet +toradex Toradex AG +toshiba Toshiba Corporation +toumaz Toumaz +tpk TPK U.S.A. LLC +tplink TP-LINK Technologies Co., Ltd. +tpo TPO +tronfy Tronfy +tronsmart Tronsmart +truly Truly Semiconductors Limited +tsd Theobroma Systems Design und Consulting GmbH +tyan Tyan Computer Corporation +u-blox u-blox +ucrobotics uCRobotics +ubnt Ubiquiti Networks +udoo Udoo +uniwest United Western Technologies Corp (UniWest) +upisemi uPI Semiconductor Corp. +urt United Radiant Technology Corporation +usi Universal Scientific Industrial Co., Ltd. +v3 V3 Semiconductor +vamrs Vamrs Ltd. +variscite Variscite Ltd. +via VIA Technologies, Inc. +virtio Virtual I/O Device Specification, developed by the OASIS consortium +vishay Vishay Intertechnology, Inc +vitesse Vitesse Semiconductor Corporation +vivante Vivante Corporation +vocore VoCore Studio +voipac Voipac Technologies s.r.o. +vot Vision Optical Technology Co., Ltd. +wd Western Digital Corp. +wetek WeTek Electronics, limited. +wexler Wexler +whwave Shenzhen whwave Electronics, Inc. +wi2wi Wi2Wi, Inc. +winbond Winbond Electronics corp. +winstar Winstar Display Corp. +wlf Wolfson Microelectronics +wm Wondermedia Technologies, Inc. +x-powers X-Powers +xes Extreme Engineering Solutions (X-ES) +xillybus Xillybus Ltd. +xlnx Xilinx +xunlong Shenzhen Xunlong Software CO.,Limited +ysoft Y Soft Corporation a.s. +zarlink Zarlink Semiconductor +zeitec ZEITEC Semiconductor Co., LTD. +zidoo Shenzhen Zidoo Technology Co., Ltd. +zii Zodiac Inflight Innovations +zte ZTE Corp. +zyxel ZyXEL Communications Corp. --- linux-raspi-6.8.0.orig/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ linux-raspi-6.8.0/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -141,6 +141,8 @@ description: arcx Inc. / Archronix Inc. "^aries,.*": description: Aries Embedded GmbH + "^arducam,.*": + description: Arducam Technology co., Ltd. "^arm,.*": description: ARM Ltd. "^armadeus,.*": @@ -206,6 +208,8 @@ description: Shenzhen BigTree Tech Co., LTD "^bitmain,.*": description: Bitmain Technologies + "^blokaslabs,.*": + description: Vilniaus Blokas UAB "^blutek,.*": description: BluTek Power "^boe,.*": @@ -526,6 +530,8 @@ description: General Electric Company "^geekbuying,.*": description: GeekBuying + "^geekworm,.*": + description: Geekworm "^gef,.*": description: GE Fanuc Intelligent Platforms Embedded Systems, Inc. "^GEFanuc,.*": --- linux-raspi-6.8.0.orig/Documentation/devicetree/configfs-overlays.txt +++ linux-raspi-6.8.0/Documentation/devicetree/configfs-overlays.txt @@ -0,0 +1,31 @@ +Howto use the configfs overlay interface. + +A device-tree configfs entry is created in /config/device-tree/overlays +and and it is manipulated using standard file system I/O. +Note that this is a debug level interface, for use by developers and +not necessarily something accessed by normal users due to the +security implications of having direct access to the kernel's device tree. + +* To create an overlay you mkdir the directory: + + # mkdir /config/device-tree/overlays/foo + +* Either you echo the overlay firmware file to the path property file. + + # echo foo.dtbo >/config/device-tree/overlays/foo/path + +* Or you cat the contents of the overlay to the dtbo file + + # cat foo.dtbo >/config/device-tree/overlays/foo/dtbo + +The overlay file will be applied, and devices will be created/destroyed +as required. + +To remove it simply rmdir the directory. + + # rmdir /config/device-tree/overlays/foo + +The rationalle of the dual interface (firmware & direct copy) is that each is +better suited to different use patterns. The firmware interface is what's +intended to be used by hardware managers in the kernel, while the copy interface +make sense for developers (since it avoids problems with namespaces). --- linux-raspi-6.8.0.orig/Documentation/process/changes.rst +++ linux-raspi-6.8.0/Documentation/process/changes.rst @@ -31,7 +31,7 @@ ====================== =============== ======================================== GNU C 5.1 gcc --version Clang/LLVM (optional) 11.0.0 clang --version -Rust (optional) 1.74.1 rustc --version +Rust (optional) 1.75.0 rustc --version bindgen (optional) 0.65.1 bindgen --version GNU make 3.82 make --version bash 4.2 bash --version --- linux-raspi-6.8.0.orig/Documentation/sphinx/cdomain.py +++ linux-raspi-6.8.0/Documentation/sphinx/cdomain.py @@ -37,12 +37,29 @@ import sphinx from sphinx import addnodes -from sphinx.domains.c import c_funcptr_sig_re, c_sig_re from sphinx.domains.c import CObject as Base_CObject from sphinx.domains.c import CDomain as Base_CDomain from itertools import chain import re +# fixes https://github.com/sphinx-doc/sphinx/commit/0f49e30c51b5cc5055cda5b4b294c2dd9d1df573#r38750737 + +# pylint: disable=invalid-name +c_sig_re = re.compile( + r'''^([^(]*?) # return type + ([\w:.]+) \s* # thing name (colon allowed for C++) + (?: \((.*)\) )? # optionally arguments + (\s+const)? $ # const specifier + ''', re.VERBOSE) + +c_funcptr_sig_re = re.compile( + r'''^([^(]+?) # return type + (\( [^()]+ \)) \s* # name in parentheses + \( (.*) \) # arguments + (\s+const)? $ # const specifier + ''', re.VERBOSE) +# pylint: enable=invalid-name + __version__ = '1.1' # Get Sphinx version --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/drivers/index.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/drivers/index.rst @@ -32,6 +32,7 @@ cx2341x-uapi dw100 imx-uapi + bcm2835-isp max2175 npcm-video omap3isp-uapi --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/meta-formats.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/meta-formats.rst @@ -12,9 +12,11 @@ .. toctree:: :maxdepth: 1 + metafmt-bcm2835-isp-stats metafmt-d4xx metafmt-intel-ipu3 metafmt-rkisp1 + metafmt-sensor-data metafmt-uvc metafmt-vsp1-hgo metafmt-vsp1-hgt --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/pixfmt-meta-bcm2835-isp-stats.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/pixfmt-meta-bcm2835-isp-stats.rst @@ -0,0 +1,41 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _v4l2-meta-fmt-bcm2835-isp-stats: + +***************************************** +V4L2_META_FMT_BCM2835_ISP_STATS ('BSTA') +***************************************** + +BCM2835 ISP Statistics + +Description +=========== + +The BCM2835 ISP hardware calculate image statistics for an input Bayer frame. +These statistics are obtained from the "bcm2835-isp0-capture3" device node +using the :c:type:`v4l2_meta_format` interface. They are formatted as described +by the :c:type:`bcm2835_isp_stats` structure below. + +.. code-block:: c + + #define DEFAULT_AWB_REGIONS_X 16 + #define DEFAULT_AWB_REGIONS_Y 12 + + #define NUM_HISTOGRAMS 2 + #define NUM_HISTOGRAM_BINS 128 + #define AWB_REGIONS (DEFAULT_AWB_REGIONS_X * DEFAULT_AWB_REGIONS_Y) + #define FLOATING_REGIONS 16 + #define AGC_REGIONS 16 + #define FOCUS_REGIONS 12 + +.. kernel-doc:: include/uapi/linux/bcm2835-isp.h + :functions: bcm2835_isp_stats_hist bcm2835_isp_stats_region + bcm2835_isp_stats_focus bcm2835_isp_stats + --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/pixfmt-meta-sensor-data.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/pixfmt-meta-sensor-data.rst @@ -0,0 +1,32 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _v4l2-meta-fmt-sensor-data: + +*********************************** +V4L2_META_FMT_SENSOR_DATA ('SENS') +*********************************** + +Sensor Ancillary Metadata + +Description +=========== + +This format describes ancillary data generated by a camera sensor and +transmitted over a stream on the camera bus. Sensor vendors generally have their +own custom format for this ancillary data. Some vendors follow a generic +CSI-2/SMIA embedded data format as described in the `CSI-2 specification. +`_ + +The size of the embedded buffer is defined as a single line with a pixel width +width specified in bytes. This is obtained by a call to the +:c:type:`VIDIOC_SUBDEV_G_FMT` ioctl on the sensor subdevice where the ``pad`` +field in :c:type:`v4l2_subdev_format` is set to 1. Note that this size is fixed +and cannot be modified with a call to :c:type:`VIDIOC_SUBDEV_S_FMT`. + --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/pixfmt-nv12-col128.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/pixfmt-nv12-col128.rst @@ -0,0 +1,215 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _V4L2_PIX_FMT_NV12_COL128: +.. _V4L2_PIX_FMT_NV12_10_COL128: + +******************************************************************************** +V4L2_PIX_FMT_NV12_COL128, V4L2_PIX_FMT_NV12_10_COL128 +******************************************************************************** + + +V4L2_PIX_FMT_NV21_COL128 +Formats with ½ horizontal and vertical chroma resolution. This format +has two planes - one for luminance and one for chrominance. Chroma +samples are interleaved. The difference to ``V4L2_PIX_FMT_NV12`` is the +memory layout. The image is split into columns of 128 bytes wide rather than +being in raster order. + +V4L2_PIX_FMT_NV12_10_COL128 +Follows the same pattern as ``V4L2_PIX_FMT_NV21_COL128`` with 128 byte, but is +a 10bit format with 3 10-bit samples being packed into 4 bytes. Each 128 byte +wide column therefore contains 96 samples. + + +Description +=========== + +This is the two-plane versions of the YUV 4:2:0 format where data is +grouped into 128 byte wide columns. The three components are separated into +two sub-images or planes. The Y plane has one byte per pixel and pixels +are grouped into 128 byte wide columns. The CbCr plane has the same width, +in bytes, as the Y plane (and the image), but is half as tall in pixels. +The chroma plane is also in 128 byte columns, reflecting 64 Cb and 64 Cr +samples. + +The chroma samples for a column follow the luma samples. If there is any +paddding, then that will be reflected via the selection API. +The luma height must be a multiple of 2 lines. + +The normal bytesperline is effectively fixed at 128. However the format +requires knowledge of the stride between columns, therefore the bytesperline +value has been repurposed to denote the number of 128 byte long lines between +the start of each column. + +**Byte Order.** + + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 12 12 12 12 12 4 12 12 12 12 + + * - start + 0: + - Y'\ :sub:`0,0` + - Y'\ :sub:`0,1` + - Y'\ :sub:`0,2` + - Y'\ :sub:`0,3` + - ... + - Y'\ :sub:`0,124` + - Y'\ :sub:`0,125` + - Y'\ :sub:`0,126` + - Y'\ :sub:`0,127` + * - start + 128: + - Y'\ :sub:`1,0` + - Y'\ :sub:`1,1` + - Y'\ :sub:`1,2` + - Y'\ :sub:`1,3` + - ... + - Y'\ :sub:`1,124` + - Y'\ :sub:`1,125` + - Y'\ :sub:`1,126` + - Y'\ :sub:`1,127` + * - start + 256: + - Y'\ :sub:`2,0` + - Y'\ :sub:`2,1` + - Y'\ :sub:`2,2` + - Y'\ :sub:`2,3` + - ... + - Y'\ :sub:`2,124` + - Y'\ :sub:`2,125` + - Y'\ :sub:`2,126` + - Y'\ :sub:`2,127` + * - ... + - ... + - ... + - ... + - ... + - ... + - ... + - ... + * - start + ((height-1) * 128): + - Y'\ :sub:`height-1,0` + - Y'\ :sub:`height-1,1` + - Y'\ :sub:`height-1,2` + - Y'\ :sub:`height-1,3` + - ... + - Y'\ :sub:`height-1,124` + - Y'\ :sub:`height-1,125` + - Y'\ :sub:`height-1,126` + - Y'\ :sub:`height-1,127` + * - start + ((height) * 128): + - Cb\ :sub:`0,0` + - Cr\ :sub:`0,0` + - Cb\ :sub:`0,1` + - Cr\ :sub:`0,1` + - ... + - Cb\ :sub:`0,62` + - Cr\ :sub:`0,62` + - Cb\ :sub:`0,63` + - Cr\ :sub:`0,63` + * - start + ((height+1) * 128): + - Cb\ :sub:`1,0` + - Cr\ :sub:`1,0` + - Cb\ :sub:`1,1` + - Cr\ :sub:`1,1` + - ... + - Cb\ :sub:`1,62` + - Cr\ :sub:`1,62` + - Cb\ :sub:`1,63` + - Cr\ :sub:`1,63` + * - ... + - ... + - ... + - ... + - ... + - ... + - ... + - ... + * - start + ((height+(height/2)-1) * 128): + - Cb\ :sub:`(height/2)-1,0` + - Cr\ :sub:`(height/2)-1,0` + - Cb\ :sub:`(height/2)-1,1` + - Cr\ :sub:`(height/2)-1,1` + - ... + - Cb\ :sub:`(height/2)-1,62` + - Cr\ :sub:`(height/2)-1,62` + - Cb\ :sub:`(height/2)-1,63` + - Cr\ :sub:`(height/2)-1,63` + * - start + (bytesperline * 128): + - Y'\ :sub:`0,128` + - Y'\ :sub:`0,129` + - Y'\ :sub:`0,130` + - Y'\ :sub:`0,131` + - ... + - Y'\ :sub:`0,252` + - Y'\ :sub:`0,253` + - Y'\ :sub:`0,254` + - Y'\ :sub:`0,255` + * - ... + - ... + - ... + - ... + - ... + - ... + - ... + - ... + +V4L2_PIX_FMT_NV12_10_COL128 uses the same 128 byte column structure, but +encodes 10-bit YUV. +3 10-bit values are packed into 4 bytes as bits 9:0, 19:10, and 29:20, with +bits 30 & 31 unused. For the luma plane, bits 9:0 are Y0, 19:10 are Y1, and +29:20 are Y2. For the chroma plane the samples always come in pairs of Cr +and Cb, so it needs to be considered 6 values packed in 8 bytes. + +Bit-packed representation. + +.. raw:: latex + + \small + +.. tabularcolumns:: |p{1.2cm}||p{1.2cm}||p{1.2cm}||p{1.2cm}|p{3.2cm}|p{3.2cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 8 8 8 8 + + * - Y'\ :sub:`00[7:0]` + - Y'\ :sub:`01[5:0] (bits 7--2)` Y'\ :sub:`00[9:8]`\ (bits 1--0) + - Y'\ :sub:`02[3:0] (bits 7--4)` Y'\ :sub:`01[9:6]`\ (bits 3--0) + - unused (bits 7--6)` Y'\ :sub:`02[9:4]`\ (bits 5--0) + +.. raw:: latex + + \small + +.. tabularcolumns:: |p{1.2cm}||p{1.2cm}||p{1.2cm}||p{1.2cm}|p{3.2cm}|p{3.2cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 12 12 12 12 12 12 12 12 + + * - Cb\ :sub:`00[7:0]` + - Cr\ :sub:`00[5:0]`\ (bits 7--2) Cb\ :sub:`00[9:8]`\ (bits 1--0) + - Cb\ :sub:`01[3:0]`\ (bits 7--4) Cr\ :sub:`00[9:6]`\ (bits 3--0) + - unused (bits 7--6) Cb\ :sub:`02[9:4]`\ (bits 5--0) + - Cr\ :sub:`01[7:0]` + - Cb\ :sub:`02[5:0]`\ (bits 7--2) Cr\ :sub:`01[9:8]`\ (bits 1--0) + - Cr\ :sub:`02[3:0]`\ (bits 7--4) Cb\ :sub:`02[9:6]`\ (bits 3--0) + - unused (bits 7--6) Cr\ :sub:`02[9:4]`\ (bits 5--0) + +.. raw:: latex + + \normalsize + + + + --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/pixfmt-y12p.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/pixfmt-y12p.rst @@ -0,0 +1,45 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _V4L2-PIX-FMT-Y12P: + +****************************** +V4L2_PIX_FMT_Y12P ('Y12P') +****************************** + +Grey-scale image as a MIPI RAW12 packed array + + +Description +=========== + +This is a packed grey-scale image format with a depth of 12 bits per +pixel. Two consecutive pixels are packed into 3 bytes. The first 2 bytes +contain the 8 high order bits of the pixels, and the 3rd byte contains the 4 +least significants bits of each pixel, in the same order. + +**Byte Order.** +Each cell is one byte. + +.. tabularcolumns:: |p{2.2cm}|p{1.2cm}|p{1.2cm}|p{3.1cm}| + + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 2 1 1 1 + + + - - start + 0: + - Y'\ :sub:`00high` + - Y'\ :sub:`01high` + - Y'\ :sub:`01low`\ (bits 7--4) + + Y'\ :sub:`00low`\ (bits 3--0) + --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/pixfmt-y14p.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/pixfmt-y14p.rst @@ -0,0 +1,54 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/media/uapi/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _V4L2-PIX-FMT-Y14P: + +************************** +V4L2_PIX_FMT_Y14P ('Y14P') +************************** + +Grey-scale image as a MIPI RAW14 packed array + + +Description +=========== + +This is a packed grey-scale image format with a depth of 14 bits per +pixel. Every four consecutive samples are packed into seven bytes. Each +of the first four bytes contain the eight high order bits of the pixels, +and the three following bytes contains the six least significants bits of +each pixel, in the same order. + +**Byte Order.** +Each cell is one byte. + +.. tabularcolumns:: |p{1.8cm}|p{1.0cm}|p{1.0cm}|p{1.0cm}|p{1.1cm}|p{3.3cm}|p{3.3cm}|p{3.3cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 2 1 1 1 1 3 3 3 + + + - - start + 0: + - Y'\ :sub:`00high` + - Y'\ :sub:`01high` + - Y'\ :sub:`02high` + - Y'\ :sub:`03high` + - Y'\ :sub:`01low bits 1--0`\ (bits 7--6) + + Y'\ :sub:`00low bits 5--0`\ (bits 5--0) + + - Y'\ :sub:`02low bits 3--0`\ (bits 7--4) + + Y'\ :sub:`01low bits 5--2`\ (bits 3--0) + + - Y'\ :sub:`03low bits 5--0`\ (bits 7--2) + + Y'\ :sub:`02low bits 5--4`\ (bits 1--0) --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst @@ -697,6 +697,18 @@ - Cr\ :sub:`11` +V4L2_PIX_FMT_NV12_COL128 +------------------------ + +``V4L2_PIX_FMT_NV12_COL128`` is the tiled version of +``V4L2_PIX_FMT_NV12`` with the image broken down into 128 pixel wide columns of +Y followed by the associated combined CbCr plane. +The normal bytesperline is effectively fixed at 128. However the format +requires knowledge of the stride between columns, therefore the bytesperline +value has been repurposed to denote the number of 128 byte long lines between +the start of each column. + + Fully Planar YUV Formats ======================== --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/subdev-formats.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/subdev-formats.rst @@ -624,6 +624,43 @@ - b\ :sub:`2` - b\ :sub:`1` - b\ :sub:`0` + * .. _MEDIA_BUS_FMT_RGB565_1X24_CPADHI: + + - MEDIA_BUS_FMT_RGB565_1X24_CPADHI + - 0x1022 + - + - + - + - + - + - + - + - + - + - 0 + - 0 + - 0 + - r\ :sub:`4` + - r\ :sub:`3` + - r\ :sub:`2` + - r\ :sub:`1` + - r\ :sub:`0` + - 0 + - 0 + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` + - 0 + - 0 + - 0 + - b\ :sub:`4` + - b\ :sub:`3` + - b\ :sub:`2` + - b\ :sub:`1` + - b\ :sub:`0` * .. _MEDIA-BUS-FMT-BGR565-2X8-BE: - MEDIA_BUS_FMT_BGR565_2X8_BE @@ -912,6 +949,43 @@ - g\ :sub:`5` - g\ :sub:`4` - g\ :sub:`3` + * .. _MEDIA-BUS-FMT-BGR666-1X18: + + - MEDIA_BUS_FMT-BGR666_1X18 + - 0x1023 + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - b\ :sub:`5` + - b\ :sub:`4` + - b\ :sub:`3` + - b\ :sub:`2` + - b\ :sub:`1` + - b\ :sub:`0` + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` + - r\ :sub:`5` + - r\ :sub:`4` + - r\ :sub:`3` + - r\ :sub:`2` + - r\ :sub:`1` + - r\ :sub:`0` * .. _MEDIA-BUS-FMT-RGB666-1X18: - MEDIA_BUS_FMT_RGB666_1X18 @@ -1095,6 +1169,43 @@ - g\ :sub:`2` - g\ :sub:`1` - g\ :sub:`0` + * .. _MEDIA-BUS-FMT-BGR666-1X24_CPADHI: + + - MEDIA_BUS_FMT_BGR666_1X24_CPADHI + - 0x1024 + - + - + - + - + - + - + - + - + - + - 0 + - 0 + - b\ :sub:`5` + - b\ :sub:`4` + - b\ :sub:`3` + - b\ :sub:`2` + - b\ :sub:`1` + - b\ :sub:`0` + - 0 + - 0 + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` + - 0 + - 0 + - r\ :sub:`5` + - r\ :sub:`4` + - r\ :sub:`3` + - r\ :sub:`2` + - r\ :sub:`1` + - r\ :sub:`0` * .. _MEDIA-BUS-FMT-RGB666-1X24_CPADHI: - MEDIA_BUS_FMT_RGB666_1X24_CPADHI @@ -8306,3 +8417,35 @@ both sides of the link and the bus format is a fixed metadata format that is not configurable from userspace. Width and height will be set to 0 for this format. + + +.. _v4l2-mbus-sensor-data: + +Sensor Ancillary Metadata Formats +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +This section lists ancillary data generated by a camera sensor and +transmitted over a stream on the camera bus. + +The following table lists the existing sensor ancillary metadata formats: + + +.. _v4l2-mbus-pixelcode-sensor-metadata: + +.. tabularcolumns:: |p{8.0cm}|p{1.4cm}|p{7.7cm}| + +.. flat-table:: Sensor ancillary metadata formats + :header-rows: 1 + :stub-columns: 0 + + * - Identifier + - Code + - Comments + * .. _MEDIA_BUS_FMT_SENSOR_DATA: + + - MEDIA_BUS_FMT_SENSOR_DATA + - 0x7001 + - Sensor vendor specific ancillary metadata. Some vendors follow a generic + CSI-2/SMIA embedded data format as described in the `CSI-2 specification. + `_ + --- linux-raspi-6.8.0.orig/Documentation/userspace-api/media/v4l/yuv-formats.rst +++ linux-raspi-6.8.0/Documentation/userspace-api/media/v4l/yuv-formats.rst @@ -267,7 +267,28 @@ pixfmt-packed-yuv pixfmt-yuv-planar pixfmt-yuv-luma + pixfmt-y12p + pixfmt-y14p pixfmt-y8i pixfmt-y12i pixfmt-uv8 + pixfmt-yuyv + pixfmt-uyvy + pixfmt-yvyu + pixfmt-vyuy + pixfmt-y41p + pixfmt-yuv420 + pixfmt-yuv420m + pixfmt-yuv422m + pixfmt-yuv444m + pixfmt-yuv410 + pixfmt-yuv422p + pixfmt-yuv411p + pixfmt-nv12 + pixfmt-nv12m + pixfmt-nv12mt + pixfmt-nv12-col128 + pixfmt-nv16 + pixfmt-nv16m + pixfmt-nv24 pixfmt-m420 --- linux-raspi-6.8.0.orig/Kbuild +++ linux-raspi-6.8.0/Kbuild @@ -97,3 +97,4 @@ obj-$(CONFIG_NET) += net/ obj-y += virt/ obj-y += $(ARCH_DRIVERS) +obj-y += ubuntu/ --- linux-raspi-6.8.0.orig/Kconfig +++ linux-raspi-6.8.0/Kconfig @@ -19,6 +19,8 @@ source "drivers/Kconfig" +source "ubuntu/Kconfig" + source "fs/Kconfig" source "security/Kconfig" --- linux-raspi-6.8.0.orig/MAINTAINERS +++ linux-raspi-6.8.0/MAINTAINERS @@ -190,6 +190,18 @@ F: Documentation/devicetree/bindings/power/supply/*ab8500* F: drivers/power/supply/*ab8500* +AAEON DEVICE DRIVER WITH WMI INTERFACE +M: Edward Lin +M: Kunyang Fan +M: Frank Hsieh +M: Jacob Wu +S: Supported +F: drivers/gpio/gpio-aaeon.c +F: drivers/hwmon/hwmon-aaeon.c +F: drivers/leds/leds-aaeon.c +F: drivers/mfd/mfd-aaeon.c +F: drivers/watchdog/wdt_aaeon.c + ABI/API L: linux-api@vger.kernel.org F: include/linux/syscalls.h @@ -1585,6 +1597,22 @@ F: drivers/net/arcnet/ F: include/uapi/linux/if_arcnet.h +ARDUCAM 64MP SENSOR DRIVER +M: Arducam Kernel Maintenance +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/arducam,64mp.yaml +F: drivers/media/i2c/arducam_64mp.c + +ARDUCAM PIVARIETY SENSOR DRIVER +M: Arducam Kernel Maintenance +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/arducam-pivariety.yaml +F: drivers/media/i2c/arducam-pivariety.c + ARM AND ARM64 SoC SUB-ARCHITECTURES (COMMON PARTS) M: Arnd Bergmann M: Olof Johansson @@ -3998,6 +4026,29 @@ N: bcm216* N: kona +BROADCOM BCM2711 HEVC DECODER +M: Raspberry Pi Kernel Maintenance +L: linux-media@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/media/rpivid_hevc.jaml +F: drivers/staging/media/rpivid + +BROADCOM BCM2835 CAMERA DRIVER +M: Raspberry Pi Kernel Maintenance +L: linux-media@vger.kernel.org +S: Maintained +F: drivers/media/platform/bcm2835/ +F: Documentation/devicetree/bindings/media/brcm,bcm2835-unicam.yaml + +BROADCOM BCM2835 ISP DRIVER +M: Raspberry Pi Kernel Maintenance +L: linux-media@vger.kernel.org +S: Maintained +F: Documentation/media/uapi/v4l/pixfmt-meta-bcm2835-isp-stats.rst +F: Documentation/media/v4l-drivers/bcm2835-isp.rst +F: drivers/staging/vc04_services/bcm2835-isp +F: include/uapi/linux/bcm2835-isp.h + BROADCOM BCM47XX MIPS ARCHITECTURE M: Hauke Mehrtens M: Rafał Miłecki @@ -18985,6 +19036,13 @@ F: drivers/iio/light/rohm-bu27008.c F: drivers/iio/light/rohm-bu27034.c +ROHM BU64754 MOTOR DRIVER FOR CAMERA AUTOFOCUS +M: Kieran Bingham +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/rohm,bu64754.yaml + ROHM MULTIFUNCTION BD9571MWV-M PMIC DEVICE DRIVERS M: Marek Vasut L: linux-kernel@vger.kernel.org @@ -20358,7 +20416,7 @@ L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git -F: Documentation/devicetree/bindings/media/i2c/imx258.yaml +F: Documentation/devicetree/bindings/media/i2c/sony,imx258.yaml F: drivers/media/i2c/imx258.c SONY IMX274 SENSOR DRIVER @@ -20429,6 +20487,31 @@ F: Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml F: drivers/media/i2c/imx415.c +SONY IMX477 SENSOR DRIVER +M: Raspberry Pi Kernel Maintenance +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/imx378.yaml +F: Documentation/devicetree/bindings/media/i2c/imx477.yaml +F: drivers/media/i2c/imx477.c + +SONY IMX519 SENSOR DRIVER +M: Arducam Kernel Maintenance +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/imx519.yaml +F: drivers/media/i2c/imx519.c + +SONY IMX708 SENSOR DRIVER +M: Raspberry Pi Kernel Maintenance +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/sony,imx708.yaml +F: drivers/media/i2c/imx708.c + SONY MEMORYSTICK SUBSYSTEM M: Maxim Levitsky M: Alex Dubov --- linux-raspi-6.8.0.orig/Makefile +++ linux-raspi-6.8.0/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 6 PATCHLEVEL = 8 -SUBLEVEL = 0 +SUBLEVEL = 1 EXTRAVERSION = NAME = Hurr durr I'ma ninja sloth @@ -549,6 +549,9 @@ -I$(objtree)/include \ $(USERINCLUDE) +# UBUNTU: Include our third party driver stuff too +LINUXINCLUDE += -I$(srctree)/ubuntu/include + KBUILD_AFLAGS := -D__ASSEMBLY__ -fno-PIE KBUILD_CFLAGS := @@ -1278,8 +1281,9 @@ quiet_cmd_headers_install = INSTALL $(INSTALL_HDR_PATH)/include cmd_headers_install = \ mkdir -p $(INSTALL_HDR_PATH); \ - rsync -mrl --include='*/' --include='*\.h' --exclude='*' \ - usr/include $(INSTALL_HDR_PATH) + find usr/include -type f -name '*.h' -print0 | \ + tar -czf - --null --no-recursion --no-wildcards-match-slash -T- | \ + tar -xzf - --strip-components=1 -C $(INSTALL_HDR_PATH) PHONY += headers_install headers_install: headers @@ -1294,6 +1298,7 @@ $(if $(filter um, $(SRCARCH)), $(error Headers not exportable for UML)) $(Q)$(MAKE) $(hdr-inst)=include/uapi $(Q)$(MAKE) $(hdr-inst)=arch/$(SRCARCH)/include/uapi + $(Q)$(MAKE) $(hdr-inst)=ubuntu/include dst=include oldheaders= ifdef CONFIG_HEADERS_INSTALL prepare: headers @@ -1485,7 +1490,7 @@ # Directories & files removed with 'make mrproper' MRPROPER_FILES += include/config include/generated \ arch/$(SRCARCH)/include/generated .objdiff \ - debian snap tar-install \ + snap tar-install \ .config .config.old .version \ Module.symvers \ certs/signing_key.pem \ --- linux-raspi-6.8.0.orig/Ubuntu.md +++ linux-raspi-6.8.0/Ubuntu.md @@ -0,0 +1,8 @@ +Name: linux-raspi +Version: 6.7.0 +Series: 24.04 (noble) +Description: + This is the source code for the Ubuntu linux kernel for the 24.04 series. This + source tree is used to produce the flavours: raspi. + This kernel is configured to support the widest range of desktop, laptop and + server configurations. --- linux-raspi-6.8.0.orig/arch/arm/Makefile +++ linux-raspi-6.8.0/arch/arm/Makefile @@ -59,6 +59,9 @@ # KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra) +# Need -msoft-float for gcc 11 for the below instruction set selection +KBUILD_CFLAGS += -msoft-float + # This selects which instruction set is used. arch-$(CONFIG_CPU_32v7M) :=-march=armv7-m arch-$(CONFIG_CPU_32v7) :=-march=armv7-a @@ -141,7 +144,7 @@ # Need -Uarm for gcc < 3.x KBUILD_CPPFLAGS +=$(cpp-y) -KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm +KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -Uarm KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) -Wa,$(arch-y) $(tune-y) -include asm/unified.h -msoft-float CHECKFLAGS += -D__arm__ --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/Makefile +++ linux-raspi-6.8.0/arch/arm/boot/dts/Makefile @@ -39,3 +39,8 @@ subdir-y += vt8500 subdir-y += xen subdir-y += xilinx + +targets += dtbs dtbs_install +targets += $(dtb-y) + +subdir-y += overlays --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/Makefile +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/Makefile @@ -1,40 +1,33 @@ # SPDX-License-Identifier: GPL-2.0 # Enables support for device-tree overlays -DTC_FLAGS_bcm2835-rpi-b := -@ -DTC_FLAGS_bcm2835-rpi-a := -@ -DTC_FLAGS_bcm2835-rpi-b-rev2 := -@ -DTC_FLAGS_bcm2835-rpi-b-plus := -@ -DTC_FLAGS_bcm2835-rpi-a-plus := -@ -DTC_FLAGS_bcm2835-rpi-cm1-io1 := -@ -DTC_FLAGS_bcm2836-rpi-2-b := -@ -DTC_FLAGS_bcm2837-rpi-3-a-plus := -@ -DTC_FLAGS_bcm2837-rpi-3-b := -@ -DTC_FLAGS_bcm2837-rpi-3-b-plus := -@ -DTC_FLAGS_bcm2837-rpi-cm3-io3 := -@ -DTC_FLAGS_bcm2837-rpi-zero-2-w := -@ DTC_FLAGS_bcm2711-rpi-400 := -@ DTC_FLAGS_bcm2711-rpi-4-b := -@ -DTC_FLAGS_bcm2711-rpi-cm4-io := -@ -DTC_FLAGS_bcm2835-rpi-zero := -@ -DTC_FLAGS_bcm2835-rpi-zero-w := -@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2835-rpi-b.dtb \ - bcm2835-rpi-a.dtb \ - bcm2835-rpi-b-rev2.dtb \ - bcm2835-rpi-b-plus.dtb \ - bcm2835-rpi-a-plus.dtb \ - bcm2835-rpi-cm1-io1.dtb \ - bcm2836-rpi-2-b.dtb \ - bcm2837-rpi-3-a-plus.dtb \ - bcm2837-rpi-3-b.dtb \ - bcm2837-rpi-3-b-plus.dtb \ - bcm2837-rpi-cm3-io3.dtb \ - bcm2837-rpi-zero-2-w.dtb \ bcm2711-rpi-400.dtb \ - bcm2711-rpi-4-b.dtb \ - bcm2711-rpi-cm4-io.dtb \ - bcm2835-rpi-zero.dtb \ - bcm2835-rpi-zero-w.dtb + bcm2711-rpi-4-b.dtb + +DTC_FLAGS_bcm2710-rpi-zero-2 := -@ +DTC_FLAGS_bcm2710-rpi-zero-2-w := -@ +DTC_FLAGS_bcm2709-rpi-2-b := -@ +DTC_FLAGS_bcm2710-rpi-2-b := -@ +DTC_FLAGS_bcm2710-rpi-3-b := -@ +DTC_FLAGS_bcm2710-rpi-3-b-plus := -@ +DTC_FLAGS_bcm2709-rpi-cm2 := -@ +DTC_FLAGS_bcm2710-rpi-cm3 := -@ +DTC_FLAGS_bcm2711-rpi-cm4 := -@ +DTC_FLAGS_bcm2711-rpi-cm4s := -@ +dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2710-rpi-zero-2.dtb \ + bcm2710-rpi-zero-2-w.dtb \ + bcm2709-rpi-2-b.dtb \ + bcm2710-rpi-2-b.dtb \ + bcm2710-rpi-3-b.dtb \ + bcm2710-rpi-3-b-plus.dtb \ + bcm2709-rpi-cm2.dtb \ + bcm2710-rpi-cm3.dtb \ + bcm2711-rpi-cm4.dtb \ + bcm2711-rpi-cm4s.dtb + dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ bcm963138.dtb \ --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts @@ -0,0 +1,210 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; + model = "Raspberry Pi Model B+"; +}; + +&gpio { + /* + * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf + * RPI-BPLUS sheet 1 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "LAN_RUN", /* GPIO31 */ + "CAM_GPIO1", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "USB_LIMIT", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", /* GPIO40 */ + "CAM_GPIO0", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "ETH_CLK", /* GPIO44 */ + "PWM1_OUT", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "input"; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c1 { +}; + +i2c_vc: &i2c0 { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts @@ -0,0 +1,223 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-smsc9512.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-b", "brcm,bcm2835"; + model = "Raspberry Pi Model B"; +}; + +&gpio { + /* + * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf + * RPI00021 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_GPIO1", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "CAM_GPIO0", + /* Binary number representing build/revision */ + "CONFIG0", + "CONFIG1", + "CONFIG2", + "CONFIG3", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <28 29 30 31>; + brcm,function = <6>; /* alt2 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +/delete-node/ &i2c0mux; + +i2c0: &i2c0if { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + clock-frequency = <100000>; +}; + +i2c_csi_dsi: &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +/ { + aliases { + i2c0 = &i2c0; + }; + + /* Provide an i2c0mux label to avoid undefined symbols in overlays */ + i2c0mux: i2c0mux { + }; + + __overrides__ { + i2c0 = <&i2c0>, "status"; + }; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 27 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c0 { +}; + +i2c_vc: &i2c1 { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + i2c = <&i2c0>,"status"; + i2c_arm = <&i2c0>,"status"; + i2c_vc = <&i2c1>,"status"; + i2c_baudrate = <&i2c0>,"clock-frequency:0"; + i2c_arm_baudrate = <&i2c0>,"clock-frequency:0"; + i2c_vc_baudrate = <&i2c1>,"clock-frequency:0"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts @@ -0,0 +1,198 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-smsc9512.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-b", "brcm,bcm2835"; + model = "Raspberry Pi Model B"; +}; + +&gpio { + /* + * Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf + * RPI00022 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_GPIO1", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "CAM_GPIO0", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <28 29 30 31>; + brcm,function = <6>; /* alt2 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c1 { +}; + +i2c_vc: &i2c0 { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi-bt.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0 + +&uart0 { + bt: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + fallback-bd-address; // Don't override a valid address + status = "okay"; + }; +}; + +&uart1 { + minibt: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <230400>; + shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + fallback-bd-address; // Don't override a valid address + status = "disabled"; + }; +}; + +/ { + aliases { + bluetooth = &bt; + }; + + __overrides__ { + bdaddr = <&bt>,"local-bd-address[", + <&bt>,"fallback-bd-address?=0", + <&minibt>,"local-bd-address[", + <&minibt>,"fallback-bd-address?=0"; + krnbt = <&bt>,"status"; + krnbt_baudrate = <&bt>,"max-speed:0", <&minibt>,"max-speed:0"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts @@ -0,0 +1,174 @@ +/dts-v1/; + +#include "bcm2708-rpi-cm.dtsi" +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" + +/ { + compatible = "raspberrypi,compute-module", "brcm,bcm2835"; + model = "Raspberry Pi Compute Module"; +}; + +&cam1_reg { + gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +cam0_reg: &cam0_regulator { + gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +&uart0 { + status = "okay"; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "GPIO0", + "GPIO1", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "GPIO32", + "GPIO33", + "GPIO34", + "GPIO35", + "GPIO36", + "GPIO37", + "GPIO38", + "GPIO39", + "GPIO40", + "GPIO41", + "GPIO42", + "GPIO43", + "GPIO44", + "GPIO45", + "HDMI_HPD_N", + /* Also used as ACT LED */ + "EMMC_EN_N", + /* Used by eMMC */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins; + brcm,function; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi @@ -0,0 +1,27 @@ +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +i2c_arm: &i2c1 { +}; + +i2c_vc: &i2c0 { +}; + +/ { + __overrides__ { + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + cam0_reg = <&cam0_reg>,"status"; + cam0_reg_gpio = <&cam0_reg>,"gpio:4"; + cam1_reg = <&cam1_reg>,"status"; + cam1_reg_gpio = <&cam1_reg>,"gpio:4"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts @@ -0,0 +1,254 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm2708-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; + model = "Raspberry Pi Zero W"; + + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; + }; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + "CAM_GPIO1", /* GPIO40 */ + "WL_ON", /* GPIO41 */ + "NC", /* GPIO42 */ + "WIFI_CLK", /* GPIO43 */ + "CAM_GPIO0", /* GPIO44 */ + "BT_ON", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED_N", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; /* ALT3 = SD1 */ + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; /* none */ + }; + + uart0_pins: uart0_pins { + brcm,pins = <30 31 32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <2 0 0 2>; /* up none none up */ + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; + + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "actpwr"; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 44 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c1 {}; +i2c_vc: &i2c0 {}; +i2c_csi_dsi0: &i2c0 {}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts @@ -0,0 +1,189 @@ +/dts-v1/; + +#include "bcm2708.dtsi" +#include "bcm2708-rpi.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-zero", "brcm,bcm2835"; + model = "Raspberry Pi Zero"; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "NC", /* GPIO31 */ + "CAM_GPIO1", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "NC", /* GPIO40 */ + "CAM_GPIO0", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "NC", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED_N", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "actpwr"; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_arm: &i2c1 {}; +i2c_vc: &i2c0 {}; +i2c_csi_dsi0: &i2c0 {}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708-rpi.dtsi @@ -0,0 +1,40 @@ +/* Downstream modifications common to bcm2835, bcm2836, bcm2837 */ + +#define i2c0 i2c0mux +#include "bcm2835-rpi.dtsi" +#undef i2c0 +#include "bcm270x-rpi.dtsi" + +/ { + memory@0 { + device_type = "memory"; + reg = <0x0 0x0>; + }; + + aliases { + i2c2 = &i2c2; + }; + + __overrides__ { + hdmi = <&hdmi>,"status"; + i2c2_iknowwhatimdoing = <&i2c2>,"status"; + i2c2_baudrate = <&i2c2>,"clock-frequency:0"; + sd = <&sdhost>,"status"; + sd_poll_once = <&sdhost>,"non-removable?"; + }; +}; + +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + status = "okay"; +}; + +&hdmi { + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "disabled"; +}; + +&i2c2 { + status = "disabled"; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2708.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2708.dtsi @@ -0,0 +1,19 @@ +#define i2c0 i2c0if +#include "bcm2835.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" + +/ { + __overrides__ { + arm_freq; + }; +}; + +&soc { + dma-ranges = <0x80000000 0x00000000 0x20000000>, + <0x7e000000 0x20000000 0x02000000>; +}; + +&vc4 { + status = "disabled"; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts @@ -0,0 +1,204 @@ +/dts-v1/; + +#include "bcm2709.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; + model = "Raspberry Pi 2 Model B"; +}; + +&gpio { + /* + * Taken from rpi_SCH_2b_1p2_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "LAN_RUN", + "CAM_GPIO1", + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "USB_LIMIT", + "NC", /* GPIO39 */ + "PWM0_OUT", + "CAM_GPIO0", + "SMPS_SCL", + "SMPS_SDA", + "ETH_CLK", + "PWM1_OUT", + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "input"; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts @@ -0,0 +1,223 @@ +/dts-v1/; + +#include "bcm2709.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,2-compute-module", "brcm,bcm2836"; + model = "Raspberry Pi Compute Module 2"; +}; + +&cam1_reg { + gpio = <&gpio 2 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +cam0_reg: &cam0_regulator { + gpio = <&gpio 30 GPIO_ACTIVE_HIGH>; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +&uart0 { + status = "okay"; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "GPIO0", + "GPIO1", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "GPIO32", + "GPIO33", + "GPIO34", + "GPIO35", + "GPIO36", + "GPIO37", + "GPIO38", + "GPIO39", + "GPIO40", + "GPIO41", + "GPIO42", + "GPIO43", + "GPIO44", + "GPIO45", + "SMPS_SCL", + "SMPS_SDA", + /* Used by eMMC */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins; + brcm,function; + }; +}; + +&soc { + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; + gpio-controller; + #gpio-cells = <2>; + firmware = <&firmware>; + status = "okay"; + }; + +}; + +&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "HDMI_HPD_N", + "EMMC_EN_N", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC"; + status = "okay"; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&hdmi { + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + cam0_reg = <&cam0_reg>,"status"; + cam0_reg_gpio = <&cam0_reg>,"gpio:4"; + cam1_reg = <&cam1_reg>,"status"; + cam1_reg_gpio = <&cam1_reg>,"gpio:4"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2709-rpi.dtsi @@ -0,0 +1,8 @@ +#include "bcm2708-rpi.dtsi" + +&vchiq { + compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq"; +}; + +i2c_arm: &i2c1 {}; +i2c_vc: &i2c0 {}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2709.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2709.dtsi @@ -0,0 +1,29 @@ +#define i2c0 i2c0if +#include "bcm2836.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" + +/ { + soc { + ranges = <0x7e000000 0x3f000000 0x01000000>, + <0x40000000 0x40000000 0x00040000>; + + dma-ranges = <0xc0000000 0x00000000 0x3f000000>, + <0x7e000000 0x3f000000 0x01000000>; + }; + + __overrides__ { + arm_freq = <&v7_cpu0>, "clock-frequency:0", + <&v7_cpu1>, "clock-frequency:0", + <&v7_cpu2>, "clock-frequency:0", + <&v7_cpu3>, "clock-frequency:0"; + }; +}; + +&system_timer { + status = "disabled"; +}; + +&vc4 { + status = "disabled"; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi @@ -0,0 +1,188 @@ +/* Downstream modifications to bcm2835-rpi.dtsi */ + +/ { + aliases: aliases { + aux = &aux; + sound = &sound; + soc = &soc; + dma = &dma; + intc = &intc; + watchdog = &watchdog; + random = &random; + mailbox = &mailbox; + gpio = &gpio; + uart0 = &uart0; + uart1 = &uart1; + sdhost = &sdhost; + mmc = &mmc; + mmc1 = &mmc; + mmc0 = &sdhost; + i2s = &i2s; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c10 = &i2c_csi_dsi; + i2c = &i2c_arm; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + usb = &usb; + leds = &leds; + fb = &fb; + thermal = &thermal; + axiperf = &axiperf; + }; + + /* Define these notional regulators for use by overlays */ + vdd_3v3_reg: fixedregulator_3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3"; + }; + + vdd_5v0_reg: fixedregulator_5v0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "5v0"; + }; + + soc { + gpiomem { + compatible = "brcm,bcm2835-gpiomem"; + reg = <0x7e200000 0x1000>; + }; + + fb: fb { + compatible = "brcm,bcm2708-fb"; + firmware = <&firmware>; + status = "okay"; + }; + + /* External sound card */ + sound: sound { + status = "disabled"; + }; + }; + + __overrides__ { + cache_line_size; + + uart0 = <&uart0>,"status"; + uart1 = <&uart1>,"status"; + i2s = <&i2s>,"status"; + spi = <&spi0>,"status"; + i2c0 = <&i2c0if>,"status",<&i2c0mux>,"status"; + i2c1 = <&i2c1>,"status"; + i2c = <&i2c1>,"status"; + i2c_arm = <&i2c1>,"status"; + i2c_vc = <&i2c0if>,"status",<&i2c0mux>,"status"; + i2c0_baudrate = <&i2c0if>,"clock-frequency:0"; + i2c1_baudrate = <&i2c1>,"clock-frequency:0"; + i2c_baudrate = <&i2c1>,"clock-frequency:0"; + i2c_arm_baudrate = <&i2c1>,"clock-frequency:0"; + i2c_vc_baudrate = <&i2c0if>,"clock-frequency:0"; + + watchdog = <&watchdog>,"status"; + random = <&random>,"status"; + sd_overclock = <&sdhost>,"brcm,overclock-50:0"; + sd_force_pio = <&sdhost>,"brcm,force-pio?"; + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; + sd_debug = <&sdhost>,"brcm,debug"; + sdio_overclock = <&mmc>,"brcm,overclock-50:0", + <&mmcnr>,"brcm,overclock-50:0"; + axiperf = <&axiperf>,"status"; + drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4; + drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4; + drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4; + + dwc2_dr_mode = <&usb>,"dr_mode"; + }; +}; + +&uart0 { + skip-init; +}; + +&uart1 { + skip-init; +}; + +&txp { + status = "disabled"; +}; + +&i2c0if { + status = "disabled"; +}; + +&i2c0mux { + pinctrl-names = "i2c0", "i2c_csi_dsi"; + /delete-property/ clock-frequency; + status = "disabled"; +}; + +&i2c1 { + status = "disabled"; +}; + +i2s_clk_producer: &i2s {}; +i2s_clk_consumer: &i2s {}; + +&clocks { + firmware = <&firmware>; +}; + +&sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio48>; + bus-width = <4>; +}; + +&cpu_thermal { + // Add some labels + thermal_trips: trips { + cpu-crit { + // Raise upstream limit of 90C + temperature = <110000>; + }; + }; + cooling_maps: cooling-maps { + }; +}; + +&vec { + clocks = <&firmware_clocks 15>; + status = "disabled"; +}; + +&firmware { +#ifndef BCM2711 + firmware_clocks: clocks { + compatible = "raspberrypi,firmware-clocks"; + #clock-cells = <1>; + }; +#endif + + vcio: vcio { + compatible = "raspberrypi,vcio"; + }; +}; + +&vc4 { + raspberrypi,firmware = <&firmware>; +}; + +#ifndef BCM2711 + +&hdmi { + reg-names = "hdmi", + "hd"; + clocks = <&firmware_clocks 9>, + <&firmware_clocks 13>; + dmas = <&dma (17|(1<<27)|(1<<24))>; +}; + +#endif --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm270x.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm270x.dtsi @@ -0,0 +1,294 @@ +/* Downstream bcm283x.dtsi diff */ +#include + +/ { + chosen: chosen { + // Disable audio by default + bootargs = "coherent_pool=1M snd_bcm2835.enable_headphones=0"; + stdout-path = "serial0:115200n8"; + }; + + soc: soc { + watchdog: watchdog@7e100000 { + /* Add label */ + }; + + random: rng@7e104000 { + /* Add label */ + }; + + spi0: spi@7e204000 { + /* Add label */ + }; + +#ifndef BCM2711 + pixelvalve0: pixelvalve@7e206000 { + /* Add label */ + status = "disabled"; + }; + + pixelvalve1: pixelvalve@7e207000 { + /* Add label */ + status = "disabled"; + }; +#endif + + /delete-node/ mmc@7e300000; + + sdhci: mmc: mmc@7e300000 { + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; + reg = <0x7e300000 0x100>; + interrupts = <2 30>; + clocks = <&clocks BCM2835_CLOCK_EMMC>; + dmas = <&dma 11>; + dma-names = "rx-tx"; + brcm,overclock-50 = <0>; + status = "disabled"; + }; + + /* A clone of mmc but with non-removable set */ + mmcnr: mmcnr@7e300000 { + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; + reg = <0x7e300000 0x100>; + interrupts = <2 30>; + clocks = <&clocks BCM2835_CLOCK_EMMC>; + dmas = <&dma 11>; + dma-names = "rx-tx"; + brcm,overclock-50 = <0>; + non-removable; + status = "disabled"; + }; + + hvs: hvs@7e400000 { + /* Add label */ + status = "disabled"; + }; + + firmwarekms: firmwarekms@7e600000 { + compatible = "raspberrypi,rpi-firmware-kms"; + /* SMI interrupt reg */ + reg = <0x7e600000 0x100>; + interrupts = <2 16>; + brcm,firmware = <&firmware>; + status = "disabled"; + }; + + smi: smi@7e600000 { + compatible = "brcm,bcm2835-smi"; + reg = <0x7e600000 0x100>; + interrupts = <2 16>; + clocks = <&clocks BCM2835_CLOCK_SMI>; + assigned-clocks = <&clocks BCM2835_CLOCK_SMI>; + assigned-clock-rates = <125000000>; + dmas = <&dma 4>; + dma-names = "rx-tx"; + status = "disabled"; + }; + + csi0: csi@7e800000 { + compatible = "brcm,bcm2835-unicam"; + reg = <0x7e800000 0x800>, + <0x7e802000 0x4>; + interrupts = <2 6>; + clocks = <&clocks BCM2835_CLOCK_CAM0>, + <&firmware_clocks 4>; + clock-names = "lp", "vpu"; + power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + status = "disabled"; + }; + + csi1: csi@7e801000 { + compatible = "brcm,bcm2835-unicam"; + reg = <0x7e801000 0x800>, + <0x7e802004 0x4>; + interrupts = <2 7>; + clocks = <&clocks BCM2835_CLOCK_CAM1>, + <&firmware_clocks 4>; + clock-names = "lp", "vpu"; + power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + status = "disabled"; + }; + +#ifndef BCM2711 + pixelvalve2: pixelvalve@7e807000 { + /* Add label */ + status = "disabled"; + }; +#endif + + hdmi@7e902000 { /* hdmi */ + status = "disabled"; + }; + + usb@7e980000 { /* usb */ + compatible = "brcm,bcm2835-usb"; + reg = <0x7e980000 0x10000>; + interrupts = <1 9>; + dr_mode = "otg"; + g-np-tx-fifo-size = <32>; + g-rx-fifo-size = <558>; + g-tx-fifo-size = <512 512 512 512 512 256 256>; + }; + +#ifndef BCM2711 + v3d@7ec00000 { /* vd3 */ + compatible = "brcm,vc4-v3d"; + power-domains = <&power RPI_POWER_DOMAIN_V3D>; + status = "disabled"; + }; +#endif + + axiperf: axiperf { + compatible = "brcm,bcm2835-axiperf"; + reg = <0x7e009800 0x100>, + <0x7ee08000 0x100>; + firmware = <&firmware>; + status = "disabled"; + }; + + i2c0mux: i2c0mux { + compatible = "i2c-mux-pinctrl"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&i2c0if>; + + status = "disabled"; + + i2c0: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c_csi_dsi: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + + cam1_reg: cam1_regulator { + compatible = "regulator-fixed"; + regulator-name = "cam1-reg"; + enable-active-high; + /* Needs to be enabled, as removing a regulator is very unsafe */ + status = "okay"; + }; + + cam1_clk: cam1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_regulator: cam0_regulator { + compatible = "regulator-fixed"; + regulator-name = "cam0-reg"; + enable-active-high; + status = "disabled"; + }; + + cam0_clk: cam0_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam_dummy_reg: cam_dummy_reg { + compatible = "regulator-fixed"; + regulator-name = "cam-dummy-reg"; + status = "okay"; + }; + + __overrides__ { + cam0-pwdn-ctrl; + cam0-pwdn; + cam0-led-ctrl; + cam0-led; + }; +}; + +&gpio { + interrupts = <2 17>, <2 18>; + + dpi_18bit_cpadhi_gpio0: dpi_18bit_cpadhi_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 + 12 13 14 15 16 17 + 20 21 22 23 24 25>; + brcm,function = ; + brcm,pull = <0>; /* no pull */ + }; + dpi_18bit_cpadhi_gpio2: dpi_18bit_cpadhi_gpio2 { + brcm,pins = <2 3 4 5 6 7 8 9 + 12 13 14 15 16 17 + 20 21 22 23 24 25>; + brcm,function = ; + }; + dpi_18bit_gpio0: dpi_18bit_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19 + 20 21>; + brcm,function = ; + }; + dpi_18bit_gpio2: dpi_18bit_gpio2 { + brcm,pins = <2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19 + 20 21>; + brcm,function = ; + }; + dpi_16bit_gpio0: dpi_16bit_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19>; + brcm,function = ; + }; + dpi_16bit_gpio2: dpi_16bit_gpio2 { + brcm,pins = <2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19>; + brcm,function = ; + }; + dpi_16bit_cpadhi_gpio0: dpi_16bit_cpadhi_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 + 12 13 14 15 16 17 + 20 21 22 23 24>; + brcm,function = ; + }; + dpi_16bit_cpadhi_gpio2: dpi_16bit_cpadhi_gpio2 { + brcm,pins = <2 3 4 5 6 7 8 + 12 13 14 15 16 17 + 20 21 22 23 24>; + brcm,function = ; + }; +}; + +&uart0 { + /* Enable CTS bug workaround */ + cts-event-workaround; +}; + +&i2s { + #sound-dai-cells = <0>; + dmas = <&dma 2>, <&dma 3>; + dma-names = "tx", "rx"; +}; + +&sdhost { + dmas = <&dma (13|(1<<29))>; + dma-names = "rx-tx"; + bus-width = <4>; + brcm,overclock-50 = <0>; + brcm,pio-limit = <1>; + firmware = <&firmware>; +}; + +&spi0 { + dmas = <&dma 6>, <&dma 7>; + dma-names = "tx", "rx"; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts @@ -0,0 +1,204 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837"; + model = "Raspberry Pi 2 Model B rev 1.2"; +}; + +&gpio { + /* + * Taken from rpi_SCH_2b_1p2_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "LAN_RUN", + "CAM_GPIO1", + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "USB_LIMIT", + "NC", /* GPIO39 */ + "PWM0_OUT", + "CAM_GPIO0", + "SMPS_SCL", + "SMPS_SDA", + "ETH_CLK", + "PWM1_OUT", + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins = <40 45>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "input"; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts @@ -0,0 +1,299 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-lan7515.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" +#include "bcm271x-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B+"; + + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; + }; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * Taken from rpi_SCH_3bplus_1p0_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "HDMI_HPD_N", + "STATUS_LED_G", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + "PWM0_OUT", + "PWM1_OUT", + "ETH_CLK", + "WIFI_CLK", + "SDA0", + "SCL0", + "SMPS_SCL", + "SMPS_SDA", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <0 2>; + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; + + audio_pins: audio_pins { + brcm,pins = <40 41>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "BT_ON", + "WL_ON", + "PWR_LED_R", + "LAN_RUN", + "NC", + "CAM_GPIO0", + "CAM_GPIO1", + "NC"; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "default-on"; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +ð_phy { + microchip,eee-enabled; + microchip,tx-lpi-timer = <600>; /* non-aggressive*/ + microchip,downshift-after = <2>; +}; + +&cam1_reg { + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + + eee = <ð_phy>,"microchip,eee-enabled?"; + tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; + eth_led0 = <ð_phy>,"microchip,led-modes:0"; + eth_led1 = <ð_phy>,"microchip,led-modes:4"; + eth_downshift_after = <ð_phy>,"microchip,downshift-after:0"; + eth_max_speed = <ð_phy>,"max-speed:0"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts @@ -0,0 +1,297 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" +#include "bcm271x-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B"; + + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; + }; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * Taken from rpi_SCH_3b_1p2_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "NC", /* GPIO 28 */ + "LAN_RUN_BOOT", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + "PWM0_OUT", + "PWM1_OUT", + "ETH_CLK", + "WIFI_CLK", + "SDA0", + "SCL0", + "SMPS_SCL", + "SMPS_SDA", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <0 2>; + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2>; + }; + + audio_pins: audio_pins { + brcm,pins = <40 41>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "BT_ON", + "WL_ON", + "STATUS_LED", + "LAN_RUN", + "HDMI_HPD_N", + "CAM_GPIO0", + "CAM_GPIO1", + "PWR_LOW_N"; + status = "okay"; + }; + + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&bt { + max-speed = <921600>; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&expgpio 7 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "input"; + }; +}; + +&hdmi { + hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts @@ -0,0 +1,223 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,3-compute-module", "brcm,bcm2837"; + model = "Raspberry Pi Compute Module 3"; +}; + +&cam1_reg { + gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +cam0_reg: &cam0_regulator { + gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +&uart0 { + status = "okay"; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "GPIO0", + "GPIO1", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "GPIO32", + "GPIO33", + "GPIO34", + "GPIO35", + "GPIO36", + "GPIO37", + "GPIO38", + "GPIO39", + "GPIO40", + "GPIO41", + "GPIO42", + "GPIO43", + "GPIO44", + "GPIO45", + "SMPS_SCL", + "SMPS_SDA", + /* Used by eMMC */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + audio_pins: audio_pins { + brcm,pins; + brcm,function; + }; +}; + +&soc { + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; + gpio-controller; + #gpio-cells = <2>; + firmware = <&firmware>; + status = "okay"; + }; + +}; + +&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "HDMI_HPD_N", + "EMMC_EN_N", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC"; + status = "okay"; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&hdmi { + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + cam0_reg = <&cam0_reg>,"status"; + cam0_reg_gpio = <&cam0_reg>,"gpio:4"; + cam1_reg = <&cam1_reg>,"status"; + cam1_reg_gpio = <&cam1_reg>,"gpio:4"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts @@ -0,0 +1,261 @@ +/dts-v1/; + +#include "bcm2710.dtsi" +#include "bcm2709-rpi.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" +#include "bcm2708-rpi-bt.dtsi" +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,model-zero-2-w", "brcm,bcm2837"; + model = "Raspberry Pi Zero 2 W"; + + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; + }; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + mmc1 = &mmcnr; + }; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "HDMI_HPD_N", + "STATUS_LED_N", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + "CAM_GPIO1", /* GPIO40 */ + "WL_ON", /* GPIO41 */ + "BT_ON", /* GPIO42 */ + "WIFI_CLK", /* GPIO43 */ + "SDA0", /* GPIO44 */ + "SCL0", /* GPIO45 */ + "SMPS_SCL", /* GPIO46 */ + "SMPS_SDA", /* GPIO47 */ + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = <1>; /* output */ + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = <4>; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = <4>; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = <4>; /* alt0 */ + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <7>; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + bt_pins: bt_pins { + brcm,pins = <43>; + brcm,function = <4>; /* alt0:GPCLK2 */ + brcm,pull = <0>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <30 31 32 33>; + brcm,function = <7>; /* alt3=UART0 */ + brcm,pull = <2 0 0 2>; /* up none none up */ + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; + + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2c2 { + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +&led_act { + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "actpwr"; +}; + +&hdmi { + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&bt { + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&minibt { + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&cam1_reg { + gpio = <&gpio 40 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2.dts @@ -0,0 +1 @@ +#include "bcm2710-rpi-zero-2-w.dts" --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2710.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2710.dtsi @@ -0,0 +1,32 @@ +#define i2c0 i2c0if +#include "bcm2837.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" + +/ { + compatible = "brcm,bcm2837", "brcm,bcm2836"; + + arm-pmu { + compatible = "arm,cortex-a53-pmu", "arm,cortex-a7-pmu"; + }; + + soc { + dma-ranges = <0xc0000000 0x00000000 0x3f000000>, + <0x7e000000 0x3f000000 0x01000000>; + }; + + __overrides__ { + arm_freq = <&cpu0>, "clock-frequency:0", + <&cpu1>, "clock-frequency:0", + <&cpu2>, "clock-frequency:0", + <&cpu3>, "clock-frequency:0"; + }; +}; + +&system_timer { + status = "disabled"; +}; + +&vc4 { + status = "disabled"; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts @@ -1,10 +1,16 @@ // SPDX-License-Identifier: GPL-2.0 /dts-v1/; +#define BCM2711 +#define i2c0 i2c0if #include "bcm2711.dtsi" +#include "bcm283x-rpi-wifi-bt.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" +#define i2c0 i2c0mux #include "bcm2711-rpi.dtsi" +#undef i2c0 #include "bcm283x-rpi-led-deprecated.dtsi" -#include "bcm283x-rpi-usb-peripheral.dtsi" -#include "bcm283x-rpi-wifi-bt.dtsi" +//#include "bcm283x-rpi-usb-peripheral.dtsi" / { compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; @@ -60,7 +66,7 @@ "VDD_SD_IO_SEL", "CAM_GPIO", /* 5 */ "SD_PWR_ON", - ""; + "SD_OC_N"; }; &gpio { @@ -74,21 +80,21 @@ */ gpio-line-names = "ID_SDA", /* 0 */ "ID_SCL", - "SDA1", - "SCL1", - "GPIO_GCLK", + "GPIO2", + "GPIO3", + "GPIO4", "GPIO5", /* 5 */ "GPIO6", - "SPI_CE1_N", - "SPI_CE0_N", - "SPI_MISO", - "SPI_MOSI", /* 10 */ - "SPI_SCLK", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", /* 10 */ + "GPIO11", "GPIO12", "GPIO13", /* Serial port */ - "TXD1", - "RXD1", /* 15 */ + "GPIO14", + "GPIO15", /* 15 */ "GPIO16", "GPIO17", "GPIO18", @@ -241,3 +247,233 @@ &wifi_pwrseq { reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; }; + +// ============================================= +// Downstream rpi- changes + +#include "bcm271x-rpi-bt.dtsi" + +/ { + soc { + /delete-node/ pixelvalve@7e807000; + /delete-node/ hdmi@7e902000; + }; +}; + +#include "bcm2711-rpi-ds.dtsi" +#include "bcm283x-rpi-csi1-2lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" + +/ { + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; + }; + + /delete-node/ wifi-pwrseq; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1_pins>; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&gpio { + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "RGMII_MDIO", + "RGMIO_MDC", + /* Used by BT module */ + "CTS0", /* 30 */ + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", /* 35 */ + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + /* Shared with SPI flash */ + "PWM0_MISO", /* 40 */ + "PWM1_MOSI", + "STATUS_LED_G_CLK", + "SPIFLASH_CE_N", + "SDA0", + "SCL0", /* 45 */ + "RGMII_RXCLK", + "RGMII_RXCTL", + "RGMII_RXD0", + "RGMII_RXD1", + "RGMII_RXD2", /* 50 */ + "RGMII_RXD3", + "RGMII_TXCLK", + "RGMII_TXCTL", + "RGMII_TXD0", + "RGMII_TXD1", /* 55 */ + "RGMII_TXD2", + "RGMII_TXD3"; + + bt_pins: bt_pins { + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 + // to fool pinctrl + brcm,function = <0>; + brcm,pull = <2>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <32 33>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +// ============================================= +// Board specific stuff here + +&sdhost { + status = "disabled"; +}; + +&phy1 { + led-modes = <0x00 0x08>; /* link/activity link */ +}; + +&gpio { + audio_pins: audio_pins { + brcm,pins = <40 41>; + brcm,function = <4>; + brcm,pull = <0>; + }; +}; + +&led_act { + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&led_pwr { + default-state = "off"; +}; + +&pwm1 { + status = "disabled"; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; +}; + +cam0_reg: &cam_dummy_reg { +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts @@ -36,8 +36,47 @@ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; }; -/delete-node/ &led_act; - &pm { /delete-property/ system-power-controller; }; + +// ============================================= +// Downstream rpi- changes + +&audio_pins { + brcm,pins = <>; + brcm,function = <>; +}; + +// Declare the LED but leave it disabled, in case a user wants to map it +// to a GPIO on the header +&led_act { + default-state = "off"; + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +&led_pwr { + default-state = "off"; +}; + +&cam1_reg { + /delete-property/ gpio; +}; + +cam0_reg: &cam_dummy_reg { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4", + <&led_act>,"status=okay"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts @@ -0,0 +1,510 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +#define BCM2711 +#define i2c0 i2c0if +#include "bcm2711.dtsi" +#include "bcm283x-rpi-wifi-bt.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" +#define i2c0 i2c0mux +#include "bcm2711-rpi.dtsi" +#undef i2c0 +#include "bcm283x-rpi-led-deprecated.dtsi" +//#include "bcm283x-rpi-usb-peripheral.dtsi" + +/ { + compatible = "raspberrypi,4-compute-module", "brcm,bcm2711"; + model = "Raspberry Pi Compute Module 4"; + + chosen { + /* 8250 auxiliary UART instead of pl011 */ + stdout-path = "serial1:115200n8"; + }; + + sd_io_1v8_reg: sd_io_1v8_reg { + compatible = "regulator-gpio"; + regulator-name = "vdd-sd-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-settling-time-us = <5000>; + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1>, + <3300000 0x0>; + status = "okay"; + }; + + sd_vcc_reg: sd_vcc_reg { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; + }; +}; + +&bt { + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; +}; + +&ddc0 { + status = "okay"; +}; + +&ddc1 { + status = "okay"; +}; + +&expgpio { + gpio-line-names = "BT_ON", + "WL_ON", + "PWR_LED_OFF", + "ANT1", + "VDD_SD_IO_SEL", + "CAM_GPIO", + "SD_PWR_ON", + "ANT2"; + + ant1: ant1 { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + }; + + ant2: ant2 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + }; +}; + +&gpio { + /* + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD1", + "RXD1", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "RGMII_MDIO", + "RGMIO_MDC", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + /* Shared with SPI flash */ + "PWM0_MISO", + "PWM1_MOSI", + "STATUS_LED_G_CLK", + "SPIFLASH_CE_N", + "SDA0", + "SCL0", + "RGMII_RXCLK", + "RGMII_RXCTL", + "RGMII_RXD0", + "RGMII_RXD1", + "RGMII_RXD2", + "RGMII_RXD3", + "RGMII_TXCLK", + "RGMII_TXCTL", + "RGMII_TXD0", + "RGMII_TXD1", + "RGMII_TXD2", + "RGMII_TXD3"; +}; + +&hdmi0 { + status = "okay"; +}; + +&hdmi1 { + status = "okay"; +}; + +&led_act { + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&leds { + led_pwr: led-pwr { + label = "PWR"; + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; +}; + +&pixelvalve0 { + status = "okay"; +}; + +&pixelvalve1 { + status = "okay"; +}; + +&pixelvalve2 { + status = "okay"; +}; + +&pixelvalve4 { + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; + status = "okay"; +}; + +/* EMMC2 is used to drive the EMMC card */ +&emmc2 { + bus-width = <8>; + vqmmc-supply = <&sd_io_1v8_reg>; + vmmc-supply = <&sd_vcc_reg>; + broken-cd; + status = "okay"; +}; + +&genet { + phy-handle = <&phy1>; + phy-mode = "rgmii-rxid"; + status = "okay"; +}; + +&genet_mdio { + phy1: ethernet-phy@0 { + /* No PHY interrupt */ + reg = <0x0>; + }; +}; + +&pcie0 { + pci@0,0 { + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + reg = <0 0 0 0 0>; + }; +}; + +/* uart0 communicates with the BT module */ +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; + uart-has-rtscts; +}; + +/* uart1 is mapped to the pin header */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_gpio14>; + status = "okay"; +}; + +&vc4 { + status = "okay"; +}; + +&vec { + status = "disabled"; +}; + +&wifi_pwrseq { + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; +}; + +// ============================================= +// Downstream rpi- changes + +#include "bcm271x-rpi-bt.dtsi" + +/ { + soc { + /delete-node/ pixelvalve@7e807000; + /delete-node/ hdmi@7e902000; + }; +}; + +#include "bcm2711-rpi-ds.dtsi" +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_44.dtsi" + +/ { + chosen { + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_headphones=0"; + }; + + /delete-node/ wifi-pwrseq; +}; + +&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_pins &bt_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1_pins>; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&gpio { + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "RGMII_MDIO", + "RGMIO_MDC", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + /* Shared with SPI flash */ + "PWM0_MISO", + "PWM1_MOSI", + "STATUS_LED_G_CLK", + "SPIFLASH_CE_N", + "SDA0", + "SCL0", + "RGMII_RXCLK", + "RGMII_RXCTL", + "RGMII_RXD0", + "RGMII_RXD1", + "RGMII_RXD2", + "RGMII_RXD3", + "RGMII_TXCLK", + "RGMII_TXCTL", + "RGMII_TXD0", + "RGMII_TXD1", + "RGMII_TXD2", + "RGMII_TXD3"; + + bt_pins: bt_pins { + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 + // to fool pinctrl + brcm,function = <0>; + brcm,pull = <2>; + }; + + uart0_pins: uart0_pins { + brcm,pins = <32 33>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart1_pins: uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; + + uart1_bt_pins: uart1_bt_pins { + brcm,pins = <32 33 30 31>; + brcm,function = ; /* alt5=UART1 */ + brcm,pull = <0 2 2 0>; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +// ============================================= +// Board specific stuff here + +&pcie0 { + brcm,enable-l1ss; +}; + +&sdhost { + status = "disabled"; +}; + +&phy1 { + led-modes = <0x00 0x08>; /* link/activity link */ +}; + +&gpio { + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +&led_act { + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&led_pwr { + default-state = "off"; +}; + +&pwm1 { + status = "disabled"; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +cam0_reg: &cam1_reg { + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>,"gpios:8"; + pwr_led_trigger = <&led_pwr>,"linux,default-trigger"; + + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; + + ant1 = <&ant1>,"output-high?=on", + <&ant1>, "output-low?=off", + <&ant2>, "output-high?=off", + <&ant2>, "output-low?=on"; + ant2 = <&ant1>,"output-high?=off", + <&ant1>, "output-low?=on", + <&ant2>, "output-high?=on", + <&ant2>, "output-low?=off"; + noant = <&ant1>,"output-high?=off", + <&ant1>, "output-low?=on", + <&ant2>, "output-high?=off", + <&ant2>, "output-low?=on"; + + cam0_reg = <&cam0_reg>,"status"; + cam0_reg_gpio = <&cam0_reg>,"gpio:4", + <&cam0_reg>,"gpio:0=", <&gpio>; + cam1_reg = <&cam1_reg>,"status"; + cam1_reg_gpio = <&cam1_reg>,"gpio:4", + <&cam1_reg>,"gpio:0=", <&gpio>; + + pcie_tperst_clk_ms = <&pcie0>,"brcm,tperst-clk-ms:0"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts @@ -0,0 +1,287 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +#define BCM2711 +#define i2c0 i2c0if +#include "bcm2711.dtsi" +//#include "bcm283x-rpi-wifi-bt.dtsi" +#undef i2c0 +#include "bcm270x.dtsi" +#define i2c0 i2c0mux +#include "bcm2711-rpi.dtsi" +#undef i2c0 +#include "bcm283x-rpi-led-deprecated.dtsi" + +/ { + compatible = "raspberrypi,4-compute-module-s", "brcm,bcm2711"; + model = "Raspberry Pi Compute Module 4S"; +}; + +&ddc0 { + status = "okay"; +}; + +&gpio { + /* + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "GPIO2", + "GPIO3", + "GPIO4", + "GPIO5", + "GPIO6", + "GPIO7", + "GPIO8", + "GPIO9", + "GPIO10", + "GPIO11", + "GPIO12", + "GPIO13", + "GPIO14", + "GPIO15", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "GPIO32", + "GPIO33", + "GPIO34", + "GPIO35", + "GPIO36", + "GPIO37", + "GPIO38", + "GPIO39", + "PWM0_MISO", + "PWM1_MOSI", + "GPIO42", + "GPIO43", + "GPIO44", + "GPIO45"; +}; + +&hdmi0 { + status = "okay"; +}; + +&led_act { + gpios = <&virtgpio 0 GPIO_ACTIVE_HIGH>; +}; + +&pixelvalve0 { + status = "okay"; +}; + +&pixelvalve1 { + status = "okay"; +}; + +&pixelvalve2 { + status = "okay"; +}; + +&pixelvalve4 { + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; + status = "okay"; +}; + +/* EMMC2 is used to drive the EMMC card */ +&emmc2 { + bus-width = <8>; + broken-cd; + status = "okay"; +}; + +&pcie0 { + status = "disabled"; +}; + +&vchiq { + interrupts = ; +}; + +&vc4 { + status = "okay"; +}; + +&vec { + status = "disabled"; +}; + +// ============================================= +// Downstream rpi- changes + +#include "bcm2711-rpi-ds.dtsi" + +/ { + soc { + /delete-node/ pixelvalve@7e807000; + /delete-node/ hdmi@7e902000; + + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; + gpio-controller; + #gpio-cells = <2>; + firmware = <&firmware>; + status = "okay"; + }; + }; +}; + +#include "bcm283x-rpi-csi0-2lane.dtsi" +#include "bcm283x-rpi-csi1-4lane.dtsi" +#include "bcm283x-rpi-i2c0mux_0_28.dtsi" + +/ { + chosen { + bootargs = "coherent_pool=1M snd_bcm2835.enable_headphones=0"; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + /delete-property/ i2c20; + /delete-property/ i2c21; + }; + + /delete-node/ wifi-pwrseq; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +&gpio { + uart0_pins: uart0_pins { + brcm,pins; + brcm,function; + brcm,pull; + }; +}; + +&i2c0if { + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +&i2s { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; +}; + +// ============================================= +// Board specific stuff here + +&sdhost { + status = "disabled"; +}; + +&gpio { + audio_pins: audio_pins { + brcm,pins = <>; + brcm,function = <>; + }; +}; + +/* Permanently disable HDMI1 */ +&hdmi1 { + compatible = "disabled"; +}; + +/* Permanently disable DDC1 */ +&ddc1 { + compatible = "disabled"; +}; + +&led_act { + default-state = "off"; + linux,default-trigger = "mmc0"; +}; + +&pwm1 { + status = "disabled"; +}; + +&vchiq { + pinctrl-names = "default"; + pinctrl-0 = <&audio_pins>; +}; + +&cam1_reg { + gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +cam0_reg: &cam0_regulator { + gpio = <&gpio 31 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +i2c_csi_dsi0: &i2c0 { +}; + +/ { + __overrides__ { + audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}"; + + act_led_gpio = <&led_act>,"gpios:4"; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>,"linux,default-trigger"; + + cam0_reg = <&cam0_reg>,"status"; + cam0_reg_gpio = <&cam0_reg>,"gpio:4"; + cam1_reg = <&cam1_reg>,"status"; + cam1_reg_gpio = <&cam1_reg>,"gpio:4"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2711-rpi-ds.dtsi @@ -0,0 +1,533 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "bcm270x-rpi.dtsi" + +/ { + chosen: chosen { + }; + + __overrides__ { + arm_freq; + eee = <&chosen>,"bootargs{on='',off='genet.eee=N'}"; + hdmi = <&hdmi0>,"status", + <&hdmi1>,"status"; + pcie = <&pcie0>,"status"; + sd = <&emmc2>,"status"; + + sd_poll_once = <&emmc2>, "non-removable?"; + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>, + <&spi0>, "dmas:8=", <&dma40>; + i2s_dma4 = <&i2s>, "dmas:0=", <&dma40>, + <&i2s>, "dmas:8=", <&dma40>; + }; + + scb: scb { + /* Add a label */ + }; + + soc: soc { + /* Add a label */ + }; + + arm-pmu { + compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3", "arm,cortex-a7-pmu"; + + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + uart2 = &uart2; + uart3 = &uart3; + uart4 = &uart4; + uart5 = &uart5; + serial0 = &uart1; + serial1 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + mmc0 = &emmc2; + mmc1 = &mmcnr; + mmc2 = &sdhost; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c20 = &ddc0; + i2c21 = &ddc1; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + spi6 = &spi6; + /delete-property/ intc; + }; + + /* + * Add a node with a dma-ranges value that exists only to be found + * by of_dma_get_max_cpu_address, and hence limit the DMA zone. + */ + zone_dma { + #address-cells = <1>; + #size-cells = <1>; + dma-ranges = <0x0 0x0 0x0 0x40000000>; + }; +}; + +&vc4 { + raspberrypi,firmware = <&firmware>; +}; + +&cma { + /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */ + alloc-ranges = <0x0 0x00000000 0x30000000>; +}; + +&soc { + /* Add the physical <-> DMA mapping for the I/O space */ + dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>, + <0x7c000000 0x0 0xfc000000 0x03800000>; +}; + +&scb { + #size-cells = <2>; + + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>, + <0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>, + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>, + <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>; + dma-ranges = <0x4 0x7c000000 0x0 0xfc000000 0x0 0x03800000>, + <0x0 0x00000000 0x0 0x00000000 0x4 0x00000000>; + + dma40: dma@7e007b00 { + compatible = "brcm,bcm2711-dma"; + reg = <0x0 0x7e007b00 0x0 0x400>; + interrupts = + , /* dma4 11 */ + , /* dma4 12 */ + , /* dma4 13 */ + ; /* dma4 14 */ + interrupt-names = "dma11", + "dma12", + "dma13", + "dma14"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x7800>; + }; + + xhci: xhci@7e9c0000 { + compatible = "generic-xhci"; + status = "disabled"; + reg = <0x0 0x7e9c0000 0x0 0x100000>; + interrupts = ; + power-domains = <&power RPI_POWER_DOMAIN_USB>; + }; + + codec@7eb10000 { + compatible = "raspberrypi,rpivid-vid-decoder"; + reg = <0x0 0x7eb10000 0x0 0x1000>, /* INTC */ + <0x0 0x7eb00000 0x0 0x10000>; /* HEVC */ + reg-names = "intc", + "hevc"; + interrupts = ; + + clocks = <&firmware_clocks 11>; + clock-names = "hevc"; + }; +}; + +&pcie0 { + reg = <0x0 0x7d500000 0x0 0x9310>; + ranges = <0x02000000 0x0 0xc0000000 0x6 0x00000000 + 0x0 0x40000000>; +}; + +&genet { + reg = <0x0 0x7d580000 0x0 0x10000>; +}; + +&dma40 { + /* The VPU firmware uses DMA channel 11 for VCHIQ */ + brcm,dma-channel-mask = <0x7000>; +}; + +&vchiq { + compatible = "brcm,bcm2711-vchiq"; +}; + +&firmwarekms { + compatible = "raspberrypi,rpi-firmware-kms-2711"; + interrupts = ; +}; + +&smi { + interrupts = ; +}; + +&mmc { + interrupts = ; +}; + +&mmcnr { + interrupts = ; +}; + +&csi0 { + interrupts = ; +}; + +&csi1 { + interrupts = ; +}; + +&random { + compatible = "brcm,bcm2711-rng200"; + status = "okay"; +}; + +&usb { + interrupts = ; +}; + +&gpio { + interrupts = , + ; + + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = ; + }; + + spi0_cs_pins: spi0_cs_pins { + brcm,pins = <8 7>; + brcm,function = ; + }; + + spi3_pins: spi3_pins { + brcm,pins = <1 2 3>; + brcm,function = ; + }; + + spi3_cs_pins: spi3_cs_pins { + brcm,pins = <0 24>; + brcm,function = ; + }; + + spi4_pins: spi4_pins { + brcm,pins = <5 6 7>; + brcm,function = ; + }; + + spi4_cs_pins: spi4_cs_pins { + brcm,pins = <4 25>; + brcm,function = ; + }; + + spi5_pins: spi5_pins { + brcm,pins = <13 14 15>; + brcm,function = ; + }; + + spi5_cs_pins: spi5_cs_pins { + brcm,pins = <12 26>; + brcm,function = ; + }; + + spi6_pins: spi6_pins { + brcm,pins = <19 20 21>; + brcm,function = ; + }; + + spi6_cs_pins: spi6_cs_pins { + brcm,pins = <18 27>; + brcm,function = ; + }; + + i2c0_pins: i2c0 { + brcm,pins = <0 1>; + brcm,function = ; + brcm,pull = ; + }; + + i2c1_pins: i2c1 { + brcm,pins = <2 3>; + brcm,function = ; + brcm,pull = ; + }; + + i2c3_pins: i2c3 { + brcm,pins = <4 5>; + brcm,function = ; + brcm,pull = ; + }; + + i2c4_pins: i2c4 { + brcm,pins = <8 9>; + brcm,function = ; + brcm,pull = ; + }; + + i2c5_pins: i2c5 { + brcm,pins = <12 13>; + brcm,function = ; + brcm,pull = ; + }; + + i2c6_pins: i2c6 { + brcm,pins = <22 23>; + brcm,function = ; + brcm,pull = ; + }; + + i2s_pins: i2s { + brcm,pins = <18 19 20 21>; + brcm,function = ; + }; + + sdio_pins: sdio_pins { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = ; // alt3 = SD1 + brcm,pull = <0 2 2 2 2 2>; + }; + + uart2_pins: uart2_pins { + brcm,pins = <0 1>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart3_pins: uart3_pins { + brcm,pins = <4 5>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart4_pins: uart4_pins { + brcm,pins = <8 9>; + brcm,function = ; + brcm,pull = <0 2>; + }; + + uart5_pins: uart5_pins { + brcm,pins = <12 13>; + brcm,function = ; + brcm,pull = <0 2>; + }; +}; + +&emmc2 { + mmc-ddr-3_3v; +}; + +&vc4 { + status = "disabled"; +}; + +&pixelvalve0 { + status = "disabled"; +}; + +&pixelvalve1 { + status = "disabled"; +}; + +&pixelvalve2 { + status = "disabled"; +}; + +&pixelvalve3 { + status = "disabled"; +}; + +&pixelvalve4 { + status = "disabled"; +}; + +&hdmi0 { + reg = <0x7ef00700 0x300>, + <0x7ef00300 0x200>, + <0x7ef00f00 0x80>, + <0x7ef00f80 0x80>, + <0x7ef01b00 0x200>, + <0x7ef01f00 0x400>, + <0x7ef00200 0x80>, + <0x7ef04300 0x100>, + <0x7ef20000 0x100>, + <0x7ef00100 0x30>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd", + "intr2"; + clocks = <&firmware_clocks 13>, + <&firmware_clocks 14>, + <&dvp 0>, + <&clk_27MHz>; + dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; + status = "disabled"; +}; + +&ddc0 { + status = "disabled"; +}; + +&hdmi1 { + reg = <0x7ef05700 0x300>, + <0x7ef05300 0x200>, + <0x7ef05f00 0x80>, + <0x7ef05f80 0x80>, + <0x7ef06b00 0x200>, + <0x7ef06f00 0x400>, + <0x7ef00280 0x80>, + <0x7ef09300 0x100>, + <0x7ef20000 0x100>, + <0x7ef00100 0x30>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd", + "intr2"; + clocks = <&firmware_clocks 13>, + <&firmware_clocks 14>, + <&dvp 1>, + <&clk_27MHz>; + dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; + status = "disabled"; +}; + +&ddc1 { + status = "disabled"; +}; + +&dvp { + status = "disabled"; +}; + +&vec { + clocks = <&firmware_clocks 15>; +}; + +&aon_intr { + interrupts = ; + status = "disabled"; +}; + +&system_timer { + status = "disabled"; +}; + +&i2c0 { + /delete-property/ compatible; + /delete-property/ interrupts; +}; + +&i2c0if { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + interrupts = ; +}; + +i2c_arm: &i2c1 {}; +i2c_vc: &i2c0 {}; + +&i2c3 { + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; +}; + +&i2c4 { + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; +}; + +&i2c5 { + pinctrl-0 = <&i2c5_pins>; + pinctrl-names = "default"; +}; + +&i2c6 { + pinctrl-0 = <&i2c6_pins>; + pinctrl-names = "default"; +}; + +&spi3 { + pinctrl-0 = <&spi3_pins &spi3_cs_pins>; + pinctrl-names = "default"; +}; + +&spi4 { + pinctrl-0 = <&spi4_pins &spi4_cs_pins>; + pinctrl-names = "default"; +}; + +&spi5 { + pinctrl-0 = <&spi5_pins &spi5_cs_pins>; + pinctrl-names = "default"; +}; + +&spi6 { + pinctrl-0 = <&spi6_pins &spi6_cs_pins>; + pinctrl-names = "default"; +}; + +&uart2 { + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; +}; + +&uart3 { + pinctrl-0 = <&uart3_pins>; + pinctrl-names = "default"; +}; + +&uart4 { + pinctrl-0 = <&uart4_pins>; + pinctrl-names = "default"; +}; + +&uart5 { + pinctrl-0 = <&uart5_pins>; + pinctrl-names = "default"; +}; + +&axiperf { + compatible = "brcm,bcm2711-axiperf"; +}; + +/delete-node/ &v3d; + +/ { + v3dbus: v3dbus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <2>; + ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>, + <0x40000000 0x0 0xff800000 0x0 0x00800000>; + dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>; + + v3d: v3d@7ec04000 { + compatible = "brcm,2711-v3d"; + reg = + <0x7ec00000 0x0 0x4000>, + <0x7ec04000 0x0 0x4000>; + reg-names = "hub", "core0"; + + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; + resets = <&pm BCM2835_RESET_V3D>; + clocks = <&firmware_clocks 5>; + clocks-names = "v3d"; + interrupts = ; + status = "disabled"; + }; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include "bcm2835-rpi.dtsi" -#include #include / { @@ -16,6 +15,7 @@ ethernet0 = &genet; pcie0 = &pcie0; blconfig = &blconfig; + blpubkey = &blpubkey; }; }; @@ -68,6 +68,18 @@ no-map; status = "disabled"; }; + /* + * RPi4 will copy the binary public key blob (if present) from the bootloader + * into memory for use by the OS. + */ + blpubkey: nvram@1 { + compatible = "raspberrypi,bootloader-public-key", "nvmem-rmem"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x0 0x0>; + no-map; + status = "disabled"; + }; }; &v3d { @@ -77,7 +89,3 @@ &vchiq { interrupts = ; }; - -&xhci { - power-domains = <&power RPI_POWER_DOMAIN_USB>; -}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2711.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2711.dtsi @@ -604,20 +604,6 @@ }; }; - xhci: usb@7e9c0000 { - compatible = "brcm,bcm2711-xhci", "brcm,xhci-brcm-v2"; - reg = <0x0 0x7e9c0000 0x100000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = ; - /* DWC2 and this IP block share the same USB PHY, - * enabling both at the same time results in lockups. - * So keep this node disabled and let the bootloader - * decide which interface should be enabled. - */ - status = "disabled"; - }; - v3d: gpu@7ec00000 { compatible = "brcm,2711-v3d"; reg = <0x0 0x7ec00000 0x4000>, --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -0,0 +1,863 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include +#include +#include +#include +#include +#include + +#define i2c0 _i2c0 +#define i2c3 _i2c3 +#define i2c4 _i2c4 +#define i2c5 _i2c5 +#define i2c6 _i2c6 +#define i2c8 _i2c8 +#define i2s _i2s +#define pwm0 _pwm0 +#define pwm1 _pwm1 +#define spi0 _spi0 +#define spi3 _spi3 +#define spi4 _spi4 +#define spi5 _spi5 +#define spi6 _spi6 +#define uart0 _uart0 +#define uart2 _uart2 +#define uart5 _uart5 + +#include "bcm2712.dtsi" + +#undef i2c0 +#undef i2c3 +#undef i2c4 +#undef i2c5 +#undef i2c6 +#undef i2c8 +#undef i2s +#undef pwm0 +#undef pwm1 +#undef spi0 +#undef spi3 +#undef spi4 +#undef spi5 +#undef spi6 +#undef uart0 +#undef uart2 +#undef uart3 +#undef uart4 +#undef uart5 + +/ { + compatible = "raspberrypi,5-model-b", "brcm,bcm2712"; + model = "Raspberry Pi 5"; + + /* Will be filled by the bootloader */ + memory@0 { + device_type = "memory"; + reg = <0 0 0x28000000>; + }; + + leds: leds { + compatible = "gpio-leds"; + + led_pwr: led-pwr { + label = "PWR"; + gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "none"; + }; + + led_act: led-act { + label = "ACT"; + gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "mmc0"; + }; + }; + + sd_io_1v8_reg: sd_io_1v8_reg { + compatible = "regulator-gpio"; + regulator-name = "vdd-sd-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-settling-time-us = <5000>; + gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1 + 3300000 0x0>; + status = "okay"; + }; + + sd_vcc_reg: sd_vcc_reg { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wl_on_reg: wl_on_reg { + compatible = "regulator-fixed"; + regulator-name = "wl-on-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-0 = <&wl_on_pins>; + pinctrl-names = "default"; + + gpio = <&gio 28 GPIO_ACTIVE_HIGH>; + + startup-delay-us = <150000>; + enable-active-high; + }; + + clocks: clocks { + }; + + cam1_clk: cam1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_clk: cam0_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_reg: cam0_reg { + compatible = "regulator-fixed"; + regulator-name = "cam0_reg"; + enable-active-high; + status = "okay"; + gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to MIPI 0 connector + }; + + cam1_reg: cam1_reg { + compatible = "regulator-fixed"; + regulator-name = "cam1_reg"; + enable-active-high; + status = "okay"; + gpio = <&rp1_gpio 46 0>; // CD1_IO0_MICCLK, to MIPI 1 connector + }; + + cam_dummy_reg: cam_dummy_reg { + compatible = "regulator-fixed"; + regulator-name = "cam-dummy-reg"; + status = "okay"; + }; + + dummy: dummy { + // A target for unwanted overlay fragments + }; + + + // A few extra labels to keep overlays happy + + i2c0if: i2c0if {}; + i2c0mux: i2c0mux {}; +}; + +rp1_target: &pcie2 { + brcm,enable-mps-rcb; + brcm,vdm-qos-map = <0xbbaa9888>; + aspm-no-l0s; + status = "okay"; +}; + +// Add some labels to 2712 device + +// The system UART +uart10: &_uart0 { status = "okay"; }; + +// The system SPI for the bootloader EEPROM +spi10: &_spi0 { status = "okay"; }; + +i2c_rp1boot: &_i2c3 { }; + +#include "rp1.dtsi" + +&rp1 { + // PCIe address space layout: + // 00_00000000-00_00xxxxxx = RP1 peripherals + // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM + + // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx + // This is the RP1 peripheral space + ranges = <0xc0 0x40000000 + 0x02000000 0x00 0x00000000 + 0x00 0x00400000>; + + dma-ranges = + // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx + <0x10 0x00000000 + 0x43000000 0x10 0x00000000 + 0x10 0x00000000>, + + // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx + // This allows the RP1 DMA controller to address RP1 hardware + <0xc0 0x40000000 + 0x02000000 0x0 0x00000000 + 0x0 0x00400000>, + + // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx + <0x00 0x00000000 + 0x02000000 0x10 0x00000000 + 0x10 0x00000000>; +}; + +// Expose RP1 nodes as system nodes with labels + +&rp1_dma { + status = "okay"; +}; + +&rp1_eth { + status = "okay"; + phy-handle = <&phy1>; + phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>; + phy-reset-duration = <5>; + + phy1: ethernet-phy@1 { + reg = <0x1>; + brcm,powerdown-enable; + }; +}; + +gpio: &rp1_gpio { + status = "okay"; +}; + +aux: &dummy {}; + +&rp1_usb0 { + pinctrl-0 = <&usb_vbus_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rp1_usb1 { + status = "okay"; +}; + +#include "bcm2712-rpi.dtsi" + +i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only + pinctrl-0 = <&rp1_i2c6_38_39>; + pinctrl-names = "default"; + clock-frequency = <100000>; +}; + +i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only + pinctrl-0 = <&rp1_i2c4_40_41>; + pinctrl-names = "default"; + clock-frequency = <100000>; +}; + +i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility + +csi0: &rp1_csi0 { }; +csi1: &rp1_csi1 { }; +dsi0: &rp1_dsi0 { }; +dsi1: &rp1_dsi1 { }; +dpi: &rp1_dpi { }; +vec: &rp1_vec { }; +dpi_gpio0: &rp1_dpi_24bit_gpio0 { }; +dpi_gpio1: &rp1_dpi_24bit_gpio2 { }; +dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { }; +dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { }; +dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { }; +dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { }; +dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { }; +dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { }; +dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { }; +dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { }; + +/* Add the IOMMUs for some RP1 bus masters */ + +&csi0 { + iommus = <&iommu5>; +}; + +&csi1 { + iommus = <&iommu5>; +}; + +&dsi0 { + iommus = <&iommu5>; +}; + +&dsi1 { + iommus = <&iommu5>; +}; + +&dpi { + iommus = <&iommu5>; +}; + +&vec { + iommus = <&iommu5>; +}; + +&ddc0 { + status = "disabled"; +}; + +&ddc1 { + status = "disabled"; +}; + +&hdmi0 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + status = "disabled"; +}; + +&hdmi1 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + status = "disabled"; +}; + +&hvs { + clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; + clock-names = "core", "disp"; +}; + +&mop { + status = "disabled"; +}; + +&moplet { + status = "disabled"; +}; + +&pixelvalve0 { + status = "disabled"; +}; + +&pixelvalve1 { + status = "disabled"; +}; + +&disp_intr { + status = "disabled"; +}; + +/* SDIO1 is used to drive the SD card */ +&sdio1 { + pinctrl-0 = <&emmc_sd_pulls>, <&emmc_aon_cd_pins>; + pinctrl-names = "default"; + vqmmc-supply = <&sd_io_1v8_reg>; + vmmc-supply = <&sd_vcc_reg>; + bus-width = <4>; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr104; + cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>; + //no-1-8-v; + status = "okay"; +}; + +&pinctrl_aon { + emmc_aon_cd_pins: emmc_aon_cd_pins { + function = "sd_card_g"; + pins = "aon_gpio5"; + bias-pull-up; + }; + + /* Slight hack - only one PWM pin (status LED) is usable */ + aon_pwm_1pin: aon_pwm_1pin { + function = "aon_pwm"; + pins = "aon_gpio9"; + }; +}; + +&pinctrl { + pwr_button_pins: pwr_button_pins { + function = "gpio"; + pins = "gpio20"; + bias-pull-up; + }; + + wl_on_pins: wl_on_pins { + function = "gpio"; + pins = "gpio28"; + }; + + bt_shutdown_pins: bt_shutdown_pins { + function = "gpio"; + pins = "gpio29"; + }; + + emmc_sd_pulls: emmc_sd_pulls { + pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; + bias-pull-up; + }; +}; + +/* uarta communicates with the BT module */ +&uarta { + uart-has-rtscts; + auto-flow-control; + status = "okay"; + clock-frequency = <96000000>; + pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>; + pinctrl-names = "default"; + + bluetooth: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + }; +}; + +&i2c_rp1boot { + clock-frequency = <400000>; + pinctrl-0 = <&i2c3_m4_agpio0_pins>; + pinctrl-names = "default"; +}; + +/ { + chosen: chosen { + bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1"; + stdout-path = "serial10:115200n8"; + }; + + fan: cooling_fan { + status = "disabled"; + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <3>; + cooling-levels = <0 75 125 175 250>; + pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>; + rpm-regmap = <&rp1_pwm1>; + rpm-offset = <0x3c>; + }; + + pwr_button { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&pwr_button_pins>; + status = "okay"; + + pwr_key: pwr { + label = "pwr_button"; + // linux,code = <205>; // KEY_SUSPEND + linux,code = <116>; // KEY_POWER + gpios = <&gio 20 GPIO_ACTIVE_LOW>; + debounce-interval = <50>; // ms + }; + }; +}; + +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; + +/* SDIO2 drives the WLAN interface */ +&sdio2 { + pinctrl-0 = <&sdio2_30_pins>; + pinctrl-names = "default"; + bus-width = <4>; + vmmc-supply = <&wl_on_reg>; + sd-uhs-ddr50; + non-removable; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + wifi: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + local-mac-address = [00 00 00 00 00 00]; + }; +}; + +&rpivid { + status = "okay"; +}; + +&pinctrl { + spi10_gpio2: spi10_gpio2 { + function = "vc_spi0"; + pins = "gpio2", "gpio3", "gpio4"; + bias-disable; + }; + + spi10_cs_gpio1: spi10_cs_gpio1 { + function = "gpio"; + pins = "gpio1"; + bias-pull-up; + }; +}; + +spi10_pins: &spi10_gpio2 {}; +spi10_cs_pins: &spi10_cs_gpio1 {}; + +&spi10 { + pinctrl-names = "default"; + cs-gpios = <&gio 1 1>; + pinctrl-0 = <&spi10_pins &spi10_cs_pins>; + + spidev10: spidev@0 { + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <20000000>; + status = "okay"; + }; +}; + +// ============================================= +// Board specific stuff here + +&gio_aon { + // Don't use GIO_AON as an interrupt controller because it will + // clash with the firmware monitoring the PMIC interrupt via the VPU. + + /delete-property/ interrupt-controller; +}; + +&main_aon_irq { + // Don't use the MAIN_AON_IRQ interrupt controller because it will + // clash with the firmware monitoring the PMIC interrupt via the VPU. + + status = "disabled"; +}; + +&rp1_pwm1 { + status = "disabled"; + pinctrl-0 = <&rp1_pwm1_gpio45>; + pinctrl-names = "default"; +}; + +&thermal_trips { + cpu_tepid: cpu-tepid { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_warm: cpu-warm { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_hot: cpu-hot { + temperature = <67500>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_vhot: cpu-vhot { + temperature = <75000>; + hysteresis = <5000>; + type = "active"; + }; +}; + +&cooling_maps { + tepid { + trip = <&cpu_tepid>; + cooling-device = <&fan 1 1>; + }; + + warm { + trip = <&cpu_warm>; + cooling-device = <&fan 2 2>; + }; + + hot { + trip = <&cpu_hot>; + cooling-device = <&fan 3 3>; + }; + + vhot { + trip = <&cpu_vhot>; + cooling-device = <&fan 4 4>; + }; + + melt { + trip = <&cpu_crit>; + cooling-device = <&fan 4 4>; + }; +}; + +&gio { + // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank + // to reduce the clutter in gpioinfo/pinctrl + brcm,gpio-bank-widths = <32 4>; + + gpio-line-names = + "-", // GPIO_000 + "2712_BOOT_CS_N", // GPIO_001 + "2712_BOOT_MISO", // GPIO_002 + "2712_BOOT_MOSI", // GPIO_003 + "2712_BOOT_SCLK", // GPIO_004 + "-", // GPIO_005 + "-", // GPIO_006 + "-", // GPIO_007 + "-", // GPIO_008 + "-", // GPIO_009 + "-", // GPIO_010 + "-", // GPIO_011 + "-", // GPIO_012 + "-", // GPIO_013 + "PCIE_SDA", // GPIO_014 + "PCIE_SCL", // GPIO_015 + "-", // GPIO_016 + "-", // GPIO_017 + "-", // GPIO_018 + "-", // GPIO_019 + "PWR_GPIO", // GPIO_020 + "2712_G21_FS", // GPIO_021 + "-", // GPIO_022 + "-", // GPIO_023 + "BT_RTS", // GPIO_024 + "BT_CTS", // GPIO_025 + "BT_TXD", // GPIO_026 + "BT_RXD", // GPIO_027 + "WL_ON", // GPIO_028 + "BT_ON", // GPIO_029 + "WIFI_SDIO_CLK", // GPIO_030 + "WIFI_SDIO_CMD", // GPIO_031 + "WIFI_SDIO_D0", // GPIO_032 + "WIFI_SDIO_D1", // GPIO_033 + "WIFI_SDIO_D2", // GPIO_034 + "WIFI_SDIO_D3"; // GPIO_035 +}; + +&gio_aon { + gpio-line-names = + "RP1_SDA", // AON_GPIO_00 + "RP1_SCL", // AON_GPIO_01 + "RP1_RUN", // AON_GPIO_02 + "SD_IOVDD_SEL", // AON_GPIO_03 + "SD_PWR_ON", // AON_GPIO_04 + "SD_CDET_N", // AON_GPIO_05 + "SD_FLG_N", // AON_GPIO_06 + "-", // AON_GPIO_07 + "2712_WAKE", // AON_GPIO_08 + "2712_STAT_LED", // AON_GPIO_09 + "-", // AON_GPIO_10 + "-", // AON_GPIO_11 + "PMIC_INT", // AON_GPIO_12 + "UART_TX_FS", // AON_GPIO_13 + "UART_RX_FS", // AON_GPIO_14 + "-", // AON_GPIO_15 + "-", // AON_GPIO_16 + + // Pad bank0 out to 32 entries + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + + "HDMI0_SCL", // AON_SGPIO_00 + "HDMI0_SDA", // AON_SGPIO_01 + "HDMI1_SCL", // AON_SGPIO_02 + "HDMI1_SDA", // AON_SGPIO_03 + "PMIC_SCL", // AON_SGPIO_04 + "PMIC_SDA"; // AON_SGPIO_05 + + rp1_run_hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RP1 RUN pin"; + }; +}; + +&rp1_gpio { + gpio-line-names = + "ID_SDA", // GPIO0 + "ID_SCL", // GPIO1 + "GPIO2", // GPIO2 + "GPIO3", // GPIO3 + "GPIO4", // GPIO4 + "GPIO5", // GPIO5 + "GPIO6", // GPIO6 + "GPIO7", // GPIO7 + "GPIO8", // GPIO8 + "GPIO9", // GPIO9 + "GPIO10", // GPIO10 + "GPIO11", // GPIO11 + "GPIO12", // GPIO12 + "GPIO13", // GPIO13 + "GPIO14", // GPIO14 + "GPIO15", // GPIO15 + "GPIO16", // GPIO16 + "GPIO17", // GPIO17 + "GPIO18", // GPIO18 + "GPIO19", // GPIO19 + "GPIO20", // GPIO20 + "GPIO21", // GPIO21 + "GPIO22", // GPIO22 + "GPIO23", // GPIO23 + "GPIO24", // GPIO24 + "GPIO25", // GPIO25 + "GPIO26", // GPIO26 + "GPIO27", // GPIO27 + + "PCIE_RP1_WAKE", // GPIO28 + "FAN_TACH", // GPIO29 + "HOST_SDA", // GPIO30 + "HOST_SCL", // GPIO31 + "ETH_RST_N", // GPIO32 + "-", // GPIO33 + + "CD0_IO0_MICCLK", // GPIO34 + "CD0_IO0_MICDAT0", // GPIO35 + "RP1_PCIE_CLKREQ_N", // GPIO36 + "-", // GPIO37 + "CD0_SDA", // GPIO38 + "CD0_SCL", // GPIO39 + "CD1_SDA", // GPIO40 + "CD1_SCL", // GPIO41 + "USB_VBUS_EN", // GPIO42 + "USB_OC_N", // GPIO43 + "RP1_STAT_LED", // GPIO44 + "FAN_PWM", // GPIO45 + "CD1_IO0_MICCLK", // GPIO46 + "2712_WAKE", // GPIO47 + "CD1_IO1_MICDAT1", // GPIO48 + "EN_MAX_USB_CUR", // GPIO49 + "-", // GPIO50 + "-", // GPIO51 + "-", // GPIO52 + "-"; // GPIO53 + + usb_vbus_pins: usb_vbus_pins { + function = "vbus1"; + pins = "gpio42", "gpio43"; + }; +}; + +/ { + aliases: aliases { + blconfig = &blconfig; + bluetooth = &bluetooth; + console = &uart10; + ethernet0 = &rp1_eth; + wifi0 = &wifi; + fb = &fb; + mailbox = &mailbox; + mmc0 = &sdio1; + uart0 = &uart0; + uart1 = &uart1; + uart2 = &uart2; + uart3 = &uart3; + uart4 = &uart4; + uart10 = &uart10; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial10 = &uart10; + i2c = &i2c_arm; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c10 = &i2c_rp1boot; + // Bit-bashed i2c_gpios start at 10 + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + spi10 = &spi10; + gpio0 = &gpio; + gpio1 = &gio; + gpio2 = &gio_aon; + gpio3 = &pinctrl; + gpio4 = &pinctrl_aon; + usb0 = &rp1_usb0; + usb1 = &rp1_usb1; + drm-dsi1 = &dsi0; + drm-dsi2 = &dsi1; + }; + + __overrides__ { + bdaddr = <&bluetooth>, "local-bd-address["; + button_debounce = <&pwr_key>, "debounce-interval:0"; + cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status"; + uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0; + i2c0 = <&i2c0>, "status"; + i2c1 = <&i2c1>, "status"; + i2c = <&i2c1>, "status"; + i2c_arm = <&i2c_arm>, "status"; + i2c_vc = <&i2c_vc>, "status"; + i2c_csi_dsi = <&i2c_csi_dsi>, "status"; + i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status"; + i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status"; + i2c0_baudrate = <&i2c0>, "clock-frequency:0"; + i2c1_baudrate = <&i2c1>, "clock-frequency:0"; + i2c_baudrate = <&i2c_arm>, "clock-frequency:0"; + i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0"; + i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0"; + krnbt = <&bluetooth>, "status"; + nvme = <&pciex1>, "status"; + pciex1 = <&pciex1>, "status"; + pciex1_gen = <&pciex1> , "max-link-speed:0"; + pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?"; + pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; + pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; + random = <&random>, "status"; + rtc = <&rpi_rtc>, "status"; + rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0"; + spi = <&spi0>, "status"; + suspend = <&pwr_key>, "linux,code:0=205"; + uart0 = <&uart0>, "status"; + wifiaddr = <&wifi>, "local-mac-address["; + + act_led_gpio = <&led_act>,"gpios:4",<&led_act>,"gpios:0=",<&gpio>; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>, "linux,default-trigger"; + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>, "gpios:8"; + pwr_led_trigger = <&led_pwr>, "linux,default-trigger"; + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; + drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0; + drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1; + drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi; + drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4; + drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0; + drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1; + drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi; + drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4; + drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0; + drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1; + drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi; + drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4; + + fan_temp0 = <&cpu_tepid>,"temperature:0"; + fan_temp1 = <&cpu_warm>,"temperature:0"; + fan_temp2 = <&cpu_hot>,"temperature:0"; + fan_temp3 = <&cpu_vhot>,"temperature:0"; + fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0"; + fan_temp1_hyst = <&cpu_warm>,"hysteresis:0"; + fan_temp2_hyst = <&cpu_hot>,"hysteresis:0"; + fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0"; + fan_temp0_speed = <&fan>, "cooling-levels:4"; + fan_temp1_speed = <&fan>, "cooling-levels:8"; + fan_temp2_speed = <&fan>, "cooling-levels:12"; + fan_temp3_speed = <&fan>, "cooling-levels:16"; + + dwc2_dr_mode = <&usb>, "dr_mode"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "bcm2712-rpi-cm5.dtsi" + +i2c_csi_dsi: &i2c_csi_dsi0 { }; // An alias for compatibility + +// The RP1 USB3 interfaces are not usable on CM4IO + +&rp1_usb0 { + status = "disabled"; +}; + +&rp1_usb1 { + status = "disabled"; +}; + +/ { + __overrides__ { + i2c_csi_dsi = <&i2c_csi_dsi>, "status"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "bcm2712-rpi-cm5.dtsi" + +i2c_csi_dsi: &i2c_csi_dsi0 { }; // An alias for compatibility + +/ { + __overrides__ { + i2c_csi_dsi = <&i2c_csi_dsi>, "status"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi @@ -0,0 +1,859 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include + +#define i2c0 _i2c0 +#define i2c3 _i2c3 +#define i2c4 _i2c4 +#define i2c5 _i2c5 +#define i2c6 _i2c6 +#define i2c8 _i2c8 +#define i2s _i2s +#define pwm0 _pwm0 +#define pwm1 _pwm1 +#define spi0 _spi0 +#define spi3 _spi3 +#define spi4 _spi4 +#define spi5 _spi5 +#define spi6 _spi6 +#define uart0 _uart0 +#define uart2 _uart2 +#define uart5 _uart5 + +#include "bcm2712.dtsi" + +#undef i2c0 +#undef i2c3 +#undef i2c4 +#undef i2c5 +#undef i2c6 +#undef i2c8 +#undef i2s +#undef pwm0 +#undef pwm1 +#undef spi0 +#undef spi3 +#undef spi4 +#undef spi5 +#undef spi6 +#undef uart0 +#undef uart2 +#undef uart3 +#undef uart4 +#undef uart5 + +/ { + compatible = "raspberrypi,5-compute-model", "brcm,bcm2712"; + model = "Raspberry Pi Compute Module 5"; + + /* Will be filled by the bootloader */ + memory@0 { + device_type = "memory"; + reg = <0 0 0x28000000>; + }; + + leds: leds { + compatible = "gpio-leds"; + + led_pwr: led-pwr { + label = "PWR"; + gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "none"; + }; + + led_act: led-act { + label = "ACT"; + gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "mmc0"; + }; + }; + + sd_io_1v8_reg: sd_io_1v8_reg { + compatible = "regulator-gpio"; + regulator-name = "vdd-sd-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-settling-time-us = <5000>; + gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1 + 3300000 0x0>; + status = "okay"; + }; + + sd_vcc_reg: sd_vcc_reg { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wl_on_reg: wl_on_reg { + compatible = "regulator-fixed"; + regulator-name = "wl-on-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-0 = <&wl_on_pins>; + pinctrl-names = "default"; + + gpio = <&gio 28 GPIO_ACTIVE_HIGH>; + + startup-delay-us = <150000>; + enable-active-high; + }; + + clocks: clocks { + }; + + cam1_clk: cam1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_clk: cam0_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_reg: cam0_reg { + compatible = "regulator-fixed"; + regulator-name = "cam0_reg"; + enable-active-high; + status = "okay"; + gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to CAM_GPIO on connector + }; + + cam_dummy_reg: cam_dummy_reg { + compatible = "regulator-fixed"; + regulator-name = "cam-dummy-reg"; + status = "okay"; + }; + + dummy: dummy { + // A target for unwanted overlay fragments + }; + + + // A few extra labels to keep overlays happy + + i2c0if: i2c0if {}; + i2c0mux: i2c0mux {}; +}; + +rp1_target: &pcie2 { + brcm,enable-mps-rcb; + brcm,vdm-qos-map = <0xbbaa9888>; + aspm-no-l0s; + status = "okay"; +}; + +// Add some labels to 2712 device + +// The system UART +uart10: &_uart0 { status = "okay"; }; + +// The system SPI for the bootloader EEPROM +spi10: &_spi0 { status = "okay"; }; + +i2c_rp1boot: &_i2c3 { }; + +#include "rp1.dtsi" + +&rp1 { + // PCIe address space layout: + // 00_00000000-00_00xxxxxx = RP1 peripherals + // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM + + // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx + // This is the RP1 peripheral space + ranges = <0xc0 0x40000000 + 0x02000000 0x00 0x00000000 + 0x00 0x00400000>; + + dma-ranges = + // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx + <0x10 0x00000000 + 0x43000000 0x10 0x00000000 + 0x10 0x00000000>, + + // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx + // This allows the RP1 DMA controller to address RP1 hardware + <0xc0 0x40000000 + 0x02000000 0x0 0x00000000 + 0x0 0x00400000>, + + // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx + <0x00 0x00000000 + 0x02000000 0x10 0x00000000 + 0x10 0x00000000>; +}; + +// Expose RP1 nodes as system nodes with labels + +&rp1_dma { + status = "okay"; +}; + +&rp1_eth { + status = "okay"; + phy-handle = <&phy1>; + phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>; + phy-reset-duration = <5>; + + phy1: ethernet-phy@1 { + reg = <0x1>; + brcm,powerdown-enable; + interrupt-parent = <&gpio>; + interrupts = <37 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +gpio: &rp1_gpio { + status = "okay"; +}; + +aux: &dummy {}; + +&rp1_usb0 { + pinctrl-0 = <&usb_vbus_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rp1_usb1 { + status = "okay"; +}; + +#include "bcm2712-rpi.dtsi" + +i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only + pinctrl-0 = <&rp1_i2c6_38_39>; + pinctrl-names = "default"; + clock-frequency = <100000>; +}; + +i2c_csi_dsi1: &i2c0 { // Note: This is for MIPI1 connector +}; + +i2c_csi_dsi: &i2c_csi_dsi0 { }; // An alias for compatibility + +cam1_reg: &cam0_reg { // Shares CAM_GPIO with cam0_reg +}; + +csi0: &rp1_csi0 { }; +csi1: &rp1_csi1 { }; +dsi0: &rp1_dsi0 { }; +dsi1: &rp1_dsi1 { }; +dpi: &rp1_dpi { }; +vec: &rp1_vec { }; +dpi_gpio0: &rp1_dpi_24bit_gpio0 { }; +dpi_gpio1: &rp1_dpi_24bit_gpio2 { }; +dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { }; +dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { }; +dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { }; +dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { }; +dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { }; +dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { }; +dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { }; +dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { }; + +/* Add the IOMMUs for some RP1 bus masters */ + +&csi0 { + iommus = <&iommu5>; +}; + +&csi1 { + iommus = <&iommu5>; +}; + +&dsi0 { + iommus = <&iommu5>; +}; + +&dsi1 { + iommus = <&iommu5>; +}; + +&dpi { + iommus = <&iommu5>; +}; + +&vec { + iommus = <&iommu5>; +}; + +&ddc0 { + status = "disabled"; +}; + +&ddc1 { + status = "disabled"; +}; + +&hdmi0 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + status = "disabled"; +}; + +&hdmi1 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + status = "disabled"; +}; + +&hvs { + clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; + clock-names = "core", "disp"; +}; + +&mop { + status = "disabled"; +}; + +&moplet { + status = "disabled"; +}; + +&pixelvalve0 { + status = "disabled"; +}; + +&pixelvalve1 { + status = "disabled"; +}; + +&disp_intr { + status = "disabled"; +}; + +/* SDIO1 is used to drive the eMMC/SD card */ +&sdio1 { + pinctrl-0 = <&emmc_cmddat_pulls>, <&emmc_ds_pull>, <&emmc_aon_cd_pins>; + pinctrl-names = "default"; + vqmmc-supply = <&sd_io_1v8_reg>; + vmmc-supply = <&sd_vcc_reg>; + bus-width = <8>; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr104; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + broken-cd; + status = "okay"; +}; + +&pinctrl_aon { + emmc_aon_cd_pins: emmc_aon_cd_pins { + function = "sd_card_g"; + pins = "aon_gpio5"; + bias-pull-up; + }; + + /* Slight hack - only one PWM pin (status LED) is usable */ + aon_pwm_1pin: aon_pwm_1pin { + function = "aon_pwm"; + pins = "aon_gpio9"; + }; +}; + +&pinctrl { + pwr_button_pins: pwr_button_pins { + function = "gpio"; + pins = "gpio20"; + bias-pull-up; + }; + + wl_on_pins: wl_on_pins { + function = "gpio"; + pins = "gpio28"; + }; + + bt_shutdown_pins: bt_shutdown_pins { + function = "gpio"; + pins = "gpio29"; + }; + + emmc_ds_pull: emmc_ds_pull { + pins = "emmc_ds"; + bias-pull-down; + }; + + emmc_cmddat_pulls: emmc_cmddat_pulls { + pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3", + "emmc_dat4", "emmc_dat5", "emmc_dat6", "emmc_dat7"; + bias-pull-up; + }; +}; + +/* uarta communicates with the BT module */ +&uarta { + uart-has-rtscts; + auto-flow-control; + status = "okay"; + clock-frequency = <96000000>; + pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>; + pinctrl-names = "default"; + + bluetooth: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + }; +}; + +&i2c_rp1boot { + clock-frequency = <400000>; + pinctrl-0 = <&i2c3_m4_agpio0_pins>; + pinctrl-names = "default"; +}; + +/ { + chosen: chosen { + bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1"; + stdout-path = "serial10:115200n8"; + }; + + fan: cooling_fan { + status = "disabled"; + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <3>; + cooling-levels = <0 75 125 175 250>; + pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>; + rpm-regmap = <&rp1_pwm1>; + rpm-offset = <0x3c>; + }; + + pwr_button { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&pwr_button_pins>; + status = "okay"; + + pwr_key: pwr { + label = "pwr_button"; + // linux,code = <205>; // KEY_SUSPEND + linux,code = <116>; // KEY_POWER + gpios = <&gio 20 GPIO_ACTIVE_LOW>; + debounce-interval = <50>; // ms + }; + }; +}; + +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; + +/* SDIO2 drives the WLAN interface */ +&sdio2 { + pinctrl-0 = <&sdio2_30_pins>; + pinctrl-names = "default"; + bus-width = <4>; + vmmc-supply = <&wl_on_reg>; + sd-uhs-ddr50; + non-removable; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + wifi: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + local-mac-address = [00 00 00 00 00 00]; + }; +}; + +&rpivid { + status = "okay"; +}; + +&pinctrl { + spi10_gpio2: spi10_gpio2 { + function = "vc_spi0"; + pins = "gpio2", "gpio3", "gpio4"; + bias-disable; + }; + + spi10_cs_gpio1: spi10_cs_gpio1 { + function = "gpio"; + pins = "gpio1"; + bias-pull-up; + }; +}; + +spi10_pins: &spi10_gpio2 {}; +spi10_cs_pins: &spi10_cs_gpio1 {}; + +&spi10 { + pinctrl-names = "default"; + cs-gpios = <&gio 1 1>; + pinctrl-0 = <&spi10_pins &spi10_cs_pins>; + + spidev10: spidev@0 { + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <20000000>; + status = "okay"; + }; +}; + +// ============================================= +// Board specific stuff here + +&gio_aon { + // Don't use GIO_AON as an interrupt controller because it will + // clash with the firmware monitoring the PMIC interrupt via the VPU. + + /delete-property/ interrupt-controller; +}; + +&main_aon_irq { + // Don't use the MAIN_AON_IRQ interrupt controller because it will + // clash with the firmware monitoring the PMIC interrupt via the VPU. + + status = "disabled"; +}; + +&rp1_pwm1 { + status = "disabled"; + pinctrl-0 = <&rp1_pwm1_gpio45>; + pinctrl-names = "default"; +}; + +&thermal_trips { + cpu_tepid: cpu-tepid { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_warm: cpu-warm { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_hot: cpu-hot { + temperature = <67500>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_vhot: cpu-vhot { + temperature = <75000>; + hysteresis = <5000>; + type = "active"; + }; +}; + +&cooling_maps { + tepid { + trip = <&cpu_tepid>; + cooling-device = <&fan 1 1>; + }; + + warm { + trip = <&cpu_warm>; + cooling-device = <&fan 2 2>; + }; + + hot { + trip = <&cpu_hot>; + cooling-device = <&fan 3 3>; + }; + + vhot { + trip = <&cpu_vhot>; + cooling-device = <&fan 4 4>; + }; + + melt { + trip = <&cpu_crit>; + cooling-device = <&fan 4 4>; + }; +}; + +&gio { + // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank + // to reduce the clutter in gpioinfo/pinctrl + brcm,gpio-bank-widths = <32 4>; + + gpio-line-names = + "-", // GPIO_000 + "2712_BOOT_CS_N", // GPIO_001 + "2712_BOOT_MISO", // GPIO_002 + "2712_BOOT_MOSI", // GPIO_003 + "2712_BOOT_SCLK", // GPIO_004 + "-", // GPIO_005 + "-", // GPIO_006 + "-", // GPIO_007 + "-", // GPIO_008 + "-", // GPIO_009 + "-", // GPIO_010 + "-", // GPIO_011 + "-", // GPIO_012 + "-", // GPIO_013 + "-", // GPIO_014 + "-", // GPIO_015 + "-", // GPIO_016 + "-", // GPIO_017 + "-", // GPIO_018 + "-", // GPIO_019 + "PWR_GPIO", // GPIO_020 + "2712_G21_FS", // GPIO_021 + "-", // GPIO_022 + "-", // GPIO_023 + "BT_RTS", // GPIO_024 + "BT_CTS", // GPIO_025 + "BT_TXD", // GPIO_026 + "BT_RXD", // GPIO_027 + "WL_ON", // GPIO_028 + "BT_ON", // GPIO_029 + "WIFI_SDIO_CLK", // GPIO_030 + "WIFI_SDIO_CMD", // GPIO_031 + "WIFI_SDIO_D0", // GPIO_032 + "WIFI_SDIO_D1", // GPIO_033 + "WIFI_SDIO_D2", // GPIO_034 + "WIFI_SDIO_D3"; // GPIO_035 +}; + +&gio_aon { + gpio-line-names = + "RP1_SDA", // AON_GPIO_00 + "RP1_SCL", // AON_GPIO_01 + "RP1_RUN", // AON_GPIO_02 + "SD_IOVDD_SEL", // AON_GPIO_03 + "SD_PWR_ON", // AON_GPIO_04 + "ANT1", // AON_GPIO_05 + "ANT2", // AON_GPIO_06 + "-", // AON_GPIO_07 + "2712_WAKE", // AON_GPIO_08 + "2712_STAT_LED", // AON_GPIO_09 + "-", // AON_GPIO_10 + "-", // AON_GPIO_11 + "PMIC_INT", // AON_GPIO_12 + "UART_TX_FS", // AON_GPIO_13 + "UART_RX_FS", // AON_GPIO_14 + "-", // AON_GPIO_15 + "-", // AON_GPIO_16 + + // Pad bank0 out to 32 entries + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + + "HDMI0_SCL", // AON_SGPIO_00 + "HDMI0_SDA", // AON_SGPIO_01 + "HDMI1_SCL", // AON_SGPIO_02 + "HDMI1_SDA", // AON_SGPIO_03 + "PMIC_SCL", // AON_SGPIO_04 + "PMIC_SDA"; // AON_SGPIO_05 + + rp1_run_hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RP1 RUN pin"; + }; +}; + +&rp1_gpio { + gpio-line-names = + "ID_SDA", // GPIO0 + "ID_SCL", // GPIO1 + "GPIO2", // GPIO2 + "GPIO3", // GPIO3 + "GPIO4", // GPIO4 + "GPIO5", // GPIO5 + "GPIO6", // GPIO6 + "GPIO7", // GPIO7 + "GPIO8", // GPIO8 + "GPIO9", // GPIO9 + "GPIO10", // GPIO10 + "GPIO11", // GPIO11 + "GPIO12", // GPIO12 + "GPIO13", // GPIO13 + "GPIO14", // GPIO14 + "GPIO15", // GPIO15 + "GPIO16", // GPIO16 + "GPIO17", // GPIO17 + "GPIO18", // GPIO18 + "GPIO19", // GPIO19 + "GPIO20", // GPIO20 + "GPIO21", // GPIO21 + "GPIO22", // GPIO22 + "GPIO23", // GPIO23 + "GPIO24", // GPIO24 + "GPIO25", // GPIO25 + "GPIO26", // GPIO26 + "GPIO27", // GPIO27 + + "PCIE_PWR_EN", // GPIO28 + "FAN_TACH", // GPIO29 + "HOST_SDA", // GPIO30 + "HOST_SCL", // GPIO31 + "ETH_RST_N", // GPIO32 + "PCIE_DET_WAKE", // GPIO33 + + "CD0_IO0_MICCLK", // GPIO34 + "CD0_IO0_MICDAT0", // GPIO35 + "RP1_PCIE_CLKREQ_N", // GPIO36 + "ETH_IRQ_N", // GPIO37 + "SDA0", // GPIO38 + "SCL0", // GPIO39 + "-", // GPIO40 + "-", // GPIO41 + "USB_VBUS_EN", // GPIO42 + "USB_OC_N", // GPIO43 + "RP1_STAT_LED", // GPIO44 + "FAN_PWM", // GPIO45 + "-", // GPIO46 + "2712_WAKE", // GPIO47 + "-", // GPIO48 + "-", // GPIO49 + "-", // GPIO50 + "-", // GPIO51 + "-", // GPIO52 + "-"; // GPIO53 + + usb_vbus_pins: usb_vbus_pins { + function = "vbus1"; + pins = "gpio42", "gpio43"; + }; +}; + +/ { + aliases: aliases { + blconfig = &blconfig; + bluetooth = &bluetooth; + console = &uart10; + ethernet0 = &rp1_eth; + wifi0 = &wifi; + fb = &fb; + mailbox = &mailbox; + mmc0 = &sdio1; + uart0 = &uart0; + uart1 = &uart1; + uart2 = &uart2; + uart3 = &uart3; + uart4 = &uart4; + uart10 = &uart10; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial10 = &uart10; + i2c = &i2c_arm; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c10 = &i2c_rp1boot; + // Bit-bashed i2c_gpios start at 10 + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + spi10 = &spi10; + gpio0 = &gpio; + gpio1 = &gio; + gpio2 = &gio_aon; + gpio3 = &pinctrl; + gpio4 = &pinctrl_aon; + usb0 = &rp1_usb0; + usb1 = &rp1_usb1; + drm-dsi1 = &dsi0; + drm-dsi2 = &dsi1; + }; + + __overrides__ { + bdaddr = <&bluetooth>, "local-bd-address["; + button_debounce = <&pwr_key>, "debounce-interval:0"; + cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status"; + uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0; + i2c0 = <&i2c0>, "status"; + i2c1 = <&i2c1>, "status"; + i2c = <&i2c1>, "status"; + i2c_arm = <&i2c_arm>, "status"; + i2c_vc = <&i2c_vc>, "status"; + i2c_csi_dsi = <&i2c_csi_dsi>, "status"; + i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status"; + i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status"; + i2c0_baudrate = <&i2c0>, "clock-frequency:0"; + i2c1_baudrate = <&i2c1>, "clock-frequency:0"; + i2c_baudrate = <&i2c_arm>, "clock-frequency:0"; + i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0"; + i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0"; + krnbt = <&bluetooth>, "status"; + nvme = <&pciex1>, "status"; + pciex1 = <&pciex1>, "status"; + pciex1_gen = <&pciex1> , "max-link-speed:0"; + pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?"; + pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; + pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; + random = <&random>, "status"; + rtc = <&rpi_rtc>, "status"; + rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0"; + spi = <&spi0>, "status"; + suspend = <&pwr_key>, "linux,code:0=205"; + uart0 = <&uart0>, "status"; + wifiaddr = <&wifi>, "local-mac-address["; + + act_led_activelow = <&led_act>, "active-low?"; + act_led_trigger = <&led_act>, "linux,default-trigger"; + pwr_led_activelow = <&led_pwr>, "gpios:8"; + pwr_led_trigger = <&led_pwr>, "linux,default-trigger"; + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; + drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0; + drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1; + drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi; + drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4; + drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0; + drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1; + drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi; + drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4; + drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0; + drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1; + drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi; + drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4; + + fan_temp0 = <&cpu_tepid>,"temperature:0"; + fan_temp1 = <&cpu_warm>,"temperature:0"; + fan_temp2 = <&cpu_hot>,"temperature:0"; + fan_temp3 = <&cpu_vhot>,"temperature:0"; + fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0"; + fan_temp1_hyst = <&cpu_warm>,"hysteresis:0"; + fan_temp2_hyst = <&cpu_hot>,"hysteresis:0"; + fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0"; + fan_temp0_speed = <&fan>, "cooling-levels:4"; + fan_temp1_speed = <&fan>, "cooling-levels:8"; + fan_temp2_speed = <&fan>, "cooling-levels:12"; + fan_temp3_speed = <&fan>, "cooling-levels:16"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi @@ -0,0 +1,288 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +&soc { + firmware: firmware { + compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + + mboxes = <&mailbox>; + dma-ranges; + + firmware_clocks: clocks { + compatible = "raspberrypi,firmware-clocks"; + #clock-cells = <1>; + }; + + reset: reset { + compatible = "raspberrypi,firmware-reset"; + #reset-cells = <1>; + }; + + vcio: vcio { + compatible = "raspberrypi,vcio"; + }; + }; + + power: power { + compatible = "raspberrypi,bcm2835-power"; + firmware = <&firmware>; + #power-domain-cells = <1>; + }; + + fb: fb { + compatible = "brcm,bcm2708-fb"; + firmware = <&firmware>; + status = "okay"; + }; + + rpi_rtc: rpi_rtc { + compatible = "raspberrypi,rpi-rtc"; + firmware = <&firmware>; + status = "okay"; + trickle-charge-microvolt = <0>; + }; + + /* Define these notional regulators for use by overlays, etc. */ + vdd_3v3_reg: fixedregulator_3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3"; + }; + + vdd_5v0_reg: fixedregulator_5v0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "5v0"; + }; +}; + +/ { + __overrides__ { + arm_freq; + axiperf = <&axiperf>,"status"; + }; +}; + +pciex1: &pcie1 { }; +pciex4: &pcie2 { }; + +&dma32 { + /* The VPU firmware uses DMA channel 11 for VCHIQ */ + brcm,dma-channel-mask = <0x03f>; +}; + +&dma40 { + /* The VPU firmware DMA channel 11 for VCHIQ */ + brcm,dma-channel-mask = <0x07c0>; +}; + +&hdmi0 { + dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; +}; + +&hdmi1 { + dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; +}; + +&spi10 { + dmas = <&dma40 6>, <&dma40 7>; + dma-names = "tx", "rx"; +}; + +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; + +&rmem { + /* + * RPi4's co-processor will copy the board's bootloader configuration + * into memory for the OS to consume. It'll also update this node with + * its placement information. + */ + blconfig: nvram@0 { + compatible = "raspberrypi,bootloader-config", "nvmem-rmem"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x0 0x0>; + no-map; + status = "disabled"; + }; +}; + +&rp1_adc { + status = "okay"; +}; + +/* Add some gpiomem nodes to make the devices accessible to userspace. + * /dev/gpiomem should expose the registers for the interface with DT alias + * gpio. + */ + +&rp1 { + gpiomem@d0000 { + /* Export IO_BANKs, RIO_BANKs and PADS_BANKs to userspace */ + compatible = "raspberrypi,gpiomem"; + reg = <0xc0 0x400d0000 0x0 0x30000>; + chardev-name = "gpiomem0"; + }; +}; + +&soc { + gpiomem@7d508500 { + compatible = "raspberrypi,gpiomem"; + reg = <0x7d508500 0x40>; + chardev-name = "gpiomem1"; + }; + + gpiomem@7d517c00 { + compatible = "raspberrypi,gpiomem"; + reg = <0x7d517c00 0x40>; + chardev-name = "gpiomem2"; + }; + + gpiomem@7d504100 { + compatible = "raspberrypi,gpiomem"; + reg = <0x7d504100 0x20>; + chardev-name = "gpiomem3"; + }; + + gpiomem@7d510700 { + compatible = "raspberrypi,gpiomem"; + reg = <0x7d510700 0x20>; + chardev-name = "gpiomem4"; + }; +}; + +i2c0: &rp1_i2c0 { }; +i2c1: &rp1_i2c1 { }; +i2c2: &rp1_i2c2 { }; +i2c3: &rp1_i2c3 { }; +i2c4: &rp1_i2c4 { }; +i2c5: &rp1_i2c5 { }; +i2c6: &rp1_i2c6 { }; +i2s: &rp1_i2s0 { }; +i2s_clk_producer: &rp1_i2s0 { }; +i2s_clk_consumer: &rp1_i2s1 { }; +pwm0: &rp1_pwm0 { }; +pwm1: &rp1_pwm1 { }; +pwm: &pwm0 { }; +spi0: &rp1_spi0 { }; +spi1: &rp1_spi1 { }; +spi2: &rp1_spi2 { }; +spi3: &rp1_spi3 { }; +spi4: &rp1_spi4 { }; +spi5: &rp1_spi5 { }; + +uart0_pins: &rp1_uart0_14_15 {}; +uart0_ctsrts_pins: &rp1_uart0_ctsrts_16_17 {}; +uart0: &rp1_uart0 { + pinctrl-0 = <&uart0_pins>; +}; + +uart1_pins: &rp1_uart1_0_1 {}; +uart1_ctsrts_pins: &rp1_uart1_ctsrts_2_3 {}; +uart1: &rp1_uart1 { }; + +uart2_pins: &rp1_uart2_4_5 {}; +uart2_ctsrts_pins: &rp1_uart2_ctsrts_6_7 {}; +uart2: &rp1_uart2 { }; + +uart3_pins: &rp1_uart3_8_9 {}; +uart3_ctsrts_pins: &rp1_uart3_ctsrts_10_11 {}; +uart3: &rp1_uart3 { }; + +uart4_pins: &rp1_uart4_12_13 {}; +uart4_ctsrts_pins: &rp1_uart4_ctsrts_14_15 {}; +uart4: &rp1_uart4 { }; + +i2c0_pins: &rp1_i2c0_0_1 {}; +i2c_vc: &i2c0 { // This is pins 27,28 on the header (not MIPI) + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; +}; + +i2c1_pins: &rp1_i2c1_2_3 {}; +i2c_arm: &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +i2c2_pins: &rp1_i2c2_4_5 {}; +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + +i2c3_pins: &rp1_i2c3_6_7 {}; +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; +}; + +&i2s_clk_producer { + pinctrl-names = "default"; + pinctrl-0 = <&rp1_i2s0_18_21>; +}; + +&i2s_clk_consumer { + pinctrl-names = "default"; + pinctrl-0 = <&rp1_i2s1_18_21>; +}; + +spi0_pins: &rp1_spi0_gpio9 {}; +spi0_cs_pins: &rp1_spi0_cs_gpio7 {}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0 { + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1 { + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +spi2_pins: &rp1_spi2_gpio1 {}; +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins>; +}; + +spi3_pins: &rp1_spi3_gpio5 {}; +&spi3 { + pinctrl-names = "default"; + pinctrl-0 = <&spi3_pins>; +}; + +spi4_pins: &rp1_spi4_gpio9 {}; +&spi4 { + pinctrl-names = "default"; + pinctrl-0 = <&spi4_pins>; +}; + +spi5_pins: &rp1_spi5_gpio13 {}; +&spi5 { + pinctrl-names = "default"; + pinctrl-0 = <&spi5_pins>; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2712.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2712.dtsi @@ -0,0 +1,1228 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include + +/ { + compatible = "brcm,bcm2712", "brcm,bcm2711"; + model = "BCM2712"; + + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gicv2>; + + rmem: reserved-memory { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + atf@0 { + reg = <0x0 0x0 0x80000>; + no-map; + }; + + cma: linux,cma { + compatible = "shared-dma-pool"; + size = <0x4000000>; /* 64MB */ + reusable; + linux,cma-default; + + /* + * arm64 reserves the CMA by default somewhere in + * ZONE_DMA32, that's not good enough for the BCM2711 + * as some devices can only address the lower 1G of + * memory (ZONE_DMA). + */ + alloc-ranges = <0x0 0x00000000 0x40000000>; + }; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <2000>; + polling-delay = <1000>; + coefficients = <(-550) 450000>; + thermal-sensors = <&thermal>; + + thermal_trips: trips { + cpu_crit: cpu-crit { + temperature = <110000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling_maps: cooling-maps { + }; + }; + }; + + clk_27MHz: clk-27M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "27MHz-clock"; + }; + + clk_108MHz: clk-108M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <108000000>; + clock-output-names = "108MHz-clock"; + }; + + hvs: hvs@107c580000 { + compatible = "brcm,bcm2712-hvs"; + reg = <0x10 0x7c580000 0x1a000>; + interrupt-parent = <&disp_intr>; + interrupts = <2>, <9>, <16>; + interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof"; + //iommus = <&iommu4>; + status = "disabled"; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x7c000000 0x10 0x7c000000 0x04000000>; + /* Emulate a contiguous 30-bit address range for DMA */ + dma-ranges = <0xc0000000 0x00 0x00000000 0x40000000>, + <0x7c000000 0x10 0x7c000000 0x04000000>; + + system_timer: timer@7c003000 { + compatible = "brcm,bcm2835-system-timer"; + reg = <0x7c003000 0x1000>; + interrupts = , + , + , + ; + clock-frequency = <1000000>; + }; + + firmwarekms: firmwarekms@7d503000 { + compatible = "raspberrypi,rpi-firmware-kms-2712"; + /* SUN_L2 interrupt reg */ + reg = <0x7d503000 0x18>; + interrupt-parent = <&cpu_l2_irq>; + interrupts = <19>; + brcm,firmware = <&firmware>; + status = "disabled"; + }; + + axiperf: axiperf { + compatible = "brcm,bcm2712-axiperf"; + reg = <0x7c012800 0x100>, + <0x7e000000 0x100>; + firmware = <&firmware>; + status = "disabled"; + }; + + mailbox: mailbox@7c013880 { + compatible = "brcm,bcm2835-mbox"; + reg = <0x7c013880 0x40>; + interrupts = ; + #mbox-cells = <0>; + }; + + pixelvalve0: pixelvalve@7c410000 { + compatible = "brcm,bcm2712-pixelvalve0"; + reg = <0x7c410000 0x100>; + interrupts = ; + status = "disabled"; + }; + + pixelvalve1: pixelvalve@7c411000 { + compatible = "brcm,bcm2712-pixelvalve1"; + reg = <0x7c411000 0x100>; + interrupts = ; + status = "disabled"; + }; + + mop: mop@7c500000 { + compatible = "brcm,bcm2712-mop"; + reg = <0x7c500000 0x28>; + interrupt-parent = <&disp_intr>; + interrupts = <1>; + status = "disabled"; + }; + + moplet: moplet@7c501000 { + compatible = "brcm,bcm2712-moplet"; + reg = <0x7c501000 0x20>; + interrupt-parent = <&disp_intr>; + interrupts = <0>; + status = "disabled"; + }; + + disp_intr: interrupt-controller@7c502000 { + compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; + reg = <0x7c502000 0x30>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + status = "disabled"; + }; + + dvp: clock@7c700000 { + compatible = "brcm,brcm2711-dvp"; + reg = <0x7c700000 0x10>; + clocks = <&clk_108MHz>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + /* + * This node is the provider for the enable-method for + * bringing up secondary cores. + */ + local_intc: local_intc@7cd00000 { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x7cd00000 0x100>; + }; + + uart0: serial@7d001000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7d001000 0x200>; + interrupts = ; + clocks = <&clk_uart>, + <&clk_vpu>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + uart2: serial@7d001400 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7d001400 0x200>; + interrupts = ; + clocks = <&clk_uart>, + <&clk_vpu>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + uart5: serial@7d001a00 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7d001a00 0x200>; + interrupts = ; + clocks = <&clk_uart>, + <&clk_vpu>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + sdhost: mmc@7d002000 { + compatible = "brcm,bcm2835-sdhost"; + reg = <0x7d002000 0x100>; + //interrupts = ; + clocks = <&clk_vpu>; + status = "disabled"; + }; + + i2s: i2s@7d003000 { + compatible = "brcm,bcm2835-i2s"; + reg = <0x7d003000 0x24>; + //clocks = <&cprman BCM2835_CLOCK_PCM>; + status = "disabled"; + }; + + spi0: spi@7d004000 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004000 0x200>; + interrupts = ; + clocks = <&clk_vpu>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi3: spi@7d004600 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004600 0x0200>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi4: spi@7d004800 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004800 0x0200>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi5: spi@7d004a00 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004a00 0x0200>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi6: spi@7d004c00 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004c00 0x0200>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c0: i2c@7d005000 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005000 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@7d005600 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005600 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@7d005800 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005800 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c5: i2c@7d005a00 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005a00 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c6: i2c@7d005c00 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005c00 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c8: i2c@7d005e00 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005e00 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pwm0: pwm@7d00c000 { + compatible = "brcm,bcm2835-pwm"; + reg = <0x7d00c000 0x28>; + assigned-clock-rates = <10000000>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm1: pwm@7d00c800 { + compatible = "brcm,bcm2835-pwm"; + reg = <0x7d00c800 0x28>; + assigned-clock-rates = <10000000>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pm: watchdog@7d200000 { + compatible = "brcm,bcm2712-pm"; + reg = <0x7d200000 0x308>; + reg-names = "pm"; + #power-domain-cells = <1>; + #reset-cells = <1>; + //clocks = <&cprman BCM2835_CLOCK_V3D>, + // <&cprman BCM2835_CLOCK_PERI_IMAGE>, + // <&cprman BCM2835_CLOCK_H264>, + // <&cprman BCM2835_CLOCK_ISP>; + clock-names = "v3d", "peri_image", "h264", "isp"; + system-power-controller; + }; + + cprman: cprman@7d202000 { + compatible = "brcm,bcm2711-cprman"; + reg = <0x7d202000 0x2000>; + #clock-cells = <1>; + + /* CPRMAN derives almost everything from the + * platform's oscillator. However, the DSI + * pixel clocks come from the DSI analog PHY. + */ + clocks = <&clk_osc>; + status = "disabled"; + }; + + random: rng@7d208000 { + compatible = "brcm,bcm2711-rng200"; + reg = <0x7d208000 0x28>; + status = "okay"; + }; + + cpu_l2_irq: intc@7d503000 { + compatible = "brcm,l2-intc"; + reg = <0x7d503000 0x18>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + pinctrl: pinctrl@7d504100 { + compatible = "brcm,bcm2712-pinctrl"; + reg = <0x7d504100 0x30>; + + uarta_24_pins: uarta_24_pins { + pin_rts { + function = "uart0"; + pins = "gpio24"; + bias-disable; + }; + pin_cts { + function = "uart0"; + pins = "gpio25"; + bias-pull-up; + }; + pin_txd { + function = "uart0"; + pins = "gpio26"; + bias-disable; + }; + pin_rxd { + function = "uart0"; + pins = "gpio27"; + bias-pull-up; + }; + }; + + sdio2_30_pins: sdio2_30_pins { + pin_clk { + function = "sd2"; + pins = "gpio30"; + bias-disable; + }; + pin_cmd { + function = "sd2"; + pins = "gpio31"; + bias-pull-up; + }; + pins_dat { + function = "sd2"; + pins = "gpio32", "gpio33", "gpio34", "gpio35"; + bias-pull-up; + }; + }; + }; + + ddc0: i2c@7d508200 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d508200 0x58>; + interrupt-parent = <&bsc_irq>; + interrupts = <1>; + clock-frequency = <97500>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + ddc1: i2c@7d508280 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d508280 0x58>; + interrupt-parent = <&bsc_irq>; + interrupts = <2>; + clock-frequency = <97500>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + bscd: i2c@7d508300 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d508300 0x58>; + interrupt-parent = <&bsc_irq>; + interrupts = <0>; + clock-frequency = <200000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + bsc_irq: intc@7d508380 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d508380 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + main_irq: intc@7d508400 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d508400 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gio: gpio@7d508500 { + compatible = "brcm,brcmstb-gpio"; + reg = <0x7d508500 0x40>; + interrupt-parent = <&main_irq>; + interrupts = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + brcm,gpio-bank-widths = <32 22>; + brcm,gpio-direct; + }; + + uarta: serial@7d50c000 { + compatible = "brcm,bcm7271-uart"; + reg = <0x7d50c000 0x20>; + reg-names = "uart"; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + skip-init; + status = "disabled"; + }; + + uartb: serial@7d50d000 { + compatible = "brcm,bcm7271-uart"; + reg = <0x7d50d000 0x20>; + reg-names = "uart"; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + skip-init; + status = "disabled"; + }; + + aon_intr: interrupt-controller@7d510600 { + compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; + reg = <0x7d510600 0x30>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + status = "disabled"; + }; + + pinctrl_aon: pinctrl@7d510700 { + compatible = "brcm,bcm2712-aon-pinctrl"; + reg = <0x7d510700 0x20>; + + i2c3_m4_agpio0_pins: i2c3_m4_agpio0_pins { + function = "vc_i2c3"; + pins = "aon_gpio0", "aon_gpio1"; + bias-pull-up; + }; + + bsc_m1_agpio13_pins: bsc_m1_agpio13_pins { + function = "bsc_m1"; + pins = "aon_gpio13", "aon_gpio14"; + bias-pull-up; + }; + + bsc_pmu_sgpio4_pins: bsc_pmu_sgpio4_pins { + function = "avs_pmu_bsc"; + pins = "aon_sgpio4", "aon_sgpio5"; + }; + + bsc_m2_sgpio4_pins: bsc_m2_sgpio4_pins { + function = "bsc_m2"; + pins = "aon_sgpio4", "aon_sgpio5"; + }; + + pwm_aon_agpio1_pins: pwm_aon_agpio1_pins { + function = "aon_pwm"; + pins = "aon_gpio1", "aon_gpio2"; + }; + + pwm_aon_agpio4_pins: pwm_aon_agpio4_pins { + function = "vc_pwm0"; + pins = "aon_gpio4", "aon_gpio5"; + }; + + pwm_aon_agpio7_pins: pwm_aon_agpio7_pins { + function = "aon_pwm"; + pins = "aon_gpio7", "aon_gpio9"; + }; + }; + + intc@7d517000 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d517000 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + status = "disabled"; + }; + + bscc: i2c@7d517a00 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d517a00 0x58>; + interrupt-parent = <&bsc_aon_irq>; + interrupts = <0>; + clock-frequency = <200000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pwm_aon: pwm@7d517a80 { + compatible = "brcm,bcm7038-pwm"; + reg = <0x7d517a80 0x28>; + #pwm-cells = <3>; + clocks = <&clk_27MHz>; + }; + + main_aon_irq: intc@7d517ac0 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d517ac0 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + bsc_aon_irq: intc@7d517b00 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d517b00 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gio_aon: gpio@7d517c00 { + compatible = "brcm,brcmstb-gpio"; + reg = <0x7d517c00 0x40>; + interrupt-parent = <&main_aon_irq>; + interrupts = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + brcm,gpio-bank-widths = <17 6>; + brcm,gpio-direct; + }; + + avs_monitor: avs-monitor@7d542000 { + compatible = "brcm,bcm2711-avs-monitor", + "syscon", "simple-mfd"; + reg = <0x7d542000 0xf00>; + status = "okay"; + + thermal: thermal { + compatible = "brcm,bcm2711-thermal"; + #thermal-sensor-cells = <0>; + }; + }; + + bsc_pmu: i2c@7d544000 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d544000 0x58>; + interrupt-parent = <&bsc_aon_irq>; + interrupts = <1>; + clock-frequency = <200000>; + status = "disabled"; + }; + + hdmi0: hdmi@7ef00700 { + compatible = "brcm,bcm2712-hdmi0"; + reg = <0x7c701400 0x300>, + <0x7c701000 0x200>, + <0x7c701d00 0x300>, + <0x7c702000 0x80>, + <0x7c703800 0x200>, + <0x7c704000 0x800>, + <0x7c700100 0x80>, + <0x7d510800 0x100>, + <0x7c720000 0x100>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd"; + resets = <&dvp 1>; + interrupt-parent = <&aon_intr>; + interrupts = <1>, <2>, <3>, + <7>, <8>; + interrupt-names = "cec-tx", "cec-rx", "cec-low", + "hpd-connected", "hpd-removed"; + ddc = <&ddc0>; + dmas = <&dma32 10>; + dma-names = "audio-rx"; + status = "disabled"; + }; + + hdmi1: hdmi@7ef05700 { + compatible = "brcm,bcm2712-hdmi1"; + reg = <0x7c706400 0x300>, + <0x7c706000 0x200>, + <0x7c706d00 0x300>, + <0x7c707000 0x80>, + <0x7c708800 0x200>, + <0x7c709000 0x800>, + <0x7c700180 0x80>, + <0x7d511000 0x100>, + <0x7c720000 0x100>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd"; + ddc = <&ddc1>; + resets = <&dvp 2>; + interrupt-parent = <&aon_intr>; + interrupts = <11>, <12>, <13>, + <14>, <15>; + interrupt-names = "cec-tx", "cec-rx", "cec-low", + "hpd-connected", "hpd-removed"; + dmas = <&dma32 17>; + dma-names = "audio-rx"; + status = "disabled"; + }; + + sound: sound { + }; + }; + + arm-pmu { + compatible = "arm,cortex-a76-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + /* This only applies to the ARMv7 stub */ + arm,cpu-registers-not-fw-configured; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x000>; + enable-method = "psci"; + next-level-cache = <&l2_cache>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x100>; + enable-method = "psci"; + next-level-cache = <&l2_cache>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x200>; + enable-method = "psci"; + next-level-cache = <&l2_cache>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x300>; + enable-method = "psci"; + next-level-cache = <&l2_cache>; + }; + + l2_cache: l2-cache { + compatible = "cache"; + next-level-cache = <&l3_cache>; + }; + + l3_cache: l3-cache { + compatible = "cache"; + }; + }; + + psci { + method = "smc"; + compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci"; + cpu_on = <0xc4000003>; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + }; + + axi: axi { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>, + <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>, + <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>, + <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>, + <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>; + + dma-ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>, + <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>, + <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>, + <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>, + <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>; + + vc4: gpu { + compatible = "brcm,bcm2712-vc6"; + }; + + iommu2: iommu@5100 { + /* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */ + compatible = "brcm,bcm2712-iommu"; + reg = <0x10 0x5100 0x0 0x80>; + cache = <&iommuc>; + #iommu-cells = <0>; + }; + + iommu4: iommu@5200 { + /* IOMMU4 for HVS, MPL/TXP; and (unused) Unicam, PISP-FE, MiniBVN */ + compatible = "brcm,bcm2712-iommu"; + reg = <0x10 0x5200 0x0 0x80>; + cache = <&iommuc>; + #iommu-cells = <0>; + #interconnect-cells = <0>; + }; + + iommu5: iommu@5280 { + /* IOMMU5 for PCIe2 (RP1); and (unused) BSTM */ + compatible = "brcm,bcm2712-iommu"; + reg = <0x10 0x5280 0x0 0x80>; + cache = <&iommuc>; + #iommu-cells = <0>; + dma-iova-offset = <0x10 0x00000000>; // HACK for RP1 masters over PCIe + }; + + iommuc: iommuc@5b00 { + compatible = "brcm,bcm2712-iommuc"; + reg = <0x10 0x5b00 0x0 0x80>; + }; + + dma32: dma@10000 { + compatible = "brcm,bcm2712-dma"; + reg = <0x10 0x00010000 0 0x600>; + interrupts = , + , + , + , + , + ; + interrupt-names = "dma0", + "dma1", + "dma2", + "dma3", + "dma4", + "dma5"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x0035>; + }; + + dma40: dma@10600 { + compatible = "brcm,bcm2712-dma"; + reg = <0x10 0x00010600 0 0x600>; + interrupts = + , /* dma4 6 */ + , /* dma4 7 */ + , /* dma4 8 */ + , /* dma4 9 */ + , /* dma4 10 */ + ; /* dma4 11 */ + interrupt-names = "dma6", + "dma7", + "dma8", + "dma9", + "dma10", + "dma11"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x0fc0>; + }; + + // Single-lane Gen3 PCIe + // Outbound window at 0x14_000000-0x17_ffffff + pcie0: pcie@100000 { + compatible = "brcm,bcm2712-pcie"; + reg = <0x10 0x00100000 0x0 0x9310>; + device_type = "pci"; + max-link-speed = <2>; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + /* + * Unused interrupts: + * 208: AER + * 215: NMI + * 216: PME + */ + interrupt-parent = <&gicv2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gicv2 GIC_SPI 210 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gicv2 GIC_SPI 211 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gicv2 GIC_SPI 212 + IRQ_TYPE_LEVEL_HIGH>; + resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>; + reset-names = "swinit", "bridge", "rescal"; + msi-controller; + msi-parent = <&pcie0>; + + ranges = <0x02000000 0x00 0x00000000 + 0x17 0x00000000 + 0x0 0xfffffffc>, + <0x43000000 0x04 0x00000000 + 0x14 0x00000000 + 0x3 0x00000000>; + + dma-ranges = <0x43000000 0x10 0x00000000 + 0x00 0x00000000 + 0x10 0x00000000>; + + status = "disabled"; + }; + + // Single-lane Gen3 PCIe + // Outbound window at 0x18_000000-0x1b_ffffff + pcie1: pcie@110000 { + compatible = "brcm,bcm2712-pcie"; + reg = <0x10 0x00110000 0x0 0x9310>; + device_type = "pci"; + max-link-speed = <2>; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + /* + * Unused interrupts: + * 218: AER + * 225: NMI + * 226: PME + */ + interrupt-parent = <&gicv2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 219 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gicv2 GIC_SPI 220 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gicv2 GIC_SPI 221 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gicv2 GIC_SPI 222 + IRQ_TYPE_LEVEL_HIGH>; + resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>; + reset-names = "swinit", "bridge", "rescal"; + msi-controller; + msi-parent = <&mip1>; + + ranges = <0x02000000 0x00 0x00000000 + 0x1b 0x00000000 + 0x00 0xfffffffc>, + <0x43000000 0x04 0x00000000 + 0x18 0x00000000 + 0x03 0x00000000>; + + dma-ranges = <0x03000000 0x10 0x00000000 + 0x00 0x00000000 + 0x10 0x00000000>; + + brcm,enable-l1ss; + status = "disabled"; + }; + + pcie_rescal: reset-controller@119500 { + compatible = "brcm,bcm7216-pcie-sata-rescal"; + reg = <0x10 0x00119500 0x0 0x10>; + #reset-cells = <0>; + }; + + // Quad-lane Gen3 PCIe + // Outbound window at 0x1c_000000-0x1f_ffffff + pcie2: pcie@120000 { + compatible = "brcm,bcm2712-pcie"; + reg = <0x10 0x00120000 0x0 0x9310>; + device_type = "pci"; + max-link-speed = <2>; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + /* + * Unused interrupts: + * 228: AER + * 235: NMI + * 236: PME + */ + interrupt-parent = <&gicv2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 229 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gicv2 GIC_SPI 230 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gicv2 GIC_SPI 231 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gicv2 GIC_SPI 232 + IRQ_TYPE_LEVEL_HIGH>; + resets = <&bcm_reset 32>, <&bcm_reset 44>, <&pcie_rescal>; + reset-names = "swinit", "bridge", "rescal"; + msi-controller; + msi-parent = <&mip0>; + + // ~4GB, 32-bit, not-prefetchable at PCIe 00_00000000 + ranges = <0x02000000 0x00 0x00000000 + 0x1f 0x00000000 + 0x0 0xfffffffc>, + // 12GB, 64-bit, prefetchable at PCIe 04_00000000 + <0x43000000 0x04 0x00000000 + 0x1c 0x00000000 + 0x03 0x00000000>; + + // 64GB system RAM space at PCIe 10_00000000 + dma-ranges = <0x02000000 0x00 0x00000000 + 0x1f 0x00000000 + 0x00 0x00400000>, + <0x43000000 0x10 0x00000000 + 0x00 0x00000000 + 0x10 0x00000000>; + + brcm,enable-l1ss; + status = "disabled"; + }; + + mip0: msi-controller@130000 { + compatible = "brcm,bcm2712-mip-intc"; + reg = <0x10 0x00130000 0x0 0xc0>; + msi-controller; + interrupt-controller; + #interrupt-cells = <2>; + brcm,msi-base-spi = <128>; + brcm,msi-num-spis = <64>; + brcm,msi-offset = <0>; + brcm,msi-pci-addr = <0xff 0xfffff000>; + }; + + mip1: msi-controller@131000 { + compatible = "brcm,bcm2712-mip-intc"; + reg = <0x10 0x00131000 0x0 0xc0>; + msi-controller; + interrupt-controller; + #interrupt-cells = <2>; + brcm,msi-base-spi = <247>; + /* Actually 20 total, but the others are + * both sparse and non-consecutive */ + brcm,msi-num-spis = <8>; + brcm,msi-offset = <8>; + brcm,msi-pci-addr = <0xff 0xffffe000>; + }; + + syscon_piarbctl: syscon@400018 { + compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd"; + reg = <0x10 0x00400018 0x0 0x18>; + }; + + usb: usb@480000 { + compatible = "brcm,bcm2835-usb"; + reg = <0x10 0x00480000 0x0 0x10000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk_usb>; + clock-names = "otg"; + phys = <&usbphy>; + phy-names = "usb2-phy"; + }; + + rpivid: codec@800000 { + compatible = "raspberrypi,rpivid-vid-decoder"; + reg = <0x10 0x00800000 0x0 0x10000>, /* HEVC */ + <0x10 0x00840000 0x0 0x1000>; /* INTC */ + reg-names = "hevc", + "intc"; + + interrupts = ; + + clocks = <&firmware_clocks 11>; + clock-names = "hevc"; + iommus = <&iommu2>; + status = "disabled"; + }; + + sdio1: mmc@fff000 { + compatible = "brcm,bcm2712-sdhci"; + reg = <0x10 0x00fff000 0x0 0x260>, + <0x10 0x00fff400 0x0 0x200>, + <0x10 0x015040b0 0x0 0x4>, // Bus isolation control + <0x10 0x015200f0 0x0 0x24>; // LCPLL control misc0-8 + reg-names = "host", "cfg", "busisol", "lcpll"; + interrupts = ; + clocks = <&clk_emmc2>; + sdhci-caps-mask = <0x0000C000 0x0>; + sdhci-caps = <0x0 0x0>; + supports-cqe; + mmc-ddr-3_3v; + }; + + sdio2: mmc@1100000 { + compatible = "brcm,bcm2712-sdhci"; + reg = <0x10 0x01100000 0x0 0x260>, + <0x10 0x01100400 0x0 0x200>; + reg-names = "host", "cfg"; + interrupts = ; + clocks = <&clk_emmc2>; + sdhci-caps-mask = <0x0000C000 0x0>; + sdhci-caps = <0x0 0x0>; + supports-cqe; + mmc-ddr-3_3v; + status = "disabled"; + }; + + bcm_reset: reset-controller@1504318 { + compatible = "brcm,brcmstb-reset"; + reg = <0x10 0x01504318 0x0 0x30>; + #reset-cells = <1>; + }; + + v3d: v3d@2000000 { + compatible = "brcm,2712-v3d"; + reg = <0x10 0x02000000 0x0 0x4000>, + <0x10 0x02008000 0x0 0x6000>; + reg-names = "hub", "core0"; + + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; + resets = <&pm BCM2835_RESET_V3D>; + clocks = <&firmware_clocks 5>; + clocks-names = "v3d"; + interrupts = , + ; + status = "disabled"; + }; + + gicv2: interrupt-controller@7fff9000 { + interrupt-controller; + #interrupt-cells = <3>; + compatible = "arm,gic-400"; + reg = <0x10 0x7fff9000 0x0 0x1000>, + <0x10 0x7fffa000 0x0 0x2000>, + <0x10 0x7fffc000 0x0 0x2000>, + <0x10 0x7fffe000 0x0 0x2000>; + interrupts = ; + }; + + pisp_be: pisp_be@880000 { + compatible = "raspberrypi,pispbe"; + reg = <0x10 0x00880000 0x0 0x4000>; + interrupts = ; + clocks = <&firmware_clocks 7>; + clocks-names = "isp_be"; + status = "okay"; + iommus = <&iommu2>; + }; + }; + + clocks { + /* The oscillator is the root of the clock tree. */ + clk_osc: clk-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "osc"; + clock-frequency = <54000000>; + }; + + clk_usb: clk-usb { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "otg"; + clock-frequency = <480000000>; + }; + + clk_vpu: clk_vpu { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <750000000>; + clock-output-names = "vpu-clock"; + }; + + clk_uart: clk_uart { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <9216000>; + clock-output-names = "uart-clock"; + }; + + clk_emmc2: clk_emmc2 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <54000000>; + clock-output-names = "emmc2-clock"; + }; + }; + + usbphy: phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "bcm2712-rpi-5-b.dts" + +&gio { + brcm,gpio-bank-widths = <32 4>; + + gpio-line-names = + "", // GPIO_000 + "2712_BOOT_CS_N", // GPIO_001 + "2712_BOOT_MISO", // GPIO_002 + "2712_BOOT_MOSI", // GPIO_003 + "2712_BOOT_SCLK", // GPIO_004 + "", // GPIO_005 + "", // GPIO_006 + "", // GPIO_007 + "", // GPIO_008 + "", // GPIO_009 + "", // GPIO_010 + "", // GPIO_011 + "", // GPIO_012 + "", // GPIO_013 + "PCIE_SDA", // GPIO_014 + "PCIE_SCL", // GPIO_015 + "", // GPIO_016 + "", // GPIO_017 + "-", // GPIO_018 + "-", // GPIO_019 + "PWR_GPIO", // GPIO_020 + "2712_G21_FS", // GPIO_021 + "-", // GPIO_022 + "-", // GPIO_023 + "BT_RTS", // GPIO_024 + "BT_CTS", // GPIO_025 + "BT_TXD", // GPIO_026 + "BT_RXD", // GPIO_027 + "WL_ON", // GPIO_028 + "BT_ON", // GPIO_029 + "WIFI_SDIO_CLK", // GPIO_030 + "WIFI_SDIO_CMD", // GPIO_031 + "WIFI_SDIO_D0", // GPIO_032 + "WIFI_SDIO_D1", // GPIO_033 + "WIFI_SDIO_D2", // GPIO_034 + "WIFI_SDIO_D3"; // GPIO_035 +}; + +&gio_aon { + brcm,gpio-bank-widths = <15 6>; + + gpio-line-names = + "RP1_SDA", // AON_GPIO_00 + "RP1_SCL", // AON_GPIO_01 + "RP1_RUN", // AON_GPIO_02 + "SD_IOVDD_SEL", // AON_GPIO_03 + "SD_PWR_ON", // AON_GPIO_04 + "SD_CDET_N", // AON_GPIO_05 + "SD_FLG_N", // AON_GPIO_06 + "", // AON_GPIO_07 + "2712_WAKE", // AON_GPIO_08 + "2712_STAT_LED", // AON_GPIO_09 + "", // AON_GPIO_10 + "", // AON_GPIO_11 + "PMIC_INT", // AON_GPIO_12 + "UART_TX_FS", // AON_GPIO_13 + "UART_RX_FS", // AON_GPIO_14 + "", // AON_GPIO_15 + "", // AON_GPIO_16 + + // Pad bank0 out to 32 entries + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + + "HDMI0_SCL", // AON_SGPIO_00 + "HDMI0_SDA", // AON_SGPIO_01 + "HDMI1_SCL", // AON_SGPIO_02 + "HDMI1_SDA", // AON_SGPIO_03 + "PMIC_SCL", // AON_SGPIO_04 + "PMIC_SDA"; // AON_SGPIO_05 +}; + +&pinctrl { + compatible = "brcm,bcm2712d0-pinctrl"; + reg = <0x7d504100 0x20>; +}; + +&pinctrl_aon { + compatible = "brcm,bcm2712d0-aon-pinctrl"; + reg = <0x7d510700 0x1c>; +}; + +&vc4 { + compatible = "brcm,bcm2712d0-vc6"; +}; + +&uart10 { + interrupts = ; +}; + +&spi10 { + dmas = <&dma40 3>, <&dma40 4>; +}; + +&hdmi0 { + dmas = <&dma40 (12|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; +}; + +&hdmi1 { + dmas = <&dma40 (13|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm271x-rpi-bt.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0 + +&uart0 { + bt: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + fallback-bd-address; // Don't override a valid address + status = "okay"; + }; +}; + +&uart1 { + minibt: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <230400>; + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + fallback-bd-address; // Don't override a valid address + status = "disabled"; + }; +}; + +/ { + aliases { + bluetooth = &bt; + }; + + __overrides__ { + bdaddr = <&bt>,"local-bd-address[", + <&bt>,"fallback-bd-address?=0", + <&minibt>,"local-bd-address[", + <&minibt>,"fallback-bd-address?=0"; + krnbt = <&bt>,"status"; + krnbt_baudrate = <&bt>,"max-speed:0", <&minibt>,"max-speed:0"; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi0-2lane.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only +&csi0 { + brcm,num-data-lanes = <2>; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only +&csi1 { + brcm,num-data-lanes = <2>; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm283x-rpi-csi1-4lane.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only +&csi1 { + brcm,num-data-lanes = <4>; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_28.dtsi @@ -0,0 +1,4 @@ +&i2c0mux { + pinctrl-0 = <&i2c0_gpio0>; + pinctrl-1 = <&i2c0_gpio28>; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/bcm283x-rpi-i2c0mux_0_44.dtsi @@ -0,0 +1,4 @@ +&i2c0mux { + pinctrl-0 = <&i2c0_gpio0>; + pinctrl-1 = <&i2c0_gpio44>; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/broadcom/rp1.dtsi +++ linux-raspi-6.8.0/arch/arm/boot/dts/broadcom/rp1.dtsi @@ -0,0 +1,1313 @@ +#include +#include +#include + +&rp1_target { + rp1: rp1 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + #interrupt-cells = <2>; + interrupt-controller; + interrupt-parent = <&rp1>; + + // ranges and dma-ranges must be provided by the includer + + rp1_clocks: clocks@18000 { + compatible = "raspberrypi,rp1-clocks"; + #clock-cells = <1>; + reg = <0xc0 0x40018000 0x0 0x10038>; + clocks = <&clk_xosc>; + + assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>, + <&rp1_clocks RP1_PLL_AUDIO_CORE>, + // RP1_PLL_VIDEO_CORE and dividers are now managed by VEC,DPI drivers + <&rp1_clocks RP1_PLL_SYS>, + <&rp1_clocks RP1_PLL_SYS_SEC>, + <&rp1_clocks RP1_PLL_AUDIO>, + <&rp1_clocks RP1_PLL_AUDIO_SEC>, + <&rp1_clocks RP1_CLK_SYS>, + <&rp1_clocks RP1_PLL_SYS_PRI_PH>, + // RP1_CLK_SLOW_SYS is used for the frequency counter (FC0) + <&rp1_clocks RP1_CLK_SLOW_SYS>, + <&rp1_clocks RP1_CLK_SDIO_TIMER>, + <&rp1_clocks RP1_CLK_SDIO_ALT_SRC>, + <&rp1_clocks RP1_CLK_ETH_TSU>; + + assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE + <1536000000>, // RP1_PLL_AUDIO_CORE + <200000000>, // RP1_PLL_SYS + <125000000>, // RP1_PLL_SYS_SEC + <61440000>, // RP1_PLL_AUDIO + <192000000>, // RP1_PLL_AUDIO_SEC + <200000000>, // RP1_CLK_SYS + <100000000>, // RP1_PLL_SYS_PRI_PH + // Must match the XOSC frequency + <50000000>, // RP1_CLK_SLOW_SYS + <1000000>, // RP1_CLK_SDIO_TIMER + <200000000>, // RP1_CLK_SDIO_ALT_SRC + <50000000>; // RP1_CLK_ETH_TSU + }; + + rp1_uart0: serial@30000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40030000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + dmas = <&rp1_dma RP1_DMA_UART0_TX>, + <&rp1_dma RP1_DMA_UART0_RX>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart1: serial@34000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40034000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART1_TX>, + // <&rp1_dma RP1_DMA_UART1_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart2: serial@38000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40038000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART2_TX>, + // <&rp1_dma RP1_DMA_UART2_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart3: serial@3c000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x4003c000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART3_TX>, + // <&rp1_dma RP1_DMA_UART3_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart4: serial@40000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40040000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART4_TX>, + // <&rp1_dma RP1_DMA_UART4_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart5: serial@44000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40044000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART5_TX>, + // <&rp1_dma RP1_DMA_UART5_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_spi8: spi@4c000 { + reg = <0xc0 0x4004c000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI8_TX>, + <&rp1_dma RP1_DMA_SPI8_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi0: spi@50000 { + reg = <0xc0 0x40050000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI0_TX>, + <&rp1_dma RP1_DMA_SPI0_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi1: spi@54000 { + reg = <0xc0 0x40054000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI1_TX>, + <&rp1_dma RP1_DMA_SPI1_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi2: spi@58000 { + reg = <0xc0 0x40058000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI2_TX>, + <&rp1_dma RP1_DMA_SPI2_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi3: spi@5c000 { + reg = <0xc0 0x4005c000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI3_TX>, + <&rp1_dma RP1_DMA_SPI3_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + // SPI4 is a target/slave interface + rp1_spi4: spi@60000 { + reg = <0xc0 0x40060000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <0>; + #size-cells = <0>; + num-cs = <1>; + spi-slave; + dmas = <&rp1_dma RP1_DMA_SPI4_TX>, + <&rp1_dma RP1_DMA_SPI4_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + + slave { + compatible = "spidev"; + spi-max-frequency = <1000000>; + }; + }; + + rp1_spi5: spi@64000 { + reg = <0xc0 0x40064000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI5_TX>, + <&rp1_dma RP1_DMA_SPI5_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi6: spi@68000 { + reg = <0xc0 0x40068000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI6_TX>, + <&rp1_dma RP1_DMA_SPI6_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + // SPI7 is a target/slave interface + rp1_spi7: spi@6c000 { + reg = <0xc0 0x4006c000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <0>; + #size-cells = <0>; + num-cs = <1>; + spi-slave; + dmas = <&rp1_dma RP1_DMA_SPI7_TX>, + <&rp1_dma RP1_DMA_SPI7_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + + slave { + compatible = "spidev"; + spi-max-frequency = <1000000>; + }; + }; + + rp1_i2c0: i2c@70000 { + reg = <0xc0 0x40070000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + i2c-sda-hold-time-ns = <300>; + status = "disabled"; + }; + + rp1_i2c1: i2c@74000 { + reg = <0xc0 0x40074000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + i2c-sda-hold-time-ns = <300>; + status = "disabled"; + }; + + rp1_i2c2: i2c@78000 { + reg = <0xc0 0x40078000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + i2c-sda-hold-time-ns = <300>; + status = "disabled"; + }; + + rp1_i2c3: i2c@7c000 { + reg = <0xc0 0x4007c000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + i2c-sda-hold-time-ns = <300>; + status = "disabled"; + }; + + rp1_i2c4: i2c@80000 { + reg = <0xc0 0x40080000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + i2c-sda-hold-time-ns = <300>; + status = "disabled"; + }; + + rp1_i2c5: i2c@84000 { + reg = <0xc0 0x40084000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + i2c-sda-hold-time-ns = <300>; + status = "disabled"; + }; + + rp1_i2c6: i2c@88000 { + reg = <0xc0 0x40088000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + i2c-sda-hold-time-ns = <300>; + status = "disabled"; + }; + + rp1_pwm0: pwm@98000 { + compatible = "raspberrypi,rp1-pwm"; + reg = <0xc0 0x40098000 0x0 0x100>; + #pwm-cells = <3>; + clocks = <&rp1_clocks RP1_CLK_PWM0>; + assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>; + assigned-clock-rates = <6144000>; + status = "disabled"; + }; + + rp1_pwm1: pwm@9c000 { + compatible = "raspberrypi,rp1-pwm"; + reg = <0xc0 0x4009c000 0x0 0x100>; + #pwm-cells = <3>; + clocks = <&rp1_clocks RP1_CLK_PWM1>; + assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>; + assigned-clock-rates = <6144000>; + status = "disabled"; + }; + + rp1_i2s0: i2s@a0000 { + reg = <0xc0 0x400a0000 0x0 0x1000>; + compatible = "snps,designware-i2s"; + // Providing an interrupt disables DMA + // interrupts = ; + clocks = <&rp1_clocks RP1_CLK_I2S>; + clock-names = "i2sclk"; + #sound-dai-cells = <0>; + dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_i2s1: i2s@a4000 { + reg = <0xc0 0x400a4000 0x0 0x1000>; + compatible = "snps,designware-i2s"; + // Providing an interrupt disables DMA + // interrupts = ; + clocks = <&rp1_clocks RP1_CLK_I2S>; + clock-names = "i2sclk"; + #sound-dai-cells = <0>; + dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_i2s2: i2s@a8000 { + reg = <0xc0 0x400a8000 0x0 0x1000>; + compatible = "snps,designware-i2s"; + // Providing an interrupt disables DMA + // interrupts = ; + clocks = <&rp1_clocks RP1_CLK_I2S>; + status = "disabled"; + }; + + rp1_sdio_clk0: sdio_clk0@b0004 { + compatible = "raspberrypi,rp1-sdio-clk"; + reg = <0xc0 0x400b0004 0x0 0x1c>; + clocks = <&sdio_src &sdhci_core>; + clock-names = "src", "base"; + #clock-cells = <0>; + status = "disabled"; + }; + + rp1_sdio_clk1: sdio_clk1@b4004 { + compatible = "raspberrypi,rp1-sdio-clk"; + reg = <0xc0 0x400b4004 0x0 0x1c>; + clocks = <&sdio_src &sdhci_core>; + clock-names = "src", "base"; + #clock-cells = <0>; + status = "disabled"; + }; + + rp1_adc: adc@c8000 { + compatible = "raspberrypi,rp1-adc"; + reg = <0xc0 0x400c8000 0x0 0x4000>; + clocks = <&rp1_clocks RP1_CLK_ADC>; + clock-names = "adcclk"; + #clock-cells = <0>; + vref-supply = <&rp1_vdd_3v3>; + status = "disabled"; + }; + + rp1_gpio: gpio@d0000 { + reg = <0xc0 0x400d0000 0x0 0xc000>, + <0xc0 0x400e0000 0x0 0xc000>, + <0xc0 0x400f0000 0x0 0xc000>; + compatible = "raspberrypi,rp1-gpio"; + interrupts = , + , + ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + rp1_uart0_14_15: rp1_uart0_14_15 { + pin_txd { + function = "uart0"; + pins = "gpio14"; + bias-disable; + }; + pin_rxd { + function = "uart0"; + pins = "gpio15"; + bias-pull-up; + }; + }; + rp1_uart0_ctsrts_16_17: rp1_uart0_ctsrts_16_17 { + pin_cts { + function = "uart0"; + pins = "gpio16"; + bias-pull-up; + }; + pin_rts { + function = "uart0"; + pins = "gpio17"; + bias-disable; + }; + }; + rp1_uart1_0_1: rp1_uart1_0_1 { + pin_txd { + function = "uart1"; + pins = "gpio0"; + bias-disable; + }; + pin_rxd { + function = "uart1"; + pins = "gpio1"; + bias-pull-up; + }; + }; + rp1_uart1_ctsrts_2_3: rp1_uart1_ctsrts_2_3 { + pin_cts { + function = "uart1"; + pins = "gpio2"; + bias-pull-up; + }; + pin_rts { + function = "uart1"; + pins = "gpio3"; + bias-disable; + }; + }; + rp1_uart2_4_5: rp1_uart2_4_5 { + pin_txd { + function = "uart2"; + pins = "gpio4"; + bias-disable; + }; + pin_rxd { + function = "uart2"; + pins = "gpio5"; + bias-pull-up; + }; + }; + rp1_uart2_ctsrts_6_7: rp1_uart2_ctsrts_6_7 { + pin_cts { + function = "uart2"; + pins = "gpio6"; + bias-pull-up; + }; + pin_rts { + function = "uart2"; + pins = "gpio7"; + bias-disable; + }; + }; + rp1_uart3_8_9: rp1_uart3_8_9 { + pin_txd { + function = "uart3"; + pins = "gpio8"; + bias-disable; + }; + pin_rxd { + function = "uart3"; + pins = "gpio9"; + bias-pull-up; + }; + }; + rp1_uart3_ctsrts_10_11: rp1_uart3_ctsrts_10_11 { + pin_cts { + function = "uart3"; + pins = "gpio10"; + bias-pull-up; + }; + pin_rts { + function = "uart3"; + pins = "gpio11"; + bias-disable; + }; + }; + rp1_uart4_12_13: rp1_uart4_12_13 { + pin_txd { + function = "uart4"; + pins = "gpio12"; + bias-disable; + }; + pin_rxd { + function = "uart4"; + pins = "gpio13"; + bias-pull-up; + }; + }; + rp1_uart4_ctsrts_14_15: rp1_uart4_ctsrts_14_15 { + pin_cts { + function = "uart4"; + pins = "gpio14"; + bias-pull-up; + }; + pin_rts { + function = "uart4"; + pins = "gpio15"; + bias-disable; + }; + }; + + rp1_sdio0_22_27: rp1_sdio0_22_27 { + pin_clk { + function = "sd0"; + pins = "gpio22"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + pin_cmd { + function = "sd0"; + pins = "gpio23"; + bias-pull-up; + drive-strength = <12>; + slew-rate = <1>; + }; + pins_dat { + function = "sd0"; + pins = "gpio24", "gpio25", "gpio26", "gpio27"; + bias-pull-up; + drive-strength = <12>; + slew-rate = <1>; + }; + }; + + rp1_sdio1_28_33: rp1_sdio1_28_33 { + pin_clk { + function = "sd1"; + pins = "gpio28"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + pin_cmd { + function = "sd1"; + pins = "gpio29"; + bias-pull-up; + drive-strength = <12>; + slew-rate = <1>; + }; + pins_dat { + function = "sd1"; + pins = "gpio30", "gpio31", "gpio32", "gpio33"; + bias-pull-up; + drive-strength = <12>; + slew-rate = <1>; + }; + }; + + rp1_i2s0_18_21: rp1_i2s0_18_21 { + function = "i2s0"; + pins = "gpio18", "gpio19", "gpio20", "gpio21"; + bias-disable; + }; + + rp1_i2s1_18_21: rp1_i2s1_18_21 { + function = "i2s1"; + pins = "gpio18", "gpio19", "gpio20", "gpio21"; + bias-disable; + }; + + rp1_i2c4_34_35: rp1_i2c4_34_35 { + function = "i2c4"; + pins = "gpio34", "gpio35"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c6_38_39: rp1_i2c6_38_39 { + function = "i2c6"; + pins = "gpio38", "gpio39"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c4_40_41: rp1_i2c4_40_41 { + function = "i2c4"; + pins = "gpio40", "gpio41"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c5_44_45: rp1_i2c5_44_45 { + function = "i2c5"; + pins = "gpio44", "gpio45"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c0_0_1: rp1_i2c0_0_1 { + function = "i2c0"; + pins = "gpio0", "gpio1"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c0_8_9: rp1_i2c0_8_9 { + function = "i2c0"; + pins = "gpio8", "gpio9"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c1_2_3: rp1_i2c1_2_3 { + function = "i2c1"; + pins = "gpio2", "gpio3"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c1_10_11: rp1_i2c1_10_11 { + function = "i2c1"; + pins = "gpio10", "gpio11"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c2_4_5: rp1_i2c2_4_5 { + function = "i2c2"; + pins = "gpio4", "gpio5"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c2_12_13: rp1_i2c2_12_13 { + function = "i2c2"; + pins = "gpio12", "gpio13"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c3_6_7: rp1_i2c3_6_7 { + function = "i2c3"; + pins = "gpio6", "gpio7"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c3_14_15: rp1_i2c3_14_15 { + function = "i2c3"; + pins = "gpio14", "gpio15"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c3_22_23: rp1_i2c3_22_23 { + function = "i2c3"; + pins = "gpio22", "gpio23"; + drive-strength = <12>; + bias-pull-up; + }; + + // DPI mappings with HSYNC,VSYNC but without PIXCLK,DE + rp1_dpi_16bit_gpio2: rp1_dpi_16bit_gpio2 { /* Mode 2, not fully supported by RP1 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", "gpio9", + "gpio10", "gpio11", "gpio12", "gpio13", + "gpio14", "gpio15", "gpio16", "gpio17", + "gpio18", "gpio19"; + bias-disable; + }; + rp1_dpi_16bit_cpadhi_gpio2: rp1_dpi_16bit_cpadhi_gpio2 { /* Mode 3 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24"; + bias-disable; + }; + rp1_dpi_16bit_pad666_gpio2: rp1_dpi_16bit_pad666_gpio2 { /* Mode 4 */ + function = "dpi"; + pins = "gpio2", "gpio3", + "gpio5", "gpio6", "gpio7", "gpio8", + "gpio9", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio21", "gpio22", "gpio23", "gpio24", + "gpio25"; + bias-disable; + }; + rp1_dpi_18bit_gpio2: rp1_dpi_18bit_gpio2 { /* Mode 5, not fully supported by RP1 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", "gpio9", + "gpio10", "gpio11", "gpio12", "gpio13", + "gpio14", "gpio15", "gpio16", "gpio17", + "gpio18", "gpio19", "gpio20", "gpio21"; + bias-disable; + }; + rp1_dpi_18bit_cpadhi_gpio2: rp1_dpi_18bit_cpadhi_gpio2 { /* Mode 6 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", "gpio9", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24", "gpio25"; + bias-disable; + }; + rp1_dpi_24bit_gpio2: rp1_dpi_24bit_gpio2 { /* Mode 7 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", "gpio9", + "gpio10", "gpio11", "gpio12", "gpio13", + "gpio14", "gpio15", "gpio16", "gpio17", + "gpio18", "gpio19", "gpio20", "gpio21", + "gpio22", "gpio23", "gpio24", "gpio25", + "gpio26", "gpio27"; + bias-disable; + }; + rp1_dpi_hvsync: rp1_dpi_hvsync { /* Sync only, for use with int VDAC */ + function = "dpi"; + pins = "gpio2", "gpio3"; + bias-disable; + }; + + // More DPI mappings, including PIXCLK,DE on GPIOs 0,1 + rp1_dpi_16bit_gpio0: rp1_dpi_16bit_gpio0 { /* Mode 2, not fully supported by RP1 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", "gpio18", "gpio19"; + bias-disable; + }; + rp1_dpi_16bit_cpadhi_gpio0: rp1_dpi_16bit_cpadhi_gpio0 { /* Mode 3 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24"; + bias-disable; + }; + rp1_dpi_16bit_pad666_gpio0: rp1_dpi_16bit_pad666_gpio0 { /* Mode 4 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio5", "gpio6", "gpio7", "gpio8", + "gpio9", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio21", "gpio22", "gpio23", "gpio24", + "gpio25"; + bias-disable; + }; + rp1_dpi_18bit_gpio0: rp1_dpi_18bit_gpio0 { /* Mode 5, not fully supported by RP1 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", "gpio18", "gpio19", + "gpio20", "gpio21"; + bias-disable; + }; + rp1_dpi_18bit_cpadhi_gpio0: rp1_dpi_18bit_cpadhi_gpio0 { /* Mode 6 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24", "gpio25"; + bias-disable; + }; + rp1_dpi_24bit_gpio0: rp1_dpi_24bit_gpio0 { /* Mode 7 -- All GPIOs used! */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", "gpio18", "gpio19", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24", "gpio25", "gpio26", "gpio27"; + bias-disable; + }; + + rp1_gpclksrc0_gpio4: rp1_gpclksrc0_gpio4 { + function = "gpclk0"; + pins = "gpio4"; + bias-disable; + }; + + rp1_gpclksrc0_gpio20: rp1_gpclksrc0_gpio20 { + function = "gpclk0"; + pins = "gpio20"; + bias-disable; + }; + + rp1_gpclksrc1_gpio5: rp1_gpclksrc1_gpio5 { + function = "gpclk1"; + pins = "gpio5"; + bias-disable; + }; + + rp1_gpclksrc1_gpio18: rp1_gpclksrc1_gpio18 { + function = "gpclk1"; + pins = "gpio18"; + bias-disable; + }; + + rp1_gpclksrc1_gpio21: rp1_gpclksrc1_gpio21 { + function = "gpclk1"; + pins = "gpio21"; + bias-disable; + }; + + rp1_pwm1_gpio45: rp1_pwm1_gpio45 { + function = "pwm1"; + pins = "gpio45"; + bias-pull-down; + }; + + rp1_spi0_gpio9: rp1_spi0_gpio9 { + function = "spi0"; + pins = "gpio9", "gpio10", "gpio11"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 { + function = "spi0"; + pins = "gpio7", "gpio8"; + bias-pull-up; + }; + + rp1_spi1_gpio19: rp1_spi1_gpio19 { + function = "spi1"; + pins = "gpio19", "gpio20", "gpio21"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi2_gpio1: rp1_spi2_gpio1 { + function = "spi2"; + pins = "gpio1", "gpio2", "gpio3"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi3_gpio5: rp1_spi3_gpio5 { + function = "spi3"; + pins = "gpio5", "gpio6", "gpio7"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi4_gpio9: rp1_spi4_gpio9 { + function = "spi4"; + pins = "gpio9", "gpio10", "gpio11"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi5_gpio13: rp1_spi5_gpio13 { + function = "spi5"; + pins = "gpio13", "gpio14", "gpio15"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi8_gpio49: rp1_spi8_gpio49 { + function = "spi8"; + pins = "gpio49", "gpio50", "gpio51"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 { + function = "spi0"; + pins = "gpio52", "gpio53"; + bias-pull-up; + }; + }; + + rp1_eth: ethernet@100000 { + reg = <0xc0 0x40100000 0x0 0x4000>; + compatible = "cdns,macb"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&macb_pclk &macb_hclk &rp1_clocks RP1_CLK_ETH_TSU>; + clock-names = "pclk", "hclk", "tsu_clk"; + phy-mode = "rgmii-id"; + cdns,aw2w-max-pipe = /bits/ 8 <8>; + cdns,ar2r-max-pipe = /bits/ 8 <8>; + cdns,use-aw2b-fill; + local-mac-address = [00 00 00 00 00 00]; + status = "disabled"; + }; + + rp1_csi0: csi@110000 { + compatible = "raspberrypi,rp1-cfe"; + reg = <0xc0 0x40110000 0x0 0x100>, // CSI2 DMA address + <0xc0 0x40114000 0x0 0x100>, // PHY/CSI Host address + <0xc0 0x40120000 0x0 0x100>, // MIPI CFG address + <0xc0 0x40124000 0x0 0x1000>; // PiSP FE address + + // interrupts must match rp1_pisp_fe setup + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>; + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>; + assigned-clock-rates = <25000000>; + + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + rp1_csi1: csi@128000 { + compatible = "raspberrypi,rp1-cfe"; + reg = <0xc0 0x40128000 0x0 0x100>, // CSI2 DMA address + <0xc0 0x4012c000 0x0 0x100>, // PHY/CSI Host address + <0xc0 0x40138000 0x0 0x100>, // MIPI CFG address + <0xc0 0x4013c000 0x0 0x1000>; // PiSP FE address + + // interrupts must match rp1_pisp_fe setup + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>; + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>; + assigned-clock-rates = <25000000>; + + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + rp1_mmc0: mmc@180000 { + reg = <0xc0 0x40180000 0x0 0x100>; + compatible = "raspberrypi,rp1-dwcmshc"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core + &rp1_clocks RP1_CLK_SDIO_TIMER + &rp1_sdio_clk0>; + clock-names = "bus", "core", "timeout", "sdio"; + /* Bank 0 VDDIO is fixed */ + no-1-8-v; + bus-width = <4>; + vmmc-supply = <&rp1_vdd_3v3>; + broken-cd; + status = "disabled"; + }; + + rp1_mmc1: mmc@184000 { + reg = <0xc0 0x40184000 0x0 0x100>; + compatible = "raspberrypi,rp1-dwcmshc"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core + &rp1_clocks RP1_CLK_SDIO_TIMER + &rp1_sdio_clk1>; + clock-names = "bus", "core", "timeout", "sdio"; + bus-width = <4>; + vmmc-supply = <&rp1_vdd_3v3>; + /* Nerf SDR speeds */ + sdhci-caps-mask = <0x3 0x0>; + broken-cd; + status = "disabled"; + }; + + rp1_dma: dma@188000 { + reg = <0xc0 0x40188000 0x0 0x1000>; + compatible = "snps,axi-dma-1.01a"; + interrupts = ; + clocks = <&sdhci_core &rp1_clocks RP1_CLK_SYS>; + clock-names = "core-clk", "cfgr-clk"; + + #dma-cells = <1>; + dma-channels = <8>; + snps,dma-masters = <1>; + snps,dma-targets = <64>; + snps,data-width = <4>; // (8 << 4) == 128 bits + snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>; + snps,priority = <0 1 2 3 4 5 6 7>; + snps,axi-max-burst-len = <8>; + status = "disabled"; + }; + + rp1_usb0: usb@200000 { + reg = <0xc0 0x40200000 0x0 0x100000>; + compatible = "snps,dwc3"; + dr_mode = "host"; + usb3-lpm-capable; + snps,axi-pipe-limit = /bits/ 8 <8>; + snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-ss-quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-fsls-quirk; + snps,tx-max-burst-prd = <8>; + snps,tx-thr-num-pkt-prd = <2>; + interrupts = ; + status = "disabled"; + }; + + rp1_usb1: usb@300000 { + reg = <0xc0 0x40300000 0x0 0x100000>; + compatible = "snps,dwc3"; + dr_mode = "host"; + usb3-lpm-capable; + snps,axi-pipe-limit = /bits/ 8 <8>; + snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-ss-quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-fsls-quirk; + snps,tx-max-burst-prd = <8>; + snps,tx-thr-num-pkt-prd = <2>; + interrupts = ; + status = "disabled"; + }; + + rp1_dsi0: dsi@110000 { + compatible = "raspberrypi,rp1dsi"; + status = "disabled"; + reg = <0xc0 0x40118000 0x0 0x1000>, // MIPI0 DSI DMA (ArgonDPI) + <0xc0 0x4011c000 0x0 0x1000>, // MIPI0 DSI Host (SNPS) + <0xc0 0x40120000 0x0 0x1000>; // MIPI0 CFG + + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>, // required, config bus clock + <&rp1_clocks RP1_CLK_MIPI0_DPI>, // required, pixel clock + <&clksrc_mipi0_dsi_byteclk>, // internal, parent for divide + <&clk_xosc>; // hardwired to DSI "refclk" + clock-names = "cfgclk", "dpiclk", "byteclk", "refclk"; + + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>, + <&rp1_clocks RP1_CLK_MIPI0_DPI>; + assigned-clock-rates = <25000000>; + assigned-clock-parents = <0>, <&clksrc_mipi0_dsi_byteclk>; + }; + + rp1_dsi1: dsi@128000 { + compatible = "raspberrypi,rp1dsi"; + status = "disabled"; + reg = <0xc0 0x40130000 0x0 0x1000>, // MIPI1 DSI DMA (ArgonDPI) + <0xc0 0x40134000 0x0 0x1000>, // MIPI1 DSI Host (SNPS) + <0xc0 0x40138000 0x0 0x1000>; // MIPI1 CFG + + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>, // required, config bus clock + <&rp1_clocks RP1_CLK_MIPI1_DPI>, // required, pixel clock + <&clksrc_mipi1_dsi_byteclk>, // internal, parent for divide + <&clk_xosc>; // hardwired to DSI "refclk" + clock-names = "cfgclk", "dpiclk", "byteclk", "refclk"; + + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>, + <&rp1_clocks RP1_CLK_MIPI1_DPI>; + assigned-clock-rates = <25000000>; + assigned-clock-parents = <0>, <&clksrc_mipi1_dsi_byteclk>; + }; + + /* VEC and DPI both need to control PLL_VIDEO and cannot work together; */ + /* config.txt should enable one or other using dtparam=vec or an overlay. */ + rp1_vec: vec@144000 { + compatible = "raspberrypi,rp1vec"; + status = "disabled"; + reg = <0xc0 0x40144000 0x0 0x1000>, // VIDEO_OUT_VEC + <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG + + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_VEC>; + + assigned-clocks = <&rp1_clocks RP1_PLL_VIDEO_CORE>, + <&rp1_clocks RP1_PLL_VIDEO_SEC>, + <&rp1_clocks RP1_CLK_VEC>; + assigned-clock-rates = <1188000000>, + <108000000>, + <108000000>; + assigned-clock-parents = <0>, + <&rp1_clocks RP1_PLL_VIDEO_CORE>, + <&rp1_clocks RP1_PLL_VIDEO_SEC>; + }; + + rp1_dpi: dpi@148000 { + compatible = "raspberrypi,rp1dpi"; + status = "disabled"; + reg = <0xc0 0x40148000 0x0 0x1000>, // VIDEO_OUT DPI + <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG + + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_DPI>, // DPI pixel clock + <&rp1_clocks RP1_PLL_VIDEO>, // PLL primary divider, and + <&rp1_clocks RP1_PLL_VIDEO_CORE>; // VCO, which we also control + clock-names = "dpiclk", "plldiv", "pllcore"; + + assigned-clocks = <&rp1_clocks RP1_CLK_DPI>; + assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>; + }; + }; +}; + +&clocks { + clk_xosc: clk_xosc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "xosc"; + clock-frequency = <50000000>; + }; + macb_pclk: macb_pclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "pclk"; + clock-frequency = <200000000>; + }; + macb_hclk: macb_hclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "hclk"; + clock-frequency = <200000000>; + }; + sdio_src: sdio_src { + // 400 MHz on FPGA. PLL sys VCO on asic + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "src"; + clock-frequency = <1000000000>; + }; + sdhci_core: sdhci_core { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "core"; + clock-frequency = <50000000>; + }; + clksrc_mipi0_dsi_byteclk: clksrc_mipi0_dsi_byteclk { + // This clock is synthesized by MIPI0 D-PHY, when DSI is running. + // Its frequency is not known a priori (until a panel driver attaches) + // so assign a made-up frequency of 72MHz so it can be divided for DPI. + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "clksrc_mipi0_dsi_byteclk"; + clock-frequency = <72000000>; + }; + clksrc_mipi1_dsi_byteclk: clksrc_mipi1_dsi_byteclk { + // This clock is synthesized by MIPI1 D-PHY, when DSI is running. + // Its frequency is not known a priori (until a panel driver attaches) + // so assign a made-up frequency of 72MHz so it can be divided for DPI. + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "clksrc_mipi1_dsi_byteclk"; + clock-frequency = <72000000>; + }; + /* GPIO derived clock sources. Each GPIO with a GPCLK function + * can drive its output from the respective GPCLK + * generator, and provide a clock source to other internal + * dividers. Add dummy sources here so that they can be overridden + * with overlays. + */ + clksrc_gp0: clksrc_gp0 { + status = "disabled"; + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&rp1_clocks RP1_CLK_GP0>; + clock-output-names = "clksrc_gp0"; + }; + clksrc_gp1: clksrc_gp1 { + status = "disabled"; + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&rp1_clocks RP1_CLK_GP1>; + clock-output-names = "clksrc_gp1"; + }; + clksrc_gp2: clksrc_gp2 { + status = "disabled"; + compatible = "fixed-factor-clock"; + clock-div = <1>; + clock-mult = <1>; + #clock-cells = <0>; + clocks = <&rp1_clocks RP1_CLK_GP2>; + clock-output-names = "clksrc_gp2"; + }; + clksrc_gp3: clksrc_gp3 { + status = "disabled"; + compatible = "fixed-factor-clock"; + clock-div = <1>; + clock-mult = <1>; + #clock-cells = <0>; + clocks = <&rp1_clocks RP1_CLK_GP3>; + clock-output-names = "clksrc_gp3"; + }; + clksrc_gp4: clksrc_gp4 { + status = "disabled"; + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&rp1_clocks RP1_CLK_GP4>; + clock-output-names = "clksrc_gp4"; + }; + clksrc_gp5: clksrc_gp5 { + status = "disabled"; + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&rp1_clocks RP1_CLK_GP5>; + clock-output-names = "clksrc_gp5"; + }; +}; + +/ { + rp1_vdd_3v3: rp1_vdd_3v3 { + compatible = "regulator-fixed"; + regulator-name = "vdd-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; +}; --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/overlays/Makefile +++ linux-raspi-6.8.0/arch/arm/boot/dts/overlays/Makefile @@ -0,0 +1,336 @@ +# Overlays for the Raspberry Pi platform + +dtb-$(CONFIG_ARCH_BCM2835) += overlay_map.dtb hat_map.dtb + +dtbo-$(CONFIG_ARCH_BCM2835) += \ + act-led.dtbo \ + adafruit-st7735r.dtbo \ + adafruit18.dtbo \ + adau1977-adc.dtbo \ + adau7002-simple.dtbo \ + ads1015.dtbo \ + ads1115.dtbo \ + ads7846.dtbo \ + adv7282m.dtbo \ + adv728x-m.dtbo \ + akkordion-iqdacplus.dtbo \ + allo-boss-dac-pcm512x-audio.dtbo \ + allo-boss2-dac-audio.dtbo \ + allo-digione.dtbo \ + allo-katana-dac-audio.dtbo \ + allo-piano-dac-pcm512x-audio.dtbo \ + allo-piano-dac-plus-pcm512x-audio.dtbo \ + anyspi.dtbo \ + apds9960.dtbo \ + applepi-dac.dtbo \ + arducam-64mp.dtbo \ + arducam-pivariety.dtbo \ + at86rf233.dtbo \ + audioinjector-addons.dtbo \ + audioinjector-bare-i2s.dtbo \ + audioinjector-isolated-soundcard.dtbo \ + audioinjector-ultra.dtbo \ + audioinjector-wm8731-audio.dtbo \ + audiosense-pi.dtbo \ + audremap.dtbo \ + balena-fin.dtbo \ + bcm2712d0.dtbo \ + camera-mux-2port.dtbo \ + camera-mux-4port.dtbo \ + cap1106.dtbo \ + chipdip-dac.dtbo \ + cirrus-wm5102.dtbo \ + cm-swap-i2c0.dtbo \ + cma.dtbo \ + crystalfontz-cfa050_pi_m.dtbo \ + cutiepi-panel.dtbo \ + dacberry400.dtbo \ + dht11.dtbo \ + dionaudio-kiwi.dtbo \ + dionaudio-loco.dtbo \ + dionaudio-loco-v2.dtbo \ + disable-bt.dtbo \ + disable-bt-pi5.dtbo \ + disable-emmc2.dtbo \ + disable-wifi.dtbo \ + disable-wifi-pi5.dtbo \ + dpi18.dtbo \ + dpi18cpadhi.dtbo \ + dpi24.dtbo \ + draws.dtbo \ + dwc-otg.dtbo \ + dwc2.dtbo \ + edt-ft5406.dtbo \ + enc28j60.dtbo \ + enc28j60-spi2.dtbo \ + exc3000.dtbo \ + fbtft.dtbo \ + fe-pi-audio.dtbo \ + fsm-demo.dtbo \ + gc9a01.dtbo \ + ghost-amp.dtbo \ + goodix.dtbo \ + googlevoicehat-soundcard.dtbo \ + gpio-charger.dtbo \ + gpio-fan.dtbo \ + gpio-hog.dtbo \ + gpio-ir.dtbo \ + gpio-ir-tx.dtbo \ + gpio-key.dtbo \ + gpio-led.dtbo \ + gpio-no-bank0-irq.dtbo \ + gpio-no-irq.dtbo \ + gpio-poweroff.dtbo \ + gpio-shutdown.dtbo \ + hd44780-lcd.dtbo \ + hdmi-backlight-hwhack-gpio.dtbo \ + hifiberry-amp.dtbo \ + hifiberry-amp100.dtbo \ + hifiberry-amp3.dtbo \ + hifiberry-amp4pro.dtbo \ + hifiberry-dac.dtbo \ + hifiberry-dac8x.dtbo \ + hifiberry-dacplus.dtbo \ + hifiberry-dacplusadc.dtbo \ + hifiberry-dacplusadcpro.dtbo \ + hifiberry-dacplusdsp.dtbo \ + hifiberry-dacplushd.dtbo \ + hifiberry-digi.dtbo \ + hifiberry-digi-pro.dtbo \ + highperi.dtbo \ + hy28a.dtbo \ + hy28b.dtbo \ + hy28b-2017.dtbo \ + i-sabre-q2m.dtbo \ + i2c-bcm2708.dtbo \ + i2c-fan.dtbo \ + i2c-gpio.dtbo \ + i2c-mux.dtbo \ + i2c-pwm-pca9685a.dtbo \ + i2c-rtc.dtbo \ + i2c-rtc-gpio.dtbo \ + i2c-sensor.dtbo \ + i2c0.dtbo \ + i2c0-pi5.dtbo \ + i2c1.dtbo \ + i2c1-pi5.dtbo \ + i2c2-pi5.dtbo \ + i2c3.dtbo \ + i2c3-pi5.dtbo \ + i2c4.dtbo \ + i2c5.dtbo \ + i2c6.dtbo \ + i2s-dac.dtbo \ + i2s-gpio28-31.dtbo \ + ilitek251x.dtbo \ + imx219.dtbo \ + imx258.dtbo \ + imx290.dtbo \ + imx296.dtbo \ + imx327.dtbo \ + imx378.dtbo \ + imx462.dtbo \ + imx477.dtbo \ + imx519.dtbo \ + imx708.dtbo \ + interludeaudio-analog.dtbo \ + interludeaudio-digital.dtbo \ + iqaudio-codec.dtbo \ + iqaudio-dac.dtbo \ + iqaudio-dacplus.dtbo \ + iqaudio-digi-wm8804-audio.dtbo \ + iqs550.dtbo \ + irs1125.dtbo \ + jedec-spi-nor.dtbo \ + justboom-both.dtbo \ + justboom-dac.dtbo \ + justboom-digi.dtbo \ + ltc294x.dtbo \ + max98357a.dtbo \ + maxtherm.dtbo \ + mbed-dac.dtbo \ + mcp23017.dtbo \ + mcp23s17.dtbo \ + mcp2515.dtbo \ + mcp2515-can0.dtbo \ + mcp2515-can1.dtbo \ + mcp251xfd.dtbo \ + mcp3008.dtbo \ + mcp3202.dtbo \ + mcp342x.dtbo \ + media-center.dtbo \ + merus-amp.dtbo \ + midi-uart0.dtbo \ + midi-uart0-pi5.dtbo \ + midi-uart1.dtbo \ + midi-uart1-pi5.dtbo \ + midi-uart2.dtbo \ + midi-uart2-pi5.dtbo \ + midi-uart3.dtbo \ + midi-uart3-pi5.dtbo \ + midi-uart4.dtbo \ + midi-uart4-pi5.dtbo \ + midi-uart5.dtbo \ + minipitft13.dtbo \ + miniuart-bt.dtbo \ + mipi-dbi-spi.dtbo \ + mlx90640.dtbo \ + mmc.dtbo \ + mz61581.dtbo \ + ov2311.dtbo \ + ov5647.dtbo \ + ov64a40.dtbo \ + ov7251.dtbo \ + ov9281.dtbo \ + papirus.dtbo \ + pca953x.dtbo \ + pcf857x.dtbo \ + pcie-32bit-dma.dtbo \ + pcie-32bit-dma-pi5.dtbo \ + pibell.dtbo \ + pifacedigital.dtbo \ + pifi-40.dtbo \ + pifi-dac-hd.dtbo \ + pifi-dac-zero.dtbo \ + pifi-mini-210.dtbo \ + piglow.dtbo \ + piscreen.dtbo \ + piscreen2r.dtbo \ + pisound.dtbo \ + pisound-pi5.dtbo \ + pitft22.dtbo \ + pitft28-capacitive.dtbo \ + pitft28-resistive.dtbo \ + pitft35-resistive.dtbo \ + pps-gpio.dtbo \ + proto-codec.dtbo \ + pwm.dtbo \ + pwm-2chan.dtbo \ + pwm-ir-tx.dtbo \ + pwm1.dtbo \ + qca7000.dtbo \ + qca7000-uart0.dtbo \ + ramoops.dtbo \ + ramoops-pi4.dtbo \ + rotary-encoder.dtbo \ + rpi-backlight.dtbo \ + rpi-codeczero.dtbo \ + rpi-dacplus.dtbo \ + rpi-dacpro.dtbo \ + rpi-digiampplus.dtbo \ + rpi-ft5406.dtbo \ + rpi-poe.dtbo \ + rpi-poe-plus.dtbo \ + rpi-sense.dtbo \ + rpi-sense-v2.dtbo \ + rpi-tv.dtbo \ + rra-digidac1-wm8741-audio.dtbo \ + sainsmart18.dtbo \ + sc16is750-i2c.dtbo \ + sc16is752-i2c.dtbo \ + sc16is752-spi0.dtbo \ + sc16is752-spi1.dtbo \ + sdhost.dtbo \ + sdio.dtbo \ + sdio-pi5.dtbo \ + seeed-can-fd-hat-v1.dtbo \ + seeed-can-fd-hat-v2.dtbo \ + sh1106-spi.dtbo \ + si446x-spi0.dtbo \ + smi.dtbo \ + smi-dev.dtbo \ + smi-nand.dtbo \ + spi-gpio35-39.dtbo \ + spi-gpio40-45.dtbo \ + spi-rtc.dtbo \ + spi0-0cs.dtbo \ + spi0-1cs.dtbo \ + spi0-2cs.dtbo \ + spi1-1cs.dtbo \ + spi1-2cs.dtbo \ + spi1-3cs.dtbo \ + spi2-1cs.dtbo \ + spi2-1cs-pi5.dtbo \ + spi2-2cs.dtbo \ + spi2-2cs-pi5.dtbo \ + spi2-3cs.dtbo \ + spi3-1cs.dtbo \ + spi3-1cs-pi5.dtbo \ + spi3-2cs.dtbo \ + spi3-2cs-pi5.dtbo \ + spi4-1cs.dtbo \ + spi4-2cs.dtbo \ + spi5-1cs.dtbo \ + spi5-1cs-pi5.dtbo \ + spi5-2cs.dtbo \ + spi5-2cs-pi5.dtbo \ + spi6-1cs.dtbo \ + spi6-2cs.dtbo \ + ssd1306.dtbo \ + ssd1306-spi.dtbo \ + ssd1327-spi.dtbo \ + ssd1331-spi.dtbo \ + ssd1351-spi.dtbo \ + superaudioboard.dtbo \ + sx150x.dtbo \ + tc358743.dtbo \ + tc358743-audio.dtbo \ + tinylcd35.dtbo \ + tpm-slb9670.dtbo \ + tpm-slb9673.dtbo \ + uart0.dtbo \ + uart0-pi5.dtbo \ + uart1.dtbo \ + uart1-pi5.dtbo \ + uart2.dtbo \ + uart2-pi5.dtbo \ + uart3.dtbo \ + uart3-pi5.dtbo \ + uart4.dtbo \ + uart4-pi5.dtbo \ + uart5.dtbo \ + udrc.dtbo \ + ugreen-dabboard.dtbo \ + upstream.dtbo \ + upstream-pi4.dtbo \ + vc4-fkms-v3d.dtbo \ + vc4-fkms-v3d-pi4.dtbo \ + vc4-kms-dpi-generic.dtbo \ + vc4-kms-dpi-hyperpixel2r.dtbo \ + vc4-kms-dpi-hyperpixel4.dtbo \ + vc4-kms-dpi-hyperpixel4sq.dtbo \ + vc4-kms-dpi-panel.dtbo \ + vc4-kms-dsi-7inch.dtbo \ + vc4-kms-dsi-generic.dtbo \ + vc4-kms-dsi-ili9881-5inch.dtbo \ + vc4-kms-dsi-ili9881-7inch.dtbo \ + vc4-kms-dsi-lt070me05000.dtbo \ + vc4-kms-dsi-lt070me05000-v2.dtbo \ + vc4-kms-dsi-waveshare-panel.dtbo \ + vc4-kms-kippah-7inch.dtbo \ + vc4-kms-v3d.dtbo \ + vc4-kms-v3d-pi4.dtbo \ + vc4-kms-v3d-pi5.dtbo \ + vc4-kms-vga666.dtbo \ + vga666.dtbo \ + vl805.dtbo \ + w1-gpio.dtbo \ + w1-gpio-pi5.dtbo \ + w1-gpio-pullup.dtbo \ + w1-gpio-pullup-pi5.dtbo \ + w5500.dtbo \ + watterott-display.dtbo \ + waveshare-can-fd-hat-mode-a.dtbo \ + waveshare-can-fd-hat-mode-b.dtbo \ + wittypi.dtbo \ + wm8960-soundcard.dtbo + +# These will simply be copied +misc-$(CONFIG_ARCH_BCM2835) += README + +targets += dtbs dtbs_install +targets += $(dtbo-y) +targets += $(misc-y) + +always-y := $(dtbo-y) +clean-files := *.dtbo --- linux-raspi-6.8.0.orig/arch/arm/boot/dts/overlays/README +++ linux-raspi-6.8.0/arch/arm/boot/dts/overlays/README @@ -0,0 +1,5288 @@ +Introduction +============ + +This directory contains Device Tree overlays. Device Tree makes it possible +to support many hardware configurations with a single kernel and without the +need to explicitly load or blacklist kernel modules. Note that this isn't a +"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices +are still configured by the board support code, but the intention is to +eventually reach that goal. + +On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By +default, the Raspberry Pi kernel boots with device tree enabled. You can +completely disable DT usage (for now) by adding: + + device_tree= + +to your config.txt, which should cause your Pi to revert to the old way of +doing things after a reboot. + +In /boot you will find a .dtb for each base platform. This describes the +hardware that is part of the Raspberry Pi board. The loader (start.elf and its +siblings) selects the .dtb file appropriate for the platform by name, and reads +it into memory. At this point, all of the optional interfaces (i2c, i2s, spi) +are disabled, but they can be enabled using Device Tree parameters: + + dtparam=i2c=on,i2s=on,spi=on + +However, this shouldn't be necessary in many use cases because loading an +overlay that requires one of those interfaces will cause it to be enabled +automatically, and it is advisable to only enable interfaces if they are +needed. + +Configuring additional, optional hardware is done using Device Tree overlays +(see below). + +GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and +not the physical pin numbers. + +raspi-config +============ + +The Advanced Options section of the raspi-config utility can enable and disable +Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it +is possible to both enable an interface and blacklist the driver, if for some +reason you should want to defer the loading. + +Modules +======= + +As well as describing the hardware, Device Tree also gives enough information +to allow suitable driver modules to be located and loaded, with the corollary +that unneeded modules are not loaded. As a result it should be possible to +remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can +have its contents deleted (or commented out). + +Using Overlays +============== + +Overlays are loaded using the "dtoverlay" config.txt setting. As an example, +consider I2C Real Time Clock drivers. In the pre-DT world these would be loaded +by writing a magic string comprising a device identifier and an I2C address to +a special file in /sys/class/i2c-adapter, having first loaded the driver for +the I2C interface and the RTC device - something like this: + + modprobe i2c-bcm2835 + modprobe rtc-ds1307 + echo ds1307 0x68 > /sys/class/i2c-adapter/i2c-1/new_device + +With DT enabled, this becomes a line in config.txt: + + dtoverlay=i2c-rtc,ds1307 + +This causes the file /boot/overlays/i2c-rtc.dtbo to be loaded and a "node" +describing the DS1307 I2C device to be added to the Device Tree for the Pi. By +default it usees address 0x68, but this can be modified with an additional DT +parameter: + + dtoverlay=i2c-rtc,ds1307,addr=0x68 + +Parameters usually have default values, although certain parameters are +mandatory. See the list of overlays below for a description of the parameters +and their defaults. + +Making new Overlays based on existing Overlays +============================================== + +Recent overlays have been designed in a more general way, so that they can be +adapted to hardware by changing their parameters. When you have additional +hardware with more than one device of a kind, you end up using the same overlay +multiple times with other parameters, e.g. + + # 2 CAN FD interfaces on spi but with different pins + dtoverlay=mcp251xfd,spi0-0,interrupt=25 + dtoverlay=mcp251xfd,spi0-1,interrupt=24 + + # a realtime clock on i2c + dtoverlay=i2c-rtc,pcf85063 + +While this approach does work, it requires knowledge about the hardware design. +It is more feasible to simplify things for the end user by providing a single +overlay as it is done the traditional way. + +A new overlay can be generated by using ovmerge utility. +https://github.com/raspberrypi/utils/blob/master/ovmerge/ovmerge + +To generate an overlay for the above configuration we pass the configuration +to ovmerge and add the -c flag. + + ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 \ + mcp251xfd-overlay.dts,spi0-1,interrupt=24 \ + i2c-rtc-overlay.dts,pcf85063 \ + >> merged-overlay.dts + +The -c option writes the command above as a comment into the overlay as +a marker that this overlay is generated and how it was generated. +After compiling the overlay it can be loaded in a single line. + + dtoverlay=merged + +It does the same as the original configuration but without parameters. + +The Overlay and Parameter Reference +=================================== + +N.B. When editing this file, please preserve the indentation levels to make it +simple to parse programmatically. NO HARD TABS. + + +Name: +Info: Configures the base Raspberry Pi hardware +Load: +Params: + ant1 Select antenna 1 (default). CM4 only. + + ant2 Select antenna 2. CM4 only. + + noant Disable both antennas. CM4 only. + + audio Set to "on" to enable the onboard ALSA audio + interface (default "off") + + axiperf Set to "on" to enable the AXI bus performance + monitors. + See /sys/kernel/debug/raspberrypi_axi_monitor + for the results. + + bdaddr Set an alternative Bluetooth address (BDADDR). + The value should be a 6-byte hexadecimal value, + with or without colon separators, written least- + significant-byte first. For example, + bdaddr=06:05:04:03:02:01 + will set the BDADDR to 01:02:03:04:05:06. + + button_debounce Set the debounce delay (in ms) on the power/ + shutdown button (default 50ms) + + cam0_reg Enables CAM 0 regulator. + Only required on CM1 & 3. + + cam0_reg_gpio Set GPIO for CAM 0 regulator. + Default 31 on CM1, 3, and 4S. + Default of GPIO expander 5 on CM4, but override + switches to normal GPIO. + + cam1_reg Enables CAM 1 regulator. + Only required on CM1 & 3. + + cam1_reg_gpio Set GPIO for CAM 1 regulator. + Default 3 on CM1, 3, and 4S. + Default of GPIO expander 5 on CM4, but override + switches to normal GPIO. + + cooling_fan Enables the Pi 5 cooling fan (enabled + automatically by the firmware) + + drm_fb0_rp1_dpi Assign /dev/fb0 to the RP1 DPI output + + drm_fb0_rp1_dsi0 Assign /dev/fb0 to the RP1 DSI0 output + + drm_fb0_rp1_dsi1 Assign /dev/fb0 to the RP1 DSI1 output + + drm_fb0_vc4 Assign /dev/fb0 to the vc4 outputs + + drm_fb1_rp1_dpi Assign /dev/fb1 to the RP1 DPI output + + drm_fb1_rp1_dsi0 Assign /dev/fb1 to the RP1 DSI0 output + + drm_fb1_rp1_dsi1 Assign /dev/fb1 to the RP1 DSI1 output + + drm_fb1_vc4 Assign /dev/fb1 to the vc4 outputs + + drm_fb2_rp1_dpi Assign /dev/fb2 to the RP1 DPI output + + drm_fb2_rp1_dsi0 Assign /dev/fb2 to the RP1 DSI0 output + + drm_fb2_rp1_dsi1 Assign /dev/fb2 to the RP1 DSI1 output + + drm_fb2_vc4 Assign /dev/fb2 to the vc4 outputs + + dwc2_dr_mode Set dwc2 USB controller driver mode. + Default: "otg" + Legal values: "host", "peripheral", "otg". + + eee Enable Energy Efficient Ethernet support for + compatible devices (default "on"). See also + "tx_lpi_timer". Pi3B+ only. + + eth_downshift_after Set the number of auto-negotiation failures + after which the 1000Mbps modes are disabled. + Legal values are 2, 3, 4, 5 and 0, where + 0 means never downshift (default 2). Pi3B+ only. + + eth_led0 Set mode of LED0 - amber on Pi3B+ (default "1"), + green on Pi4/5 (default "0"). + The legal values are: + + Pi3B+ + + 0=link/activity 1=link1000/activity + 2=link100/activity 3=link10/activity + 4=link100/1000/activity 5=link10/1000/activity + 6=link10/100/activity 14=off 15=on + + Pi4/5 + + 0=Speed/Activity 1=Speed + 2=Flash activity 3=FDX + 4=Off 5=On + 6=Alt 7=Speed/Flash + 8=Link 9=Activity + + eth_led1 Set mode of LED1 - green on Pi3B+ (default "6"), + amber on Pi4/5 (default "8"). See eth_led0 for + legal values. + + eth_max_speed Set the maximum speed a link is allowed + to negotiate. Legal values are 10, 100 and + 1000 (default 1000). Pi3B+ only. + + fan_temp0 Temperature threshold (in millicelcius) for + 1st cooling level (default 50000). Pi5 only. + fan_temp0_hyst Temperature hysteresis (in millicelcius) for + 1st cooling level (default 5000). Pi5 only. + fan_temp0_speed Fan PWM setting for 1st cooling level (0-255, + default 75). Pi5 only. + fan_temp1 Temperature threshold (in millicelcius) for + 2nd cooling level (default 60000). Pi5 only. + fan_temp1_hyst Temperature hysteresis (in millicelcius) for + 2nd cooling level (default 5000). Pi5 only. + fan_temp1_speed Fan PWM setting for 2nd cooling level (0-255, + default 125). Pi5 only. + fan_temp2 Temperature threshold (in millicelcius) for + 3rd cooling level (default 67500). Pi5 only. + fan_temp2_hyst Temperature hysteresis (in millicelcius) for + 3rd cooling level (default 5000). Pi5 only. + fan_temp2_speed Fan PWM setting for 3rd cooling level (0-255, + default 175). Pi5 only. + fan_temp3 Temperature threshold (in millicelcius) for + 4th cooling level (default 75000). Pi5 only. + fan_temp3_hyst Temperature hysteresis (in millicelcius) for + 4th cooling level (default 5000). Pi5 only. + fan_temp3_speed Fan PWM setting for 4th cooling level (0-255, + default 250). Pi5 only. + + hdmi Set to "off" to disable the HDMI interface + (default "on") + + i2c An alias for i2c_arm + + i2c_arm Set to "on" to enable the ARM's i2c interface + (default "off") + + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface + (default "100000") + + i2c_baudrate An alias for i2c_arm_baudrate + + i2c_csi_dsi Set to "on" to enable the i2c_csi_dsi interface + + i2c_csi_dsi0 Set to "on" to enable the i2c_csi_dsi0 interface + + i2c_csi_dsi1 Set to "on" to enable the i2c_csi_dsi1 interface + + i2c_vc Set to "on" to enable the i2c interface + usually reserved for the VideoCore processor + (default "off") + + i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface + (default "100000") + + i2s Set to "on" to enable the i2s interface + (default "off") + + i2s_dma4 Use to enable 40-bit DMA on the i2s interface + (the assigned value doesn't matter) + (2711 only) + + krnbt Set to "off" to disable autoprobing of Bluetooth + driver without need of hciattach/btattach + (default "on") + + krnbt_baudrate Set the baudrate of the PL011 UART when used + with krnbt=on + + nvme Alias for "pciex1" (2712 only) + + pcie Set to "off" to disable the PCIe interface + (default "on") + (2711 only, but not applicable on CM4S) + N.B. USB-A ports on 4B are subsequently disabled + + pcie_tperst_clk_ms Add N milliseconds between PCIe reference clock + activation and PERST# deassertion + (CM4 and 2712, default "0") + + pciex1 Set to "on" to enable the external PCIe link + (2712 only, default "off") + + pciex1_gen Sets the PCIe "GEN"/speed for the external PCIe + link (2712 only, default "2") + + pciex1_no_l0s Set to "on" to disable ASPM L0s on the external + PCIe link for devices that have broken + implementations (2712 only, default "off") + + pciex1_tperst_clk_ms Alias for pcie_tperst_clk_ms + (2712 only, default "0") + + spi Set to "on" to enable the spi interfaces + (default "off") + + spi_dma4 Use to enable 40-bit DMA on spi interfaces + (the assigned value doesn't matter) + (2711 only) + + random Set to "on" to enable the hardware random + number generator (default "on") + + rtc Set to "off" to disable the onboard Real Time + Clock (2712 only, default "on") + + rtc_bbat_vchg Set the RTC backup battery charging voltage in + microvolts. If set to 0 or not specified, the + trickle charger is disabled. + (2712 only, default "0") + + sd Set to "off" to disable the SD card (or eMMC on + non-lite SKU of CM4). + (default "on") + + sd_overclock Clock (in MHz) to use when the MMC framework + requests 50MHz + + sd_poll_once Looks for a card once after booting. Useful + for network booting scenarios to avoid the + overhead of continuous polling. N.B. Using + this option restricts the system to using a + single card per boot (or none at all). + (default off) + + sd_force_pio Disable DMA support for SD driver (default off) + + sd_pio_limit Number of blocks above which to use DMA for + SD card (default 1) + + sd_debug Enable debug output from SD driver (default off) + + sdio_overclock Clock (in MHz) to use when the MMC framework + requests 50MHz for the SDIO/WLAN interface. + + suspend Make the power button trigger a suspend rather + than a power-off (2712 only, default "off") + + tx_lpi_timer Set the delay in microseconds between going idle + and entering the low power state (default 600). + Requires EEE to be enabled - see "eee". + + uart0 Set to "off" to disable uart0 (default "on") + + uart0_console Move the kernel boot console to UART0 on pins + 6, 8 and 10 of the 40-way header (2712 only, + default "off") + + uart1 Set to "on" or "off" to enable or disable uart1 + (default varies) + + watchdog Set to "on" to enable the hardware watchdog + (default "off") + + wifiaddr Set an alternative WiFi MAC address. + The value should be a 6-byte hexadecimal value, + with or without colon separators, written in the + natural (big-endian) order. + + act_led_trigger Choose which activity the LED tracks. + Use "heartbeat" for a nice load indicator. + (default "mmc") + + act_led_activelow Set to "on" to invert the sense of the LED + (default "off") + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led + overlay. + + act_led_gpio Set which GPIO to use for the activity LED + (in case you want to connect it to an external + device) + (default "16" on a non-Plus board, "47" on a + Plus or Pi 2) + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led + overlay. + + pwr_led_trigger + pwr_led_activelow + pwr_led_gpio + As for act_led_*, but using the PWR LED. + Not available on Model A/B boards. + + N.B. It is recommended to only enable those interfaces that are needed. + Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc + interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.) + Note also that i2c, i2c_arm and i2c_vc are aliases for the physical + interfaces i2c0 and i2c1. Use of the numeric variants is still possible + but deprecated because the ARM/VC assignments differ between board + revisions. The same board-specific mapping applies to i2c_baudrate, + and the other i2c baudrate parameters. + + +Name: act-led +Info: Pi 3B, 3B+, 3A+ and 4B use a GPIO expander to drive the LEDs which can + only be accessed from the VPU. There is a special driver for this with a + separate DT node, which has the unfortunate consequence of breaking the + act_led_gpio and act_led_activelow dtparams. + This overlay changes the GPIO controller back to the standard one and + restores the dtparams. +Load: dtoverlay=act-led,= +Params: activelow Set to "on" to invert the sense of the LED + (default "off") + + gpio Set which GPIO to use for the activity LED + (in case you want to connect it to an external + device) + REQUIRED + + +Name: adafruit-st7735r +Info: Overlay for the SPI-connected Adafruit 1.8" 160x128 or 128x128 displays, + based on the ST7735R chip. + This overlay uses the newer DRM/KMS "Tiny" driver. +Load: dtoverlay=adafruit-st7735r,= +Params: 128x128 Select the 128x128 driver (default 160x128) + rotate Display rotation {0,90,180,270} (default 90) + speed SPI bus speed in Hz (default 4000000) + dc_pin GPIO pin for D/C (default 24) + reset_pin GPIO pin for RESET (default 25) + led_pin GPIO used to control backlight (default 18) + + +Name: adafruit18 +Info: Overlay for the SPI-connected Adafruit 1.8" display (based on the + ST7735R chip). It includes support for the "green tab" version. + This overlay uses the older fbtft driver. +Load: dtoverlay=adafruit18,= +Params: green Use the adafruit18_green variant. + rotate Display rotation {0,90,180,270} + speed SPI bus speed in Hz (default 4000000) + fps Display frame rate in Hz + bgr Enable BGR mode (default off) + debug Debug output level {0-7} + dc_pin GPIO pin for D/C (default 24) + reset_pin GPIO pin for RESET (default 25) + led_pin GPIO used to control backlight (default 18) + + +Name: adau1977-adc +Info: Overlay for activation of ADAU1977 ADC codec over I2C for control + and I2S for data. +Load: dtoverlay=adau1977-adc +Params: + + +Name: adau7002-simple +Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter. +Load: dtoverlay=adau7002-simple,= +Params: card-name Override the default, "adau7002", card name. + + +Name: ads1015 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C +Load: dtoverlay=ads1015,= +Params: addr I2C bus address of device. Set based on how the + addr pin is wired. (default=0x48 assumes addr + is pulled to GND) + cha_enable Enable virtual channel a. (default=true) + cha_cfg Set the configuration for virtual channel a. + (default=4 configures this channel for the + voltage at A0 with respect to GND) + cha_datarate Set the datarate (samples/sec) for this channel. + (default=4 sets 1600 sps) + cha_gain Set the gain of the Programmable Gain + Amplifier for this channel. (default=2 sets the + full scale of the channel to 2.048 Volts) + + Channel (ch) parameters can be set for each enabled channel. + A maximum of 4 channels can be enabled (letters a thru d). + For more information refer to the device datasheet at: + http://www.ti.com/lit/ds/symlink/ads1015.pdf + + +Name: ads1115 +Info: Texas Instruments ADS1115 ADC +Load: dtoverlay=ads1115,[=] +Params: addr I2C bus address of device. Set based on how the + addr pin is wired. (default=0x48 assumes addr + is pulled to GND) + cha_enable Enable virtual channel a. + cha_cfg Set the configuration for virtual channel a. + (default=4 configures this channel for the + voltage at A0 with respect to GND) + cha_datarate Set the datarate (samples/sec) for this channel. + (default=7 sets 860 sps) + cha_gain Set the gain of the Programmable Gain + Amplifier for this channel. (Default 1 sets the + full scale of the channel to 4.096 Volts) + i2c0 Choose the I2C0 bus on GPIOs 0&1 + i2c_csi_dsi Choose the I2C0 bus on GPIOs 44&45 + i2c3 Choose the I2C3 bus (configure with the i2c3 + overlay - BCM2711 only) + i2c4 Choose the I2C4 bus (configure with the i2c4 + overlay - BCM2711 only) + i2c5 Choose the I2C5 bus (configure with the i2c5 + overlay - BCM2711 only) + i2c6 Choose the I2C6 bus (configure with the i2c6 + overlay - BCM2711 only) + + Channel parameters can be set for each enabled channel. + A maximum of 4 channels can be enabled (letters a thru d). + For more information refer to the device datasheet at: + http://www.ti.com/lit/ds/symlink/ads1115.pdf + + +Name: ads7846 +Info: ADS7846 Touch controller +Load: dtoverlay=ads7846,= +Params: cs SPI bus Chip Select (default 1) + speed SPI bus speed (default 2MHz, max 3.25MHz) + penirq GPIO used for PENIRQ. REQUIRED + penirq_pull Set GPIO pull (default 0=none, 2=pullup) + swapxy Swap x and y axis + xmin Minimum value on the X axis (default 0) + ymin Minimum value on the Y axis (default 0) + xmax Maximum value on the X axis (default 4095) + ymax Maximum value on the Y axis (default 4095) + pmin Minimum reported pressure value (default 0) + pmax Maximum reported pressure value (default 65535) + xohms Touchpanel sensitivity (X-plate resistance) + (default 400) + + penirq is required and usually xohms (60-100) has to be set as well. + Apart from that, pmax (255) and swapxy are also common. + The rest of the calibration can be done with xinput-calibrator. + See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian + Device Tree binding document: + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt + + +Name: adv7282m +Info: Analog Devices ADV7282M analogue video to CSI2 bridge. + Uses Unicam1, which is the standard camera connector on most Pi + variants. +Load: dtoverlay=adv7282m,= +Params: addr Overrides the I2C address (default 0x21) + media-controller Configure use of Media Controller API for + configuring the sensor (default off) + + +Name: adv728x-m +Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges. + This is a wrapper for adv7282m, and defaults to ADV7282M. +Load: dtoverlay=adv728x-m,= +Params: addr Overrides the I2C address (default 0x21) + adv7280m Select ADV7280-M. + adv7281m Select ADV7281-M. + adv7281ma Select ADV7281-MA. + media-controller Configure use of Media Controller API for + configuring the sensor (default off) + + +Name: akkordion-iqdacplus +Info: Configures the Digital Dreamtime Akkordion Music Player (based on the + OEM IQAudIO DAC+ or DAC Zero module). +Load: dtoverlay=akkordion-iqdacplus,= +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. Enable with + dtoverlay=akkordion-iqdacplus,24db_digital_gain + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24db_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + + +Name: allo-boss-dac-pcm512x-audio +Info: Configures the Allo Boss DAC audio cards. +Load: dtoverlay=allo-boss-dac-pcm512x-audio, +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. Enable with + "dtoverlay=allo-boss-dac-pcm512x-audio, + 24db_digital_gain" + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24db_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + slave Force Boss DAC into slave mode, using Pi a + master for bit clock and frame clock. Enable + with "dtoverlay=allo-boss-dac-pcm512x-audio, + slave" + + +Name: allo-boss2-dac-audio +Info: Configures the Allo Boss2 DAC audio card +Load: dtoverlay=allo-boss2-dac-audio +Params: + + +Name: allo-digione +Info: Configures the Allo Digione audio card +Load: dtoverlay=allo-digione +Params: + + +Name: allo-katana-dac-audio +Info: Configures the Allo Katana DAC audio card +Load: dtoverlay=allo-katana-dac-audio +Params: + + +Name: allo-piano-dac-pcm512x-audio +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards. + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo. + The subwoofer outputs on the Piano 2.1 are not currently supported!) +Load: dtoverlay=allo-piano-dac-pcm512x-audio, +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24db_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + + +Name: allo-piano-dac-plus-pcm512x-audio +Info: Configures the Allo Piano DAC (2.1) audio cards. +Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio, +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24db_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + glb_mclk This option is only with Kali board. If enabled, + MCLK for Kali is used and PLL is disabled for + better voice quality. (default Off) + + +Name: anyspi +Info: Universal device tree overlay for SPI devices + + Just specify the SPI address and device name ("compatible" property). + This overlay lacks any device-specific parameter support! + + For devices on spi1 or spi2, the interfaces should be enabled + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. + + Examples: + 1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz: + dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000 + 2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz: + dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204" +Load: dtoverlay=anyspi,= +Params: spi- Configure device at spi, cs + (boolean, required) + dev Set device name to search compatible module + (string, required) + speed Set SPI clock frequency in Hz + (integer, optional, default 500000) + + +Name: apds9960 +Info: Configures the AVAGO APDS9960 digital proximity, ambient light, RGB and + gesture sensor +Load: dtoverlay=apds9960,= +Params: gpiopin GPIO used for INT (default 4) + noints Disable the interrupt GPIO line. + + +Name: applepi-dac +Info: Configures the Orchard Audio ApplePi-DAC audio card +Load: dtoverlay=applepi-dac +Params: + + +Name: arducam-64mp +Info: Arducam 64MP camera module. + Uses Unicam 1, which is the standard camera connector on most Pi + variants. +Load: dtoverlay=arducam-64mp,= +Params: rotation Mounting rotation of the camera sensor (0 or + 180, default 0) + orientation Sensor orientation (0 = front, 1 = rear, + 2 = external, default external) + media-controller Configure use of Media Controller API for + configuring the sensor (default on) + cam0 Adopt the default configuration for CAM0 on a + Compute Module (CSI0, i2c_vc, and cam0_reg). + vcm Select lens driver state. Default is enabled, + but vcm=off will disable. + + +Name: arducam-pivariety +Info: Arducam Pivariety camera module. + Uses Unicam 1, which is the standard camera connector on most Pi + variants. +Load: dtoverlay=arducam-pivariety,= +Params: rotation Mounting rotation of the camera sensor (0 or + 180, default 0) + orientation Sensor orientation (0 = front, 1 = rear, + 2 = external, default external) + media-controller Configure use of Media Controller API for + configuring the sensor (default on) + cam0 Adopt the default configuration for CAM0 on a + Compute Module (CSI0, i2c_vc, and cam0_reg). + + +Name: at86rf233 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver, + connected to spi0.0 +Load: dtoverlay=at86rf233,= +Params: interrupt GPIO used for INT (default 23) + reset GPIO used for Reset (default 24) + sleep GPIO used for Sleep (default 25) + speed SPI bus speed in Hz (default 3000000) + trim Fine tuning of the internal capacitance + arrays (0=+0pF, 15=+4.5pF, default 15) + + +Name: audioinjector-addons +Info: Configures the audioinjector.net audio add on soundcards +Load: dtoverlay=audioinjector-addons,= +Params: non-stop-clocks Keeps the clocks running even when the stream + is paused or stopped (default off) + + +Name: audioinjector-bare-i2s +Info: Configures the audioinjector.net audio bare i2s soundcard +Load: dtoverlay=audioinjector-bare-i2s +Params: + + +Name: audioinjector-isolated-soundcard +Info: Configures the audioinjector.net isolated soundcard +Load: dtoverlay=audioinjector-isolated-soundcard +Params: + + +Name: audioinjector-ultra +Info: Configures the audioinjector.net ultra soundcard +Load: dtoverlay=audioinjector-ultra +Params: + + +Name: audioinjector-wm8731-audio +Info: Configures the audioinjector.net audio add on soundcard +Load: dtoverlay=audioinjector-wm8731-audio +Params: + + +Name: audiosense-pi +Info: Configures the audiosense-pi add on soundcard + For more information refer to + https://gitlab.com/kakar0t/audiosense-pi +Load: dtoverlay=audiosense-pi +Params: + + +Name: audremap +Info: Switches PWM sound output to GPIOs on the 40-pin header +Load: dtoverlay=audremap,= +Params: swap_lr Reverse the channel allocation, which will also + swap the audio jack outputs (default off) + enable_jack Don't switch off the audio jack output. Does + nothing on BCM2711 (default off) + pins_12_13 Select GPIOs 12 & 13 (default) + pins_18_19 Select GPIOs 18 & 19 + pins_40_41 Select GPIOs 40 & 41 (not available on CM4, used + for other purposes) + pins_40_45 Select GPIOs 40 & 45 (don't use on BCM2711 - the + pins are on different controllers) + + +Name: balena-fin +Info: Overlay that enables WLAN, Bluetooth and the GPIO expander on the + balenaFin carrier board for the Raspberry Pi Compute Module 3/3+ Lite. +Load: dtoverlay=balena-fin +Params: + + +Name: bcm2712d0 +Info: Overlay encapsulating the BCM2712 C0->D0 differences +Load: dtoverlay=bcm2712d0 +Params: + + +Name: bmp085_i2c-sensor +Info: This overlay is now deprecated - see i2c-sensor +Load: + + +Name: camera-mux-2port +Info: Configures a 2 port camera multiplexer + Note that currently ALL IMX290 modules share a common clock, therefore + all modules will need to have the same clock frequency. +Load: dtoverlay=camera-mux-2port,= +Params: cam0-arducam-64mp Select Arducam64MP for camera on port 0 + cam0-imx219 Select IMX219 for camera on port 0 + cam0-imx258 Select IMX258 for camera on port 0 + cam0-imx290 Select IMX290 for camera on port 0 + cam0-imx477 Select IMX477 for camera on port 0 + cam0-imx519 Select IMX519 for camera on port 0 + cam0-imx708 Select IMX708 for camera on port 0 + cam0-ov2311 Select OV2311 for camera on port 0 + cam0-ov5647 Select OV5647 for camera on port 0 + cam0-ov64a40 Select OV64A40 for camera on port 0 + cam0-ov7251 Select OV7251 for camera on port 0 + cam0-ov9281 Select OV9281 for camera on port 0 + cam0-imx290-clk-freq Set clock frequency for an IMX290 on port 0 + cam1-arducam-64mp Select Arducam64MP for camera on port 1 + cam1-imx219 Select IMX219 for camera on port 1 + cam1-imx258 Select IMX258 for camera on port 1 + cam1-imx290 Select IMX290 for camera on port 1 + cam1-imx477 Select IMX477 for camera on port 1 + cam1-imx519 Select IMX519 for camera on port 1 + cam1-imx708 Select IMX708 for camera on port 1 + cam1-ov2311 Select OV2311 for camera on port 1 + cam1-ov5647 Select OV5647 for camera on port 1 + cam1-ov64a40 Select OV64A40 for camera on port 1 + cam1-ov7251 Select OV7251 for camera on port 1 + cam1-ov9281 Select OV9281 for camera on port 1 + cam1-imx290-clk-freq Set clock frequency for an IMX290 on port 1 + + cam0 Connect the mux to CAM0 port (default is CAM1) + + +Name: camera-mux-4port +Info: Configures a 4 port camera multiplexer + Note that currently ALL IMX290 modules share a common clock, therefore + all modules will need to have the same clock frequency. +Load: dtoverlay=camera-mux-4port,= +Params: cam0-arducam-64mp Select Arducam64MP for camera on port 0 + cam0-imx219 Select IMX219 for camera on port 0 + cam0-imx258 Select IMX258 for camera on port 0 + cam0-imx290 Select IMX290 for camera on port 0 + cam0-imx477 Select IMX477 for camera on port 0 + cam0-imx519 Select IMX519 for camera on port 0 + cam0-imx708 Select IMX708 for camera on port 0 + cam0-ov2311 Select OV2311 for camera on port 0 + cam0-ov5647 Select OV5647 for camera on port 0 + cam0-ov64a40 Select OV64A40 for camera on port 0 + cam0-ov7251 Select OV7251 for camera on port 0 + cam0-ov9281 Select OV9281 for camera on port 0 + cam0-imx290-clk-freq Set clock frequency for an IMX290 on port 0 + cam1-arducam-64mp Select Arducam64MP for camera on port 1 + cam1-imx219 Select IMX219 for camera on port 1 + cam1-imx258 Select IMX258 for camera on port 1 + cam1-imx290 Select IMX290 for camera on port 1 + cam1-imx477 Select IMX477 for camera on port 1 + cam1-imx519 Select IMX519 for camera on port 1 + cam1-imx708 Select IMX708 for camera on port 1 + cam1-ov2311 Select OV2311 for camera on port 1 + cam1-ov5647 Select OV5647 for camera on port 1 + cam1-ov64a40 Select OV64A40 for camera on port 1 + cam1-ov7251 Select OV7251 for camera on port 1 + cam1-ov9281 Select OV9281 for camera on port 1 + cam1-imx290-clk-freq Set clock frequency for an IMX290 on port 1 + cam2-arducam-64mp Select Arducam64MP for camera on port 2 + cam2-imx219 Select IMX219 for camera on port 2 + cam2-imx258 Select IMX258 for camera on port 2 + cam2-imx290 Select IMX290 for camera on port 2 + cam2-imx477 Select IMX477 for camera on port 2 + cam2-imx519 Select IMX519 for camera on port 2 + cam2-imx708 Select IMX708 for camera on port 2 + cam2-ov2311 Select OV2311 for camera on port 2 + cam2-ov5647 Select OV5647 for camera on port 2 + cam2-ov64a40 Select OV64A40 for camera on port 2 + cam2-ov7251 Select OV7251 for camera on port 2 + cam2-ov9281 Select OV9281 for camera on port 2 + cam2-imx290-clk-freq Set clock frequency for an IMX290 on port 2 + cam3-arducam-64mp Select Arducam64MP for camera on port 3 + cam3-imx219 Select IMX219 for camera on port 3 + cam3-imx258 Select IMX258 for camera on port 3 + cam3-imx290 Select IMX290 for camera on port 3 + cam3-imx477 Select IMX477 for camera on port 3 + cam3-imx519 Select IMX519 for camera on port 3 + cam3-imx708 Select IMX708 for camera on port 3 + cam3-ov2311 Select OV2311 for camera on port 3 + cam3-ov5647 Select OV5647 for camera on port 3 + cam3-ov64a40 Select OV64A40 for camera on port 3 + cam3-ov7251 Select OV7251 for camera on port 3 + cam3-ov9281 Select OV9281 for camera on port 3 + cam3-imx290-clk-freq Set clock frequency for an IMX290 on port 3 + + cam0 Connect the mux to CAM0 port (default is CAM1) + + +Name: cap1106 +Info: Enables the ability to use the cap1106 touch sensor as a keyboard +Load: dtoverlay=cap1106,= +Params: int_pin GPIO pin for interrupt signal (default 23) + + +Name: chipdip-dac +Info: Configures Chip Dip audio cards. +Load: dtoverlay=chipdip-dac +Params: + + +Name: cirrus-wm5102 +Info: Configures the Cirrus Logic Audio Card +Load: dtoverlay=cirrus-wm5102 +Params: + + +Name: cm-swap-i2c0 +Info: Largely for Compute Modules 1&3 where the original instructions for + adding a camera used GPIOs 0&1 for CAM1 and 28&29 for CAM0, whilst all + other platforms use 28&29 (or 44&45) for CAM1. + The default assignment through using this overlay is for + i2c0 to use 28&29, and i2c10 (aka i2c_csi_dsi) to use 28&29, but the + overrides allow this to be changed. +Load: dtoverlay=cm-swap-i2c0,= +Params: i2c0-gpio0 Use GPIOs 0&1 for i2c0 + i2c0-gpio28 Use GPIOs 28&29 for i2c0 (default) + i2c0-gpio44 Use GPIOs 44&45 for i2c0 + i2c10-gpio0 Use GPIOs 0&1 for i2c0 (default) + i2c10-gpio28 Use GPIOs 28&29 for i2c0 + i2c10-gpio44 Use GPIOs 44&45 for i2c0 + + +Name: cma +Info: Set custom CMA sizes, only use if you know what you are doing, might + clash with other overlays like vc4-fkms-v3d and vc4-kms-v3d. +Load: dtoverlay=cma,= +Params: cma-512 CMA is 512MB (needs 1GB) + cma-448 CMA is 448MB (needs 1GB) + cma-384 CMA is 384MB (needs 1GB) + cma-320 CMA is 320MB (needs 1GB) + cma-256 CMA is 256MB (needs 1GB) + cma-192 CMA is 192MB (needs 1GB) + cma-128 CMA is 128MB + cma-96 CMA is 96MB + cma-64 CMA is 64MB + cma-size CMA size in bytes, 4MB aligned + cma-default Use upstream's default value + + +Name: crystalfontz-cfa050_pi_m +Info: Configures the Crystalfontz CFA050-PI-M series of Raspberry Pi CM4 + based modules using the CFA7201280A0_050Tx 7" TFT LCD displays, + with or without capacitive touch screen. + Requires use of vc4-kms-v3d. +Load: dtoverlay=crystalfontz-cfa050_pi_m,= +Params: captouch Enable capacitive touch display + + +Name: cutiepi-panel +Info: 8" TFT LCD display and touch panel used by cutiepi.io +Load: dtoverlay=cutiepi-panel +Params: + + +Name: dacberry400 +Info: Configures the dacberry400 add on soundcard +Load: dtoverlay=dacberry400 +Params: + + +Name: dht11 +Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors + Also sometimes found with the part number(s) AM230x. +Load: dtoverlay=dht11,= +Params: gpiopin GPIO connected to the sensor's DATA output. + (default 4) + + +Name: dionaudio-kiwi +Info: Configures the Dion Audio KIWI STREAMER +Load: dtoverlay=dionaudio-kiwi +Params: + + +Name: dionaudio-loco +Info: Configures the Dion Audio LOCO DAC-AMP +Load: dtoverlay=dionaudio-loco +Params: + + +Name: dionaudio-loco-v2 +Info: Configures the Dion Audio LOCO-V2 DAC-AMP +Load: dtoverlay=dionaudio-loco-v2,= +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec + Digital volume control. Enable with + "dtoverlay=hifiberry-dacplus,24db_digital_gain" + (The default behaviour is that the Digital + volume control is limited to a maximum of + 0dB. ie. it can attenuate but not provide + gain. For most users, this will be desired + as it will prevent clipping. By appending + the 24dB_digital_gain parameter, the Digital + volume control will allow up to 24dB of + gain. If this parameter is enabled, it is the + responsibility of the user to ensure that + the Digital volume control is set to a value + that does not result in clipping/distortion!) + + +Name: disable-bt +Info: Disable onboard Bluetooth on Bluetooth-capable Raspberry Pis. On Pis + prior to Pi 5 this restores UART0/ttyAMA0 over GPIOs 14 & 15. +Load: dtoverlay=disable-bt +Params: + + +Name: disable-bt-pi5 +Info: See disable-bt + + +Name: disable-emmc2 +Info: Disable EMMC2 controller on BCM2711. + The allows the onboard EMMC storage on Compute Module 4 to be disabled + e.g. if a fault has occurred. +Load: dtoverlay=disable-emmc2 +Params: + + +Name: disable-wifi +Info: Disable onboard WLAN on WiFi-capable Raspberry Pis. +Load: dtoverlay=disable-wifi +Params: + + +Name: disable-wifi-pi5 +Info: See disable-wifi + + +Name: dpi18 +Info: Overlay for a generic 18-bit DPI display + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output + 2-3 seconds after the kernel has started. +Load: dtoverlay=dpi18 +Params: + + +Name: dpi18cpadhi +Info: Overlay for a generic 18-bit DPI display (in 'mode 6' connection scheme) + This uses GPIOs 0-9,12-17,20-25 (so no I2C, uart etc.), and activates + the output 3-3 seconds after the kernel has started. +Load: dtoverlay=dpi18cpadhi +Params: + + +Name: dpi24 +Info: Overlay for a generic 24-bit DPI display + This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output + 2-3 seconds after the kernel has started. +Load: dtoverlay=dpi24 +Params: + + +Name: draws +Info: Configures the NW Digital Radio DRAWS Hat + + The board includes an ADC to measure various board values and also + provides two analog user inputs on the expansion header. The ADC + can be configured for various sample rates and gain values to adjust + the input range. Tables describing the two parameters follow. + + ADC Gain Values: + 0 = +/- 6.144V + 1 = +/- 4.096V + 2 = +/- 2.048V + 3 = +/- 1.024V + 4 = +/- 0.512V + 5 = +/- 0.256V + 6 = +/- 0.256V + 7 = +/- 0.256V + + ADC Datarate Values: + 0 = 128sps + 1 = 250sps + 2 = 490sps + 3 = 920sps + 4 = 1600sps (default) + 5 = 2400sps + 6 = 3300sps + 7 = 3300sps +Load: dtoverlay=draws,= +Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs + input voltage sensor (default 1) + + draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage + sensor + + draws_adc_ch5_gain Sets the full scale resolution of the ADCs + 5V rail voltage sensor (default 1) + + draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage + sensor + + draws_adc_ch6_gain Sets the full scale resolution of the ADCs + AIN2 input (default 2) + + draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input + + draws_adc_ch7_gain Sets the full scale resolution of the ADCs + AIN3 input (default 2) + + draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input + + alsaname Name of the ALSA audio device (default "draws") + + +Name: dwc-otg +Info: Selects the dwc_otg USB controller driver which has fiq support. This + is the default on all except the Pi Zero which defaults to dwc2. +Load: dtoverlay=dwc-otg +Params: + + +Name: dwc2 +Info: Selects the dwc2 USB controller driver +Load: dtoverlay=dwc2,= +Params: dr_mode Dual role mode: "host", "peripheral" or "otg" + + g-rx-fifo-size Size of rx fifo size in gadget mode + + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget + mode + + +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ] + + +Name: edt-ft5406 +Info: Overlay for the EDT FT5406 touchscreen. + This works with the Raspberry Pi 7" touchscreen when not being polled + by the firmware. + By default the overlay uses the i2c_csi_dsi I2C interface, but this + can be overridden + You MUST use either "disable_touchscreen=1" or "ignore_lcd=1" in + config.txt to stop the firmware polling the touchscreen. +Load: dtoverlay=edt-ft5406,= +Params: sizex Touchscreen size x (default 800) + sizey Touchscreen size y (default 480) + invx Touchscreen inverted x axis + invy Touchscreen inverted y axis + swapxy Touchscreen swapped x y axis + i2c0 Choose the I2C0 bus on GPIOs 0&1 + i2c1 Choose the I2C1 bus on GPIOs 2&3 + i2c3 Choose the I2C3 bus (configure with the i2c3 + overlay - BCM2711 only) + i2c4 Choose the I2C4 bus (configure with the i2c4 + overlay - BCM2711 only) + i2c5 Choose the I2C5 bus (configure with the i2c5 + overlay - BCM2711 only) + i2c6 Choose the I2C6 bus (configure with the i2c6 + overlay - BCM2711 only) + addr Sets the address for the touch controller. Note + that the device must be configured to use the + specified address. + + +Name: enc28j60 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0 +Load: dtoverlay=enc28j60,= +Params: int_pin GPIO used for INT (default 25) + + speed SPI bus speed (default 12000000) + + +Name: enc28j60-spi2 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2 +Load: dtoverlay=enc28j60-spi2,= +Params: int_pin GPIO used for INT (default 39) + + speed SPI bus speed (default 12000000) + + +Name: exc3000 +Info: Enables I2C connected EETI EXC3000 multiple touch controller using + GPIO 4 (pin 7 on GPIO header) for interrupt. +Load: dtoverlay=exc3000,= +Params: interrupt GPIO used for interrupt (default 4) + sizex Touchscreen size x (default 4096) + sizey Touchscreen size y (default 4096) + invx Touchscreen inverted x axis + invy Touchscreen inverted y axis + swapxy Touchscreen swapped x y axis + + +Name: fbtft +Info: Overlay for SPI-connected displays using the fbtft drivers. + + This overlay seeks to replace the functionality provided by fbtft_device + which is now gone from the kernel. + + Most displays from fbtft_device have been ported over. + Example: + dtoverlay=fbtft,spi0-0,rpi-display,reset_pin=23,dc_pin=24,led_pin=18,rotate=270 + + It is also possible to specify the controller (this will use the default + init sequence in the driver). + Example: + dtoverlay=fbtft,spi0-0,ili9341,bgr,reset_pin=23,dc_pin=24,led_pin=18,rotate=270 + + For devices on spi1 or spi2, the interfaces should be enabled + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. + + The following features of fbtft_device have not been ported over: + - parallel bus is not supported + - the init property which overrides the controller initialization + sequence is not supported as a parameter due to memory limitations in + the bootloader responsible for applying the overlay. + + See https://github.com/notro/fbtft/wiki/FBTFT-RPI-overlays for how to + create an overlay. + +Load: dtoverlay=fbtft,= +Params: + spi- Configure device at spi, cs + (boolean, required) + speed SPI bus speed in Hz (default 32000000) + cpha Shifted clock phase (CPHA) mode + cpol Inverse clock polarity (CPOL) mode + + adafruit18 Adafruit 1.8 + adafruit22 Adafruit 2.2 (old) + adafruit22a Adafruit 2.2 + adafruit28 Adafruit 2.8 + adafruit13m Adafruit 1.3 OLED + admatec_c-berry28 C-Berry28 + dogs102 EA DOGS102 + er_tftm050_2 ER-TFTM070-2 + er_tftm070_5 ER-TFTM070-5 + ew24ha0 EW24HA0 + ew24ha0_9bit EW24HA0 in 9-bit mode + freetronicsoled128 Freetronics OLED128 + hy28a HY28A + hy28b HY28B + itdb28_spi ITDB02-2.8 with SPI interface circuit + mi0283qt-2 Watterott MI0283QT-2 + mi0283qt-9a Watterott MI0283QT-9A + nokia3310 Nokia 3310 + nokia3310a Nokia 3310a + nokia5110 Nokia 5110 + piscreen PiScreen + pitft Adafruit PiTFT 2.8 + pioled ILSoft OLED + rpi-display Watterott rpi-display + sainsmart18 Sainsmart 1.8 + sainsmart32_spi Sainsmart 3.2 with SPI interfce circuit + tinylcd35 TinyLCD 3.5 + tm022hdh26 Tianma TM022HDH26 + tontec35_9481 Tontect 3.5 with ILI9481 controller + tontec35_9486 Tontect 3.5 with ILI9486 controller + waveshare32b Waveshare 3.2 + waveshare22 Waveshare 2.2 + + bd663474 BD663474 display controller + hx8340bn HX8340BN display controller + hx8347d HX8347D display controller + hx8353d HX8353D display controller + hx8357d HX8357D display controller + ili9163 ILI9163 display controller + ili9320 ILI9320 display controller + ili9325 ILI9325 display controller + ili9340 ILI9340 display controller + ili9341 ILI9341 display controller + ili9481 ILI9481 display controller + ili9486 ILI9486 display controller + pcd8544 PCD8544 display controller + ra8875 RA8875 display controller + s6d02a1 S6D02A1 display controller + s6d1121 S6D1121 display controller + seps525 SEPS525 display controller + sh1106 SH1106 display controller + ssd1289 SSD1289 display controller + ssd1305 SSD1305 display controller + ssd1306 SSD1306 display controller + ssd1325 SSD1325 display controller + ssd1331 SSD1331 display controller + ssd1351 SSD1351 display controller + st7735r ST7735R display controller + st7789v ST7789V display controller + tls8204 TLS8204 display controller + uc1611 UC1611 display controller + uc1701 UC1701 display controller + upd161704 UPD161704 display controller + + width Display width in pixels + height Display height in pixels + regwidth Display controller register width (default is + driver specific) + buswidth Display bus interface width (default 8) + debug Debug output level {0-7} + rotate Display rotation {0, 90, 180, 270} (counter + clockwise). Not supported by all drivers. + bgr Enable BGR mode (default off). Use if Red and + Blue are swapped. Not supported by all drivers. + fps Frames per second (default 30). In effect this + states how long the driver will wait after video + memory has been changed until display update + transfer is started. + txbuflen Length of the FBTFT transmit buffer + (default 4096) + startbyte Sets the Start byte used by fb_ili9320, + fb_ili9325 and fb_hx8347d. Common value is 0x70. + gamma String representation of Gamma Curve(s). Driver + specific. Not supported by all drivers. + reset_pin GPIO pin for RESET + dc_pin GPIO pin for D/C + led_pin GPIO pin for LED backlight + + +Name: fe-pi-audio +Info: Configures the Fe-Pi Audio Sound Card +Load: dtoverlay=fe-pi-audio +Params: + + +Name: fsm-demo +Info: A demonstration of the gpio-fsm driver. The GPIOs are chosen to work + nicely with a "traffic-light" display of red, amber and green LEDs on + GPIOs 7, 8 and 25 respectively. +Load: dtoverlay=fsm-demo,= +Params: fsm_debug Enable debug logging (default off) + + +Name: gc9a01 +Info: Enables GalaxyCore's GC9A01 single chip driver based displays on + SPI0 as fb1, using GPIOs DC=25, RST=27 and BL=18 (physical + GPIO header pins 22, 13 and 12 respectively) in addition to the + SPI0 pins DIN=10, CLK=11 and CS=8 (physical GPIO header pins 19, + 23 and 24 respectively). +Load: dtoverlay=gc9a01,= +Params: speed Display SPI bus speed + + rotate Display rotation {0,90,180,270} + + width Width of the display + + height Height of the display + + fps Delay between frame updates + + debug Debug output level {0-7} + + +Name: ghost-amp +Info: An overlay for the Ghost amplifier. +Load: dtoverlay=ghost-amp,= +Params: fsm_debug Enable debug logging of the GPIO FSM (default + off) + + +Name: goodix +Info: Enables I2C connected Goodix gt9271 multiple touch controller using + GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset. +Load: dtoverlay=goodix,= +Params: interrupt GPIO used for interrupt (default 4) + reset GPIO used for reset (default 17) + + +Name: googlevoicehat-soundcard +Info: Configures the Google voiceHAT soundcard +Load: dtoverlay=googlevoicehat-soundcard +Params: + + +Name: gpio-charger +Info: This is a generic overlay for detecting charger with GPIO. +Load: dtoverlay=gpio-charger,= +Params: gpio GPIO pin to trigger on (default 4) + active_low When this is 1 (active low), a falling + edge generates a charging event and a + rising edge generates a discharging event. + When this is 0 (active high), this is + reversed. The default is 0 (active high) + gpio_pull Desired pull-up/down state (off, down, up) + Default is "down". + type Set a charger type for the pin. (Default: mains) + + +Name: gpio-fan +Info: Configure a GPIO pin to control a cooling fan. +Load: dtoverlay=gpio-fan,= +Params: gpiopin GPIO used to control the fan (default 12) + temp Temperature at which the fan switches on, in + millicelcius (default 55000) + hyst Temperature delta (in millicelcius) below + temp at which the fan will drop to minrpm + (default 10000) + + +Name: gpio-hog +Info: Activate a "hog" for a GPIO - request that the kernel configures it as + an output, driven low or high as indicated by the presence or absence + of the active_low parameter. Note that a hogged GPIO is not available + to other drivers or for gpioset/gpioget. +Load: dtoverlay=gpio-hog,= +Params: gpio GPIO pin to hog (default 26) + active_low If set, the hog drives the GPIO low (defaults + to off - the GPIO is driven high) + + +Name: gpio-ir +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core- + based gpio_ir_recv driver maps received keys directly to a + /dev/input/event* device, all decoding is done by the kernel - LIRC is + not required! The key mapping and other decoding parameters can be + configured by "ir-keytable" tool. +Load: dtoverlay=gpio-ir,= +Params: gpio_pin Input pin number. Default is 18. + + gpio_pull Desired pull-up/down state (off, down, up) + Default is "up". + + invert "1" = invert the input (active-low signalling). + "0" = non-inverted input (active-high + signalling). Default is "1". + + rc-map-name Default rc keymap (can also be changed by + ir-keytable), defaults to "rc-rc6-mce" + + +Name: gpio-ir-tx +Info: Use GPIO pin as bit-banged infrared transmitter output. + This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require + a PWM so it can be used together with onboard analog audio. +Load: dtoverlay=gpio-ir-tx,= +Params: gpio_pin Output GPIO (default 18) + + invert "1" = invert the output (make it active-low). + Default is "0" (active-high). + + +Name: gpio-key +Info: This is a generic overlay for activating GPIO keypresses using + the gpio-keys library and this dtoverlay. Multiple keys can be + set up using multiple calls to the overlay for configuring + additional buttons or joysticks. You can see available keycodes + at https://github.com/torvalds/linux/blob/v4.12/include/uapi/ + linux/input-event-codes.h#L64 +Load: dtoverlay=gpio-key,= +Params: gpio GPIO pin to trigger on (default 3) + active_low When this is 1 (active low), a falling + edge generates a key down event and a + rising edge generates a key up event. + When this is 0 (active high), this is + reversed. The default is 1 (active low) + gpio_pull Desired pull-up/down state (off, down, up) + Default is "up". Note that the default pin + (GPIO3) has an external pullup + label Set a label for the key + keycode Set the key code for the button + + + +Name: gpio-led +Info: This is a generic overlay for activating LEDs (or any other component) + by a GPIO pin. Multiple LEDs can be set up using multiple calls to the + overlay. While there are many existing methods to activate LEDs on the + RPi, this method offers some advantages: + 1) Does not require any userspace programs. + 2) LEDs can be connected to the kernel's led-trigger framework, + and drive the LED based on triggers such as cpu load, heartbeat, + kernel panic, key input, timers and others. + 3) LED can be tied to the input state of another GPIO pin. + 4) The LED is setup early during the kernel boot process (useful + for cpu/heartbeat/panic triggers). + + Typical electrical connection is: + RPI-GPIO.19 -> LED -> 300ohm resister -> RPI-GND + The GPIO pin number can be changed with the 'gpio=' parameter. + + To control an LED from userspace, write a 0 or 1 value: + echo 1 > /sys/class/leds/myled1/brightness + The 'myled1' name can be changed with the 'label=' parameter. + + To connect the LED to a kernel trigger from userspace: + echo cpu > /sys/class/leds/myled1/trigger + echo heartbeat > /sys/class/leds/myled1/trigger + echo none > /sys/class/leds/myled1/trigger + To connect the LED to GPIO.26 pin (physical pin 37): + echo gpio > /sys/class/leds/myled1/trigger + echo 26 > /sys/class/leds/myled1/gpio + Available triggers: + cat /sys/class/leds/myled1/trigger + + More information about the Linux kernel LED/Trigger system: + https://www.kernel.org/doc/Documentation/leds/leds-class.rst + https://www.kernel.org/doc/Documentation/leds/ledtrig-oneshot.rst +Load: dtoverlay=gpio-led,= +Params: gpio GPIO pin connected to the LED (default 19) + label The label for this LED. It will appear under + /sys/class/leds/