--- gcc-4.7-4.7.2.orig/debian/gfortran-BV-CRB.preinst.in +++ gcc-4.7-4.7.2/debian/gfortran-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-gfortran /usr/bin/@TARGET@-gfortran-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/libhfgcc1.symbols.armel +++ gcc-4.7-4.7.2/debian/libhfgcc1.symbols.armel @@ -0,0 +1,123 @@ +libgcc_s.so.1 libhfgcc1 #MINVER# +(ignore-blacklist)#include "libgcc1.symbols.aeabi" + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_3.5@GCC_3.5 1:4.3.0 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 + _Unwind_Complete@GCC_3.5 1:4.3.0 + _Unwind_DeleteException@GCC_3.0 1:4.3.0 + _Unwind_ForcedUnwind@GCC_3.0 1:4.3.0 + _Unwind_GetCFA@GCC_3.3 1:4.3.0 + _Unwind_GetDataRelBase@GCC_3.0 1:4.3.0 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.3.0 + _Unwind_GetRegionStart@GCC_3.0 1:4.3.0 + _Unwind_GetTextRelBase@GCC_3.0 1:4.3.0 + _Unwind_RaiseException@GCC_3.0 1:4.3.0 + _Unwind_Resume@GCC_3.0 1:4.3.0 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.3.0 + _Unwind_VRS_Get@GCC_3.5 1:4.3.0 + _Unwind_VRS_Pop@GCC_3.5 1:4.3.0 + _Unwind_VRS_Set@GCC_3.5 1:4.3.0 + __absvdi2@GCC_3.0 1:4.3.0 + __absvsi2@GCC_3.0 1:4.3.0 + __adddf3@GCC_3.0 1:4.3.0 + __addsf3@GCC_3.0 1:4.3.0 + __addvdi3@GCC_3.0 1:4.3.0 + __addvsi3@GCC_3.0 1:4.3.0 + __ashldi3@GCC_3.0 1:4.3.0 + __ashrdi3@GCC_3.0 1:4.3.0 + __bswapdi2@GCC_4.3.0 1:4.3.0 + __bswapsi2@GCC_4.3.0 1:4.3.0 + __clear_cache@GCC_3.0 1:4.3.0 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.3.0 + __clzsi2@GCC_3.4 1:4.3.0 + __cmpdi2@GCC_3.0 1:4.3.0 + __ctzdi2@GCC_3.4 1:4.3.0 + __ctzsi2@GCC_3.4 1:4.3.0 + __divdc3@GCC_4.0.0 1:4.3.0 + __divdf3@GCC_3.0 1:4.3.0 + __divdi3@GLIBC_2.0 1:4.3.0 + __divsc3@GCC_4.0.0 1:4.3.0 + __divsf3@GCC_3.0 1:4.3.0 + __divsi3@GCC_3.0 1:4.3.0 + __emutls_get_address@GCC_4.3.0 1:4.3.0 + __emutls_register_common@GCC_4.3.0 1:4.3.0 + __enable_execute_stack@GCC_3.4.2 1:4.3.0 + __eqdf2@GCC_3.0 1:4.3.0 + __eqsf2@GCC_3.0 1:4.3.0 + __extendsfdf2@GCC_3.0 1:4.3.0 + __ffsdi2@GCC_3.0 1:4.3.0 + __ffssi2@GCC_4.3.0 1:4.3.0 + __fixdfdi@GCC_3.0 1:4.3.0 + __fixdfsi@GCC_3.0 1:4.3.0 + __fixsfdi@GCC_3.0 1:4.3.0 + __fixsfsi@GCC_3.0 1:4.3.0 + __fixunsdfdi@GCC_3.0 1:4.3.0 + __fixunsdfsi@GCC_3.0 1:4.3.0 + __fixunssfdi@GCC_3.0 1:4.3.0 + __fixunssfsi@GCC_3.0 1:4.3.0 + __floatdidf@GCC_3.0 1:4.3.0 + __floatdisf@GCC_3.0 1:4.3.0 + __floatsidf@GCC_3.0 1:4.3.0 + __floatsisf@GCC_3.0 1:4.3.0 + __floatundidf@GCC_4.2.0 1:4.3.0 + __floatundisf@GCC_4.2.0 1:4.3.0 + __floatunsidf@GCC_4.2.0 1:4.3.0 + __floatunsisf@GCC_4.2.0 1:4.3.0 + __gcc_personality_v0@GCC_3.3.1 1:4.3.0 + __gedf2@GCC_3.0 1:4.3.0 + __gesf2@GCC_3.0 1:4.3.0 + __gnu_unwind_frame@GCC_3.5 1:4.3.0 + __gtdf2@GCC_3.0 1:4.3.0 + __gtsf2@GCC_3.0 1:4.3.0 + __ledf2@GCC_3.0 1:4.3.0 + __lesf2@GCC_3.0 1:4.3.0 + __lshrdi3@GCC_3.0 1:4.3.0 + __ltdf2@GCC_3.0 1:4.3.0 + __ltsf2@GCC_3.0 1:4.3.0 + __moddi3@GLIBC_2.0 1:4.3.0 + __modsi3@GCC_3.0 1:4.3.0 + __muldc3@GCC_4.0.0 1:4.3.0 + __muldf3@GCC_3.0 1:4.3.0 + __muldi3@GCC_3.0 1:4.3.0 + __mulsc3@GCC_4.0.0 1:4.3.0 + __mulsf3@GCC_3.0 1:4.3.0 + __mulvdi3@GCC_3.0 1:4.3.0 + __mulvsi3@GCC_3.0 1:4.3.0 + __nedf2@GCC_3.0 1:4.3.0 + __negdf2@GCC_3.0 1:4.3.0 + __negdi2@GCC_3.0 1:4.3.0 + __negsf2@GCC_3.0 1:4.3.0 + __negvdi2@GCC_3.0 1:4.3.0 + __negvsi2@GCC_3.0 1:4.3.0 + __nesf2@GCC_3.0 1:4.3.0 + __paritydi2@GCC_3.4 1:4.3.0 + __paritysi2@GCC_3.4 1:4.3.0 + __popcountdi2@GCC_3.4 1:4.3.0 + __popcountsi2@GCC_3.4 1:4.3.0 + __powidf2@GCC_4.0.0 1:4.3.0 + __powisf2@GCC_4.0.0 1:4.3.0 + __subdf3@GCC_3.0 1:4.3.0 + __subsf3@GCC_3.0 1:4.3.0 + __subvdi3@GCC_3.0 1:4.3.0 + __subvsi3@GCC_3.0 1:4.3.0 + __truncdfsf2@GCC_3.0 1:4.3.0 + __ucmpdi2@GCC_3.0 1:4.3.0 + __udivdi3@GLIBC_2.0 1:4.3.0 + __udivmoddi4@GCC_3.0 1:4.3.0 + __udivsi3@GCC_3.0 1:4.3.0 + __umoddi3@GLIBC_2.0 1:4.3.0 + __umodsi3@GCC_3.0 1:4.3.0 + __unorddf2@GCC_3.3.4 1:4.3.0 + __unordsf2@GCC_3.3.4 1:4.3.0 --- gcc-4.7-4.7.2.orig/debian/libobjc4.symbols +++ gcc-4.7-4.7.2/debian/libobjc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.i386 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.i386 @@ -0,0 +1,137 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.2.orig/debian/gcjh-wrapper-BV.1 +++ gcc-4.7-4.7.2/debian/gcjh-wrapper-BV.1 @@ -0,0 +1,20 @@ +.TH GCJH-WRAPPER 1 "June 6, 2002" gcjh-wrapper "Java User's Manual" +.SH NAME +gcjh-wrapper \- a wrapper around gcjh + +.SH SYNOPSIS +gcjh-wrapper [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcjh-wrapper\fR is a wrapper around gcjh(1) to be called as the java header +compiler. Options different for javah(1) and gcjh(1) are translated, +options unknown to gcjh(1) are silently ignored. + +.SH OPTIONS +See gcjh-@BV@(1) for a list of options that gcj understands. + +.SH "SEE ALSO" +.BR gcjh-@BV@(1) +, +.BR javah(1) --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.hurd-i386 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.hurd-i386 @@ -0,0 +1,102 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 4.2.1 + GCC_3.3.1@GCC_3.3.1 4.2.1 + GCC_3.3@GCC_3.3 4.2.1 + GCC_3.4.2@GCC_3.4.2 4.2.1 + GCC_3.4@GCC_3.4 4.2.1 + GCC_4.0.0@GCC_4.0.0 4.2.1 + GCC_4.2.0@GCC_4.2.0 4.2.1 + GCC_4.3.0@GCC_4.3.0 1:4.3.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 4.2.1 + _Unwind_Backtrace@GCC_3.3 4.2.1 + _Unwind_DeleteException@GCC_3.0 4.2.1 + _Unwind_FindEnclosingFunction@GCC_3.3 4.2.1 + _Unwind_Find_FDE@GCC_3.0 4.2.1 + _Unwind_ForcedUnwind@GCC_3.0 4.2.1 + _Unwind_GetCFA@GCC_3.3 4.2.1 + _Unwind_GetDataRelBase@GCC_3.0 4.2.1 + _Unwind_GetGR@GCC_3.0 4.2.1 + _Unwind_GetIP@GCC_3.0 4.2.1 + _Unwind_GetIPInfo@GCC_4.2.0 4.2.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 4.2.1 + _Unwind_GetRegionStart@GCC_3.0 4.2.1 + _Unwind_GetTextRelBase@GCC_3.0 4.2.1 + _Unwind_RaiseException@GCC_3.0 4.2.1 + _Unwind_Resume@GCC_3.0 4.2.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 4.2.1 + _Unwind_SetGR@GCC_3.0 4.2.1 + _Unwind_SetIP@GCC_3.0 4.2.1 + __absvdi2@GCC_3.0 4.2.1 + __absvsi2@GCC_3.0 4.2.1 + __addvdi3@GCC_3.0 4.2.1 + __addvsi3@GCC_3.0 4.2.1 + __ashldi3@GCC_3.0 4.2.1 + __ashrdi3@GCC_3.0 4.2.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 4.2.1 + __clzdi2@GCC_3.4 4.2.1 + __clzsi2@GCC_3.4 4.2.1 + __cmpdi2@GCC_3.0 4.2.1 + __ctzdi2@GCC_3.4 4.2.1 + __ctzsi2@GCC_3.4 4.2.1 + __deregister_frame@GLIBC_2.0 4.2.1 + __deregister_frame_info@GLIBC_2.0 4.2.1 + __deregister_frame_info_bases@GCC_3.0 4.2.1 + __divdc3@GCC_4.0.0 4.2.1 + __divdi3@GLIBC_2.0 4.2.1 + __divsc3@GCC_4.0.0 4.2.1 + __divxc3@GCC_4.0.0 4.2.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 4.2.1 + __ffsdi2@GCC_3.0 4.2.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 4.2.1 + __fixsfdi@GCC_3.0 4.2.1 + __fixunsdfdi@GCC_3.0 4.2.1 + __fixunsdfsi@GCC_3.0 4.2.1 + __fixunssfdi@GCC_3.0 4.2.1 + __fixunssfsi@GCC_3.0 4.2.1 + __fixunsxfdi@GCC_3.0 4.2.1 + __fixunsxfsi@GCC_3.0 4.2.1 + __fixxfdi@GCC_3.0 4.2.1 + __floatdidf@GCC_3.0 4.2.1 + __floatdisf@GCC_3.0 4.2.1 + __floatdixf@GCC_3.0 4.2.1 + __floatundidf@GCC_4.2.0 4.2.1 + __floatundisf@GCC_4.2.0 4.2.1 + __floatundixf@GCC_4.2.0 4.2.1 + __frame_state_for@GLIBC_2.0 4.2.1 + __gcc_personality_v0@GCC_3.3.1 4.2.1 + __lshrdi3@GCC_3.0 4.2.1 + __moddi3@GLIBC_2.0 4.2.1 + __muldc3@GCC_4.0.0 4.2.1 + __muldi3@GCC_3.0 4.2.1 + __mulsc3@GCC_4.0.0 4.2.1 + __mulvdi3@GCC_3.0 4.2.1 + __mulvsi3@GCC_3.0 4.2.1 + __mulxc3@GCC_4.0.0 4.2.1 + __negdi2@GCC_3.0 4.2.1 + __negvdi2@GCC_3.0 4.2.1 + __negvsi2@GCC_3.0 4.2.1 + __paritydi2@GCC_3.4 4.2.1 + __paritysi2@GCC_3.4 4.2.1 + __popcountdi2@GCC_3.4 4.2.1 + __popcountsi2@GCC_3.4 4.2.1 + __powidf2@GCC_4.0.0 4.2.1 + __powisf2@GCC_4.0.0 4.2.1 + __powixf2@GCC_4.0.0 4.2.1 + __register_frame@GLIBC_2.0 4.2.1 + __register_frame_info@GLIBC_2.0 4.2.1 + __register_frame_info_bases@GCC_3.0 4.2.1 + __register_frame_info_table@GLIBC_2.0 4.2.1 + __register_frame_info_table_bases@GCC_3.0 4.2.1 + __register_frame_table@GLIBC_2.0 4.2.1 + __subvdi3@GCC_3.0 4.2.1 + __subvsi3@GCC_3.0 4.2.1 + __ucmpdi2@GCC_3.0 4.2.1 + __udivdi3@GLIBC_2.0 4.2.1 + __udivmoddi4@GCC_3.0 4.2.1 + __umoddi3@GLIBC_2.0 4.2.1 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.m68k +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.m68k @@ -0,0 +1,5 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.2.orig/debian/gfortran-BV-spu.overrides +++ gcc-4.7-4.7.2/debian/gfortran-BV-spu.overrides @@ -0,0 +1,2 @@ +gfortran-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +gfortran-@BV@-spu binary: file-in-unusual-dir --- gcc-4.7-4.7.2.orig/debian/lib64stdc++6.symbols.powerpc +++ gcc-4.7-4.7.2/debian/lib64stdc++6.symbols.powerpc @@ -0,0 +1,10 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.2.orig/debian/lib64gfortran3.symbols.s390 +++ gcc-4.7-4.7.2/debian/lib64gfortran3.symbols.s390 @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.s390x +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.s390x @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.i386 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.i386 @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/gij-hppa +++ gcc-4.7-4.7.2/debian/gij-hppa @@ -0,0 +1,20 @@ +#! /bin/sh + +prctl= + +case "$(prctl --unaligned=)" in *signal) + echo >&2 "$(basename $0): ignore unaligned memory accesses" + prctl="prctl --unaligned=default" +esac + +exec $prctl /usr/bin/gij-4.4.bin "$@" +#! /bin/sh + +prctl= + +case "$(prctl --unaligned=)" in *signal) + echo >&2 "$(basename $0): ignore unaligned memory accesses" + prctl="prctl --unaligned=default" +esac + +exec $prctl /usr/bin/gij-4.4.bin "$@" --- gcc-4.7-4.7.2.orig/debian/libquadmath0.symbols.common +++ gcc-4.7-4.7.2/debian/libquadmath0.symbols.common @@ -0,0 +1,92 @@ + QUADMATH_1.0@QUADMATH_1.0 4.6 + acoshq@QUADMATH_1.0 4.6 + acosq@QUADMATH_1.0 4.6 + asinhq@QUADMATH_1.0 4.6 + asinq@QUADMATH_1.0 4.6 + atan2q@QUADMATH_1.0 4.6 + atanhq@QUADMATH_1.0 4.6 + atanq@QUADMATH_1.0 4.6 + cabsq@QUADMATH_1.0 4.6 + cacoshq@QUADMATH_1.0 4.6 + cacosq@QUADMATH_1.0 4.6 + cargq@QUADMATH_1.0 4.6 + casinhq@QUADMATH_1.0 4.6 + casinq@QUADMATH_1.0 4.6 + catanhq@QUADMATH_1.0 4.6 + catanq@QUADMATH_1.0 4.6 + cbrtq@QUADMATH_1.0 4.6 + ccoshq@QUADMATH_1.0 4.6 + ccosq@QUADMATH_1.0 4.6 + ceilq@QUADMATH_1.0 4.6 + cexpiq@QUADMATH_1.0 4.6 + cexpq@QUADMATH_1.0 4.6 + cimagq@QUADMATH_1.0 4.6 + clog10q@QUADMATH_1.0 4.6 + clogq@QUADMATH_1.0 4.6 + conjq@QUADMATH_1.0 4.6 + copysignq@QUADMATH_1.0 4.6 + coshq@QUADMATH_1.0 4.6 + cosq@QUADMATH_1.0 4.6 + cpowq@QUADMATH_1.0 4.6 + cprojq@QUADMATH_1.0 4.6 + crealq@QUADMATH_1.0 4.6 + csinhq@QUADMATH_1.0 4.6 + csinq@QUADMATH_1.0 4.6 + csqrtq@QUADMATH_1.0 4.6 + ctanhq@QUADMATH_1.0 4.6 + ctanq@QUADMATH_1.0 4.6 + erfcq@QUADMATH_1.0 4.6 + erfq@QUADMATH_1.0 4.6 + expm1q@QUADMATH_1.0 4.6 + expq@QUADMATH_1.0 4.6 + fabsq@QUADMATH_1.0 4.6 + fdimq@QUADMATH_1.0 4.6 + finiteq@QUADMATH_1.0 4.6 + floorq@QUADMATH_1.0 4.6 + fmaq@QUADMATH_1.0 4.6 + fmaxq@QUADMATH_1.0 4.6 + fminq@QUADMATH_1.0 4.6 + fmodq@QUADMATH_1.0 4.6 + frexpq@QUADMATH_1.0 4.6 + hypotq@QUADMATH_1.0 4.6 + ilogbq@QUADMATH_1.0 4.6 + isinfq@QUADMATH_1.0 4.6 + isnanq@QUADMATH_1.0 4.6 + j0q@QUADMATH_1.0 4.6 + j1q@QUADMATH_1.0 4.6 + jnq@QUADMATH_1.0 4.6 + ldexpq@QUADMATH_1.0 4.6 + lgammaq@QUADMATH_1.0 4.6 + llrintq@QUADMATH_1.0 4.6 + llroundq@QUADMATH_1.0 4.6 + log10q@QUADMATH_1.0 4.6 + log1pq@QUADMATH_1.0 4.6 + log2q@QUADMATH_1.0 4.6 + logq@QUADMATH_1.0 4.6 + lrintq@QUADMATH_1.0 4.6 + lroundq@QUADMATH_1.0 4.6 + modfq@QUADMATH_1.0 4.6 + nanq@QUADMATH_1.0 4.6 + nearbyintq@QUADMATH_1.0 4.6 + nextafterq@QUADMATH_1.0 4.6 + powq@QUADMATH_1.0 4.6 + quadmath_snprintf@QUADMATH_1.0 4.6 + remainderq@QUADMATH_1.0 4.6 + remquoq@QUADMATH_1.0 4.6 + rintq@QUADMATH_1.0 4.6 + roundq@QUADMATH_1.0 4.6 + scalblnq@QUADMATH_1.0 4.6 + scalbnq@QUADMATH_1.0 4.6 + signbitq@QUADMATH_1.0 4.6 + sincosq@QUADMATH_1.0 4.6 + sinhq@QUADMATH_1.0 4.6 + sinq@QUADMATH_1.0 4.6 + sqrtq@QUADMATH_1.0 4.6 + strtoflt128@QUADMATH_1.0 4.6 + tanhq@QUADMATH_1.0 4.6 + tanq@QUADMATH_1.0 4.6 + tgammaq@QUADMATH_1.0 4.6 + truncq@QUADMATH_1.0 4.6 + y0q@QUADMATH_1.0 4.6 + y1q@QUADMATH_1.0 4.6 + ynq@QUADMATH_1.0 4.6 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.16 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.16 @@ -0,0 +1,199 @@ + __iso_c_binding_c_f_pointer_i16@GFORTRAN_1.0 4.3 + _gfortran_all_l16@GFORTRAN_1.0 4.3 + _gfortran_any_l16@GFORTRAN_1.0 4.3 + _gfortran_count_16_l@GFORTRAN_1.0 4.3 + _gfortran_cshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_cshift0_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_16@GFORTRAN_1.0 4.3 + _gfortran_cshift1_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_16_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_eoshift0_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift1_16@GFORTRAN_1.0 4.3 + _gfortran_eoshift1_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift1_16_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift2_16@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift2_16_char4@GFORTRAN_1.4 4.6 + _gfortran_eoshift2_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift3_16@GFORTRAN_1.0 4.3 + _gfortran_eoshift3_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift3_16_char@GFORTRAN_1.0 4.3 + _gfortran_iall_i16@GFORTRAN_1.4 4.6 + _gfortran_iany_i16@GFORTRAN_1.4 4.6 + _gfortran_iparity_i16@GFORTRAN_1.4 4.6 + _gfortran_ishftc16@GFORTRAN_1.0 4.3 + _gfortran_matmul_i16@GFORTRAN_1.0 4.3 + _gfortran_matmul_l16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxval_i16@GFORTRAN_1.0 4.3 + _gfortran_miall_i16@GFORTRAN_1.4 4.6 + _gfortran_miany_i16@GFORTRAN_1.4 4.6 + _gfortran_minloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_minval_i16@GFORTRAN_1.0 4.3 + _gfortran_miparity_i16@GFORTRAN_1.4 4.6 + _gfortran_mmaxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mminval_i16@GFORTRAN_1.0 4.3 + _gfortran_mproduct_i16@GFORTRAN_1.0 4.3 + _gfortran_msum_i16@GFORTRAN_1.0 4.3 + _gfortran_norm2_r10@GFORTRAN_1.4 4.6 + _gfortran_parity_l16@GFORTRAN_1.4 4.6 + _gfortran_pow_c10_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_c16_i16@GFORTRAN_1.0 4.6 + _gfortran_pow_c16_i4@GFORTRAN_1.0 4.6 + _gfortran_pow_c16_i8@GFORTRAN_1.0 4.6 + _gfortran_pow_c4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_c8_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_i4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i8_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r10_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r16_i16@GFORTRAN_1.0 4.6 + _gfortran_pow_r16_i4@GFORTRAN_1.0 4.6 + _gfortran_pow_r16_i8@GFORTRAN_1.0 4.6 + _gfortran_pow_r4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r8_i16@GFORTRAN_1.0 4.3 + _gfortran_product_i16@GFORTRAN_1.0 4.3 + _gfortran_reshape_16@GFORTRAN_1.0 4.3 + _gfortran_shape_16@GFORTRAN_1.0 4.3 + _gfortran_siall_i16@GFORTRAN_1.4 4.6 + _gfortran_siany_i16@GFORTRAN_1.4 4.6 + _gfortran_siparity_i16@GFORTRAN_1.4 4.6 + _gfortran_smaxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_i16@GFORTRAN_1.0 4.3 + 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_gfortran_set_record_marker@GFORTRAN_1.0 4.3 + _gfortran_shape_4@GFORTRAN_1.0 4.3 + _gfortran_shape_8@GFORTRAN_1.0 4.3 + _gfortran_siall_i1@GFORTRAN_1.4 4.6 + _gfortran_siall_i2@GFORTRAN_1.4 4.6 + _gfortran_siall_i4@GFORTRAN_1.4 4.6 + _gfortran_siall_i8@GFORTRAN_1.4 4.6 + _gfortran_siany_i1@GFORTRAN_1.4 4.6 + _gfortran_siany_i2@GFORTRAN_1.4 4.6 + _gfortran_siany_i4@GFORTRAN_1.4 4.6 + _gfortran_siany_i8@GFORTRAN_1.4 4.6 + _gfortran_signal_func@GFORTRAN_1.0 4.3 + _gfortran_signal_func_int@GFORTRAN_1.0 4.3 + _gfortran_signal_sub@GFORTRAN_1.0 4.3 + _gfortran_signal_sub_int@GFORTRAN_1.0 4.3 + _gfortran_siparity_i1@GFORTRAN_1.4 4.6 + _gfortran_siparity_i2@GFORTRAN_1.4 4.6 + _gfortran_siparity_i4@GFORTRAN_1.4 4.6 + _gfortran_siparity_i8@GFORTRAN_1.4 4.6 + _gfortran_size0@GFORTRAN_1.0 4.3 + _gfortran_size1@GFORTRAN_1.0 4.3 + _gfortran_sleep_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_sleep_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxval_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxval_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxval_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxval_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxval_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxval_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_r8@GFORTRAN_1.0 4.3 + _gfortran_sminval_i1@GFORTRAN_1.0 4.3 + _gfortran_sminval_i2@GFORTRAN_1.0 4.3 + _gfortran_sminval_i4@GFORTRAN_1.0 4.3 + _gfortran_sminval_i8@GFORTRAN_1.0 4.3 + _gfortran_sminval_r4@GFORTRAN_1.0 4.3 + _gfortran_sminval_r8@GFORTRAN_1.0 4.3 + _gfortran_spacing_r4@GFORTRAN_1.0 4.3 + _gfortran_spacing_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__acos_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__acos_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__acosh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__acosh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__char_1_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__char_1_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_4@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_8@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__dprod_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__index_1_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__index_1_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__len_1_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__len_1_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_4@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_8@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_4@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r8@GFORTRAN_1.0 4.3 + _gfortran_spread@GFORTRAN_1.0 4.3 + _gfortran_spread_char4@GFORTRAN_1.1 4.4.0 + _gfortran_spread_char4_scalar@GFORTRAN_1.1 4.4.0 + _gfortran_spread_char@GFORTRAN_1.0 4.3 + _gfortran_spread_char_scalar@GFORTRAN_1.0 4.3 + _gfortran_spread_scalar@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c8@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i1@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i2@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i8@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r8@GFORTRAN_1.0 4.3 + _gfortran_srand@GFORTRAN_1.0 4.3 + _gfortran_ssum_c4@GFORTRAN_1.0 4.3 + _gfortran_ssum_c8@GFORTRAN_1.0 4.3 + _gfortran_ssum_i1@GFORTRAN_1.0 4.3 + _gfortran_ssum_i2@GFORTRAN_1.0 4.3 + _gfortran_ssum_i4@GFORTRAN_1.0 4.3 + _gfortran_ssum_i8@GFORTRAN_1.0 4.3 + _gfortran_ssum_r4@GFORTRAN_1.0 4.3 + _gfortran_ssum_r8@GFORTRAN_1.0 4.3 + _gfortran_st_backspace@GFORTRAN_1.0 4.3 + _gfortran_st_close@GFORTRAN_1.0 4.3 + _gfortran_st_endfile@GFORTRAN_1.0 4.3 + _gfortran_st_flush@GFORTRAN_1.0 4.3 + _gfortran_st_inquire@GFORTRAN_1.0 4.3 + _gfortran_st_iolength@GFORTRAN_1.0 4.3 + _gfortran_st_iolength_done@GFORTRAN_1.0 4.3 + _gfortran_st_open@GFORTRAN_1.0 4.3 + _gfortran_st_read@GFORTRAN_1.0 4.3 + _gfortran_st_read_done@GFORTRAN_1.0 4.3 + _gfortran_st_rewind@GFORTRAN_1.0 4.3 + _gfortran_st_set_nml_var@GFORTRAN_1.0 4.3 + _gfortran_st_set_nml_var_dim@GFORTRAN_1.0 4.3 + _gfortran_st_wait@GFORTRAN_1.1 4.4.0 + _gfortran_st_write@GFORTRAN_1.0 4.3 + _gfortran_st_write_done@GFORTRAN_1.0 4.3 + _gfortran_stat_i4@GFORTRAN_1.0 4.3 + _gfortran_stat_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_stat_i8@GFORTRAN_1.0 4.3 + _gfortran_stat_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_stop_numeric@GFORTRAN_1.0 4.3 + _gfortran_stop_numeric_f08@GFORTRAN_1.4 4.6 + _gfortran_stop_string@GFORTRAN_1.0 4.3 + _gfortran_store_exe_path@GFORTRAN_1.0 4.3 + _gfortran_string_index@GFORTRAN_1.0 4.3 + _gfortran_string_index_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_len_trim@GFORTRAN_1.0 4.3 + _gfortran_string_len_trim_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_minmax@GFORTRAN_1.0 4.3 + _gfortran_string_minmax_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_scan@GFORTRAN_1.0 4.3 + _gfortran_string_scan_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_trim@GFORTRAN_1.0 4.3 + _gfortran_string_trim_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_verify@GFORTRAN_1.0 4.3 + _gfortran_string_verify_char4@GFORTRAN_1.1 4.4.0 + _gfortran_sum_c4@GFORTRAN_1.0 4.3 + _gfortran_sum_c8@GFORTRAN_1.0 4.3 + _gfortran_sum_i1@GFORTRAN_1.0 4.3 + _gfortran_sum_i2@GFORTRAN_1.0 4.3 + _gfortran_sum_i4@GFORTRAN_1.0 4.3 + _gfortran_sum_i8@GFORTRAN_1.0 4.3 + _gfortran_sum_r4@GFORTRAN_1.0 4.3 + _gfortran_sum_r8@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i4@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i8@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_system@GFORTRAN_1.0 4.3 + _gfortran_system_clock_4@GFORTRAN_1.0 4.3 + _gfortran_system_clock_8@GFORTRAN_1.0 4.3 + _gfortran_system_sub@GFORTRAN_1.0 4.3 + _gfortran_time8_func@GFORTRAN_1.0 4.3 + _gfortran_time_func@GFORTRAN_1.0 4.3 + _gfortran_transfer_array@GFORTRAN_1.0 4.3 + _gfortran_transfer_array_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_character@GFORTRAN_1.0 4.3 + _gfortran_transfer_character_wide@GFORTRAN_1.1 4.4.0 + _gfortran_transfer_character_wide_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_character_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex@GFORTRAN_1.0 4.3 + _gfortran_transfer_complex_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_integer@GFORTRAN_1.0 4.3 + _gfortran_transfer_integer_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_logical@GFORTRAN_1.0 4.3 + _gfortran_transfer_logical_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real@GFORTRAN_1.0 4.3 + _gfortran_transfer_real_write@GFORTRAN_1.4 4.6 + _gfortran_transpose@GFORTRAN_1.0 4.3 + _gfortran_transpose_c4@GFORTRAN_1.0 4.3 + _gfortran_transpose_c8@GFORTRAN_1.0 4.3 + _gfortran_transpose_char4@GFORTRAN_1.1 4.4.0 + _gfortran_transpose_char@GFORTRAN_1.0 4.3 + _gfortran_transpose_i4@GFORTRAN_1.0 4.3 + _gfortran_transpose_i8@GFORTRAN_1.0 4.3 + _gfortran_transpose_r4@GFORTRAN_1.0 4.3 + _gfortran_transpose_r8@GFORTRAN_1.0 4.3 + _gfortran_ttynam@GFORTRAN_1.0 4.3 + _gfortran_ttynam_sub@GFORTRAN_1.0 4.3 + _gfortran_umask_i4@GFORTRAN_1.0 4.3 + _gfortran_umask_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_umask_i8@GFORTRAN_1.0 4.3 + _gfortran_umask_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_unlink@GFORTRAN_1.0 4.3 + _gfortran_unlink_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_unlink_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_unpack0@GFORTRAN_1.0 4.3 + _gfortran_unpack0_char4@GFORTRAN_1.1 4.4.0 + _gfortran_unpack0_char@GFORTRAN_1.0 4.3 + _gfortran_unpack1@GFORTRAN_1.0 4.3 + _gfortran_unpack1_char4@GFORTRAN_1.1 4.4.0 + _gfortran_unpack1_char@GFORTRAN_1.0 4.3 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.64 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.64 @@ -0,0 +1,2 @@ + _gfortran_clz128@GFORTRAN_1.2 4.4.0 + _gfortran_ctz128@GFORTRAN_1.2 4.4.0 --- gcc-4.7-4.7.2.orig/debian/lib64stdc++6.symbols.i386 +++ gcc-4.7-4.7.2/debian/lib64stdc++6.symbols.i386 @@ -0,0 +1,32 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# acosl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# asinl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# atan2l@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# atanl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# ceill@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# coshl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# cosl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# expl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# floorl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# fmodl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# frexpl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# hypotl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# log10l@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# logl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# modfl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# powl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sinhl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sinl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sqrtl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# tanhl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# tanl@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/acats-killer.sh +++ gcc-4.7-4.7.2/debian/acats-killer.sh @@ -0,0 +1,62 @@ +#! /bin/sh + +# on ia64 systems, the acats hangs in unaligned memory accesses. +# kill these testcases. + +pidfile=acats-killer.pid + +usage() +{ + echo >&2 "usage: `basename $0` [-p ] " + exit 1 +} + +while [ $# -gt 0 ]; do + case $1 in + -p) + pidfile=$2 + shift + shift + ;; + -*) + usage + ;; + *) + break + esac +done + +[ $# -eq 2 ] || usage + +logfile=$1 +stopfile=$2 +interval=30 + +echo $$ > $pidfile + +while true; do + if [ -f "$stopfile" ]; then + echo "`basename $0`: finished." + rm -f $pidfile + exit 0 + fi + sleep $interval + if [ ! -f "$logfile" ]; then + continue + fi + pids=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ -n "$pids" ]; then + sleep $interval + pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ "$pids" = "$pids2" ]; then + #echo kill: $pids + kill $pids + sleep 1 + pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ "$pids" = "$pids2" ]; then + #echo kill -9: $pids + kill -9 $pids + fi + fi + fi +done --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.hurd-i386 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.hurd-i386 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.7-4.7.2.orig/debian/changelog-4.4 +++ gcc-4.7-4.7.2/debian/changelog-4.4 @@ -0,0 +1,36 @@ + * Closing reports reported against gcc-4.1 and fixed in gcc-4.4: + - General + + + - C + + + - C++/libstdc++ + + + - Fortran + - Java + - Architecture specific: + - mips + - sparc + * Closing reports reported against gcc-4.2 and fixed in gcc-4.4: + - General + + + - C + + + - C++/libstdc++ + + + - Fortran + - Java + - Architecture specific: + - mips + - sparc + * Closing reports reported against gcc-4.3 and fixed in gcc-4.4: + - General + + + - C + + + - C++/libstdc++ + + + - Fortran + - Java + - Architecture specific: + - mips + - sparc --- gcc-4.7-4.7.2.orig/debian/libgomp1.symbols.common +++ gcc-4.7-4.7.2/debian/libgomp1.symbols.common @@ -0,0 +1,159 @@ + GOMP_1.0@GOMP_1.0 4.2.1 + GOMP_2.0@GOMP_2.0 4.4 + GOMP_3.0@GOMP_3.0 4.7 + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 + GOMP_barrier@GOMP_1.0 4.2.1 + GOMP_critical_end@GOMP_1.0 4.2.1 + GOMP_critical_name_end@GOMP_1.0 4.2.1 + GOMP_critical_name_start@GOMP_1.0 4.2.1 + GOMP_critical_start@GOMP_1.0 4.2.1 + GOMP_loop_dynamic_next@GOMP_1.0 4.2.1 + GOMP_loop_dynamic_start@GOMP_1.0 4.2.1 + GOMP_loop_end@GOMP_1.0 4.2.1 + GOMP_loop_end_nowait@GOMP_1.0 4.2.1 + GOMP_loop_guided_next@GOMP_1.0 4.2.1 + GOMP_loop_guided_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_dynamic_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_dynamic_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_guided_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_guided_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_runtime_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_runtime_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_static_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_static_start@GOMP_1.0 4.2.1 + GOMP_loop_runtime_next@GOMP_1.0 4.2.1 + GOMP_loop_runtime_start@GOMP_1.0 4.2.1 + GOMP_loop_static_next@GOMP_1.0 4.2.1 + GOMP_loop_static_start@GOMP_1.0 4.2.1 + GOMP_loop_ull_dynamic_next@GOMP_2.0 4.4 + GOMP_loop_ull_dynamic_start@GOMP_2.0 4.4 + GOMP_loop_ull_guided_next@GOMP_2.0 4.4 + GOMP_loop_ull_guided_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_dynamic_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_dynamic_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_guided_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_guided_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_runtime_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_runtime_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_static_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_static_start@GOMP_2.0 4.4 + GOMP_loop_ull_runtime_next@GOMP_2.0 4.4 + GOMP_loop_ull_runtime_start@GOMP_2.0 4.4 + GOMP_loop_ull_static_next@GOMP_2.0 4.4 + GOMP_loop_ull_static_start@GOMP_2.0 4.4 + GOMP_ordered_end@GOMP_1.0 4.2.1 + GOMP_ordered_start@GOMP_1.0 4.2.1 + GOMP_parallel_end@GOMP_1.0 4.2.1 + GOMP_parallel_loop_dynamic_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_guided_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_runtime_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_static_start@GOMP_1.0 4.2.1 + GOMP_parallel_sections_start@GOMP_1.0 4.2.1 + GOMP_parallel_start@GOMP_1.0 4.2.1 + GOMP_sections_end@GOMP_1.0 4.2.1 + GOMP_sections_end_nowait@GOMP_1.0 4.2.1 + GOMP_sections_next@GOMP_1.0 4.2.1 + GOMP_sections_start@GOMP_1.0 4.2.1 + GOMP_single_copy_end@GOMP_1.0 4.2.1 + GOMP_single_copy_start@GOMP_1.0 4.2.1 + GOMP_single_start@GOMP_1.0 4.2.1 + GOMP_task@GOMP_2.0 4.4 + GOMP_taskwait@GOMP_2.0 4.4 + GOMP_taskyield@GOMP_3.0 4.7 + OMP_1.0@OMP_1.0 4.2.1 + OMP_2.0@OMP_2.0 4.2.1 + OMP_3.0@OMP_3.0 4.4 + OMP_3.1@OMP_3.1 4.7 + omp_destroy_lock@OMP_1.0 4.2.1 + omp_destroy_lock@OMP_3.0 4.4 + omp_destroy_lock_@OMP_1.0 4.2.1 + omp_destroy_lock_@OMP_3.0 4.4 + omp_destroy_nest_lock@OMP_1.0 4.2.1 + omp_destroy_nest_lock@OMP_3.0 4.4 + omp_destroy_nest_lock_@OMP_1.0 4.2.1 + omp_destroy_nest_lock_@OMP_3.0 4.4 + omp_get_active_level@OMP_3.0 4.4 + omp_get_active_level_@OMP_3.0 4.4 + omp_get_ancestor_thread_num@OMP_3.0 4.4 + omp_get_ancestor_thread_num_8_@OMP_3.0 4.4 + omp_get_ancestor_thread_num_@OMP_3.0 4.4 + omp_get_dynamic@OMP_1.0 4.2.1 + omp_get_dynamic_@OMP_1.0 4.2.1 + omp_get_level@OMP_3.0 4.4 + omp_get_level_@OMP_3.0 4.4 + omp_get_max_active_levels@OMP_3.0 4.4 + omp_get_max_active_levels_@OMP_3.0 4.4 + omp_get_max_threads@OMP_1.0 4.2.1 + omp_get_max_threads_@OMP_1.0 4.2.1 + omp_get_nested@OMP_1.0 4.2.1 + omp_get_nested_@OMP_1.0 4.2.1 + omp_get_num_procs@OMP_1.0 4.2.1 + omp_get_num_procs_@OMP_1.0 4.2.1 + omp_get_num_threads@OMP_1.0 4.2.1 + omp_get_num_threads_@OMP_1.0 4.2.1 + omp_get_schedule@OMP_3.0 4.4 + omp_get_schedule_8_@OMP_3.0 4.4 + omp_get_schedule_@OMP_3.0 4.4 + omp_get_team_size@OMP_3.0 4.4 + omp_get_team_size_8_@OMP_3.0 4.4 + omp_get_team_size_@OMP_3.0 4.4 + omp_get_thread_limit@OMP_3.0 4.4 + omp_get_thread_limit_@OMP_3.0 4.4 + omp_get_thread_num@OMP_1.0 4.2.1 + omp_get_thread_num_@OMP_1.0 4.2.1 + omp_get_wtick@OMP_2.0 4.2.1 + omp_get_wtick_@OMP_2.0 4.2.1 + omp_get_wtime@OMP_2.0 4.2.1 + omp_get_wtime_@OMP_2.0 4.2.1 + omp_in_final@OMP_3.1 4.7 + omp_in_final_@OMP_3.1 4.7 + omp_in_parallel@OMP_1.0 4.2.1 + omp_in_parallel_@OMP_1.0 4.2.1 + omp_init_lock@OMP_1.0 4.2.1 + omp_init_lock@OMP_3.0 4.4 + omp_init_lock_@OMP_1.0 4.2.1 + omp_init_lock_@OMP_3.0 4.4 + omp_init_nest_lock@OMP_1.0 4.2.1 + omp_init_nest_lock@OMP_3.0 4.4 + omp_init_nest_lock_@OMP_1.0 4.2.1 + omp_init_nest_lock_@OMP_3.0 4.4 + omp_set_dynamic@OMP_1.0 4.2.1 + omp_set_dynamic_8_@OMP_1.0 4.2.1 + omp_set_dynamic_@OMP_1.0 4.2.1 + omp_set_lock@OMP_1.0 4.2.1 + omp_set_lock@OMP_3.0 4.4 + omp_set_lock_@OMP_1.0 4.2.1 + omp_set_lock_@OMP_3.0 4.4 + omp_set_max_active_levels@OMP_3.0 4.4 + omp_set_max_active_levels_8_@OMP_3.0 4.4 + omp_set_max_active_levels_@OMP_3.0 4.4 + omp_set_nest_lock@OMP_1.0 4.2.1 + omp_set_nest_lock@OMP_3.0 4.4 + omp_set_nest_lock_@OMP_1.0 4.2.1 + omp_set_nest_lock_@OMP_3.0 4.4 + omp_set_nested@OMP_1.0 4.2.1 + omp_set_nested_8_@OMP_1.0 4.2.1 + omp_set_nested_@OMP_1.0 4.2.1 + omp_set_num_threads@OMP_1.0 4.2.1 + omp_set_num_threads_8_@OMP_1.0 4.2.1 + omp_set_num_threads_@OMP_1.0 4.2.1 + omp_set_schedule@OMP_3.0 4.4 + omp_set_schedule_8_@OMP_3.0 4.4 + omp_set_schedule_@OMP_3.0 4.4 + omp_test_lock@OMP_1.0 4.2.1 + omp_test_lock@OMP_3.0 4.4 + omp_test_lock_@OMP_1.0 4.2.1 + omp_test_lock_@OMP_3.0 4.4 + omp_test_nest_lock@OMP_1.0 4.2.1 + omp_test_nest_lock@OMP_3.0 4.4 + omp_test_nest_lock_@OMP_1.0 4.2.1 + omp_test_nest_lock_@OMP_3.0 4.4 + omp_unset_lock@OMP_1.0 4.2.1 + omp_unset_lock@OMP_3.0 4.4 + omp_unset_lock_@OMP_1.0 4.2.1 + omp_unset_lock_@OMP_3.0 4.4 + omp_unset_nest_lock@OMP_1.0 4.2.1 + omp_unset_nest_lock@OMP_3.0 4.4 + omp_unset_nest_lock_@OMP_1.0 4.2.1 + omp_unset_nest_lock_@OMP_3.0 4.4 --- gcc-4.7-4.7.2.orig/debian/libgcc4.symbols.hppa +++ gcc-4.7-4.7.2/debian/libgcc4.symbols.hppa @@ -0,0 +1,94 @@ +libgcc_s.so.4 libgcc4 #MINVER# + GCC_3.0@GCC_3.0 4.1.1 + GCC_3.3.1@GCC_3.3.1 4.1.1 + GCC_3.3@GCC_3.3 4.1.1 + GCC_3.4.2@GCC_3.4.2 4.1.1 + GCC_3.4@GCC_3.4 4.1.1 + GCC_4.0.0@GCC_4.0.0 4.1.1 + GCC_4.2.0@GCC_4.2.0 4.1.1 + GCC_4.3.0@GCC_4.3.0 4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 4.1.1 + _Unwind_Backtrace@GCC_3.3 4.1.1 + _Unwind_DeleteException@GCC_3.0 4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 4.1.1 + _Unwind_Find_FDE@GCC_3.0 4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 4.1.1 + _Unwind_GetCFA@GCC_3.3 4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 4.1.1 + _Unwind_GetGR@GCC_3.0 4.1.1 + _Unwind_GetIP@GCC_3.0 4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 4.1.1 + _Unwind_GetRegionStart@GCC_3.0 4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 4.1.1 + _Unwind_RaiseException@GCC_3.0 4.1.1 + _Unwind_Resume@GCC_3.0 4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 4.1.1 + _Unwind_SetGR@GCC_3.0 4.1.1 + _Unwind_SetIP@GCC_3.0 4.1.1 + __absvdi2@GCC_3.0 4.1.1 + __absvsi2@GCC_3.0 4.1.1 + __addvdi3@GCC_3.0 4.1.1 + __addvsi3@GCC_3.0 4.1.1 + __ashldi3@GCC_3.0 4.1.1 + __ashrdi3@GCC_3.0 4.1.1 + __bswapdi2@GCC_4.3.0 4.3 + __bswapsi2@GCC_4.3.0 4.3 + __clear_cache@GCC_3.0 4.1.1 + __clzdi2@GCC_3.4 4.1.1 + __clzsi2@GCC_3.4 4.1.1 + __cmpdi2@GCC_3.0 4.1.1 + __ctzdi2@GCC_3.4 4.1.1 + __ctzsi2@GCC_3.4 4.1.1 + __deregister_frame@GLIBC_2.0 4.1.1 + __deregister_frame_info@GLIBC_2.0 4.1.1 + __deregister_frame_info_bases@GCC_3.0 4.1.1 + __divdc3@GCC_4.0.0 4.1.1 + __divdi3@GLIBC_2.0 4.1.1 + __divsc3@GCC_4.0.0 4.1.1 + __emutls_get_address@GCC_4.3.0 4.3 + __emutls_register_common@GCC_4.3.0 4.3 + __enable_execute_stack@GCC_3.4.2 4.1.1 + __ffsdi2@GCC_3.0 4.1.1 + __ffssi2@GCC_4.3.0 4.3 + __fixdfdi@GCC_3.0 4.1.1 + __fixsfdi@GCC_3.0 4.1.1 + __fixunsdfdi@GCC_3.0 4.1.1 + __fixunsdfsi@GCC_3.0 4.1.1 + __fixunssfdi@GCC_3.0 4.1.1 + __fixunssfsi@GCC_3.0 4.1.1 + __floatdidf@GCC_3.0 4.1.1 + __floatdisf@GCC_3.0 4.1.1 + __floatundidf@GCC_4.2.0 4.2.1 + __floatundisf@GCC_4.2.0 4.2.1 + __frame_state_for@GLIBC_2.0 4.1.1 + __gcc_personality_v0@GCC_3.3.1 4.1.1 + __lshrdi3@GCC_3.0 4.1.1 + __moddi3@GLIBC_2.0 4.1.1 + __muldc3@GCC_4.0.0 4.1.1 + __muldi3@GCC_3.0 4.1.1 + __mulsc3@GCC_4.0.0 4.1.1 + __mulvdi3@GCC_3.0 4.1.1 + __mulvsi3@GCC_3.0 4.1.1 + __negdi2@GCC_3.0 4.1.1 + __negvdi2@GCC_3.0 4.1.1 + __negvsi2@GCC_3.0 4.1.1 + __paritydi2@GCC_3.4 4.1.1 + __paritysi2@GCC_3.4 4.1.1 + __popcountdi2@GCC_3.4 4.1.1 + __popcountsi2@GCC_3.4 4.1.1 + __powidf2@GCC_4.0.0 4.1.1 + __powisf2@GCC_4.0.0 4.1.1 + __register_frame@GLIBC_2.0 4.1.1 + __register_frame_info@GLIBC_2.0 4.1.1 + __register_frame_info_bases@GCC_3.0 4.1.1 + __register_frame_info_table@GLIBC_2.0 4.1.1 + __register_frame_info_table_bases@GCC_3.0 4.1.1 + __register_frame_table@GLIBC_2.0 4.1.1 + __subvdi3@GCC_3.0 4.1.1 + __subvsi3@GCC_3.0 4.1.1 + __ucmpdi2@GCC_3.0 4.1.1 + __udivdi3@GLIBC_2.0 4.1.1 + __udivmoddi4@GCC_3.0 4.1.1 + __umoddi3@GLIBC_2.0 4.1.1 --- gcc-4.7-4.7.2.orig/debian/gnatprj.gpr +++ gcc-4.7-4.7.2/debian/gnatprj.gpr @@ -0,0 +1,32 @@ +-- Project file for use with GNAT +-- Copyright (c) 2005, 2008 Ludovic Brenta +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- This project file is designed to help build applications that use +-- GNAT project files. Here is an example of how to use this project file: +-- +-- with "gnatprj"; +-- project Example is +-- for Object_Dir use "obj"; +-- for Exec_Dir use "."; +-- for Main use ("example"); +-- end Example; + +with "gnatvsn.gpr"; +project Gnatprj is + for Library_Name use "gnatprj"; + for Library_Dir use "/usr/lib"; + for Library_Kind use "dynamic"; + for Source_Dirs use ("/usr/share/ada/adainclude/gnatprj"); + for Library_ALI_Dir use "/usr/lib/ada/adalib/gnatprj"; + for Externally_Built use "true"; +end Gnatprj; --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.lpia +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.lpia @@ -0,0 +1,134 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.2.orig/debian/lib32stdc++6.symbols.s390x +++ gcc-4.7-4.7.2/debian/lib32stdc++6.symbols.s390x @@ -0,0 +1,557 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.common" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 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_ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1 + 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_ZNSt8valarrayImEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImED1Ev@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImED2Ev@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImEixEm@GLIBCXX_3.4 4.1.1 + _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZSt11_Hash_bytesPKvmm@CXXABI_1.3.5 4.6 + _ZSt15_Fnv_hash_bytesPKvmm@CXXABI_1.3.5 4.6 + _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1 + _ZSt16__ostream_insertIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1 + _ZSt17__copy_streambufsIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1 + _ZSt17__copy_streambufsIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1 + _ZSt17__verify_groupingPKcmRKSs@GLIBCXX_3.4.10 4.3 + _ZSt21__copy_streambufs_eofIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1 + _ZSt21__copy_streambufs_eofIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1 + _ZThn8_NSdD0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSdD1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSdD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSdD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSiD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSiD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSoD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSoD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znam@GLIBCXX_3.4 4.1.1 + _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwm@GLIBCXX_3.4 4.1.1 + _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit.s390" + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.i386 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.i386 @@ -0,0 +1,9 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16.powerpc" + _gfortran_norm2_r10@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.7-4.7.2.orig/debian/dh_doclink +++ gcc-4.7-4.7.2/debian/dh_doclink @@ -0,0 +1,12 @@ +#! /bin/sh + +pkg=`echo $1 | sed 's/^-p//'` +target=$2 + +[ -d debian/$pkg/usr/share/doc ] || mkdir -p debian/$pkg/usr/share/doc +if [ -d debian/$pkg/usr/share/doc/$p -a ! -h debian/$pkg/usr/share/doc/$p ] +then + echo "WARNING: removing doc directory $pkg" + rm -rf debian/$pkg/usr/share/doc/$pkg +fi +ln -sf $target debian/$pkg/usr/share/doc/$pkg --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.lpia +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.lpia @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.7-4.7.2.orig/debian/lib32stdc++6.symbols.amd64 +++ gcc-4.7-4.7.2/debian/lib32stdc++6.symbols.amd64 @@ -0,0 +1,6 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/gcj-BV-jre-headless.prerm +++ gcc-4.7-4.7.2/debian/gcj-BV-jre-headless.prerm @@ -0,0 +1,13 @@ +#! /bin/sh -e + +if [ "$1" = "remove" ] || [ "$1" = "deconfigure" ]; then + update-alternatives --quiet --remove java /usr/bin/gij-@BV@ + update-alternatives --quiet --remove rmiregistry /usr/bin/grmiregistry-@BV@ + update-alternatives --quiet --remove keytool /usr/bin/gkeytool-@BV@ + update-alternatives --quiet --remove orbd /usr/bin/gorbd-@BV@ + update-alternatives --quiet --remove rmid /usr/bin/grmid-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.kfreebsd-i386 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.kfreebsd-i386 @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/README.C++ +++ gcc-4.7-4.7.2/debian/README.C++ @@ -0,0 +1,35 @@ +libstdc++ is an implementation of the Standard C++ Library, including the +Standard Template Library (i.e. as specified by ANSI and ISO). + +Some notes on porting applications from libstdc++-2.90 (or earlier versions) +to libstdc++-v3 can be found in the libstdc++6-4.3-doc package. After the +installation of the package, look at: + + file:///usr/share/doc/gcc-4.3-base/libstdc++/html/17_intro/porting-howto.html + +On Debian GNU/Linux you find additional documentation in the +libstdc++6-4.3-doc package. After installing these packages, +point your browser to + + file:///usr/share/doc/libstdc++6-4.3-doc/libstdc++/html/index.html + +Other documentation can be found: + + http://www.sgi.com/tech/stl/ + +with a good, recent, book on C++. + +A great deal of useful C++ documentation can be found in the C++ FAQ-Lite, +maintained by Marshall Cline . It can be found at the +mirror sites linked from the following URL (this was last updated on +2010/09/11): + + http://www.parashift.com/c++-faq/ + +or use some search engin site to find it, e.g.: + + http://www.google.com/search?q=c%2B%2B+faq+lite + +Be careful not to use outdated mirors. + +Please send updates to this list as bug report for the g++ package. --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.amd64 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.amd64 @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/lib64gcc1.symbols.mips +++ gcc-4.7-4.7.2/debian/lib64gcc1.symbols.mips @@ -0,0 +1,1749 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 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__sync_fetch_and_nand_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_8@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_8@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_synchronize@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_8@GCC_4.4.0 1:4.4 + __truncdfsf2@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_3.0 1:4.1.1 + __trunctfsf2@GCC_3.0 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __udivuta3@GCC_4.3.0 1:4.3 + __udivutq3@GCC_4.3.0 1:4.3 + __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __unordtf2@GCC_4.5.0 1:4.5 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usadduta3@GCC_4.3.0 1:4.3 + __usaddutq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usashluta3@GCC_4.3.0 1:4.3 + __usashlutq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usdivuta3@GCC_4.3.0 1:4.3 + __usdivutq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usmuluta3@GCC_4.3.0 1:4.3 + __usmulutq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __usneguta2@GCC_4.3.0 1:4.3 + __usnegutq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 + __ussubuta3@GCC_4.3.0 1:4.3 + __ussubutq3@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.2.orig/debian/gij-wrapper-BV.1 +++ gcc-4.7-4.7.2/debian/gij-wrapper-BV.1 @@ -0,0 +1,22 @@ +.TH GIJ-WRAPPER 1 "August 11, 2001" gij-wrapper "Java User's Manual" +.SH NAME +gij-wrapper \- a wrapper around gij + +.SH SYNOPSIS +gij-wrapper [\fB\s-1OPTION\s0\fR] ... \fI\s-1JARFILE\s0\fR [\fI\s-1ARGS\s0\fR...] +.PP +gij-wrapper [\fB\-jar\fR] [\fB\s-1OPTION\s0\fR] ... \fI\s-1CLASS\s0\fR [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgij-wrapper\fR is a wrapper around gij(1) to be called as the java +interpreter. Options different for java(1) and gij(1) are translated, +options unknown to gij(1) are silently ignored. + +.SH OPTIONS +See gij-@BV@(1) for a list of options that gij understands. + +.SH "SEE ALSO" +.BR gij-@BV@(1) +, +.BR java(1) --- gcc-4.7-4.7.2.orig/debian/gcjh-wrapper-BV +++ gcc-4.7-4.7.2/debian/gcjh-wrapper-BV @@ -0,0 +1,86 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java header generator. +# +# Command-line arguments should be in the style of Sun's javah command; +# these will be converted to gcjh arguments before being passed to the +# gcjh itself. +# +# Copyright (C) 2003 by Peter Hawkins +# Haphazardly hacked up based on the gcj-wrapper perl script. +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gcj-wrapper-3.2 shell script. + +use strict; + +# The real Java header generator: +my $javaHeaderGen = '/usr/bin/gcjh-@BV@'; + +# The command-line arguments to pass to the real Java compiler: +my @commandLine; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; +my $copyNextArg = 0; +my $ignoreNextArg = 0; +my $appendNextArg = ''; +foreach my $arg (@ARGV) { + # See if we already know what to do with this argument. + if ($ignoreNextArg) { + # Throw it away. + $ignoreNextArg = 0; + next; + } elsif ($copyNextArg or not $parsingOptions) { + # Copy it directly. + push @commandLine, $arg; + $copyNextArg = 0; + next; + } elsif ($appendNextArg) { + # Append it to $appendNextArg and then copy directly. + push @commandLine, ($appendNextArg . $arg); + $appendNextArg = ''; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-verbose') { + push @commandLine, '--verbose'; + } elsif ($arg eq '-classpath' or $arg eq '--classpath' or $arg eq '--cp') { + $appendNextArg = '--classpath='; + } elsif ($arg eq '-encoding' or $arg eq '-bootclasspath' or + $arg eq '-extdirs') { + $appendNextArg = "-".$arg . '='; + } elsif ($arg eq '-d') { + push @commandLine, '-d'; + $copyNextArg = 1; + } elsif ($arg eq '-o') { + push @commandLine, '-o'; + $copyNextArg = 1; + } elsif ($arg eq '-stubs') { + push @commandLine, '-stubs'; + } elsif ($arg eq '-jni') { + push @commandLine, '-jni'; + } elsif ($arg =~ /^-old/) { + # An extended Sun option (which we don't support). + push @commandLine, '--help' if ($arg eq '-old'); + } elsif ($arg =~ /^-/) { + # An unsupported standalone option. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Was there a partial argument that was never completed? +push @commandLine, $appendNextArg if ($appendNextArg); + +# Call the real Java header generator. +my @fullCommandLine = ( $javaHeaderGen ); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.7-4.7.2.orig/debian/gij-wrapper-BV +++ gcc-4.7-4.7.2/debian/gij-wrapper-BV @@ -0,0 +1,98 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java interpreter. +# +# Command-line arguments should be in the style of Sun's Java runtime; +# these will be converted to gij arguments before being passed to the +# gij itself. +# +# The Debian JNI module directory and any other specified JNI +# directories will be included on the JNI search path. +# +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gij-wrapper-3.2 shell script. + +use strict; + +# The real Java runtime: +my $javaRuntime = '/usr/bin/gij-@BV@'; + +# The debian JNI module directory: +my $debianJNIDir = '/usr/lib/jni'; + +# The command-line arguments to pass to the real Java runtime: +my @commandLine; + +# The full JNI search path to use: +my $JNIPath = ''; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; + +# Flag used to copy argument to -classpath or -cp. +my $copyNext = 0; +foreach my $arg (@ARGV) { + if (not $parsingOptions) { + # We're done parsing options; just copy all remaining arguments directly. + push @commandLine, $arg; + next; + } + if ($copyNext) { + push @commandLine, $arg; + $copyNext = 0; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-cp' or $arg eq '--cp') { + push @commandLine, '-cp'; + $copyNext = 1; + } elsif ($arg eq '-classpath' or $arg eq '--classpath') { + push @commandLine, '-classpath'; + $copyNext = 1; + } elsif ($arg =~ /^-Djava.library.path=(.+)$/) { + # A component of the JNI search path has been given. + if ($JNIPath) { + $JNIPath = $JNIPath . ':' . $1; + } else { + $JNIPath = $1; + } + } elsif ($arg eq '-jar' or $arg =~ /^-D/) { + # Copy the argument directly. + push @commandLine, $arg; + } elsif ($arg =~ /^-/) { + # An unrecognised option has been passed - just drop it. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Add the debian JNI module directory to the JNI search path if it's not +# already there. +if ($JNIPath !~ /(^|:)$debianJNIDir($|:)/) { + if ($JNIPath) { + $JNIPath = $JNIPath . ':' . $debianJNIDir; + } else { + $JNIPath = $debianJNIDir; + } +} + +# Use environment variable $LTDL_LIBRARY_PATH to store the JNI path, +# since gij uses libltdl to dlopen JNI modules. +if ($ENV{LTDL_LIBRARY_PATH}) { + $ENV{LTDL_LIBRARY_PATH} = $ENV{LTDL_LIBRARY_PATH} . ':' . $JNIPath; +} else { + $ENV{LTDL_LIBRARY_PATH} = $JNIPath; +} + +# Call the real Java runtime. +my @fullCommandLine = ( $javaRuntime ); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.7-4.7.2.orig/debian/gcc-BV-CRB.preinst.in +++ gcc-4.7-4.7.2/debian/gcc-BV-CRB.preinst.in @@ -0,0 +1,12 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-gcc /usr/bin/@TARGET@-gcc-@BV@ + update-alternatives --quiet --remove @TARGET@-gcov /usr/bin/@TARGET@-gcov-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/control +++ gcc-4.7-4.7.2/debian/control @@ -0,0 +1,1849 @@ +Source: gcc-4.7 +Section: devel +Priority: optional +Maintainer: Ubuntu Core developers +XSBC-Original-Maintainer: Debian GCC Maintainers +Uploaders: Matthias Klose +Standards-Version: 3.9.3 +Build-Depends: dpkg-dev (>= 1.16.0~ubuntu4), debhelper (>= 5.0.62), g++-multilib [amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc x32], libc6.1-dev (>= 2.13-0ubuntu6) [alpha ia64] | libc0.3-dev (>= 2.13-0ubuntu6) [hurd-i386] | libc0.1-dev (>= 2.13-0ubuntu6) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= 2.13-0ubuntu6), libc6-dev (>= 2.13-31) [armel armhf], libc6-dev-amd64 [i386 x32], libc6-dev-sparc64 [sparc], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64 x32], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 s390x x32], lib64gcc1 [i386 powerpc sparc s390 x32], libc6-dev-mips64 [mips mipsel], libc6-dev-mipsn32 [mips mipsel], libc6-dev-x32 [amd64 i386], libx32gcc1 [amd64 i386], libc6-dev-armhf [armel], libc6-dev-armel [armhf], m4, libtool, autoconf2.64, automake (>= 1:1.11), automake (<< 1:1.12), libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], zlib1g-dev, gawk, lzma, xz-utils, patchutils, binutils (>= 2.21.1) | binutils-multiarch (>= 2.21.1), binutils-hppa64 (>= 2.21.1) [hppa], gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, texinfo (>= 4.3), locales, procps, sharutils, netbase, binutils-spu (>= 2.21.1) [powerpc ppc64], newlib-spu (>= 1.16.0) [powerpc ppc64], libcloog-ppl-dev (>= 0.15.9-2~), libmpc-dev, libmpfr-dev (>= 3.0.0-9~), libgmp-dev (>= 2:5.0.1~), libelfg0-dev (>= 0.8.12), dejagnu [!m68k !hurd-i386 !hurd-alpha], autogen, realpath (>= 1.9.12), chrpath, lsb-release, make (>= 3.81), quilt +Build-Depends-Indep: doxygen (>= 1.7.2), graphviz (>= 2.2), gsfonts-x11, texlive-latex-base, +Build-Conflicts: binutils-gold +Homepage: http://gcc.gnu.org/ +XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc-4.7/ +XS-Vcs-Svn: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.7 + +Package: gcc-4.7-base +Architecture: any +Multi-Arch: same +Section: libs +Priority: required +Depends: ${misc:Depends} +Replaces: ${base:Replaces} +Breaks: gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~), gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~), dehydra (<= 0.9.hg20110609-2) +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). + +Package: libgcc1 +Architecture: any +Section: libs +Priority: required +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +Provides: libgcc1-armel [armel], libgcc1-armhf [armhf] +Description: GCC support library + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: libgcc-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7 (<< ${gcc:SplitVersion}) +Multi-Arch: same +Description: GCC support library (development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libgcc1-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Multi-Arch: same +Provides: libgcc1-dbg-armel [armel], libgcc1-dbg-armhf [armhf] +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: libgcc2 +Architecture: m68k +Section: libs +Priority: required +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +Description: GCC support library + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: libgcc2-dbg +Architecture: m68k +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc2 (= ${gcc:Version}), ${misc:Depends} +Multi-Arch: same +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: libgcc4 +Architecture: hppa +Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +Section: libs +Priority: required +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: libgcc4-dbg +Architecture: hppa +Multi-Arch: same +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc4 (= ${gcc:Version}), ${misc:Depends} +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: lib64gcc1 +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Conflicts: libgcc1 (<= 1:3.3-0pre9) +Description: GCC support library (64bit) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: lib64gcc-4.7-dev +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (64bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: lib64gcc1-dbg +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: lib32gcc1 +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: libs +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GCC support library (32 bit Version) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: lib32gcc-4.7-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (32 bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: lib32gcc1-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: libhfgcc1 +Architecture: armel +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Conflicts: libgcc1-armhf [armel] +Description: GCC support library (hard float ABI) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: libhfgcc-4.7-dev +Architecture: armel +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (hard float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libhfgcc1-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfgcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Conflicts: libgcc1-dbg-armhf [armel]) +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: libsfgcc1 +Architecture: armhf +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Conflicts: libgcc1-armel [armhf] +Description: GCC support library (soft float ABI) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: libsfgcc-4.7-dev +Architecture: armhf +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (soft float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libsfgcc1-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfgcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Conflicts: libgcc1-dbg-armel [armhf]) +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: libn32gcc1 +Architecture: mips mipsel +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Conflicts: libgcc1 (<= 1:3.3-0pre9) +Description: GCC support library (n32) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: libn32gcc-4.7-dev +Architecture: mips mipsel +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (n32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libn32gcc1-dbg +Architecture: mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: libx32gcc1 +Architecture: amd64 i386 +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Description: GCC support library (x32) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + +Package: libx32gcc-4.7-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (x32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libx32gcc1-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Description: GCC support library (debug symbols) + Debug symbols for the GCC support library. + +Package: gcc-4.7 +Architecture: any +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), cpp-4.7 (= ${gcc:Version}), binutils (>= ${binutils:Version}), libgcc-4.7-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Recommends: ${dep:libcdev} +Suggests: ${gcc:multilib}, libmudflap0-4.7-dev (>= ${gcc:Version}), gcc-4.7-doc (>= ${gcc:SoftVersion}), gcc-4.7-locales (>= ${gcc:SoftVersion}), libgcc1-dbg, libgomp1-dbg, libitm1-dbg, libquadmath0-dbg, libmudflap0-dbg, ${dep:libcloog}, ${dep:gold} +Provides: c-compiler +Description: GNU C compiler + This is the GNU C compiler, a fairly portable optimizing compiler for C. + +Package: gcc-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libmudflapbiarch} +Description: GNU C compiler (multilib files) + This is the GNU C compiler, a fairly portable optimizing compiler for C. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gcc-4.7-plugin-dev +Architecture: any +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgmp-dev (>= 2:5.0.1~), ${shlibs:Depends}, ${misc:Depends} +Description: Files for GNU GCC plugin development. + This package contains (header) files for GNU GCC plugin development. It + is only used for the development of GCC plugins, but not needed to run + plugins. + +Package: gcc-4.7-hppa64 +Architecture: hppa +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3) +Description: GNU C compiler (cross compiler for hppa64) + This is the GNU C compiler, a fairly portable optimizing compiler for C. + +Package: gcc-4.7-spu +Architecture: powerpc ppc64 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), binutils-spu (>= 2.18.1~cvs20080103-3), newlib-spu, ${shlibs:Depends}, ${misc:Depends} +Provides: spu-gcc +Description: SPU cross-compiler (preprocessor and C compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (preprocessor + and C compiler). + +Package: g++-4.7-spu +Architecture: powerpc ppc64 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: spu-g++ +Description: SPU cross-compiler (C++ compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (C++ compiler). + +Package: gfortran-4.7-spu +Architecture: powerpc ppc64 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: spu-gfortran +Description: SPU cross-compiler (Fortran compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (Fortran compiler). + +Package: cpp-4.7 +Architecture: any +Section: interpreters +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Suggests: gcc-4.7-locales (>= ${gcc:SoftVersion}) +Replaces: gcc-4.6 (<< 4.6.1-9) +Description: GNU C preprocessor + A macro processor that is used automatically by the GNU C compiler + to transform programs before actual compilation. + . + This package has been separated from gcc for the benefit of those who + require the preprocessor but not the compiler. + +Package: cpp-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU C preprocessor (cpp) + Documentation for the GNU C preprocessor in info format. + +Package: gcc-4.7-locales +Architecture: all +Section: devel +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), cpp-4.7 (>= ${gcc:SoftVersion}), ${misc:Depends} +Recommends: gcc-4.7 (>= ${gcc:SoftVersion}) +Description: GCC, the GNU compiler collection (native language support files) + Native language support for GCC. Lets GCC speak your language, + if translations are available. + . + Please do NOT submit bug reports in other languages than "C". + Always reset your language settings to use the "C" locales. + +Package: g++-4.7 +Architecture: any +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: c++-compiler, c++abi2-dev +Suggests: ${gxx:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}), libstdc++6-4.7-dbg +Description: GNU C++ compiler + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + +Package: g++-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), g++-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libcxxbiarch}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libcxxbiarchdbg} +Description: GNU C++ compiler (multilib files) + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: libmudflap0 +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +Provides: libmudflap0-armel [armel], libmudflap0-armhf [armhf] +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GCC mudflap shared support libraries + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libmudflap0-dbg +Architecture: any +Multi-Arch: same +Provides: libmudflap0-dbg-armel [armel], libmudflap0-dbg-armhf [armhf] +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libmudflap0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib32mudflap0 +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Conflicts: ${confl:lib32} +Description: GCC mudflap shared support libraries (32bit) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib32mudflap0-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32mudflap0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (32 bit debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib64mudflap0 +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Description: GCC mudflap shared support libraries (64bit) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib64mudflap0-dbg +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64mudflap0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (64 bit debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libn32mudflap0 +Architecture: mips mipsel +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Description: GCC mudflap shared support libraries (n32) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libn32mudflap0-dbg +Architecture: mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32mudflap0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (n32 debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libx32mudflap0 +Architecture: amd64 i386 +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Description: GCC mudflap shared support libraries (x32) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libx32mudflap0-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32mudflap0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (x32 debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libhfmudflap0 +Architecture: armel +Section: libs +Priority: optional +Conflicts: libmudflap0-armhf [armel]) +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC mudflap shared support libraries (hard float) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libhfmudflap0-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfmudflap0 (= ${gcc:Version}), ${misc:Depends} +Conflicts: libmudflap0-dbg-armhf [armel]) +Description: GCC mudflap shared support libraries (hard float debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libsfmudflap0 +Architecture: armhf +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libmudflap0-armel [armhf]) +Description: GCC mudflap shared support libraries (soft float) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libsfmudflap0-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfmudflap0 (= ${gcc:Version}), ${misc:Depends} +Conflicts: libmudflap0-dbg-armel [armhf]) +Description: GCC mudflap shared support libraries (soft float debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libmudflap0-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libmudflap0 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${sug:libmudflapdev} +Conflicts: libmudflap0-dev +Description: GCC mudflap support libraries (development files) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + . + This package contains the headers and the static libraries. + +Package: libgomp1 +Section: libs +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +Provides: libgomp1-armel [armel], libgomp1-armhf [armhf] +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libgomp1-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libgomp1 (= ${gcc:Version}), ${misc:Depends} +Multi-Arch: same +Provides: libgomp1-dbg-armel [armel], libgomp1-dbg-armhf [armhf] +Description: GCC OpenMP (GOMP) support library (debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib32gomp1 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GCC OpenMP (GOMP) support library (32bit) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib32gomp1-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gomp1 (= ${gcc:Version}), ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (32 bit debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib64gomp1 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (64bit) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib64gomp1-dbg +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gomp1 (= ${gcc:Version}), ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (64bit debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libn32gomp1 +Section: libs +Architecture: mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (n32) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libn32gomp1-dbg +Architecture: mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gomp1 (= ${gcc:Version}), ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (n32 debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + +Package: libx32gomp1 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (x32) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libx32gomp1-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32gomp1 (= ${gcc:Version}), ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (x32 debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + +Package: libhfgomp1 +Section: libs +Architecture: armel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libgomp1-armhf [armel]) +Description: GCC OpenMP (GOMP) support library (hard float ABI) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libhfgomp1-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfgomp1 (= ${gcc:Version}), ${misc:Depends} +Conflicts: libgomp1-dbg-armhf [armel]) +Description: GCC OpenMP (GOMP) support library (hard float ABI debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + +Package: libsfgomp1 +Section: libs +Architecture: armhf +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libgomp1-armel [armhf]) +Description: GCC OpenMP (GOMP) support library (soft float ABI) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libsfgomp1-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfgomp1 (= ${gcc:Version}), ${misc:Depends} +Conflicts: libgomp1-dbg-armel [armhf]) +Description: GCC OpenMP (GOMP) support library (soft float ABI debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + +Package: libitm1 +Section: libs +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Provides: libitm1-armel [armel], libitm1-armhf [armhf] +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libitm1-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libitm1 (= ${gcc:Version}), ${misc:Depends} +Multi-Arch: same +Provides: libitm1-dbg-armel [armel], libitm1-dbg-armhf [armhf] +Description: GNU Transactional Memory Library (debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib32itm1 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GNU Transactional Memory Library (32bit) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib32itm1-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32itm1 (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (32 bit debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib64itm1 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (64bit) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib64itm1-dbg +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64itm1 (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (64bit debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libn32itm1 +Section: libs +Architecture: mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (n32) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libn32itm1-dbg +Architecture: mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32itm1 (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (n32 debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libx32itm1 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (x32) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libx32itm1-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32itm1 (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (x32 debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libhfitm1 +Section: libs +Architecture: armel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libitm1-armhf [armel]) +Description: GNU Transactional Memory Library (hard float ABI) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libhfitm1-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfitm1 (= ${gcc:Version}), ${misc:Depends} +Conflicts: libitm1-armel [armhf]) +Description: GNU Transactional Memory Library (hard float ABI debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libsfitm1 +Section: libs +Architecture: armhf +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (soft float ABI) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libsfitm1-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfitm1 (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (soft float ABI debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libquadmath0 +Section: libs +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libquadmath0-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libquadmath0 (= ${gcc:Version}), ${misc:Depends} +Multi-Arch: same +Description: GCC Quad-Precision Math Library (debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: lib32quadmath0 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GCC Quad-Precision Math Library (32bit) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: lib32quadmath0-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32quadmath0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (32 bit debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: lib64quadmath0 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (64bit) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: lib64quadmath0-dbg +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64quadmath0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (64bit debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: libn32quadmath0 +Section: libs +Architecture: mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (n32) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libn32quadmath0-dbg +Architecture: mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32quadmath0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (n32 debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: libx32quadmath0 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (x32) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libx32quadmath0-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32quadmath0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (x32 debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: libhfquadmath0 +Section: libs +Architecture: armel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (hard float ABI) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libhfquadmath0-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfquadmath0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: libsfquadmath0 +Section: libs +Architecture: armhf +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (soft float ABI) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libsfquadmath0-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfquadmath0 (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: gobjc++-4.7 +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc-4.7 (= ${gcc:Version}), g++-4.7 (= ${gcc:Version}), ${shlibs:Depends}, libobjc-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjcxx:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}) +Provides: objc++-compiler +Description: GNU Objective-C++ compiler + This is the GNU Objective-C++ compiler, which compiles + Objective-C++ on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gobjc++-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc++-4.7 (= ${gcc:Version}), g++-4.7-multilib (= ${gcc:Version}), gobjc-4.7-multilib (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GNU Objective-C++ compiler (multilib files) + This is the GNU Objective-C++ compiler, which compiles Objective-C++ on + platforms supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gobjc-4.7 +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libobjc-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjc:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}), libobjc4-dbg +Provides: objc-compiler +Description: GNU Objective-C compiler + This is the GNU Objective-C compiler, which compiles + Objective-C on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gobjc-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Objective-C compiler (multilib files) + This is the GNU Objective-C compiler, which compiles Objective-C on platforms + supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: libobjc4 +Section: libs +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Provides: libobjc4-armel [armel], libobjc4-armhf [armhf] +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications + Library needed for GNU ObjC applications linked against the shared library. + +Package: libobjc-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc-4.7-dev (= ${gcc:Version}), libobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7 (<< ${gcc:SplitVersion}) +Multi-Arch: same +Description: Runtime library for GNU Objective-C applications (development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libobjc4-dbg +Section: debug +Architecture: any +Multi-Arch: same +Provides: libobjc4-dbg-armel [armel], libobjc4-dbg-armhf [armhf] +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libobjc4 (= ${gcc:Version}), libgcc1-dbg, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (debug symbols) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib64objc4 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (64bit) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib64objc-4.7-dev +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gcc-4.7-dev (= ${gcc:Version}), lib64objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (64bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib64objc4-dbg +Section: debug +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64objc4 (= ${gcc:Version}), lib64gcc1-dbg, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (64 bit debug symbols) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib32objc4 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: Runtime library for GNU Objective-C applications (32bit) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib32objc-4.7-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gcc-4.7-dev (= ${gcc:Version}), lib32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (32bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib32objc4-dbg +Section: debug +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32objc4 (= ${gcc:Version}), lib32gcc1-dbg, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (32 bit debug symbols) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libn32objc4 +Section: libs +Architecture: mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (n32) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libn32objc-4.7-dev +Architecture: mips mipsel +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gcc-4.7-dev (= ${gcc:Version}), libn32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (n32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libn32objc4-dbg +Section: debug +Architecture: mips mipsel +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32objc4 (= ${gcc:Version}), libn32gcc1-dbg, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (n32 debug symbols) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libx32objc4 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (x32) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libx32objc-4.7-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libx32gcc-4.7-dev (= ${gcc:Version}), libx32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (x32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libx32objc4-dbg +Section: debug +Architecture: amd64 i386 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32objc4 (= ${gcc:Version}), libx32gcc1-dbg, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (x32 debug symbols) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libhfobjc4 +Section: libs +Architecture: armel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libobjc4-armhf [armel]) +Description: Runtime library for GNU Objective-C applications (hard float ABI) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libhfobjc-4.7-dev +Architecture: armel +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libhfgcc-4.7-dev (= ${gcc:Version}), libhfobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libhfobjc4-dbg +Section: debug +Architecture: armel +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfobjc4 (= ${gcc:Version}), libhfgcc1-dbg, ${misc:Depends} +Conflicts: libobjc4-dbg-armhf [armel]) +Description: Runtime library for GNU Objective-C applications (hard float ABI debug symbols) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libsfobjc4 +Section: libs +Architecture: armhf +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libobjc4-armel [armhf]) +Description: Runtime library for GNU Objective-C applications (soft float ABI) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libsfobjc-4.7-dev +Architecture: armhf +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libsfgcc-4.7-dev (= ${gcc:Version}), libsfobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (soft float development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libsfobjc4-dbg +Section: debug +Architecture: armhf +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfobjc4 (= ${gcc:Version}), libsfgcc1-dbg, ${misc:Depends} +Conflicts: libobjc4-dbg-armel [armhf]) +Description: Runtime library for GNU Objective-C applications (soft float ABI debug symbols) + Library needed for GNU ObjC applications linked against the shared library. + +Package: gfortran-4.7 +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgfortran-4.7-dev (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: fortran95-compiler +Suggests: ${gfortran:multilib}, gfortran-4.7-doc, libgfortran3-dbg +Description: GNU Fortran compiler + This is the GNU Fortran compiler, which compiles + Fortran on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gfortran-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gfortran-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Fortran compiler (multilib files) + This is the GNU Fortran compiler, which compiles Fortran on platforms + supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gfortran-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Fortran compiler (gfortran) + Documentation for the GNU Fortran compiler in info format. + +Package: libgfortran3 +Section: libs +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +Provides: libgfortran3-armel [armel], libgfortran3-armhf [armhf] +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libgfortran-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libgfortran3, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7 (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7 (<< ${gcc:SplitVersion}) +Multi-Arch: same +Description: Runtime library for GNU Fortran applications (development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libgfortran3-dbg +Section: debug +Architecture: any +Multi-Arch: same +Provides: libgfortran3-dbg-armel [armel], libgfortran3-dbg-armhf [armhf] +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libgfortran3 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib64gfortran3 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (64bit) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib64gfortran-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gfortran3, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (64bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib64gfortran3-dbg +Section: debug +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gfortran3 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (64bit debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib32gfortran3 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: Runtime library for GNU Fortran applications (32bit) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib32gfortran-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gfortran3, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (32bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib32gfortran3-dbg +Section: debug +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gfortran3 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (32 bit debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libn32gfortran3 +Section: libs +Architecture: mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (n32) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libn32gfortran-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gfortran3, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (n32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libn32gfortran3-dbg +Section: debug +Architecture: mips mipsel +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gfortran3 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (n32 debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libx32gfortran3 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (x32) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libx32gfortran-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libx32gfortran3, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (x32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libx32gfortran3-dbg +Section: debug +Architecture: amd64 i386 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32gfortran3 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (x32 debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libhfgfortran3 +Section: libs +Architecture: armel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libgfortran3-armhf [armel]) +Description: Runtime library for GNU Fortran applications (hard float ABI) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libhfgfortran-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libhfgfortran3, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libhfgfortran3-dbg +Section: debug +Architecture: armel +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfgfortran3 (= ${gcc:Version}), ${misc:Depends} +Conflicts: libgfortran3-dbg-armhf [armel]) +Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libsfgfortran3 +Section: libs +Architecture: armhf +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libgfortran3-armel [armhf]) +Description: Runtime library for GNU Fortran applications (soft float ABI) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libsfgfortran-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libsfgfortran3, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (soft float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libsfgfortran3-dbg +Section: debug +Architecture: armhf +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfgfortran3 (= ${gcc:Version}), ${misc:Depends} +Conflicts: libgfortran3-dbg-armel [armhf]) +Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: gccgo-4.7 +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgo0 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: go-compiler +Suggests: ${go:multilib}, gccgo-4.7-doc, libgo0-dbg +Description: GNU Go compiler + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. It uses the gcc backend to generate optimized code. + +Package: gccgo-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gccgo-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libgobiarchdbg} +Description: GNU Go compiler (multilib files) + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gccgo-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Go compiler (gccgo) + Documentation for the GNU Go compiler in info format. + +Package: libgo0 +Section: libs +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Provides: libgo0-armel [armel], libgo0-armhf [armhf] +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications + Library needed for GNU Go applications linked against the + shared library. + +Package: libgo0-dbg +Section: debug +Architecture: any +Multi-Arch: same +Provides: libgo0-dbg-armel [armel], libgo0-dbg-armhf [armhf] +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libgo0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib64go0 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (64bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib64go0-dbg +Section: debug +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64go0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (64bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib32go0 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: Runtime library for GNU Go applications (32bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib32go0-dbg +Section: debug +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32go0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (32 bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: libn32go0 +Section: libs +Architecture: mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (n32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libn32go0-dbg +Section: debug +Architecture: mips mipsel +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32go0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (n32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: libx32go0 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (x32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libx32go0-dbg +Section: debug +Architecture: amd64 i386 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32go0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (x32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: libstdc++6 +Architecture: any +Section: libs +Priority: important +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libc}, ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +Provides: libstdc++6-armel [armel], libstdc++6-armhf [armhf] +Conflicts: scim (<< 1.4.2-1) +Description: GNU Standard C++ Library v3 + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: lib32stdc++6 +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: libs +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gcc1, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GNU Standard C++ Library v3 (32 bit Version) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + +Package: lib64stdc++6 +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, lib64gcc1, ${misc:Depends} +Description: GNU Standard C++ Library v3 (64bit) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libn32stdc++6 +Architecture: mips mipsel +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, libn32gcc1, ${misc:Depends} +Description: GNU Standard C++ Library v3 (n32) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libx32stdc++6 +Architecture: amd64 i386 +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, libx32gcc1, ${misc:Depends} +Description: GNU Standard C++ Library v3 (x32) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libhfstdc++6 +Architecture: armel +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, libhfgcc1, ${misc:Depends} +Conflicts: libstdc++6-armhf [armel]) +Description: GNU Standard C++ Library v3 (hard float ABI) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libsfstdc++6 +Architecture: armhf +Section: libs +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, libsfgcc1, ${misc:Depends} +Conflicts: libstdc++6-armel [armhf]) +Description: GNU Standard C++ Library v3 (soft float ABI) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libstdc++6-4.7-dev +Architecture: any +Multi-Arch: same +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc-4.7-dev (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends} +Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev +Suggests: libstdc++6-4.7-doc +Provides: libstdc++-dev +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libstdc++6-4.7-pic +Architecture: any +Multi-Arch: same +Section: libdevel +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (shared library subset kit) + This is used to develop subsets of the libstdc++ shared libraries for + use on custom installation floppies and in embedded systems. + . + Unless you are making one of those, you will not need this package. + +Package: libstdc++6-4.7-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libgcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same +Provides: libstdc++6-4.7-dbg-armel [armel], libstdc++6-4.7-dbg-armhf [armhf] +Recommends: libstdc++6-4.7-dev (= ${gcc:Version}) +Conflicts: libstdc++5-dbg, libstdc++5-3.3-dbg, libstdc++6-dbg, libstdc++6-4.0-dbg, libstdc++6-4.1-dbg, libstdc++6-4.2-dbg, libstdc++6-4.3-dbg, libstdc++6-4.4-dbg, libstdc++6-4.5-dbg, libstdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: lib32stdc++6-4.7-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), lib32gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: lib32stdc++6-dbg, lib32stdc++6-4.0-dbg, lib32stdc++6-4.1-dbg, lib32stdc++6-4.2-dbg, lib32stdc++6-4.3-dbg, lib32stdc++6-4.4-dbg, lib32stdc++6-4.5-dbg, lib32stdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: lib64stdc++6-4.7-dbg +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), lib64gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: lib64stdc++6-dbg, lib64stdc++6-4.0-dbg, lib64stdc++6-4.1-dbg, lib64stdc++6-4.2-dbg, lib64stdc++6-4.3-dbg, lib64stdc++6-4.4-dbg, lib64stdc++6-4.5-dbg, lib64stdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libn32stdc++6-4.7-dbg +Architecture: mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libn32gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libn32stdc++6-dbg, libn32stdc++6-4.0-dbg, libn32stdc++6-4.1-dbg, libn32stdc++6-4.2-dbg, libn32stdc++6-4.3-dbg, libn32stdc++6-4.4-dbg, libn32stdc++6-4.5-dbg, libn32stdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libx32stdc++6-4.7-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libx32gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libx32stdc++6-dbg, libx32stdc++6-4.0-dbg, libx32stdc++6-4.1-dbg, libx32stdc++6-4.2-dbg, libx32stdc++6-4.3-dbg, libx32stdc++6-4.4-dbg, libx32stdc++6-4.5-dbg, libx32stdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libhfstdc++6-4.7-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libhfgcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libhfstdc++6-dbg, libhfstdc++6-4.3-dbg, libhfstdc++6-4.4-dbg, libhfstdc++6-4.5-dbg, libhfstdc++6-4.6-dbg, libstdc++6-armhf [armel]) +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libsfstdc++6-4.7-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libsfgcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libsfstdc++6-dbg, libsfstdc++6-4.3-dbg, libsfstdc++6-4.4-dbg, libsfstdc++6-4.5-dbg, libsfstdc++6-4.6-dbg, libstdc++6-armel [armhf]) +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libstdc++6-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), ${misc:Depends} +Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc +Description: GNU Standard C++ Library v3 (documentation files) + This package contains documentation files for the GNU stdc++ library. + . + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. + +Package: gcc-4.7-soft-float +Architecture: arm armel armhf +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float +Description: GCC soft-floating-point gcc libraries (ARM) + These are versions of basic static libraries such as libgcc.a compiled + with the -msoft-float option, for CPUs without a floating-point unit. + +Package: fixincludes +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Fix non-ANSI header files + FixIncludes was created to fix non-ANSI system header files. Many + system manufacturers supply proprietary headers that are not ANSI compliant. + The GNU compilers cannot compile non-ANSI headers. Consequently, the + FixIncludes shell script was written to fix the header files. + . + Not all packages with header files are installed on the system, when the + package is built, so we make fixincludes available at build time of other + packages, such that checking tools like lintian can make use of it. + +Package: gcc-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Conflicts: gcc-docs (<< 2.95.2) +Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2) +Description: Documentation for the GNU compilers (gcc, gobjc, g++) + Documentation for the GNU compilers in info format. + +Package: gcc-4.7-source +Architecture: all +Priority: optional +Depends: make (>= 3.81), autoconf2.64, automake, quilt, patchutils, gawk, ${misc:Depends} +Description: Source of the GNU Compiler Collection + This package contains the sources and patches which are needed to + build the GNU Compiler Collection (GCC). --- gcc-4.7-4.7.2.orig/debian/README.ssp +++ gcc-4.7-4.7.2/debian/README.ssp @@ -0,0 +1,28 @@ +Stack smashing protection is a feature of GCC that enables a program to +detect buffer overflows and immediately terminate execution, rather than +continuing execution with corrupt internal data structures. It uses +"canaries" and local variable reordering to reduce the likelihood of +stack corruption through buffer overflows. + +Options that affect stack smashing protection: + +-fstack-protector + Enables protection for functions that are vulnerable to stack + smashing, such as those that call alloca() or use pointers. + +-fstack-protector-all + Enables protection for all functions. + +-Wstack-protector + Warns about functions that will not be protected. Only active when + -fstack-protector has been used. + +Applications built with stack smashing protection should link with the +ssp library by using the option "-lssp" for systems with glibc-2.3.x or +older; glibc-2.4 and newer versions provide this functionality in libc. + +The Debian architectures alpha, hppa, ia64, m68k, mips, mipsel do not +have support for stack smashing protection. + +More documentation can be found at the project's website: +http://researchweb.watson.ibm.com/trl/projects/security/ssp/ --- gcc-4.7-4.7.2.orig/debian/README.Bugs.m4 +++ gcc-4.7-4.7.2/debian/README.Bugs.m4 @@ -0,0 +1,333 @@ +Reporting Bugs in the GNU Compiler Collection for DIST +======================================================== + +Before reporting a bug, please +------------------------------ + +- Check that the behaviour really is a bug. Have a look into some + ANSI standards document. + +- Check the list of well known bugs: http://gcc.gnu.org/bugs.html#known + +- Try to reproduce the bug with a current GCC development snapshot. You + usually can get a recent development snapshot from the gcc-snapshot +ifelse(DIST,`Debian',`dnl + package in the unstable (or experimental) distribution. + + See: http://packages.debian.org/gcc-snapshot +', DIST, `Ubuntu',`dnl + package in the current development distribution. + + See: http://archive.ubuntu.com/ubuntu/pool/universe/g/gcc-snapshot/ +')dnl + +- Try to find out if the bug is a regression (an older GCC version does + not show the bug). + +- Check if the bug is already reported in the bug tracking systems. + +ifelse(DIST,`Debian',`dnl + Debian: http://bugs.debian.org/debian-gcc@lists.debian.org +', DIST, `Ubuntu',`dnl + Ubuntu: https://bugs.launchpad.net/~ubuntu-toolchain/+packagebugs + Debian: http://bugs.debian.org/debian-gcc@lists.debian.org +')dnl + Upstream: http://gcc.gnu.org/bugzilla/ + + +Where to report a bug +--------------------- + +ifelse(DIST,`Debian',`dnl +Please report bugs found in the packaging of GCC to the Debian bug tracking +system. See http://www.debian.org/Bugs/ for instructions (or use the +reportbug script). +', DIST, `Ubuntu',`dnl +Please report bugs found in the packaging of GCC to Launchpad. See below +how issues should be reported. +')dnl + +DIST's current policy is to closely follow the upstream development and +only apply a minimal set of patches (which are summarized in the README.Debian +document). + +ifelse(DIST,`Debian',`dnl +If you think you have found an upstream bug, you did check the section +above ("Before reporting a bug") and are able to provide a complete bug +report (see below "How to report a bug"), then you may help the Debian +GCC package maintainers, if you report the bug upstream and then submit +a bug report to the Debian BTS and tell us the upstream report number. +This way you are able to follow the upstream bug handling as well. If in +doubt, report the bug to the Debian BTS (but read "How to report a bug" +below). +', DIST, `Ubuntu',`dnl +If you think you have found an upstream bug, you did check the section +above ("Before reporting a bug") and are able to provide a complete bug +report (see below "How to report a bug"), then you may help the Ubuntu +GCC package maintainers, if you report the bug upstream and then submit +a bug report to Launchpad and tell us the upstream report number. +This way you are able to follow the upstream bug handling as well. If in +doubt, report the bug to Launchpad (but read "How to report a bug" below). + +Report the issue to https://bugs.launchpad.net/ubuntu/+source/SRCNAME. +')dnl + + +How to report a bug +------------------- + +There are complete instructions in the gcc info manual (found in the +gcc-doc package), section Bugs. + +The manual can be read using `M-x info' in Emacs, or if the GNU info +program is installed on your system by `info --node "(gcc)Bugs"'. Or see +the file BUGS included with the gcc source code. + +Online bug reporting instructions can be found at + + http://gcc.gnu.org/bugs.html + +[Some paragraphs taken from the above URL] + +The main purpose of a bug report is to enable us to fix the bug. The +most important prerequisite for this is that the report must be +complete and self-contained, which we explain in detail below. + +Before you report a bug, please check the list of well-known bugs and, +if possible in any way, try a current development snapshot. + +Summarized bug reporting instructions +------------------------------------- + +What we need + +Please include in your bug report all of the following items, the +first three of which can be obtained from the output of gcc -v: + + * the exact version of GCC; + * the system type; + * the options given when GCC was configured/built; + * the complete command line that triggers the bug; + * the compiler output (error messages, warnings, etc.); and + * the preprocessed file (*.i*) that triggers the bug, generated by + adding -save-temps to the complete compilation command, or, in + the case of a bug report for the GNAT front end, a complete set + of source files (see below). + +What we do not want + + * A source file that #includes header files that are left out + of the bug report (see above) + * That source file and a collection of header files. + * An attached archive (tar, zip, shar, whatever) containing all + (or some :-) of the above. + * A code snippet that won't cause the compiler to produce the + exact output mentioned in the bug report (e.g., a snippet with + just a few lines around the one that apparently triggers the + bug, with some pieces replaced with ellipses or comments for + extra obfuscation :-) + * The location (URL) of the package that failed to build (we won't + download it, anyway, since you've already given us what we need + to duplicate the bug, haven't you? :-) + * An error that occurs only some of the times a certain file is + compiled, such that retrying a sufficient number of times + results in a successful compilation; this is a symptom of a + hardware problem, not of a compiler bug (sorry) + * E-mail messages that complement previous, incomplete bug + reports. Post a new, self-contained, full bug report instead, if + possible as a follow-up to the original bug report + * Assembly files (*.s) produced by the compiler, or any binary files, + such as object files, executables, core files, or precompiled + header files + * Duplicate bug reports, or reports of bugs already fixed in the + development tree, especially those that have already been + reported as fixed last week :-) + * Bugs in the assembler, the linker or the C library. These are + separate projects, with separate mailing lists and different bug + reporting procedures + * Bugs in releases or snapshots of GCC not issued by the GNU + Project. Report them to whoever provided you with the release + * Questions about the correctness or the expected behavior of + certain constructs that are not GCC extensions. Ask them in + forums dedicated to the discussion of the programming language + + +Known Bugs and Non-Bugs +----------------------- + +[Please see /usr/share/doc/gcc/FAQ or http://gcc.gnu.org/faq.html first] + + +C++ exceptions don't work with C libraries +------------------------------------------ + +[Taken from the closed bug report #22769] C++ exceptions don't work +with C libraries, if the C code wasn't designed to be thrown through. +A solution could be to translate all C libraries with -fexceptions. +Mostly trying to throw an exception in a callback function (qsort, +Tcl command callbacks, etc ...). Example: + + #include + #include + + class A {}; + + static + int SortCondition(void const*, void const*) + { + printf("throwing 'sortcondition' exception\n"); + throw A(); + } + + int main(int argc, char *argv[]) + { + int list[2]; + + try { + SortCondition(NULL,NULL); + } catch (A) { + printf("caught test-sortcondition exception\n"); + } + try { + qsort(&list, sizeof(list)/sizeof(list[0]),sizeof(list[0]), + &SortCondition); + } catch (A) { + printf("caught real-sortcondition exception\n"); + } + return 0; +} + +Andrew Macleod responded: + +When compiled with the table driven exception handling, exception can only +be thrown through functions which have been compiled with the table driven EH. +If a function isn't compiled that way, then we do not have the frame +unwinding information required to restore the registers when unwinding. + +I believe the setjmp/longjmp mechanism will throw through things like this, +but its produces much messier code. (-fsjlj-exceptions) + +The C compiler does support exceptions, you just have to turn them on +with -fexceptions. + +Your main options are to: + a) Don't use callbacks, or at least don't throw through them. + b) Get the source and compile the library with -fexceptions (You have to + explicitly turn on exceptions in the C compiler) + c) always use -fsjlj-exceptions (boo, bad choice :-) + + +g++: "undefined reference" to static const array in class +--------------------------------------------------------- + +The following code compiles under GNU C++ 2.7.2 with correct results, +but produces the same linker error with GNU C++ 2.95.2. +Alexandre Oliva responded: + +All of them are correct. A static data member *must* be defined +outside the class body even if it is initialized within the class +body, but no diagnostic is required if the definition is missing. It +turns out that some releases do emit references to the missing symbol, +while others optimize it away. + +#include + +class Test +{ + public: + Test(const char *q); + protected: + static const unsigned char Jam_signature[4] = "JAM"; +}; + +Test::Test(const char *q) +{ + if (memcmp(q, Jam_signature, sizeof(Jam_signature)) != 0) + cerr << "Hello world!\n"; +} + +int main(void) +{ + Test::Test("JAM"); + return 0; +} + +g++: g++ causes passing non const ptr to ptr to a func with const arg + to cause an error (not a bug) +--------------------------------------------------------------------- + +Example: + +#include +void test(const char **b){ + printf ("%s\n",*b); +} +int main(void){ + char *test1="aoeu"; + test(&test1); +} + +make const +g++ const.cc -o const +const.cc: In function `int main()': +const.cc:7: passing `char **' as argument 1 of `test(const char **)' adds cv-quals without intervening `const' +make: *** [const] Error 1 + +Answer from "Martin v. Loewis" : + +> ok... maybe I missed something.. I haven't really kept up with the latest in +> C++ news. But I've never heard anything even remotly close to passing a non +> const var into a const arg being an error before. + +Thanks for your bug report. This is a not a bug in the compiler, but +in your code. The standard, in 4.4/4, puts it that way + +# A conversion can add cv-qualifiers at levels other than the first in +# multi-level pointers, subject to the following rules: +# Two pointer types T1 and T2 are similar if there exists a type T and +# integer n > 0 such that: +# T1 is cv(1,0) pointer to cv(1,1) pointer to ... cv(1,n-1) +# pointer to cv(1,n) T +# and +# T2 is cv(2,0) pointer to cv(2,1) pointer to ... cv(2,n-1) +# pointer to cv(2,n) T +# where each cv(i,j) is const, volatile, const volatile, or +# nothing. The n-tuple of cv-qualifiers after the first in a pointer +# type, e.g., cv(1,1) , cv(1,2) , ... , cv(1,n) in the pointer type +# T1, is called the cv-qualification signature of the pointer type. An +# expression of type T1 can be converted to type T2 if and only if the +# following conditions are satisfied: +# - the pointer types are similar. +# - for every j > 0, if const is in cv(1,j) then const is in cv(2,j) , +# and similarly for volatile. +# - if the cv(1,j) and cv(2,j) are different, then const is in every +# cv(2,k) for 0 < k < j. + +It is the last rule that your code violates. The standard gives then +the following example as a rationale: + +# [Note: if a program could assign a pointer of type T** to a pointer +# of type const T** (that is, if line //1 below was allowed), a +# program could inadvertently modify a const object (as it is done on +# line //2). For example, +# int main() { +# const char c = 'c'; +# char* pc; +# const char** pcc = &pc; //1: not allowed +# *pcc = &c; +# *pc = 'C'; //2: modifies a const object +# } +# - end note] + +If you question this line of reasoning, please discuss it in one of +the public C++ fora first, eg. comp.lang.c++.moderated, or +comp.std.c++. + + +cpp removes blank lines +----------------------- + +With the new cpp, you need to add -traditional to the "cpp -P" args, else +blank lines get removed. + +[EDIT ME: scan Debian bug reports and write some nice summaries ...] --- gcc-4.7-4.7.2.orig/debian/libmudflapMF.postinst +++ gcc-4.7-4.7.2/debian/libmudflapMF.postinst @@ -0,0 +1,12 @@ +#! /bin/sh + +set -e + +case "$1" in configure) + if [ -d /usr/share/doc/libmudflap@MF@ ] && [ ! -h /usr/share/doc/libmudflap@MF@ ]; then + rm -rf /usr/share/doc/libmudflap@MF@ + ln -s gcc-@BV@-base /usr/share/doc/libmudflap@MF@ + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/libgcj-doc.doc-base +++ gcc-4.7-4.7.2/debian/libgcj-doc.doc-base @@ -0,0 +1,10 @@ +Document: libgcj-doc +Title: The GNU LibGCJ Classpath library +Author: Various +Abstract: Autogenerated documentation describing the libgcj + library (GCC 4.7), based on the classpath library. +Section: Programming/Java + +Format: html +Index: /usr/share/doc/gcj-4.7-base/api/index.html +Files: /usr/share/doc/gcj-4.7-base/api/*.html --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.amd64 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.amd64 @@ -0,0 +1,7 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.qf" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/rules.unpack +++ gcc-4.7-4.7.2/debian/rules.unpack @@ -0,0 +1,257 @@ +# -*- makefile -*- +# rules to unpack the source tarballs in $(srcdir); if the source dir already +# exists, the rule exits with an error to prevent deletion of modified +# source files. It has to be deleted manually. + +tarballs = $(gcc_tarball) # $(gcj_tarball) +ifeq ($(with_d),yes) + tarballs += $(gdc_tarball) +endif + +unpack_stamps = $(foreach i,$(tarballs),$(unpack_stamp)-$(i)) + +unpack: stamp-dir $(unpack_stamp) debian-chmod +$(unpack_stamp): $(unpack_stamps) +$(unpack_stamp): $(foreach p,$(debian_tarballs),unpacked-$(p)) + echo -e "\nBuilt from Debian source package $(PKGSOURCE)-$(SOURCE_VERSION)" \ + > pxxx + echo -e "Integrated upstream packages in this version:\n" >> pxxx + for i in $(tarballs); do echo " $$i" >> pxxx; done + mv -f pxxx $@ + +debian-chmod: + @chmod 755 debian/dh_* + +# --------------------------------------------------------------------------- + +gfdl_texinfo_files = \ + gcc/doc/arm-neon-intrinsics.texi \ + gcc/doc/bugreport.texi \ + gcc/doc/c-tree.texi \ + gcc/doc/cfg.texi \ + gcc/doc/collect2.texi \ + gcc/doc/compat.texi \ + gcc/doc/configfiles.texi \ + gcc/doc/configterms.texi \ + gcc/doc/contrib.texi \ + gcc/doc/contribute.texi \ + gcc/doc/cpp.texi \ + gcc/doc/cppenv.texi \ + gcc/doc/cppinternals.texi \ + gcc/doc/cppopts.texi \ + gcc/doc/extend.texi \ + gcc/doc/fragments.texi \ + gcc/doc/frontends.texi \ + gcc/doc/gccint.texi \ + gcc/doc/gcov.texi \ + gcc/doc/generic.texi \ + gcc/doc/gimple.texi \ + gcc/doc/gnu.texi \ + gcc/doc/gty.texi \ + gcc/doc/headerdirs.texi \ + gcc/doc/hostconfig.texi \ + gcc/doc/implement-c.texi \ + gcc/doc/implement-cxx.texi \ + gcc/doc/install-old.texi \ + gcc/doc/install.texi \ + gcc/doc/interface.texi \ + gcc/doc/invoke.texi \ + gcc/doc/languages.texi \ + gcc/doc/libgcc.texi \ + gcc/doc/loop.texi \ + gcc/doc/lto.texi \ + gcc/doc/makefile.texi \ + gcc/doc/md.texi \ + gcc/doc/objc.texi \ + gcc/doc/options.texi \ + gcc/doc/passes.texi \ + gcc/doc/plugins.texi \ + gcc/doc/portability.texi \ + gcc/doc/rtl.texi \ + gcc/doc/service.texi \ + gcc/doc/sourcebuild.texi \ + gcc/doc/standards.texi \ + gcc/doc/tm.texi.in \ + gcc/doc/tm.texi \ + gcc/doc/tree-ssa.texi \ + gcc/doc/trouble.texi \ + gcc/doc/include/gcc-common.texi \ + gcc/doc/include/funding.texi \ + gcc/fortran/gfc-internals.texi \ + gcc/fortran/invoke.texi \ + gcc/fortran/intrinsic.texi \ + + +gfdl_toplevel_texinfo_files = \ + gcc/doc/gcc.texi \ + gcc/java/gcj.texi \ + gcc/ada/gnat-style.texi \ + gcc/ada/gnat_rm.texi \ + gcc/ada/gnat_ugn.texi \ + gcc/fortran/gfortran.texi \ + gcc/go/gccgo.texi \ + libgomp/libgomp.texi \ + libquadmath/libquadmath.texi \ + +gfdl_manpages = \ + gcc/doc/cpp.1 \ + gcc/doc/g++.1 \ + gcc/doc/gc-analyze.1 \ + gcc/doc/gcc.1 \ + gcc/doc/gccgo.1 \ + gcc/doc/gcj.1 \ + gcc/doc/gcj-dbtool.1 \ + gcc/doc/gcjh.1 \ + gcc/doc/gcov.1 \ + gcc/doc/gfortran.1 \ + gcc/doc/gij.1 \ + gcc/doc/grmic.1 \ + gcc/doc/grmiregistry.1 \ + gcc/doc/jcf-dump.1 \ + gcc/doc/jv-convert.1 \ + gcc/doc/fsf-funding.7 \ + +# --------------------------------------------------------------------------- +$(unpack_stamp)-$(gcc_tarball): $(gcc_tarpath) + : # unpack gcc tarball + -mkdir $(stampdir) + if [ -d $(srcdir) ]; then \ + echo >&2 "Source directory $(srcdir) exists. Delete by hand"; \ + false; \ + fi + rm -rf $(gcc_srcdir) + case $(gcc_tarball) in \ + *.bz2) tar -x --bzip2 -f $(gcc_tarpath);; \ + *.gz) tar -x --gzip -f $(gcc_tarpath);; \ + *.lzma) lzcat $(gcc_tarpath) | tar -x -f -;; \ + *.xz) xzcat $(gcc_tarpath) | tar -x -f -;; \ + *) false; \ + esac + mv $(gcc_srcdir) $(srcdir) +ifneq (,$(wildcard java-class-files.tar.xz.uue)) +# work around #533356 +# uudecode -o - java-class-files.tar.xz.uue | tar -C src -xvz + uudecode java-class-files.tar.xz.uue + xzcat java-class-files.tar.xz | tar -C src -xv -f - + rm -f java-class-files.tar.xz +endif +#ifeq ($(with_java),yes) +# tar -x -C $(srcdir)/libjava/testsuite/libmauve.exp \ +# $(wildcard /usr/src/mauve*.tar.*) +#endif +ifeq (0,1) + cd $(srcdir) && tar cfj ../gcc-4.1.1-doc.tar.bz2 \ + $(gfdl_texinfo_files) \ + $(gfdl_toplevel_texinfo_files) \ + $(gfdl_manpages) +endif +ifeq ($(GFDL_INVARIANT_FREE),yes) + ifneq ($(single_package),yes) + rm -f $(srcdir)/gcc/doc/*.1 + rm -f $(srcdir)/gcc/doc/fsf-funding.7 + rm -f $(srcdir)/gcc/doc/*.info + rm -f $(srcdir)/gcc/fortran/*.info + rm -f $(srcdir)/libgomp/*.info + rm -f $(srcdir)/gcc/java/*.1 + rm -f $(srcdir)/gcc/java/*.info + for i in $(gfdl_texinfo_files); do \ + if [ -f $(srcdir)/$$i ]; then \ + cp $(SOURCE_DIR)debian/dummy.texi $(srcdir)/$$i; \ + else \ + echo >&2 "$$i does not exist, fix debian/rules.unpack"; \ + fi; \ + done + for i in $(gfdl_toplevel_texinfo_files); do \ + n=$$(basename $$i .texi); \ + if [ -f $(srcdir)/$$i ]; then \ + sed "s/@name@/$$n/g" $(SOURCE_DIR)debian/gcc-dummy.texi \ + > $(srcdir)/$$i; \ + else \ + echo >&2 "$$i does not exist, fix debian/rules.unpack"; \ + fi; \ + done + for i in $(gfdl_manpages); do \ + touch $(srcdir)/$$i; \ + done + rm -f $(srcdir)/INSTALL/*.html + endif +endif + echo "$(gcc_tarball) unpacked." > $@ + +# --------------------------------------------------------------------------- +ifneq (,$(gcj_tarball)) +$(unpack_stamp)-$(gcj_tarball): $(gcj_tarpath) $(unpack_stamp)-$(gcc_tarball) + : # unpack gcj tarball + rm -rf $(srcdir)/gcc/java $(srcdir)/libjava + tar -x -C $(srcdir) -f $(gcj_tarpath) +ifeq ($(GFDL_INVARIANT_FREE),yes) + ifneq ($(single_package),yes) + rm -f $(srcdir)/gcc/java/*.1 + rm -f $(srcdir)/gcc/java/*.info + for i in $(gfdl_texinfo_files); do \ + if [ -f $(srcdir)/$$i ]; then \ + cp $(SOURCE_DIR)debian/dummy.texi $(srcdir)/$$i; \ + else \ + echo >&2 "$$i does not exist, fix debian/rules.unpack"; \ + fi; \ + done + for i in $(gfdl_toplevel_texinfo_files); do \ + n=$$(basename $$i .texi); \ + if [ -f $(srcdir)/$$i ]; then \ + sed "s/@name@/$$n/g" $(SOURCE_DIR)debian/gcc-dummy.texi \ + > $(srcdir)/$$i; \ + else \ + echo >&2 "$$i does not exist, fix debian/rules.unpack"; \ + fi; \ + done + endif +endif + echo "$(gcj_tarball) unpacked." > $@ +endif + +# --------------------------------------------------------------------------- +ifneq (,$(gdc_tarball)) +$(unpack_stamp)-$(gdc_tarball): $(gdc_tarpath) + ifneq ($(with_libphobos),yes) + echo >&2 "libphobos v2 needs porting: $(with_libphobos)" + false + endif + : # unpack gdc tarball + -mkdir $(stampdir) + if [ -d $(srcdir)/gcc/d ]; then \ + echo >&2 "Source directory $(srcdir)/gcc/d exists. Delete by hand";\ + false; \ + fi + #rm -rf $(gdc_srcdir) + rm -rf d + case $(gdc_tarball) in \ + *.bz2) tar -x --bzip2 -f $(gdc_tarpath);; \ + *.gz) tar -x --gzip -f $(gdc_tarpath);; \ + *.lzma) lzcat $(gdc_tarpath) | tar -x -f -;; \ + *.xz) xzcat $(gdc_tarpath) | tar -x -f -;; \ + *) false; \ + esac + if [ -d d ]; then \ + mv d $(srcdir)/gcc/. ; \ + else \ + mv $(gdc_srcdir)/d $(srcdir)/gcc/. ; \ + rm -rf $(gdc_srcdir)/CVS; \ + rmdir $(gdc_srcdir); \ + fi + ifeq ($(with_libphobos),yes) + [ -d $(srcdir)/libphobos ] && rm -rf $(srcdir)/libphobos || true + mkdir $(srcdir)/libphobos && \ + cd $(srcdir)/libphobos && \ + ../symlink-tree ../gcc/d/phobos$(libphobos_version) 2>&1 && \ + cd $(srcdir) + endif + ifeq ($(libphobos_version),2) + cd $(srcdir)/libphobos && \ + ../symlink-tree ../gcc/d/druntime 2>&1 && \ + cd $(srcdir) + echo "D_LANGUAGE_VERSION=2" > $(srcdir)/gcc/d/d-make-include + else + echo "D_LANGUAGE_VERSION=1" > $(srcdir)/gcc/d/d-make-include + endif + echo "$(gdc_tarball) unpacked." > $@ +endif --- gcc-4.7-4.7.2.orig/debian/libgnatvsnBV.overrides +++ gcc-4.7-4.7.2/debian/libgnatvsnBV.overrides @@ -0,0 +1 @@ +libgnatvsn@BV@ binary: missing-dependency-on-libc --- gcc-4.7-4.7.2.orig/debian/libgcj-common.postinst +++ gcc-4.7-4.7.2/debian/libgcj-common.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libgcj-common + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcj-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/lib64gcc1.symbols.mipsel +++ gcc-4.7-4.7.2/debian/lib64gcc1.symbols.mipsel @@ -0,0 +1,1749 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.2.0 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4 + GCC_4.5.0@GCC_4.5.0 1:4.5 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addda3@GCC_4.3.0 1:4.3 + __adddf3@GCC_3.0 1:4.1.1 + __adddq3@GCC_4.3.0 1:4.3 + __addha3@GCC_4.3.0 1:4.3 + __addhq3@GCC_4.3.0 1:4.3 + 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1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhata@GCC_4.3.0 1:4.3 + __satfractuhatq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhauta2@GCC_4.3.0 1:4.3 + __satfractuhautq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhqta@GCC_4.3.0 1:4.3 + __satfractuhqtq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractuhquta@GCC_4.3.0 1:4.3 + __satfractuhqutq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdita@GCC_4.3.0 1:4.3 + __satfractunsditq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunsdiuta@GCC_4.3.0 1:4.3 + __satfractunsdiutq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshita@GCC_4.3.0 1:4.3 + __satfractunshitq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunshiuta@GCC_4.3.0 1:4.3 + __satfractunshiutq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqita@GCC_4.3.0 1:4.3 + __satfractunsqitq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunsqiuta@GCC_4.3.0 1:4.3 + __satfractunsqiutq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssita@GCC_4.3.0 1:4.3 + __satfractunssitq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractunssiuta@GCC_4.3.0 1:4.3 + __satfractunssiutq@GCC_4.3.0 1:4.3 + __satfractunstida@GCC_4.3.0 1:4.3 + __satfractunstidq@GCC_4.3.0 1:4.3 + __satfractunstiha@GCC_4.3.0 1:4.3 + __satfractunstihq@GCC_4.3.0 1:4.3 + __satfractunstiqq@GCC_4.3.0 1:4.3 + __satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusata@GCC_4.3.0 1:4.3 + __satfractusatq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusauta2@GCC_4.3.0 1:4.3 + __satfractusautq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusqta@GCC_4.3.0 1:4.3 + __satfractusqtq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 1:4.3 + __satfractutqta@GCC_4.3.0 1:4.3 + __satfractutqtq@GCC_4.3.0 1:4.3 + __satfractutquda@GCC_4.3.0 1:4.3 + __satfractutqudq2@GCC_4.3.0 1:4.3 + __satfractutquha@GCC_4.3.0 1:4.3 + __satfractutquhq2@GCC_4.3.0 1:4.3 + __satfractutquqq2@GCC_4.3.0 1:4.3 + __satfractutqusa@GCC_4.3.0 1:4.3 + __satfractutqusq2@GCC_4.3.0 1:4.3 + __satfractutquta@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssaddta3@GCC_4.3.0 1:4.3 + __ssaddtq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssashlta3@GCC_4.3.0 1:4.3 + __ssashltq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssdivta3@GCC_4.3.0 1:4.3 + __ssdivtq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssmulta3@GCC_4.3.0 1:4.3 + __ssmultq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __ssnegta2@GCC_4.3.0 1:4.3 + __ssnegtq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __sssubta3@GCC_4.3.0 1:4.3 + __sssubtq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 1:4.3 + __subhq3@GCC_4.3.0 1:4.3 + __subqq3@GCC_4.3.0 1:4.3 + __subsa3@GCC_4.3.0 1:4.3 + __subsf3@GCC_3.0 1:4.1.1 + __subsq3@GCC_4.3.0 1:4.3 + __subta3@GCC_4.3.0 1:4.3 + __subtf3@GCC_3.0 1:4.1.1 + __subtq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subuta3@GCC_4.3.0 1:4.3 + __subutq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_8@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_8@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_synchronize@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_8@GCC_4.4.0 1:4.4 + __truncdfsf2@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_3.0 1:4.1.1 + __trunctfsf2@GCC_3.0 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __udivuta3@GCC_4.3.0 1:4.3 + __udivutq3@GCC_4.3.0 1:4.3 + __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __unordtf2@GCC_4.5.0 1:4.5 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usadduta3@GCC_4.3.0 1:4.3 + __usaddutq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usashluta3@GCC_4.3.0 1:4.3 + __usashlutq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usdivuta3@GCC_4.3.0 1:4.3 + __usdivutq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usmuluta3@GCC_4.3.0 1:4.3 + __usmulutq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __usneguta2@GCC_4.3.0 1:4.3 + __usnegutq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 + __ussubuta3@GCC_4.3.0 1:4.3 + __ussubutq3@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.2.orig/debian/libitm1.symbols +++ gcc-4.7-4.7.2/debian/libitm1.symbols @@ -0,0 +1,4 @@ +libitm.so.1 libitm1 #MINVER# +#include "libitm1.symbols.common" +(arch=!alpha !amd64 !ia64 !ppc64 !s390x !sparc64 !kfreebsd-amd64)#include "libitm1.symbols.32bit" +(arch=alpha amd64 ia64 ppc64 s390x sparc64 kfreebsd-amd64)#include "libitm1.symbols.64bit" --- gcc-4.7-4.7.2.orig/debian/libmudflap.copyright +++ gcc-4.7-4.7.2/debian/libmudflap.copyright @@ -0,0 +1,30 @@ +This package was debianized by Matthias Klose on +Mon, 5 Jul 2004 21:29:57 +0200 + +Mudflap is part of GCC. + +Authors: Frank Ch. Eigler , Graydon Hoare + +Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +In addition to the permissions in the GNU General Public License, the +Free Software Foundation gives you unlimited permission to link the +compiled version of this file into combinations with other programs, +and to distribute those combinations without any restriction coming +from the use of this file. (The General Public License restrictions +do apply in other respects; for example, they cover modification of +the file, and distribution when not linked into a combine +executable.) + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License can be found in `/usr/share/common-licenses/GPL'. --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.armel +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.armel @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.2.orig/debian/lib64stdc++CXX.postinst +++ gcc-4.7-4.7.2/debian/lib64stdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib64stdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.amd64 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.amd64 @@ -0,0 +1,147 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtc3@GCC_4.3.0 1:4.4.0 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __gttf2@GCC_4.3.0 1:4.4.0 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __lttf2@GCC_4.3.0 1:4.4.0 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multc3@GCC_4.3.0 1:4.4.0 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __netf2@GCC_4.3.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powitf2@GCC_4.3.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.2.orig/debian/lib32itm1.symbols +++ gcc-4.7-4.7.2/debian/lib32itm1.symbols @@ -0,0 +1,3 @@ +libitm.so.1 lib32itm1 #MINVER# +#include "libitm1.symbols.common" +#include "libitm1.symbols.32bit" --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.powerpc +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.powerpc @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.2.orig/debian/gcc-BV-multilib.overrides +++ gcc-4.7-4.7.2/debian/gcc-BV-multilib.overrides @@ -0,0 +1 @@ +gcc-@BV@-multilib binary: binary-from-other-architecture --- gcc-4.7-4.7.2.orig/debian/libgcc2.symbols.m68k +++ gcc-4.7-4.7.2/debian/libgcc2.symbols.m68k @@ -0,0 +1,158 @@ +libgcc_s.so.2 libgcc2 #MINVER# + GCC_3.0@GCC_3.0 4.2.1 + GCC_3.3.1@GCC_3.3.1 4.2.1 + GCC_3.3.4@GCC_3.3.4 4.4.5 + GCC_3.3@GCC_3.3 4.2.1 + GCC_3.4.2@GCC_3.4.2 4.2.1 + GCC_3.4@GCC_3.4 4.2.1 + GCC_4.0.0@GCC_4.0.0 4.2.1 + GCC_4.2.0@GCC_4.2.0 4.2.1 + GCC_4.3.0@GCC_4.3.0 4.3.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 4.2.1 + _Unwind_Backtrace@GCC_3.3 4.2.1 + _Unwind_DeleteException@GCC_3.0 4.2.1 + _Unwind_FindEnclosingFunction@GCC_3.3 4.2.1 + _Unwind_Find_FDE@GCC_3.0 4.2.1 + _Unwind_ForcedUnwind@GCC_3.0 4.2.1 + _Unwind_GetCFA@GCC_3.3 4.2.1 + _Unwind_GetDataRelBase@GCC_3.0 4.2.1 + _Unwind_GetGR@GCC_3.0 4.2.1 + _Unwind_GetIP@GCC_3.0 4.2.1 + _Unwind_GetIPInfo@GCC_4.2.0 4.2.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 4.2.1 + _Unwind_GetRegionStart@GCC_3.0 4.2.1 + _Unwind_GetTextRelBase@GCC_3.0 4.2.1 + _Unwind_RaiseException@GCC_3.0 4.2.1 + _Unwind_Resume@GCC_3.0 4.2.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 4.2.1 + _Unwind_SetGR@GCC_3.0 4.2.1 + _Unwind_SetIP@GCC_3.0 4.2.1 + __absvdi2@GCC_3.0 4.2.1 + __absvsi2@GCC_3.0 4.2.1 + __adddf3@GCC_3.0 4.4.5 + __addsf3@GCC_3.0 4.4.5 + __addvdi3@GCC_3.0 4.2.1 + __addvsi3@GCC_3.0 4.2.1 + __addxf3@GCC_3.0 4.4.5 + __ashldi3@GCC_3.0 4.2.1 + __ashrdi3@GCC_3.0 4.2.1 + __bswapdi2@GCC_4.3.0 4.3.0 + __bswapsi2@GCC_4.3.0 4.3.0 + __clear_cache@GCC_3.0 4.2.1 + __clzdi2@GCC_3.4 4.2.1 + __clzsi2@GCC_3.4 4.2.1 + __cmpdi2@GCC_3.0 4.2.1 + __ctzdi2@GCC_3.4 4.2.1 + __ctzsi2@GCC_3.4 4.2.1 + __deregister_frame@GLIBC_2.0 4.2.1 + __deregister_frame_info@GLIBC_2.0 4.2.1 + __deregister_frame_info_bases@GCC_3.0 4.2.1 + __divdc3@GCC_4.0.0 4.2.1 + __divdf3@GCC_3.0 4.4.5 + __divdi3@GLIBC_2.0 4.2.1 + __divsc3@GCC_4.0.0 4.2.1 + __divsf3@GCC_3.0 4.4.5 + __divsi3@GCC_3.0 4.4.5 + __divxc3@GCC_4.0.0 4.2.1 + __divxf3@GCC_3.0 4.4.5 + __emutls_get_address@GCC_4.3.0 4.3.0 + __emutls_register_common@GCC_4.3.0 4.3.0 + __enable_execute_stack@GCC_3.4.2 4.2.1 + __eqdf2@GCC_3.0 4.4.5 + __eqsf2@GCC_3.0 4.4.5 + __eqxf2@GCC_3.0 4.4.5 + __extenddfxf2@GCC_3.0 4.4.5 + __extendsfdf2@GCC_3.0 4.4.5 + __extendsfxf2@GCC_3.0 4.4.5 + __ffsdi2@GCC_3.0 4.2.1 + __ffssi2@GCC_4.3.0 4.3.0 + __fixdfdi@GCC_3.0 4.2.1 + __fixdfsi@GCC_3.0 4.4.5 + __fixsfdi@GCC_3.0 4.2.1 + __fixsfsi@GCC_3.0 4.4.5 + __fixunsdfdi@GCC_3.0 4.2.1 + __fixunsdfsi@GCC_3.0 4.2.1 + __fixunssfdi@GCC_3.0 4.2.1 + __fixunssfsi@GCC_3.0 4.2.1 + __fixunsxfdi@GCC_3.0 4.2.1 + __fixunsxfsi@GCC_3.0 4.2.1 + __fixxfdi@GCC_3.0 4.2.1 + __fixxfsi@GCC_3.0 4.4.5 + __floatdidf@GCC_3.0 4.2.1 + __floatdisf@GCC_3.0 4.2.1 + __floatdixf@GCC_3.0 4.2.1 + __floatsidf@GCC_3.0 4.4.5 + __floatsisf@GCC_3.0 4.4.5 + __floatsixf@GCC_3.0 4.4.5 + __floatundidf@GCC_4.2.0 4.2.1 + __floatundisf@GCC_4.2.0 4.2.1 + __floatundixf@GCC_4.2.0 4.2.1 + __floatunsidf@GCC_4.2.0 4.4.5 + __floatunsisf@GCC_4.2.0 4.4.5 + __floatunsixf@GCC_4.2.0 4.4.5 + __frame_state_for@GLIBC_2.0 4.2.1 + __gcc_personality_v0@GCC_3.3.1 4.2.1 + __gedf2@GCC_3.0 4.4.5 + __gesf2@GCC_3.0 4.4.5 + __gexf2@GCC_3.0 4.4.5 + __gtdf2@GCC_3.0 4.4.5 + __gtsf2@GCC_3.0 4.4.5 + __gtxf2@GCC_3.0 4.4.5 + __ledf2@GCC_3.0 4.4.5 + __lesf2@GCC_3.0 4.4.5 + __lexf2@GCC_3.0 4.4.5 + __lshrdi3@GCC_3.0 4.2.1 + __ltdf2@GCC_3.0 4.4.5 + __ltsf2@GCC_3.0 4.4.5 + __ltxf2@GCC_3.0 4.4.5 + __moddi3@GLIBC_2.0 4.2.1 + __modsi3@GCC_3.0 4.4.5 + __muldc3@GCC_4.0.0 4.2.1 + __muldf3@GCC_3.0 4.4.5 + __muldi3@GCC_3.0 4.2.1 + __mulsc3@GCC_4.0.0 4.2.1 + __mulsf3@GCC_3.0 4.4.5 + __mulsi3@GCC_3.0 4.4.5 + __mulvdi3@GCC_3.0 4.2.1 + __mulvsi3@GCC_3.0 4.2.1 + __mulxc3@GCC_4.0.0 4.2.1 + __mulxf3@GCC_3.0 4.4.5 + __nedf2@GCC_3.0 4.4.5 + __negdf2@GCC_3.0 4.4.5 + __negdi2@GCC_3.0 4.2.1 + __negsf2@GCC_3.0 4.4.5 + __negvdi2@GCC_3.0 4.2.1 + __negvsi2@GCC_3.0 4.2.1 + __negxf2@GCC_3.0 4.4.5 + __nesf2@GCC_3.0 4.4.5 + __nexf2@GCC_3.0 4.4.5 + __paritydi2@GCC_3.4 4.2.1 + __paritysi2@GCC_3.4 4.2.1 + __popcountdi2@GCC_3.4 4.2.1 + __popcountsi2@GCC_3.4 4.2.1 + __powidf2@GCC_4.0.0 4.2.1 + __powisf2@GCC_4.0.0 4.2.1 + __powixf2@GCC_4.0.0 4.2.1 + __register_frame@GLIBC_2.0 4.2.1 + __register_frame_info@GLIBC_2.0 4.2.1 + __register_frame_info_bases@GCC_3.0 4.2.1 + __register_frame_info_table@GLIBC_2.0 4.2.1 + __register_frame_info_table_bases@GCC_3.0 4.2.1 + __register_frame_table@GLIBC_2.0 4.2.1 + __subdf3@GCC_3.0 4.4.5 + __subsf3@GCC_3.0 4.4.5 + __subvdi3@GCC_3.0 4.2.1 + __subvsi3@GCC_3.0 4.2.1 + __subxf3@GCC_3.0 4.4.5 + __truncdfsf2@GCC_3.0 4.4.5 + __truncxfdf2@GCC_3.0 4.4.5 + __truncxfsf2@GCC_3.0 4.4.5 + __ucmpdi2@GCC_3.0 4.2.1 + __udivdi3@GLIBC_2.0 4.2.1 + __udivmoddi4@GCC_3.0 4.2.1 + __udivsi3@GCC_3.0 4.4.5 + __umoddi3@GLIBC_2.0 4.2.1 + __umodsi3@GCC_3.0 4.4.5 + __unorddf2@GCC_3.3.4 4.4.5 + __unordsf2@GCC_3.3.4 4.4.5 --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.kfreebsd-i386 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.kfreebsd-i386 @@ -0,0 +1,135 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.2.orig/debian/libstdc++CXX.postinst +++ gcc-4.7-4.7.2/debian/libstdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libstdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/lib32gfortran3.symbols.s390x +++ gcc-4.7-4.7.2/debian/lib32gfortran3.symbols.s390x @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.2.orig/debian/gnat.1 +++ gcc-4.7-4.7.2/debian/gnat.1 @@ -0,0 +1,43 @@ +.\" Hey, Emacs! This is an -*- nroff -*- source file. +.\" +.\" Copyright (C) 1996 Erick Branderhorst +.\" Copyright (C) 2011 Nicolas Boulenguez +.\" +.\" This is free software; you can redistribute it and/or modify it under +.\" the terms of the GNU General Public License as published by the Free +.\" Software Foundation; either version 2, or (at your option) any later +.\" version. +.\" +.\" This is distributed in the hope that it will be useful, but WITHOUT +.\" ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +.\" FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +.\" for more details. +.\" +.\" You should have received a copy of the GNU General Public License with +.\" your Debian GNU/Linux system, in /usr/doc/copyright/GPL, or with the +.\" dpkg source package as the file COPYING. If not, write to the Free +.\" Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +.\" +.\" +.TH "GNAT TOOLBOX" 1 "Jun 2002" "Debian Project" "Debian Linux" +.SH NAME +gnat, gnatbind, gnatbl, gnatchop, gnatfind, gnathtml, gnatkr, gnatlink, +gnatls, gnatmake, gnatprep, gnatpsta, gnatpsys, gnatxref \- +GNAT toolbox +.SH DESCRIPTION +Those programs are part of GNU GNAT, a freely available Ada 95 compiler. +.PP +For accessing the full GNAT manuals, use +.B info gnat-ug-4.7 +and +.B info gnat-rm-4.7 +for the sections related to the reference manual. +If those sections cannot be found, you will have to install the +gnat-4.4-doc package as well (since these manuals contain invariant parts, +the package is located in the non-free part of the Debian archive). +You may also browse +.B http://gcc.gnu.org/onlinedocs +which provides the GCC online documentation. +.SH AUTHOR +This manpage has been written by Samuel Tardieu , for the +Debian GNU/Linux project. --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.sparc +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.sparc @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.2.orig/debian/NEWS.gcc +++ gcc-4.7-4.7.2/debian/NEWS.gcc @@ -0,0 +1,910 @@ +GCC 4.7 Release Series -- Changes, New Features, and Fixes +========================================================== + + +Caveats +======= + + - The -fconserve-space flag has been deprecated. The flag had no + effect for most targets: only targets without a global .bss + section and without support for switchable sections. Furthermore, + the flag only had an effect for G++, where it could result in + wrong semantics (please refer to the GCC manual for further + details). The flag will be removed in GCC 4.8. + + - Support for a number of older systems and recently unmaintained or + untested target ports of GCC has been declared obsolete in GCC 4.7. + Unless there is activity to revive them, the next release of GCC + will have their sources permanently removed. + + - All GCC ports for the following processor architectures have been + declared obsolete: + + - picoChip (picochip-*) + + The following ports for individual systems on particular + architectures have been obsoleted: + + - IRIX 6.5 (mips-sgi-irix6.5) + - MIPS OpenBSD (mips*-*-openbsd*) + - Solaris 8 (*-*-solaris2.8). Details can be found in the announcement. + - Tru64 UNIX V5.1 (alpha*-dec-osf5.1*) + + - On ARM, when compiling for ARMv6 (but not ARMv6-M), ARMv7-A, + ARMv7-R, or ARMv7-M, the new option -munaligned-access is active by + default, which for some source codes generates code that accesses + memory on unaligned addresses. This will require the kernel of + those systems to enable such accesses (controlled by CP15 register + c1, refer to ARM documentation). Alternatively or for compatibility + with kernels where unaligned accesses are not supported, all code + has to be compiled with -mno-unaligned-access. Linux/ARM in + official releases has automatically and unconditionally supported + unaligned accesses as emitted by GCC due to this option being + active, since Linux version 2.6.28. + + - Support on ARM for the legacy floating-point accelerator (FPA) and + the mixed-endian floating-point format that it used has been + obsoleted. The ports that still use this format have been obsoleted + as well. Many legacy ARM ports already provide an alternative that + uses the VFP floating-point format. The obsolete ports will be + deleted in the next release. The obsolete ports with alternatives + are: + + - arm*-*-rtems (use arm*-*-rtemseabi) + - arm*-*-linux-gnu (use arm*-*-linux-gnueabi) + - arm*-*-elf (use arm*-*-eabi) + - arm*-*-uclinux* (use arm*-*-uclinux*eabi) + + Note, however, that these alternatives are not binary compatible + with their legacy counterparts (although some can support running + legacy applications). + + The obsolete ports that currently lack a modern alternative are: + + - arm*-*-ecos-elf + - arm*-*-freebsd + - arm*-wince-pe* + + New ports that support more recent versions of the architecture are + welcome. + + - Support for the Maverick co-processor on ARM has been obsoleted. Code to + support it will be deleted in the next release. + + - Support has been removed for Unix International threads on Solaris 2, + so the --enable-threads=solaris configure option and the -threads + compiler option don't work any longer. + + - Support has been removed for the Solaris BSD Compatibility Package, + which lives in /usr/ucbinclude and /usr/ucblib. It has been removed + from Solaris 11, and was only intended as a migration aid from + SunOS 4 to SunOS 5. The -compat-bsd compiler option is not + recognized any longer. + + - The AVR port's libgcc has been improved and its multilib structure + has been enhanced. As a result, all objects contributing to an + application must either be compiled with GCC versions up to 4.6.x + or with GCC versions 4.7.0 or later. + + - The ARM port's -mwords-little-endian option has been deprecated. It will + be removed in a future release. + + - Support has been removed for the NetWare x86 configuration obsoleted in + GCC 4.6. + + - It is no longer possible to use the "l" constraint in MIPS16 asm statements. + + - GCC versions 4.7.0 and 4.7.1 had changes to the C++ standard + library which affected the ABI in C++11 mode: a data member was + added to std::list changing its size and altering the definitions + of some member functions, and std::pair's move constructor was + non-trivial which altered the calling convention for functions with + std::pair arguments or return types. The ABI incompatibilities have + been fixed for GCC version 4.7.2 but as a result C++11 code + compiled with GCC 4.7.0 or 4.7.1 may be incompatible with C++11 + code compiled with different GCC versions and with C++98/C++03 code + compiled with any version. + + - On ARM, a bug has been fixed in GCC's implementation of the AAPCS + rules for the layout of vectors that could lead to wrong code being + generated. Vectors larger than 8 bytes in size are now by default + aligned to an 8-byte boundary. This is an ABI change: code that + makes explicit use of vector types may be incompatible with binary + objects built with older versions of GCC. Auto-vectorized code is + not affected by this change. (This change affects GCC versions + 4.7.2 and later.) + + - More information on porting to GCC 4.7 from previous versions of GCC can + be found in the porting_guide for this release. + + +General Optimizer Improvements +============================== + + - Support for a new parameter --param case-values-threshold=n was + added to allow users to control the cutoff between doing switch + statements as a series of if statements and using a jump table. + + - Link-time optimization (LTO) improvements: + + - Improved scalability and reduced memory usage. Link time + optimization of Firefox now requires 3GB of RAM on a 64-bit + system, while over 8GB was needed previously. Linking time has + been improved, too. The serial stage of linking Firefox has been + sped up by about a factor of 10. + + - Reduced size of object files and temporary storage used during linking. + + - Streaming performance (both outbound and inbound) has been improved. + + - ld -r is now supported with LTO. + + - Several bug fixes, especially in symbol table handling and merging. + + - Interprocedural optimization improvements: + + - Heuristics now take into account that after inlining code will be + optimized out because of known values (or properties) of function + parameters. For example: + + void foo(int a) + { + if (a > 10) + ... huge code ... + } + void bar (void) + { + foo (0); + } + + The call of foo will be inlined into bar even when optimizing for + code size. Constructs based on __builtin_constant_p are now + understood by the inliner and code size estimates are evaluated a + lot more realistically. + + - The representation of C++ virtual thunks and aliases (both + implicit and defined via the alias attribute) has been + re-engineered. Aliases no longer pose optimization barriers and + calls to an alias can be inlined and otherwise optimized. + + - The inter-procedural constant propagation pass has been + rewritten. It now performs generic function specialization. For + example when compiling the following: + + void foo(bool flag) + { + if (flag) + ... do something ... + else + ... do something else ... + } + void bar (void) + { + foo (false); + foo (true); + foo (false); + foo (true); + foo (false); + foo (true); + } + + GCC will now produce two copies of foo. One with flag being true, + while other with flag being false. This leads to performance + improvements previously possible only by inlining all calls. + Cloning causes a lot less code size growth. + + - A string length optimization pass has been added. It attempts to + track string lengths and optimize various standard C string + functions like strlen, strchr, strcpy, strcat, stpcpy and their + _FORTIFY_SOURCE counterparts into faster alternatives. This pass + is enabled by default at -O2 or above, unless optimizing for + size, and can be disabled by the - fno-optimize-strlen + option. The pass can e.g. optimize + + char *bar (const char *a) + { + size_t l = strlen (a) + 2; + char *p = malloc (l); if (p == NULL) return p; + strcpy (p, a); strcat (p, "/"); return p; + } + + into: + + char *bar (const char *a) + { + size_t tmp = strlen (a); + char *p = malloc (tmp + 2); if (p == NULL) return p; + memcpy (p, a, tmp); memcpy (p + tmp, "/", 2); return p; + } + + or for hosted compilations where stpcpy is available in the runtime + and headers provide its prototype, e.g. + + void foo (char *a, const char *b, const char *c, const char *d) + { + strcpy (a, b); strcat (a, c); strcat (a, d); + } + + can be optimized into: + + void foo (char *a, const char *b, const char *c, const char *d) + { + strcpy (stpcpy (stpcpy (a, b), c), d); + } + + +New Languages and Language specific improvements +================================================ + + - Version 3.1 of the OpenMP_specification is now supported for the C, C++, + and Fortran compilers. + + +Ada +--- + + - The command-line option -feliminate-unused-debug-types has been re- + enabled by default, as it is for the other languages, leading to a + reduction in debug info size of 12.5% and more for relevant cases, + as well as to a small compilation speedup. + + +C family +-------- + + - A new built-in, __builtin_assume_aligned, has been added, through which + the compiler can be hinted about pointer alignment and can use it to + improve generated code. + + - A new -Wunused-local-typedefs warning was added for C, C++, + Objective-C and Objective-C++. This warning diagnoses typedefs + locally defined in a function, and otherwise not used. + + - A new experimental -ftrack-macro-expansion option was added for C, + C++, Objective-C, Objective-C++ and Fortran. It allows the + compiler to emit diagnostic about the current macro expansion + stack when a compilation error occurs in a macro expansion. + + - Experimental support for transactional memory has been added. It includes + support in the compiler, as well as a supporting runtime library called + libitm. To compile code with transactional memory constructs, use the - + fgnu-tm option. + + Support is currently available for Alpha, ARM, PowerPC, SH, SPARC, and + 32-bit/64-bit x86 platforms. + + For more details on transactional memory see the_GCC_WiKi. + + - Support for atomic operations specifying the C++11/C11 memory model has + been added. These new __atomic routines replace the existing __sync + built-in routines. + + Atomic support is also available for memory blocks. Lock-free + instructions will be used if a memory block is the same size and + alignment as a supported integer type. Atomic operations which do not + have lock-free support are left as function calls. A set of library + functions is available on the GCC atomic wiki in the "External Atomics + Library" section. + + For more details on the memory models and features, see the atomic_wiki. + + - When a binary operation is performed on vector types and one of the + operands is a uniform vector, it is possible to replace the vector with + the generating element. For example: + + typedef int v4si __attribute__ ((vector_size (16))); + v4si res, a = {1,2,3,4}; + int x; + + res = 2 + a; /* means {2,2,2,2} + a */ + res = a - x; /* means a - {x,x,x,x} */ + + +C +- + + - There is support for some more features from the C11 revision of the ISO + C standard. GCC now accepts the options -std=c11 and -std=gnu11, in + addition to the previous -std=c1x and -std=gnu1x. + + - Unicode strings (previously supported only with options such as + -std=gnu11, now supported with -std=c11), and the predefined macros + __STDC_UTF_16__ and __STDC_UTF_32__. + + - Nonreturning functions (_Noreturn and ). + + - Alignment support (_Alignas, _Alignof, max_align_t, ). + + - A built-in function __builtin_complex is provided to support C + library implementation of the CMPLX family of macros. + + +C++ +--- + + - G++ now accepts the -std=c++11, -std=gnu++11, and -Wc++11-compat options, + which are equivalent to -std=c++0x, -std=gnu++0x, and -Wc++0x-compat, + respectively. + + - G++ now implements C++11 extended friend syntax: + + template + class Q + { + static const int I = 2; + public: + friend W; + }; + + struct B + { + int ar[Q::I]; + }; + + - Thanks to Ville Voutilainen, G++ now implements C++11 explicit override + control. + + struct B { + virtual void f() const final; + virtual void f(int); + }; + + struct D : B { + void f() const; // error: D::f attempts to + override final B::f + void f(long) override; // error: doesn't override + anything + void f(int) override; // ok + }; + + struct E final { }; + struct F: E { }; // error: deriving from final class + + - G++ now implements C++11 non-static data member initializers. + + struct A { + int i = 42; + } a; // initializes a.i to 42 + + - Thanks to Ed Smith-Rowland, G++ now implements C++11 user-defined + literals. + + // Not actually a good approximation. :) + constexpr long double operator"" _degrees (long double d) + { return d * 0.0175; } + long double pi = 180.0_degrees; + + - G++ now implements C++11 alias-declarations. + + template using Ptr = T*; + Ptr ip; // decltype(ip) is int* + + - Thanks to Ville Voutilainen and Pedro Lamarão, G++ now implements C++11 + delegating constructors. + + struct A { + A(int); + A(): A(42) { } // delegate to the A(int) constructor + }; + + - G++ now fully implements C++11 atomic classes rather than just integer + derived classes. + + class POD { + int a; + int b; + }; + std::atomic my_atomic_POD; + + - G++ now sets the predefined macro __cplusplus to the correct value, + 199711L for C++98/03, and 201103L for C++11. + + - G++ now correctly implements the two-phase lookup rules such that an + unqualified name used in a template must have an appropriate declaration + found either in scope at the point of definition of the template or by + argument-dependent lookup at the point of instantiation. As a result, + code that relies on a second unqualified lookup at the point of + instantiation to find functions declared after the template or in + dependent bases will be rejected. The compiler will suggest ways to fix + affected code, and using the -fpermissive compiler flag will allow the + code to compile with a warning. + + template + void f() { g(T()); } // error, g(int) not found by argument- + dependent lookup + void g(int) { } // fix by moving this declaration before the + declaration of f + + template + struct A: T { + // error, B::g(B) not found by argument-dependent lookup + void f() { g(T()); } // fix by using this->g or A::g + }; + + struct B { void g(B); }; + + int main() + { + f(); + A().f(); + } + + - G++ now properly re-uses stack space allocated for temporary objects when + their lifetime ends, which can significantly lower stack consumption for + some C++ functions. As a result of this, some code with undefined + behavior will now break: + + const int &f(const int &i) { return i; } + .... + const int &x = f(1); + const int &y = f(2); + + Here, x refers to the temporary allocated to hold the 1 argument, which + only lives until the end of the initialization; it immediately becomes a + dangling reference. So the next statement re-uses the stack slot to hold + the 2 argument, and users of x get that value instead. + Note that this should not cause any change of behavior for temporaries of + types with non-trivial destructors, as they are already destroyed at end + of full-expression; the change is that now the storage is released as + well. + + - A new command-line option -Wdelete-non-virtual-dtor has been added to + warn when delete is used to destroy an instance of a class which has + virtual functions and non-virtual destructor. It is unsafe to delete an + instance of a derived class through a pointer to a base class if the base + class does not have a virtual destructor. This warning is enabled by -Wall. + + - A new command-line option -Wzero-as-null-pointer-constant has been added + to warn when a literal '0' is used as null pointer constant. It can be + useful to facilitate the conversion to nullptr in C++11. + + - As per C++98, access-declarations are now deprecated by G++. Using- + declarations are to be used instead. Furthermore, some efforts have been + made to improve the support of class scope using-declarations. In + particular, using-declarations referring to a dependent type now work as + expected (bug_c++/14258). + + - The ELF symbol visibility of a template instantiation is now properly + constrained by the visibility of its template arguments (bug_c++/35688). + + +Runtime Library (libstdc++) +--------------------------- + + - Improved_experimental_support_for_the_new_ISO_C++_standard,_C++11, + including: + + - using noexcept in most of the library; + + - implementations of pointer_traits, allocator_traits and + scoped_allocator_adaptor; + + - uses-allocator construction for tuple; + + - vector meets the allocator-aware container requirements; + + - replacing monotonic_clock with steady_clock; + + - enabling the thread support library on most POSIX targets; + + - many small improvements to conform to the FDIS. + + - Added --enable-clocale=newlib configure option. + + - Debug Mode iterators for unordered associative containers. + + - Avoid polluting the global namespace and do not include . + + +Fortran +------- + + - The compile flag -fstack-arrays has been added, which causes all local + arrays to be put on stack memory. For some programs this will improve the + performance significantly. If your program uses very large local arrays, + it is possible that you will have to extend your runtime limits for stack + memory. + + - The -Ofast flag now also implies -fno-protect-parens and -fstack-arrays. + + - Front-end optimizations can now be selected by the -ffrontend-optimize + option and deselected by the -fno-frontend-optimize option. + + - When front-end optimization removes a function call, -Wfunction- + elimination warns about that. + + - When performing front-end-optimization, the -faggressive-function- + elimination option allows the removal of duplicate function calls even + for impure functions. + + - The flag -Wreal-q-constant has been added, which warns if floating-point + literals have been specified using q (such as 1.0q0); the q marker is now + supported as a vendor extension to denote quad precision (REAL(16) or, if + not available, REAL(10)). Consider using a kind parameter (such as in + 1.0_qp) instead, which can be obtained via SELECTED_REAL_KIND. + + - The GFORTRAN_USE_STDERR environment variable has been removed. GNU + Fortran now always prints error messages to standard error. If you wish + to redirect standard error, please consult the manual for your OS, shell, + batch environment etc. as appropriate. + + - The -fdump-core option and GFORTRAN_ERROR_DUMPCORE environment variable + have been removed. When encountering a serious error, gfortran will now + always abort the program. Whether a core dump is generated depends on the + user environment settings; see the ulimit -c setting for POSIX shells, + limit coredumpsize for C shells, and the WER_user-mode_dumps_settings on + Windows. + + - The -fbacktrace option is now enabled by default. When encountering a + fatal error, gfortran will attempt to print a backtrace to standard error + before aborting. It can be disabled with -fno-backtrace. Note: On POSIX + targets with the addr2line utility from GNU binutils, GNU Fortran can + print a backtrace with function name, file name, line number information + in addition to the addresses; otherwise only the addresses are printed. + + - Fortran_2003: + + - Generic interface names which have the same name as derived types + are now supported, which allows to write constructor functions. + Note that Fortran does not support static constructor functions; + only default initialization or an explicit structure-constructor + initialization are available. + + - Polymorphic (class) arrays are now supported. + + - Fortran_2008: + + - Support for the DO CONCURRENT construct has been added, which + allows the user to specify that individual loop iterations have no + interdependencies. + + - Coarrays: Full single-image support except for polymorphic + coarrays. Additionally, preliminary support for multiple images via + an MPI-based coarray_communication_library has been added. Note: + The library version is not yet usable as remote coarray access is + not yet possible. + + - TS_29113: + + - New flag -std=f2008ts permits programs that are expected to conform + to the Fortran 2008 standard and the draft Technical Specification + (TS) 29113 on Further Interoperability of Fortran with C. + + - The OPTIONAL attribute is now allowed for dummy arguments of BIND + (C) procedures. + + - The RANK intrinsic has been added. + + - The implementation of the ASYNCHRONOUS attribute in GCC is + compatible with the candidate draft of TS 29113 (since GCC 4.6). + + +Go +-- + + - GCC 4.7 implements the Go_1_language_standard. The library support in + 4.7.0 is not quite complete, due to release timing. Release 4.7.1 is + expected to include complete support. + + - Go has been tested on GNU/Linux and Solaris platforms. It may work on + other platforms as well. + + +New Targets and Target Specific Improvements +============================================ + +ARM +--- + + - GCC now supports the Cortex-A7 processor implementing the v7-a version of + the architecture using the option -mcpu=cortex-a7. + + - The default vector size in auto-vectorization for NEON is now 128 bits. + If vectorization fails thusly, the vectorizer tries again with 64-bit + vectors. + + - A new option -mvectorize-with-neon-double was added to allow users to + change the vector size to 64 bits. + + +AVR +--- + + - GCC now supports the XMEGA architecture. This requires GNU binutils 2.22 + or later. + + - Support for the named_address_spaces __flash, __flash1, …, __flash5 and + __memx has been added. These address spaces locate read-only data in + flash memory and allow reading from flash memory by means of ordinary C + code, i.e. without the need of (inline) assembler code: + + const __flash int values[] = { 42, 31 }; + + int add_values (const __flash int *p, int i) + { + return values[i] + *p; + } + + - Support has been added for a new AVR-specific configure option + --with-avrlibc=yes in order to arrange for better integration of + AVR-Libc. This configure option is supported in avr-gcc 4.7.2 and + newer and will only take effect in non-RTEMS configurations. If + avr-gcc is configured for RTEMS, the option will be ignored which is + the same as specifying --with-avrlibc=no. See PR54461 for more + technical details. + + - Support for AVR-specific built-in_functions has been added. + + - Support has been added for the signed and unsigned 24-bit scalar integer + types __int24 and __uint24. + + - New command-line options -maccumulate-args, -mbranch-cost=cost and + -mstrict-X were added to allow better fine-tuning of code optimization. + + - Many optimizations to: + + - 64-bit integer arithmetic + + - Widening multiplication + + - Integer division by a constant + + - Avoid constant reloading in multi-byte instructions. + + - Micro-optimizations for special instruction sequences. + + - Generic built-in functions like __builtin_ffs*, __builtin_clz*, etc. + + - If-else decision trees generated by switch instructions + + - Merging of data located in flash memory + + - New libgcc variants for devices with 8-bit wide stack pointer + + - Better documentation: + + - Handling of EIND and indirect jumps on devices with more than 128 + KiB of program memory. + + - Handling of the RAMPD, RAMPX, RAMPY and RAMPZ special function + registers. + + - Function attributes OS_main and OS_task. + - AVR-specific built-in macros. + + +C6X +--- + + - Support has been added for the Texas Instruments C6X family of processors. + + +CR16 +---- + + - Support has been added for National Semiconductor's CR16 architecture. + + +Epiphany +-------- + + - Support has been added for Adapteva's Epiphany architecture. + + +IA-32/x86-64 +------------ + + - Support for Intel AVX2 intrinsics, built-in functions and code generation + is available via -mavx2. + + - Support for Intel BMI2 intrinsics, built-in functions and code generation + is available via -mbmi2. + + - Implementation and automatic generation of __builtin_clz* using the lzcnt + instruction is available via -mlzcnt. + + - Support for Intel FMA3 intrinsics and code generation is available via + -mfma. + + - A new -mfsgsbase command-line option is available that makes GCC generate + new segment register read/write instructions through dedicated built-ins. + + - Support for the new Intel rdrnd instruction is available via -mrdrnd. + + - Two additional AVX vector conversion instructions are available via + -mf16c. + + - Support for new Intel processor codename IvyBridge with RDRND, FSGSBASE + and F16C is available through -march=core-avx-i. + + - Support for the new Intel processor codename Haswell with AVX2, FMA, BMI, + BMI2, LZCNT is available through -march=core-avx2. + + - Support for new AMD family 15h processors (Piledriver core) is now + available through -march=bdver2 and -mtune=bdver2 options. + + - Support for the_x32_psABI is now available through the -mx32 option. + + - Windows mingw targets are using the -mms-bitfields option by default. + + - Windows x86 targets are using the __thiscall calling convention for C++ + class-member functions. + + - Support for the configure option --with-threads=posix for Windows mingw + targets. + + +MIPS +---- + + - GCC now supports thread-local storage (TLS) for MIPS16. This requires GNU + binutils 2.22 or later. + + - GCC can now generate code specifically for the Cavium Octeon+ and Octeon2 + processors. The associated command-line options are -march=octeon+ and + -march=octeon2 respectively. Both options require GNU binutils 2.22 or + later. + + - GCC can now work around certain 24k errata, under the control of the + command-line option -mfix-24k. These workarounds require GNU binutils + 2.20 or later. + + - 32-bit MIPS GNU/Linux targets such as mips-linux-gnu can now build n32 + and n64 multilibs. The result is effectively a 64-bit GNU/Linux toolchain + that generates 32-bit code by default. Use the configure-time option + --enable-targets=all to select these extra multilibs. + + - Passing -fno-delayed-branch now also stops the assembler from + automatically filling delay slots. + + +PowerPC/PowerPC64 +----------------- + + - Vectors of type vector long long or vector long are passed and returned + using the same method as other vectors with the VSX instruction set. + Previously the GCC compiler did not adhere to the ABI for 128-bit vectors + with 64-bit integer base types (PR 48857). This will also be fixed in the + GCC 4.6.1 and 4.5.4 releases. + + - A new option -mno-pointers-to-nested-functions was added to allow AIX 32- + bit/64-bit and GNU/Linux 64-bit PowerPC users to specify that the + compiler should not load up the chain register (r11) before calling a + function through a pointer. If you use this option, you cannot call + nested functions through a pointer, or call other languages that might + use the static chain. + + - A new option msave-toc-indirect was added to allow AIX 32-bit/64-bit and + GNU/Linux 64-bit PowerPC users control whether we save the TOC in the + prologue for indirect calls or generate the save inline. This can speed + up some programs that call through a function pointer a lot, but it can + slow down other functions that only call through a function pointer in + exceptional cases. + + - The PowerPC port will now enable machine-specific built-in functions when + the user switches the target machine using the #pragma GCC target or + __attribute__ ((__target__ ("target"))) code sequences. In addition, the + target macros are updated. However, due to the way the -save-temps switch + is implemented, you won't see the effect of these additional macros being + defined in preprocessor output. + + +SH +-- + + - A new option -msoft-atomic has been added. When it is specified, GCC will + generate GNU/Linux-compatible gUSA atomic sequences for the new __atomic + routines. + + - Since it is neither supported by GAS nor officially documented, code + generation for little endian SH2A has been disabled. Specifying -ml with + -m2a* will now result in a compiler error. + + - The defunct -mbranch-cost option has been fixed. + + - Some improvements to the generated code of: + + - Utilization of the tst #imm,R0 instruction. + + - Dynamic shift instructions on SH2A. + + - Integer absolute value calculations. + + +SPARC +----- + + - The option -mflat has been reinstated. When it is specified, the compiler + will generate code for a single register window model. This is + essentially a new implementation and the corresponding debugger support + has been added to GDB 7.4. + + - Support for the options -mtune=native and -mcpu=native has been added on + selected native platforms (GNU/Linux and Solaris). + + - Support for the SPARC T3 (Niagara 3) processor has been added. + + - VIS: + + - An intrinsics header visintrin.h has been added. + - Builtin intrinsics for the VIS 1.0 edge handling and pixel compare + instructions have been added. + - The little-endian version of alignaddr is now supported. + - When possible, VIS builtins are marked const, which should increase + the compiler's ability to optimize VIS operations. + - The compiler now properly tracks the %gsr register and how it + behaves as an input for various VIS instructions. + - Akin to fzero, the compiler can now generate fone instructions in + order to set all of the bits of a floating-point register to 1. + - The documentation for the VIS intrinsics in the GCC manual has been + brought up to date and many inaccuracies were fixed. + - Intrinsics for the VIS 2.0 bmask, bshuffle, and non-condition-code + setting edge instructions have been added. Their availability is + controlled by the new -mvis2 and -mno-vis2 options. They are + enabled by default on UltraSPARC-III and later CPUs. + + - Support for UltraSPARC Fused Multiply-Add floating-point extensions has + been added. These instructions are enabled by default on SPARC T3 + (Niagara 3) and later CPUs. + + +TILE-Gx/TILEPro +--------------- + + - Support has been added for the Tilera TILE-Gx and TILEPro families of + processors. + + +Other significant improvements +============================== + + - A new option (-grecord-gcc-switches) was added that appends compiler + command-line options that might affect code generation to the + DW_AT_producer attribute string in the DWARF debugging information. + + - GCC now supports various new GNU extensions to the DWARF debugging + information format, like entry_value and call_site information, typed + DWARF_stack or a_more_compact_macro_representation. Support for these + extensions has been added to GDB 7.4. They can be disabled through the + -gstrict-dwarf command-line option. + + +GCC 4.7.1 +========= + +This is the list of problem reports (PRs) from GCC's bug tracking +system that are known to be fixed in the 4.7.1 release. This list +might not be complete (that is, it is possible that some PRs that have +been fixed are not listed here). + +http://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.7.1 + +The Go frontend in the 4.7.1 release fully supports the Go 1 language +standard (http://weekly.golang.org/doc/go1.html). + + +GCC 4.7.2 +========= + +This is the list of problem reports (PRs) from GCC's bug tracking +system that are known to be fixed in the 4.7.2 release. This list +might not be complete (that is, it is possible that some PRs that have +been fixed are not listed here). + +http://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.7.2 + + +For questions related to the use of GCC, please consult these web +pages and the GCC manuals. If that fails, the gcc-help@gcc.gnu.org +mailing list might help. Please send comments on these web pages and +the development of GCC to our developer list at gcc@gcc.gnu.org. All +of our lists have public archives. + +Copyright (C) Free Software Foundation, Inc. + +Verbatim copying and distribution of this entire article is +permitted in any medium, provided this notice is preserved. + +These pages are maintained_by_the_GCC_team. + +Last modified 2012-03-26. --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.s390x +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.s390x @@ -0,0 +1,110 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_4.1.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.1.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.s390 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.s390 @@ -0,0 +1,104 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/reduce-test-diff.awk +++ gcc-4.7-4.7.2/debian/reduce-test-diff.awk @@ -0,0 +1,33 @@ +#! /usr/bin/gawk -f + +BEGIN { + skip=0 + warn=0 +} + +/^-(FAIL|ERROR|UNRESOLVED|WARNING)/ { + next +} + +# only compare gcc, g++, g77 and objc results +/=== treelang tests ===/ { + skip=1 +} + +# omit extra files appended to test-summary +/^\+Compiler version/ { + skip=1 +} + +skip == 0 { + print + next +} + +/^\+(FAIL|ERROR|UNRESOLVED|WARNING)/ { + warn=1 +} + +END { + exit warn +} --- gcc-4.7-4.7.2.orig/debian/libgomp1.symbols +++ gcc-4.7-4.7.2/debian/libgomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 libgomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- gcc-4.7-4.7.2.orig/debian/gcc-BV-doc.doc-base.gcc +++ gcc-4.7-4.7.2/debian/gcc-BV-doc.doc-base.gcc @@ -0,0 +1,14 @@ +Document: gcc-@BV@ +Title: The GNU C and C++ compiler +Author: Various +Abstract: This manual documents how to run, install and port the GNU compiler, + as well as its new features and incompatibilities, and how to report bugs. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/gcc.html +Files: /usr/share/doc/gcc-@BV@-base/gcc.html + +Format: info +Index: /usr/share/info/gcc-@BV@.info.gz +Files: /usr/share/info/gcc-@BV@* --- gcc-4.7-4.7.2.orig/debian/lib32gfortran3.symbols.amd64 +++ gcc-4.7-4.7.2/debian/lib32gfortran3.symbols.amd64 @@ -0,0 +1,9 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16.powerpc" + _gfortran_norm2_r10@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.7-4.7.2.orig/debian/control.m4 +++ gcc-4.7-4.7.2/debian/control.m4 @@ -0,0 +1,3082 @@ +divert(-1) + +define(`checkdef',`ifdef($1, , `errprint(`error: undefined macro $1 +')m4exit(1)')') +define(`errexit',`errprint(`error: undefined macro `$1' +')m4exit(1)') + +dnl The following macros must be defined, when called: +dnl ifdef(`SRCNAME', , errexit(`SRCNAME')) +dnl ifdef(`PV', , errexit(`PV')) +dnl ifdef(`ARCH', , errexit(`ARCH')) + +dnl The architecture will also be defined (-D__i386__, -D__powerpc__, etc.) + +define(`PN', `$1') +ifdef(`PRI', `', ` + define(`PRI', `$1') +') +define(`MAINTAINER', `Debian GCC Maintainers ') + +define(`ifenabled', `ifelse(index(enabled_languages, `$1'), -1, `dnl', `$2')') + +divert`'dnl +dnl -------------------------------------------------------------------------- +Source: SRCNAME +Section: devel +Priority: PRI(optional) +ifelse(DIST,`Ubuntu',`dnl +ifelse(regexp(SRCNAME, `gnat\|gdc-'),0,`dnl +Maintainer: Ubuntu MOTU Developers +', `dnl +Maintainer: Ubuntu Core developers +')dnl SRCNAME +XSBC-Original-Maintainer: MAINTAINER +', `dnl +Maintainer: MAINTAINER +')dnl DIST +ifelse(regexp(SRCNAME, `gnat'),0,`dnl +Uploaders: Ludovic Brenta +', regexp(SRCNAME, `gdc'),0,`dnl +Uploaders: Iain Buclaw , Matthias Klose +', `dnl +Uploaders: Matthias Klose +')dnl SRCNAME +Standards-Version: 3.9.3 +ifdef(`TARGET',`dnl cross +Build-Depends: DPKG_BUILD_DEP debhelper (>= 5.0.62), LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP LIBUNWIND_BUILD_DEP LIBATOMIC_OPS_BUILD_DEP AUTOGEN_BUILD_DEP AUTO_BUILD_DEP SOURCE_BUILD_DEP CROSS_BUILD_DEP CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP ELF_BUILD_DEP, zlib1g-dev, gawk, lzma, xz-utils, patchutils, BINUTILS_BUILD_DEP, bison (>= 1:2.3), flex, realpath (>= 1.9.12), lsb-release, make (>= 3.81), quilt +',`dnl native +Build-Depends: DPKG_BUILD_DEP debhelper (>= 5.0.62), GCC_MULTILIB_BUILD_DEP LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP AUTO_BUILD_DEP AUTOGEN_BUILD_DEP libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], zlib1g-dev, gawk, lzma, xz-utils, patchutils, BINUTILS_BUILD_DEP, binutils-hppa64 (>= BINUTILSV) [hppa], gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, texinfo (>= 4.3), FORTRAN_BUILD_DEP locales, procps, sharutils, JAVA_BUILD_DEP GNAT_BUILD_DEP GO_BUILD_DEP GDC_BUILD_DEP SPU_BUILD_DEP CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP ELF_BUILD_DEP CHECK_BUILD_DEP realpath (>= 1.9.12), chrpath, lsb-release, make (>= 3.81), quilt +Build-Depends-Indep: LIBSTDCXX_BUILD_INDEP JAVA_BUILD_INDEP +')dnl +Build-Conflicts: binutils-gold +ifelse(regexp(SRCNAME, `gnat'),0,`dnl +Homepage: http://gcc.gnu.org/ +', regexp(SRCNAME, `gdc'),0,`dnl +Homepage: http://bitbucket.org/goshawk/gdc/ +', `dnl +Homepage: http://gcc.gnu.org/ +')dnl SRCNAME +XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc`'PV/ +XS-Vcs-Svn: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc`'PV + +ifelse(regexp(SRCNAME, `gcc-snapshot'),0,`dnl +Package: gcc-snapshot`'TS +Architecture: any +Section: devel +Priority: extra +Depends: binutils`'TS (>= ${binutils:Version}), ${dep:libcbiarchdev}, ${dep:libcdev}, ${dep:libunwinddev}, ${snap:depends}, ${shlibs:Depends}, ${dep:ecj}, python, ${misc:Depends} +Recommends: ${snap:recommends} +Suggests: ${dep:gold} +Provides: c++-compiler`'TS`'ifdef(`TARGET',`',`, c++abi2-dev') +Description: A SNAPSHOT of the GNU Compiler Collection + This package contains a recent development SNAPSHOT of all files + contained in the GNU Compiler Collection (GCC). + . + The source code for this package has been exported from SVN trunk. + . + DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES! + . + This package will NEVER hit the testing distribution. It is used for + tracking gcc bugs submitted to the Debian BTS in recent development + versions of gcc. +',`dnl gcc-X.Y + +dnl default base package dependencies +define(`BASETARGET', `') +define(`BASEDEP', `gcc`'PV-base (= ${gcc:Version})') +define(`SOFTBASEDEP', `gcc`'PV-base (>= ${gcc:SoftVersion})') + +dnl base, when building libgcc out of the gcj source; needed if new symbols +dnl in libgcc are used in libgcj. +ifelse(index(SRCNAME, `gcj'), 0, ` +define(`BASEDEP', `gcj`'PV-base (= ${gcj:Version})') +define(`SOFTBASEDEP', `gcj`'PV-base (>= ${gcj:SoftVersion})') +') + +ifdef(`TARGET', `', ` +ifenabled(`gccbase',` + +Package: gcc`'PV-base +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Section: libs +Priority: PRI(required) +Depends: ${misc:Depends} +Replaces: ${base:Replaces} +Breaks: gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~), gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~), dehydra (<= 0.9.hg20110609-2) +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). +ifdef(`BASE_ONLY', `dnl + . + This version of GCC is not yet available for this architecture. + Please use the compilers from the gcc-snapshot package for testing. +')`'dnl +')`'dnl +')`'dnl native + +ifenabled(`gccxbase',` +dnl override default base package dependencies to cross version +dnl This creates a toolchain that doesnt depend on the system -base packages +define(`BASETARGET', `PV`'TS') +define(`BASEDEP', `gcc`'BASETARGET-base (= ${gcc:Version})') +define(`SOFTBASEDEP', `gcc`'BASETARGET-base (>= ${gcc:SoftVersion})') + +Package: gcc`'BASETARGET-base +Architecture: any +Section: devel +Priority: PRI(extra) +Depends: ${misc:Depends} +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). +')`'dnl + +ifenabled(`java',` +Package: gcj`'PV-base +Architecture: any +Section: libs +Priority: PRI(optional) +Depends: ${misc:Depends} +Description: GCC, the GNU Compiler Collection (gcj base package) + This package contains files common to all java related packages + built from the GNU Compiler Collection (GCC). +')`'dnl java + +ifenabled(`ada',` +Package: gnat`'PV-base +Architecture: any +Section: libs +Priority: PRI(optional) +Depends: ${misc:Depends} +Breaks: gcc-4.6 (<< 4.6.1-8~) +Description: GNU Ada compiler (common files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package contains files common to all GNAT related packages. +')`'dnl ada + +ifenabled(`libgcc',` +Package: libgcc1`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libgcc1-TARGET-dcv1', +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libgcc1-armel [armel], libgcc1-armhf [armhf]') +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV (<< ${gcc:SplitVersion}) +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Description: GCC support library (development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libgcc1`'LS (= ${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`',`dnl +ifdef(`MULTIARCH',`Multi-Arch: same +')dnl +Provides: libgcc1-dbg-armel [armel], libgcc1-dbg-armhf [armhf] +')dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc2`'LS +Architecture: ifdef(`TARGET',`all',`m68k') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libgcc2-TARGET-dcv1 +',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +'))`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc2-dbg`'LS +Architecture: ifdef(`TARGET',`all',`m68k') +Section: debug +Priority: extra +Depends: BASEDEP, libgcc2`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libgcc + +ifenabled(`lib4gcc',` +Package: libgcc4`'LS +Architecture: ifdef(`TARGET',`all',`hppa') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +'))`'dnl +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: ifdef(`STANDALONEJAVA',`gcj`'PV-base (>= ${gcj:Version})',`BASEDEP'), ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc4-dbg`'LS +Architecture: ifdef(`TARGET',`all',`hppa') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Section: debug +Priority: extra +Depends: BASEDEP, libgcc4`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib4gcc + +ifenabled(`lib64gcc',` +Package: lib64gcc1`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64gcc1-TARGET-dcv1 +',`')`'dnl +Conflicts: libgcc`'GCC_SO`'LS (<= 1:3.3-0pre9) +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (64bit) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib64gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (64bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: lib64gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib64gcc1`'LS (= ${gcc:EpochVersion}), ${misc:Depends} +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib64gcc + +ifenabled(`lib32gcc',` +Package: lib32gcc1`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: extra +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +Conflicts: ${confl:lib32} +ifdef(`TARGET',`Provides: lib32gcc1-TARGET-dcv1 +',`')`'dnl +Description: GCC support library (32 bit Version) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (32 bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: lib32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib32gcc1`'LS (= ${gcc:EpochVersion}), ${misc:Depends} +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib32gcc1 + +ifenabled(`libneongcc',` +Package: libgcc1-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +Description: GCC support library [neon optimized] + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongcc1 + +ifenabled(`libhfgcc',` +Package: libhfgcc1`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfgcc1-TARGET-dcv1 +',`Conflicts: libgcc1-armhf [biarchhf_archs] +')`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (hard float ABI) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libhfgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (hard float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libhfgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libhfgcc1`'LS (= ${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armhf [biarchhf_archs]')) +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfgcc + +ifenabled(`libsfgcc',` +Package: libsfgcc1`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfgcc1-TARGET-dcv1 +',`Conflicts: libgcc1-armel [biarchsf_archs] +')`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (soft float ABI) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libsfgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (soft float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libsfgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libsfgcc1`'LS (= ${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armel [biarchsf_archs]')) +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfgcc + +ifenabled(`libn32gcc',` +Package: libn32gcc1`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libn32gcc1-TARGET-dcv1 +',`')`'dnl +Conflicts: libgcc`'GCC_SO`'LS (<= 1:3.3-0pre9) +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (n32) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libn32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (n32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libn32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libn32gcc1`'LS (= ${gcc:EpochVersion}), ${misc:Depends} +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libn32gcc + +ifenabled(`libx32gcc',` +Package: libx32gcc1`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32gcc1-TARGET-dcv1 +',`')`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (x32) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libx32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (x32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libx32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libx32gcc1`'LS (= ${gcc:EpochVersion}), ${misc:Depends} +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32gcc + +ifdef(`TARGET', `', ` +ifenabled(`libgmath',` +Package: libgccmath`'GCCMATH_SO`'LS +Architecture: i386 +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +')`'dnl +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GCC math support library + Support library for GCC. + +Package: lib32gccmath`'GCCMATH_SO`'LS +Architecture: amd64 +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GCC math support library (32bit) + Support library for GCC. + +Package: lib64gccmath`'GCCMATH_SO`'LS +Architecture: i386 +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GCC math support library (64bit) + Support library for GCC. +')`'dnl +')`'dnl native + +ifenabled(`cdev',` +Package: gcc`'PV`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, cpp`'PV`'TS (= ${gcc:Version}), binutils`'TS (>= ${binutils:Version}), libgcc`'PV-dev`'LS (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Recommends: ${dep:libcdev} +Suggests: ${gcc:multilib}, libmudflap`'MF_SO`'PV-dev`'LS (>= ${gcc:Version}), gcc`'PV-doc (>= ${gcc:SoftVersion}), gcc`'PV-locales (>= ${gcc:SoftVersion}), libgcc`'GCC_SO-dbg`'LS, libgomp`'GOMP_SO-dbg`'LS, libitm`'ITM_SO-dbg`'LS, libquadmath`'QMATH_SO-dbg`'LS, libmudflap`'MF_SO-dbg`'LS, ${dep:libcloog}, ${dep:gold} +Provides: c-compiler`'TS +Description: GNU C compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C compiler, a fairly portable optimizing compiler for C. +ifdef(`TARGET', `dnl + . + This package contains C cross-compiler for TARGET architecture. +')`'dnl + +ifenabled(`multilib',` +Package: gcc`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libmudflapbiarch} +Description: GNU C compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C compiler, a fairly portable optimizing compiler for C. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`plugindev',` +Package: gcc`'PV-plugin-dev`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), GMP_BUILD_DEP ${shlibs:Depends}, ${misc:Depends} +Description: Files for GNU GCC plugin development. + This package contains (header) files for GNU GCC plugin development. It + is only used for the development of GCC plugins, but not needed to run + plugins. +')`'dnl plugindev +')`'dnl cdev + +ifenabled(`cdev',` +Package: gcc`'PV-hppa64 +Architecture: ifdef(`TARGET',`any',hppa) +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3) +Description: GNU C compiler (cross compiler for hppa64) + This is the GNU C compiler, a fairly portable optimizing compiler for C. + +ifdef(`TARGET', `', ` +Package: gcc`'PV-spu +Architecture: powerpc ppc64 +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, binutils-spu (>= 2.18.1~cvs20080103-3), newlib-spu, ${shlibs:Depends}, ${misc:Depends} +Provides: spu-gcc +Description: SPU cross-compiler (preprocessor and C compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (preprocessor + and C compiler). + +Package: g++`'PV-spu +Architecture: powerpc ppc64 +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, gcc`'PV-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: spu-g++ +Description: SPU cross-compiler (C++ compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (C++ compiler). + +Package: gfortran`'PV-spu +Architecture: powerpc ppc64 +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, gcc`'PV-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: spu-gfortran +Description: SPU cross-compiler (Fortran compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (Fortran compiler). + +')`'dnl native +')`'dnl cdev + +ifenabled(`cdev',` +Package: cpp`'PV`'TS +Architecture: any +Section: ifdef(`TARGET',`devel',`interpreters') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Suggests: gcc`'PV-locales (>= ${gcc:SoftVersion}) +Replaces: gcc-4.6 (<< 4.6.1-9) +Description: GNU C preprocessor + A macro processor that is used automatically by the GNU C compiler + to transform programs before actual compilation. + . + This package has been separated from gcc for the benefit of those who + require the preprocessor but not the compiler. +ifdef(`TARGET', `dnl + . + This package contains preprocessor configured for TARGET architecture. +')`'dnl + +ifdef(`TARGET', `', ` +ifenabled(`gfdldoc',` +Package: cpp`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU C preprocessor (cpp) + Documentation for the GNU C preprocessor in info `format'. +')`'dnl gfdldoc +')`'dnl native + +ifdef(`TARGET', `', ` +Package: gcc`'PV-locales +Architecture: all +Section: devel +Priority: PRI(optional) +Depends: SOFTBASEDEP, cpp`'PV (>= ${gcc:SoftVersion}), ${misc:Depends} +Recommends: gcc`'PV (>= ${gcc:SoftVersion}) +Description: GCC, the GNU compiler collection (native language support files) + Native language support for GCC. Lets GCC speak your language, + if translations are available. + . + Please do NOT submit bug reports in other languages than "C". + Always reset your language settings to use the "C" locales. +')`'dnl native +')`'dnl cdev + +ifenabled(`c++',` +ifenabled(`c++dev',` +Package: g++`'PV`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: c++-compiler`'TS`'ifdef(`TARGET)',`',`, c++abi2-dev') +Suggests: ${gxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libstdc++CXX_SO`'PV-dbg`'LS +Description: GNU C++ compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. +ifdef(`TARGET', `dnl + . + This package contains C++ cross-compiler for TARGET architecture. +')`'dnl + +ifenabled(`multilib',` +Package: g++`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, g++`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libcxxbiarch}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libcxxbiarchdbg} +Description: GNU C++ compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib +')`'dnl c++dev +')`'dnl c++ + +ifenabled(`mudflap',` +ifenabled(`libmudf',` +Package: libmudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libmudflap'MF_SO`-armel [armel], libmudflap'MF_SO`-armhf [armhf]') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GCC mudflap shared support libraries + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libmudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libmudflap'MF_SO`-dbg-armel [armel], libmudflap'MF_SO`-dbg-armhf [armhf]') +Section: debug +Priority: extra +Depends: BASEDEP, libmudflap`'MF_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib32mudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Conflicts: ${confl:lib32} +Description: GCC mudflap shared support libraries (32bit) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib32mudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib32mudflap`'MF_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (32 bit debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib64mudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Description: GCC mudflap shared support libraries (64bit) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib64mudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib64mudflap`'MF_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (64 bit debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libn32mudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Description: GCC mudflap shared support libraries (n32) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libn32mudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libn32mudflap`'MF_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (n32 debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +ifenabled(`libx32mudflap',` +Package: libx32mudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Description: GCC mudflap shared support libraries (x32) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libx32mudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libx32mudflap`'MF_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC mudflap shared support libraries (x32 debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. +')`'dnl libx32mudflap + +ifenabled(`libhfmudflap',` +Package: libhfmudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +ifdef(`TARGET',`dnl',`Conflicts: libmudflap`'MF_SO`'-armhf [biarchhf_archs]')) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC mudflap shared support libraries (hard float) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libhfmudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libhfmudflap`'MF_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libmudflap`'MF_SO`'-dbg-armhf [biarchhf_archs]')) +Description: GCC mudflap shared support libraries (hard float debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. +')`'dnl libhfmudflap + +ifenabled(`libsfmudflap',` +Package: libsfmudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libmudflap`'MF_SO`'-armel [biarchsf_archs]')) +Description: GCC mudflap shared support libraries (soft float) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libsfmudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libsfmudflap`'MF_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libmudflap`'MF_SO`'-dbg-armel [biarchsf_archs]')) +Description: GCC mudflap shared support libraries (soft float debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. +')`'dnl libsfmudflap +')`'dnl libmudf + +Package: libmudflap`'MF_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, libmudflap`'MF_SO`'LS (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${sug:libmudflapdev} +Conflicts: libmudflap0-dev +Description: GCC mudflap support libraries (development files) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + . + This package contains the headers and the static libraries. +')`'dnl mudflap + +ifdef(`TARGET', `', ` +ifenabled(`ssp',` +Package: libssp`'SSP_SO`'LS +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +')`'dnl +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GCC stack smashing protection library + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: lib32ssp`'SSP_SO`'LS +Architecture: biarch32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +Conflicts: ${confl:lib32} +Description: GCC stack smashing protection library (32bit) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: lib64ssp`'SSP_SO`'LS +Architecture: biarch64_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +Description: GCC stack smashing protection library (64bit) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libn32ssp`'SSP_SO`'LS +Architecture: biarchn32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +Description: GCC stack smashing protection library (n32) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libx32ssp`'SSP_SO`'LS +Architecture: biarchx32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +Description: GCC stack smashing protection library (x32) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libhfssp`'SSP_SO`'LS +Architecture: biarchhf_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC stack smashing protection library (hard float ABI) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libsfssp`'SSP_SO`'LS +Architecture: biarchsf_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC stack smashing protection library (soft float ABI) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. +')`'dnl +')`'dnl native + +ifenabled(`libgomp',` +Package: libgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libgomp'GOMP_SO`-armel [armel], libgomp'GOMP_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libgomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libgomp'GOMP_SO`-dbg-armel [armel], libgomp'GOMP_SO`-dbg-armhf [armhf]') +Description: GCC OpenMP (GOMP) support library (debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GCC OpenMP (GOMP) support library (32bit) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib32gomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (32 bit debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib64gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (64bit) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib64gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib64gomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (64bit debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libn32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (n32) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libn32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libn32gomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (n32 debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + +ifenabled(`libx32gomp',` +Package: libx32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (x32) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libx32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libx32gomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC OpenMP (GOMP) support library (x32 debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libx32gomp + +ifenabled(`libhfgomp',` +Package: libhfgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armhf [biarchhf_archs]')) +Description: GCC OpenMP (GOMP) support library (hard float ABI) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libhfgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libhfgomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armhf [biarchhf_archs]')) +Description: GCC OpenMP (GOMP) support library (hard float ABI debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libhfgomp + +ifenabled(`libsfgomp',` +Package: libsfgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armel [biarchsf_archs]')) +Description: GCC OpenMP (GOMP) support library (soft float ABI) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libsfgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libsfgomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armel [biarchsf_archs]')) +Description: GCC OpenMP (GOMP) support library (soft float ABI debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libsfgomp + +ifenabled(`libneongomp',` +Package: libgomp`'GOMP_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +Description: GCC OpenMP (GOMP) support library [neon optimized] + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongomp +')`'dnl libgomp + +ifenabled(`libitm',` +Package: libitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +')`Provides: libitm'ITM_SO`-armel [armel], libitm'ITM_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libitm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libitm'ITM_SO`-dbg-armel [armel], libitm'ITM_SO`-dbg-armhf [armhf]') +Description: GNU Transactional Memory Library (debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GNU Transactional Memory Library (32bit) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib32itm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (32 bit debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib64itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (64bit) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib64itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib64itm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (64bit debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libn32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (n32) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libn32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libn32itm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (n32 debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +ifenabled(`libx32itm',` +Package: libx32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (x32) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libx32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libx32itm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (x32 debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. +')`'dnl libx32itm + +ifenabled(`libhfitm',` +Package: libhfitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armhf [biarchhf_archs]')) +Description: GNU Transactional Memory Library (hard float ABI) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libhfitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libhfitm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armel [biarchsf_archs]')) +Description: GNU Transactional Memory Library (hard float ABI debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. +')`'dnl libhfitm + +ifenabled(`libsfitm',` +Package: libsfitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (soft float ABI) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libsfitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libsfitm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (soft float ABI debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. +')`'dnl libsfitm + +ifenabled(`libneonitm',` +Package: libitm`'ITM_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library [neon optimized] + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonitm +')`'dnl libitm + +ifenabled(`libqmath',` +Package: libquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libquadmath`'QMATH_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Description: GCC Quad-Precision Math Library (debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: lib32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GCC Quad-Precision Math Library (32bit) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: lib32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib32quadmath`'QMATH_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (32 bit debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: lib64quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (64bit) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: lib64quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib64quadmath`'QMATH_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (64bit debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: libn32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (n32) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libn32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libn32quadmath`'QMATH_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (n32 debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +ifenabled(`libx32qmath',` +Package: libx32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (x32) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libx32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libx32quadmath`'QMATH_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (x32 debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libx32qmath + +ifenabled(`libhfqmath',` +Package: libhfquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (hard float ABI) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libhfquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libhfquadmath`'QMATH_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libhfqmath + +ifenabled(`libsfqmath',` +Package: libsfquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GCC Quad-Precision Math Library (soft float ABI) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libsfquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libsfquadmath`'QMATH_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libsfqmath +')`'dnl libqmath + +ifenabled(`objpp',` +ifenabled(`objppdev',` +Package: gobjc++`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), g++`'PV`'TS (= ${gcc:Version}), ${shlibs:Depends}, libobjc`'PV-dev`'LS (= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjcxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}) +Provides: objc++-compiler`'TS +Description: GNU Objective-C++ compiler + This is the GNU Objective-C++ compiler, which compiles + Objective-C++ on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. +')`'dnl obcppdev + +ifenabled(`multilib',` +Package: gobjc++`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc++`'PV`'TS (= ${gcc:Version}), g++`'PV-multilib`'TS (= ${gcc:Version}), gobjc`'PV-multilib`'TS (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GNU Objective-C++ compiler (multilib files) + This is the GNU Objective-C++ compiler, which compiles Objective-C++ on + platforms supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib +')`'dnl obcpp + +ifenabled(`objc',` +ifenabled(`objcdev',` +Package: gobjc`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libobjc`'PV-dev`'LS (= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjc:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libobjc`'OBJC_SO-dbg`'LS +Provides: objc-compiler`'TS +ifdef(`__sparc__',`Conflicts: gcc`'PV-sparc64', `dnl') +Description: GNU Objective-C compiler + This is the GNU Objective-C compiler, which compiles + Objective-C on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gobjc`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Objective-C compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Objective-C compiler, which compiles Objective-C on platforms + supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib +')`'dnl objcdev + +ifenabled(`libobjc',` +Package: libobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +ifelse(OBJC_SO,`2',`Breaks: ${multiarch:breaks} +',`')')`Provides: libobjc'OBJC_SO`-armel [armel], libobjc'OBJC_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications + Library needed for GNU ObjC applications linked against the shared library. + +Package: libobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, libgcc`'PV-dev`'LS (= ${gcc:Version}), libobjc`'OBJC_SO`'LS (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV (<< ${gcc:SplitVersion}) +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Description: Runtime library for GNU Objective-C applications (development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libobjc'OBJC_SO`-dbg-armel [armel], libobjc'OBJC_SO`-dbg-armhf [armhf]') +Priority: extra +Depends: BASEDEP, libobjc`'OBJC_SO`'LS (= ${gcc:Version}), libgcc`'GCC_SO-dbg`'LS, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libobjc + +ifenabled(`lib64objc',` +Package: lib64objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (64bit) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib64objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, lib64gcc`'PV-dev`'LS (= ${gcc:Version}), lib64objc`'OBJC_SO`'LS (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (64bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib64objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: extra +Depends: BASEDEP, lib64objc`'OBJC_SO`'LS (= ${gcc:Version}), lib64gcc`'GCC_SO-dbg`'LS, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (64 bit debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl lib64objc + +ifenabled(`lib32objc',` +Package: lib32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: Runtime library for GNU Objective-C applications (32bit) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, lib32gcc`'PV-dev`'LS (= ${gcc:Version}), lib32objc`'OBJC_SO`'LS (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (32bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: extra +Depends: BASEDEP, lib32objc`'OBJC_SO`'LS (= ${gcc:Version}), lib32gcc`'GCC_SO-dbg`'LS, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (32 bit debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl lib32objc + +ifenabled(`libn32objc',` +Package: libn32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (n32) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libn32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libn32gcc`'PV-dev`'LS (= ${gcc:Version}), libn32objc`'OBJC_SO`'LS (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (n32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libn32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libn32objc`'OBJC_SO`'LS (= ${gcc:Version}), libn32gcc`'GCC_SO-dbg`'LS, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (n32 debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libn32objc + +ifenabled(`libx32objc',` +Package: libx32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (x32) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libx32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libx32gcc`'PV-dev`'LS (= ${gcc:Version}), libx32objc`'OBJC_SO`'LS (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (x32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libx32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libx32objc`'OBJC_SO`'LS (= ${gcc:Version}), libx32gcc`'GCC_SO-dbg`'LS, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications (x32 debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libx32objc + +ifenabled(`libhfobjc',` +Package: libhfobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armhf [biarchhf_archs]')) +Description: Runtime library for GNU Objective-C applications (hard float ABI) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libhfobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libhfgcc`'PV-dev`'LS (= ${gcc:Version}), libhfobjc`'OBJC_SO`'LS (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libhfobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Priority: extra +Depends: BASEDEP, libhfobjc`'OBJC_SO`'LS (= ${gcc:Version}), libhfgcc`'GCC_SO-dbg`'LS, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armhf [biarchhf_archs]')) +Description: Runtime library for GNU Objective-C applications (hard float ABI debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libhfobjc + +ifenabled(`libsfobjc',` +Package: libsfobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armel [biarchsf_archs]')) +Description: Runtime library for GNU Objective-C applications (soft float ABI) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libsfobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libsfgcc`'PV-dev`'LS (= ${gcc:Version}), libsfobjc`'OBJC_SO`'LS (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (soft float development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libsfobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Priority: extra +Depends: BASEDEP, libsfobjc`'OBJC_SO`'LS (= ${gcc:Version}), libsfgcc`'GCC_SO-dbg`'LS, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armel [biarchsf_archs]')) +Description: Runtime library for GNU Objective-C applications (soft float ABI debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libsfobjc + +ifenabled(`libneonobjc',` +Package: libobjc`'OBJC_SO-neon`'LS +Section: libs +Architecture: NEON_ARCHS +Priority: PRI(optional) +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Objective-C applications [NEON version] + Library needed for GNU ObjC applications linked against the shared library. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonobjc +')`'dnl objc + +ifenabled(`fortran',` +ifenabled(`fdev',` +Package: gfortran`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libgfortran`'PV-dev`'LS (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: fortran95-compiler +Suggests: ${gfortran:multilib}, gfortran`'PV-doc, libgfortran`'FORTRAN_SO-dbg`'LS +Description: GNU Fortran compiler + This is the GNU Fortran compiler, which compiles + Fortran on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gfortran`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gfortran`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Fortran compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Fortran compiler, which compiles Fortran on platforms + supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`gfdldoc',` +Package: gfortran`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Fortran compiler (gfortran) + Documentation for the GNU Fortran compiler in info `format'. +')`'dnl gfdldoc +')`'dnl fdev + +ifenabled(`libgfortran',` +Package: libgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libgfortran'FORTRAN_SO`-armel [armel], libgfortran'FORTRAN_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, libgfortran`'FORTRAN_SO`'LS, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV (<< ${gcc:SplitVersion}) +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Description: Runtime library for GNU Fortran applications (development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libgfortran'FORTRAN_SO`-dbg-armel [armel], libgfortran'FORTRAN_SO`-dbg-armhf [armhf]') +Priority: extra +Depends: BASEDEP, libgfortran`'FORTRAN_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libgfortran + +ifenabled(`lib64gfortran',` +Package: lib64gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (64bit) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib64gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, lib64gfortran`'FORTRAN_SO`'LS, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (64bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib64gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: extra +Depends: BASEDEP, lib64gfortran`'FORTRAN_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (64bit debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl lib64gfortran + +ifenabled(`lib32gfortran',` +Package: lib32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: Runtime library for GNU Fortran applications (32bit) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, lib32gfortran`'FORTRAN_SO`'LS, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (32bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: extra +Depends: BASEDEP, lib32gfortran`'FORTRAN_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (32 bit debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl lib32gfortran + +ifenabled(`libn32gfortran',` +Package: libn32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (n32) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libn32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, libn32gfortran`'FORTRAN_SO`'LS, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (n32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libn32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libn32gfortran`'FORTRAN_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (n32 debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libn32gfortran + +ifenabled(`libx32gfortran',` +Package: libx32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications (x32) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libx32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, libx32gfortran`'FORTRAN_SO`'LS, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (x32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libx32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libx32gfortran`'FORTRAN_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Fortran applications (x32 debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libx32gfortran + +ifenabled(`libhfgfortran',` +Package: libhfgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armhf [biarchhf_archs]')) +Description: Runtime library for GNU Fortran applications (hard float ABI) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libhfgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, libhfgfortran`'FORTRAN_SO`'LS, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libhfgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Priority: extra +Depends: BASEDEP, libhfgfortran`'FORTRAN_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armhf [biarchhf_archs]')) +Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libhfgfortran + +ifenabled(`libsfgfortran',` +Package: libsfgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armel [biarchsf_archs]')) +Description: Runtime library for GNU Fortran applications (soft float ABI) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libsfgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, libsfgfortran`'FORTRAN_SO`'LS, ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (soft float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libsfgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Priority: extra +Depends: BASEDEP, libsfgfortran`'FORTRAN_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armel [biarchsf_archs]')) +Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libsfgfortran + +ifenabled(`libneongfortran',` +Package: libgfortran`'FORTRAN_SO-neon`'LS +Section: libs +Architecture: NEON_ARCHS +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`'dnl +Priority: extra +Depends: BASEDEP, libgcc1-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Fortran applications [NEON version] + Library needed for GNU Fortran applications linked against the + shared library. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongfortran +')`'dnl fortran + +ifenabled(`ggo',` +ifenabled(`godev',` +Package: gccgo`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ifdef(`STANDALONEGO',,`gcc`'PV`'TS (= ${gcc:Version}), ')libgo`'GO_SO`'LS (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: go-compiler +Suggests: ${go:multilib}, gccgo`'PV-doc, libgo`'GO_SO-dbg`'LS +Description: GNU Go compiler + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. It uses the gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gccgo`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gccgo`'PV`'TS (= ${gcc:Version}), ifdef(`STANDALONEGO',,`gcc`'PV-multilib`'TS (= ${gcc:Version}), ')${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libgobiarchdbg} +Description: GNU Go compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`gfdldoc',` +Package: gccgo`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Go compiler (gccgo) + Documentation for the GNU Go compiler in info `format'. +')`'dnl gfdldoc +')`'dnl fdev + +ifenabled(`libggo',` +Package: libgo`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +')`Provides: libgo'GO_SO`-armel [armel], libgo'GO_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications + Library needed for GNU Go applications linked against the + shared library. + +Package: libgo`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libgo'GO_SO`-dbg-armel [armel], libgo'GO_SO`-dbg-armhf [armhf]') +Priority: extra +Depends: BASEDEP, libgo`'GO_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl libgo + +ifenabled(`lib64go',` +Package: lib64go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (64bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib64go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: extra +Depends: BASEDEP, lib64go`'GO_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (64bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl lib64go + +ifenabled(`lib32go',` +Package: lib32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: Runtime library for GNU Go applications (32bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: extra +Depends: BASEDEP, lib32go`'GO_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (32 bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl lib32go + +ifenabled(`libn32go',` +Package: libn32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (n32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libn32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libn32go`'GO_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (n32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl libn32go + +ifenabled(`libx32go',` +Package: libx32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (x32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libx32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libx32go`'GO_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (x32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl libx32go +')`'dnl ggo + +ifenabled(`java',` +ifenabled(`gcj',` +Package: gcj`'PV-jdk +Section: java +Architecture: any +Priority: PRI(optional) +Depends: gcj`'PV-base (= ${gcj:Version}), ${dep:gcj}, ${dep:libcdev}, gcj`'PV-jre (= ${gcj:Version}), libgcj`'GCJ_SO-dev (= ${gcj:Version}), gcj`'PV-jre-lib (>= ${gcj:SoftVersion}), ${dep:ecj}, fastjar, libgcj-bc, java-common, libantlr-java, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Recommends: libecj-java-gcj +Suggests: gcj`'PV-source (>= ${gcj:SoftVersion}), libgcj`'GCJ_SO-dbg +Provides: java-compiler, java-sdk, java2-sdk, java5-sdk +Conflicts: gcj-4.4, cpp-4.1 (<< 4.1.1), gcc-4.1 (<< 4.1.1) +Replaces: libgcj11 (<< 4.5-20100101-1) +Description: gcj and classpath development tools for Java(TM) + GCJ is a front end to the GCC compiler which can natively compile both + Java(tm) source and bytecode files. The compiler can also generate class + files. Other java development tools from classpath are included in this + package. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-SDK-like interface to the GCJ tool set. +')`'dnl gcj + +ifenabled(`libgcj',` +ifenabled(`libgcjcommon',` +Package: libgcj-common +Section: java +Architecture: all +Priority: PRI(optional) +Depends: gcj`'PV-base (>= ${gcj:SoftVersion}), ${misc:Depends} +Conflicts: classpath (<= 0.04-4) +Replaces: java-gcj-compat (<< 1.0.65-3), java-gcj-compat-dev (<< 1.0.65-3) +Description: Java runtime library (common files) + This package contains files shared by classpath and libgcj libraries. +')`'dnl libgcjcommon + +Package: gcj`'PV-jre-headless +Priority: optional +Section: java +Architecture: any +Depends: gcj`'PV-base (= ${gcj:Version}), libgcj`'LIBGCJ_EXT (= ${gcj:Version}), ${dep:prctl}, ${shlibs:Depends}, ${misc:Depends} +Suggests: fastjar, gcj`'PV-jdk (= ${gcj:Version}), libgcj`'LIBGCJ_EXT-awt (= ${gcj:Version}) +Conflicts: gij-4.4, java-gcj-compat (<< 1.0.76-4) +Provides: java5-runtime-headless, java2-runtime-headless, java1-runtime-headless, java-runtime-headless +Description: Java runtime environment using GIJ/classpath (headless version) + GIJ is a Java bytecode interpreter, not limited to interpreting bytecode. + It includes a class loader which can dynamically load shared objects, so + it is possible to give it the name of a class which has been compiled and + put into a shared library on the class path. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set, + limited to the headless tools and libraries. + +Package: gcj`'PV-jre +Section: java +Architecture: any +Priority: PRI(optional) +Depends: gcj`'PV-base (= ${gcj:Version}), gcj`'PV-jre-headless (= ${gcj:Version}), libgcj`'LIBGCJ_EXT-awt (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: java5-runtime, java2-runtime, java1-runtime, java-runtime +Description: Java runtime environment using GIJ/classpath + GIJ is a Java bytecode interpreter, not limited to interpreting bytecode. + It includes a class loader which can dynamically load shared objects, so + it is possible to give it the name of a class which has been compiled and + put into a shared library on the class path. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set. + +Package: libgcj`'LIBGCJ_EXT +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gcj`'PV-base (>= ${gcj:Version}), libgcj-common (>= 1:4.1.1-21), ${shlibs:Depends}, ${misc:Depends} +Recommends: gcj`'PV-jre-lib (>= ${gcj:SoftVersion}) +Suggests: libgcj`'GCJ_SO-dbg, libgcj`'LIBGCJ_EXT-awt (= ${gcj:Version}) +Replaces: gij-4.4 (<< 4.4.0-1) +Description: Java runtime library for use with gcj + This is the runtime that goes along with the gcj front end to + gcc. libgcj includes parts of the Java Class Libraries, plus glue to + connect the libraries to the compiler and the underlying OS. + . + To show file names and line numbers in stack traces, the packages + libgcj`'GCJ_SO-dbg and binutils are required. + +Package: gcj`'PV-jre-lib +Section: java +Architecture: all +Priority: PRI(optional) +Depends: gcj`'PV-base (>= ${gcj:SoftVersion}), libgcj`'LIBGCJ_EXT (>= ${gcj:SoftVersion}), ${misc:Depends} +Description: Java runtime library for use with gcj (jar files) + This is the jar file that goes along with the gcj front end to gcc. + +ifenabled(`gcjbc',` +Package: libgcj-bc +Section: java +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gcj`'PV-base (>= ${gcj:Version}), libgcj`'LIBGCJ_EXT (>= ${gcj:Version}), ${misc:Depends} +Description: Link time only library for use with gcj + A fake library that is used at link time only. It ensures that + binaries built with the BC-ABI link against a constant SONAME. + This way, BC-ABI binaries continue to work if the SONAME underlying + libgcj.so changes. +')`'dnl gcjbc + +Package: libgcj`'LIBGCJ_EXT-awt +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gcj`'PV-base (>= ${gcj:Version}), libgcj`'LIBGCJ_EXT (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Suggests: ${pkg:gcjqt} +Description: AWT peer runtime libraries for use with gcj + These are runtime libraries holding the AWT peer implementations + for libgcj (currently the GTK+ based peer library is required, the + QT bases library is not built). + +ifenabled(`gtkpeer',` +Package: libgcj`'GCJ_SO-awt-gtk +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gcj`'PV-base (= ${gcj:Version}), libgcj`'LIBGCJ_EXT-awt (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: AWT GTK+ peer runtime library for use with libgcj + This is the runtime library holding the GTK+ based AWT peer + implementation for libgcj. +')`'dnl gtkpeer + +ifenabled(`qtpeer',` +Package: libgcj`'GCJ_SO-awt-qt +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gcj`'PV-base (= ${gcj:Version}), libgcj`'LIBGCJ_EXT-awt (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: AWT QT peer runtime library for use with libgcj + This is the runtime library holding the QT based AWT peer + implementation for libgcj. +')`'dnl qtpeer +')`'dnl libgcj + +ifenabled(`libgcjdev',` +Package: libgcj`'GCJ_SO-dev +Section: libdevel +Architecture: any +Priority: PRI(optional) +Depends: gcj`'PV-base (= ${gcj:Version}), gcj`'PV-jdk (= ${gcj:Version}), gcj`'PV-jre-lib (>= ${gcj:SoftVersion}), libgcj`'LIBGCJ_EXT-awt (= ${gcj:Version}), libgcj-bc, ${pkg:gcjgtk}, ${pkg:gcjqt}, zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} +Suggests: libgcj-doc +Description: Java development headers for use with gcj + These are the development headers that go along with the gcj front end + to gcc. libgcj includes parts of the Java Class Libraries, plus glue + to connect the libraries to the compiler and the underlying OS. + +Package: libgcj`'GCJ_SO-dbg +Section: debug +Architecture: any +Priority: extra +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gcj`'PV-base (= ${gcj:Version}), libgcj`'LIBGCJ_EXT (= ${gcj:Version}), ${misc:Depends} +Recommends: binutils, libc6-dbg | libc-dbg +Description: Debugging symbols for libraries provided in libgcj`'GCJ_SO-dev + The package provides debugging symbols for the libraries provided + in libgcj`'GCJ_SO-dev. + . + binutils is required to show file names and line numbers in stack traces. + +Package: gcj`'PV-source +Section: java +Architecture: all +Priority: PRI(optional) +Depends: gcj`'PV-base (>= ${gcj:SoftVersion}), gcj`'PV-jdk (>= ${gcj:SoftVersion}), ${misc:Depends} +Description: GCJ java sources for use in IDEs like eclipse and netbeans + These are the java source files packaged as a zip file for use in development + environments like eclipse and netbeans. + +ifenabled(`gcjdoc',` +Package: libgcj-doc +Section: doc +Architecture: all +Priority: PRI(optional) +Depends: gcj`'PV-base (>= ${gcj:SoftVersion}), ${misc:Depends} +Enhances: libgcj`'GCJ_SO-dev +Provides: classpath-doc +Description: libgcj API documentation and example programs + Autogenerated documentation describing the API of the libgcj library. + Sources and precompiled example programs from the classpath library. +')`'dnl gcjdoc +')`'dnl libgcjdev +')`'dnl java + +ifenabled(`c++',` +ifenabled(`libcxx',` +Package: libstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(important)) +Depends: BASEDEP, ${dep:libc}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++CXX_SO-TARGET-dcv1', +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libstdc++'CXX_SO`-armel [armel], libstdc++'CXX_SO`-armhf [armhf]') +Conflicts: scim (<< 1.4.2-1) +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libcxx + +ifenabled(`lib32cxx',` +Package: lib32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: extra +Depends: BASEDEP, lib32gcc1`'LS, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +Description: GNU Standard C++ Library v3 (32 bit Version) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib32cxx + +ifenabled(`lib64cxx',` +Package: lib64stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, lib64gcc1`'LS, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (64bit) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib64cxx + +ifenabled(`libn32cxx',` +Package: libn32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, libn32gcc1`'LS, ${misc:Depends} +ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (n32) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libn32cxx + +ifenabled(`libx32cxx',` +Package: libx32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, libx32gcc1`'LS, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (x32) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32cxx + +ifenabled(`libhfcxx',` +Package: libhfstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, libhfgcc1`'LS, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armhf [biarchhf_archs]')) +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (hard float ABI) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfcxx + +ifenabled(`libsfcxx',` +Package: libsfstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, libsfgcc1`'LS, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armel [biarchsf_archs]')) +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (soft float ABI) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfcxx + +ifenabled(`libneoncxx',` +Package: libstdc++CXX_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, libgcc1-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Standard C++ Library v3 [NEON version] + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl + +ifenabled(`c++dev',` +Package: libstdc++CXX_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libgcc`'PV-dev`'LS (= ${gcc:Version}), libstdc++CXX_SO`'LS (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev +Suggests: libstdc++CXX_SO`'PV-doc +')`'dnl native +Provides: libstdc++-dev`'LS`'ifdef(`TARGET',`, libstdc++-dev-TARGET-dcv1, libstdc++CXX_SO-dev-TARGET-dcv1') +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libstdc++CXX_SO`'PV-pic`'LS +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: extra +Depends: BASEDEP, libstdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++CXX_SO-pic-TARGET-dcv1 +',`')`'dnl +Description: GNU Standard C++ Library v3 (shared library subset kit)`'ifdef(`TARGET)',` (TARGET)', `') + This is used to develop subsets of the libstdc++ shared libraries for + use on custom installation floppies and in embedded systems. + . + Unless you are making one of those, you will not need this package. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libstdc++CXX_SO`'LS (>= ${gcc:Version}), libgcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++CXX_SO-dbg-TARGET-dcv1',`dnl +ifdef(`MULTIARCH', `Multi-Arch: same',`dnl') +Provides: libstdc++'CXX_SO`'PV`-dbg-armel [armel], libstdc++'CXX_SO`'PV`-dbg-armhf [armhf]dnl +') +Recommends: libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}) +Conflicts: libstdc++5-dbg`'LS, libstdc++5-3.3-dbg`'LS, libstdc++6-dbg`'LS, libstdc++6-4.0-dbg`'LS, libstdc++6-4.1-dbg`'LS, libstdc++6-4.2-dbg`'LS, libstdc++6-4.3-dbg`'LS, libstdc++6-4.4-dbg`'LS, libstdc++6-4.5-dbg`'LS, libstdc++6-4.6-dbg`'LS +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib32stdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), lib32gcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: lib32stdc++6-dbg`'LS, lib32stdc++6-4.0-dbg`'LS, lib32stdc++6-4.1-dbg`'LS, lib32stdc++6-4.2-dbg`'LS, lib32stdc++6-4.3-dbg`'LS, lib32stdc++6-4.4-dbg`'LS, lib32stdc++6-4.5-dbg`'LS, lib32stdc++6-4.6-dbg`'LS +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib64stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib64stdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), lib64gcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: lib64stdc++6-dbg`'LS, lib64stdc++6-4.0-dbg`'LS, lib64stdc++6-4.1-dbg`'LS, lib64stdc++6-4.2-dbg`'LS, lib64stdc++6-4.3-dbg`'LS, lib64stdc++6-4.4-dbg`'LS, lib64stdc++6-4.5-dbg`'LS, lib64stdc++6-4.6-dbg`'LS +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libn32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libn32stdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), libn32gcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: libn32stdc++6-dbg`'LS, libn32stdc++6-4.0-dbg`'LS, libn32stdc++6-4.1-dbg`'LS, libn32stdc++6-4.2-dbg`'LS, libn32stdc++6-4.3-dbg`'LS, libn32stdc++6-4.4-dbg`'LS, libn32stdc++6-4.5-dbg`'LS, libn32stdc++6-4.6-dbg`'LS +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +ifenabled(`libx32cxx',` +Package: libx32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libx32stdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), libx32gcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: libx32stdc++6-dbg`'LS, libx32stdc++6-4.0-dbg`'LS, libx32stdc++6-4.1-dbg`'LS, libx32stdc++6-4.2-dbg`'LS, libx32stdc++6-4.3-dbg`'LS, libx32stdc++6-4.4-dbg`'LS, libx32stdc++6-4.5-dbg`'LS, libx32stdc++6-4.6-dbg`'LS +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32dbgcxx + +ifenabled(`libhfdbgcxx',` +Package: libhfstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libhfstdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), libhfgcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libhfstdc++6-dbg`'LS, libhfstdc++6-4.3-dbg`'LS, libhfstdc++6-4.4-dbg`'LS, libhfstdc++6-4.5-dbg`'LS, libhfstdc++6-4.6-dbg`'LS, libstdc++'CXX_SO`-armhf [biarchhf_archs]')) +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfdbgcxx + +ifenabled(`libsfdbgcxx',` +Package: libsfstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libsfstdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), libsfgcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libsfstdc++6-dbg`'LS, libsfstdc++6-4.3-dbg`'LS, libsfstdc++6-4.4-dbg`'LS, libsfstdc++6-4.5-dbg`'LS, libsfstdc++6-4.6-dbg`'LS, libstdc++'CXX_SO`-armel [biarchsf_archs]')) +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfdbgcxx + +ifdef(`TARGET', `', ` +Package: libstdc++CXX_SO`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} +Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc +Description: GNU Standard C++ Library v3 (documentation files) + This package contains documentation files for the GNU stdc++ library. + . + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. +')`'dnl native +')`'dnl c++dev +')`'dnl c++ + +ifenabled(`ada',` +Package: gnat`'-GNAT_V +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gnat`'PV-base (= ${gnat:Version}), gcc`'PV (>= ${gcc:SoftVersion}), ${dep:libgnat}, ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: gnat`'PV-doc, ada-reference-manual-html, ada-reference-manual-info, ada-reference-manual-pdf, ada-reference-manual-text, gnat`'-GNAT_V-sjlj +Provides: ada-compiler +Conflicts: gnat (<< 4.1), gnat-3.1, gnat-3.2, gnat-3.3, gnat-3.4, gnat-3.5, gnat-4.0, gnat-4.1, gnat-4.2, gnat-4.3, gnat-4.4, gnat-4.6 +Description: GNU Ada compiler + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package provides the compiler, tools and runtime library that handles + exceptions using the default zero-cost mechanism. + +Package: gnat`'-GNAT_V-sjlj +Architecture: any +Priority: extra +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gnat`'PV-base (= ${gnat:Version}), gnat`'-GNAT_V (= ${gnat:Version}), ${misc:Depends} +Description: GNU Ada compiler (setjump/longjump runtime library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package provides an alternative runtime library that handles + exceptions using the setjump/longjump mechanism (as a static library + only). You can install it to supplement the normal compiler. + +ifenabled(`libgnat',` +Package: libgnat`'-GNAT_V +Section: libs +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: PRI(optional) +Depends: gnat`'PV-base (= ${gnat:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: runtime for applications compiled with GNAT (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the runtime shared library. + +Package: libgnat`'-GNAT_V-dbg +Section: debug +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: extra +Depends: gnat`'PV-base (= ${gnat:Version}), libgnat`'-GNAT_V (= ${gnat:Version}), ${misc:Depends} +Description: runtime for applications compiled with GNAT (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the debugging symbols. + +Package: libgnatvsn`'GNAT_V-dev +Section: libdevel +Architecture: any +Priority: extra +Depends: gnat`'PV-base (= ${gnat:Version}), gnat`'PV (= ${gnat:Version}), ada-compiler, + libgnatvsn`'GNAT_V (= ${gnat:Version}), ${misc:Depends} +Conflicts: libgnatvsn-dev (<< `'GNAT_V), libgnatvsn4.1-dev, libgnatvsn4.3-dev, libgnatvsn4.4-dev, libgnatvsn4.5-dev, libgnatvsn4.6-dev +Description: GNU Ada compiler selected components (development files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the development files and static library. + +Package: libgnatvsn`'GNAT_V +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: PRI(optional) +Section: libs +Depends: gnat`'PV-base (= ${gnat:Version}), libgnat`'-GNAT_V (= ${gnat:Version}), ${misc:Depends} +Description: GNU Ada compiler selected components (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the runtime shared library. + +Package: libgnatvsn`'GNAT_V-dbg +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: extra +Section: debug +Depends: gnat`'PV-base (= ${gnat:Version}), libgnatvsn`'GNAT_V (= ${gnat:Version}), ${misc:Depends} +Suggests: gnat, ada-compiler +Description: GNU Ada compiler selected components (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the debugging symbols. + +Package: libgnatprj`'GNAT_V-dev +Section: libdevel +Architecture: any +Priority: extra +Depends: gnat`'PV-base (= ${gnat:Version}), gnat`'PV (= ${gnat:Version}), ada-compiler, + libgnatprj`'GNAT_V (= ${gnat:Version}), libgnatvsn`'GNAT_V-dev (= ${gnat:Version}), ${misc:Depends} +Conflicts: libgnatprj-dev (<< `'GNAT_V), libgnatprj4.1-dev, libgnatprj4.3-dev, libgnatprj4.4-dev, libgnatprj4.5-dev, libgnatprj4.6-dev +Description: GNU Ada compiler Project Manager (development files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the development files and static library. + +Package: libgnatprj`'GNAT_V +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: PRI(optional) +Section: libs +Depends: gnat`'PV-base (= ${gnat:Version}), libgnat`'-GNAT_V (= ${gnat:Version}), libgnatvsn`'GNAT_V (= ${gnat:Version}), ${misc:Depends} +Description: GNU Ada compiler Project Manager (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the runtime shared library. + +Package: libgnatprj`'GNAT_V-dbg +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: extra +Section: debug +Depends: gnat`'PV-base (= ${gnat:Version}), libgnatprj`'GNAT_V (= ${gnat:Version}), ${misc:Depends} +Suggests: gnat, ada-compiler +Description: GNU Ada compiler Project Manager (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the debugging symbols. +')`'dnl libgnat + +ifenabled(`lib64gnat',` +Package: lib64gnat`'-GNAT_V +Section: libs +Architecture: biarch64_archs +Priority: PRI(optional) +Depends: gnat`'PV-base (= ${gnat:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: runtime for applications compiled with GNAT (64 bits shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the runtime shared library for 64 bits architectures. +')`'dnl libgnat + +ifenabled(`gfdldoc',` +Package: gnat`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Suggests: gnat`'PV +Conflicts: gnat-4.1-doc, gnat-4.2-doc, gnat-4.3-doc, gnat-4.4-doc, gnat-4.6-doc +Description: GNU Ada compiler (documentation) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the documentation in info `format'. +')`'dnl gfdldoc +')`'dnl ada + +ifenabled(`d ',` +Package: gdc`'PV +Architecture: any +Priority: PRI(optional) +Depends: SOFTBASEDEP, g++`'PV (>= ${gcc:SoftVersion}), libphobos`'PHOBOS_V`'PV-dev (= ${gdc:Version}) [libphobos_no_archs], ${shlibs:Depends}, ${misc:Depends} +Provides: gdc, d-compiler, d-v2-compiler +Replaces: gdc (<< 4.4.6-5) +Description: GNU D compiler (version 2), based on the GCC backend + This is the GNU D compiler, which compiles D on platforms supported by gcc. + It uses the gcc backend to generate optimised code. + . + This compiler supports D language version 2. + +ifenabled(`libphobos',` +Package: libphobos`'PHOBOS_V`'PV`'TS-dev +Architecture: any +Section: libdevel +Priority: PRI(optional) +Depends: gdc`'PV`'TS (= ${gdc:Version}), zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} +Provides: libphobos`'PHOBOS_V`'TS-dev +Description: Phobos D standard library + This is the Phobos standard library that comes with the D2 compiler. + . + For more information check http://www.d-programming-language.org/phobos/ + +Package: libphobos`'PHOBOS_V`'PV`'TS-dbg +Section: debug +Architecture: ifdef(`TARGET',`all',`any') +Priority: extra +Depends: gdc`'PV`'TS (= ${gdc:Version}), libphobos`'PHOBOS_V`'PV-dev (= ${gdc:Version}), ${misc:Depends} +Provides: libphobos`'PHOBOS_V`'TS-dbg +Description: The Phobos D standard library (debug symbols) + This is the Phobos standard library that comes with the D2 compiler. + . + For more information check http://www.d-programming-language.org/phobos/ +')`'dnl libphobos +')`'dnl d + +ifdef(`TARGET',`',`dnl +ifenabled(`libs',` +Package: gcc`'PV-soft-float +Architecture: arm armel armhf +Priority: PRI(optional) +Depends: BASEDEP, ifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float +Description: GCC soft-floating-point gcc libraries (ARM) + These are versions of basic static libraries such as libgcc.a compiled + with the -msoft-float option, for CPUs without a floating-point unit. +')`'dnl commonlibs +')`'dnl + +ifenabled(`fixincl',` +Package: fixincludes +Architecture: any +Priority: PRI(optional) +Depends: BASEDEP, gcc`'PV (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Fix non-ANSI header files + FixIncludes was created to fix non-ANSI system header files. Many + system manufacturers supply proprietary headers that are not ANSI compliant. + The GNU compilers cannot compile non-ANSI headers. Consequently, the + FixIncludes shell script was written to fix the header files. + . + Not all packages with header files are installed on the system, when the + package is built, so we make fixincludes available at build time of other + packages, such that checking tools like lintian can make use of it. +')`'dnl fixincl + +ifenabled(`cdev',` +ifdef(`TARGET', `', ` +ifenabled(`gfdldoc',` +Package: gcc`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Conflicts: gcc-docs (<< 2.95.2) +Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2) +Description: Documentation for the GNU compilers (gcc, gobjc, g++) + Documentation for the GNU compilers in info `format'. +')`'dnl gfdldoc +')`'dnl native +')`'dnl cdev + +ifdef(`TARGET',`',`dnl +ifenabled(`libnof',` +Package: gcc`'PV-nof +Architecture: powerpc +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}ifenabled(`cdev',`, gcc`'PV (= ${gcc:Version})'), ${misc:Depends} +Conflicts: gcc-3.2-nof +Description: GCC no-floating-point gcc libraries (powerpc) + These are versions of basic static libraries such as libgcc.a compiled + with the -msoft-float option, for CPUs without a floating-point unit. +')`'dnl libnof +')`'dnl + +ifenabled(`source',` +Package: gcc`'PV-source +Architecture: all +Priority: PRI(optional) +Depends: make (>= 3.81), autoconf2.64, automake, quilt, patchutils, gawk, ${misc:Depends} +Description: Source of the GNU Compiler Collection + This package contains the sources and patches which are needed to + build the GNU Compiler Collection (GCC). +')`'dnl source +dnl +')`'dnl gcc-X.Y +dnl last line in file --- gcc-4.7-4.7.2.orig/debian/fixincludes.in +++ gcc-4.7-4.7.2/debian/fixincludes.in @@ -0,0 +1,8 @@ +#! /bin/sh + +PATH="/@LIBEXECDIR@/install-tools:$PATH" + +TARGET_MACHINE=`dpkg-architecture -qDEB_HOST_GNU_TYPE` +export TARGET_MACHINE + +exec fixinc.sh "$@" --- gcc-4.7-4.7.2.orig/debian/rules2 +++ gcc-4.7-4.7.2/debian/rules2 @@ -0,0 +1,2290 @@ +#! /usr/bin/make -f +# -*- makefile -*- + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +.SUFFIXES: + +include debian/rules.defs +include debian/rules.parameters + +# some tools +SHELL = /bin/bash -e # brace expansion in rules file +IR = install -m 644 # Install regular file +IP = install -m 755 # Install program +IS = install -m 755 # Install script + +#number of jobs to run for build +ifeq ($(USE_NJOBS),no) + NJOBS := + USE_CPUS := 1 +else + ifeq ($(with_java),yes) + MEM_PER_CPU = 192 + else + MEM_PER_CPU = 128 + endif + NUM_CPUS := $(shell if echo $(USE_NJOBS) | grep -q -E '^[0-9]+$$'; \ + then echo $(USE_NJOBS); \ + else getconf _NPROCESSORS_ONLN 2>/dev/null || echo 1; fi) + USE_CPUS := $(shell mt=`awk '/^MemTotal/ { print $$2 }' /proc/meminfo`; \ + awk -vn=$(NUM_CPUS) -vmt=$$mt -vm=$(MEM_PER_CPU) \ + 'END { mt/=1024; n2 = int(mt/m); print n==1 ? 1 : n2 in DEB_BUILD_OPTIONS (see #209008) +ifneq (,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS)))) + NJOBS := -j $(subst parallel=,,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS)))) +endif + +# kernel-specific ulimit hack +ifeq ($(findstring linux,$(DEB_HOST_GNU_SYSTEM)),linux) + ULIMIT_M = if [ -e /proc/meminfo ]; then \ + m=`awk '/^((Mem|Swap)Free|Cached)/{m+=$$2}END{print int(m*.9)}' \ + /proc/meminfo`; \ + else \ + m=`vmstat --free --swap-free --kilobytes|awk '{m+=$$2}END{print int(m*.9)}'`; \ + fi; \ + ulimit -m $$m; \ + echo "Limited memory for test runs to `ulimit -m`kB" +else + ULIMIT_M = true +endif + +ifeq ($(locale_data),generate) + SET_LOCPATH = LOCPATH=$(PWD)/locales +endif + +SET_PATH = PATH=$(PWD)/bin:/usr/$(libdir)/gcc/bin:$$PATH +ifeq ($(trunk_build),yes) + ifneq (,$(findstring sparc64-linux,$(DEB_TARGET_GNU_TYPE))) + SET_PATH = PATH=/usr/lib/gcc-snapshot/bin:$(PWD)/bin:/usr/$(libdir)/gcc/bin:$$PATH + endif + ifneq (,$(findstring ppc64-linux,$(DEB_TARGET_GNU_TYPE))) + SET_PATH = PATH=/usr/lib/gcc-snapshot/bin:$(PWD)/bin:/usr/$(libdir)/gcc/bin:$$PATH + endif +endif + +# the recipient for the test summaries. Send with: debian/rules mail-summary +S_EMAIL = gcc@packages.debian.org gcc-testresults@gcc.gnu.org + +# build not yet prepared to take variables from the environment +define unsetenv + unexport $(1) + $(1) = +endef +$(foreach v, CPPFLAGS CFLAGS CXXFLAGS FFLAGS LDFLAGS, $(if $(filter environment,$(origin $(v))),$(eval $(call unsetenv, $(v))))) + +ifeq ($(REVERSE_CROSS),yes) + CC = +else + CC = $(if $(filter yes,$(with_ada)),gnatgcc,gcc) +endif + +ifneq ($(distribution),Ubuntu) + ifneq (,$(filter $(DEB_TARGET_ARCH), arm armel mips mipsel)) + STAGE1_CFLAGS = -g -O2 + endif +endif + +ifeq ($(with_d),yes) + CFLAGS += -std=gnu99 + LDFLAGS += -lm +endif + +ifeq ($(with_ssp_default),yes) + STAGE1_CFLAGS = -g -U_FORTIFY_SOURCE + BOOT_CFLAGS = -g -O2 + LIBCFLAGS = -g -O2 + LIBCXXFLAGS = -g -O2 -fno-implicit-templates + # Only use -fno-stack-protector when known to the stage1 compiler. + cc-fno-stack-protector := $(shell if $(CC) $(CFLAGS) -fno-stack-protector \ + -S -o /dev/null -xc /dev/null > /dev/null 2>&1; \ + then echo "-fno-stack-protector"; fi;) + $(foreach var,STAGE1_CFLAGS BOOT_CFLAGS LIBCFLAGS LIBCXXFLAGS,$(eval \ + $(var) += $(cc-fno-stack-protector))) +endif + +ifeq ($(DEB_CROSS),yes) + CFLAGS = -g -O2 +endif + +ifneq (,$(findstring static,$(DEB_BUILD_OPTIONS))) + LDFLAGS += -static +endif + +CFLAGS_TO_PASS = \ + $(if $(CFLAGS),CFLAGS="$(CFLAGS)") \ + $(if $(BOOT_CFLAGS),BOOT_CFLAGS="$(BOOT_CFLAGS)") \ + $(if $(LIBCFLAGS),LIBCFLAGS="$(LIBCFLAGS)") \ + $(if $(LIBCXXFLAGS),LIBCXXFLAGS="$(LIBCXXFLAGS)") +LDFLAGS_TO_PASS = \ + $(if $(LDFLAGS),LDFLAGS="$(LDFLAGS)") +STAGE1_CFLAGS_TO_PASS = \ + $(if $(STAGE1_CFLAGS),STAGE1_CFLAGS="$(STAGE1_CFLAGS)") + +docdir = usr/share/doc + +CONFARGS = -v \ + --with-pkgversion='$(distribution)$(if $(with_linaro_branch),/Linaro)___$(DEB_VERSION)' \ + --with-bugurl='file:///usr/share/doc/$(PKGSOURCE)/README.Bugs' + +CONFARGS += \ + --enable-languages=$(subst $(SPACE),$(COMMA),$(enabled_languages)) \ + --prefix=/$(PF) + +ifeq ($(versioned_packages),yes) + CONFARGS += --program-suffix=-$(BASE_VERSION) +endif + +ifdef DEB_STAGE + CONFARGS += \ + --disable-libgomp \ + --disable-libmudflap \ + --disable-libssp \ + --disable-multilib \ + --disable-libquadmath \ + --disable-threads \ + --libexecdir=/$(libexecdir) \ + --libdir=/$(PF)/$(configured_libdir) \ + --with-build-sysroot=$(with_build_sysroot) \ + --with-sysroot=$(with_sysroot) + + ifeq ($(DEB_STAGE),stage1) + CONFARGS += \ + --disable-shared \ + --with-newlib \ + --without-headers + else + # stage2 + CONFARGS += \ + --enable-shared + endif +else + CONFARGS += \ + --enable-shared \ + --enable-linker-build-id \ + --with-system-zlib \ + +ifneq ($(single_package),yes) + CONFARGS += \ + --libexecdir=/$(libexecdir) \ + --without-included-gettext \ + --enable-threads=posix \ + --with-gxx-include-dir=/$(cxx_inc_dir) \ + --libdir=/$(PF)/$(configured_libdir) +endif + +ifneq ($(with_cpp),yes) + CONFARGS += --disable-cpp +endif + +ifeq ($(with_nls),yes) + CONFARGS += --enable-nls +else + CONFARGS += --disable-nls +endif + +ifeq ($(with_bootstrap),off) + CONFARGS += --disable-bootstrap +else ifneq ($(with_bootstrap),) + CONFARGS += --enable-bootstrap=$(with_bootstrap) +endif + +ifneq ($(with_sysroot),) + CONFARGS += --with-sysroot=$(with_sysroot) +endif +ifneq ($(with_build_sysroot),) + CONFARGS += --with-build-sysroot=$(with_build_sysroot) +endif + +ifeq ($(force_gnu_locales),yes) + CONFARGS += --enable-clocale=gnu +endif + +ifeq ($(with_cxx)-$(with_debug),yes-yes) + CONFARGS += --enable-libstdcxx-debug +endif +CONFARGS += --enable-libstdcxx-time=yes + +ifeq (,$(filter $(DEB_TARGET_ARCH), hurd-i386 kfreebsd-i386 kfreebsd-amd64)) + CONFARGS += --enable-gnu-unique-object +endif + +ifneq ($(with_ssp),yes) + CONFARGS += --disable-libssp +endif + +ifneq ($(with_mudflap),yes) + CONFARGS += --disable-libmudflap +endif + +ifneq ($(with_gomp),yes) + CONFARGS += --disable-libgomp +endif + +ifneq ($(with_itm),yes) + CONFARGS += --disable-libitm +endif + +ifeq ($(with_plugins),yes) + CONFARGS += --enable-plugin +endif + +#ifeq ($(with_gold),yes) +# CONFARGS += --enable-gold --enable-ld=default +#endif + +#CONFARGS += --with-plugin-ld=ld.gold +#CONFARGS += --with-plugin-ld + +jvm_name_short = java-1.5.0-gcj-$(BASE_VERSION)$(if $(findstring snap,$(PKGSOURCE)),-snap) +jvm_name_long = $(jvm_name_short)-1.5.0.0 + +ifeq ($(with_java),yes) + CONFARGS += --disable-browser-plugin + ifeq ($(with_java_maintainer_mode),yes) + CONFARGS += --enable-java-maintainer-mode + endif + ifeq ($(with_java_biarch_awt),yes) + CONFARGS += --enable-java-awt=$(subst $(SPACE),$(COMMA),$(foreach p,$(java_awt_peers),$(p)-default)) + else + CONFARGS += --enable-java-awt=$(subst $(SPACE),$(COMMA),$(foreach p,$(java_awt_peers),$(p))) + endif + ifneq (,$(findstring gtk,$(java_awt_peers))) + CONFARGS += --enable-gtk-cairo + endif + jvm_dir = /usr/lib/jvm/$(jvm_name_short) + CONFARGS += --with-java-home=$(jvm_dir)/jre + CONFARGS += --enable-java-home \ + --with-jvm-root-dir=$(jvm_dir) \ + --with-jvm-jar-dir=/usr/lib/jvm-exports/$(jvm_name_short) + CONFARGS += --with-arch-directory=$(java_cpu) + ifeq (./,$(dir $(ecj_jar))) + CONFARGS += --with-ecj-jar=$(jvm_dir)/lib/ecj.jar + else + CONFARGS += --with-ecj-jar=$(ecj_jar) + endif +endif + +ifeq ($(with_gcj),yes) + ifeq ($(DEB_HOST_GNU_CPU),m32r) + CONFARGS += --enable-libgcj + endif +endif + +ifeq ($(with_objc)-$(with_objc_gc),yes-yes) + CONFARGS += --enable-objc-gc +endif + +ifneq (,$(filter $(DEB_TARGET_GNU_TYPE), i486-linux-gnu i586-linux-gnu i686-linux-gnu)) + ifeq ($(biarch64),yes) + CONFARGS += --enable-targets=all + endif +endif + +ifneq (,$(filter $(DEB_TARGET_GNU_TYPE), x86_64-linux-gnu x86_64-kfreebsd-gnu s390x-linux-gnu)) + ifneq ($(biarch32),yes) + CONFARGS += --disable-multilib + endif +endif + +ifneq (,$(filter $(DEB_TARGET_GNU_TYPE), powerpc-linux-gnu powerpc-linux-gnuspe)) + CONFARGS += --enable-secureplt + ifeq ($(biarch64),yes) + CONFARGS += --disable-softfloat \ + --enable-targets=powerpc-linux,powerpc64-linux --with-cpu=default32 + else + CONFARGS += --disable-multilib + endif +endif + +ifneq (,$(findstring powerpc64-linux,$(DEB_TARGET_GNU_TYPE))) + CONFARGS += --enable-secureplt + ifeq ($(biarch32),yes) + CONFARGS += --disable-softfloat --enable-targets=powerpc64-linux,powerpc-linux + else + CONFARGS += --disable-multilib + endif + ifeq ($(distribution),Ubuntu) + CONFARGS += --with-cpu-32=power7 --with-cpu-64=power7 + endif +endif + +ifeq ($(REVERSE_CROSS),yes) + # FIXME: requires ppl and cloog headers for the target + ifeq ($(trunk_build),yes) + CONFARGS += --without-isl + else + CONFARGS += --without-ppl + endif + # FIXME: build currently fails build the precompiled headers + CONFARGS += --disable-libstdcxx-pch +endif +endif # !DEB_STAGE + +ifeq ($(findstring powerpcspe,$(DEB_TARGET_ARCH)),powerpcspe) + CONFARGS += --with-cpu=8548 --enable-e500_double --with-long-double-128 +endif + +ifneq (,$(findstring softfloat,$(DEB_TARGET_GNU_CPU))) + CONFARGS += --with-float=soft +endif + +ifneq (,$(findstring arm-vfp,$(DEB_TARGET_GNU_CPU))) + CONFARGS += --with-fpu=vfp +endif + +ifneq (,$(findstring arm, $(DEB_TARGET_GNU_CPU))) + ifeq ($(multilib),yes) + CONFARGS += --enable-multilib + endif + CONFARGS += --disable-sjlj-exceptions + # FIXME: libjava is not ported for thumb, this hack only works for + # separate gcj builds + ifneq (,$(filter armhf,$(DEB_TARGET_ARCH))) + ifneq (,$(findstring gcj,$(PKGSOURCE))) + with_arm_arch = armv6 + else + with_arm_arch = armv7-a + endif + with_arm_fpu = vfpv3-d16 + else + # armel + ifeq ($(distribution),Debian) + with_arm_arch = armv4t + else ifneq (,$(filter $(distrelease),karmic)) + with_arm_arch = armv6 + with_arm_fpu = vfpv3-d16 + else ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise)) + ifneq (,$(findstring gcj,$(PKGSOURCE))) + with_arm_arch = armv6 + else + with_arm_arch = armv7-a + endif + with_arm_fpu = vfpv3-d16 + else + with_arm_arch = armv5t # starting with quantal + endif + endif + CONFARGS += --with-arch=$(with_arm_arch) + ifneq (,$(with_arm_fpu)) + CONFARGS += --with-fpu=$(with_arm_fpu) + endif + CONFARGS += --with-float=$(float_abi) + ifeq ($(with_arm_thumb),yes) + CONFARGS += --with-mode=thumb + endif +endif + +ifeq ($(DEB_TARGET_GNU_CPU),$(findstring $(DEB_TARGET_GNU_CPU),m68k)) + CONFARGS += --disable-werror +endif +# FIXME: correct fix-warnings.dpatch +ifeq ($(distribution),Ubuntu) + CONFARGS += --disable-werror +endif + +ifneq (,$(findstring sparc-linux,$(DEB_TARGET_GNU_TYPE))) + ifeq ($(biarch64),yes) + CONFARGS += --enable-targets=all + endif +endif + +ifneq (,$(findstring sparc64-linux,$(DEB_TARGET_GNU_TYPE))) + ifneq ($(biarch32),yes) + CONFARGS += --disable-multilib + endif +endif + +ifneq (,$(findstring ia64-linux,$(DEB_TARGET_GNU_TYPE))) + CONFARGS += --with-system-libunwind +endif + +ifneq (,$(findstring sh4-linux,$(DEB_TARGET_GNU_TYPE))) + CONFARGS += --with-multilib-list=m4,m4-nofpu --with-cpu=sh4 +endif + +ifneq (,$(findstring m68k-linux,$(DEB_TARGET_GNU_TYPE))) + CONFARGS += --disable-multilib +endif + +ifeq ($(DEB_TARGET_ARCH_OS),linux) + ifneq (,$(findstring $(DEB_TARGET_ARCH), alpha powerpc ppc64 s390 s390x sparc sparc64)) + qualifier := $(shell dpkg --assert-multi-arch >/dev/null 2>&1 && echo ':$(DEB_TARGET_ARCH)') + ifeq ($(DEB_TARGET_ARCH),alpha) + glibc_version := $(shell dpkg -s libc6.1$(qualifier) | awk '/^Version:/ {print $$2}') + else + glibc_version := $(shell dpkg -s libc6$(qualifier) | awk '/^Version:/ {print $$2}') + endif + with_ldbl128 := $(shell dpkg --compare-versions $(glibc_version) gt 2.3.99 && echo yes) + ifeq ($(with_ldbl128),yes) + CONFARGS += --with-long-double-128 + endif + endif +endif + +ifneq (,$(filter $(DEB_TARGET_ARCH), amd64 i386 kfreebsd-i386 kfreebsd-amd64)) + ifneq (,$(filter $(distrelease),etch lenny dapper hardy)) + CONFARGS += --with-arch-32=i486 + else ifneq (,$(filter $(distrelease),squeeze wheezy sid jaunty karmic lucid)) + CONFARGS += --with-arch-32=i586 + else + CONFARGS += --with-arch-32=i686 + endif +endif + +ifneq (,$(filter $(DEB_TARGET_ARCH), amd64 i386)) + ifeq ($(DEB_TARGET_ARCH),amd64) + CONFARGS += --with-abi=m64 + endif + CONFARGS += --with-multilib-list=m32,m64$(if $(filter yes,$(biarchx32)),$(COMMA)mx32) +else ifeq ($(DEB_TARGET_ARCH),x32) + CONFARGS += --with-abi=mx32 --with-multilib-list=mx32,m64,m32 +endif + +ifneq (,$(filter $(DEB_TARGET_ARCH), hurd-i386)) + CONFARGS += --with-arch=i586 +endif + +ifeq ($(DEB_TARGET_ARCH),lpia) + CONFARGS += --with-arch=pentium-m --with-tune=i586 +endif + +ifneq (,$(filter $(DEB_TARGET_ARCH), amd64 i386 hurd-i386 kfreebsd-i386 kfreebsd-amd64)) + CONFARGS += --with-tune=generic +endif + +ifneq (,$(findstring mips-linux,$(DEB_TARGET_GNU_TYPE))) + CONFARGS += --with-mips-plt + CONFARGS += --with-arch-32=mips2 --with-tune-32=mips32 + ifeq ($(biarchn32)-$(biarch64),yes-yes) + CONFARGS += --enable-targets=all + CONFARGS += --with-arch-64=mips3 --with-tune-64=mips64 + endif +endif + +ifneq (,$(findstring mipsel-linux,$(DEB_TARGET_GNU_TYPE))) + CONFARGS += --with-mips-plt + CONFARGS += --with-arch-32=mips2 --with-tune-32=mips32 + ifeq ($(biarchn32)-$(biarch64),yes-yes) + CONFARGS += --enable-targets=all + CONFARGS += --with-arch-64=mips3 --with-tune-64=mips64 + endif +endif + +ifneq (,$(findstring s390-linux,$(DEB_TARGET_GNU_TYPE))) + ifeq ($(biarch64),yes) + CONFARGS += --enable-targets=all + endif +endif + +ifneq (,$(findstring hppa-linux,$(DEB_TARGET_GNU_TYPE))) + CONFARGS += --disable-libstdcxx-pch +endif + +ifneq (,$(findstring gdc, $(PKGSOURCE))) + CONFARGS += --disable-libquadmath +endif + +ifeq ($(trunk_build),yes) + ifeq ($(findstring --disable-werror, $(CONFARGS)),) + CONFARGS += --disable-werror + endif + CONFARGS += --enable-checking=yes +else + CONFARGS += --enable-checking=release +endif + +CONFARGS += \ + --build=$(DEB_BUILD_GNU_TYPE) \ + --host=$(DEB_HOST_GNU_TYPE) \ + --target=$(TARGET_ALIAS) + +ifeq ($(DEB_CROSS),yes) + CONFARGS += \ + --program-prefix=$(TARGET_ALIAS)- \ + --includedir=/$(PFL)/include + ifndef DEB_STAGE + CONFARGS += \ + --with-headers=/$(PFL)/include \ + --with-libs=/$(PFL)/lib + endif + # FIXME: dpkg-shlibdeps doesn't work without this + SET_CROSS_LIB_PATH = LD_LIBRARY_PATH=/lib:/usr/lib:$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}/$(PF)/$(DEB_TARGET_GNU_TYPE)/lib$${DIRNAME} + ifeq ($(DEB_TARGET_ARCH),armel) + SET_CROSS_LIB_PATH = LD_LIBRARY_PATH=/lib:/usr/lib:$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}/$(PF)/$(DEB_TARGET_GNU_TYPE)/lib$${DIRNAME}:/$(PF)/arm-linux-gnueabihf/lib + endif + ifeq ($(DEB_TARGET_ARCH),armhf) + SET_CROSS_LIB_PATH = LD_LIBRARY_PATH=/lib:/usr/lib:$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}/$(PF)/$(DEB_TARGET_GNU_TYPE)/lib$${DIRNAME}:/$(PF)/arm-linux-gnueabi/lib + endif +endif + +ifeq ($(with_bootstrap),off) + bootstrap_target = +else ifeq ($(with_bootstrap),) + bootstrap_target = bootstrap-lean + # no profiledbootstrap on the following architectures + # - m68k: we're happy that it builds at all + no_profiled_bs_archs := alpha arm arm64 hppa m68k + ifeq (,$(findstring $(DEB_TARGET_GNU_CPU),$(no_profiled_bs_archs))) + bootstrap_target = profiledbootstrap + # FIXME: disabled for first uploads + bootstrap_target = bootstrap-lean + endif + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + bootstrap_target = bootstrap-lean + endif + ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + bootstrap_target = bootstrap-lean + endif + + # disable profiled bootstrap on slow archs, get to testing first ... + ifeq ($(distribution),Debian) + ifneq (,$(filter $(DEB_TARGET_ARCH), arm arm64 armel armhf mips mipsel sparc)) + bootstrap_target = bootstrap-lean + endif + endif + ifeq ($(distribution),Ubuntu) + ifneq (,$(filter $(DEB_TARGET_ARCH), arm64 sparc)) + bootstrap_target = bootstrap-lean + endif + endif +endif + +DEJAGNU_TIMEOUT=300 +# Increase the timeout for one testrun on slow architectures +ifeq ($(distribution),Debian) + ifneq (,$(findstring $(DEB_TARGET_ARCH),arm arm64 armel armhf hppa m68k sparc)) + DEJAGNU_TIMEOUT=600 + else ifneq (,$(findstring $(DEB_TARGET_GNU_CPU),amd64 i386 i486 i686 lpia)) + DEJAGNU_TIMEOUT=180 + endif + ifeq ($(DEB_TARGET_GNU_SYSTEM),gnu) + DEJAGNU_TIMEOUT=900 + endif +else ifeq ($(distribution),Ubuntu) + ifneq (,$(findstring $(DEB_TARGET_ARCH),arm64 armel armhf hppa ia64 sparc)) + DEJAGNU_TIMEOUT=600 + else ifneq (,$(findstring $(DEB_TARGET_GNU_CPU),amd64 i386 i486 i686 lpia)) + DEJAGNU_TIMEOUT=180 + endif +endif + +DEJAGNU_RUNS = +ifneq ($(trunk_build),yes) +ifeq ($(with_ssp),yes) + ifneq ($(single_package),yes) + DEJAGNU_RUNS += $(if $(filter yes,$(with_ssp_default)),-fno-stack-protector,-fstack-protector) + endif + # FIXME Ubuntu armel buildd hangs + ifneq (,$(findstring arm, $(DEB_TARGET_GNU_CPU))) + DEJAGNU_RUNS = + endif + ifeq ($(distribution),Ubuntu) + # the buildds are just slow ... don't check the non-default + ifneq (,$(findstring $(DEB_TARGET_GNU_CPU),ia64 powerpc sparc)) + DEJAGNU_RUNS = + endif + endif +endif +endif + +ifeq ($(distribution),Ubuntu) + ifneq (,$(findstring arm, $(DEB_TARGET_GNU_CPU))) + ifeq ($(with_arm_thumb),yes) + #DEJAGNU_RUNS += -marm + else + DEJAGNU_RUNS += -mthumb + endif + endif +endif + +ifeq ($(with_32bit_check),yes) + DEJAGNU_RUNS += -m32 +endif +ifeq ($(with_64bit_check),yes) + ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),mips mipsel)) + DEJAGNU_RUNS += -mabi=64 + else + DEJAGNU_RUNS += -m64 + endif +endif +ifeq ($(with_n32bit_check),yes) + DEJAGNU_RUNS += -mabi=n32 +endif +ifeq ($(biarchx32)-$(with_x32bit_check),yes-yes) + DEJAGNU_RUNS += -mx32 +endif + +# gdc is not multilib'd +ifneq (,$(findstring gdc, $(PKGSOURCE))) + DEJAGNU_RUNS = +endif + +# neither is gnat +ifneq (,$(findstring gnat, $(PKGSOURCE))) + DEJAGNU_RUNS = +endif + +ifneq (,$(DEJAGNU_RUNS)) + RUNTESTFLAGS = RUNTESTFLAGS="--target_board=unix\{,$(subst $(SPACE),$(COMMA),$(strip $(DEJAGNU_RUNS)))\}" +endif + +# PF is the installation prefix for the package without the leading slash. +# It's "usr" for gcc releases. +ifneq (,$(PF)) + # use value set in the environment +else ifeq ($(trunk_build),yes) + PF = usr/lib/gcc-snapshot +else ifeq ($(PKGSOURCE),gcc-linaro) + PF = usr/lib/gcc-linaro +else + PF = usr +endif + +# PFL is the installation prefix with DEB_TARGET_GNU_TYPE attached for cross builds +ifeq ($(DEB_CROSS),yes) + PFL = $(PF)/$(DEB_TARGET_GNU_TYPE) +else + PFL = $(PF) +endif + +# RPF is the base prefix or installation prefix with DEB_TARGET_GNU_TYPE attached for cross builds +ifeq ($(DEB_CROSS),yes) + RPF = $(PF)/$(DEB_TARGET_GNU_TYPE) +else + RPF = +endif + +ifeq ($(with_multiarch_lib),yes) + ifeq ($(DEB_CROSS),yes) + libdir = lib + else + libdir = lib/$(DEB_TARGET_MULTIARCH) + endif +else + libdir = lib +endif +configured_libdir = lib + +spulibexecdir = $(PF)/lib +hppa64libexecdir= $(PF)/lib + +# /usr/libexec doesn't follow the FHS +ifeq ($(single_package),yes) + libdir = lib + libexecdir = $(PF)/libexec + versiondir = $(GCC_VERSION) +else + libexecdir = $(PF)/$(configured_libdir) + versiondir = $(BASE_VERSION) +endif +buildlibdir = $(builddir)/$(TARGET_ALIAS) + +gcc_lib_dir = $(PF)/$(configured_libdir)/gcc/$(TARGET_ALIAS)/$(versiondir) +gcc_lexec_dir = $(libexecdir)/gcc/$(TARGET_ALIAS)/$(versiondir) +gcc_spu_lib_dir = $(PF)/spu/lib/gcc/spu/$(versiondir) +gcc_spu_lexec_dir = $(spulibexecdir)/gcc/spu/$(versiondir) + +lib32 = $(PF)/lib32 +lib64 = lib64 +libn32 = lib32 +libx32 = libx32 + +p_l= $(1)$(cross_lib_arch) +p_d= $(1)-dbg$(cross_lib_arch) +d_l= debian/$(p_l) +d_d= debian/$(p_d) + +ifeq ($(DEB_CROSS),yes) + usr_lib = $(PFL)/lib + + # sh4 has multilib. base is sh4-linux-gnu. See #663028. + ifneq (,$(findstring sh4-linux,$(DEB_TARGET_GNU_TYPE))) + usr_lib = $(PFL)/lib/sh4-linux-gnu/ + endif +else + usr_lib = $(PFL)/$(libdir) +endif +usr_lib32 = $(PFL)/lib32 +usr_libn32 = $(PFL)/lib32 +usr_libx32 = $(PFL)/libx32 +usr_lib64 = $(PFL)/lib64 +# FIXME: Don't hard code +usr_libhf = $(PFL)/lib/arm-linux-gnueabihf +usr_libsf = $(PFL)/lib/arm-linux-gnueabi + +gcc_lib_dir32 = $(gcc_lib_dir)/$(biarch32subdir) +gcc_lib_dirn32 = $(gcc_lib_dir)/$(biarchn32subdir) +gcc_lib_dirx32 = $(gcc_lib_dir)/$(biarchx32subdir) +gcc_lib_dir64 = $(gcc_lib_dir)/$(biarch64subdir) +# FIXME: Don't hard code +gcc_lib_dirhf = $(gcc_lib_dir)/$(biarchhfsubdir) +gcc_lib_dirsf = $(gcc_lib_dir)/$(biarchsfsubdir) + +libgcc_dir = $(RPF)/$(libdir) +# yes, really; lib32gcc_s ends up in usr +libgcc_dir32 = $(PFL)/lib32 +libgcc_dirn32 = $(RPF)/lib32 +# libx32gcc_s also ends up in usr +libgcc_dirx32 = $(PFL)/libx32 +libgcc_dir64 = $(RPF)/lib64 +libgcc_dirhf = $(RPF)/lib/arm-linux-gnueabihf +libgcc_dirsf = $(RPF)/lib/arm-linux-gnueabi + +# install_gcc_lib(lib,soname,flavour,package) +define install_gcc_lib + mv $(d)/$(usr_lib$(3))/$(1)*.a debian/$(4)/$(gcc_lib_dir$(3))/ + rm -f $(d)/$(usr_lib$(3))/$(1)*.{la,so} + dh_link -p$(4) \ + /$(usr_lib$(3))/$(1).so.$(2) /$(gcc_lib_dir$(3))/$(1).so + +endef + +checkdirs = $(builddir) +ifeq ($(with_separate_libgcj),yes) + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + ifneq ($(with_standalone_gcj),yes) + checkdirs = $(buildlibdir)/libffi $(buildlibdir)/libjava + endif + endif +endif +ifeq ($(with_separate_go),yes) + ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION)) + checkdirs = $(buildlibdir)/libgo + endif +endif +ifeq ($(with_separate_gnat),yes) + ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + checkdirs = $(builddir)/gcc + endif +endif + +ifneq ($(DEB_CROSS),yes) + ifneq ($(single_package),yes) + cxx_inc_dir = $(PF)/include/c++/$(BASE_VERSION) + else + cxx_inc_dir = $(PF)/include/c++/$(GCC_VERSION) + endif +else + cxx_inc_dir = $(PF)/$(TARGET_ALIAS)/include/c++/$(GCC_VERSION) +endif + +default: build + +configure: $(configure_dependencies) + +$(configure_dummy_stamp): + touch $(configure_dummy_stamp) + +$(configure_stamp): + dh_testdir + : # give information about the build process + @echo "------------------------ Build process variables ------------------------" + @echo "Number of parallel processes used for the build: $(USE_CPUS)" + @echo "Package source: $(PKGSOURCE)" + @echo "GCC version: $(GCC_VERSION)" + @echo "Base Debian version: $(BASE_VERSION)" + @echo -e "Configured with: $(subst ___, ,$(foreach i,$(CONFARGS),$(i)\n\t))" +ifeq ($(DEB_CROSS),yes) + @echo "Building cross compiler for $(DEB_TARGET_ARCH)" +endif + @echo "Using shell $(SHELL)" + @echo "Architecture: $(DEB_TARGET_ARCH) (GNU: $(TARGET_ALIAS))" + @echo "CPPFLAGS: $(CPPFLAGS)" + @echo "CFLAGS: $(CFLAGS)" + @echo "LDFLAGS: $(LDFLAGS)" + @echo "BOOT_CFLAGS: $(BOOT_CFLAGS)" + @echo "DEBIAN_BUILDARCH: $(DEBIAN_BUILDARCH)" + @echo "Install prefix: /$(PF)" +ifeq ($(biarchn32)-$(biarch64),yes-yes) + @echo "Will build the triarch compilers (o32/n32/64, defaulting to o32)" +else ifeq ($(biarch64)-$(biarch32),yes-yes) + @echo "Will build the triarch compilers (x32/64/32, defaulting to x32)" +else ifeq ($(biarch64)-$(biarchx32),yes-yes) + @echo "Will build the triarch compilers (32/64/x32, defaulting to 32bit)" +else ifeq ($(biarch32)-$(biarchx32),yes-yes) + @echo "Will build the triarch compilers (64/32/x32, defaulting to 64bit)" +else + ifeq ($(biarch64),yes) + @echo "Will build the biarch compilers (32/64, defaulting to 32bit)" + else + ifeq ($(biarch32),yes) + @echo "Will build the biarch compilers (64/32, defaulting to 64bit)" + else + @echo "Will not build the biarch compilers" + endif + endif +endif + +ifeq ($(with_cxx),yes) + @echo "Will build the C++ compiler" +else + @echo "Will not build the C++ compiler: $(with_cxx)" +endif +ifeq ($(with_objc),yes) + @echo "Will build the ObjC compiler." + ifeq ($(with_objc_gc),yes) + @echo "Will build the extra ObjC runtime for garbage collection." + else + @echo "Will not build the extra ObjC runtime for garbage collection." + endif +else + @echo "Will not build the ObjC compiler: $(with_objc)" +endif +ifeq ($(with_objcxx),yes) + @echo "Will build the Obj-C++ compiler" +else + @echo "Will not build the Obj-C++ compiler: $(with_objcxx)" +endif +ifeq ($(with_fortran),yes) + @echo "Will build the Fortran 95 compiler." +else + @echo "Will not build the Fortran 95 compiler: $(with_fortran)" +endif +ifeq ($(with_java),yes) + @echo "Will build the Java compiler." +else + @echo "Will not build the Java compiler: $(with_java)" +endif +ifeq ($(with_ada),yes) + @echo "Will build the Ada compiler." + ifeq ($(with_libgnat),yes) + @echo "Will build the shared Ada libraries." + else + @echo "Will not build the shared Ada libraries." + endif +else + @echo "Will not build the Ada compiler: $(with_ada)" +endif +ifeq ($(with_go),yes) + @echo "Will build the Go compiler." +else + @echo "Will not build the Go compiler: $(with_go)" +endif +ifeq ($(with_d),yes) + @echo "Will build the D compiler" + ifeq ($(with_libphobos),yes) + @echo "Will build the phobos D runtime library." + else + @echo "Will not build the phobos D runtime library: $(with_libphobos)" + endif +else + @echo "Will not build the D compiler: $(with_d)" +endif +ifeq ($(with_ssp),yes) + @echo "Will build with SSP support." +else + @echo "Will build without SSP support: $(with_ssp)" +endif +ifeq ($(with_check),yes) + @echo "Will run the testsuite." + ifeq ($(biarch64),yes) + ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),mips mipsel)) + @echo 'Will run the testsuite with -mabi=64: $(with_64bit_check)' + else + @echo 'Will run the testsuite with -m64: $(with_64bit_check)' + endif + endif + ifeq ($(biarch32),yes) + @echo 'Will run the testsuite with -m32: $(with_32bit_check)' + endif + ifeq ($(biarchn32),yes) + @echo 'Will run the testsuite with -mabi=n32: $(with_n32bit_check)' + endif + ifeq ($(biarchx32),yes) + @echo "Will run the testsuite with -mx32: $(with_x32bit_check)" + endif +else + @echo "Will not run the testsuite: $(with_check)" +endif +ifeq ($(with_nls),yes) + @echo "Will enable national language support." +else + @echo "Will disable national language support: $(with_nls)" +endif + @echo "-----------------------------------------------------------------------------" + @echo "" +ifeq ($(with_check),yes) + @if echo "spawn true" | /usr/bin/expect -f - >/dev/null; then \ + : ; \ + else \ + echo "expect is failing on your system with the above error, which means the GCC"; \ + echo "testsuite will fail. Please resolve the above issues and retry the build."; \ + echo "-----------------------------------------------------------------------------"; \ + exit 1; \ + fi +endif + rm -f $(configure_stamp) $(build_stamp) + cat debian/README.Debian $(patch_stamp) > debian/README.Debian.$(DEB_TARGET_ARCH) + + rm -rf $(builddir) + mkdir $(builddir) + + : # configure + cd $(builddir) \ + && $(SET_PATH) \ + CC="$(CC)" \ + $(SET_SHELL) \ + LD_LIBRARY_PATH=$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}$(builddir)/gcc/ada/rts \ + ../src/configure $(subst ___, ,$(CONFARGS)) + + touch $(configure_stamp) + +build: $(build_dependencies) + +$(build_dummy_stamp): + touch $(build_dummy_stamp) + +$(build_locale_stamp): +ifeq ($(locale_data)-$(with_cxx),generate-yes) + : # build locales needed by libstdc++ testsuite + rm -rf locales + mkdir locales + - sh debian/locale-gen +endif + touch $(build_locale_stamp) + + +$(build_stamp): $(configure_stamp) $(build_locale_stamp) + dh_testdir + rm -f bootstrap-protocol +# DEB_CROSS is never set if REVERSE_CROSS is set and vice-versa. +# DEB_CROSS build +ifeq ($(DEB_CROSS),yes) + : # build cross compiler for $(TARGET_ALIAS) + ( \ + set +e; \ + $(SET_PATH) \ + $(SET_LOCPATH) \ + $(MAKE) -C $(builddir) $(NJOBS) \ + CC="$(CC)" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + ; \ + echo $$? > status; \ + ) 2>&1 | tee bootstrap-protocol + s=`cat status`; rm -f status; test $$s -eq 0 +else + # REVERSE_CROSS build + ifeq ($(REVERSE_CROSS),yes) + : # build cross compiler for $(TARGET_ALIAS) + ( \ + set +e; \ + $(SET_PATH) \ + $(SET_LOCPATH) \ + $(MAKE) -C $(builddir) $(NJOBS) \ + CC="$(CC)" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + ; \ + echo $$? > status; \ + ) 2>&1 | tee bootstrap-protocol + s=`cat status`; rm -f status; test $$s -eq 0 +else + # Native build + ifeq ($(with_java),yes) + mkdir -p bin + ln -sf /usr/bin/fastjar bin/jar + ifeq ($(with_native_ecj),yes) + : # prepare the standalone ecj jar + cp /usr/share/java/ecj.jar $(srcdir)/ecj-standalone.jar + zip -d $(srcdir)/ecj-standalone.jar 'org/eclipse/jdt/core/JDTCompilerAdapter*' + endif + ifeq ($(with_java_maintainer_mode),yes) + ( \ + echo '#!/bin/sh'; \ + echo 'exec gij-4.3 -cp /usr/share/java/ecj.jar org.eclipse.jdt.internal.compiler.batch.GCCMain "$$@"'; \ + ) > bin/ecj1 + chmod +x bin/ecj1 + : # If we don't have gjavah in PATH, try to build it with the old gij + mkdir -p bin + if [ -x /usr/bin/gjavah-4.3 ]; then \ + ln -sf /usr/bin/gjavah-4.3 bin/gjavah; \ + elif [ -x bin/gjavah ]; then \ + : ; \ + else \ + mkdir -p $(builddir)/java_hacks; \ + cd $(builddir)/java_hacks; \ + cp -a $(srcdir)/libjava/classpath/tools/external external; \ + mkdir -p gnu/classpath/tools; \ + cp -a $(srcdir)/libjava/classpath/tools/gnu/classpath/tools/{common,javah,getopt} \ + gnu/classpath/tools/; \ + cp -a $(srcdir)/libjava/classpath/resource/gnu/classpath/tools/common/Messages.properties \ + gnu/classpath/tools/common; \ + cd external/asm; \ + for i in `find . -name \*.java`; do gcj-4.3 --encoding ISO-8859-1 -C $$i -I.; done; \ + cd ../..; \ + for i in `find gnu -name \*.java`; do gcj-4.3 -C $$i -I. -Iexternal/asm/; done; \ + gcj-4.3 -findirect-dispatch -O2 -fmain=gnu.classpath.tools.javah.Main \ + -I. -Iexternal/asm/ `find . -name \*.class` -o $(PWD)/bin/gjavah.real; \ + ( \ + echo '#!/bin/sh'; \ + echo 'export CLASSPATH='`pwd`'$${CLASSPATH:+:$$CLASSPATH}'; \ + echo 'exec $(PWD)/bin/gjavah.real "$$@"'; \ + ) > $(PWD)/bin/gjavah; \ + chmod +x $(PWD)/bin/gjavah; \ + fi + endif + endif + : # build native compiler + ( \ + set +e; \ + $(SET_PATH) \ + $(SET_SHELL) \ + $(SET_LOCPATH) \ + $(MAKE) -C $(builddir) $(NJOBS) $(bootstrap_target) \ + CC="$(CC)" \ + $(CFLAGS_TO_PASS) \ + $(STAGE1_CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + ; \ + echo $$? > status; \ + ) 2>&1 | tee bootstrap-protocol + s=`cat status`; rm -f status; test $$s -eq 0 +endif +endif + -chmod 755 $(srcdir)/contrib/warn_summary + if [ -x $(srcdir)/contrib/warn_summary ]; then \ + rm -f bootstrap-summary; \ + $(srcdir)/contrib/warn_summary bootstrap-protocol \ + > bootstrap-summary; \ + fi + + touch $(build_stamp) + +ifeq ($(versioned_packages),yes) + hppa64_configure_flags += --program-suffix=-$(BASE_VERSION) +endif + +ifeq ($(DEB_CROSS),yes) + CC_for_hppa64_cross = $(CC) +else + CC_for_hppa64_cross = $(builddir)/gcc/xgcc -B$(builddir)/gcc/ +endif + +$(configure_hppa64_stamp): $(build_stamp) + dh_testdir + rm -f $(configure_hppa64_stamp) $(build_hppa64_stamp) + rm -rf $(builddir_hppa64) + mkdir $(builddir_hppa64) + : # configure + cd $(builddir_hppa64) && \ + $(SET_PATH) \ + $(SET_SHELL) \ + CC="$(CC_for_hppa64_cross)" \ + ../src/configure \ + --enable-languages=c \ + --prefix=/$(PF) \ + --libexecdir=/$(hppa64libexecdir) \ + --disable-shared \ + --disable-nls \ + --disable-threads \ + --disable-libgomp \ + --disable-libitm \ + --disable-libmudflap \ + --disable-libssp \ + --disable-libquadmath \ + --enable-plugin \ + --with-system-zlib \ + --with-as=/usr/bin/hppa64-linux-gnu-as \ + --with-ld=/usr/bin/hppa64-linux-gnu-ld \ + --includedir=/usr/hppa64-linux-gnu/include \ + --build=$(DEB_BUILD_GNU_TYPE) \ + --host=$(DEB_HOST_GNU_TYPE) \ + --target=hppa64-linux-gnu + touch $(configure_hppa64_stamp) + +$(build_hppa64_stamp): $(configure_hppa64_stamp) + $(SET_PATH) \ + $(SET_SHELL) \ + $(SET_LOCPATH) \ + LD_LIBRARY_PATH=$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}$(builddir)/gcc \ + $(MAKE) -C $(builddir_hppa64) $(NJOBS) \ + CC="$(CC_for_hppa64_cross)" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) + touch $(build_hppa64_stamp) + +$(configure_neon_stamp): $(build_stamp) + dh_testdir + rm -f $(configure_neon_stamp) $(build_neon_stamp) + rm -rf $(builddir_neon) + mkdir $(builddir_neon) + : # configure + cd $(builddir_neon) && \ + $(SET_PATH) \ + $(SET_SHELL) \ + CC="$(builddir)/gcc/xgcc -B$(builddir)/gcc/" \ + ../src/configure \ + --disable-bootstrap \ + --enable-languages=c,c++,objc,fortran \ + --prefix=/$(PF) \ + --libexecdir=/$(libexecdir) \ + --program-suffix=-$(BASE_VERSION) \ + --disable-nls \ + --enable-plugin \ + --disable-libmudflap \ + --with-arch=armv7-a --with-tune=cortex-a8 \ + --with-float=$(float_abi) --with-fpu=neon \ + --host=arm-linux-gnueabi \ + --build=arm-linux-gnueabi \ + --target=arm-linux-gnueabi + touch $(configure_neon_stamp) + +$(build_neon_stamp): $(configure_neon_stamp) + $(SET_PATH) \ + $(SET_SHELL) \ + $(SET_LOCPATH) \ + $(MAKE) -C $(builddir_neon) $(NJOBS) \ + CC="$(builddir)/gcc/xgcc -B$(builddir)/gcc/" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) + touch $(build_neon_stamp) + +spu_configure_args = \ + --enable-languages=c,c++,fortran \ + --prefix=/$(PF) \ + --libexecdir=/$(spulibexecdir) \ + --disable-shared \ + --disable-nls \ + --disable-threads \ + --enable-checking=release \ + --disable-libssp \ + --with-system-zlib \ + --with-newlib \ + --enable-plugin \ + --program-prefix=spu- \ + --with-as=/usr/bin/spu-as \ + --with-ar=/usr/bin/spu-ar \ + --with-ld=/usr/bin/spu-ld + +ifeq ($(versioned_packages),yes) + spu_configure_args += --program-suffix=-$(BASE_VERSION) +endif + +# FIXME: --with-sysroot=/usr/spu breaks libgfortran build +#ifeq ($(single_package),yes) +# spu_configure_args += \ +# --with-sysroot=/usr/spu +#else + spu_configure_args += \ + --includedir=/usr/spu/include \ + --libdir=/usr/spu/lib +#endif + +spu_configure_args += \ + --host=$(DEB_HOST_GNU_TYPE) \ + --build=$(DEB_BUILD_GNU_TYPE) \ + --target=spu + +$(configure_spu_stamp): $(src_spu_stamp) $(build_stamp) + dh_testdir + rm -f $(configure_spu_stamp) $(build_spu_stamp) + rm -rf $(builddir_spu) + mkdir $(builddir_spu) + : # configure + cd $(builddir_spu) && \ + $(SET_PATH) \ + $(SET_SHELL) \ + CC="$(builddir)/gcc/xgcc -B$(builddir)/gcc/" \ + ../src-spu/configure $(spu_configure_args) + touch $(configure_spu_stamp) + +$(build_spu_stamp): $(configure_spu_stamp) + $(SET_PATH) \ + $(SET_SHELL) \ + $(SET_LOCPATH) \ + $(MAKE) -C $(builddir_spu) $(NJOBS) \ + CC="$(builddir)/gcc/xgcc -B$(builddir)/gcc/" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) + touch $(build_spu_stamp) + + +MANUALS = \ + $(srcdir)/gcc/doc/cpp.texi \ + $(srcdir)/gcc/doc/cppinternals.texi \ + $(srcdir)/gcc/doc/gcc.texi \ + $(srcdir)/gcc/doc/gccint.texi +ifeq ($(with_fortran),yes) + MANUALS += $(srcdir)/gcc/fortran/gfortran.texi +endif +ifeq ($(with_java),yes) + MANUALS += $(srcdir)/gcc/java/gcj.texi +endif +ifeq ($(with_ada),yes) + MANUALS += \ + $(builddir)/gcc/doc/gnat_ugn.texi \ + $(srcdir)/gcc/ada/gnat_rm.texi \ + $(srcdir)/gcc/ada/gnat-style.texi +endif +ifeq ($(with_gomp),yes) + MANUALS += $(srcdir)/libgomp/libgomp.texi +endif +ifeq ($(with_itm),yes) + MANUALS += $(srcdir)/libitm/libitm.texi +endif + +html-docs: $(build_html_stamp) +#$(build_html_stamp): html-texi2html +#$(build_html_stamp): html-makeinfo +$(build_html_stamp): html-makeinfo-nosplit + +html-texi2html: + rm -rf html $(builddir)/gcc/html + mkdir $(builddir)/gcc/html + ln -s $(builddir)/gcc/html html + cd $(builddir)/gcc; \ + for manual in $(MANUALS); do \ + outname=`basename $${manual} .texi`; \ + echo "generating $$outname ..."; \ + texi2html -number -split chapter \ + -I $(srcdir)/gcc/doc/include \ + -I $(srcdir)/gcc/p/doc \ + -I $(srcdir)/gcc/p/doc/generated \ + -I `dirname $${manual}` \ + -I $(builddir)/gcc \ + -subdir html \ + $${manual}; \ + done + +html-makeinfo: + rm -rf html + mkdir html + cd $(builddir)/gcc; \ + for manual in $(MANUALS); do \ + manual=`find $(srcdir) -name $${file}.texi`; \ + outname=`basename $${manual} .texi`; \ + echo "generating $$outname ..."; \ + if [ "$${manual}" ]; then \ + makeinfo --html --number-sections \ + -I $(srcdir)/gcc/doc/include -I `dirname $${manual}` \ + -I $(srcdir)/gcc/p/doc \ + -I $(srcdir)/gcc/p/doc/generated \ + -I $(builddir)/gcc \ + -o $${outname} \ + $${manual}; \ + fi; \ + done + +html-makeinfo-nosplit: + rm -rf html + mkdir html + cd $(builddir)/gcc; \ + for manual in $(MANUALS); do \ + outname=`basename $${manual} .texi`.html; \ + echo "generating $$outname ..."; \ + makeinfo --html --number-sections --no-split \ + -I $(srcdir)/gcc/doc/include -I `dirname $${manual}` \ + -I $(srcdir)/gcc/p/doc \ + -I $(srcdir)/gcc/p/doc/generated \ + -I $(builddir)/gcc \ + -o $(PWD)/html/$${outname} \ + $${manual}; \ + done + +# start the script only on architectures known to have slow autobuilders ... +logwatch_archs := alpha arm m68k mips mipsel sparc +ifeq ($(DEB_HOST_GNU_CPU), $(findstring $(DEB_HOST_GNU_CPU),$(logwatch_archs))) + start_logwatch = yes +endif +ifeq ($(DEB_HOST_GNU_SYSTEM),gnu) + start_logwatch = yes +endif + +stamps/mauve-build: stamps/build + rm -rf mauve + mkdir -p mauve +ifeq ($(with_mauve_check),yes) + tar xf $(wildcard /usr/src/mauve*.tar.*) + cd mauve \ + && aclocal \ + && automake \ + && autoconf2.59 \ + && PATH=$(CURDIR)/$(sdkimg)/bin:$$PATH ./configure --host=$(DEB_HOST_GNU_TYPE) --build=$(DEB_BUILD_GNU_TYPE) + PATH=$(CURDIR)/$(sdkimg)/bin:$$PATH $(MAKE) -C mauve +endif + touch $@ + +stamps/mauve-check: stamps/build stamps/mauve-build +ifeq ($(with_mauve_check),yes) + -cd mauve && \ + JAVA_HOME=$(CURDIR)/$(sdkimg) \ + PATH=$(CURDIR)/$(sdkimg)/bin:$$PATH \ + xvfb-run -s "-extension GLX" java Harness \ + -vm $(CURDIR)/$(sdkimg)/bin/java \ + -file $(CURDIR)/debian/mauve_tests \ + -timeout 30000 2>&1 \ + | tee mauve_output + @sleep 5 +else + echo "mauve testsuite not run for this build" > mauve/mauve_output +endif + touch $@ + +check: $(check_stamp) # $(if $(filter yes, $(with_java)),stamps/05-build-mauve-stamp) #$(check_inst_stamp) +$(check_stamp): $(build_stamp) $(build_locale_stamp) + rm -f test-protocol + + -chmod 755 $(srcdir)/contrib/test_summary +ifneq ($(with_common_libs),yes) + ifeq ($(with_cxx),yes) + : # libstdc++6 built from newer gcc-4.x source, run testsuite against the installed lib + + sed 's/-L[^ ]*//g' $(buildlibdir)/libstdc++-v3/scripts/testsuite_flags \ + > $(buildlibdir)/libstdc++-v3/scripts/testsuite_flags.installed + -$(ULIMIT_M); \ + set +e; \ + for d in $(buildlibdir)/libstdc++-v3/testsuite; do \ + echo "Running testsuite in $$d ..."; \ + TEST_INSTALLED=1 \ + $(SET_SHELL) \ + $(SET_LOCPATH) \ + $(SET_PATH) \ + DEJAGNU_TIMEOUT=$(DEJAGNU_TIMEOUT) \ + DEB_GCC_NO_O3=1 \ + $(MAKE) -k -C $$d $(NJOBS) check $(RUNTESTFLAGS); \ + done 2>&1 | tee test-protocol2 + + BOOT_CFLAGS="$(BOOT_CFLAGS)" \ + $(srcdir)/contrib/test_summary -m "$(S_EMAIL)" > raw-test-summary + -( \ + sed -n '/^Mail/s/.*"\([^"][^"]*\)".*/\1/p' raw-test-summary; \ + awk '/^cat/, /^EOF/' raw-test-summary | grep -v EOF; \ + ) > libstdc++-test-summary + echo 'BEGIN installed libstdc++-v3 test-summary' + cat libstdc++-test-summary + echo 'END installed libstdc++-v3 test-summary' + find $(buildlibdir)/libstdc++-v3/testsuite -name '*.log' -o -name '*.sum' \ + | xargs -r rm -f + endif +endif + +ifeq ($(start_logwatch),yes) + : # start logwatch script for regular output during test runs + chmod +x debian/logwatch.sh + -debian/logwatch.sh -t 900 -p $(builddir)/logwatch.pid \ + -m '\ntestsuite still running ...\n' \ + test-protocol \ + $(builddir)/gcc/testsuite/gcc/gcc.log \ + $(builddir)/gcc/testsuite/g++/g++.log \ + $(builddir)/gcc/testsuite/gfortran/gfortran.log \ + $(builddir)/gcc/testsuite/objc/objc.log \ + $(builddir)/gcc/testsuite/obj-c++/obj-c++.log \ + $(builddir)/gcc/testsuite/gnat/gnat.log \ + $(builddir)/gcc/testsuite/ada/acats/acats.log \ + $(builddir)/gcc/testsuite/gfortran/gfortran.log \ + $(builddir)/gcc/p/test/test_log \ + $(buildlibdir)/libstdc++-v3/testsuite/libstdc++-v3.log \ + $(buildlibdir)/libjava/testsuite/libjava.log \ + $(buildlibdir)/libmudflap/testsuite/libmudflap.log \ + $(buildlibdir)/libgomp/testsuite/libgomp.log \ + $(buildlibdir)/libffi/testsuite/libffi.log \ + & +endif + +ifeq ($(with_ada),yes) + chmod +x debian/acats-killer.sh + -debian/acats-killer.sh -p $(builddir)/acats-killer.pid \ + $(builddir)/gcc/testsuite/ada/acats/acats.log \ + $(builddir)/gcc/testsuite/g++.log \ + & +endif + + -$(ULIMIT_M); \ + set +e; \ + for d in $(checkdirs); do \ + echo "Running testsuite in $$d ..."; \ + $(SET_SHELL) \ + $(SET_LOCPATH) \ + $(SET_PATH) \ + EXTRA_TEST_PFLAGS=-g0 \ + DEJAGNU_TIMEOUT=$(DEJAGNU_TIMEOUT) \ + DEB_GCC_NO_O3=1 \ + $(MAKE) -k -C $$d $(NJOBS) check $(RUNTESTFLAGS); \ + done 2>&1 | tee test-protocol + + -ps aux | fgrep logwatch | fgrep -v fgrep + -if [ -f $(builddir)/logwatch.pid ]; then \ + kill -1 `cat $(builddir)/logwatch.pid`; \ + sleep 1; \ + kill -9 `cat $(builddir)/logwatch.pid`; \ + rm -f $(builddir)/logwatch.pid; \ + fi + -ps aux | fgrep logwatch | fgrep -v fgrep + +ifeq ($(with_ada),yes) + -if [ -f $(builddir)/acats-killer.pid ]; then \ + kill -1 `cat $(builddir)/acats-killer.pid`; \ + sleep 1; \ + kill -9 `cat $(builddir)/acats-killer.pid`; \ + rm -f $(builddir)/acats-killer.pid; \ + fi +endif + + : # running the libjava testsuite alone is missing this information + $(builddir)/gcc/xgcc -B$(builddir)/gcc/ -v > $(builddir)/compiler_version.sum 2>&1 + + if [ -x $(srcdir)/contrib/test_summary ]; then \ + rm -f test-summary; \ + ( \ + cd $(builddir); \ + echo '' > ts-include; \ + echo '' >> ts-include; \ + if [ -f $(builddir)/gcc/.bad_compare ]; then \ + echo 'Bootstrap comparison failure:' >> ts-include; \ + cat $(builddir)/gcc/.bad_compare >> ts-include; \ + echo '' >> ts-include; \ + echo '' >> ts-include; \ + fi; \ + echo "Build Dependencies:" >> ts-include; \ + dpkg -l g++-* binutils* `echo '$(LIBC_DEP)' | awk '{print $$1}'` \ + libgmp*-dev libmpfr-dev libmpc-dev libppl*-dev libcloog-ppl-dev \ + | fgrep -v '' >> ts-include; \ + echo '' >> ts-include; \ + cat ../$(patch_stamp) >> ts-include; \ + BOOT_CFLAGS="$(BOOT_CFLAGS)" \ + $(srcdir)/contrib/test_summary \ + -i ts-include -m "$(S_EMAIL)" \ + ) > raw-test-summary; \ + if [ -n "$(testsuite_tarball)" ]; then \ + echo "Test suite used: $(testsuite_srcdir)" > test-summary; \ + echo " Do not interpret the results on its own" >> test-summary; \ + echo " but compare them with the results from" >> test-summary; \ + echo " the gcc-snapshot package." >> test-summary; \ + fi; \ + sed -n '/^Mail/s/.*"\([^"][^"]*\)".*/\1/p' raw-test-summary \ + >> test-summary; \ + awk '/^cat/, /^EOF/' raw-test-summary | grep -v EOF >> test-summary; \ + if [ -f bootstrap-summary -a "$(bootstrap_target)" != profiledbootstrap ]; then \ + echo '' >> test-summary; \ + cat bootstrap-summary >> test-summary; \ + fi; \ + echo 'BEGIN test-summary'; \ + cat test-summary; \ + echo 'END test-summary'; \ + fi + + touch $(check_stamp) + +$(check_inst_stamp): $(check_stamp) + rm -f test-inst-protocol + +ifeq ($(start_logwatch),yes) + : # start logwatch script for regular output during test runs + chmod +x debian/logwatch.sh + -debian/logwatch.sh -t 900 -p $(builddir)/logwatch-inst.pid \ + -m '\ntestsuite (3.3) still running ...\n' \ + test-inst-protocol \ + check-inst/{gcc,g++,g77,objc}.log \ + & +endif + + rm -rf check-inst + mkdir check-inst + + echo "Running testsuite ..." + -$(ULIMIT_M) ; \ + $(SET_SHELL) \ + $(SET_LOCPATH) \ + EXTRA_TEST_PFLAGS=-g0 \ + DEJAGNU_TIMEOUT=$(DEJAGNU_TIMEOUT) \ + cd check-inst && $(srcdir)/contrib/test_installed \ + --with-gcc=gcc-3.3 --with-g++=g++-3.3 --with-g77=g77-3.3 \ + 2>&1 | tee test-inst-protocol + + -ps aux | fgrep logwatch | fgrep -v fgrep + if [ -f $(builddir)/logwatch-inst.pid ]; then \ + kill -1 `cat $(builddir)/logwatch-inst.pid`; \ + else \ + true; \ + fi + -ps aux | fgrep logwatch | fgrep -v fgrep + + -chmod 755 $(srcdir)/contrib/test_summary + if [ -x $(srcdir)/contrib/test_summary ]; then \ + rm -f test-inst-summary; \ + ( \ + cd check-inst; \ + echo '' > ts-include; \ + echo '' >> ts-include; \ + echo "Build Dependencies:" >> ts-include; \ + dpkg -l g++-* binutils* `echo '$(LIBC_DEP)' | awk '{print $$1}'` \ + libgmp*-dev libmpfr-dev libmpc-dev libppl*-dev libcloog-ppl-dev \ + | fgrep -v '' >> ts-include; \ + echo '' >> ts-include; \ + echo 'Results for the installed GCC-3.3 compilers' >> ts-include; \ + $(srcdir)/contrib/test_summary \ + -i ts-include -m "$(S_EMAIL)" \ + ) > raw-test-inst-summary; \ + sed -n '/^Mail/s/.*"\([^"][^"]*\)".*/\1/p' raw-test-inst-summary \ + >> test-inst-summary; \ + awk '/^cat/, /^EOF/' raw-test-inst-summary \ + | grep -v EOF >> test-inst-summary; \ + echo 'BEGIN test-installed-summary'; \ + cat test-inst-summary; \ + echo 'END test-installed-summary'; \ + fi + + chmod 755 debian/reduce-test-diff.awk + if diff -u test-inst-summary test-summary \ + | debian/reduce-test-diff.awk > diff-summary; \ + then \ + mv -f diff-summary testsuite-comparision; \ + else \ + ( \ + echo "WARNING: New failures in gcc-3.4 compared to gcc-3.3"; \ + echo ''; \ + cat diff-summary; \ + ) > testsuite-comparision; \ + rm -f diff-summary; \ + fi + touch $(check_inst_stamp) + +clean: debian/control + dh_testdir + rm -f pxxx status + rm -f *-summary *-protocol testsuite-comparision summary-diff + if [ -f $(srcdir)/gcc/p/config-lang.in.debian ]; then \ + mv -f $(srcdir)/gcc/p/config-lang.in.debian $(srcdir)/gcc/p/config-lang.in; \ + else true; fi + rm -f $(srcdir)/gcc/po/*.gmo + rm -f debian/lib{gcc,gcj,objc,stdc++}{-v3,[0-9]}*.{{pre,post}{inst,rm},shlibs} + fs=`echo debian/*BV* debian/*GCJ* debian/*CXX* debian/*LC* debian/*MF* | sort -u`; \ + for f in $$fs; do \ + [ -f $$f ] || continue; \ + f2=$$(echo $$f \ + | sed 's/BV/$(BASE_VERSION)/;s/CXX/$(CXX_SONAME)/;s/LGCJ/$(PKG_LIBGCJ_EXT)/;s/GCJ/$(PKG_GCJ_EXT)/;s/LC/$(GCC_SONAME)/;s/MF/$(MUDFLAP_SONAME)/;s/-CRB/$(cross_bin_arch)/;s/\.in$$//'); \ + rm -f $$f2; \ + done + rm -f debian/gcc-{XX,ar,nm,ranlib}-$(BASE_VERSION).1 + rm -f debian/shlibs.local debian/substvars.local + rm -f debian/*.debhelper + -[ -d debian/bugs ] && $(MAKE) -C debian/bugs clean + rm -f debian/README.libstdc++-baseline debian/README.Bugs debian/README.Debian.$(DEB_TARGET_ARCH) + rm -f debian/lib*gcj-bc.shlibs + rm -rf bin locales share + rm -rf check-inst + rm -rf .pc + dh_clean + $(cross_clean) dh_clean + +# ----------------------------------------------------------------------------- +# some abbrevations for the package names and directories; +# p_XXX is the package name, d_XXX is the package directory +# these macros are only used in the binary-* targets. + +ifeq ($(versioned_packages),yes) + pkg_ver := -$(BASE_VERSION) +endif + +ifneq ($(DEB_CROSS),yes) + p_base = gcc$(pkg_ver)-base + p_gcc = gcc$(pkg_ver) + p_cpp = cpp$(pkg_ver) + p_cppd = cpp$(pkg_ver)-doc + p_cxx = g++$(pkg_ver) + p_doc = gcc$(pkg_ver)-doc + p_lgcc = libgcc$(GCC_SONAME) +else + # only triggered if DEB_CROSS set + p_base = gcc$(pkg_ver)$(cross_bin_arch)-base + p_cpp = cpp$(pkg_ver)$(cross_bin_arch) + p_gcc = gcc$(pkg_ver)$(cross_bin_arch) + p_cxx = g++$(pkg_ver)$(cross_bin_arch) +endif +p_hppa64 = gcc$(pkg_ver)-hppa64 + +d = debian/tmp +d_base = debian/$(p_base) +d_gcc = debian/$(p_gcc) +d_cpp = debian/$(p_cpp) +d_cppd = debian/$(p_cppd) +d_cxx = debian/$(p_cxx) +d_doc = debian/$(p_doc) +d_lgcc = debian/$(p_lgcc) +d_hppa64= debian/$(p_hppa64) + +d_spu = debian/tmp-spu +d_neon = debian/tmp-neon + +common_substvars = \ + $(shell awk "{printf \"'-V%s' \", \$$0}" debian/substvars.local) + +ifeq ($(DEB_CROSS),yes) + lib_binaries := indep_binaries +else + lib_binaries := arch_binaries +endif + +# --------------------------------------------------------------------------- + +ifeq ($(single_package),yes) + include debian/rules.d/binary-snapshot.mk +else + +ifneq ($(DEB_CROSS),yes) +ifeq ($(with_source),yes) + include debian/rules.d/binary-source.mk +endif +endif + +ifneq ($(BACKPORT),true) +ifeq ($(with_gccxbase),yes) + include debian/rules.d/binary-base.mk +endif + +ifeq ($(with_gccbase),yes) + include debian/rules.d/binary-base.mk +endif + +ifneq ($(DEB_STAGE),stage1) + include debian/rules.d/binary-libgcc.mk +endif + +ifeq ($(with_libqmath),yes) + include debian/rules.d/binary-libquadmath.mk +endif + +ifeq ($(with_libgmath),yes) + include debian/rules.d/binary-libgccmath.mk +endif + +ifeq ($(with_libgomp),yes) + include debian/rules.d/binary-libgomp.mk +endif + +ifeq ($(with_libitm),yes) + include debian/rules.d/binary-libitm.mk +endif + +ifeq ($(with_cdev),yes) + include debian/rules.d/binary-cpp.mk +endif + +ifeq ($(with_fixincl),yes) + include debian/rules.d/binary-fixincl.mk +endif + +ifeq ($(with_mudflap),yes) + include debian/rules.d/binary-libmudflap.mk +endif + +ifeq ($(with_libssp),yes) + include debian/rules.d/binary-libssp.mk +endif + +ifeq ($(with_objcxx),yes) + include debian/rules.d/binary-objcxx.mk +endif + +ifeq ($(with_objc),yes) + include debian/rules.d/binary-objc.mk +endif +ifeq ($(with_libobjc),yes) + include debian/rules.d/binary-libobjc.mk +endif + +ifeq ($(with_go),yes) + include debian/rules.d/binary-go.mk +endif + +# include before cxx +ifeq ($(with_java),yes) + include debian/rules.d/binary-java.mk +endif + +ifeq ($(with_cxxdev),yes) + include debian/rules.d/binary-cxx.mk +endif +ifeq ($(with_cxx),yes) + include debian/rules.d/binary-libstdcxx.mk +endif + +ifeq ($(with_f77),yes) + include debian/rules.d/binary-f77.mk +endif + +ifeq ($(with_fortran),yes) + include debian/rules.d/binary-fortran.mk +endif + +ifeq ($(with_ada),yes) + include debian/rules.d/binary-ada.mk +endif + +ifeq ($(with_d),yes) + include debian/rules.d/binary-d.mk +endif + +ifeq ($(with_libnof),yes) + ifeq ($(DEB_TARGET_GNU_CPU),powerpc) + include debian/rules.d/binary-nof.mk + endif +endif + +ifeq ($(with_softfloat),yes) + include debian/rules.d/binary-softfloat.mk +endif + +# gcc must be moved/built after g77 and g++ +ifeq ($(with_cdev),yes) + include debian/rules.d/binary-gcc.mk +endif + +ifeq ($(with_hppa64),yes) + include debian/rules.d/binary-hppa64.mk +endif + +ifeq ($(with_neon),yes) + include debian/rules.d/binary-neon.mk +endif + +ifeq ($(with_spu),yes) + include debian/rules.d/binary-spu.mk +endif +endif + +endif # ($(single_package),yes) + +# ---------------------------------------------------------------------- +install: $(install_dependencies) + +$(install_dummy_stamp): $(build_dummy_stamp) + touch $(install_dummy_stamp) + +$(install_snap_stamp): $(build_dependencies) + dh_testdir + dh_testroot + dh_clean -k + + : # Install directories + rm -rf $(d) + mkdir -p $(d)/$(PF) + +ifeq ($(with_hppa64),yes) + : # Install hppa64 + $(SET_PATH) \ + $(MAKE) -C $(builddir_hppa64) \ + CC="$(CC)" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + DESTDIR=$(PWD)/$(d) \ + install + + ls -l $(d)/$(PF)/bin + if [ ! -x $(d)/$(PF)/bin/hppa64-linux-gnu-gcc ]; then \ + mv $(d)/$(PF)/bin/hppa64-linux-gnu-gcc-4* $(d)/$(PF)/bin/hppa64-linux-gnu-gcc; \ + else \ + rm -f $(d)/$(PF)/bin/hppa64-linux-gnu-gcc-4*; \ + fi + + for i in ar nm ranlib; do \ + cp debian/gcc-$$i$(pkg_ver).1 $(d)/$(PF)/share/man/man1/$(cmd_prefix)gcc-$$i$(pkg_ver).1; \ + done + + : # remove files not needed from the hppa64 build + rm -rf $(d)/$(PF)/share/info + rm -rf $(d)/$(PF)/share/man + rm -f $(d)/$(PF)/$(libdir)/libiberty.a + rm -f $(d)/$(PF)/bin/*{gcov,gccbug,gcc} + + rm -rf $(d)/$(PF)/hppa64-linux-gnu/include + rm -rf $(d)/$(PF)/hppa64-linux-gnu/lib + set -e; \ + cd $(d)/$(PF)/$(libdir)/gcc/hppa64-linux-gnu/$(versiondir)/include-fixed; \ + for i in *; do \ + case "$$i" in \ + README|features.h|syslimits.h|limits.h) ;; \ + linux|$(TARGET_ALIAS)) ;; \ + $(subst $(DEB_TARGET_GNU_CPU),$(biarch_cpu),$(TARGET_ALIAS))) ;; \ + *) echo "remove include-fixed/$$i"; rm -rf $$i; \ + esac; \ + done +endif + +ifeq ($(with_spu),yes) + : # Install spu + $(SET_PATH) \ + $(MAKE) -C $(builddir_spu) \ + CC="$(CC)" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + DESTDIR=$(PWD)/$(d) \ + install + + ls -l $(d)/$(PF)/bin + if [ ! -x $(d)/$(PF)/bin/spu-gcc ]; then \ + mv $(d)/$(PF)/bin/spu-gcc-4* $(d)/$(PF)/bin/spu-gcc; \ + else \ + rm -f $(d)/$(PF)/bin/spu-gcc-4*; \ + fi + if [ ! -x $(d)/$(PF)/bin/spu-g++ ]; then \ + mv $(d)/$(PF)/bin/spu-g++-4* $(d)/$(PF)/bin/spu-g++; \ + else \ + rm -f $(d)/$(PF)/bin/spu-g++-4*; \ + fi + +ifneq (,$(findstring fortran, $(spu_configure_args))) + if [ ! -x $(d)/$(PF)/bin/spu-gfortran ]; then \ + mv $(d)/$(PF)/bin/spu-gfortran-4* $(d)/$(PF)/bin/spu-gfortran; \ + else \ + rm -f $(d)/$(PF)/bin/spu-gfortran-4*; \ + fi +endif + rm -f $(d)/$(PF)/bin/spu-c++* + + : # remove files not needed from the spu build + rm -rf $(d)/$(PF)/info $(d)/$(PF)/share/info + rm -rf $(d)/$(PF)/man $(d)/$(PF)/share/man + rm -rf $(d)/$(PF)/$(libdir)/gcc/spu/$(GCC_VERSION)/plugin + rm -f $(d)/$(PF)/$(libdir)/libiberty.a + rm -f $(d)/$(PF)/bin/*{gcov,gccbug,gcc} + +# FIXME +# rm -rf $(d)/$(PF)/spu/include +# rm -rf $(d)/$(PF)/spu/lib + -set -e; \ + cd $(d)/$(PF)/$(libdir)/gcc/spu/$(versiondir)/include-fixed; \ + for i in *; do \ + case "$$i" in \ + README|features.h|syslimits.h|limits.h) ;; \ + linux|$(TARGET_ALIAS)) ;; \ + $(subst $(DEB_TARGET_GNU_CPU),$(biarch_cpu),$(TARGET_ALIAS))) ;; \ + *) echo "remove include-fixed/$$i"; rm -rf $$i; \ + esac; \ + done +endif + + : # Work around PR lto/41569 + ln -sf gcc $(builddir)/prev-gcc + + : # Install everything + $(SET_PATH) \ + $(SET_SHELL) \ + $(MAKE) -C $(builddir) \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + DESTDIR=$(PWD)/$(d) \ + infodir=/$(PF)/share/info \ + mandir=/$(PF)/share/man \ + install + + ls -l $(d)/$(PF)/bin + if [ ! -x $(d)/$(PF)/bin/$(TARGET_ALIAS)-gcc ]; then \ + mv $(d)/$(PF)/bin/$(TARGET_ALIAS)-gcc-4* $(d)/$(PF)/bin/$(TARGET_ALIAS)-gcc; \ + else \ + rm -f $(d)/$(PF)/bin/$(TARGET_ALIAS)-gcc-4*; \ + fi + set -e; \ + cd $(d)/$(gcc_lib_dir)/include-fixed; \ + for i in *; do \ + case "$$i" in \ + README|features.h|syslimits.h|limits.h) ;; \ + linux|$(TARGET_ALIAS)) ;; \ + $(subst $(DEB_TARGET_GNU_CPU),$(biarch_cpu),$(TARGET_ALIAS))) ;; \ + *) echo "remove include-fixed/$$i"; rm -rf $$i; \ + esac; \ + done + +ifneq ($(configured_libdir),$(libdir)) + for i in debug go pkgconfig '*.so' '*.so.*' '*.a' '*.la' '*.py' '*.spec'; do \ + mv $(d)/$(PF)/$(configured_libdir)/$$i \ + $(d)/$(PF)/$(libdir)/. || true; \ + done +endif + +ifeq (0,1) +ifeq ($(biarch64)-$(with_cxx),yes-yes) + ifneq (,$(filter libstdc++-v3, $(biarch_multidir_names))) + : # fix biarch C++ header installation + ifeq ($(DEB_TARGET_ARCH),i386) + mv $(d)/$(cxx_inc_dir)/x86_64-linux-gnu/64 \ + $(d)/$(cxx_inc_dir)/$(DEB_TARGET_GNU_TYPE)/ + rmdir $(d)/$(cxx_inc_dir)/x86_64-linux-gnu + endif + ifeq ($(DEB_TARGET_ARCH),powerpc) + mv $(d)/$(cxx_inc_dir)/powerpc64-linux-gnu/64 \ + $(d)/$(cxx_inc_dir)/powerpc-linux-gnu/ + rmdir $(d)/$(cxx_inc_dir)/powerpc64-linux-gnu + endif + ifeq ($(DEB_TARGET_ARCH),s390) + mv $(d)/$(cxx_inc_dir)/s390x-linux-gnu/64 \ + $(d)/$(cxx_inc_dir)/s390-linux-gnu/ + rmdir $(d)/$(cxx_inc_dir)/s390x-linux-gnu + endif + endif +endif + +ifeq ($(biarchx32)-$(with_cxx),yes-yes) + ifneq (,$(filter libstdc++-v3, $(biarch_multidir_names))) + ifeq ($(DEB_TARGET_ARCH),i386) + mv $(d)/$(cxx_inc_dir)/x86_64-linux-gnux32/x32 \ + $(d)/$(cxx_inc_dir)/$(DEB_TARGET_GNU_TYPE)/ + rmdir $(d)/$(cxx_inc_dir)/x86_64-linux-gnux32 + endif + ifeq ($(DEB_TARGET_ARCH),amd64) + mv $(d)/$(cxx_inc_dir)/x86_64-linux-gnux32/x32 \ + $(d)/$(cxx_inc_dir)/$(DEB_TARGET_GNU_TYPE)/ + rmdir $(d)/$(cxx_inc_dir)/x86_64-linux-gnux32 + endif + endif +endif +endif + +# FIXME: libjava/classpath not correctly patched +ifeq ($(with_java),yes) + -if [ -d $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME) ]; then \ + ls -l $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME); \ + mv $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME)/* \ + $(d)/$(PF)/lib/gcj-$(BASE_VERSION)-$(GCJ_SONAME)/; \ + rmdir $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME); \ + fi + + ln -sf libgcj.so.$(GCJ_SONAME).0.0 $(d)/$(PF)/lib/libgcj_bc.so.1.0.0 + + install -m 755 $(d)/$(PF)/lib/libgcj_bc.so.1 \ + $(d)/$(gcc_lib_dir)/libgcj_bc.so + $(builddir)/gcc/xgcc -B$(builddir)/gcc/ -shared -fpic -xc /dev/null \ + -o build/libgcj.so -Wl,-soname,libgcj.so.$(GCJ_SONAME) -nostdlib + $(builddir)/gcc/xgcc -B$(builddir)/gcc/ -shared -fpic \ + $(srcdir)/libjava/libgcj_bc.c \ + -o $(d)/$(gcc_lib_dir)/libgcj_bc.so \ + -Wl,-soname,libgcj_bc.so.1 $(builddir)/libgcj.so -shared-libgcc +endif + + -ls -l $(d)/usr + if [ -d $(d)/usr/man/man1 ]; then \ + mv $(d)/usr/man/man1/* $(d)/usr/share/man/man1/; \ + fi + + chmod 755 debian/dh_* + touch $(install_snap_stamp) + +$(install_stamp): $(build_stamp) + dh_testdir + dh_testroot + dh_clean -k -N$(p_hppa64) + + if [ -f $(binary_stamp)-hppa64 ]; then \ + mv $(binary_stamp)-hppa64 saved-stamp-hppa64; \ + fi + if [ -f $(binary_stamp)-spu ]; then \ + mv $(binary_stamp)-spu saved-stamp-spu; \ + fi + rm -f $(binary_stamp)* + if [ -f saved-stamp-hppa64 ]; then \ + mv saved-stamp-hppa64 $(binary_stamp)-hppa64; \ + fi + if [ -f saved-stamp-spu ]; then \ + mv saved-stamp-spu $(binary_stamp)-spu; \ + fi + + : # Install directories + rm -rf $(d) + mkdir -p $(d)/$(libdir) $(d)/$(PF) $(d)/$(PF)/$(libdir)/debug +ifeq ($(biarch32),yes) + mkdir -p $(d)/$(PF)/lib32/debug +endif +ifeq ($(biarch64),yes) + mkdir -p $(d)/$(PF)/lib64/debug +endif +ifeq ($(biarchn32),yes) + mkdir -p $(d)/$(PF)/$(libn32)/debug +endif +ifeq ($(biarchx32),yes) + mkdir -p $(d)/$(PF)/libx32/debug +endif + +ifneq (,$(filter $(DEB_TARGET_GNU_CPU),x86_64 sparc64 s390x powerpc64)) +ifneq ($(DEB_TARGET_ARCH),x32) + : # link lib to lib64 and $(PF)/lib to $(PF)/lib64 + : # (this works when CONFARGS contains '--disable-multilib') + ln -s $(configured_libdir) $(d)/lib64 + mkdir -p $(d)/$(PF)/$(configured_libdir) + ln -s $(configured_libdir) $(d)/$(PF)/lib64 +endif +endif +ifeq ($(DEB_TARGET_ARCH),x32) + : # link lib to libx32 and $(PF)/lib to $(PF)/libx32 + ln -s $(configured_libdir) $(d)/libx32 + mkdir -p $(d)/$(PF)/$(configured_libdir) + ln -s $(configured_libdir) $(d)/$(PF)/libx32 +endif + + : # Work around PR lto/41569 + ln -sf gcc $(builddir)/prev-gcc + + : # Install everything + $(SET_PATH) \ + $(SET_SHELL) \ + $(MAKE) -C $(builddir) \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + DESTDIR=$(PWD)/$(d) \ + infodir=/$(PF)/share/info \ + mandir=/$(PF)/share/man \ + install + +ifneq ($(configured_libdir),$(libdir)) + for i in debug go pkgconfig '*.so' '*.so.*' '*.a' '*.la' '*.py' '*.spec'; do \ + mv $(d)/$(PF)/$(configured_libdir)/$$i \ + $(d)/$(PF)/$(libdir)/. || true; \ + done +endif + +ifeq ($(with_libcxxdbg),yes) + : # FIXME: the libstdc++ gdb.py file is installed with a wrong name + for i in $$(find $(d)/$(PF) -name libstdc++_pic.a-gdb.py); do \ + [ -f $$i ] || continue; \ + d=$$(dirname $$i); \ + b=$$(basename $$i); \ + t=$$(cd $$d; echo libstdc++.so.*.*.*)-gdb.py; \ + mv $$i $$d/$$t; \ + done +endif + +ifeq (0,1) +ifeq ($(biarch64)-$(with_cxx),yes-yes) + ifneq (,$(filter libstdc++-v3, $(biarch_multidir_names))) + ifeq ($(DEB_TARGET_ARCH),i386) + mv $(d)/$(cxx_inc_dir)/x86_64-linux-gnu/64 \ + $(d)/$(cxx_inc_dir)/$(DEB_TARGET_GNU_TYPE)/ + rmdir $(d)/$(cxx_inc_dir)/x86_64-linux-gnu + endif + ifeq ($(DEB_TARGET_ARCH),powerpc) + : # fix biarch C++ header installation + mv $(d)/$(cxx_inc_dir)/powerpc64-linux-gnu/64 \ + $(d)/$(cxx_inc_dir)/powerpc-linux-gnu/ + rmdir $(d)/$(cxx_inc_dir)/powerpc64-linux-gnu + endif + ifeq ($(DEB_TARGET_ARCH),s390) + mv $(d)/$(cxx_inc_dir)/s390x-linux-gnu/64 \ + $(d)/$(cxx_inc_dir)/s390-linux-gnu/ + rmdir $(d)/$(cxx_inc_dir)/s390x-linux-gnu + endif + endif +endif + +ifeq ($(biarchx32)-$(with_cxx),yes-yes) + ifneq (,$(filter libstdc++-v3, $(biarch_multidir_names))) + ifeq ($(DEB_TARGET_ARCH),i386) + mv $(d)/$(cxx_inc_dir)/x86_64-linux-gnux32/x32 \ + $(d)/$(cxx_inc_dir)/$(DEB_TARGET_GNU_TYPE)/ + rmdir $(d)/$(cxx_inc_dir)/x86_64-linux-gnux32 + endif + ifeq ($(DEB_TARGET_ARCH),amd64) + mv $(d)/$(cxx_inc_dir)/x86_64-linux-gnux32/x32 \ + $(d)/$(cxx_inc_dir)/$(DEB_TARGET_GNU_TYPE)/ + rmdir $(d)/$(cxx_inc_dir)/x86_64-linux-gnux32 + endif + endif +endif +endif + +# FIXME: libjava/classpath not correctly patched +ifeq ($(with_java),yes) + -if [ -d $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME) ]; then \ + ls -l $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME); \ + mv $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME)/* \ + $(d)/$(PF)/lib/gcj-$(BASE_VERSION)-$(GCJ_SONAME)/; \ + rmdir $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME); \ + fi +endif + + : # remove rpath settings from binaries and shared libs + for i in $$(chrpath -k $(d)/$(PF)/bin/* $(d)/$(PF)/lib*/lib*.so.* \ + $(if $(filter $(with_multiarch_lib),yes), \ + $(d)/$(PF)/lib/$(DEB_HOST_MULTIARCH)/lib*.so.*) \ + $(d)/$(PF)/lib*/gcj$(pkg_ver)*/lib*.so.* \ + 2>/dev/null | awk -F: '/RPATH=/ {print $$1}'); \ + do \ + case "$$i" in ecj1|*gij-*|*libjawt*|*libjvm*) continue; esac; \ + [ -h $$i ] && continue; \ + chrpath --delete $$i; \ + echo "removed RPATH: $$i"; \ + done + + : # remove '*.la' and '*.lai' files, not shipped in any package. + find $(d) -name '*.la' -o -name '*.lai' | xargs -r rm -f + +ifneq ($(with_libgnat),yes) + rm -f $(d)/$(gcc_lib_dir)/adalib/lib*.so* +endif + +ifeq ($(GFDL_INVARIANT_FREE),yes) + for i in gcc gcov; do \ + I=`echo $$i | tr a-z A-Z`; \ + sed -e "s/@NAME@/$$I$(pkg_ver)/g" -e "s/@name@/$$i$(pkg_ver)/g" \ + debian/dummy-man.1 > $(d)/$(PF)/share/man/man1/$$i.1; \ + done + + ifeq ($(with_fortran),yes) + for i in g77; do \ + I=`echo $$i | tr a-z A-Z`; \ + sed -e "s/@NAME@/$$I$(pkg_ver)/g" -e "s/@name@/$$i$(pkg_ver)/g" \ + debian/dummy-man.1 > $(d)/$(PF)/share/man/man1/$$i.1; \ + done + endif + ifeq ($(with_java),yes) + for i in gcj gcjh gij jv-convert jv-scan jcf-dump grmic grmiregistry; \ + do \ + I=`echo $$i | tr a-z A-Z`; \ + sed -e "s/@NAME@/$$I$(pkg_ver)/g" -e "s/@name@/$$i$(pkg_ver)/g" \ + debian/dummy-man.1 > $(d)/$(PF)/share/man/man1/$$i.1; \ + done + endif +endif + +# ifeq ($(with_ada),yes) +# : # rename files (versioned ada binaries) +# for i in ; do \ +# mv $(d)/$(PF)/bin/$$i $(d)/$(PF)/bin/$$i-$(GNAT_VERSION); \ +# mv $(d)/$(PF)/share/man/man1/$$i.1 \ +# $(d)/$(PF)/share/man/man1/$$i-$(GNAT_VERSION).1; \ +# done +# for i in $(GNAT_TOOLS); do \ +# mv $(d)/$(PF)/bin/$$i $(d)/$(PF)/bin/$$i-$(GNAT_VERSION); \ +# done +# endif + +ifeq ($(DEB_CROSS),yes) + ifeq ($(DEB_TARGET_ARCH)-$(biarch64),s390-yes) + : # s390 64bit stuff happens to be in s390x-linux-gnu/lib64/ + mkdir -p $(d)/$(PF)/s390-linux-gnu/lib64 + cp -a $(d)/$(PF)/s390x-linux-gnu/lib64/* $(d)/$(PF)/s390-linux-gnu/lib64/ + endif + ifeq ($(DEB_TARGET_ARCH)-$(biarch64),powerpc-yes) + : # ppc 64bit build slaps libgcc and libstdc++ to powerpc64-linux-gnu + cp -a $(d)/$(PF)/powerpc64-linux-gnu/lib64/* $(d)/$(PF)/powerpc-linux-gnu/lib64/ + endif +endif + + for i in ar nm ranlib; do \ + cp debian/gcc-$$i$(pkg_ver).1 $(d)/$(PF)/share/man/man1/$(cmd_prefix)gcc-$$i$(pkg_ver).1; \ + done + + chmod 755 debian/dh_* + +# tar cf tmp.tar debian/tmp + + touch $(install_stamp) + +$(install_hppa64_stamp): $(build_hppa64_stamp) + dh_testdir + dh_testroot + rm -rf $(d_hppa64) + mkdir -p $(d_hppa64)/$(PF) + + $(SET_PATH) \ + $(MAKE) -C $(builddir_hppa64) \ + CC="$(CC)" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + DESTDIR=$(PWD)/$(d_hppa64) \ + install + +ifeq ($(versioned_packages),yes) + mv $(d_hppa64)/$(PF)/bin/hppa64-linux-gnu-cpp \ + $(d_hppa64)/$(PF)/bin/hppa64-linux-gnu-cpp$(pkg_ver) +endif + +ifneq ($(single_package),yes) + : # remove files not needed + rm -rf $(d_hppa64)/$(PF)/info $(d_hppa64)/$(PF)/share/info + rm -rf $(d_hppa64)/$(PF)/man $(d_hppa64)/$(PF)/share/man + rm -rf $(d_hppa64)/$(PF)/$(libdir)/gcc/spu/$(GCC_VERSION)/plugin + rm -f $(d_hppa64)/$(PF)/$(libdir)/libiberty.a + rm -f $(d_hppa64)/$(PF)/bin/*{gcov,gccbug,gcc} + + rm -rf $(d_hppa64)/$(PF)/hppa64-linux-gnu/include + rm -rf $(d_hppa64)/$(PF)/hppa64-linux-gnu/lib + rm -rf $(d_hppa64)/$(hppa64libexecdir)/gcc/hppa64-linux-gnu/$(GCC_VERSION)/install-tools +endif + + touch $(install_hppa64_stamp) + +$(install_neon_stamp): $(build_neon_stamp) + dh_testdir + dh_testroot + rm -rf $(d_neon) + mkdir -p $(d_neon)/$(PF) + + $(SET_PATH) \ + $(MAKE) -C $(builddir_neon) \ + CC="$(CC)" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + DESTDIR=$(PWD)/$(d_neon) \ + install + touch $(install_neon_stamp) + +$(install_spu_stamp): $(build_spu_stamp) + dh_testdir + dh_testroot + rm -rf $(d_spu) + mkdir -p $(d_spu)/$(PF) + + $(SET_PATH) \ + $(MAKE) -C $(builddir_spu) \ + CC="$(CC)" \ + $(CFLAGS_TO_PASS) \ + $(LDFLAGS_TO_PASS) \ + DESTDIR=$(PWD)/$(d_spu) \ + install +ifneq (,$(findstring c++, $(spu_configure_args))) + mv $(d_spu)/usr/spu/lib/lib{std,sup}c++.a \ + $(d_spu)/$(gcc_spu_lib_dir)/. + ifeq ($(with_spumea64),yes) + mv $(d_spu)/usr/spu/lib/mea64/lib{std,sup}c++.a \ + $(d_spu)/$(gcc_spu_lib_dir)/mea64/. + endif +endif +ifneq (,$(findstring fortran, $(spu_configure_args))) + mv $(d_spu)/usr/spu/lib/libgfortran.a \ + $(d_spu)/$(gcc_spu_lib_dir)/. + ifeq ($(with_spumea64),yes) + mv $(d_spu)/usr/spu/lib/mea64/libgfortran.a \ + $(d_spu)/$(gcc_spu_lib_dir)/mea64/. + endif +endif + +ifneq ($(single_package),yes) + : # remove files not needed + rm -rf $(d_spu)/$(PF)/info +# rm -rf $(d_spu)/$(PF)/man + rm -f $(d_spu)/$(PF)/$(libdir)/libiberty.a + rm -f $(d_spu)/$(PF)/bin/*{gcov,gccbug,gcc} + +# rm -rf $(d_spu)/$(PF)/spu/include +# rm -rf $(d_spu)/$(PF)/spu/lib +endif + + touch $(install_spu_stamp) + +# ---------------------------------------------------------------------- +# Build architecture-dependent files here. +#binary-arch: build install $(foreach i,$(arch_binaries),$(binary_stamp)-$(i)) +binary-arch: $(foreach i,$(arch_binaries),$(binary_stamp)-$(i)) +ifeq ($(with_check),yes) + @echo Done +# : # Send Email about sucessfull build. +# # cat raw-test-summary | sh; echo "Sent mail to $(S_EMAIL)" +endif + +# ---------------------------------------------------------------------- +# Build architecture-independent files here. +#binary-indep: build install $(foreach i,$(indep_binaries),$(binary_stamp)-$(i)) +binary-indep: $(foreach i,$(indep_binaries),$(binary_stamp)-$(i)) + +source diff: + @echo >&2 'source and diff are obsolete - use dpkg-source -b'; false + +binary: binary-indep binary-arch +.PHONY: build clean binary-indep binary-arch binary --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.powerpc +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.powerpc @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.2.orig/debian/lib64stdc++6.symbols.sparc +++ gcc-4.7-4.7.2/debian/lib64stdc++6.symbols.sparc @@ -0,0 +1,9 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVli@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVli@GLIBCXX_3.4 4.1.1 +# FIXME: Currently no ldbl symbols in the 64bit libstdc++ on sparc. +# #include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/libobjc4.symbols.armhf +++ gcc-4.7-4.7.2/debian/libobjc4.symbols.armhf @@ -0,0 +1,4 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 + __objc_exception_class@Base 4.3.0 --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.kfreebsd-amd64 @@ -0,0 +1,139 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.128bit +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.128bit @@ -0,0 +1,46 @@ + _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.7 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.32bit.hurd +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.32bit.hurd @@ -0,0 +1,536 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEj@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_jj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEj@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs6substrEjj@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjRKSs@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjRKSsjj@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_checkEjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_limitEjj@GLIBCXX_3.4 4.1.1 + _ZNKSsixEj@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIcE6_M_putEPcjPKcPK2tm@GLIBCXX_3.4 4.1.1 + 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_ZNSt12__basic_fileIcEC1EP15__pthread_mutex@GLIBCXX_3.4 4.3.0 + _ZNSt12__basic_fileIcEC2EP15__pthread_mutex@GLIBCXX_3.4 4.3.0 --- gcc-4.7-4.7.2.orig/debian/dummy.texi +++ gcc-4.7-4.7.2/debian/dummy.texi @@ -0,0 +1 @@ +@c This file is empty because the original one has a non DFSG free license (GFDL) --- gcc-4.7-4.7.2.orig/debian/gnat-BV-doc.doc-base.rm +++ gcc-4.7-4.7.2/debian/gnat-BV-doc.doc-base.rm @@ -0,0 +1,16 @@ +Document: gnat-rm-@BV@ +Title: GNAT (GNU Ada) Reference Manual +Author: Various +Abstract: This manual contains useful information in writing programs + using the GNAT compiler. It includes information on implementation + dependent characteristics of GNAT, including all the information + required by Annex M of the standard. +Section: Programming/Ada + +Format: html +Index: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html +Files: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html + +Format: info +Index: /usr/share/info/gnat_rm-@BV@.info.gz +Files: /usr/share/info/gnat_rm-@BV@* --- gcc-4.7-4.7.2.orig/debian/libgcj-common.preinst +++ gcc-4.7-4.7.2/debian/libgcj-common.preinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + upgrade|install) + if [ -n "$2" ] && [ -h /usr/share/doc/libgcj-common ] \ + && dpkg --compare-versions "$2" lt 1:4.0.2-10 + then + rm -f /usr/share/doc/libgcj-common + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/rules.parameters +++ gcc-4.7-4.7.2/debian/rules.parameters @@ -0,0 +1,35 @@ +# configuration parameters taken from upstream source files +GCC_VERSION := 4.7.2 +NEXT_GCC_VERSION := 4.7.3 +BASE_VERSION := 4.7 +SOURCE_VERSION := 4.7.2-5ubuntu4 +DEB_VERSION := 4.7.2-5ubuntu4 +DEB_EVERSION := 1:4.7.2-5ubuntu4 +GDC_BASE_VERSION := +DEB_GDC_VERSION := +DEB_SOVERSION := 4.7 +DEB_SOEVERSION := 1:4.7 +DEB_LIBGCC_SOVERSION := 1:4.7 +DEB_LIBGCC_VERSION := 1:4.7.2-5ubuntu4 +DEB_STDCXX_SOVERSION := 4.7 +DEB_GCJ_SOVERSION := 4.7 +PKG_GCJ_EXT := 13 +PKG_LIBGCJ_EXT := 13 +DEB_GOMP_SOVERSION := 4.7 +DEB_GCCMATH_SOVERSION := 4.7 +GCC_SONAME := 1 +CXX_SONAME := 6 +FORTRAN_SONAME := 3 +OBJC_SONAME := 4 +GCJ_SONAME := 13 +GNAT_VERSION := 4.7 +GNAT_SONAME := 4.7 +FFI_SONAME := 4 +MUDFLAP_SONAME := 0 +SSP_SONAME := 0 +GOMP_SONAME := 1 +ITM_SONAME := 1 +QMATH_SONAME := 0 +GCCMATH_SONAME := +GO_SONAME := 0 +LIBC_DEP := libc6 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.sh4 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.sh4 @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.2.orig/debian/source.lintian-overrides.in +++ gcc-4.7-4.7.2/debian/source.lintian-overrides.in @@ -0,0 +1,5 @@ +@SRC@: invalid-arch-string-in-source-relation +@SRC@: quilt-build-dep-but-no-series-file +@SRC@: weak-library-dev-dependency libgnatvsn@BV@-dev on libgnatvsn@BV@ (= ${gnat:Version}) +@SRC@: weak-library-dev-dependency libgnatprj@BV@-dev on libgnatprj@BV@ (= ${gnat:Version}) +@SRC@: weak-library-dev-dependency libgcj@LGCJ@-dev on libgcj@LGCJ@-awt (= ${gcj:Version}) --- gcc-4.7-4.7.2.orig/debian/lib32gfortran3.overrides +++ gcc-4.7-4.7.2/debian/lib32gfortran3.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +lib32gfortran3 binary: binary-or-shlib-defines-rpath --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.mips +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.mips @@ -0,0 +1,1222 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + 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__satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 1:4.3 + __subhq3@GCC_4.3.0 1:4.3 + __subqq3@GCC_4.3.0 1:4.3 + __subsa3@GCC_4.3.0 1:4.3 + __subsf3@GCC_3.0 1:4.1.1 + __subsq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_synchronize@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4.0 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.armel +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.armel @@ -0,0 +1,123 @@ +libgcc_s.so.1 libgcc1 #MINVER# +(ignore-blacklist)#include "libgcc1.symbols.aeabi" + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_3.5@GCC_3.5 1:4.3.0 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 + _Unwind_Complete@GCC_3.5 1:4.3.0 + _Unwind_DeleteException@GCC_3.0 1:4.3.0 + _Unwind_ForcedUnwind@GCC_3.0 1:4.3.0 + _Unwind_GetCFA@GCC_3.3 1:4.3.0 + _Unwind_GetDataRelBase@GCC_3.0 1:4.3.0 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.3.0 + _Unwind_GetRegionStart@GCC_3.0 1:4.3.0 + _Unwind_GetTextRelBase@GCC_3.0 1:4.3.0 + _Unwind_RaiseException@GCC_3.0 1:4.3.0 + _Unwind_Resume@GCC_3.0 1:4.3.0 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.3.0 + _Unwind_VRS_Get@GCC_3.5 1:4.3.0 + _Unwind_VRS_Pop@GCC_3.5 1:4.3.0 + _Unwind_VRS_Set@GCC_3.5 1:4.3.0 + __absvdi2@GCC_3.0 1:4.3.0 + __absvsi2@GCC_3.0 1:4.3.0 + __adddf3@GCC_3.0 1:4.3.0 + __addsf3@GCC_3.0 1:4.3.0 + __addvdi3@GCC_3.0 1:4.3.0 + __addvsi3@GCC_3.0 1:4.3.0 + __ashldi3@GCC_3.0 1:4.3.0 + __ashrdi3@GCC_3.0 1:4.3.0 + __bswapdi2@GCC_4.3.0 1:4.3.0 + __bswapsi2@GCC_4.3.0 1:4.3.0 + __clear_cache@GCC_3.0 1:4.3.0 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.3.0 + __clzsi2@GCC_3.4 1:4.3.0 + __cmpdi2@GCC_3.0 1:4.3.0 + __ctzdi2@GCC_3.4 1:4.3.0 + __ctzsi2@GCC_3.4 1:4.3.0 + __divdc3@GCC_4.0.0 1:4.3.0 + __divdf3@GCC_3.0 1:4.3.0 + __divdi3@GLIBC_2.0 1:4.3.0 + __divsc3@GCC_4.0.0 1:4.3.0 + __divsf3@GCC_3.0 1:4.3.0 + __divsi3@GCC_3.0 1:4.3.0 + __emutls_get_address@GCC_4.3.0 1:4.3.0 + __emutls_register_common@GCC_4.3.0 1:4.3.0 + __enable_execute_stack@GCC_3.4.2 1:4.3.0 + __eqdf2@GCC_3.0 1:4.3.0 + __eqsf2@GCC_3.0 1:4.3.0 + __extendsfdf2@GCC_3.0 1:4.3.0 + __ffsdi2@GCC_3.0 1:4.3.0 + __ffssi2@GCC_4.3.0 1:4.3.0 + __fixdfdi@GCC_3.0 1:4.3.0 + __fixdfsi@GCC_3.0 1:4.3.0 + __fixsfdi@GCC_3.0 1:4.3.0 + __fixsfsi@GCC_3.0 1:4.3.0 + __fixunsdfdi@GCC_3.0 1:4.3.0 + __fixunsdfsi@GCC_3.0 1:4.3.0 + __fixunssfdi@GCC_3.0 1:4.3.0 + __fixunssfsi@GCC_3.0 1:4.3.0 + __floatdidf@GCC_3.0 1:4.3.0 + __floatdisf@GCC_3.0 1:4.3.0 + __floatsidf@GCC_3.0 1:4.3.0 + __floatsisf@GCC_3.0 1:4.3.0 + __floatundidf@GCC_4.2.0 1:4.3.0 + __floatundisf@GCC_4.2.0 1:4.3.0 + __floatunsidf@GCC_4.2.0 1:4.3.0 + __floatunsisf@GCC_4.2.0 1:4.3.0 + __gcc_personality_v0@GCC_3.3.1 1:4.3.0 + __gedf2@GCC_3.0 1:4.3.0 + __gesf2@GCC_3.0 1:4.3.0 + __gnu_unwind_frame@GCC_3.5 1:4.3.0 + __gtdf2@GCC_3.0 1:4.3.0 + __gtsf2@GCC_3.0 1:4.3.0 + __ledf2@GCC_3.0 1:4.3.0 + __lesf2@GCC_3.0 1:4.3.0 + __lshrdi3@GCC_3.0 1:4.3.0 + __ltdf2@GCC_3.0 1:4.3.0 + __ltsf2@GCC_3.0 1:4.3.0 + __moddi3@GLIBC_2.0 1:4.3.0 + __modsi3@GCC_3.0 1:4.3.0 + __muldc3@GCC_4.0.0 1:4.3.0 + __muldf3@GCC_3.0 1:4.3.0 + __muldi3@GCC_3.0 1:4.3.0 + __mulsc3@GCC_4.0.0 1:4.3.0 + __mulsf3@GCC_3.0 1:4.3.0 + __mulvdi3@GCC_3.0 1:4.3.0 + __mulvsi3@GCC_3.0 1:4.3.0 + __nedf2@GCC_3.0 1:4.3.0 + __negdf2@GCC_3.0 1:4.3.0 + __negdi2@GCC_3.0 1:4.3.0 + __negsf2@GCC_3.0 1:4.3.0 + __negvdi2@GCC_3.0 1:4.3.0 + __negvsi2@GCC_3.0 1:4.3.0 + __nesf2@GCC_3.0 1:4.3.0 + __paritydi2@GCC_3.4 1:4.3.0 + __paritysi2@GCC_3.4 1:4.3.0 + __popcountdi2@GCC_3.4 1:4.3.0 + __popcountsi2@GCC_3.4 1:4.3.0 + __powidf2@GCC_4.0.0 1:4.3.0 + __powisf2@GCC_4.0.0 1:4.3.0 + __subdf3@GCC_3.0 1:4.3.0 + __subsf3@GCC_3.0 1:4.3.0 + __subvdi3@GCC_3.0 1:4.3.0 + __subvsi3@GCC_3.0 1:4.3.0 + __truncdfsf2@GCC_3.0 1:4.3.0 + __ucmpdi2@GCC_3.0 1:4.3.0 + __udivdi3@GLIBC_2.0 1:4.3.0 + __udivmoddi4@GCC_3.0 1:4.3.0 + __udivsi3@GCC_3.0 1:4.3.0 + __umoddi3@GLIBC_2.0 1:4.3.0 + __umodsi3@GCC_3.0 1:4.3.0 + __unorddf2@GCC_3.3.4 1:4.3.0 + __unordsf2@GCC_3.3.4 1:4.3.0 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.10 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.10 @@ -0,0 +1,98 @@ + __iso_c_binding_c_f_pointer_c10@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r10@GFORTRAN_1.0 4.3 + _gfortran_arandom_r10@GFORTRAN_1.0 4.3 + _gfortran_bessel_jn_r10@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r10@GFORTRAN_1.4 4.6 + _gfortran_cpu_time_10@GFORTRAN_1.0 4.3 + _gfortran_erfc_scaled_r10@GFORTRAN_1.1 4.4.0 + _gfortran_exponent_r10@GFORTRAN_1.0 4.3 + _gfortran_fraction_r10@GFORTRAN_1.0 4.3 + _gfortran_matmul_c10@GFORTRAN_1.0 4.3 + _gfortran_matmul_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_maxval_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_minval_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mminval_r10@GFORTRAN_1.0 4.3 + _gfortran_mproduct_c10@GFORTRAN_1.0 4.3 + _gfortran_mproduct_r10@GFORTRAN_1.0 4.3 + _gfortran_msum_c10@GFORTRAN_1.0 4.3 + _gfortran_msum_r10@GFORTRAN_1.0 4.3 + _gfortran_nearest_r10@GFORTRAN_1.0 4.3 + _gfortran_pow_c10_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_c10_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_r10_i8@GFORTRAN_1.0 4.3 + _gfortran_product_c10@GFORTRAN_1.0 4.3 + _gfortran_product_r10@GFORTRAN_1.0 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4.3 + _gfortran_specific__sin_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r10@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c10@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r10@GFORTRAN_1.0 4.3 + _gfortran_ssum_c10@GFORTRAN_1.0 4.3 + _gfortran_ssum_r10@GFORTRAN_1.0 4.3 + _gfortran_sum_c10@GFORTRAN_1.0 4.3 + _gfortran_sum_r10@GFORTRAN_1.0 4.3 + _gfortran_transpose_c10@GFORTRAN_1.0 4.3 + _gfortran_transpose_r10@GFORTRAN_1.0 4.3 --- gcc-4.7-4.7.2.orig/debian/copyright +++ gcc-4.7-4.7.2/debian/copyright @@ -0,0 +1,569 @@ +This is the Debian GNU/Linux prepackaged version of the GNU compiler +collection, containing Ada, C, C++, Fortran 95, Java, Objective-C, +Objective-C++, and Treelang compilers, documentation, and support +libraries. In addition, Debian provides the gdc compiler, either in +the same source package, or built from a separate same source package. +Packaging is done by the Debian GCC Maintainers +, with sources obtained from: + + ftp://gcc.gnu.org/pub/gcc/releases/ (for full releases) + svn://gcc.gnu.org/svn/gcc/ (for prereleases) + http://bitbucket.org/goshawk/gdc (for D) + +The current gcc-4.7 source package is taken from the SVN gcc-4_7-branch. + +Changes: See changelog.Debian.gz + +Debian splits the GNU Compiler Collection into packages for each language, +library, and documentation as follows: + +Language Compiler package Library package Documentation +--------------------------------------------------------------------------- +Ada gnat-4.7 libgnat-4.7 gnat-4.7-doc +C gcc-4.7 gcc-4.7-doc +C++ g++-4.7 libstdc++6 libstdc++6-4.7-doc +D gdc-4.7 +Fortran 95 gfortran-4.7 libgfortran3 gfortran-4.7-doc +Go gccgo-4.7 libgo0 +Java gcj-4.7 libgcj10 libgcj-doc +Objective C gobjc-4.7 libobjc2 +Objective C++ gobjc++-4.7 + +For some language run-time libraries, Debian provides source files, +development files, debugging symbols and libraries containing position- +independent code in separate packages: + +Language Sources Development Debugging Position-Independent +------------------------------------------------------------------------------ +C++ libstdc++6-4.7-dbg libstdc++6-4.7-pic +D libphobos-4.7-dev +Java libgcj10-src libgcj10-dev libgcj10-dbg + +Additional packages include: + +All languages: +libgcc1, libgcc2, libgcc4 GCC intrinsics (platform-dependent) +gcc-4.7-base Base files common to all compilers +gcc-4.7-soft-float Software floating point (ARM only) +gcc-4.7-source The sources with patches + +Ada: +libgnatvsn-dev, libgnatvsn4.7 GNAT version library +libgnatprj-dev, libgnatprj4.7 GNAT Project Manager library + +C: +cpp-4.7, cpp-4.7-doc GNU C Preprocessor +libmudflap0-dev, libmudflap0 Library for instrumenting pointers +libssp0-dev, libssp0 GCC stack smashing protection library +libquadmath0 Math routines for the __float128 type +fixincludes Fix non-ANSI header files +protoize Create/remove ANSI prototypes from C code + +Java: +gij The Java bytecode interpreter and VM +libgcj-common Common files for the Java run-time +libgcj10-awt The Abstract Windowing Toolkit +libgcj10-jar Java ARchive for the Java run-time + +C, C++ and Fortran 95: +libgomp1-dev, libgomp1 GCC OpenMP (GOMP) support library +libitm1-dev, libitm1 GNU Transactional Memory Library + +Biarch support: On some 64-bit platforms which can also run 32-bit code, +Debian provides additional packages containing 32-bit versions of some +libraries. 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Moshier + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c: + Changes for 128-bit __float128 are + Copyright (C) 2001 Stephen L. Moshier + and are incorporated herein by permission of the author. The author + reserves the right to distribute this material elsewhere under different + copying permissions. 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See the GNU + Lesser General Public License for more details. + +ldexpq.c: + * Conversion to long double by Ulrich Drepper, + * Cygnus Support, drepper@cygnus.com. + +cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c, +sinq_kernel.c, truncq.c: + Copyright (C) 1997, 1999 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +isinfq.c: + * Written by J.T. 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This notice may not be removed or altered from any source distribution. + + +The Phobos standard runtime library: + - d/phobos/* + +Unless otherwise marked within the file, each file in the source +is under the following licenses: + +Copyright (C) 2004-2005 by Digital Mars, www.digitalmars.com +Written by Walter Bright + +This software is provided 'as-is', without any express or implied +warranty. In no event will the authors be held liable for any damages +arising from the use of this software. + +Permission is granted to anyone to use this software for any purpose, +including commercial applications, and to alter it and redistribute it +freely, in both source and binary form, subject to the following +restrictions: + + o The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + o Altered source versions must be plainly marked as such, and must not + be misrepresented as being the original software. + o This notice may not be removed or altered from any source + distribution. + +By plainly marking modifications, something along the lines of adding to each +file that has been changed a "Modified by Foo Bar" line +underneath the "Written by" line would be adequate. + --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.mips +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.mips @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.2.orig/debian/libgcjGCJ.overrides +++ gcc-4.7-4.7.2/debian/libgcjGCJ.overrides @@ -0,0 +1,9 @@ +# pick up the exact version, in case another gcj version is installed +libgcj@GCJ@ binary: binary-or-shlib-defines-rpath + +# intended +libgcj@GCJ@ binary: unused-shlib-entry-in-control-file +libgcj@GCJ@ binary: shlibs-declares-dependency-on-other-package + +# keep patched ltdl copy +libgcj@GCJ@ binary: embedded-library --- gcc-4.7-4.7.2.orig/debian/gcc-snapshot.prerm +++ gcc-4.7-4.7.2/debian/gcc-snapshot.prerm @@ -0,0 +1,5 @@ +#! /bin/sh -e + +rm -f /usr/lib/gcc-snapshot/share/python/*.py[co] + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/gcc-dummy.texi +++ gcc-4.7-4.7.2/debian/gcc-dummy.texi @@ -0,0 +1,41 @@ +\input texinfo @c -*-texinfo-*- +@c %**start of header + +@settitle The GNU Compiler Collection (GCC) + +@c Create a separate index for command line options. +@defcodeindex op +@c Merge the standard indexes into a single one. +@syncodeindex fn cp +@syncodeindex vr cp +@syncodeindex ky cp +@syncodeindex pg cp +@syncodeindex tp cp + +@paragraphindent 1 + +@c %**end of header + +@copying +The current documentation is licensed under the same terms as the Debian packaging. +@end copying +@ifnottex +@dircategory Programming +@direntry +* @name@: (@name@). The GNU Compiler Collection (@name@). +@end direntry +@sp 1 +@end ifnottex + +@summarycontents +@contents +@page + +@node Top +@top Introduction +@cindex introduction +The official GNU compilers' documentation is released under the terms +of the GNU Free Documentation License with cover texts. This has been +considered non free by the Debian Project. Thus you will find it in the +non-free section of the Debian archive. +@bye --- gcc-4.7-4.7.2.orig/debian/gcj-BV-jdk.postinst +++ gcc-4.7-4.7.2/debian/gcj-BV-jdk.postinst @@ -0,0 +1,45 @@ +#! /bin/sh -e + +if [ -d /usr/share/doc/gcc-@BV@-base/java ] && [ ! -h /usr/share/doc/gcc-@BV@-base/java ]; then + rm -rf /usr/share/doc/gcc-@BV@-base/java + ln -s ../gcj-@BV@-base /usr/share/doc/gcc-@BV@-base/java +fi + +prio=@java_priority@ +update-alternatives --quiet \ + --install /usr/bin/javac javac /usr/bin/gcj-wrapper-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/javac.1.gz javac.1.gz /usr/share/man/man1/gcj-wrapper-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/jar jar /usr/bin/gjar-@BV@ $prio \ + --slave /usr/share/man/man1/jar.1.gz jar.1.gz /usr/share/man/man1/gjar-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/jarsigner jarsigner /usr/bin/gjarsigner-@BV@ $prio \ + --slave /usr/share/man/man1/jarsigner.1.gz jarsigner.1.gz /usr/share/man/man1/gjarsigner-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/javah javah /usr/bin/gjavah-@BV@ $prio \ + --slave /usr/share/man/man1/javah.1.gz javah.1.gz /usr/share/man/man1/gjavah-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/javadoc javadoc /usr/bin/gjdoc-@BV@ $prio \ + --slave /usr/share/man/man1/javadoc.1.gz javadoc.1.gz /usr/share/man/man1/gjdoc-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/native2ascii native2ascii /usr/bin/gnative2ascii-@BV@ $prio \ + --slave /usr/share/man/man1/native2ascii.1.gz native2ascii.1.gz /usr/share/man/man1/gnative2ascii-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmic rmic /usr/bin/grmic-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/rmic.1.gz rmic.1.gz /usr/share/man/man1/grmic-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/serialver serialver /usr/bin/gserialver-@BV@ $prio \ + --slave /usr/share/man/man1/serialver.1.gz serialver.1.gz /usr/share/man/man1/gserialver-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/tnameserv tnameserv /usr/bin/gtnameserv-@BV@ $prio \ + --slave /usr/share/man/man1/tnameserv.1.gz tnameserv.1.gz /usr/share/man/man1/gtnameserv-@BV@.1.gz + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/FAQ.gcj +++ gcc-4.7-4.7.2/debian/FAQ.gcj @@ -0,0 +1,494 @@ +The GCJ FAQ +=========== + + The latest version of this document is always available at + http://gcc.gnu.org/java/faq.html. + + General Questions + + What license is used for libgcj? + How can I report a bug in libgcj? + How can I contribute to libgcj + Is libgcj part of GCC? + Will gcj and libgcj work on my machine? + How can I debug my Java program? + Can I interface byte-compiled and native java code? + + + Java Feature Support + + What Java API's are supported? How complete is + the support? + Does GCJ support using straight C native methods + ala JNI? + Why does GCJ use CNI? + What is the state of AWT support? + How about support for Swing ? + What support is there for RMI ? + Can I use any code from other OpenSource projects + to supplement libgcj's current features ? + What features of the Java language are/arn't supported + + + Build Issues + + I need something more recent than the last release; how + should I build it? + Linker bug on Solaris + Can I configure/build in the source tree? + My libgcj build fails with "invalid use of undefined type + struct sigcontext_struct" + + + Gcj Compile/Link Questions + + Why do I get undefined reference to `main' errors? + Can GCJ only handle source code? + "gcj -C" Doesn't seem to work like javac/jikes. Whats going on? + Where does GCJ look for files? + How does gcj resolve wether to compile .class or .java files? + I'm getting link errors! + I'm getting 'undefined symbol: __dso_handle' + + + Runtime Questions + + My program is dumping core! What's going on? + When I run the debugger I get a SEGV in the GC! What's going on? + I have just compiled and benchmarked my Java application + and it seems to be running slower than than XXX JIT JVM. Is there + anything I can do to make it go faster? + Can I profile Garbage Collection? + How do I increase the runtime's initial and maximum heap sizes? + How can I profile my application? + My program seems to hang and doesn't produce any output + + + Programming Issues + + Are there any examples of how to use CNI? + Is it possible to invoke GCJ compiled Java code from a + C++ application? + +General Questions +================= + + 1.1 What license is used for libgcj? + + libgcj is distributed under the GPL, with the 'libgcc exception'. + This means that linking with libgcj does not by itself cause + your program to fall under the GPL. See LIBGCJ_LICENSE in + the source tree for more details. + + 1.2 How can I report a bug in libgcj? + + libgcj has a corresponding Gnats bug database which you can + browse. You can also submit new bug reports from the Gnats + page. + + 1.3 How can I contribute to libgcj? + + You can send simple bug fixes in as patches. Please follow + the GCC guidelines for submitting patches. For more complex + changes, you must sign copyright over to the Free Software + Foundation. See the contribution page for details. + + 1.4 Is libgcj part of GCC? + + Yes, libgcj is now part of GCC. It can be downloaded, + configured and built as one single tree. + + 1.5 Will gcj and libgcj work on my machine? + + Gcj and libgcj are known to work more or less with IA-32 and + Sparc Solaris, Tru64 Unix, as well as IA-32, IA-64, Alpha, + and PowerPC Linux. They might work on other + systems. Generally speaking, porting to a new system should + not be hard. This would be a good way to volunteer. + + 1.6 How can I debug my Java program? + + gdb 5.0 includes support for debugging gcj-compiled Java + programs. For more information please read Java Debugging + with gdb. + + 1.7 Can I interface byte-compiled and native java code + + libgcj has a bytecode interpreter that allows you to mix + .class files with compiled code. It works pretty + transparently: if a compiled version of a class is not found + in the application binary or linked shared libraries, the + class loader will search for a bytecode version in your + classpath, much like a VM would. Be sure to build libgcj + with the --enable-interpreter option to enable this + functionality. + + The program "gij" provides a front end to the interpreter + that behaves much like a traditional virtual machine. You + can even use "gij" to run a shared library which is compiled + from java code and contains a main method: + + $ gcj -shared -o lib-HelloWorld.so HelloWorld.java + $ gij HelloWorld + + This works because gij uses Class.forName, which knows how + to load shared objects. + +Java Feature Support +==================== + + 2.1 What Java API's are supported? How complete is + the support? + + Matt Welsh writes: + + Just look in the 'libjava' directory of libgcj and see + what classes are there. Most GUI stuff isn't there yet, + that's true, but many of the other classes are easy to add + if they don't yet exist. + + I think it's important to stress that there is a big + difference between Java and the many libraries which Java + supports. Unfortunately, Sun's promise of "write once, run + everywhere" assumes much more than a JVM: you also need + the full set of JDK libraries. Considering that new Java + APIs come out every week, it's going to be impossible to + track everything. + + To make things worse, you can't simply run Sun's JDK + classes on any old JVM -- they assume that a bunch of + native methods are also defined. Since this native method + requirement isn't defined by the JDK specs, you're + effectively constrained to using Sun's JVMs if you want to + use Sun's JDK libraries. Oh yes -- you could also + reimplement all of those native methods yourself, and make + sure they behave exactly as Sun's do. Note that they're + undocumented! + + 2.2 Does GCJ support using straight C native methods + ala JNI? + + Yes. libgcj now has experimental support for JNI, in + addition to its native Compiled Native Interface (CNI). gcjh + will generate JNI stubs and headers using the "-jni" + option. However, we do prefer CNI: it is more efficient, + easier to write, and (at least potentially) easier to debug. + + 2.3 Why does GCJ use CNI? + + Per Bothner explains: + + We use CNI because we think it is a better solution, + especially for a Java implementation that is based on the + idea that Java is just another programming language that + can be implemented using standard compilation + techniques. Given that, and the idea that languages + implemented using Gcc should be compatible where it makes + sense, it follows that the Java calling convention should + be as similar as practical to that used for other + languages, especially C++, since we can think of Java as a + subset of C++. CNI is just a set of helper functions and + conventions built on the idea that C++ and Java have the + *same* calling convention and object layout; they are + binary compatible. (This is a simplification, but close + enough.) + + 2.4 What is the state of AWT support? + + Work is in progress to implement AWT and Java2D. We intend + to support both GTK and xlib peers written using CNI. Some + components are already working atop the xlib peers. + + 2.5 How about support for Swing? + + Once AWT support is working then Swing support can be + considered. There is at least one free-software partial + implementations of Swing that may be usable. + + 2.6 What support is there for RMI? + + RMI code exists on the CVS trunk (aka gcc 3.1), but it has + not been heavily tested. This code was donated by + Transvirtual Technologies. + + 2.7 Can I use any code from other OpenSource + projects to supplement libgcj's current features? + + Certainly. However, in many cases, if you wanted to + contribute the code back into the official libgcj + distribution, we would require that the original author(s) + assign copyright to the Free Software Foundation. As of + March 6, 2000, libgcj has been relicenced, and copyright + has been assigned to the FSF. This allows us to share and + merge much of the libgcj codebase with the Classpath + project. Our eventual goal is for Classpath to be an + upstream source provider for libgcj, however it will be + some time before this becomes reality: libgcj and Classpath + have different implementations of many core java + classes. In order to merge them, we need to select the best + (most efficient, cleanest) implementation of each + method/class/package, resolve any conflicts created by the + merge, and test the final result. Needless to say, this is + a lot of work. If you can help out, please let us know! + + 2.8 What features of the Java language are/aren't supported. + + GCJ supports all Java language constructs as per the Java + language Specification. Recent GCJ snapshots have added + support for most JDK1.1 (and beyond) language features, + including inner classes. + +Build Issues +============ + + 3.1 I need something more recent than the last release. + How should I build it? + + Please read here: http://gcc.gnu.org/java/build-snapshot.html + + 3.2 Linker bug on Solaris + + There is a known problem with the native Solaris linker when + using gcc/gcj. A good indication you've run into this + problem is if you get an error that looks like the following + when building libgcj: + +ld: warning: option -o appears more than once, first setting taken +ld: fatal: file libfoo.so: cannot open file: No such file or directory +ld: fatal: File processing errors. No output written to .libs/libfoo.so +collect2: ld returned 1 exit status + + A known workaround for this and other reported link problems + on the various releases of Solaris is to build gcc/gcj with + the latest GNU binutils instead of the native Solaris + ld. The most straightforward way to do this is to build and + install binutils, and then reference it in the configure for + gcc via --with-ld=/path_to_binutils_install/bin/ld + (--with-as may also be similarly specified but is not + believed to be required). + + Please note, gcc/gcj must be built using GNU ld prior to + doing a clean build of libgcj! + + 3.3 Can I configure/build in the source tree? + + No. You cannot configure/build in the source tree. If you + try, you'll see something like: + + $ ./configure [...] + Configuring for a i686-pc-linux-gnu host. + *** Cannot currently configure in source tree. + + Instead, you must build in another directory. E.g.: + + $ mkdir build + $ cd build + $ ../configure [...] + + 3.4 My libgcj build fails with "invalid use of undefined type + struct sigcontext_struct" + + If you're using Linux, this probably means you need to + upgrade to a newwer, glibc (libc6) based Linux + distribution. libgcj does not support the older linux libc5. + It might be possible to get a working libgcj by changing + occurances of "sigcontext_struct" to "sigcontext", however + this has not been tested. Even if it works, it is likely + that there are other issues with older libc versions that + would prevent libgcj from working correctly (threads bugs, + for example). + +Gcj Compile/Link Questions +========================== + + 4.1 Why do I get undefined reference to `main' errors? + + When using gcj to link a Java program, you must use the --main= + option to indicate the class that has the desired main method. + This is because every Java class can have a main method, thus + you have to tell gcj which one to use. + + 4.2 Can GCJ only handle source code? + + GCJ will compile both source (.java) and bytecode (.class) + files. However, in many cases the native code produced by + compiling from source is better optimized than that compiled + from .class files. + + Per Bothner explains: + + The reason is that when you compile to bytecode you lose a + lot of information about program structure etc. That + information helps in generating better code. We can in + theory recover the information we need by analysing the + structure of the bytecodes, but it is sometimes difficult + - or sometimes it just that no-one has gotten around to + it. Specific examples include loop structure (gcc + generates better code with explicit loops rather than with + the equivalent spaghetti code), array initializers, and + the JDK 1.1 `CLASS.class' syntax, all of which are + represented using more low-level constructs in bytecode. + + 4.3 "gcj -C" Doesn't seem to work like javac/jikes. Whats going on? + + The behavior of "gcj -C" is not at all like javac or jikes, + which will compile (not just scan) all .java's which are out + of date with regard to their .class's. + + 4.4 Where does GCJ look for files? + + GCJ looks for classes to compile based on the CLASSPATH + environment variable. libgcj.jar and other files are found + relative to the path of the compiler itself, so it is safe + to move the entire compiler tree to a different path, and + there is no need to include libgcj.jar in your CLASSPATH. + + 4.5 How does gcj resolve whether to compile .class or .java files? + + GCJ compiles only the files presented to it on the command + line. However, it also needs to scan other files in order to + determine the layout of other classes and check for errors + in your code. For these dependencies, GCJ will favour + .class files if they are available because it is faster to + parse a class file than source code. + + 4.6 I'm getting link errors + + If you get errors at link time that refer to 'undefined + reference to `java::lang::Object type_info function', verify + that you have compiled any CNI C++ files with the -fno-rtti + option. This is only required for versions of GCJ earlier + than 3.0. + + 4.7 I'm getting 'undefined symbol: __dso_handle' + + Some versions of the GNU linker have broken support for the + '.hidden' directive, which results in problems with shared + libraries built with recent versions of gcc. + + There are three solutions: + + - downgrade to binutils that don't support .hidden at all, + - upgrade to a recent binutils, or + - undef the HAVE_GAS_HIDDEN definition in gcc's auto-host.h + (and rebuild gcc). + +Runtime Questions +================= + + 5.1 My program is dumping core! What's going on? + + It could be any number of things. One common mistake is + having your CLASSPATH environment variable pointing at a + third party's java.lang and friends. Either unset CLASSPATH, + or make sure it does not refer to core libraries other than + those found in libgcj.jar.Note that newwer versions of GCJ + will reject the core class library if it wasn't generated by + GCJ itself. + + 5.2 When I run the debugger I get a SEGV in the GC! What's going on? + + This is "normal"; the Garbage Collector (GC) uses it to + determine stack boundaries. It is ordinarily caught and + handled by the GC -- you can see this in the debugger by + using cont to continue to the "real" segv. + + 5.3 I have just compiled and benchmarked my Java application + and it seems to be running slower than than XXX JIT JVM. Is there + anything I can do to make it go faster? + + A few things: + + - If your programs allocate many small, short lived objects, + the heap could be filling and triggering GC too + regularly. Try increasing the initial and maximum heap sizes + as per 5.5 How do I increase the runtime's initial and + maximum heap size? + - RE - array accesses. We have sub-optimal runtime checking + code, and the compiler is still not so smart about + automatically removing array checks. If your code is ready, + and it doesn't rely on them, try compiling with + --no-bounds-check. + - Try static linking. On many platforms, dynamic (PIC) + function calls are more expensive than static ones. In + particular, the interaction with boehm-gc seems to incur + extra overhead when shared libraries are used. + - If your Java application doesn't need threads, try + building libgcj using --enable-threads=none. Portions of the + libgcj runtime are still more efficient when + single-threaded. + + 5.4 Can I profile Garbage Collection? + + It is possible to turn on verbose GC output by supressing + the -DSILENT flag during build. One way to do this is to + comment out the line with #define SILENT 1 from + boehm-gc/configure before configuring libgcj. The GC will + print collection statistics to stdout. (Rebuilding boehm-gc + alone without this flag doesn't seem to work.) + + 5.5 How do I increase the runtime's initial and maximum heap sizes? + + Some programs that allocate many small, short-lived objects + can cause the default-sized heap to fill quickly and GC + often. With the 2.95.1 release there is no means to adjust + the heap at runtime. Recent snapshots provide the -ms and + -mx arguments to gij to specify the initial and maximum heap + sizes, respectively. + + 5.6 How can I profile my application? + + Currently, only single threaded Java code may be used by the + profiler (gprof). POSIX threads seem to be incompatible with + the gmon stuff. A couple of other tools that have been + mentioned on the GCJ mailing list are sprof and cprof. The + former is part of GNU libc. + + 5.7 My program seems to hang and doesn't produce any output + + Some versions had a bug in the iconv support. You can work + around it by setting LANG=en_US.UTF-8 at runtime, or give + the following option during compile time + -Dfile.encoding=UTF-8. This problem should no longer occur + as of November 1, 2000. + +Programming Issues +================== + + 6.1 Are there any examples of how to use CNI? + + Glenn Chambers has created a couple of trivial examples for + version 2.95 and version 3.0. As a comparison, here is the + same example as a JNI application using Kaffe. The same + code will work with GCJ, as shown here. + + Note that for version 2.95, you must compile the C++ files + used for CNI with the -fno-rtti option. This constraint + does not apply in version 3.0 and later. + + The primary source of documentation for CNI is at + http://gcc.gnu.org/java/papers/cni/t1.html + + 6.2 Is it possible to invoke GCJ compiled Java code from a + C++ application? + + Yes, GCJ 3.1 supports a CNI-based invocation interface as + well as the traditional JNI invocation API. See the GCJ + Manual for more details on how to use the CNI interface. + +Please send FSF & GNU inquiries & questions tognu@gnu.org.There are +also other waysto contact the FSF. + +These pages are maintained by The GCC team. + +Please send comments on these web pages and GCC to our publicmailing +list at gcc@gnu.org orgcc@gcc.gnu.org, send other questions to +gnu@gnu.org. + +Copyright (C) Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111, USA. + +Verbatim copying and distribution of this entire article is permitted +in any medium, provided this notice is preserved. + +Last modified 2003-04-30 --- gcc-4.7-4.7.2.orig/debian/lib64gcc1.symbols.s390 +++ gcc-4.7-4.7.2/debian/lib64gcc1.symbols.s390 @@ -0,0 +1,110 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_4.1.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.1.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.ppc64 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.ppc64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.32bit +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.32bit @@ -0,0 +1,551 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEj@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEjj@GLIBCXX_3.4 4.1.1 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1:4.3 + __satfracttiuha@GCC_4.3.0 1:4.3 + __satfracttiuhq@GCC_4.3.0 1:4.3 + __satfracttiuqq@GCC_4.3.0 1:4.3 + __satfracttiusa@GCC_4.3.0 1:4.3 + __satfracttiusq@GCC_4.3.0 1:4.3 + __satfracttiuta@GCC_4.3.0 1:4.3 + __satfracttiutq@GCC_4.3.0 1:4.3 + __satfracttqda@GCC_4.3.0 1:4.3 + __satfracttqdq2@GCC_4.3.0 1:4.3 + __satfracttqha@GCC_4.3.0 1:4.3 + __satfracttqhq2@GCC_4.3.0 1:4.3 + __satfracttqqq2@GCC_4.3.0 1:4.3 + __satfracttqsa@GCC_4.3.0 1:4.3 + __satfracttqsq2@GCC_4.3.0 1:4.3 + __satfracttqta@GCC_4.3.0 1:4.3 + __satfracttquda@GCC_4.3.0 1:4.3 + __satfracttqudq@GCC_4.3.0 1:4.3 + __satfracttquha@GCC_4.3.0 1:4.3 + __satfracttquhq@GCC_4.3.0 1:4.3 + __satfracttquqq@GCC_4.3.0 1:4.3 + __satfracttqusa@GCC_4.3.0 1:4.3 + __satfracttqusq@GCC_4.3.0 1:4.3 + __satfracttquta@GCC_4.3.0 1:4.3 + __satfracttqutq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudata@GCC_4.3.0 1:4.3 + __satfractudatq@GCC_4.3.0 1:4.3 + __satfractudaudq@GCC_4.3.0 1:4.3 + __satfractudauha2@GCC_4.3.0 1:4.3 + __satfractudauhq@GCC_4.3.0 1:4.3 + __satfractudauqq@GCC_4.3.0 1:4.3 + __satfractudausa2@GCC_4.3.0 1:4.3 + __satfractudausq@GCC_4.3.0 1:4.3 + __satfractudauta2@GCC_4.3.0 1:4.3 + __satfractudautq@GCC_4.3.0 1:4.3 + __satfractudqda@GCC_4.3.0 1:4.3 + __satfractudqdq@GCC_4.3.0 1:4.3 + __satfractudqha@GCC_4.3.0 1:4.3 + __satfractudqhq@GCC_4.3.0 1:4.3 + __satfractudqqq@GCC_4.3.0 1:4.3 + __satfractudqsa@GCC_4.3.0 1:4.3 + __satfractudqsq@GCC_4.3.0 1:4.3 + __satfractudqta@GCC_4.3.0 1:4.3 + __satfractudqtq@GCC_4.3.0 1:4.3 + __satfractudquda@GCC_4.3.0 1:4.3 + __satfractudquha@GCC_4.3.0 1:4.3 + __satfractudquhq2@GCC_4.3.0 1:4.3 + __satfractudquqq2@GCC_4.3.0 1:4.3 + __satfractudqusa@GCC_4.3.0 1:4.3 + __satfractudqusq2@GCC_4.3.0 1:4.3 + __satfractudquta@GCC_4.3.0 1:4.3 + __satfractudqutq2@GCC_4.3.0 1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhata@GCC_4.3.0 1:4.3 + __satfractuhatq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhauta2@GCC_4.3.0 1:4.3 + __satfractuhautq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhqta@GCC_4.3.0 1:4.3 + __satfractuhqtq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 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__satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunsqiuta@GCC_4.3.0 1:4.3 + __satfractunsqiutq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssita@GCC_4.3.0 1:4.3 + __satfractunssitq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractunssiuta@GCC_4.3.0 1:4.3 + __satfractunssiutq@GCC_4.3.0 1:4.3 + __satfractunstida@GCC_4.3.0 1:4.3 + __satfractunstidq@GCC_4.3.0 1:4.3 + __satfractunstiha@GCC_4.3.0 1:4.3 + __satfractunstihq@GCC_4.3.0 1:4.3 + __satfractunstiqq@GCC_4.3.0 1:4.3 + __satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusata@GCC_4.3.0 1:4.3 + __satfractusatq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusauta2@GCC_4.3.0 1:4.3 + __satfractusautq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusqta@GCC_4.3.0 1:4.3 + __satfractusqtq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 1:4.3 + __satfractutqta@GCC_4.3.0 1:4.3 + __satfractutqtq@GCC_4.3.0 1:4.3 + __satfractutquda@GCC_4.3.0 1:4.3 + __satfractutqudq2@GCC_4.3.0 1:4.3 + __satfractutquha@GCC_4.3.0 1:4.3 + __satfractutquhq2@GCC_4.3.0 1:4.3 + __satfractutquqq2@GCC_4.3.0 1:4.3 + __satfractutqusa@GCC_4.3.0 1:4.3 + __satfractutqusq2@GCC_4.3.0 1:4.3 + __satfractutquta@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssaddta3@GCC_4.3.0 1:4.3 + __ssaddtq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssashlta3@GCC_4.3.0 1:4.3 + __ssashltq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssdivta3@GCC_4.3.0 1:4.3 + __ssdivtq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssmulta3@GCC_4.3.0 1:4.3 + __ssmultq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __ssnegta2@GCC_4.3.0 1:4.3 + __ssnegtq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __sssubta3@GCC_4.3.0 1:4.3 + __sssubtq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 1:4.3 + __subhq3@GCC_4.3.0 1:4.3 + __subqq3@GCC_4.3.0 1:4.3 + __subsa3@GCC_4.3.0 1:4.3 + __subsf3@GCC_3.0 1:4.1.1 + __subsq3@GCC_4.3.0 1:4.3 + __subta3@GCC_4.3.0 1:4.3 + __subtf3@GCC_3.0 1:4.1.1 + __subtq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subuta3@GCC_4.3.0 1:4.3 + __subutq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_8@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_8@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_synchronize@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_8@GCC_4.4.0 1:4.4 + __truncdfsf2@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_3.0 1:4.1.1 + __trunctfsf2@GCC_3.0 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __udivuta3@GCC_4.3.0 1:4.3 + __udivutq3@GCC_4.3.0 1:4.3 + __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __unordtf2@GCC_4.5.0 1:4.5 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usadduta3@GCC_4.3.0 1:4.3 + __usaddutq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usashluta3@GCC_4.3.0 1:4.3 + __usashlutq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usdivuta3@GCC_4.3.0 1:4.3 + __usdivutq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usmuluta3@GCC_4.3.0 1:4.3 + __usmulutq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __usneguta2@GCC_4.3.0 1:4.3 + __usnegutq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 + __ussubuta3@GCC_4.3.0 1:4.3 + __ussubutq3@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.2.orig/debian/lib32stdc++6.symbols.ppc64 +++ gcc-4.7-4.7.2/debian/lib32stdc++6.symbols.ppc64 @@ -0,0 +1,8 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.2.orig/debian/gcc-BV-spu.overrides +++ gcc-4.7-4.7.2/debian/gcc-BV-spu.overrides @@ -0,0 +1,2 @@ +gcc-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +gcc-@BV@-spu binary: file-in-unusual-dir --- gcc-4.7-4.7.2.orig/debian/lib32gomp1.symbols +++ gcc-4.7-4.7.2/debian/lib32gomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 lib32gomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- gcc-4.7-4.7.2.orig/debian/gcc-XX-BV.1 +++ gcc-4.7-4.7.2/debian/gcc-XX-BV.1 @@ -0,0 +1,17 @@ +.TH GCC-@TOOL@-@BV@ 1 "May 8, 2012" gcc-@TOOL@-@BV@ "" +.SH NAME +gcc-@TOOL@ \- a wrapper around @TOOL@ adding the --plugin option + +.SH SYNOPSIS +gcc-@TOOL@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcc-@TOOL@\fR is a wrapper around @TOOL@(1) adding the appropriate +\fB\-\-plugin\fR option for the GCC @BV@ compiler. + +.SH OPTIONS +See @TOOL@(1) for a list of options that @TOOL@ understands. + +.SH "SEE ALSO" +.BR @TOOL@(1) --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.s390 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.s390 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.2.orig/debian/gcj-BV-jre-headless.postrm +++ gcc-4.7-4.7.2/debian/gcj-BV-jre-headless.postrm @@ -0,0 +1,10 @@ +#! /bin/sh -e + +case "$1" in + purge) + rm -f /var/lib/gcj-@BV@/classmap.db +esac + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.mipsel +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.mipsel @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.mipsel +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.mipsel @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.2.orig/debian/libitm1.symbols.common +++ gcc-4.7-4.7.2/debian/libitm1.symbols.common @@ -0,0 +1,167 @@ + LIBITM_1.0@LIBITM_1.0 4.7 + _ITM_LB@LIBITM_1.0 4.7 + _ITM_LCD@LIBITM_1.0 4.7 + _ITM_LCE@LIBITM_1.0 4.7 + _ITM_LCF@LIBITM_1.0 4.7 + _ITM_LD@LIBITM_1.0 4.7 + _ITM_LE@LIBITM_1.0 4.7 + _ITM_LF@LIBITM_1.0 4.7 + _ITM_LM128@LIBITM_1.0 4.7 + _ITM_LM256@LIBITM_1.0 4.7 + _ITM_LM64@LIBITM_1.0 4.7 + _ITM_LU1@LIBITM_1.0 4.7 + _ITM_LU2@LIBITM_1.0 4.7 + _ITM_LU4@LIBITM_1.0 4.7 + _ITM_LU8@LIBITM_1.0 4.7 + _ITM_RCD@LIBITM_1.0 4.7 + _ITM_RCE@LIBITM_1.0 4.7 + _ITM_RCF@LIBITM_1.0 4.7 + _ITM_RD@LIBITM_1.0 4.7 + _ITM_RE@LIBITM_1.0 4.7 + _ITM_RF@LIBITM_1.0 4.7 + _ITM_RM128@LIBITM_1.0 4.7 + _ITM_RM256@LIBITM_1.0 4.7 + _ITM_RM64@LIBITM_1.0 4.7 + _ITM_RU1@LIBITM_1.0 4.7 + _ITM_RU2@LIBITM_1.0 4.7 + _ITM_RU4@LIBITM_1.0 4.7 + _ITM_RU8@LIBITM_1.0 4.7 + _ITM_RaRCD@LIBITM_1.0 4.7 + _ITM_RaRCE@LIBITM_1.0 4.7 + _ITM_RaRCF@LIBITM_1.0 4.7 + _ITM_RaRD@LIBITM_1.0 4.7 + _ITM_RaRE@LIBITM_1.0 4.7 + _ITM_RaRF@LIBITM_1.0 4.7 + _ITM_RaRM128@LIBITM_1.0 4.7 + _ITM_RaRM256@LIBITM_1.0 4.7 + _ITM_RaRM64@LIBITM_1.0 4.7 + _ITM_RaRU1@LIBITM_1.0 4.7 + _ITM_RaRU2@LIBITM_1.0 4.7 + _ITM_RaRU4@LIBITM_1.0 4.7 + _ITM_RaRU8@LIBITM_1.0 4.7 + _ITM_RaWCD@LIBITM_1.0 4.7 + _ITM_RaWCE@LIBITM_1.0 4.7 + _ITM_RaWCF@LIBITM_1.0 4.7 + _ITM_RaWD@LIBITM_1.0 4.7 + _ITM_RaWE@LIBITM_1.0 4.7 + _ITM_RaWF@LIBITM_1.0 4.7 + _ITM_RaWM128@LIBITM_1.0 4.7 + _ITM_RaWM256@LIBITM_1.0 4.7 + _ITM_RaWM64@LIBITM_1.0 4.7 + _ITM_RaWU1@LIBITM_1.0 4.7 + _ITM_RaWU2@LIBITM_1.0 4.7 + _ITM_RaWU4@LIBITM_1.0 4.7 + _ITM_RaWU8@LIBITM_1.0 4.7 + _ITM_RfWCD@LIBITM_1.0 4.7 + _ITM_RfWCE@LIBITM_1.0 4.7 + _ITM_RfWCF@LIBITM_1.0 4.7 + _ITM_RfWD@LIBITM_1.0 4.7 + _ITM_RfWE@LIBITM_1.0 4.7 + _ITM_RfWF@LIBITM_1.0 4.7 + _ITM_RfWM128@LIBITM_1.0 4.7 + _ITM_RfWM256@LIBITM_1.0 4.7 + _ITM_RfWM64@LIBITM_1.0 4.7 + _ITM_RfWU1@LIBITM_1.0 4.7 + _ITM_RfWU2@LIBITM_1.0 4.7 + _ITM_RfWU4@LIBITM_1.0 4.7 + _ITM_RfWU8@LIBITM_1.0 4.7 + _ITM_WCD@LIBITM_1.0 4.7 + _ITM_WCE@LIBITM_1.0 4.7 + _ITM_WCF@LIBITM_1.0 4.7 + _ITM_WD@LIBITM_1.0 4.7 + _ITM_WE@LIBITM_1.0 4.7 + _ITM_WF@LIBITM_1.0 4.7 + _ITM_WM128@LIBITM_1.0 4.7 + _ITM_WM256@LIBITM_1.0 4.7 + _ITM_WM64@LIBITM_1.0 4.7 + _ITM_WU1@LIBITM_1.0 4.7 + _ITM_WU2@LIBITM_1.0 4.7 + _ITM_WU4@LIBITM_1.0 4.7 + _ITM_WU8@LIBITM_1.0 4.7 + _ITM_WaRCD@LIBITM_1.0 4.7 + _ITM_WaRCE@LIBITM_1.0 4.7 + _ITM_WaRCF@LIBITM_1.0 4.7 + _ITM_WaRD@LIBITM_1.0 4.7 + _ITM_WaRE@LIBITM_1.0 4.7 + _ITM_WaRF@LIBITM_1.0 4.7 + _ITM_WaRM128@LIBITM_1.0 4.7 + _ITM_WaRM256@LIBITM_1.0 4.7 + _ITM_WaRM64@LIBITM_1.0 4.7 + _ITM_WaRU1@LIBITM_1.0 4.7 + _ITM_WaRU2@LIBITM_1.0 4.7 + _ITM_WaRU4@LIBITM_1.0 4.7 + _ITM_WaRU8@LIBITM_1.0 4.7 + _ITM_WaWCD@LIBITM_1.0 4.7 + _ITM_WaWCE@LIBITM_1.0 4.7 + _ITM_WaWCF@LIBITM_1.0 4.7 + _ITM_WaWD@LIBITM_1.0 4.7 + _ITM_WaWE@LIBITM_1.0 4.7 + _ITM_WaWF@LIBITM_1.0 4.7 + _ITM_WaWM128@LIBITM_1.0 4.7 + _ITM_WaWM256@LIBITM_1.0 4.7 + _ITM_WaWM64@LIBITM_1.0 4.7 + _ITM_WaWU1@LIBITM_1.0 4.7 + _ITM_WaWU2@LIBITM_1.0 4.7 + _ITM_WaWU4@LIBITM_1.0 4.7 + _ITM_WaWU8@LIBITM_1.0 4.7 + _ITM_abortTransaction@LIBITM_1.0 4.7 + _ITM_addUserCommitAction@LIBITM_1.0 4.7 + _ITM_addUserUndoAction@LIBITM_1.0 4.7 + _ITM_beginTransaction@LIBITM_1.0 4.7 + _ITM_calloc@LIBITM_1.0 4.7 + _ITM_changeTransactionMode@LIBITM_1.0 4.7 + _ITM_commitTransaction@LIBITM_1.0 4.7 + _ITM_commitTransactionEH@LIBITM_1.0 4.7 + _ITM_cxa_allocate_exception@LIBITM_1.0 4.7 + _ITM_cxa_begin_catch@LIBITM_1.0 4.7 + _ITM_cxa_end_catch@LIBITM_1.0 4.7 + _ITM_cxa_throw@LIBITM_1.0 4.7 + _ITM_deregisterTMCloneTable@LIBITM_1.0 4.7 + _ITM_dropReferences@LIBITM_1.0 4.7 + _ITM_error@LIBITM_1.0 4.7 + _ITM_free@LIBITM_1.0 4.7 + _ITM_getTMCloneOrIrrevocable@LIBITM_1.0 4.7 + _ITM_getTMCloneSafe@LIBITM_1.0 4.7 + _ITM_getTransactionId@LIBITM_1.0 4.7 + _ITM_inTransaction@LIBITM_1.0 4.7 + _ITM_libraryVersion@LIBITM_1.0 4.7 + _ITM_malloc@LIBITM_1.0 4.7 + _ITM_memcpyRnWt@LIBITM_1.0 4.7 + _ITM_memcpyRnWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRnWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtWn@LIBITM_1.0 4.7 + _ITM_memcpyRtWt@LIBITM_1.0 4.7 + _ITM_memcpyRtWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWn@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWt@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWn@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWt@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRnWt@LIBITM_1.0 4.7 + _ITM_memmoveRnWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRnWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtWn@LIBITM_1.0 4.7 + _ITM_memmoveRtWt@LIBITM_1.0 4.7 + _ITM_memmoveRtWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWn@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWt@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWn@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWt@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWtaW@LIBITM_1.0 4.7 + _ITM_memsetW@LIBITM_1.0 4.7 + _ITM_memsetWaR@LIBITM_1.0 4.7 + _ITM_memsetWaW@LIBITM_1.0 4.7 + _ITM_registerTMCloneTable@LIBITM_1.0 4.7 + _ITM_versionCompatible@LIBITM_1.0 4.7 + _ZGTtdaPv@LIBITM_1.0 4.7 + _ZGTtdaPvRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtdlPv@LIBITM_1.0 4.7 + _ZGTtdlPvRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.7-4.7.2.orig/debian/lib32gcc1.symbols.amd64 +++ gcc-4.7-4.7.2/debian/lib32gcc1.symbols.amd64 @@ -0,0 +1,137 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.hurd-i386 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.hurd-i386 @@ -0,0 +1,5 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit.hurd" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.2.orig/debian/lib64quadmath0.symbols +++ gcc-4.7-4.7.2/debian/lib64quadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 lib64quadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.7-4.7.2.orig/debian/locale-gen +++ gcc-4.7-4.7.2/debian/locale-gen @@ -0,0 +1,48 @@ +#!/bin/sh + +LOCPATH=`pwd`/locales +export LOCPATH + +[ -d $LOCPATH ] || mkdir -p $LOCPATH + +umask 022 + +echo "Generating locales..." +while read locale charset; do + case $locale in \#*) continue;; esac + [ -n "$locale" -a -n "$charset" ] || continue + echo -n " `echo $locale | sed 's/\([^.\@]*\).*/\1/'`" + echo -n ".$charset" + echo -n `echo $locale | sed 's/\([^\@]*\)\(\@.*\)*/\2/'` + echo -n '...' + if [ -f $LOCPATH/$locale ]; then + input=$locale + else + input=`echo $locale | sed 's/\([^.]*\)[^@]*\(.*\)/\1\2/'` + fi + localedef -i $input -c -f $charset $LOCPATH/$locale #-A /etc/locale.alias + echo ' done'; \ +done <&2 "usage: `basename $0` [-p ] [-t ] [-m ]" + echo >&2 " [ ...]" + exit 1 +} + +while [ $# -gt 0 ]; do + case $1 in + -p) + pidfile=$2 + shift + shift + ;; + -t) + timeout=$2 + shift + shift + ;; + -m) + message="$2" + shift + shift + ;; + -*) + usage + ;; + *) + break + esac +done + +[ $# -gt 0 ] || usage + +logfile="$1" +shift +otherlogs="$@" + +cleanup() +{ + rm -f $pidfile + exit 0 +} + +#trap cleanup 0 1 3 15 + +echo $$ > $pidfile + +update() +{ + _logvar=$1 + _othervar=$2 + + # logfile may not exist yet + if [ -r $logfile ]; then + _logtail="`tail -10 $logfile | md5sum` $f" + else + _logtail="does not exist: $logfile" + fi + eval $_logvar="'$_logtail'" + + _othertails='' + for f in $otherlogs; do + if [ -r $f ]; then + _othertails="$_othertails `tail -10 $f | md5sum` $f" + else + _othertails="$_othertails does not exist: $f" + fi + done + eval $_othervar="'$_othertails'" +} + +update logtail othertails +while true; do + sleep $timeout + update newlogtail newothertails + if [ "$logtail" != "$newlogtail" ]; then + # there is still action in the primary logfile. do nothing. + logtail="$newlogtail" + elif [ "$othertails" != "$newothertails" ]; then + # there is still action in the other log files, so print the message + /bin/echo -e $message + othertails="$newothertails" + else + # nothing changed in the other log files. maybe a timeout ... + : + fi +done --- gcc-4.7-4.7.2.orig/debian/gnat-BV.overrides +++ gcc-4.7-4.7.2/debian/gnat-BV.overrides @@ -0,0 +1 @@ +gnat-@BV@ binary: quilt-build-dep-but-no-series-file --- gcc-4.7-4.7.2.orig/debian/gcc-BV-hppa64.prerm +++ gcc-4.7-4.7.2/debian/gcc-BV-hppa64.prerm @@ -0,0 +1,10 @@ +#! /bin/sh -e + +if [ "$1" != "upgrade" ]; then + update-alternatives --quiet \ + --remove hppa64-linux-gcc /usr/bin/hppa64-linux-gnu-gcc-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.sparc +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.sparc @@ -0,0 +1,9 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" +#include "libstdc++6.symbols.128bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.sparc64 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.sparc64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/gcc-BV-source.overrides +++ gcc-4.7-4.7.2/debian/gcc-BV-source.overrides @@ -0,0 +1,5 @@ +gcc-@BV@-source: changelog-file-not-compressed + +# these are patches taken over unmodified from 4.3 +gcc-@BV@-source: script-not-executable +gcc-@BV@-source: shell-script-fails-syntax-check --- gcc-4.7-4.7.2.orig/debian/watch +++ gcc-4.7-4.7.2/debian/watch @@ -0,0 +1,2 @@ +version=2 +ftp://gcc.gnu.org/pub/gcc/releases/gcc-(4\.6[\d\.]*) debian uupdate --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.alpha +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.alpha @@ -0,0 +1,108 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_LDBL_4.0.0@GCC_LDBL_4.0.0 1:4.2.1 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_LDBL_4.0.0 1:4.2.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.2.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.2.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_LDBL_4.0.0 1:4.2.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_LDBL_4.0.0 1:4.2.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/compat +++ gcc-4.7-4.7.2/debian/compat @@ -0,0 +1 @@ +5 --- gcc-4.7-4.7.2.orig/debian/libgcjGCJ-dev.overrides +++ gcc-4.7-4.7.2/debian/libgcjGCJ-dev.overrides @@ -0,0 +1 @@ +libgcj@GCJ@-dev binary: library-not-linked-against-libc --- gcc-4.7-4.7.2.orig/debian/lib64gfortran3.symbols.sparc +++ gcc-4.7-4.7.2/debian/lib64gfortran3.symbols.sparc @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/README.libstdc++-baseline.in +++ gcc-4.7-4.7.2/debian/README.libstdc++-baseline.in @@ -0,0 +1,2 @@ +The libstdc++ baseline file is a list of symbols exported by the +libstdc++ library. --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.mipsel +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.mipsel @@ -0,0 +1,1222 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addda3@GCC_4.3.0 1:4.3 + __adddf3@GCC_3.0 1:4.1.1 + __adddq3@GCC_4.3.0 1:4.3 + __addha3@GCC_4.3.0 1:4.3 + __addhq3@GCC_4.3.0 1:4.3 + __addqq3@GCC_4.3.0 1:4.3 + __addsa3@GCC_4.3.0 1:4.3 + __addsf3@GCC_3.0 1:4.1.1 + __addsq3@GCC_4.3.0 1:4.3 + __adduda3@GCC_4.3.0 1:4.3 + __addudq3@GCC_4.3.0 1:4.3 + __adduha3@GCC_4.3.0 1:4.3 + __adduhq3@GCC_4.3.0 1:4.3 + __adduqq3@GCC_4.3.0 1:4.3 + __addusa3@GCC_4.3.0 1:4.3 + __addusq3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashlda3@GCC_4.3.0 1:4.3 + __ashldi3@GCC_3.0 1:4.1.1 + __ashldq3@GCC_4.3.0 1:4.3 + __ashlha3@GCC_4.3.0 1:4.3 + __ashlhq3@GCC_4.3.0 1:4.3 + __ashlqq3@GCC_4.3.0 1:4.3 + __ashlsa3@GCC_4.3.0 1:4.3 + __ashlsq3@GCC_4.3.0 1:4.3 + __ashluda3@GCC_4.3.0 1:4.3 + __ashludq3@GCC_4.3.0 1:4.3 + __ashluha3@GCC_4.3.0 1:4.3 + __ashluhq3@GCC_4.3.0 1:4.3 + __ashluqq3@GCC_4.3.0 1:4.3 + __ashlusa3@GCC_4.3.0 1:4.3 + __ashlusq3@GCC_4.3.0 1:4.3 + __ashrda3@GCC_4.3.0 1:4.3 + __ashrdi3@GCC_3.0 1:4.1.1 + __ashrdq3@GCC_4.3.0 1:4.3 + __ashrha3@GCC_4.3.0 1:4.3 + __ashrhq3@GCC_4.3.0 1:4.3 + __ashrqq3@GCC_4.3.0 1:4.3 + __ashrsa3@GCC_4.3.0 1:4.3 + __ashrsq3@GCC_4.3.0 1:4.3 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpda2@GCC_4.3.0 1:4.3 + __cmpdi2@GCC_3.0 1:4.1.1 + __cmpdq2@GCC_4.3.0 1:4.3 + __cmpha2@GCC_4.3.0 1:4.3 + __cmphq2@GCC_4.3.0 1:4.3 + __cmpqq2@GCC_4.3.0 1:4.3 + __cmpsa2@GCC_4.3.0 1:4.3 + __cmpsq2@GCC_4.3.0 1:4.3 + __cmpuda2@GCC_4.3.0 1:4.3 + __cmpudq2@GCC_4.3.0 1:4.3 + __cmpuha2@GCC_4.3.0 1:4.3 + __cmpuhq2@GCC_4.3.0 1:4.3 + __cmpuqq2@GCC_4.3.0 1:4.3 + __cmpusa2@GCC_4.3.0 1:4.3 + __cmpusq2@GCC_4.3.0 1:4.3 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divda3@GCC_4.3.0 1:4.3 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divdq3@GCC_4.3.0 1:4.3 + __divha3@GCC_4.3.0 1:4.3 + __divhq3@GCC_4.3.0 1:4.3 + __divqq3@GCC_4.3.0 1:4.3 + __divsa3@GCC_4.3.0 1:4.3 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divsq3@GCC_4.3.0 1:4.3 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __fractdadf@GCC_4.3.0 1:4.3 + __fractdadi@GCC_4.3.0 1:4.3 + __fractdadq@GCC_4.3.0 1:4.3 + __fractdaha2@GCC_4.3.0 1:4.3 + __fractdahi@GCC_4.3.0 1:4.3 + __fractdahq@GCC_4.3.0 1:4.3 + __fractdaqi@GCC_4.3.0 1:4.3 + __fractdaqq@GCC_4.3.0 1:4.3 + __fractdasa2@GCC_4.3.0 1:4.3 + __fractdasf@GCC_4.3.0 1:4.3 + __fractdasi@GCC_4.3.0 1:4.3 + __fractdasq@GCC_4.3.0 1:4.3 + __fractdauda@GCC_4.3.0 1:4.3 + __fractdaudq@GCC_4.3.0 1:4.3 + __fractdauha@GCC_4.3.0 1:4.3 + __fractdauhq@GCC_4.3.0 1:4.3 + __fractdauqq@GCC_4.3.0 1:4.3 + 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__satfracthquha@GCC_4.3.0 1:4.3 + __satfracthquhq@GCC_4.3.0 1:4.3 + __satfracthquqq@GCC_4.3.0 1:4.3 + __satfracthqusa@GCC_4.3.0 1:4.3 + __satfracthqusq@GCC_4.3.0 1:4.3 + __satfractqida@GCC_4.3.0 1:4.3 + __satfractqidq@GCC_4.3.0 1:4.3 + __satfractqiha@GCC_4.3.0 1:4.3 + __satfractqihq@GCC_4.3.0 1:4.3 + __satfractqiqq@GCC_4.3.0 1:4.3 + __satfractqisa@GCC_4.3.0 1:4.3 + __satfractqisq@GCC_4.3.0 1:4.3 + __satfractqiuda@GCC_4.3.0 1:4.3 + __satfractqiudq@GCC_4.3.0 1:4.3 + __satfractqiuha@GCC_4.3.0 1:4.3 + __satfractqiuhq@GCC_4.3.0 1:4.3 + __satfractqiuqq@GCC_4.3.0 1:4.3 + __satfractqiusa@GCC_4.3.0 1:4.3 + __satfractqiusq@GCC_4.3.0 1:4.3 + __satfractqqda@GCC_4.3.0 1:4.3 + __satfractqqdq2@GCC_4.3.0 1:4.3 + __satfractqqha@GCC_4.3.0 1:4.3 + __satfractqqhq2@GCC_4.3.0 1:4.3 + __satfractqqsa@GCC_4.3.0 1:4.3 + __satfractqqsq2@GCC_4.3.0 1:4.3 + __satfractqquda@GCC_4.3.0 1:4.3 + __satfractqqudq@GCC_4.3.0 1:4.3 + __satfractqquha@GCC_4.3.0 1:4.3 + __satfractqquhq@GCC_4.3.0 1:4.3 + __satfractqquqq@GCC_4.3.0 1:4.3 + __satfractqqusa@GCC_4.3.0 1:4.3 + __satfractqqusq@GCC_4.3.0 1:4.3 + __satfractsada2@GCC_4.3.0 1:4.3 + __satfractsadq@GCC_4.3.0 1:4.3 + __satfractsaha2@GCC_4.3.0 1:4.3 + __satfractsahq@GCC_4.3.0 1:4.3 + __satfractsaqq@GCC_4.3.0 1:4.3 + __satfractsasq@GCC_4.3.0 1:4.3 + __satfractsauda@GCC_4.3.0 1:4.3 + __satfractsaudq@GCC_4.3.0 1:4.3 + __satfractsauha@GCC_4.3.0 1:4.3 + __satfractsauhq@GCC_4.3.0 1:4.3 + __satfractsauqq@GCC_4.3.0 1:4.3 + __satfractsausa@GCC_4.3.0 1:4.3 + __satfractsausq@GCC_4.3.0 1:4.3 + __satfractsfda@GCC_4.3.0 1:4.3 + __satfractsfdq@GCC_4.3.0 1:4.3 + __satfractsfha@GCC_4.3.0 1:4.3 + __satfractsfhq@GCC_4.3.0 1:4.3 + __satfractsfqq@GCC_4.3.0 1:4.3 + __satfractsfsa@GCC_4.3.0 1:4.3 + __satfractsfsq@GCC_4.3.0 1:4.3 + __satfractsfuda@GCC_4.3.0 1:4.3 + __satfractsfudq@GCC_4.3.0 1:4.3 + __satfractsfuha@GCC_4.3.0 1:4.3 + __satfractsfuhq@GCC_4.3.0 1:4.3 + __satfractsfuqq@GCC_4.3.0 1:4.3 + __satfractsfusa@GCC_4.3.0 1:4.3 + __satfractsfusq@GCC_4.3.0 1:4.3 + __satfractsida@GCC_4.3.0 1:4.3 + __satfractsidq@GCC_4.3.0 1:4.3 + __satfractsiha@GCC_4.3.0 1:4.3 + __satfractsihq@GCC_4.3.0 1:4.3 + __satfractsiqq@GCC_4.3.0 1:4.3 + __satfractsisa@GCC_4.3.0 1:4.3 + __satfractsisq@GCC_4.3.0 1:4.3 + __satfractsiuda@GCC_4.3.0 1:4.3 + __satfractsiudq@GCC_4.3.0 1:4.3 + __satfractsiuha@GCC_4.3.0 1:4.3 + __satfractsiuhq@GCC_4.3.0 1:4.3 + __satfractsiuqq@GCC_4.3.0 1:4.3 + __satfractsiusa@GCC_4.3.0 1:4.3 + __satfractsiusq@GCC_4.3.0 1:4.3 + __satfractsqda@GCC_4.3.0 1:4.3 + __satfractsqdq2@GCC_4.3.0 1:4.3 + __satfractsqha@GCC_4.3.0 1:4.3 + __satfractsqhq2@GCC_4.3.0 1:4.3 + __satfractsqqq2@GCC_4.3.0 1:4.3 + __satfractsqsa@GCC_4.3.0 1:4.3 + __satfractsquda@GCC_4.3.0 1:4.3 + __satfractsqudq@GCC_4.3.0 1:4.3 + __satfractsquha@GCC_4.3.0 1:4.3 + __satfractsquhq@GCC_4.3.0 1:4.3 + __satfractsquqq@GCC_4.3.0 1:4.3 + __satfractsqusa@GCC_4.3.0 1:4.3 + __satfractsqusq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudaudq@GCC_4.3.0 1:4.3 + __satfractudauha2@GCC_4.3.0 1:4.3 + __satfractudauhq@GCC_4.3.0 1:4.3 + __satfractudauqq@GCC_4.3.0 1:4.3 + __satfractudausa2@GCC_4.3.0 1:4.3 + __satfractudausq@GCC_4.3.0 1:4.3 + __satfractudqda@GCC_4.3.0 1:4.3 + __satfractudqdq@GCC_4.3.0 1:4.3 + __satfractudqha@GCC_4.3.0 1:4.3 + __satfractudqhq@GCC_4.3.0 1:4.3 + __satfractudqqq@GCC_4.3.0 1:4.3 + __satfractudqsa@GCC_4.3.0 1:4.3 + __satfractudqsq@GCC_4.3.0 1:4.3 + __satfractudquda@GCC_4.3.0 1:4.3 + __satfractudquha@GCC_4.3.0 1:4.3 + __satfractudquhq2@GCC_4.3.0 1:4.3 + __satfractudquqq2@GCC_4.3.0 1:4.3 + __satfractudqusa@GCC_4.3.0 1:4.3 + __satfractudqusq2@GCC_4.3.0 1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 1:4.3 + __subhq3@GCC_4.3.0 1:4.3 + __subqq3@GCC_4.3.0 1:4.3 + __subsa3@GCC_4.3.0 1:4.3 + __subsf3@GCC_3.0 1:4.1.1 + __subsq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_synchronize@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4.0 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.2.orig/debian/lib64gccLC.postinst +++ gcc-4.7-4.7.2/debian/lib64gccLC.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib64gcc@LC@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/rules +++ gcc-4.7-4.7.2/debian/rules @@ -0,0 +1,112 @@ +#! /usr/bin/make -f +# -*- makefile -*- +# Build rules for gcc (>= 2.95) and gcc-snapshot +# Targets found in this makefile: +# - unpack tarballs +# - patch sources +# - (re)create the control file +# - create a debian/rules.parameters file, which is included +# by debian/rules2 +# All other targets are passed to the debian/rules2 file + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +unexport LANG LC_ALL LC_CTYPE LC_COLLATE LC_TIME LC_NUMERIC LC_MESSAGES + +default: build + +include debian/rules.defs +include debian/rules.unpack +include debian/rules.patch + +control: $(control_dependencies) + -mkdir -p $(stampdir) + $(MAKE) -f debian/rules.conf $@ + +configure: $(configure_dependencies) +$(configure_stamp): control $(unpack_stamp) $(patch_stamp) + $(MAKE) -f debian/rules2 $@ +$(configure_dummy_stamp): control + $(MAKE) -f debian/rules2 $@ +$(configure_hppa64_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(configure_neon_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(configure_spu_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ + +pre-build: +#ifneq (,$(filter $(distrelease),squeeze sid)) +#ifeq (,$(filter $(DEB_TARGET_ARCH),amd64 i386)) +# @echo explicitely fail the build for $(DEB_TARGET_ARCH) +# @echo no bug report required. please ask the port maintainers if they support gcc-4.5. +# false +#endif +#endif + +build: pre-build $(build_dependencies) +build-arch: build +build-indep: build +$(build_stamp): $(unpack_stamp) $(patch_stamp) $(configure_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_dummy_stamp): $(configure_dummy_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_javadoc_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_hppa64_stamp): $(configure_hppa64_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_neon_stamp): $(configure_neon_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_spu_stamp): $(configure_spu_stamp) + $(MAKE) -f debian/rules2 $@ + +check: $(check_stamp) +$(check_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ + +clean: + rm -rf $(stampdir) +# remove temporary dirs used for unpacking + rm -rf $(gcc_srcdir) $(gdc_srcdir) d + -$(MAKE) -f debian/rules2 $@ + rm -rf $(srcdir)* $(builddir)* debian/tmp* html + rm -f bootstrap-* first-move-stamp + rm -f autotools_files + rm -f debian/*.tmp + rm -f debian/soname-cache + find debian -name '.#*' | xargs -r rm -f + rm -f $(series_file)* + dh_clean + +install: $(install_dependencies) +$(install_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_snap_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_dummy_stamp): $(build_dummy_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_hppa64_stamp): $(build_hppa64_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_neon_stamp): $(build_neon_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_spu_stamp): $(build_spu_stamp) + $(MAKE) -f debian/rules2 $@ + +html-docs doxygen-docs update-doxygen-docs update-ada-files xxx: + $(MAKE) -f debian/rules2 $@ + +binary-indep binary-arch binary: install + $(MAKE) -f debian/rules2 $@ + +source diff: + @echo >&2 'source and diff are obsolete - use dpkg-source -b'; false + +release: + foo=$(shell basename $(CURDIR)); \ + if [ "$$foo" != "gcc-3.4" ]; then \ + find -name CVS -o -name .cvsignore -o -name '.#*' | \ + xargs rm -rf; \ + fi + +.PHONY: build clean binary-indep binary-arch binary release --- gcc-4.7-4.7.2.orig/debian/lib32gfortran3.symbols.ppc64 +++ gcc-4.7-4.7.2/debian/lib32gfortran3.symbols.ppc64 @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.armhf +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.armhf @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.kfreebsd-i386 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.kfreebsd-i386 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.7-4.7.2.orig/debian/gnatvsn.gpr +++ gcc-4.7-4.7.2/debian/gnatvsn.gpr @@ -0,0 +1,31 @@ +-- Project file for use with GNAT +-- Copyright (c) 2005, 2008 Ludovic Brenta +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- This project file is designed to help build applications that use +-- GNAT project files. Here is an example of how to use this project file: +-- +-- with "gnatvsn"; +-- project Example is +-- for Object_Dir use "obj"; +-- for Exec_Dir use "."; +-- for Main use ("example"); +-- end Example; + +project Gnatvsn is + for Library_Name use "gnatvsn"; + for Library_Dir use "/usr/lib"; + for Library_Kind use "dynamic"; + for Source_Dirs use ("/usr/share/ada/adainclude/gnatvsn"); + for Library_ALI_Dir use "/usr/lib/ada/adalib/gnatvsn"; + for Externally_Built use "true"; +end Gnatvsn; --- gcc-4.7-4.7.2.orig/debian/copyright.in +++ gcc-4.7-4.7.2/debian/copyright.in @@ -0,0 +1,569 @@ +This is the Debian GNU/Linux prepackaged version of the GNU compiler +collection, containing Ada, C, C++, Fortran 95, Java, Objective-C, +Objective-C++, and Treelang compilers, documentation, and support +libraries. In addition, Debian provides the gdc compiler, either in +the same source package, or built from a separate same source package. +Packaging is done by the Debian GCC Maintainers +, with sources obtained from: + + ftp://gcc.gnu.org/pub/gcc/releases/ (for full releases) + svn://gcc.gnu.org/svn/gcc/ (for prereleases) + http://bitbucket.org/goshawk/gdc (for D) + +The current gcc-@BV@ source package is taken from the SVN @SVN_BRANCH@. + +Changes: See changelog.Debian.gz + +Debian splits the GNU Compiler Collection into packages for each language, +library, and documentation as follows: + +Language Compiler package Library package Documentation +--------------------------------------------------------------------------- +Ada gnat-@BV@ libgnat-@BV@ gnat-@BV@-doc +C gcc-@BV@ gcc-@BV@-doc +C++ g++-@BV@ libstdc++6 libstdc++6-@BV@-doc +D gdc-@BV@ +Fortran 95 gfortran-@BV@ libgfortran3 gfortran-@BV@-doc +Go gccgo-@BV@ libgo0 +Java gcj-@BV@ libgcj10 libgcj-doc +Objective C gobjc-@BV@ libobjc2 +Objective C++ gobjc++-@BV@ + +For some language run-time libraries, Debian provides source files, +development files, debugging symbols and libraries containing position- +independent code in separate packages: + +Language Sources Development Debugging Position-Independent +------------------------------------------------------------------------------ +C++ libstdc++6-@BV@-dbg libstdc++6-@BV@-pic +D libphobos-@BV@-dev +Java libgcj10-src libgcj10-dev libgcj10-dbg + +Additional packages include: + +All languages: +libgcc1, libgcc2, libgcc4 GCC intrinsics (platform-dependent) +gcc-@BV@-base Base files common to all compilers +gcc-@BV@-soft-float Software floating point (ARM only) +gcc-@BV@-source The sources with patches + +Ada: +libgnatvsn-dev, libgnatvsn@BV@ GNAT version library +libgnatprj-dev, libgnatprj@BV@ GNAT Project Manager library + +C: +cpp-@BV@, cpp-@BV@-doc GNU C Preprocessor +libmudflap0-dev, libmudflap0 Library for instrumenting pointers +libssp0-dev, libssp0 GCC stack smashing protection library +libquadmath0 Math routines for the __float128 type +fixincludes Fix non-ANSI header files +protoize Create/remove ANSI prototypes from C code + +Java: +gij The Java bytecode interpreter and VM +libgcj-common Common files for the Java run-time +libgcj10-awt The Abstract Windowing Toolkit +libgcj10-jar Java ARchive for the Java run-time + +C, C++ and Fortran 95: +libgomp1-dev, libgomp1 GCC OpenMP (GOMP) support library +libitm1-dev, libitm1 GNU Transactional Memory Library + +Biarch support: On some 64-bit platforms which can also run 32-bit code, +Debian provides additional packages containing 32-bit versions of some +libraries. These packages have names beginning with 'lib32' instead of +'lib', for example lib32stdc++6. Similarly, on some 32-bit platforms which +can also run 64-bit code, Debian provides additional packages with names +beginning with 'lib64' instead of 'lib'. These packages contain 64-bit +versions of the libraries. (At this time, not all platforms and not all +libraries support biarch.) The license terms for these lib32 or lib64 +packages are identical to the ones for the lib packages. + + +COPYRIGHT STATEMENTS AND LICENSING TERMS + + +GCC is Copyright (C) 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993, 1994, +1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, +2008, 2009, 2010, 2011 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Files that have exception clauses are licensed under the terms of the +GNU General Public License; either version 3, or (at your option) any +later version. + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License is in `/usr/share/common-licenses/GPL', version 3 of this +license in `/usr/share/common-licenses/GPL-3'. + +The following runtime libraries are licensed under the terms of the +GNU General Public License (v3 or later) with version 3.1 of the GCC +Runtime Library Exception (included in this file): + + - libgcc (libgcc/, gcc/libgcc2.[ch], gcc/unwind*, gcc/gthr*, + gcc/coretypes.h, gcc/crtstuff.c, gcc/defaults.h, gcc/dwarf2.h, + gcc/emults.c, gcc/gbl-ctors.h, gcc/gcov-io.h, gcc/libgcov.c, + gcc/tsystem.h, gcc/typeclass.h). + - libdecnumber + - libgomp + - libitm + - libssp + - libstdc++-v3 + - libobjc + - libmudflap + - libgfortran + - The libgnat-@BV@ Ada support library and libgnatvsn library. + - Various config files in gcc/config/ used in runtime libraries. + +In contrast, libgnatprj is licensed under the terms of the pure GNU +General Public License. + +The libgcj library is licensed under the terms of the GNU General +Public License, with a special exception: + + Linking this library statically or dynamically with other modules + is making a combined work based on this library. Thus, the terms + and conditions of the GNU General Public License cover the whole + combination. + + As a special exception, the copyright holders of this library give + you permission to link this library with independent modules to + produce an executable, regardless of the license terms of these + independent modules, and to copy and distribute the resulting + executable under terms of your choice, provided that you also + meet, for each linked independent module, the terms and conditions + of the license of that module. An independent module is a module + which is not derived from or based on this library. If you modify + this library, you may extend this exception to your version of the + library, but you are not obligated to do so. If you do not wish + to do so, delete this exception statement from your version. + +The libffi library is licensed under the following terms: + + libffi - Copyright (c) 1996-2003 Red Hat, Inc. + + Permission is hereby granted, free of charge, to any person obtaining + a copy of this software and associated documentation files (the + ``Software''), to deal in the Software without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Software, and to + permit persons to whom the Software is furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice shall be included + in all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS + OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL CYGNUS SOLUTIONS BE LIABLE FOR ANY CLAIM, DAMAGES OR + OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + OTHER DEALINGS IN THE SOFTWARE. + + +The documentation is licensed under the GNU Free Documentation License (v1.2). +On Debian GNU/Linux systems, the complete text of this license is in +`/usr/share/common-licenses/GFDL-1.2'. + + +GCC RUNTIME LIBRARY EXCEPTION + +Version 3.1, 31 March 2009 + +Copyright (C) 2009 Free Software Foundation, Inc. + +Everyone is permitted to copy and distribute verbatim copies of this +license document, but changing it is not allowed. + +This GCC Runtime Library Exception ("Exception") is an additional +permission under section 7 of the GNU General Public License, version +3 ("GPLv3"). It applies to a given file (the "Runtime Library") that +bears a notice placed by the copyright holder of the file stating that +the file is governed by GPLv3 along with this Exception. + +When you use GCC to compile a program, GCC may combine portions of +certain GCC header files and runtime libraries with the compiled +program. The purpose of this Exception is to allow compilation of +non-GPL (including proprietary) programs to use, in this way, the +header files and runtime libraries covered by this Exception. + +0. Definitions. + +A file is an "Independent Module" if it either requires the Runtime +Library for execution after a Compilation Process, or makes use of an +interface provided by the Runtime Library, but is not otherwise based +on the Runtime Library. + +"GCC" means a version of the GNU Compiler Collection, with or without +modifications, governed by version 3 (or a specified later version) of +the GNU General Public License (GPL) with the option of using any +subsequent versions published by the FSF. + +"GPL-compatible Software" is software whose conditions of propagation, +modification and use would permit combination with GCC in accord with +the license of GCC. + +"Target Code" refers to output from any compiler for a real or virtual +target processor architecture, in executable form or suitable for +input to an assembler, loader, linker and/or execution +phase. Notwithstanding that, Target Code does not include data in any +format that is used as a compiler intermediate representation, or used +for producing a compiler intermediate representation. + +The "Compilation Process" transforms code entirely represented in +non-intermediate languages designed for human-written code, and/or in +Java Virtual Machine byte code, into Target Code. Thus, for example, +use of source code generators and preprocessors need not be considered +part of the Compilation Process, since the Compilation Process can be +understood as starting with the output of the generators or +preprocessors. + +A Compilation Process is "Eligible" if it is done using GCC, alone or +with other GPL-compatible software, or if it is done without using any +work based on GCC. For example, using non-GPL-compatible Software to +optimize any GCC intermediate representations would not qualify as an +Eligible Compilation Process. + +1. Grant of Additional Permission. + +You have permission to propagate a work of Target Code formed by +combining the Runtime Library with Independent Modules, even if such +propagation would otherwise violate the terms of GPLv3, provided that +all Target Code was generated by Eligible Compilation Processes. You +may then convey such a combination under terms of your choice, +consistent with the licensing of the Independent Modules. + +2. No Weakening of GCC Copyleft. + +The availability of this Exception does not imply any general +presumption that third-party software is unaffected by the copyleft +requirements of the license of GCC. + + +libquadmath/*.[hc]: + + Copyright (C) 2010 Free Software Foundation, Inc. + Written by Francois-Xavier Coudert + Written by Tobias Burnus + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +libquadmath/gdtoa: + +The author of this software is David M. Gay. + +Copyright (C) 1998, 1999, 2000, 2001 by Lucent Technologies +All Rights Reserved + +Permission to use, copy, modify, and distribute this software and +its documentation for any purpose and without fee is hereby +granted, provided that the above copyright notice appear in all +copies and that both that the copyright notice and this +permission notice and warranty disclaimer appear in supporting +documentation, and that the name of Lucent or any of its entities +not be used in advertising or publicity pertaining to +distribution of the software without specific, written prior +permission. + +LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. +IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY +SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER +IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF +THIS SOFTWARE. + +libquadmath/math: + +atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c: + Copyright 2001 by Stephen L. Moshier + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c: + Changes for 128-bit __float128 are + Copyright (C) 2001 Stephen L. Moshier + and are incorporated herein by permission of the author. The author + reserves the right to distribute this material elsewhere under different + copying permissions. These modifications are distributed here under + the following terms: + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +ldexpq.c: + * Conversion to long double by Ulrich Drepper, + * Cygnus Support, drepper@cygnus.com. + +cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c, +sinq_kernel.c, truncq.c: + Copyright (C) 1997, 1999 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +isinfq.c: + * Written by J.T. Conklin . + * Change for long double by Jakub Jelinek + * Public domain. + +llroundq.c, lroundq.c, tgammaq.c: + Copyright (C) 1997, 1999, 2002, 2004 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Ulrich Drepper , 1997 and + Jakub Jelinek , 1999. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +log10q.c: + Cephes Math Library Release 2.2: January, 1991 + Copyright 1984, 1991 by Stephen L. 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All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright +notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above +copyright notice, this list of conditions and the following disclaimer +in the documentation and/or other materials provided with the +distribution. + * Neither the name of Google Inc. nor the names of its +contributors may be used to endorse or promote products derived from +this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +D: +gdc-@BV@ GNU D Compiler +libphobos-@BV@-dev D standard runtime library + +The D source package is made up of the following components. + +The D front-end for GCC: + - d/* + +Copyright (C) 2004-2007 David Friedman +Modified by Vincenzo Ampolo, Michael Parrot, Iain Buclaw, (C) 2009, 2010 + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License is in `/usr/share/common-licenses/GPL', version 2 of this +license in `/usr/share/common-licenses/GPL-2'. + + +The DMD Compiler implementation of the D programming language: + - d/dmd/* + +Copyright (c) 1999-2010 by Digital Mars +All Rights Reserved +written by Walter Bright +http://www.digitalmars.com +License for redistribution is by either the Artistic License or +the GNU General Public License (v1). + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License is in `/usr/share/common-licenses/GPL', the Artistic +license in `/usr/share/common-licenses/Artistic'. + + +The Zlib data compression library: + - d/phobos/etc/c/zlib/* + + (C) 1995-2004 Jean-loup Gailly and Mark Adler + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + +The Phobos standard runtime library: + - d/phobos/* + +Unless otherwise marked within the file, each file in the source +is under the following licenses: + +Copyright (C) 2004-2005 by Digital Mars, www.digitalmars.com +Written by Walter Bright + +This software is provided 'as-is', without any express or implied +warranty. In no event will the authors be held liable for any damages +arising from the use of this software. + +Permission is granted to anyone to use this software for any purpose, +including commercial applications, and to alter it and redistribute it +freely, in both source and binary form, subject to the following +restrictions: + + o The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + o Altered source versions must be plainly marked as such, and must not + be misrepresented as being the original software. + o This notice may not be removed or altered from any source + distribution. + +By plainly marking modifications, something along the lines of adding to each +file that has been changed a "Modified by Foo Bar" line +underneath the "Written by" line would be adequate. + --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.ia64 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.ia64 @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/gnat-BV-doc.doc-base.ug +++ gcc-4.7-4.7.2/debian/gnat-BV-doc.doc-base.ug @@ -0,0 +1,16 @@ +Document: gnat-ugn-@BV@ +Title: GNAT User's Guide for Unix Platforms +Author: Various +Abstract: This guide describes the use of GNAT, a compiler and + software development toolset for the full Ada 95 programming language. + It describes the features of the compiler and tools, and details how + to use them to build Ada 95 applications. +Section: Programming/Ada + +Format: html +Index: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html +Files: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html + +Format: info +Index: /usr/share/info/gnat_ugn-@BV@.info.gz +Files: /usr/share/info/gnat_ugn-@BV@* --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.alpha +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.alpha @@ -0,0 +1,9 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.2.orig/debian/README.cross +++ gcc-4.7-4.7.2/debian/README.cross @@ -0,0 +1,144 @@ +Building cross-compiler Debian packages +--------------------------------------- + +It is possible to build C and C++ cross compilers and support libraries +from gcc-4.0 source package. This document describes how to do so. +Cross-compiler build support is not perfect yet, please send fixes +and improvements to debian-gcc@lists.debian.org and +debian-embedded@lists.debian.org + +Before you start, you should probably check available pre-built +cross-toolchain debs. Available at http://www.emdebian.org + +Old patches could be reached at + http://zigzag.lvk.cs.msu.su/~nikita/debian/ + +If they are no longer there, you may check EmDebian web site at + http://www.emdebian.org/ +or ask debian-embedded@lists.debian.org for newer location. + +Please check http://bugs.debian.org/391445 if you are about building +gcc-4.3 or above. + +Most of them has been merged with gcc debian sources. + +0. What's wrong with toolchain-source approach + +Package toolchain-source contains sources for binutils and gcc, as well as +some support scripts to build cross-compiler packages. They seem to work. + +However, there is one fundamental problem with this approach. +Gcc package is actively maintained and frequently updated. These updates +do contain bug fixes and improvements, especially for non-x86 architectures. +Cross-compilers built using toolchain-source will not get those fixes unless +toolchain-source package is updated after each binutils and gcc update. +The later is not hapenning in real life. For example, toolchain-source +was upgraded from gcc-3.2 to gcc-3.3 half a year later than gcc-3.3 became +Debian default compiler. + +Keeping toolchain-source package up-to-date requires lots of work, and seems +to be a waste of time. It is much better to build cross-compilers directly +from gcc source package. + + +1. What is needed to build a cross-compiler from gcc-4.3 source + +1.1. dpkg-cross package + +Dpkg-cross package contains several tools to manage cross-compile environment. + +It can convert native debian library and lib-dev packages for the target +architecture to binary-all packages that keep libraries and headers under +/usr/$(TARGET)/. + +Also it contains helper tools for cross-compiling debian packages. Some of +these tools are used while building libgcc1 and libstdc++ library packages. +The resulting library packages follow the same convensions as library packages +converted by dpkg-cross. + +Currently, at least version 1.18 of dpkg-cross is needed for cross-gcc +package build. Version 1.32 of dpkg-cross is needed in order to build gcc-4.3. + +1.2. cross-binutils for the target + +You need cross-binutils for your target to build cross-compiler. +Binutils-multiarch package will not work because it does not provide cross- +assemblers. + +If you don't want to use pre-built cross-binutils packages, you may build +your own from binutils debian source package, using patches posted to +bug #231707. Please use the latest of patch versions available there. + +Alternatively, you may use toolchain-source package to build cross-binutils +(but in this case you will probably also want to use toolchain-source +to build cross-compiler itself). However, multilib'ed cross-compilers may +not build or work with these binutils. + +1.3. libc for target + +You also need libc library and development packages for the target +architecture installed. + +To get those, download linux-kernel-headers, libc6, and libc6-dev binary +debs for your target, convert those using dpkg-cross -b, and install +resulting -arch-cross debs. Consult dpkg-cross manual page for more +information. + +Building with/for alternative libc's is not supported yet (but this is in +TODO). + +Note that if you plan to use your cross-toolchain to develop kernel drivers +or similar low-level things, you will probably also need kernel headers +for the exact kernel version that your target hardware uses. + + +2. Building cross-compiler packages + +Get gcc-4.3 source package. + +Unpack it using dpkg-source -x, and cd to the package directory. + +Set GCC_TARGET environment variable to the target architectire name. Note +that currently you should use debian architecture name (i.e 'powerpc' or 'arm'), +not GNU system type (i.e. 'powerpc-linux' or 'arm-linux'). Setting GCC_TARGET +to GNU system type will cause cross-compiler build to fail. + +Instead of setting GCC_TARGET, target architecture name may be put into +debian/target file. If both GCC_TARGET is defined and debian/target file +exists, GCC_TARGET is used. + +Run debian/rules control. This will change debian/control file, +adjusting build-depends. By default, the packages will not depend on the +system -base package. A variable DEB_CROSS_INDEPENDENT has been merged with DEB_CROSS variable. + +You can then build with either + +$ GCC_TARGET=[arch] dpkg-buildpackage -rfakeroot + +3. Using crosshurd + +Jeff Bailey suggests alternate way to setup +environment to build cross-compiler, using 'crosshurd' package. +Crosshurd is like debootstrap but cross-arch, and works on the Hurd, +Linux and FreeBSD. (The name is historical). + +If you setup your environment with crosshurd, you will need to fix symlinks +in lib and usr/lib to be relative instead of absolute. For example: + +lrwxrwxrwx 1 root root 20 2004-05-06 23:02 libcom_err.so -> /lib/libcom_err.so.2 + +Needs to be changed to: + +lrwxrwxrwx 1 root root 20 2004-05-06 23:02 libcom_err.so -> ../../lib/libcom_err.so.2 + +Also, if you choose this method, set the environment variable 'with_sysroot' +to point to the ABSOLUTE PATH where the crosshurd was done. + +Note however that build-depends of cross-gcc and dependencies in generated +libgcc1 and libstdc++ packages assume that you use dpkg-cross to set up +your environment, and may be wrong or incomplete if you use alternate methods. +But probably you don't care. + +-- +Nikita V. Youshchenko - Jun 2004 +Hector Oron Martinez - Oct 2006 --- gcc-4.7-4.7.2.orig/debian/lib64stdc++6.symbols.s390 +++ gcc-4.7-4.7.2/debian/lib64stdc++6.symbols.s390 @@ -0,0 +1,12 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.16.powerpc64 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.16.powerpc64 @@ -0,0 +1,191 @@ + __iso_c_binding_c_f_pointer_i16@GFORTRAN_1.0 4.3 + _gfortran_all_l16@GFORTRAN_1.0 4.3 + _gfortran_any_l16@GFORTRAN_1.0 4.3 + _gfortran_count_16_l@GFORTRAN_1.0 4.3 + _gfortran_cshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_cshift0_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_16@GFORTRAN_1.0 4.3 + _gfortran_cshift1_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_16_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_eoshift0_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift1_16@GFORTRAN_1.0 4.3 + _gfortran_eoshift1_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift1_16_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift2_16@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift2_16_char4@GFORTRAN_1.4 4.6 + _gfortran_eoshift2_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift3_16@GFORTRAN_1.0 4.3 + _gfortran_eoshift3_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift3_16_char@GFORTRAN_1.0 4.3 + _gfortran_iall_i16@GFORTRAN_1.4 4.6 + _gfortran_iany_i16@GFORTRAN_1.4 4.6 + _gfortran_iparity_i16@GFORTRAN_1.4 4.6 + _gfortran_ishftc16@GFORTRAN_1.0 4.3 + _gfortran_matmul_i16@GFORTRAN_1.0 4.3 + _gfortran_matmul_l16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxval_i16@GFORTRAN_1.0 4.3 + _gfortran_miall_i16@GFORTRAN_1.4 4.6 + _gfortran_miany_i16@GFORTRAN_1.4 4.6 + _gfortran_minloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_minval_i16@GFORTRAN_1.0 4.3 + _gfortran_miparity_i16@GFORTRAN_1.4 4.6 + _gfortran_mmaxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mminval_i16@GFORTRAN_1.0 4.3 + _gfortran_mproduct_i16@GFORTRAN_1.0 4.3 + _gfortran_msum_i16@GFORTRAN_1.0 4.3 + _gfortran_parity_l16@GFORTRAN_1.4 4.6 + _gfortran_pow_c16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_c4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_c8_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_i4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i8_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r8_i16@GFORTRAN_1.0 4.3 + _gfortran_product_i16@GFORTRAN_1.0 4.3 + _gfortran_reshape_16@GFORTRAN_1.0 4.3 + _gfortran_shape_16@GFORTRAN_1.0 4.3 + _gfortran_siall_i16@GFORTRAN_1.4 4.6 + _gfortran_siany_i16@GFORTRAN_1.4 4.6 + _gfortran_siparity_i16@GFORTRAN_1.4 4.6 + _gfortran_smaxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxval_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_sminval_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__char_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__index_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__len_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_4@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i16@GFORTRAN_1.0 4.3 + _gfortran_ssum_i16@GFORTRAN_1.0 4.3 + _gfortran_sum_i16@GFORTRAN_1.0 4.3 + _gfortran_transpose_i16@GFORTRAN_1.0 4.3 --- gcc-4.7-4.7.2.orig/debian/lib32objc4.symbols +++ gcc-4.7-4.7.2/debian/lib32objc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 lib32objc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.7-4.7.2.orig/debian/libitm1.symbols.32bit +++ gcc-4.7-4.7.2/debian/libitm1.symbols.32bit @@ -0,0 +1,4 @@ + _ZGTtnaj@LIBITM_1.0 4.7 + _ZGTtnajRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtnwj@LIBITM_1.0 4.7 + _ZGTtnwjRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.7-4.7.2.orig/debian/lib64gcc1.symbols.powerpc +++ gcc-4.7-4.7.2/debian/lib64gcc1.symbols.powerpc @@ -0,0 +1,129 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_3.4.4 1:4.1.1 + __gcc_qdiv@GCC_3.4.4 1:4.1.1 + __gcc_qmul@GCC_3.4.4 1:4.1.1 + __gcc_qsub@GCC_3.4.4 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + _xlqadd@GCC_3.4 1:4.1.1 + _xlqdiv@GCC_3.4 1:4.1.1 + _xlqmul@GCC_3.4 1:4.1.1 + _xlqsub@GCC_3.4 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.armhf +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.armhf @@ -0,0 +1,26 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + CXXABI_ARM_1.3.3@CXXABI_ARM_1.3.3 4.4.0 + _ZNKSt9type_info6beforeERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt9type_infoeqERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + __aeabi_atexit@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_cctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_noctor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_nocookie@CXXABI_ARM_1.3.3 4.4.0 + __cxa_begin_cleanup@CXXABI_1.3 4.3.0 + __cxa_end_cleanup@CXXABI_1.3 4.3.0 + __cxa_type_match@CXXABI_1.3 4.3.0 --- gcc-4.7-4.7.2.orig/debian/gcc-BV-hppa64.postinst +++ gcc-4.7-4.7.2/debian/gcc-BV-hppa64.postinst @@ -0,0 +1,13 @@ +#! /bin/sh -e + +prio=$(echo @BV@ | sed 's/\.//g') + +update-alternatives --quiet \ + --install /usr/bin/hppa64-linux-gnu-gcc \ + hppa64-linux-gnu-gcc \ + /usr/bin/hppa64-linux-gnu-gcc-@BV@ \ + $prio + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.glibcxxmath +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.glibcxxmath @@ -0,0 +1,22 @@ + acosl@GLIBCXX_3.4.3 4.1.1 + asinl@GLIBCXX_3.4.3 4.1.1 + atan2l@GLIBCXX_3.4 4.1.1 + atanl@GLIBCXX_3.4.3 4.1.1 + ceill@GLIBCXX_3.4.3 4.1.1 + coshl@GLIBCXX_3.4 4.1.1 + cosl@GLIBCXX_3.4 4.1.1 + expl@GLIBCXX_3.4 4.1.1 + floorl@GLIBCXX_3.4.3 4.1.1 + fmodl@GLIBCXX_3.4.3 4.1.1 + frexpl@GLIBCXX_3.4.3 4.1.1 + hypotl@GLIBCXX_3.4 4.1.1 + ldexpl@GLIBCXX_3.4.3 4.1.1 + log10l@GLIBCXX_3.4 4.1.1 + logl@GLIBCXX_3.4 4.1.1 + modfl@GLIBCXX_3.4.3 4.1.1 + powl@GLIBCXX_3.4 4.1.1 + sinhl@GLIBCXX_3.4 4.1.1 + sinl@GLIBCXX_3.4 4.1.1 + sqrtl@GLIBCXX_3.4 4.1.1 + tanhl@GLIBCXX_3.4 4.1.1 + tanl@GLIBCXX_3.4 4.1.1 --- gcc-4.7-4.7.2.orig/debian/lib64gfortran3.symbols.mipsel +++ gcc-4.7-4.7.2/debian/lib64gfortran3.symbols.mipsel @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/gcj-BV-jdk.prerm +++ gcc-4.7-4.7.2/debian/gcj-BV-jdk.prerm @@ -0,0 +1,15 @@ +#! /bin/sh -e + +if [ "$1" = "remove" ] || [ "$1" = "deconfigure" ]; then + update-alternatives --quiet --remove javac /usr/bin/gcj-wrapper-@BV@ + update-alternatives --quiet --remove jar /usr/bin/gjar-@BV@ + update-alternatives --quiet --remove jarsigner /usr/bin/gjarsigner-@BV@ + update-alternatives --quiet --remove javah /usr/bin/gjavah-@BV@ + update-alternatives --quiet --remove javadoc /usr/bin/gjdoc-@BV@ + update-alternatives --quiet --remove native2ascii /usr/bin/gnative2ascii-@BV@ + update-alternatives --quiet --remove rmic /usr/bin/grmic-@BV@ + update-alternatives --quiet --remove serialver /usr/bin/gserialver-@BV@ + update-alternatives --quiet --remove tnameserv /usr/bin/gtnameserv-@BV@ +fi + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/libgcjGCJ-awt.overrides +++ gcc-4.7-4.7.2/debian/libgcjGCJ-awt.overrides @@ -0,0 +1,2 @@ +# pick up the exact version, in case another gcj version is installed +libgcj@GCJ@-awt binary: binary-or-shlib-defines-rpath --- gcc-4.7-4.7.2.orig/debian/gcc-BV-doc.doc-base.gccint +++ gcc-4.7-4.7.2/debian/gcc-BV-doc.doc-base.gccint @@ -0,0 +1,17 @@ +Document: gccint-@BV@ +Title: Internals of the GNU C and C++ compiler +Author: Various +Abstract: This manual documents the internals of the GNU compilers, + including how to port them to new targets and some information about + how to write front ends for new languages. It corresponds to GCC + version @BV@.x. The use of the GNU compilers is documented in a + separate manual. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/gccint.html +Files: /usr/share/doc/gcc-@BV@-base/gccint.html + +Format: info +Index: /usr/share/info/gccint-@BV@.info.gz +Files: /usr/share/info/gccint-@BV@* --- gcc-4.7-4.7.2.orig/debian/rules.sonames +++ gcc-4.7-4.7.2/debian/rules.sonames @@ -0,0 +1,69 @@ +ifneq ($(vafilt_defined),1) + $(error rules.defs must be included before rules.sonames) +endif + +ifeq (,$(wildcard debian/soname-cache)) + SONAME_VARS := $(shell \ + cache=debian/soname-cache; \ + rm -f $$cache; \ + v=`awk -F= '/^libtool_VERSION/ {split($$2,v,":"); print v[1]}' \ + $(srcdir)/libstdc++-v3/acinclude.m4`; \ + echo CXX_SONAME=$$v >> $$cache; \ + v=`awk -F= '/^VERSION/ {split($$2,v,":"); print v[1]}' \ + $(srcdir)/libobjc/configure.ac`; \ + echo OBJC_SONAME=$$v >> $$cache; \ + v=`tail -1 $(srcdir)/libgfortran/libtool-version | cut -d: -f1`; \ + echo FORTRAN_SONAME=$$v >> $$cache; \ + v=`tail -1 $(srcdir)/libmudflap/libtool-version | cut -d: -f1`; \ + echo MUDFLAP_SONAME=$$v >> $$cache; \ + v=`tail -1 $(srcdir)/libssp/libtool-version | cut -d: -f1`; \ + echo SSP_SONAME=$$v >> $$cache; \ + v=`tail -1 $(srcdir)/libjava/libtool-version | cut -d: -f1`; \ + echo GCJ_SONAME=$$v >> $$cache; \ + if [ "$$v" -ge 70 ]; then \ + echo GCJ_SONAME1=`echo $$v | sed 's/.$$//'` >> $$cache; \ + echo GCJ_SONAME2=`echo $$v | sed 's/.*\(.\)$$/\1/'` >> $$cache; \ + else \ + echo GCJ_SONAME1=$$v >> $$cache; \ + echo GCJ_SONAME2= >> $$cache; \ + fi; \ + v=`tail -1 $(srcdir)/libffi/libtool-version | cut -d: -f1`; \ + echo FFI_SONAME=$$v >> $$cache; \ + v=`awk -F= '/^libtool_VERSION/ {split($$2,v,":"); print v[1]}' \ + $(srcdir)/libgomp/configure.ac`; \ + echo GOMP_SONAME=$$v >> $$cache; \ + if [ "$(with_qmath)" = yes ]; then \ + v=`tail -1 $(srcdir)/libquadmath/libtool-version | cut -d: -f1`; \ + echo QUADMATH_SONAME=$$v >> $$cache; \ + fi; \ + if [ "$(with_libgmath)" = yes ]; then \ + v=`tail -1 $(srcdir)/libgcc-math/libtool-version | cut -d: -f1`; \ + echo GCCMATH_SONAME=$$v >> $$cache; \ + fi; \ + v=`grep '[^_]Library_Version.*:' $(srcdir)/gcc/ada/gnatvsn.ads \ + | sed -e 's/.*"\([^"]*\)".*/\1/'`; \ + echo GNAT_SONAME=$$v >> $$cache; \ + echo GO_SONAME=0 >> $$cache; \ + echo ITM_SONAME=1 >> $$cache; \ + cat $$cache) +else + SONAME_VARS := $(shell cat debian/soname-cache) +endif +CXX_SONAME = $(call vafilt,$(SONAME_VARS),CXX_SONAME) +OBJC_SONAME = $(call vafilt,$(SONAME_VARS),OBJC_SONAME) +FORTRAN_SONAME = $(call vafilt,$(SONAME_VARS),FORTRAN_SONAME) +MUDFLAP_SONAME = $(call vafilt,$(SONAME_VARS),MUDFLAP_SONAME) +SSP_SONAME = $(call vafilt,$(SONAME_VARS),SSP_SONAME) +GCJ_SONAME = $(call vafilt,$(SONAME_VARS),GCJ_SONAME) +GCJ_SONAME1 = $(call vafilt,$(SONAME_VARS),GCJ_SONAME1) +GCJ_SONAME2 = $(call vafilt,$(SONAME_VARS),GCJ_SONAME2) +FFI_SONAME = $(call vafilt,$(SONAME_VARS),FFI_SONAME) +GOMP_SONAME = $(call vafilt,$(SONAME_VARS),GOMP_SONAME) +GCCMATH_SONAME = $(call vafilt,$(SONAME_VARS),GCCMATH_SONAME) +QUADMATH_SONAME = $(call vafilt,$(SONAME_VARS),QUADMATH_SONAME) +GNAT_SONAME = $(call vafilt,$(SONAME_VARS),GNAT_SONAME) +GO_SONAME = $(call vafilt,$(SONAME_VARS),GO_SONAME) +ITM_SONAME = $(call vafilt,$(SONAME_VARS),ITM_SONAME) + +# alias +GFORTRAN_SONAME = $(FORTRAN_SONAME) --- gcc-4.7-4.7.2.orig/debian/lib64gcc1.symbols.i386 +++ gcc-4.7-4.7.2/debian/lib64gcc1.symbols.i386 @@ -0,0 +1,147 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtc3@GCC_4.3.0 1:4.4.0 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __gttf2@GCC_4.3.0 1:4.4.0 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __lttf2@GCC_4.3.0 1:4.4.0 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multc3@GCC_4.3.0 1:4.4.0 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __netf2@GCC_4.3.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powitf2@GCC_4.3.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.2.orig/debian/libstdc++CXX-BV-doc.overrides +++ gcc-4.7-4.7.2/debian/libstdc++CXX-BV-doc.overrides @@ -0,0 +1,2 @@ +libstdc++@CXX@-@BV@-doc binary: hyphen-used-as-minus-sign +libstdc++@CXX@-@BV@-doc binary: manpage-has-bad-whatis-entry --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.ia64 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.ia64 @@ -0,0 +1,7 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.64" +#include "libgfortran3.symbols.qf" --- gcc-4.7-4.7.2.orig/debian/libobjc4.symbols.common +++ gcc-4.7-4.7.2/debian/libobjc4.symbols.common @@ -0,0 +1,205 @@ + __objc_accessors_init@Base 4.6 + __objc_add_class_to_hash@Base 4.2.1 + __objc_class_links_resolved@Base 4.2.1 + __objc_class_name_NXConstantString@Base 4.2.1 + __objc_class_name_Object@Base 4.2.1 + __objc_class_name_Protocol@Base 4.2.1 + __objc_dangling_categories@Base 4.2.1 + __objc_exec_class@Base 4.2.1 + __objc_force_linking@Base 4.2.1 + __objc_generate_gc_type_description@Base 4.2.1 + __objc_get_forward_imp@Base 4.2.1 + __objc_init_class@Base 4.6 + __objc_init_class_tables@Base 4.2.1 + __objc_init_dispatch_tables@Base 4.2.1 + __objc_init_selector_tables@Base 4.2.1 + __objc_init_thread_system@Base 4.2.1 + __objc_install_premature_dtable@Base 4.2.1 + __objc_is_multi_threaded@Base 4.2.1 + __objc_linking@Base 4.2.1 + __objc_msg_forward@Base 4.2.1 + __objc_msg_forward2@Base 4.3 + __objc_print_dtable_stats@Base 4.2.1 + __objc_protocols_add_protocol@Base 4.6 + __objc_protocols_init@Base 4.6 + __objc_register_instance_methods_to_class@Base 4.2.1 + __objc_register_selectors_from_class@Base 4.2.1 + __objc_register_selectors_from_description_list@Base 4.6 + __objc_register_selectors_from_list@Base 4.2.1 + __objc_register_selectors_from_module@Base 4.6 + __objc_resolve_class_links@Base 4.2.1 + __objc_responds_to@Base 4.2.1 + __objc_runtime_mutex@Base 4.2.1 + __objc_runtime_threads_alive@Base 4.2.1 + __objc_selector_max_index@Base 4.2.1 + __objc_sparse2_id@Base 4.2.1 + __objc_sync_init@Base 4.6 + __objc_thread_exit_status@Base 4.2.1 + __objc_uninstalled_dtable@Base 4.2.1 + __objc_update_classes_with_methods@Base 4.6 + __objc_update_dispatch_table_for_class@Base 4.2.1 + _objc_abort@Base 4.6 + _objc_became_multi_threaded@Base 4.2.1 + _objc_load_callback@Base 4.2.1 + _objc_lookup_class@Base 4.6 + class_addIvar@Base 4.6 + class_addMethod@Base 4.6 + class_addProtocol@Base 4.6 + class_add_method_list@Base 4.2.1 + class_conformsToProtocol@Base 4.6 + class_copyIvarList@Base 4.6 + class_copyMethodList@Base 4.6 + class_copyPropertyList@Base 4.6 + class_copyProtocolList@Base 4.6 + class_createInstance@Base 4.6 + class_getClassMethod@Base 4.6 + class_getClassVariable@Base 4.6 + class_getInstanceMethod@Base 4.6 + class_getInstanceSize@Base 4.6 + class_getInstanceVariable@Base 4.6 + class_getIvarLayout@Base 4.6 + class_getMethodImplementation@Base 4.6 + class_getName@Base 4.6 + class_getProperty@Base 4.6 + class_getSuperclass@Base 4.6 + class_getVersion@Base 4.6 + class_getWeakIvarLayout@Base 4.6 + class_isMetaClass@Base 4.6 + class_ivar_set_gcinvisible@Base 4.2.1 + class_replaceMethod@Base 4.6 + class_respondsToSelector@Base 4.6 + class_setIvarLayout@Base 4.6 + class_setVersion@Base 4.6 + class_setWeakIvarLayout@Base 4.6 + get_imp@Base 4.2.1 + idxsize@Base 4.2.1 + ivar_getName@Base 4.6 + ivar_getOffset@Base 4.6 + ivar_getTypeEncoding@Base 4.6 + method_copyArgumentType@Base 4.6 + method_copyReturnType@Base 4.6 + method_exchangeImplementations@Base 4.6 + method_getArgumentType@Base 4.6 + method_getDescription@Base 4.6 + method_getImplementation@Base 4.6 + method_getName@Base 4.6 + method_getNumberOfArguments@Base 4.6 + method_getReturnType@Base 4.6 + method_getTypeEncoding@Base 4.6 + method_get_imp@Base 4.6 + method_setImplementation@Base 4.6 + narrays@Base 4.2.1 + nbuckets@Base 4.2.1 + nil_method@Base 4.2.1 + nindices@Base 4.2.1 + objc_aligned_size@Base 4.2.1 + objc_alignof_type@Base 4.2.1 + objc_allocateClassPair@Base 4.6 + objc_atomic_malloc@Base 4.2.1 + objc_calloc@Base 4.2.1 + objc_condition_allocate@Base 4.2.1 + objc_condition_broadcast@Base 4.2.1 + objc_condition_deallocate@Base 4.2.1 + objc_condition_signal@Base 4.2.1 + objc_condition_wait@Base 4.2.1 + objc_copyProtocolList@Base 4.6 + objc_copyStruct@Base 4.6 + objc_disposeClassPair@Base 4.6 + objc_enumerationMutation@Base 4.6 + objc_exception_throw@Base 4.2.1 + objc_free@Base 4.2.1 + objc_getClass@Base 4.6 + objc_getClassList@Base 4.6 + objc_getMetaClass@Base 4.6 + objc_getProperty@Base 4.6 + objc_getPropertyStruct@Base 4.6 + objc_getProtocol@Base 4.6 + objc_getRequiredClass@Base 4.6 + objc_get_class@Base 4.2.1 + objc_get_meta_class@Base 4.2.1 + objc_get_type_qualifiers@Base 4.2.1 + objc_hash_add@Base 4.2.1 + objc_hash_delete@Base 4.2.1 + objc_hash_is_key_in_hash@Base 4.2.1 + objc_hash_new@Base 4.2.1 + objc_hash_next@Base 4.2.1 + objc_hash_remove@Base 4.2.1 + objc_hash_value_for_key@Base 4.2.1 + objc_layout_finish_structure@Base 4.2.1 + objc_layout_structure@Base 4.2.1 + objc_layout_structure_get_info@Base 4.2.1 + objc_layout_structure_next_member@Base 4.2.1 + objc_lookUpClass@Base 4.6 + objc_lookup_class@Base 4.2.1 + objc_malloc@Base 4.2.1 + objc_msg_lookup@Base 4.2.1 + objc_msg_lookup_super@Base 4.2.1 + objc_mutex_allocate@Base 4.2.1 + objc_mutex_deallocate@Base 4.2.1 + objc_mutex_lock@Base 4.2.1 + objc_mutex_trylock@Base 4.2.1 + objc_mutex_unlock@Base 4.2.1 + objc_promoted_size@Base 4.2.1 + objc_realloc@Base 4.2.1 + objc_registerClassPair@Base 4.6 + objc_setEnumerationMutationHandler@Base 4.6 + objc_setExceptionMatcher@Base 4.6 + objc_setGetUnknownClassHandler@Base 4.6 + objc_setProperty@Base 4.6 + objc_setPropertyStruct@Base 4.6 + objc_setUncaughtExceptionHandler@Base 4.6 + objc_set_thread_callback@Base 4.2.1 + objc_sizeof_type@Base 4.2.1 + objc_skip_argspec@Base 4.2.1 + objc_skip_offset@Base 4.2.1 + objc_skip_type_qualifiers@Base 4.2.1 + objc_skip_typespec@Base 4.2.1 + objc_sync_enter@Base 4.6 + objc_sync_exit@Base 4.6 + objc_thread_add@Base 4.2.1 + objc_thread_detach@Base 4.2.1 + objc_thread_exit@Base 4.2.1 + objc_thread_get_data@Base 4.2.1 + objc_thread_get_priority@Base 4.2.1 + objc_thread_id@Base 4.2.1 + objc_thread_remove@Base 4.2.1 + objc_thread_set_data@Base 4.2.1 + objc_thread_set_priority@Base 4.2.1 + objc_thread_yield@Base 4.2.1 + object_copy@Base 4.2.1 + object_dispose@Base 4.2.1 + object_getClassName@Base 4.6 + object_getIndexedIvars@Base 4.6 + object_getInstanceVariable@Base 4.6 + object_getIvar@Base 4.6 + object_setClass@Base 4.6 + object_setInstanceVariable@Base 4.6 + object_setIvar@Base 4.6 + property_getAttributes@Base 4.6 + property_getName@Base 4.6 + protocol_conformsToProtocol@Base 4.6 + protocol_copyMethodDescriptionList@Base 4.6 + protocol_copyPropertyList@Base 4.6 + protocol_copyProtocolList@Base 4.6 + protocol_getMethodDescription@Base 4.6 + protocol_getName@Base 4.6 + protocol_getProperty@Base 4.6 + protocol_isEqual@Base 4.6 + sarray_at_put@Base 4.2.1 + sarray_at_put_safe@Base 4.2.1 + sarray_free@Base 4.2.1 + sarray_lazy_copy@Base 4.2.1 + sarray_new@Base 4.2.1 + sarray_realloc@Base 4.2.1 + sarray_remove_garbage@Base 4.2.1 + search_for_method_in_list@Base 4.2.1 + sel_copyTypedSelectorList@Base 4.6 + sel_getName@Base 4.6 + sel_getTypeEncoding@Base 4.6 + sel_getTypedSelector@Base 4.6 + sel_getUid@Base 4.6 + sel_get_any_uid@Base 4.2.1 + sel_isEqual@Base 4.6 + sel_is_mapped@Base 4.2.1 + sel_registerName@Base 4.6 + sel_registerTypedName@Base 4.6 --- gcc-4.7-4.7.2.orig/debian/g++-BV-CRB.preinst.in +++ gcc-4.7-4.7.2/debian/g++-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-g++ /usr/bin/@TARGET@-g++-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/README.source +++ gcc-4.7-4.7.2/debian/README.source @@ -0,0 +1,14 @@ +Patches applied to the Debian version of GCC +-------------------------------------------- + +Debian specific patches can be found in the debian/patches directory. +Quilt is used as the patch system. See /usr/share/doc/quilt/README.source +for details about quilt. + +Patches are applied by calling `debian/rules patch'. The `series' +file is constructed on the fly, configure scripts are regenerated +in the `patch' target. + +The source packages gcj-x.y and gnat-x.y do not contain copies of the +source code but build-depend on the appropriate gcc-x.y-source package +instead. --- gcc-4.7-4.7.2.orig/debian/lib32stdc++6.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.2/debian/lib32stdc++6.symbols.kfreebsd-amd64 @@ -0,0 +1,6 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/lib32quadmath0.symbols +++ gcc-4.7-4.7.2/debian/lib32quadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 lib32quadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.lpia +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.lpia @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.ldbl.32bit.s390 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.ldbl.32bit.s390 @@ -0,0 +1,284 @@ + CXXABI_LDBL_1.3@CXXABI_LDBL_1.3 4.2.1 + GLIBCXX_LDBL_3.4.10@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + GLIBCXX_LDBL_3.4.7@GLIBCXX_LDBL_3.4.7 4.2.1 + GLIBCXX_LDBL_3.4@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt3tr14hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZNKSt4hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1 + 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GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/gfortran-BV-doc.doc-base +++ gcc-4.7-4.7.2/debian/gfortran-BV-doc.doc-base @@ -0,0 +1,14 @@ +Document: gfortran-@BV@ +Title: The GNU Fortran Compiler +Author: Various +Abstract: This manual documents how to run, install and port `gfortran', + as well as its new features and incompatibilities, and how to report bugs. +Section: Programming/Fortran + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html +Files: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html + +Format: info +Index: /usr/share/info/gfortran-@BV@.info.gz +Files: /usr/share/info/gfortran-@BV@* --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.16.powerpc +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.16.powerpc @@ -0,0 +1,100 @@ + __iso_c_binding_c_f_pointer_c16@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r16@GFORTRAN_1.0 4.3 + _gfortran_arandom_r16@GFORTRAN_1.0 4.3 + _gfortran_bessel_jn_r16@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r16@GFORTRAN_1.4 4.6 + _gfortran_cpu_time_16@GFORTRAN_1.0 4.3 + _gfortran_erfc_scaled_r16@GFORTRAN_1.1 4.4.0 + _gfortran_exponent_r16@GFORTRAN_1.0 4.3 + _gfortran_fraction_r16@GFORTRAN_1.0 4.3 + _gfortran_matmul_c16@GFORTRAN_1.0 4.3 + _gfortran_matmul_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_maxval_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_minval_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_mminval_r16@GFORTRAN_1.0 4.3 + _gfortran_mproduct_c16@GFORTRAN_1.0 4.3 + _gfortran_mproduct_r16@GFORTRAN_1.0 4.3 + _gfortran_msum_c16@GFORTRAN_1.0 4.3 + _gfortran_msum_r16@GFORTRAN_1.0 4.3 + _gfortran_nearest_r16@GFORTRAN_1.0 4.3 + _gfortran_norm2_r16@GFORTRAN_1.4 4.6 + _gfortran_pow_c16_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_c16_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_r16_i4@GFORTRAN_1.0 4.6 + _gfortran_pow_r16_i8@GFORTRAN_1.0 4.3 + _gfortran_product_c16@GFORTRAN_1.0 4.3 + _gfortran_product_r16@GFORTRAN_1.0 4.3 + _gfortran_random_r16@GFORTRAN_1.0 4.3 + _gfortran_reshape_c16@GFORTRAN_1.0 4.3 + _gfortran_reshape_r16@GFORTRAN_1.0 4.3 + _gfortran_rrspacing_r16@GFORTRAN_1.0 4.3 + _gfortran_set_exponent_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxval_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_sminval_r16@GFORTRAN_1.0 4.3 + _gfortran_spacing_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__acos_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__acosh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_16@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_16@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r16@GFORTRAN_1.0 4.3 + _gfortran_ssum_c16@GFORTRAN_1.0 4.3 + _gfortran_ssum_r16@GFORTRAN_1.0 4.3 + _gfortran_sum_c16@GFORTRAN_1.0 4.3 + _gfortran_sum_r16@GFORTRAN_1.0 4.3 + _gfortran_transpose_c16@GFORTRAN_1.0 4.3 + _gfortran_transpose_r16@GFORTRAN_1.0 4.3 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.sparc64 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.sparc64 @@ -0,0 +1,9 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVli@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVli@GLIBCXX_3.4 4.1.1 +# FIXME: Currently no ldbl symbols in the 64bit libstdc++ on sparc. +# #include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/rules.source +++ gcc-4.7-4.7.2/debian/rules.source @@ -0,0 +1,15 @@ +SOURCE_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +patchdir = $(SOURCE_DIR)/patches + +include $(SOURCE_DIR)/debian/rules.defs +include $(SOURCE_DIR)/debian/rules.patch +include $(SOURCE_DIR)/debian/rules.unpack + +patch-source: $(patch_stamp) + +clean-source: + rm -rf $(stampdir) + rm -rf $(gcc_srcdir) $(gdc_srcdir) d + rm -rf bin + rm -rf $(srcdir) + --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.ldbl.64bit +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.ldbl.64bit @@ -0,0 +1,284 @@ + CXXABI_LDBL_1.3@CXXABI_LDBL_1.3 4.2.1 + GLIBCXX_LDBL_3.4.10@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + GLIBCXX_LDBL_3.4.7@GLIBCXX_LDBL_3.4.7 4.2.1 + GLIBCXX_LDBL_3.4@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt3tr14hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZNKSt4hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 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_ZTVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 --- gcc-4.7-4.7.2.orig/debian/relink +++ gcc-4.7-4.7.2/debian/relink @@ -0,0 +1,74 @@ +#! /bin/sh +# +# Relink GNAT utilities using the shared library +# + +set -e + +pwd=`pwd` + +# why? +chmod a-w build/gcc/ada/rts/*.ali + +rm -rf tmp +ln -s $pwd/build/gcc/ada/rts/libgnat.so.1 tmp/libgnat.so + +LD_LIBRARY_PATH=$pwd/tmp +export LD_LIBRARY_PATH + +PATH=$pwd/debian:$pwd/tmp:$PATH +export PATH + +echo "#! /bin/sh" > tmp/dgcc +echo "$pwd/build/gcc/xgcc -B$pwd/build/gcc/ "'"$@"' >> tmp/dgcc +chmod 755 tmp/dgcc + +echo "#! /bin/sh" > tmp/dgnatlink +echo "$pwd/build/gcc/gnatlink --GCC=dgcc "'"$@"' >> tmp/dgnatlink +chmod 755 tmp/dgnatlink + +GMCMD="$pwd/build/gcc/gnatmake -I- -Irts -I. -a -m --GNATBIND=$pwd/build/gcc/gnatbind --GNATLINK=dgnatlink --GCC=dgcc" + +#cd $pwd/build/gcc/ada +#make CFLAGS="-O2" CC="../xgcc -B../" STAGE_PREFIX=../ a-link.o a-gmem.o +#cd $pwd + +[ -f build/gcc/gnatmake.old ] || cp -p build/gcc/gnatmake build/gcc/gnatmake.old +[ -f build/gcc/gnatlink.old ] || cp -p build/gcc/gnatlink build/gcc/gnatlink.old + +make -C build/gcc/ada \ + CFLAGS='-gnatp -gnata -O2 ' \ + ADA_INCLUDES="-I." \ + CC="../xgcc -B../" \ + STAGE_PREFIX=../ \ + ../gnatmake ../gnatlink + +mv gnatmake bgnatmake +mv gnatlink bgnatlink +exit 0 + +cd build/gcc/ada +for i in ../gnatchop ../gnatcmd \ + ../gnatkr ../gnatlbr \ + ../gnatls ../gnatmake \ + ../gnatprep ../gnatpsys \ + ../gnatxref ../gnatfind +do + rm -f $i + $GMCMD -O2 -gnatp -o $i `basename $i`.adb -largs -L.. +done + +rm -f ../gnatmem +$GMCMD -O2 -gnatp -o ../gnatmem gnatmem.adb -largs -L.. a-gmem.o +$GMCMD -O2 -gnatp -o ../gnatlink gnatlink -largs -L.. a-link.o +rm -f ../gnatpsta + +make CFLAGS="-O2" CC="../xgcc -B../" a-gettty.o a-deftar.o +$GMCMD -O2 -gnatp -o ../gnatpsta gnatpsta -largs -L.. a-gettty.o a-deftar.o +rm -f ../gnatbl + +make CFLAGS="-O2" CC="../xgcc -B../" gnatbl.o +../xgcc -B../ -o ../gnatbl gnatbl.o -L.. -lgnat +rm -f ../bgnatmake ../bgnatlink ../debian/dgcc ../debian/dgnatlink + +chmod +w rts/*.ali --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.sh4 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.sh4 @@ -0,0 +1,128 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GCC_3.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GCC_3.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.ppc64 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.ppc64 @@ -0,0 +1,129 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_3.4.4 1:4.1.1 + __gcc_qdiv@GCC_3.4.4 1:4.1.1 + __gcc_qmul@GCC_3.4.4 1:4.1.1 + __gcc_qsub@GCC_3.4.4 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + _xlqadd@GCC_3.4 1:4.1.1 + _xlqdiv@GCC_3.4 1:4.1.1 + _xlqmul@GCC_3.4 1:4.1.1 + _xlqsub@GCC_3.4 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/dh_rmemptydirs +++ gcc-4.7-4.7.2/debian/dh_rmemptydirs @@ -0,0 +1,10 @@ +#! /bin/sh -e + +pkg=`echo $1 | sed 's/^-p//'` + +: # remove empty directories, when all components are in place +for d in `find debian/$pkg -depth -type d -empty 2> /dev/null`; do \ + while rmdir $d 2> /dev/null; do d=`dirname $d`; done; \ +done + +exit 0 --- gcc-4.7-4.7.2.orig/debian/libgnatprjBV.overrides +++ gcc-4.7-4.7.2/debian/libgnatprjBV.overrides @@ -0,0 +1 @@ +libgnatprj@BV@ binary: missing-dependency-on-libc --- gcc-4.7-4.7.2.orig/debian/lib32gfortran3.symbols +++ gcc-4.7-4.7.2/debian/lib32gfortran3.symbols @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.kfreebsd-amd64 @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/cpp-BV-doc.doc-base.cpp +++ gcc-4.7-4.7.2/debian/cpp-BV-doc.doc-base.cpp @@ -0,0 +1,16 @@ +Document: cpp-@BV@ +Title: The GNU C preprocessor +Author: Various +Abstract: The C preprocessor is a "macro processor" that is used automatically + by the C compiler to transform your program before actual compilation. + It is called a macro processor because it allows you to define "macros", + which are brief abbreviations for longer constructs. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/cpp.html +Files: /usr/share/doc/gcc-@BV@-base/cpp.html + +Format: info +Index: /usr/share/info/cpp-@BV@.info.gz +Files: /usr/share/info/cpp-@BV@* --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.hppa +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.hppa @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +# removed, see PR libstdc++/39491 __signbitl@GLIBCXX_3.4 4.2.1 +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.aeabi +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.aeabi @@ -0,0 +1,67 @@ + __aeabi_cdcmpeq@GCC_3.5 1:4.4.0 + __aeabi_cdcmple@GCC_3.5 1:4.4.0 + __aeabi_cdrcmple@GCC_3.5 1:4.4.0 + __aeabi_cfcmpeq@GCC_3.5 1:4.4.0 + __aeabi_cfcmple@GCC_3.5 1:4.4.0 + __aeabi_cfrcmple@GCC_3.5 1:4.4.0 + __aeabi_d2f@GCC_3.5 1:4.4.0 + __aeabi_d2iz@GCC_3.5 1:4.4.0 + __aeabi_d2lz@GCC_3.5 1:4.4.0 + __aeabi_d2uiz@GCC_3.5 1:4.4.0 + __aeabi_d2ulz@GCC_3.5 1:4.4.0 + __aeabi_dadd@GCC_3.5 1:4.4.0 + __aeabi_dcmpeq@GCC_3.5 1:4.4.0 + __aeabi_dcmpge@GCC_3.5 1:4.4.0 + __aeabi_dcmpgt@GCC_3.5 1:4.4.0 + __aeabi_dcmple@GCC_3.5 1:4.4.0 + __aeabi_dcmplt@GCC_3.5 1:4.4.0 + __aeabi_dcmpun@GCC_3.5 1:4.4.0 + __aeabi_ddiv@GCC_3.5 1:4.4.0 + __aeabi_dmul@GCC_3.5 1:4.4.0 + __aeabi_dneg@GCC_3.5 1:4.4.0 + __aeabi_drsub@GCC_3.5 1:4.4.0 + __aeabi_dsub@GCC_3.5 1:4.4.0 + __aeabi_f2d@GCC_3.5 1:4.4.0 + __aeabi_f2iz@GCC_3.5 1:4.4.0 + __aeabi_f2lz@GCC_3.5 1:4.4.0 + __aeabi_f2uiz@GCC_3.5 1:4.4.0 + __aeabi_f2ulz@GCC_3.5 1:4.4.0 + __aeabi_fadd@GCC_3.5 1:4.4.0 + __aeabi_fcmpeq@GCC_3.5 1:4.4.0 + __aeabi_fcmpge@GCC_3.5 1:4.4.0 + __aeabi_fcmpgt@GCC_3.5 1:4.4.0 + __aeabi_fcmple@GCC_3.5 1:4.4.0 + __aeabi_fcmplt@GCC_3.5 1:4.4.0 + __aeabi_fcmpun@GCC_3.5 1:4.4.0 + __aeabi_fdiv@GCC_3.5 1:4.4.0 + __aeabi_fmul@GCC_3.5 1:4.4.0 + __aeabi_fneg@GCC_3.5 1:4.4.0 + __aeabi_frsub@GCC_3.5 1:4.4.0 + __aeabi_fsub@GCC_3.5 1:4.4.0 + __aeabi_i2d@GCC_3.5 1:4.4.0 + __aeabi_i2f@GCC_3.5 1:4.4.0 + __aeabi_idiv@GCC_3.5 1:4.4.0 + __aeabi_idiv0@GCC_3.5 1:4.5.0 + __aeabi_idivmod@GCC_3.5 1:4.4.0 + __aeabi_l2d@GCC_3.5 1:4.4.0 + __aeabi_l2f@GCC_3.5 1:4.4.0 + __aeabi_lasr@GCC_3.5 1:4.4.0 + __aeabi_lcmp@GCC_3.5 1:4.4.0 + __aeabi_ldivmod@GCC_3.5 1:4.4.0 + __aeabi_ldiv0@GCC_3.5 1:4.5.0 + __aeabi_llsl@GCC_3.5 1:4.4.0 + __aeabi_llsr@GCC_3.5 1:4.4.0 + __aeabi_lmul@GCC_3.5 1:4.4.0 + __aeabi_ui2d@GCC_3.5 1:4.4.0 + __aeabi_ui2f@GCC_3.5 1:4.4.0 + __aeabi_uidiv@GCC_3.5 1:4.4.0 + __aeabi_uidivmod@GCC_3.5 1:4.4.0 + __aeabi_ul2d@GCC_3.5 1:4.4.0 + __aeabi_ul2f@GCC_3.5 1:4.4.0 + __aeabi_ulcmp@GCC_3.5 1:4.4.0 + __aeabi_uldivmod@GCC_3.5 1:4.4.0 + __aeabi_unwind_cpp_pr0@GCC_3.5 1:4.4.0 + __aeabi_uread4@GCC_3.5 1:4.4.0 + __aeabi_uread8@GCC_3.5 1:4.4.0 + __aeabi_uwrite4@GCC_3.5 1:4.4.0 + __aeabi_uwrite8@GCC_3.5 1:4.4.0 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.64bit +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.64bit @@ -0,0 +1,556 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPcl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKcl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastElNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + 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_ZTv0_n24_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znam@GLIBCXX_3.4 4.1.1 + _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwm@GLIBCXX_3.4 4.1.1 + _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.7-4.7.2.orig/debian/lib32stdc++CXX.postinst +++ gcc-4.7-4.7.2/debian/lib32stdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib32stdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/libgcjLGCJ.postinst +++ gcc-4.7-4.7.2/debian/libgcjLGCJ.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libgcj@GCJ@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf /usr/share/doc/libgcj@GCJ@ + ln -s gcj-@BV@-base /usr/share/doc/libgcj@GCJ@ + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/gcj-wrapper-BV.1 +++ gcc-4.7-4.7.2/debian/gcj-wrapper-BV.1 @@ -0,0 +1,20 @@ +.TH GCJ-WRAPPER 1 "June 6, 2002" gcj-wrapper "Java User's Manual" +.SH NAME +gcj-wrapper \- a wrapper around gcj + +.SH SYNOPSIS +gcj-wrapper [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcj-wrapper\fR is a wrapper around gcj(1) to be called as the java +compiler. Options different for javac(1) and gcj(1) are translated, +options unknown to gcj(1) are silently ignored. + +.SH OPTIONS +See gcj-@BV@(1) for a list of options that gcj understands. + +.SH "SEE ALSO" +.BR gcj-@BV@(1) +, +.BR javac(1) --- gcc-4.7-4.7.2.orig/debian/README.gnat +++ gcc-4.7-4.7.2/debian/README.gnat @@ -0,0 +1,22 @@ +If you want to develop Ada programs and libraries on Debian, please +read the Debian Policy for Ada: + +http://www.ada-france.org/debian/debian-ada-policy.html + +The default Ada compiler is and always will be the package `gnat'. +Debian contains many programs and libraries compiled with it, which +are all ABI-compatible. + +Starting with gnat-4.2, Debian provides both zero-cost and +setjump/longjump versions of the run-time library. The zero-cost +exception handling mechanism is the default as it provides the best +performance. The setjump/longjump exception handling mechanism is new +and only provided as a static library. It is necessary to use this +exception handling mechanism in distributed (annex E) programs. If +you wish to use the new sjlj library: + +1) call gnatmake with --RTS=sjlj +2) call gnatbind with -static + +Do NOT link your programs with libgnat-4.2.so, because it uses the ZCX +mechanism. --- gcc-4.7-4.7.2.orig/debian/lib64gfortran3.symbols +++ gcc-4.7-4.7.2/debian/lib64gfortran3.symbols @@ -0,0 +1,7 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.64" +#include "libgfortran3.symbols.qf" --- gcc-4.7-4.7.2.orig/debian/README.Debian +++ gcc-4.7-4.7.2/debian/README.Debian @@ -0,0 +1,39 @@ + The Debian GNU Compiler Collection setup + ======================================== + +Please see the README.Debian in /usr/share/doc/gcc, contained in the +gcc package for a description of the setup of the different compiler +versions. + +For general discussion about the Debian toolchain (GCC, glibc, binutils) +please use the mailing list debian-toolchain@lists.debian.org; for GCC +specific things, please use debian-gcc@lists.debian.org. When in doubt +use the debian-toolchain ML. + + +Maintainers of these packages +----------------------------- + +Matthias Klose +Falk Hueffner (alpha-linux) +Ludovic Brenta (gnat) +Aurelien Jarno (mips*-linux) + +Former and/or inactive maintainers of these packages +---------------------------------------------------- + +Ray Dassen +Jeff Bailey (hurd-i386) +Joel Baker (netbsd-i386) +Randolph Chung (ia64-linux) +Philip Blundell (arm-linux) +Ben Collins (sparc-linux) +Dan Jacobowitz (powerpc-linux) +Thiemo Seufer (mips*-linux) +Matt Taggart (hppa-linux) +Gerhard Tonn (s390-linux) +Roman Zippel (m68k-linux) +Arthur Loiret (gdc) + +=============================================================================== + --- gcc-4.7-4.7.2.orig/debian/g++-BV-spu.overrides +++ gcc-4.7-4.7.2/debian/g++-BV-spu.overrides @@ -0,0 +1,2 @@ +g++-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +g++-@BV@-spu binary: file-in-unusual-dir --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.sparc +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.sparc @@ -0,0 +1,105 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_LDBL_3.0@GCC_LDBL_3.0 1:4.2.1 + GCC_LDBL_4.0.0@GCC_LDBL_4.0.0 1:4.2.1 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_LDBL_4.0.0 1:4.2.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_LDBL_3.0 1:4.2.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_LDBL_3.0 1:4.2.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_LDBL_3.0 1:4.2.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_LDBL_4.0.0 1:4.2.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_LDBL_4.0.0 1:4.2.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.sh4 +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.sh4 @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.2.orig/debian/libquadmath0.symbols +++ gcc-4.7-4.7.2/debian/libquadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 libquadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.sparc64 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.sparc64 @@ -0,0 +1,109 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/gcj-wrapper-BV +++ gcc-4.7-4.7.2/debian/gcj-wrapper-BV @@ -0,0 +1,91 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java compiler. +# +# Command-line arguments should be in the style of Sun's Java compiler; +# these will be converted to gcj arguments before being passed to the +# gcj itself. +# +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gcj-wrapper-3.2 shell script. + +use strict; + +# The real Java compiler: +my $javaCompiler = '/usr/bin/gcj-@BV@'; + +# The command-line arguments to pass to the real Java compiler: +my @commandLine; + +# The warning flags to pass to the GNU Java compiler: +my $warnings = '-Wall'; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; +my $copyNextArg = 0; +my $ignoreNextArg = 0; +my $appendNextArg = ''; +foreach my $arg (@ARGV) { + # See if we already know what to do with this argument. + if ($ignoreNextArg) { + # Throw it away. + $ignoreNextArg = 0; + next; + } elsif ($copyNextArg or not $parsingOptions) { + # Copy it directly. + push @commandLine, $arg; + $copyNextArg = 0; + next; + } elsif ($appendNextArg) { + # Append it to $appendNextArg and then copy directly. + push @commandLine, ($appendNextArg . $arg); + $appendNextArg = ''; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-classpath' or $arg eq '--classpath' or $arg eq '--cp') { + $appendNextArg = '--classpath='; + } elsif ($arg eq '-encoding' or $arg eq '-bootclasspath' or + $arg eq '-extdirs') { + $appendNextArg = '-' . $arg . '='; + } elsif ($arg eq '-d') { + push @commandLine, '-d'; + $copyNextArg = 1; + } elsif ($arg eq '-nowarn') { + $warnings = ''; + } elsif ($arg =~ /^-g/) { + # Some kind of debugging option - just switch debugging on. + push @commandLine, '-g' if ($arg ne '-g:none'); + } elsif ($arg eq '-O') { + push @commandLine, '-O2'; + } elsif ($arg eq '-Xss') { + push @commandLine, $arg; + } elsif ($arg =~ /^-X/) { + # An extended Sun option (which we don't support). + push @commandLine, '--help' if ($arg eq '-X'); + } elsif ($arg eq '-source' or $arg eq '-sourcepath' or $arg eq '-target') { + # An unsupported option with a following argument. + $ignoreNextArg = 1; + } elsif ($arg =~ /^-/) { + # An unsupported standalone option. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Was there a partial argument that was never completed? +push @commandLine, $appendNextArg if ($appendNextArg); + +# Call the real Java compiler. +my @fullCommandLine = ( $javaCompiler, '-C' ); +push @fullCommandLine, $warnings if ($warnings); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.7-4.7.2.orig/debian/lib32gcc1.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.2/debian/lib32gcc1.symbols.kfreebsd-amd64 @@ -0,0 +1,137 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.2.orig/debian/lib32gccLC.postinst +++ gcc-4.7-4.7.2/debian/lib32gccLC.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib32gcc@LC@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/lib32gcc1.symbols.ppc64 +++ gcc-4.7-4.7.2/debian/lib32gcc1.symbols.ppc64 @@ -0,0 +1,142 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_4.1.0 1:4.1.1 + __gcc_qdiv@GCC_4.1.0 1:4.1.1 + __gcc_qmul@GCC_4.1.0 1:4.1.1 + __gcc_qsub@GCC_4.1.0 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.ldbl.32bit +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.ldbl.32bit @@ -0,0 +1,284 @@ + CXXABI_LDBL_1.3@CXXABI_LDBL_1.3 4.2.1 + GLIBCXX_LDBL_3.4.10@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + GLIBCXX_LDBL_3.4.7@GLIBCXX_LDBL_3.4.7 4.2.1 + GLIBCXX_LDBL_3.4@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt3tr14hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZNKSt4hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + 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_Unwind_ForcedUnwind@GCC_3.0 1:4.3.0 + _Unwind_GetCFA@GCC_3.3 1:4.3.0 + _Unwind_GetDataRelBase@GCC_3.0 1:4.3.0 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.3.0 + _Unwind_GetRegionStart@GCC_3.0 1:4.3.0 + _Unwind_GetTextRelBase@GCC_3.0 1:4.3.0 + _Unwind_RaiseException@GCC_3.0 1:4.3.0 + _Unwind_Resume@GCC_3.0 1:4.3.0 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.3.0 + _Unwind_VRS_Get@GCC_3.5 1:4.3.0 + _Unwind_VRS_Pop@GCC_3.5 1:4.3.0 + _Unwind_VRS_Set@GCC_3.5 1:4.3.0 + __absvdi2@GCC_3.0 1:4.3.0 + __absvsi2@GCC_3.0 1:4.3.0 + __adddf3@GCC_3.0 1:4.3.0 + __addsf3@GCC_3.0 1:4.3.0 + __addvdi3@GCC_3.0 1:4.3.0 + __addvsi3@GCC_3.0 1:4.3.0 + __ashldi3@GCC_3.0 1:4.3.0 + __ashrdi3@GCC_3.0 1:4.3.0 + __bswapdi2@GCC_4.3.0 1:4.3.0 + __bswapsi2@GCC_4.3.0 1:4.3.0 + __clear_cache@GCC_3.0 1:4.3.0 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.3.0 + __clzsi2@GCC_3.4 1:4.3.0 + __cmpdi2@GCC_3.0 1:4.3.0 + __ctzdi2@GCC_3.4 1:4.3.0 + __ctzsi2@GCC_3.4 1:4.3.0 + __divdc3@GCC_4.0.0 1:4.3.0 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__ucmpdi2@GCC_3.0 1:4.3.0 + __udivdi3@GLIBC_2.0 1:4.3.0 + __udivmoddi4@GCC_3.0 1:4.3.0 + __udivsi3@GCC_3.0 1:4.3.0 + __umoddi3@GLIBC_2.0 1:4.3.0 + __umodsi3@GCC_3.0 1:4.3.0 + __unorddf2@GCC_3.3.4 1:4.3.0 + __unordsf2@GCC_3.3.4 1:4.3.0 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.excprop +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.excprop @@ -0,0 +1,17 @@ + _ZNKSt15__exception_ptr13exception_ptr20__cxa_exception_typeEv@CXXABI_1.3.3 4.4.0 + _ZNKSt15__exception_ptr13exception_ptrcvMS0_FvvEEv@CXXABI_1.3.3 4.4.0 + _ZNKSt15__exception_ptr13exception_ptrntEv@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptr4swapERS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1ERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2EMS0_FvvE@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2ERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrD1Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrD2Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptraSERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptreqERKNS_13exception_ptrES2_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptrneERKNS_13exception_ptrES2_@CXXABI_1.3.3 4.4.0 + _ZSt17current_exceptionv@CXXABI_1.3.3 4.4.0 + _ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE@CXXABI_1.3.3 4.4.0 --- gcc-4.7-4.7.2.orig/debian/libstdc++CXX-BV-doc.doc-base +++ gcc-4.7-4.7.2/debian/libstdc++CXX-BV-doc.doc-base @@ -0,0 +1,13 @@ +Document: libstdc++@CXX@-@BV@-doc +Title: The GNU Standard C++ Library v3 (gcc-@BV@) +Author: Various +Abstract: This package contains documentation files for the GNU stdc++ library. + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. +Section: Programming/C++ + +Format: html +Index: /usr/share/doc/libstdc++@CXX@-@BV@-doc/libstdc++/html/index.html +Files: /usr/share/doc/libstdc++@CXX@-@BV@-doc/libstdc++/html*/* --- gcc-4.7-4.7.2.orig/debian/gcj-BV-jre-headless.overrides +++ gcc-4.7-4.7.2/debian/gcj-BV-jre-headless.overrides @@ -0,0 +1,2 @@ +# pick up the exact version, in case another gcj version is installed +gcj-@BV@-jre-headless binary: binary-or-shlib-defines-rpath --- gcc-4.7-4.7.2.orig/debian/lib64objc4.symbols +++ gcc-4.7-4.7.2/debian/lib64objc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 lib64objc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.7-4.7.2.orig/debian/lib64gomp1.symbols +++ gcc-4.7-4.7.2/debian/lib64gomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 lib64gomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- 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+ __cxa_allocate_dependent_exception@CXXABI_1.3.6 4.7 + __cxa_allocate_exception@CXXABI_1.3 4.1.1 + __cxa_bad_cast@CXXABI_1.3 4.1.1 + __cxa_bad_typeid@CXXABI_1.3 4.1.1 + __cxa_begin_catch@CXXABI_1.3 4.1.1 + __cxa_call_unexpected@CXXABI_1.3 4.1.1 + __cxa_current_exception_type@CXXABI_1.3 4.1.1 + __cxa_deleted_virtual@CXXABI_1.3.6 4.7 + __cxa_demangle@CXXABI_1.3 4.1.1 + __cxa_end_catch@CXXABI_1.3 4.1.1 + __cxa_free_dependent_exception@CXXABI_1.3.6 4.7 + __cxa_free_exception@CXXABI_1.3 4.1.1 + __cxa_get_exception_ptr@CXXABI_1.3.1 4.1.1 + __cxa_get_globals@CXXABI_1.3 4.1.1 + __cxa_get_globals_fast@CXXABI_1.3 4.1.1 + __cxa_guard_abort@CXXABI_1.3 4.1.1 + __cxa_guard_acquire@CXXABI_1.3 4.1.1 + __cxa_guard_release@CXXABI_1.3 4.1.1 + __cxa_pure_virtual@CXXABI_1.3 4.1.1 + __cxa_rethrow@CXXABI_1.3 4.1.1 + __cxa_throw@CXXABI_1.3 4.1.1 + __cxa_tm_cleanup@CXXABI_TM_1 4.7 + __cxa_vec_cctor@CXXABI_1.3 4.1.1 + __cxa_vec_cleanup@CXXABI_1.3 4.1.1 + __cxa_vec_ctor@CXXABI_1.3 4.1.1 + __cxa_vec_delete2@CXXABI_1.3 4.1.1 + __cxa_vec_delete3@CXXABI_1.3 4.1.1 + __cxa_vec_delete@CXXABI_1.3 4.1.1 + __cxa_vec_dtor@CXXABI_1.3 4.1.1 + __cxa_vec_new2@CXXABI_1.3 4.1.1 + __cxa_vec_new3@CXXABI_1.3 4.1.1 + __cxa_vec_new@CXXABI_1.3 4.1.1 + __dynamic_cast@CXXABI_1.3 4.1.1 + __once_proxy@GLIBCXX_3.4.11 4.4.0 + atomic_flag_clear_explicit@GLIBCXX_3.4.11 4.4.0 + atomic_flag_test_and_set_explicit@GLIBCXX_3.4.11 4.4.0 --- gcc-4.7-4.7.2.orig/debian/cpp-BV-doc.doc-base.cppint +++ gcc-4.7-4.7.2/debian/cpp-BV-doc.doc-base.cppint @@ -0,0 +1,17 @@ +Document: cppinternals-@BV@ +Title: The GNU C preprocessor (internals) +Author: Various +Abstract: This brief manual documents the internals of cpplib, and + explains some of the tricky issues. It is intended that, along with + the comments in the source code, a reasonably competent C programmer + should be able to figure out what the code is doing, and why things + have been implemented the way they have. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/cppinternals.html +Files: /usr/share/doc/gcc-@BV@-base/cppinternals.html + +Format: info +Index: /usr/share/info/cppinternals-@BV@.info.gz +Files: /usr/share/info/cppinternals-@BV@* --- gcc-4.7-4.7.2.orig/debian/porting.html +++ gcc-4.7-4.7.2/debian/porting.html @@ -0,0 +1,30 @@ + + +Porting libstdc++-v3 + + + + + + + +

Porting libstdc++-v3

+
+


+Node: Top, +Next: , +Up: (dir) +
+
+ +The documentation in this file was removed, because it is licencensed +under a non DFSG conforming licencse. + + --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.qf +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.qf @@ -0,0 +1,16 @@ + _gfortran_maxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_maxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_minloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_minloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mmaxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mmaxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mminloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mminloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_smaxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_smaxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_sminloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_sminloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.ppc64 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.ppc64 @@ -0,0 +1,10 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.2.orig/debian/runcheck.sh +++ gcc-4.7-4.7.2/debian/runcheck.sh @@ -0,0 +1,20 @@ +#! /bin/sh + +mkdir -p build + +cat >build/runcheck.c < +int main() +{ + return printf("yes\n") != 4; +} +EOF + +if m=$(${CC:-gcc} -o build/runcheck build/runcheck.c 2>&1); then + m=$(build/runcheck 2>&1) + echo ${m#* } > build/runcheck.out + echo ${m#* } +else + echo ${m##*:} > build/runcheck.out + echo ${m##*:} +fi --- gcc-4.7-4.7.2.orig/debian/README.snapshot +++ gcc-4.7-4.7.2/debian/README.snapshot @@ -0,0 +1,36 @@ +Debian gcc-snapshot package +=========================== + +This package contains a recent development SNAPSHOT of all files +contained in the GNU Compiler Collection (GCC). + +DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES! + +This package will NEVER hit the testing distribution. It's used for +tracking gcc bugs submitted to the Debian BTS in recent development +versions of gcc. + +To use this snapshot, you should set the following environment variables: + + LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH + PATH=/usr/lib/gcc-snapshot/bin:$PATH + +You might also like to use a shell script to wrap up this +funcationality, e.g. + +place in /usr/local/bin/gcc-snapshot and chmod +x it + +----------- snip ---------- +#! /bin/sh +LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH +PATH=/usr/lib/gcc-snapshot/bin:$PATH +gcc "$@" +----------- snip ---------- + +Make the same for g++, g77, gij, gcj, cpp, ... + +Don't forget the quotes around the $@ or gcc will not parse it's +command line correctly! + +Unset these variables before building Debian packages destined for an +upload to ftp-master.debian.org. --- gcc-4.7-4.7.2.orig/debian/TODO +++ gcc-4.7-4.7.2/debian/TODO @@ -0,0 +1,50 @@ +(It is recommended to edit this file with emacs' todoo mode) +Last updated: 2008-05-02 + +* General + +- Clean up the sprawl of debian/rules. I'm sure there are neater + ways to do some of it; perhaps split it up into some more files? + Partly done. + +- Make debian/rules control build the control file without unpacking + the sources or applying patches. Currently, it unpacks the sources, + patches them, creates the control file, and a subsequent + dpkg-buildpackage deletes the sources, re-unpacks them, and + re-patches them. + +- Reorganise debian/rules.defs to decide which packages to build in a + more straightforward and less error-prone fashion: (1) start with + all languages; override the list of languages depending on the name + of the source package (gcc-4.3, gnat-4.3, gdc-4.3, gcj-4.3). (2) + filter the list of languages depending on the target platform; (3) + depending on the languages to build, decide on which libraries to + build. + +o [Ludovic Brenta] Ada + +- Done: Link the gnat tools with libgnat.so, instead of statically. + +- Done: Build libgnatvsn containing parts of the compiler (version + string, etc.) under GNAT-Modified GPL. Link the gnat tools with it. + +- Done: Build libgnatprj containing parts of the compiler (the project + manager) under pure GPL. Link the gnat tools with it. + +- Done: Build both the zero-cost and setjump/longjump exceptions + versions of libgnat. In particular, gnat-glade (distributed systems) + works best with SJLJ. + +- Done: Re-enable running the test suite. + +- Add support for building cross-compilers. + +- Add support for multilib (not yet supported upstream). + +* Fortran + +- gfortran man page generation + +* Java + +- build java-gcj-compat from the gcc source? --- gcc-4.7-4.7.2.orig/debian/rules.conf +++ gcc-4.7-4.7.2/debian/rules.conf @@ -0,0 +1,1124 @@ +# -*- makefile -*- +# rules.conf +# - used to build debian/control and debian/rules.parameters +# - assumes unpacked sources + +include debian/rules.defs +include debian/rules.sonames + +# Helper to generate biarch/triarch dependencies. +# For example, $(eval $(call gen_multilib_deps,gomp)) will create the +# libgompbiarch variable, and make it contains the libgompbiarch{32,64,n32} +# variables if biarch{32,64,n32} is set to yes. +define gen_multilib_deps + lib$1biarch64 := lib64$1$$($(shell echo $1 | tr "a-z" "A-Z")_SONAME)$(LS) (>= $$$${gcc:Version}) + lib$1biarch32 := lib32$1$$($(shell echo $1 | tr "a-z" "A-Z")_SONAME)$(LS) (>= $$$${gcc:Version}) + lib$1biarchn32 := libn32$1$$($(shell echo $1 | tr "a-z" "A-Z")_SONAME)$(LS) (>= $$$${gcc:Version}) + lib$1biarchx32 := libx32$1$$($(shell echo $1 | tr "a-z" "A-Z")_SONAME)$(LS) (>= $$$${gcc:Version}) + lib$1biarchhf := libhf$1$$($(shell echo $1 | tr "a-z" "A-Z")_SONAME)$(LS) (>= $$$${gcc:Version}) + lib$1biarchsf := libsf$1$$($(shell echo $1 | tr "a-z" "A-Z")_SONAME)$(LS) (>= $$$${gcc:Version}) + ifeq ($$(biarch64),yes) + lib$1biarch := $$(lib$1biarch64) + endif + ifeq ($$(biarch32),yes) + ifeq ($$(biarch64),yes) + lib$1biarch := $$(lib$1biarch64), $$(lib$1biarch32) + else + lib$1biarch := $$(lib$1biarch32) + endif + endif + ifeq ($$(biarchx32),yes) + ifeq ($$(biarch64),yes) + lib$1biarch := $$(lib$1biarch64), $$(lib$1biarchx32) + else ifeq ($$(biarch32),yes) + lib$1biarch := $$(lib$1biarch32), $$(lib$1biarchx32) + else + lib$1biarch := $$(lib$1biarchx32) + endif + endif + ifeq ($$(biarchn32),yes) + ifeq ($$(biarch64),yes) + lib$1biarch := $$(lib$1biarch64), $$(lib$1biarchn32) + else + lib$1biarch := $$(lib$1biarchn32) + endif + endif + ifeq ($$(biarchhf),yes) + lib$1biarch := $$(lib$1biarchhf) | lib$1$$($(shell echo $1 | tr "a-z" "A-Z")_SONAME)$(LS)-armhf + endif + ifeq ($$(biarchsf),yes) + lib$1biarch := $$(lib$1biarchsf) | lib$1$$($(shell echo $1 | tr "a-z" "A-Z")_SONAME)$(LS)-armel + endif +endef +$(foreach x,gomp mudflap ssp gfortran itm objc quadmath go,$(eval $(call gen_multilib_deps,$(x)))) + +# Helper to generate _no_archs variables. +# For example, $(eval $(call gen_no_archs,java)) will create the java_no_archs +# variable, using the java_no_cpu and java_no_systems variables. +define gen_no_archs + $1_no_archs := + ifneq (,$$($1_no_cpus)) + $1_no_archs += $$(foreach cpu,$$(filter-out i386 amd64 alpha arm,$$($1_no_cpus)),!$$(cpu)) + ifneq (,$$(filter i386,$$($1_no_cpus))) + $1_no_archs += !i386 !hurd-i386 !kfreebsd-i386 !knetbsd-i386 + endif + ifneq (,$$(filter amd64,$$($1_no_cpus))) + $1_no_archs += !amd64 !kfreebsd-amd64 + endif + ifneq (,$$(filter alpha,$$($1_no_cpus))) + $1_no_archs += !alpha !hurd-alpha !knetbsd-alpha + endif + ifneq (,$$(filter arm,$$($1_no_cpus))) + $1_no_archs += !arm !armel !armhf + endif + ifneq (,$$(strip $3)) + $1_no_systems_tmp := $$(subst $$(SPACE)gnu$$(SPACE),$$(SPACE)hurd-gnu$$(SPACE),$$(SPACE)$3$$(SPACE)) + $1_no_archs += $$(foreach cpu,$$($1_no_cpus),$$(foreach system,$$($1_no_systems_tmp),!$$(subst gnu,$$(cpu),$$(system)))) + endif + endif + ifneq (,$$($1_no_systems)) + $1_no_systems_tmp := $$(subst $$(SPACE)gnu$$(SPACE),$$(SPACE)hurd-gnu$$(SPACE),$$(SPACE)$$($1_no_systems)$$(SPACE)) + $1_no_archs += $$(foreach system,$$($1_no_systems_tmp),$$(foreach cpu,$2,!$$(subst gnu,$$(cpu),$$(system)))) + endif + $1_no_archs := $$(strip $$($1_no_archs)) +endef +base_deb_cpus := i386 alpha +base_deb_systems := +$(foreach x,ada java java_plugin fortran libphobos libgc check locale,$(eval $(call gen_no_archs,$(x),$(base_deb_cpus),$(base_deb_systems)))) +linux_no_archs := !hurd-i386 !hurd-alpha !kfreebsd-i386 !kfreebsd-amd64 !knetbsd-i386 !knetbsd-alpha + +GCC_VERSION := $(strip $(shell cat $(firstword $(wildcard $(srcdir)/gcc/FULL-VER $(srcdir)/gcc/BASE-VER)))) +NEXT_GCC_VERSION := $(shell echo $(GCC_VERSION) | \ + awk -F. '{OFS="."; if (NF==2) $$3=1; else $$NF += 1; print}') +GCC_MAJOR_VERSION := $(shell echo $(GCC_VERSION) | sed -r 's/([0-9])\.[0-9]\.[0-9]/\1/') +GCC_MINOR_VERSION := $(shell echo $(GCC_VERSION) | sed -r 's/[0-9]\.([0-9])\.[0-9]/\1/') +GCC_RELEASE_VERSION := $(shell echo $(GCC_VERSION) | sed -r 's/[0-9]\.[0-9]\.([0-9])/\1/') +NEXT_GCC_MAJOR_VERSION := $(shell expr $(echo $(GCC_MAJOR_VERSION)) + 1) +NEXT_GCC_MINOR_VERSION := $(shell expr $(echo $(GCC_MINOR_VERSION)) + 1) +NEXT_GCC_RELEASE_VERSION := $(shell expr $(echo $(GCC_MAJOR_VERSION)) + 1) + +ifeq ($(single_package),yes) + BASE_VERSION := $(shell echo $(GCC_VERSION) | sed -e 's/\([1-9]\.[0-9]\).*/\1/') +endif +ifneq (,$(findstring gdc,$(PKGSOURCE))) + GDC_BASE_VERSION := $(word 1, $(subst -, ,$(DEB_VERSION))) + DEB_VERSION := $(subst $(GDC_BASE_VERSION)-,,$(DEB_VERSION)) +endif + +GCC_SOURCE_VERSION := $(shell echo $(DEB_VERSION) | sed 's/-.*//') +NEXT_GCC_SOURCE_VERSION := $(shell echo $(GCC_SOURCE_VERSION) | \ + awk -F. '{OFS="."; if (NF==2) $$3=1; else $$NF += 1; print}') + +MAINTAINER = Debian GCC Maintainers +ifeq ($(distribution),Ubuntu) + ifneq (,$(findstring $(PKGSOURCE),gnat gdc)) + MAINTAINER = Ubuntu MOTU Developers + else + MAINTAINER = Ubuntu Core developers + endif +endif + +UPLOADERS = Matthias Klose +ifneq (,$(findstring $(PKGSOURCE),gnat)) + UPLOADERS = Ludovic Brenta +endif +ifneq (,$(findstring $(PKGSOURCE),gdc)) + UPLOADERS = Iain Buclaw +endif + +DPKG_BUILD_DEP = dpkg-dev (>= 1.14.15), +ifeq ($(with_multiarch_lib),yes) + DPKG_BUILD_DEP = dpkg-dev (>= 1.16.0~ubuntu4), +endif +ifeq ($(multiarch_stage1),yes) + DPKG_BUILD_DEP = dpkg-dev (>= 1.16.0~ubuntu4), +endif + +# The binutils version needed. +# The oldest suitable versions for the various platforms can be found in +# INSTALL/specific.html ; we take a tighter dependency if possible to be on +# the safe side (something like newest( version in stable, versions for the +# various platforms in INSTALL/specific.html) ). +# We need binutils (>= 2.19.1) for a new dwarf unwind expression opcode. +# See http://gcc.gnu.org/ml/gcc-patches/2008-09/msg01713.html +ifeq ($(trunk_build),yes) + BINUTILSV = 2.22 +else + BINUTILSV = 2.21.1 +endif +ifeq ($(DEB_CROSS),yes) + BINUTILS_BUILD_DEP = binutils$(TS) (>= $(BINUTILSV)), binutils-multiarch (>= $(BINUTILSV)) +else + BINUTILS_BUILD_DEP = binutils (>= $(BINUTILSV)) | binutils-multiarch (>= $(BINUTILSV)) +endif +# FIXME; stripping doesn't work with gold +#BINUTILS_BUILD_DEP += , binutils-gold (>= $(BINUTILSV)) [$(gold_archs)] + +# libc-dev dependencies +libc_ver := 2.11 +libc_dev_ver := $(libc_ver) +ifeq ($(with_multiarch_lib),yes) + ifeq ($(distribution),Debian) + libc_dev_ver := 2.13-5 + #ifeq (,$(filter arm, $(go_no_cpus))) + # libc_dev_ver := 2.13-31 + #endif + else + libc_dev_ver := 2.13-0ubuntu6 + endif +endif +ifeq ($(DEB_TARGET_ARCH_OS),linux) + ifneq (,$(findstring $(DEB_TARGET_ARCH),alpha ia64)) + LIBC_DEP = libc6.1 + else + LIBC_DEP = libc6 + endif +else + ifeq ($(DEB_TARGET_ARCH_OS),hurd) + LIBC_DEP = libc0.3 + endif + ifeq ($(DEB_TARGET_ARCH_OS),kfreebsd) + LIBC_DEP = libc0.1 + endif + ifeq ($(DEB_TARGET_ARCH),uclibc) + LIBC_DEP ?= libuclibc + LIBC_DEV_DEP ?= libuclibc-dev + endif +endif +LIBC_DEV_DEP = $(LIBC_DEP)-dev +# for cross +ifeq ($(DEB_CROSS),yes) + LIBC_DEP ?= $(LIBC_DEP)$(LS) + LIBC_DEV_DEP ?= $(LIBC_DEV_DEP)$(LS) +endif + +# this is about Debian archs name, *NOT* GNU target triplet +biarch_deb_map := \ + i386=amd64 amd64=i386 \ + mips=mips64 mipsel=mips64 \ + powerpc=ppc64 ppc64=powerpc \ + sparc=sparc64 \ + s390=s390x s390x=s390 \ + kfreebsd-amd64=i386 \ + armel=armhf \ + armhf=armel + +biarch_deb_arch := $(patsubst $(DEB_TARGET_ARCH)=%,%, \ + $(filter $(DEB_TARGET_ARCH)=%,$(biarch_deb_map))) + +LIBC_BIARCH_DEP := +LIBC_BIARCH_DEV_DEP := +LIBCXX_BIARCH_DEP := +LIBCXX_BIARCH_DBG_DEP := +ifneq (,$(findstring yes,$(biarch64) $(biarch32) $(biarchn32) $(biarchx32)$(biarchhf)$(biarchsf))) + LIBC_BIARCH_DEP := $${shlibs:Depends} + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS) (>= $(libc_ver)) + ifeq ($(biarch64),yes) + LIBCXX_BIARCH_DEP := lib64stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) + LIBCXX_BIARCH_DBG_DEP := lib64stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) + endif + ifeq ($(biarch32),yes) + LIBCXX_BIARCH_DEP := lib32stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) + LIBCXX_BIARCH_DBG_DEP := lib32stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) + endif + ifeq ($(biarch64)$(biarch32),yesyes) + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-amd64$(LS) (>= $(libc_ver)), $(LIBC_DEV_DEP)-i386$(LS) (>= $(libc_ver)) + LIBCXX_BIARCH_DEP := lib64stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}), lib32stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) + LIBCXX_BIARCH_DBG_DEP := lib64stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS), lib32stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) + endif + ifeq ($(biarch64)$(biarchx32),yesyes) + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-amd64$(LS) (>= $(libc_ver)), $(LIBC_DEV_DEP)-x32$(LS) (>= $(libc_ver)) + LIBCXX_BIARCH_DEP := lib64stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}), libx32stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) + LIBCXX_BIARCH_DBG_DEP := lib64stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS), libx32stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) (>= $${gcc:Version}) + endif + ifeq ($(biarch32)$(biarchx32),yesyes) + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-i386$(LS) (>= $(libc_ver)), $(LIBC_DEV_DEP)-x32$(LS) (>= $(libc_ver)) + LIBCXX_BIARCH_DEP := lib32stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}), libx32stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) + LIBCXX_BIARCH_DBG_DEP := lib32stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS), libx32stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) (>= $${gcc:Version}) + endif + ifeq ($(biarchn32),yes) + ifneq (,$(findstring $(DEB_TARGET_ARCH),mips mipsel)) + triarch := + ifeq ($(biarch64),yes) + triarch := $(COMMA)$(SPACE) + endif + LIBC_BIARCH_DEV_DEP += $(triarch)libc6-dev-mipsn32$(LS) (>= $(libc_ver)) + LIBCXX_BIARCH_DEP += $(triarch)libn32stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) + LIBCXX_BIARCH_DBG_DEP += $(triarch)libn32stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) + endif + endif + ifeq ($(biarchhf),yes) + LIBCXX_BIARCH_DEP := libhfstdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) | libstdc++$(CXX_SONAME)$(LS)-armhf + LIBCXX_BIARCH_DBG_DEP := libhfstdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) | libstdc++$(CXX_SONAME)-$(BASE_VERSION)$(LS)-dbg-armhf + LIBC_BIARCH_DEP := $(LIBC_DEP)-$(biarch_deb_arch)$(LS) (>= $(libc_ver)) + LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS) + LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS) + endif + ifeq ($(biarchsf),yes) + LIBCXX_BIARCH_DEP := libsfstdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) | libstdc++$(CXX_SONAME)$(LS)-armel + LIBCXX_BIARCH_DBG_DEP := libsfstdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) | libstdc++$(CXX_SONAME)-$(BASE_VERSION)$(LS)-dbg-armel + LIBC_BIARCH_DEP := $(LIBC_DEP)-$(biarch_deb_arch)$(LS) (>= $(libc_ver)) + LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS) + LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS) + endif +endif + +# Add suffix and required version +LIBC_DEV_DEP := $(LIBC_DEV_DEP)$(LS) (>= $(libc_dev_ver)) +# TODO: make this automatic, there must be a better way to define LIBC_DEP. +ifneq ($(DEB_CROSS),yes) + LIBC_BUILD_DEP = libc6.1-dev (>= $(libc_dev_ver)) [alpha ia64] | libc0.3-dev (>= $(libc_dev_ver)) [hurd-i386] | libc0.1-dev (>= $(libc_dev_ver)) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= $(libc_dev_ver)) + ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty oneiric)) + LIBC_BUILD_DEP += , libc6-dev (>= 2.13-31) [armel armhf] + endif + LIBC_BIARCH_BUILD_DEP = libc6-dev-amd64 [i386 x32], libc6-dev-sparc64 [sparc], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64 x32], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 s390x x32], lib64gcc1 [i386 powerpc sparc s390 x32], libc6-dev-mips64 [mips mipsel], libc6-dev-mipsn32 [mips mipsel], +ifneq (,$(findstring amd64,$(biarchx32archs))) + LIBC_BIARCH_BUILD_DEP += libc6-dev-x32 [amd64 i386], libx32gcc1 [amd64 i386], +endif +ifneq (,$(findstring armel,$(biarchhfarchs))) + LIBC_BIARCH_BUILD_DEP += libc6-dev-armhf [armel], +endif +ifneq (,$(findstring armhf,$(biarchsfarchs))) + LIBC_BIARCH_BUILD_DEP += libc6-dev-armel [armhf], +endif +else + LIBC_BUILD_DEP = $(LIBC_DEV_DEP), + ifneq ($(LIBC_BIARCH_DEV_DEP),) + LIBC_BIARCH_BUILD_DEP = $(LIBC_BIARCH_DEV_DEP), + else + LIBC_BIARCH_BUILD_DEP = + endif +endif + +GCC_MULTILIB_BUILD_DEP = g++-multilib [$(multilib_archs)], + +LIBUNWIND_DEV_DEP := libunwind7-dev$(LS) (>= 0.98.5-6) +LIBUNWIND_BUILD_DEP := $(LIBUNWIND_DEV_DEP) [ia64], +LIBATOMIC_OPS_BUILD_DEP := libatomic-ops-dev$(LS) [ia64], +ifneq ($(DEB_TARGET_ARCH),ia64) + LIBUNWIND_DEV_DEP := # nothing +endif + +ifneq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty)) + GMP_BUILD_DEP = libgmp3-dev | libgmp-dev (>= 2:5.0.1~), + MPFR_BUILD_DEP = libmpfr-dev, +else + GMP_BUILD_DEP = libgmp-dev (>= 2:5.0.1~), + MPFR_BUILD_DEP = libmpfr-dev (>= 3.0.0-9~), +endif + +cloog_parma = +ifeq ($(trunk_build),yes) + PPL_BUILD_DEP = libisl-dev, + CLOOG_BUILD_DEP = libcloog-isl-dev, +else ifeq ($(cloog_parma),yes) + PPL_BUILD_DEP = libppl-dev (>= 0.11~) | libppl0.11-dev, + CLOOG_BUILD_DEP = libcloog-parma-dev, + # FIXME: currently not dl'opened. + #CLOOG_RUNTIME_DEP = libcloog-ppl1, libppl-c4, libppl9, libpwl5 +else + PPL_BUILD_DEP = libppl-dev (>= 0.11~) | libppl0.10-dev, + CLOOG_BUILD_DEP = libcloog-ppl-dev (>= 0.15.9-2~), + # FIXME: currently not dl'opened. + #CLOOG_RUNTIME_DEP = libcloog-ppl0 (>= 0.15.9-2~), libppl-c2, libppl7 +endif +MPC_BUILD_DEP = libmpc-dev, +ELF_BUILD_DEP = libelfg0-dev (>= 0.8.12), + +SOURCE_BUILD_DEP := +ifeq (,$(findstring gcc,$(PKGSOURCE))) + SOURCE_BUILD_DEP := gcc-$(BASE_VERSION)-source (>= $(GCC_SOURCE_VERSION)), gcc-$(BASE_VERSION)-source (<< $(NEXT_GCC_SOURCE_VERSION)), +endif + +CHECK_BUILD_DEP := dejagnu [$(check_no_archs)], +ifneq (,$(findstring gcc,$(PKGSOURCE))) + CHECK_BUILD_DEP += autogen, +endif + +AUTO_BUILD_DEP := m4, libtool, +AUTO_BUILD_DEP += autoconf2.64, automake (>= 1:1.11), automake (<< 1:1.12), + +ifneq ($(DEB_CROSS),yes) +JAVA_BUILD_DEP := libc6.1-dbg [alpha ia64] | libc0.3-dbg [hurd-i386] | libc0.1-dbg [kfreebsd-i386 kfreebsd-amd64] | libc6-dbg, zlib1g-dev, libantlr-java, python, libffi-dev, + +ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + bd_java_archs = +else ifeq ($(single_package)-$(with_java),yes-yes) + bd_java_archs = +else + bd_java_archs = $(EMPTY) [$(java_no_archs)] +endif + +ifneq (,$(java_awt_peers)) + JAVA_BUILD_DEP += fastjar$(bd_java_archs), libmagic-dev$(bd_java_archs), + JAVA_BUILD_DEP += libecj-java (>= 3.3.0-2)$(bd_java_archs), zip$(bd_java_archs), + ifeq ($(with_java_maintainer_mode),yes) + # gcj-4.3 needed for gjavah-4.3. + JAVA_BUILD_DEP += gcj-4.4$(bd_java_archs), ecj (>= 3.3.0-2)$(bd_java_archs), + endif + JAVA_BUILD_DEP += libasound2-dev [$(java_no_archs) $(linux_no_archs)], + ifneq (,$(findstring gtk,$(java_awt_peers))) + JAVA_BUILD_DEP += libxtst-dev$(bd_java_archs), libxt-dev$(bd_java_archs), libgtk2.0-dev (>= 2.4.4-2)$(bd_java_archs), libart-2.0-dev$(bd_java_archs), libcairo2-dev$(bd_java_archs), + endif + ifneq (,$(findstring qt,$(java_awt_peers))) + JAVA_BUILD_DEP += libqt4-dev (>= 4.1.0)$(bd_java_archs), + endif + # gconf peer, disabled by default + #JAVA_BUILD_DEP += libgconf2-dev$(bd_java_archs), + # gstreamer peer + #JAVA_BUILD_DEP += libgstreamer-plugins-base0.10-dev$(bd_java_archs), + ifneq ($(single_package),yes) + JAVA_BUILD_DEP += g++-4.7 [armel armhf], + endif +endif +ifneq ($(with_standalone_gcj),yes) + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + JAVA_BUILD_DEP += $(SOURCE_BUILD_DEP) + endif +endif +#JAVA_BUILD_INDEP := gcj-$(BASE_VERSION)-jdk +ifeq ($(single_package),yes) + LIBSTDCXX_BUILD_INDEP = doxygen (>= 1.7.2), graphviz (>= 2.2), gsfonts-x11, texlive-latex-base + ifeq ($(cloog_parma),yes) + LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns + endif + JAVA_BUILD_INDEP := +endif +ifeq ($(with_separate_libgcj),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + JAVA_BUILD_DEP := + JAVA_BUILD_INDEP := + endif +endif + +ifeq ($(with_ecj),yes) + ifneq (./,$(dir $(ecj_jar))) + ECJ_DEP = libecj-java (>= 3.5.1) + endif +else + ECJ_DEP = ecj, libecj-java (>= 3.5.1) + ECJ_DEP = ecj-gcj, libecj-java-gcj (>= 3.5.1) + ifneq (,$(filter $(DEB_HOST_ARCH),arm armel armhf)) + ECJ_DEP +=, ecj1 + endif +endif + +ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + LIBSTDCXX_BUILD_INDEP = doxygen (>= 1.7.2), graphviz (>= 2.2), gsfonts-x11, texlive-latex-base + ifeq ($(cloog_parma),yes) + LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns + endif + JAVA_BUILD_INDEP :=, $(JAVA_BUILD_INDEP) +endif + +SPU_BUILD_DEP := binutils-spu (>= $(BINUTILSV)) [powerpc ppc64], newlib-spu (>= 1.16.0) [powerpc ppc64], gcc-$(BASE_VERSION)-base [powerpc ppc64], +SPU_BUILD_DEP := binutils-spu (>= $(BINUTILSV)) [powerpc ppc64], newlib-spu (>= 1.16.0) [powerpc ppc64], + +# FIXME: needs zlib? +GO_BUILD_DEP := g++-4.6, +GO_BUILD_DEP := netbase, + +ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + ifneq ($(with_separate_gnat),yes) + # Build gnat as part of the combiled gcc-x.y source package. Do not fail + # if gnat is not present on unsupported architectures; the build scripts + # will not use gnat anyway. + GNAT_BUILD_DEP := gnat (>= 4.1) [$(ada_no_archs)], + endif +else ifeq ($(single_package),yes) + # Ditto, as part of the gcc-snapshot package. + # FIXME: ad hoc dependency, better fix setting of ada_no_archs + #GNAT_BUILD_DEP := gnat (>= 4.1) [$(ada_no_archs)], gcc-snapshot (>= 20090821-1) [armel armhf], + GNAT_BUILD_DEP := gnat (>= 4.1) [!arm !armhf !m68k !powerpcspe !sh4 !sparc64 !hurd-i386], +else ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + # Special source package just for gnat. Fail early if gnat is not present, + # rather than waste CPU cycles and fail later. + GNAT_BUILD_DEP := gnat (>= 4.1), + GNAT_BUILD_DEP += $(SOURCE_BUILD_DEP) + JAVA_BUILD_DEP := + JAVA_BUILD_INDEP := + GDC_BUILD_DEP := + # gnat on spu should work ... + SPU_BUILD_DEP := + GO_BUILD_DEP := +else ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + # Special source package just for gcj. + GNAT_BUILD_DEP := + GDC_BUILD_DEP := + SPU_BUILD_DEP := + GO_BUILD_DEP := +else ifeq ($(PKGSOURCE),gdc-$(BASE_VERSION)) + # Special source package just for gdc. + GNAT_BUILD_DEP := + JAVA_BUILD_DEP := + JAVA_BUILD_INDEP := + GDC_BUILD_DEP := $(SOURCE_BUILD_DEP) + SPU_BUILD_DEP := + GO_BUILD_DEP := +else ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION)) + # Special source package just for gccgo. + GNAT_BUILD_DEP := + JAVA_BUILD_DEP := + JAVA_BUILD_INDEP := + GDC_BUILD_DEP := $(SOURCE_BUILD_DEP) + SPU_BUILD_DEP := +endif + +else +# build cross compiler + CROSS_BUILD_DEP := libc6-dev$(cross_lib_arch), +ifeq ($(REVERSE_CROSS),yes) + CROSS_BUILD_DEP += zlib1g-dev$(cross_lib_arch), libmpfr-dev$(cross_lib_arch), +endif + SOURCE_BUILD_DEP := + ifeq (,$(findstring gcc,$(PKGSOURCE))) + SOURCE_BUILD_DEP := gcc-$(BASE_VERSION)-source (>= $(GCC_SOURCE_VERSION)), gcc-$(BASE_VERSION)-source (<< $(NEXT_GCC_SOURCE_VERSION)), + endif + ifeq ($(with_java),yes) + JAVA_BUILD_DEP := zlib1g-dev, lib64z1-dev [i386 powerpc sparc s390], lib32z1-dev [amd64 ppc64 kfreebsd-amd64 s390x], + endif + JAVA_BUILD_INDEP := + GNAT_BUILD_DEP := + ifeq (,$(findstring spu,$(DEB_TARGET_GNU_CPU))) + SPU_BUILD_DEP := + endif +endif # cross compiler + +# The numeric part of the gcc version number (x.yy.zz) +NEXT_GCC_VERSION := $(shell echo $(GCC_VERSION) | \ + awk -F. '{OFS="."; if (NF==2) $$3=1; else $$NF += 1; print}') +# first version with a new path component in gcc_lib_dir (i.e. GCC_VERSION +# or TARGET_ALIAS changes), or last version available for all architectures +DEB_GCC_SOFT_VERSION := 4.7.2 +DEB_GCJ_SOFT_VERSION := 4.7.2 + +ifeq ($(with_d),yes) + DEB_GDC_VERSION := $(GDC_BASE_VERSION)-$(DEB_VERSION) +endif + +# semiautomatic ... +DEB_SOVERSION := $(DEB_VERSION) +DEB_SOVERSION := 4.7 +DEB_SOEVERSION := $(EPOCH):4.7 +DEB_STDCXX_SOVERSION := 4.7 +DEB_GCJ_SOVERSION := 4.7 +DEB_GOMP_SOVERSION := $(DEB_SOVERSION) +DEB_GCCMATH_SOVERSION := $(DEB_SOVERSION) +DEB_GCC_SPLIT_VERSION := 4.7.2-4ubuntu3 + +DEB_GCC_VERSION := $(DEB_VERSION) +DEB_GCJ_VERSION := $(DEB_VERSION) +ifeq ($(with_separate_libgcj),yes) + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + DEB_GCC_VERSION := $(DEB_GCC_SOFT_VERSION) + endif +endif + +DEB_GNAT_VERSION := $(DEB_VERSION) +ifeq ($(with_separate_gnat),yes) + ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + DEB_GCC_VERSION := $(DEB_GCC_SOFT_VERSION) + endif +endif + +# manual ... +ifeq ($(DEB_TARGET_GNU_CPU), $(findstring $(DEB_TARGET_GNU_CPU),hppa m68k)) + ifeq ($(DEB_TARGET_ARCH),m68k) + GCC_SONAME := 2 + endif + ifeq ($(DEB_TARGET_ARCH),hppa) + GCC_SONAME := 4 + endif + DEB_LIBGCC_SOVERSION := $(DEB_SOVERSION) + DEB_LIBGCC_VERSION := $(DEB_VERSION) +else + GCC_SONAME := 1 + DEB_LIBGCC_SOVERSION := $(DEB_SOEVERSION) + DEB_LIBGCC_VERSION := $(DEB_EVERSION) +endif + +ifeq ($(with_shared_libgcc),yes) +LIBGCC_DEP := libgcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) +LIBGCC_BIARCH_DEV_DEP := +LIBGCC_BIARCH_DEP := +ifeq ($(biarch64),yes) + LIBGCC_BIARCH_DEP := lib64gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) + LIBGCC_BIARCH_DEV_DEP := lib64gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) +endif +ifeq ($(biarch32),yes) + ifeq ($(biarch64),yes) + LIBGCC_BIARCH_DEP := lib64gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)), lib32gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) + LIBGCC_BIARCH_DEV_DEP := lib64gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}), lib32gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + else + LIBGCC_BIARCH_DEP := lib32gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) + LIBGCC_BIARCH_DEV_DEP := lib32gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + endif +endif +ifeq ($(biarchn32),yes) + ifeq ($(biarch64),yes) + LIBGCC_BIARCH_DEP := lib64gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)), libn32gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) + LIBGCC_BIARCH_DEV_DEP := lib64gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}), libn32gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + else + LIBGCC_BIARCH_DEP := libn32gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) + LIBGCC_BIARCH_DEV_DEP := libn32gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + endif +endif +ifeq ($(biarchx32),yes) + ifeq ($(biarch64),yes) + LIBGCC_BIARCH_DEP := lib64gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)), libx32gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) + LIBGCC_BIARCH_DEV_DEP := lib64gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}), libx32gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + else ifeq ($(biarch32),yes) + LIBGCC_BIARCH_DEP := lib32gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)), libx32gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) + LIBGCC_BIARCH_DEV_DEP := lib32gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}), libx32gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + else + LIBGCC_BIARCH_DEP := libx32gcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) + LIBGCC_BIARCH_DEV_DEP := libx32gcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + endif +endif +ifeq ($(biarchhf),yes) + LIBGCC_BIARCH_DEP := libhfgcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) | libgcc1-armhf + LIBGCC_BIARCH_DEV_DEP := libhfgcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) +endif +ifeq ($(biarchsf),yes) + LIBGCC_BIARCH_DEP := libsfgcc$(GCC_SONAME)$(LS) (>= $(DEB_LIBGCC_VERSION)) | libgcc1-armel + LIBGCC_BIARCH_DEV_DEP := libsfgcc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) +endif +endif # $(with_shared_libgcc) + +LIBOBJC_BIARCH_DEV_DEP := +LIBGFORTRAN_BIARCH_DEV_DEP := +ifeq ($(biarch64),yes) + LIBOBJC_BIARCH_DEV_DEP := lib64objc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + LIBGFORTRAN_BIARCH_DEV_DEP := lib64gfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}) +endif +ifeq ($(biarch32),yes) + LIBOBJC_BIARCH_DEV_DEP := lib32objc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + LIBGFORTRAN_BIARCH_DEV_DEP := lib32gfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}) +endif +ifeq ($(biarchn32),yes) + ifeq ($(biarch64),yes) + LIBOBJC_BIARCH_DEV_DEP := lib64objc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}), libn32objc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + LIBGFORTRAN_BIARCH_DEV_DEP := lib64gfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}), libn32gfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}) + else + LIBOBJC_BIARCH_DEV_DEP := libn32objc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + LIBGFORTRAN_BIARCH_DEV_DEP := libn32gfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}) + endif +endif +ifeq ($(biarchx32),yes) + ifeq ($(biarch64),yes) + LIBOBJC_BIARCH_DEV_DEP := lib64objc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}), libx32objc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + LIBGFORTRAN_BIARCH_DEV_DEP := lib64gfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}), libx32gfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}) + else + LIBOBJC_BIARCH_DEV_DEP := libx32objc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + LIBGFORTRAN_BIARCH_DEV_DEP := libx32gfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}) + endif +endif +ifeq ($(biarchhf),yes) + LIBOBJC_BIARCH_DEV_DEP := libhfobjc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + LIBGFORTRAN_BIARCH_DEV_DEP := libhfgfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}) +endif +ifeq ($(biarchsf),yes) + LIBOBJC_BIARCH_DEV_DEP := libsfobjc-$(BASE_VERSION)-dev$(LS) (= $${gcc:Version}) + LIBGFORTRAN_BIARCH_DEV_DEP := libsfgfortran-$(BASE_VERSION)-dev$(LS) (>= $${gcc:Version}) +endif + + +GNAT_VERSION := $(BASE_VERSION) + +LIBGNAT_DEP := +ifeq ($(with_libgnat),yes) + LIBGNAT_DEP := libgnat-$(GNAT_VERSION) (= $(DEB_VERSION)) +endif + +pkg_ver := -$(BASE_VERSION) + +PKG_GCJ_EXT = $(GCJ_SONAME1) +PKG_LIBGCJ_EXT = $(GCJ_SONAME1)$(if $(GCJ_SONAME2),-$(GCJ_SONAME2)) + +ctrl_flags = \ + -DBINUTILSV=$(BINUTILSV) \ + -DSRCNAME=$(PKGSOURCE) \ + -D__$(DEB_TARGET_GNU_CPU)__ \ + -DARCH=$(DEB_TARGET_ARCH) \ + -DDIST=$(distribution) + +ctrl_flags += \ + -DLIBC_DEV_DEP="$(LIBC_DEV_DEP)" \ + -DLIBC_BIARCH_BUILD_DEP="$(LIBC_BIARCH_BUILD_DEP)" \ + -DFORTRAN_BUILD_DEP="$(FORTRAN_BUILD_DEP)" \ + -DGNAT_BUILD_DEP="$(GNAT_BUILD_DEP)" \ + -DJAVA_BUILD_DEP="$(JAVA_BUILD_DEP)" \ + -DGO_BUILD_DEP="$(GO_BUILD_DEP)" \ + -DJAVA_BUILD_INDEP="$(JAVA_BUILD_INDEP)" \ + -DLIBSTDCXX_BUILD_INDEP="$(LIBSTDCXX_BUILD_INDEP)" \ + -DGDC_BUILD_DEP="$(GDC_BUILD_DEP)" \ + -DSPU_BUILD_DEP="$(SPU_BUILD_DEP)" \ + -DBINUTILS_BUILD_DEP="$(BINUTILS_BUILD_DEP)" \ + -DLIBC_BUILD_DEP="$(LIBC_BUILD_DEP)" \ + -DCHECK_BUILD_DEP="$(CHECK_BUILD_DEP)" \ + -DAUTO_BUILD_DEP="$(AUTO_BUILD_DEP)" \ + -DAUTOGEN_BUILD_DEP="$(AUTOGEN_BUILD_DEP)" \ + -DCLOOG_BUILD_DEP="$(CLOOG_BUILD_DEP)" \ + -DGMP_BUILD_DEP="$(GMP_BUILD_DEP)" \ + -DMPFR_BUILD_DEP="$(MPFR_BUILD_DEP)" \ + -DMPC_BUILD_DEP="$(MPC_BUILD_DEP)" \ + -DELF_BUILD_DEP="$(ELF_BUILD_DEP)" \ + -DDPKG_BUILD_DEP="$(DPKG_BUILD_DEP)" \ + -DSOURCE_BUILD_DEP="$(SOURCE_BUILD_DEP)" \ + -DCROSS_BUILD_DEP="$(CROSS_BUILD_DEP)" \ + -DGCC_MULTILIB_BUILD_DEP='$(GCC_MULTILIB_BUILD_DEP)' \ + -DMULTILIB_ARCHS="$(multilib_archs)" \ + -DNEON_ARCHS="$(neon_archs)" \ + -DTP=$(TP) \ + -DTS=$(TS) \ + -DLS=$(LS) + +ifeq ($(DEB_CROSS),yes) + ctrl_flags += \ + -DTARGET=$(DEB_TARGET_ARCH) \ + -DLIBUNWIND_BUILD_DEP="$(LIBUNWIND_BUILD_DEP)" \ + -DLIBATOMIC_OPS_BUILD_DEP="$(LIBATOMIC_OPS_BUILD_DEP)" +else + # add '-DPRI=optional' to ctrl_flags if this is not the default compiler + # ctrl_flags += \ + # -DPRI=optional +endif + +ifeq ($(with_base_only),yes) + ctrl_flags += \ + -DBASE_ONLY=yes +endif + +ifeq ($(with_multiarch_lib),yes) + ctrl_flags += \ + -DMULTIARCH=yes +endif + +control: control-file readme-bugs-file parameters-file copyright-file substvars-file versioned-files + +# stage1 and stage2 compilers are only C +ifdef DEB_STAGE + languages = c + addons = cdev plugindev + ifeq ($(DEB_STAGE),stage2) + addons += libgcc gccxbase + endif +else +languages = c c++ fortran objc objpp +ifeq ($(with_gccbase),yes) + addons += gccbase +endif +ifeq ($(with_gccxbase),yes) + addons += gccxbase +endif +addons += cdev c++dev fdev objcdev source objppdev multilib +addons += plugindev +ifeq ($(with_libgcc),yes) + addons += libgcc lib4gcc lib32gcc lib64gcc libn32gcc + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gcc) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgcc) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgcc) +endif +ifeq ($(with_libcxx),yes) + addons += libcxx lib32cxx lib64cxx libn32cxx + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32cxx) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfcxx) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfcxx) +endif +addons += $(if $(findstring armel,$(biarchhfarchs)),libhfdbgcxx) +addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfdbgcxx) +ifeq ($(with_mudflap),yes) + addons += mudflap + ifeq ($(with_libmudflap),yes) + addons += libmudf + endif + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32mudflap) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfmudflap) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfmudflap) +endif +ifeq ($(with_libgfortran),yes) + addons += libgfortran lib32gfortran lib64gfortran libn32gfortran + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gfortran) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgfortran) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgfortran) +endif +ifeq ($(with_libobjc),yes) + addons += libobjc lib32objc lib64objc libn32objc + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32objc) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfobjc) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfobjc) +endif +ifeq ($(with_libgomp),yes) + addons += libgomp lib32gomp lib64gomp libn32gomp + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gomp) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgomp) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgomp) +endif +ifeq ($(with_libitm),yes) + addons += libitm lib32itm lib64itm libn32itm + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32itm) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfitm) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfitm) +endif +ifeq ($(with_libqmath),yes) + addons += libqmath lib32qmath lib64qmath libn32qmath + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32qmath) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfqmath) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfqmath) +endif +ifeq ($(with_go),yes) + addons += ggo godev + ifeq ($(with_libgo),yes) + addons += libggo + endif +endif + +ifneq ($(DEB_CROSS),yes) + + languages += ada java + addons += libgcj libgcjdev gcjdoc libgnat libs source # libgmath libnof lib64gnat ssp + + ifneq (,$(neon_archs)) + addons += libneongcc libneongomp libneonitm libneonobjc libneongfortran libneoncxx + endif + ifeq ($(with_fixincl),yes) + addons += fixincl + endif + ifeq ($(with_libgcj_doc),yes) + addons += gcjdoc + endif +# ifneq (,$(findstring gtk, $(java_awt_peers))) +# addons += gtkpeer +# endif +# ifneq (,$(findstring qt, $(java_awt_peers))) +# addons += qtpeer +# endif + ifeq ($(with_separate_libgcj),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + languages := $(filter-out java,$(languages)) + addons := $(filter-out gcj libgcj libgcjdev gcjdoc gtkpeer qtpeer,$(addons)) + endif + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + languages = java + addons = gcj libgcj libgcjdev + ifeq ($(with_libgcj_doc),yes) + addons += gcjdoc + endif +# ifneq (,$(findstring gtk, $(java_awt_peers))) +# addons += gtkpeer +# endif +# ifneq (,$(findstring qt, $(java_awt_peers))) +# addons += qtpeer +# endif + ifeq ($(with_standalone_gcj),yes) + addons += libgcc lib4gcc lib64gcc lib32gcc libn32gcc libx32gcc + endif + endif + endif + ifeq ($(with_standalone_gcj),yes) + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + ctrl_flags += -DSTANDALONEJAVA + endif + endif + ifeq ($(with_separate_libgo),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + languages := $(filter-out go,$(languages)) + addons := $(filter-out ggo godev libggo lib64go lib32go libn32go libx32go,$(addons)) + endif + ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION)) + languages = go + addons = ggo godev libggo lib64go lib32go libn32go libx32go gccbase multilib + # FIXME: use the convenience libgcc ... + #ifeq ($(with_standalone_go),yes) + # addons += libgcc lib4gcc lib64gcc lib32gcc libn32gcc libx32gcc + #endif + endif + endif + ifeq ($(with_standalone_go),yes) + ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION)) + ctrl_flags += -DSTANDALONEGO + endif + endif + ifeq ($(with_separate_gnat),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + languages := $(filter-out ada,$(languages)) + addons := $(filter-out libgnat,$(addons)) + endif + ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + languages = ada + addons = libgnat + endif + endif + ifeq ($(with_separate_gdc),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + languages := $(filter-out d,$(languages)) + endif + ifeq ($(PKGSOURCE),gdc-$(BASE_VERSION)) + languages = d + addons = + ifeq ($(with_libphobos),yes) + addons += libphobos + endif + endif + endif + ifneq ($(GFDL_INVARIANT_FREE),yes) + addons += gfdldoc + endif +endif +endif # not stage + +control-file: + echo "addons: $(addons)"; \ + m4 $(ctrl_flags) \ + -DPV=$(pkg_ver) \ + -DCXX_SO=$(CXX_SONAME) \ + -DGCC_SO=$(GCC_SONAME) \ + -DOBJC_SO=$(OBJC_SONAME) \ + -DFORTRAN_SO=$(FORTRAN_SONAME) \ + -DGCJ_SO=$(PKG_GCJ_EXT) \ + -DLIBGCJ_EXT=$(PKG_LIBGCJ_EXT) \ + -DGNAT_SO=$(GNAT_SONAME) \ + -DGNAT_V=$(GNAT_VERSION) \ + -DPHOBOS_V=$(libphobos_version) \ + -DGOMP_SO=$(GOMP_SONAME) \ + -DGCCMATH_SO=$(GCCMATH_SONAME) \ + -DITM_SO=$(ITM_SONAME) \ + -DMF_SO=$(MUDFLAP_SONAME) \ + -DQMATH_SO=$(QUADMATH_SONAME) \ + -DSSP_SO=$(SSP_SONAME) \ + -DGO_SO=$(GO_SONAME) \ + -Denabled_languages="$(languages) $(addons)" \ + -Dada_no_archs="$(ada_no_archs)" \ + -Djava_no_archs="$(java_no_archs)" \ + -Dfortran_no_archs="$(fortran_no_archs)" \ + -Dlibgc_no_archs="$(libgc_no_archs)" \ + -Dlibphobos_no_archs="$(libphobos_no_archs)" \ + -Dcheck_no_archs="$(check_no_archs)" \ + -Dlocale_no_archs="$(locale_no_archs)" \ + -Dlinux_gnu_archs="$(linux_gnu_archs)" \ + -Dbiarch32_archs="$(strip $(subst /, ,$(biarch32archs)))" \ + -Dbiarch64_archs="$(strip $(subst /, ,$(biarch64archs)))" \ + -Dbiarchn32_archs="$(strip $(subst /, ,$(biarchn32archs)))" \ + -Dbiarchx32_archs="$(strip $(subst /, ,$(biarchx32archs)))" \ + -Dbiarchhf_archs="$(strip $(subst /, ,$(biarchhfarchs)))" \ + -Dbiarchsf_archs="$(strip $(subst /, ,$(biarchsfarchs)))" \ + debian/control.m4 > debian/control.tmp2 + uniq debian/control.tmp2 | sed '/^Build/s/ *, */, /g' \ + > debian/control.tmp + rm -f debian/control.tmp2 + [ -e debian/control ] \ + && cmp -s debian/control debian/control.tmp \ + && rm -f debian/control.tmp && exit 0; \ + mv debian/control.tmp debian/control; touch $(control_stamp) + +readme-bugs-file: + m4 -DDIST=$(distribution) -DSRCNAME=$(PKGSOURCE) \ + debian/README.Bugs.m4 > debian/README.Bugs + +copyright-file: + rm -f debian/copyright + if echo $(SOURCE_VERSION) | grep -E ^'[0-9]\.[0-9]-[0-9]{8}' ; \ + then SVN_BRANCH="trunk" ; \ + else \ + SVN_BRANCH="gcc-$(subst .,_,$(BASE_VERSION))-branch" ; \ + fi ; \ + sed debian/copyright.in \ + -e "s/@BV@/$(BASE_VERSION)/g" \ + -e "s/@SVN_BRANCH@/$$SVN_BRANCH/g" \ + > debian/copyright + +substvars-file: + rm -f debian/substvars.local.tmp + ( \ + echo 'gcc:Version=$(DEB_GCC_VERSION)'; \ + echo 'gcc:EpochVersion=$(DEB_EVERSION)'; \ + echo 'gcc:SoftVersion=$(DEB_GCC_SOFT_VERSION)'; \ + echo 'gcc:SplitVersion=$(DEB_GCC_SPLIT_VERSION)'; \ + echo 'gdc:Version=$(DEB_GDC_VERSION)'; \ + echo 'gcj:Version=$(DEB_GCJ_VERSION)'; \ + echo 'gcj:SoftVersion=$(DEB_GCJ_SOFT_VERSION)'; \ + echo 'gcj:BaseVersion=$(BASE_VERSION)'; \ + echo 'gnat:Version=$(DEB_GNAT_VERSION)'; \ + echo 'binutils:Version=$(BINUTILSV)'; \ + echo 'dep:libgcc=$(LIBGCC_DEP)'; \ + echo 'dep:libgccbiarch=$(LIBGCC_BIARCH_DEP)'; \ + echo 'dep:libgccbiarchdev=$(LIBGCC_BIARCH_DEV_DEP)'; \ + echo 'dep:libc=$(LIBC_DEP) (>= $(libc_ver))'; \ + echo 'dep:libcdev=$(LIBC_DEV_DEP)'; \ + echo 'dep:libcbiarch=$(LIBC_BIARCH_DEP)'; \ + echo 'dep:libcbiarchdev=$(LIBC_BIARCH_DEV_DEP)'; \ + echo 'dep:libunwinddev=$(LIBUNWIND_DEV_DEP)'; \ + echo 'dep:libcxxbiarch=$(LIBCXX_BIARCH_DEP)'; \ + echo 'dep:libcxxbiarchdbg=$(LIBCXX_BIARCH_DBG_DEP)'; \ + echo 'dep:libgobiarch=$(LIBGO_BIARCH_DEP)'; \ + echo 'dep:libgobiarchdbg=$(LIBGO_BIARCH_DBG_DEP)'; \ + echo 'dep:libgnat=$(LIBGNAT_DEP)'; \ + echo 'dep:ecj=$(ECJ_DEP)'; \ + echo 'dep:libcloog=$(CLOOG_RUNTIME_DEP)'; \ + ) > debian/substvars.local.tmp +ifneq (,$(filter $(DEB_TARGET_ARCH), $(multilib_archs))) + ( \ + echo 'gcc:multilib=gcc-$(BASE_VERSION)-multilib$(TS)'; \ + echo 'gxx:multilib=g++-$(BASE_VERSION)-multilib$(TS)'; \ + echo 'gobjc:multilib=gobjc-$(BASE_VERSION)-multilib$(TS)'; \ + echo 'gobjcxx:multilib=gobjc++-$(BASE_VERSION)-multilib$(TS)'; \ + echo 'gfortran:multilib=gfortran-$(BASE_VERSION)-multilib$(TS)'; \ + ) >> debian/substvars.local.tmp +endif +ifeq ($(with_gold),yes) + echo 'dep:gold=binutils-gold (>= $(BINUTILSV))' \ + >> debian/substvars.local.tmp +endif +ifeq ($(with_libssp),yes) + echo 'dep:libssp=libssp$(SSP_SONAME) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif +ifeq ($(with_gomp),yes) + echo 'dep:libgomp=libgomp$(GOMP_SONAME)$(LS) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif +ifeq ($(with_itm),yes) + echo 'dep:libitm=libitm$(ITM_SONAME)$(LS) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif +ifeq ($(with_qmath),yes) + echo 'dep:libqmath=libquadmath$(QUADMATH_SONAME)$(LS) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif +ifeq ($(multilib),yes) + echo 'dep:libgfortranbiarchdev=$(LIBGFORTRAN_BIARCH_DEV_DEP)' \ + >> debian/substvars.local.tmp + echo 'dep:libobjcbiarchdev=$(LIBOBJC_BIARCH_DEV_DEP)' \ + >> debian/substvars.local.tmp + ifeq ($(with_mudflap),yes) + echo 'dep:libmudflapbiarch=$(libmudflapbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_libssp),yes) + echo 'dep:libsspbiarch=$(libsspbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_gomp),yes) + echo 'dep:libgompbiarch=$(libgompbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_itm),yes) + echo 'dep:libitmbiarch=$(libitmbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_qmath),yes) + echo 'dep:libqmathbiarch=$(libquadmathbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_go),yes) + echo 'dep:libgobiarch=$(libgobiarch)' \ + >> debian/substvars.local.tmp + endif +endif +ifneq ($(with_standalone_gcj),yes) + ifneq (,$(filter $(DEB_HOST_ARCH),armel armhf)) + echo 'dep:gcj=g++$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \ + >> debian/substvars.local.tmp + else + echo 'dep:gcj=gcc$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \ + >> debian/substvars.local.tmp + endif +endif +#ifneq (,$(findstring gtk, $(java_awt_peers))) +# echo 'pkg:gcjgtk=libgcj$(subst 0,,$(GCJ_SONAME))-awt-gtk (>= $(DEB_GCJ_VERSION))' \ +# >> debian/substvars.local.tmp +#endif +#ifneq (,$(findstring qt, $(java_awt_peers))) +# echo 'pkg:gcjqt=libgcj$(subst 0,,$(GCJ_SONAME))-awt-qt (>= $(DEB_GCJ_VERSION))' \ +# >> debian/substvars.local.tmp +#endif +ifeq ($(DEB_HOST_ARCH),hppa) + echo 'dep:prctl=prctl' >> debian/substvars.local.tmp +endif +ifneq (,$(filter $(DEB_TARGET_ARCH), powerpc ppc64)) + echo 'base:Replaces=gcc-$(BASE_VERSION)-spu (<< 4.4.0-1)' >> debian/substvars.local.tmp +endif +ifeq ($(distribution)-$(DEB_HOST_ARCH),Debian-amd64) + echo 'confl:lib32=libc6-i386 (<< 2.9-22)' >> debian/substvars.local.tmp +endif +ifeq ($(with_multiarch_lib),yes) + echo 'multiarch:breaks=gcc-4.1, gcc-4.3 (<< 4.3.6-1), gcc-4.4 (<< 4.4.6-4), gcc-4.5 (<< 4.5.3-2)' >> debian/substvars.local.tmp +endif + [ -e debian/substvars.local ] \ + && cmp -s debian/substvars.local debian/substvars.local.tmp \ + && rm -f debian/substvars.local.tmp && exit 0; \ + mv debian/substvars.local.tmp debian/substvars.local; \ + touch $(control_stamp) + +parameters-file: + rm -f debian/rules.parameters.tmp + ( \ + echo '# configuration parameters taken from upstream source files'; \ + echo 'GCC_VERSION := $(GCC_VERSION)'; \ + echo 'NEXT_GCC_VERSION := $(NEXT_GCC_VERSION)'; \ + echo 'BASE_VERSION := $(BASE_VERSION)'; \ + echo 'SOURCE_VERSION := $(SOURCE_VERSION)'; \ + echo 'DEB_VERSION := $(DEB_VERSION)'; \ + echo 'DEB_EVERSION := $(DEB_EVERSION)'; \ + echo 'GDC_BASE_VERSION := $(GDC_BASE_VERSION)'; \ + echo 'DEB_GDC_VERSION := $(DEB_GDC_VERSION)'; \ + echo 'DEB_SOVERSION := $(DEB_SOVERSION)'; \ + echo 'DEB_SOEVERSION := $(DEB_SOEVERSION)'; \ + echo 'DEB_LIBGCC_SOVERSION := $(DEB_LIBGCC_SOVERSION)'; \ + echo 'DEB_LIBGCC_VERSION := $(DEB_LIBGCC_VERSION)'; \ + echo 'DEB_STDCXX_SOVERSION := $(DEB_STDCXX_SOVERSION)'; \ + echo 'DEB_GCJ_SOVERSION := $(DEB_GCJ_SOVERSION)'; \ + echo 'PKG_GCJ_EXT := $(PKG_GCJ_EXT)'; \ + echo 'PKG_LIBGCJ_EXT := $(PKG_LIBGCJ_EXT)'; \ + echo 'DEB_GOMP_SOVERSION := $(DEB_GOMP_SOVERSION)'; \ + echo 'DEB_GCCMATH_SOVERSION := $(DEB_GCCMATH_SOVERSION)'; \ + echo 'GCC_SONAME := $(GCC_SONAME)'; \ + echo 'CXX_SONAME := $(CXX_SONAME)'; \ + echo 'FORTRAN_SONAME := $(FORTRAN_SONAME)'; \ + echo 'OBJC_SONAME := $(OBJC_SONAME)'; \ + echo 'GCJ_SONAME := $(GCJ_SONAME)'; \ + echo 'GNAT_VERSION := $(GNAT_VERSION)'; \ + echo 'GNAT_SONAME := $(GNAT_SONAME)'; \ + echo 'FFI_SONAME := $(FFI_SONAME)'; \ + echo 'MUDFLAP_SONAME := $(MUDFLAP_SONAME)'; \ + echo 'SSP_SONAME := $(SSP_SONAME)'; \ + echo 'GOMP_SONAME := $(GOMP_SONAME)'; \ + echo 'ITM_SONAME := $(ITM_SONAME)'; \ + echo 'QMATH_SONAME := $(QUADMATH_SONAME)'; \ + echo 'GCCMATH_SONAME := $(GCCMATH_SONAME)'; \ + echo 'GO_SONAME := $(GO_SONAME)'; \ + echo 'LIBC_DEP := $(LIBC_DEP)'; \ + ) > debian/rules.parameters.tmp + [ -e debian/rules.parameters ] \ + && cmp -s debian/rules.parameters debian/rules.parameters.tmp \ + && rm -f debian/rules.parameters.tmp && exit 0; \ + mv debian/rules.parameters.tmp debian/rules.parameters; \ + touch $(control_stamp) + +versioned-files: + fs=`echo debian/*BV* debian/*GCJ* debian/*CXX* debian/*LC* debian/*MF* | sort -u`; \ + for f in $$fs debian/source.lintian-overrides.in; do \ + [ -f $$f ] || echo "CANNOT FIND $$f"; \ + [ -f $$f ] || continue; \ + if [ -z "$(DEB_CROSS)" ]; then case "$$f" in *-CR*) continue; esac; fi; \ + f2=$$(echo $$f \ + | sed 's/BV/$(BASE_VERSION)/;s/CXX/$(CXX_SONAME)/;s/LGCJ/$(PKG_LIBGCJ_EXT)/;s/GCJ/$(PKG_GCJ_EXT)/;s/LC/$(GCC_SONAME)/;s/MF/$(MUDFLAP_SONAME)/;s/-CRB/$(cross_bin_arch)/;s/\.in$$//'); \ + sed -e 's/@BV@/$(BASE_VERSION)/g' \ + -e 's/@CXX@/$(CXX_SONAME)/g' \ + -e 's/@LGCJ@/$(PKG_LIBGCJ_EXT)/g' \ + -e 's/@GCJ@/$(PKG_GCJ_EXT)/g' \ + -e 's/@GCJSO@/$(GCJ_SONAME)/g' \ + -e 's/@LC@/$(GCC_SONAME)/g' \ + -e 's/@MF@/$(MUDFLAP_SONAME)/g' \ + -e 's/@SRC@/$(PKGSOURCE)/g' \ + -e 's/@GFDL@/$(if $(filter yes,$(GFDL_INVARIANT_FREE)),#)/g' \ + -e 's/@java_priority@/$(java_priority)/g' \ + -e 's/@gcc_priority@/$(subst .,,$(BASE_VERSION))/g' \ + -e 's/@TARGET@/$(DEB_TARGET_GNU_TYPE)/g' \ + $$f > $$f2; \ + touch -r $$f $$f2; \ + done + for t in ar nm ranlib; do \ + sed "s/@BV@/$(BASE_VERSION)/g;s/@TOOL@/$$t/g" \ + debian/gcc-XX-BV.1 > debian/gcc-$$t-$(BASE_VERSION).1; \ + done --- gcc-4.7-4.7.2.orig/debian/libitm1.symbols.64bit +++ gcc-4.7-4.7.2/debian/libitm1.symbols.64bit @@ -0,0 +1,4 @@ + _ZGTtnam@LIBITM_1.0 4.7 + _ZGTtnamRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtnwm@LIBITM_1.0 4.7 + _ZGTtnwmRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.7-4.7.2.orig/debian/lib32gcc1.symbols.s390x +++ gcc-4.7-4.7.2/debian/lib32gcc1.symbols.s390x @@ -0,0 +1,104 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/gcj-BV-jdk.overrides +++ gcc-4.7-4.7.2/debian/gcj-BV-jdk.overrides @@ -0,0 +1 @@ +gcj-@BV@-jdk binary: wrong-name-for-upstream-changelog --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.s390x +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.s390x @@ -0,0 +1,12 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.2.orig/debian/NEWS.html +++ gcc-4.7-4.7.2/debian/NEWS.html @@ -0,0 +1,1075 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + +GCC 4.7 Release Series — Changes, New Features, and Fixes +- GNU Project - Free Software Foundation (FSF) + + + + + + + + + +

GCC 4.7 Release Series
Changes, New Features, and Fixes

+ + +

Caveats

+ +
    +
  • The -fconserve-space flag has been + deprecated. The flag had no effect for most targets: only + targets without a global .bss section and without + support for switchable sections. Furthermore, the flag only + had an effect for G++, where it could result in wrong semantics + (please refer to the GCC manual for further details). + The flag will be removed in GCC 4.8

  • + +
  • Support for a number of older systems and recently + unmaintained or untested target ports of GCC has been declared + obsolete in GCC 4.7. Unless there is activity to revive them, the + next release of GCC will have their sources permanently + removed.

    + +

    All GCC ports for the following processor + architectures have been declared obsolete:

    + +
      +
    • picoChip (picochip-*)
    • +
    + +

    The following ports for individual systems on + particular architectures have been obsoleted:

    + +
      +
    • IRIX 6.5 (mips-sgi-irix6.5)
    • +
    • MIPS OpenBSD (mips*-*-openbsd*)
    • +
    • Solaris 8 (*-*-solaris2.8). Details can be found in the + + announcement.
    • +
    • Tru64 UNIX V5.1 (alpha*-dec-osf5.1*)
    • +
    + +
  • + +
  • On ARM, when compiling for ARMv6 (but not ARMv6-M), ARMv7-A, + ARMv7-R, or ARMv7-M, the new option + -munaligned-access is active by default, which for + some source codes generates code that accesses memory on unaligned + addresses. This will require the kernel of those systems to enable + such accesses (controlled by CP15 register c1, refer + to ARM documentation). Alternatively or for compatibility with + kernels where unaligned accesses are not supported, all code has + to be compiled with -mno-unaligned-access. + Linux/ARM in official releases has automatically and + unconditionally supported unaligned accesses as emitted by GCC due + to this option being active, since Linux version 2.6.28.
  • + +
  • Support on ARM for the legacy floating-point accelerator (FPA) and + the mixed-endian floating-point format that it used has been obsoleted. + The ports that still use this format have been obsoleted as well. + Many legacy ARM ports already provide an alternative that uses the + VFP floating-point format. The obsolete ports will be deleted in the + next release. + +

    The obsolete ports with alternatives are:

    + +
      +
    • arm*-*-rtems (use arm*-*-rtemseabi)
    • +
    • arm*-*-linux-gnu (use arm*-*-linux-gnueabi)
    • +
    • arm*-*-elf (use arm*-*-eabi)
    • +
    • arm*-*-uclinux* (use arm*-*-uclinux*eabi)
    • +
    +

    Note, however, that these alternatives are not binary compatible + with their legacy counterparts (although some can support running legacy + applications).

    +

    The obsolete ports that currently lack a modern alternative are:

    + +
      +
    • arm*-*-ecos-elf
    • +
    • arm*-*-freebsd
    • +
    • arm*-wince-pe*
    • +
    + + New ports that support more recent versions of the architecture + are welcome.
  • +
  • Support for the Maverick co-processor on ARM has been obsoleted. + Code to support it will be deleted in the next release.
  • +
  • Support has been removed for Unix International threads on Solaris + 2, so the --enable-threads=solaris configure option and + the -threads compiler option don't work any longer.
  • +
  • Support has been removed for the Solaris BSD Compatibility Package, + which lives in /usr/ucbinclude and + /usr/ucblib. It has been removed from Solaris 11, and was + only intended as a migration aid from SunOS 4 to SunOS 5. The + -compat-bsd compiler option is not recognized any + longer.
  • + +
  • The AVR port's libgcc has been improved and its multilib structure + has been enhanced. As a result, all objects contributing to an + application must either be compiled with GCC versions up to 4.6.x or + with GCC versions 4.7.0 or later.
  • + +
  • The ARM port's -mwords-little-endian option has + been deprecated. It will be removed in a future release.
  • + +
  • Support has been removed for the NetWare x86 configuration + obsoleted in GCC 4.6.
  • + +
  • It is no longer possible to use the "l" + constraint in MIPS16 asm statements.
  • + +
  • GCC versions 4.7.0 and 4.7.1 had changes to the C++ standard library + which affected the ABI in C++11 mode: a data member was added to + std::list changing its size and altering the definitions of + some member functions, and std::pair's move constructor was + non-trivial which altered the calling convention for functions with + std::pair arguments or return types. The ABI incompatibilities + have been fixed for GCC version 4.7.2 but as a result C++11 code compiled + with GCC 4.7.0 or 4.7.1 may be incompatible with C++11 code compiled with + different GCC versions and with C++98/C++03 code compiled with any version. +
  • + +
  • On ARM, a bug has been fixed in GCC's implementation of the AAPCS + rules for the layout of vectors that could lead to wrong code being + generated. Vectors larger than 8 bytes in size are now by default + aligned to an 8-byte boundary. This is an ABI change: code that makes + explicit use of vector types may be incompatible with binary objects + built with older versions of GCC. Auto-vectorized code is not affected + by this change. (This change affects GCC versions 4.7.2 and later.)
  • + +
  • More information on porting to GCC 4.7 from previous versions + of GCC can be found in + the porting + guide for this release.
  • +
+ + +

General Optimizer Improvements

+ +
    +
  • Support for a new parameter --param case-values-threshold=n + was added to allow users to control the cutoff between doing switch statements + as a series of if statements and using a jump table. +
  • + +
  • Link-time optimization (LTO) improvements: +
      +
    • Improved scalability and reduced memory usage. Link time + optimization of Firefox now requires 3GB of RAM on a 64-bit system, + while over 8GB was needed previously. Linking time has been improved, + too. The serial stage of linking Firefox has been sped up by about a + factor of 10.
    • +
    • Reduced size of object files and temporary storage used during linking.
    • +
    • Streaming performance (both outbound and inbound) has been improved.
    • +
    • ld -r is now supported with LTO.
    • +
    • Several bug fixes, especially in symbol table handling and merging.
    • +
  • + +
  • Interprocedural optimization improvements: +
      +
    • Heuristics now take into account that after inlining code will + be optimized out because of known values (or properties) of function + parameters. + For example: +
      +void foo(int a)
      +{
      +  if (a > 10)
      +    ... huge code ...
      +}
      +void bar (void)
      +{
      +  foo (0);
      +}
      +      
      + The call of foo will be inlined into bar even when + optimizing for code size. Constructs based on __builtin_constant_p + are now understood by the inliner and code size estimates are evaluated a lot + more realistically.
    • +
    • The representation of C++ virtual thunks and aliases (both implicit and defined + via the alias attribute) has been re-engineered. Aliases no + longer pose optimization barriers and calls to an alias can be inlined + and otherwise optimized.
    • +
    • The inter-procedural constant propagation pass has been rewritten. + It now performs generic function specialization. For example when + compiling the following: +
      +void foo(bool flag)
      +{
      +  if (flag)
      +    ... do something ...
      +  else
      +    ... do something else ...
      +}
      +void bar (void)
      +{
      +  foo (false);
      +  foo (true);
      +  foo (false);
      +  foo (true);
      +  foo (false);
      +  foo (true);
      +}
      +      
      + GCC will now produce two copies of foo. One with flag being + true, while other with flag being + false. This leads to performance improvements previously + possible only by inlining all calls. Cloning causes a lot less code size + growth.
    • +
  • + +
  • A string length optimization pass has been added. It attempts + to track string lengths and optimize various standard C string functions + like strlen, strchr, strcpy, + strcat, stpcpy and their + _FORTIFY_SOURCE counterparts into faster alternatives. + This pass is enabled by default at -O2 or above, unless + optimizing for size, and can be disabled by the + -fno-optimize-strlen option. The pass can e.g. optimize +
    +char *bar (const char *a)
    +{
    +  size_t l = strlen (a) + 2;
    +  char *p = malloc (l); if (p == NULL) return p;
    +  strcpy (p, a); strcat (p, "/"); return p;
    +}
    +      
    + into: +
    +char *bar (const char *a)
    +{
    +  size_t tmp = strlen (a);
    +  char *p = malloc (tmp + 2); if (p == NULL) return p;
    +  memcpy (p, a, tmp); memcpy (p + tmp, "/", 2); return p;
    +}
    +      
    + or for hosted compilations where stpcpy is available in the + runtime and headers provide its prototype, e.g. +
    +void foo (char *a, const char *b, const char *c, const char *d)
    +{
    +  strcpy (a, b); strcat (a, c); strcat (a, d);
    +}
    +      
    + can be optimized into: +
    +void foo (char *a, const char *b, const char *c, const char *d)
    +{
    +  strcpy (stpcpy (stpcpy (a, b), c), d);
    +}
    +      
    +
  • +
+ + +

New Languages and Language specific improvements

+ +
    +
  • Version 3.1 of the OpenMP specification + is now supported for the C, C++, and Fortran compilers.
  • +
+ +

Ada

+ +
    +
  • The command-line option -feliminate-unused-debug-types + has been re-enabled by default, as it is for the other languages, + leading to a reduction in debug info size of 12.5% and more for + relevant cases, as well as to a small compilation speedup.
  • +
+ +

C family

+ +
    +
  • A new built-in, __builtin_assume_aligned, has been added, + through which the compiler can be hinted about pointer alignment + and can use it to improve generated code. +
  • + +
  • A new -Wunused-local-typedefs warning was added for C, C++, + Objective-C and Objective-C++. This warning diagnoses typedefs + locally defined in a function, and otherwise not used. +
  • + +
  • A new experimental -ftrack-macro-expansion option was added for + C, C++, Objective-C, Objective-C++ and Fortran. It allows the + compiler to emit diagnostic about the current macro expansion + stack when a compilation error occurs in a macro expansion. +
  • + +
  • +

    + Experimental support for transactional memory has been added. + It includes support in the compiler, as well as a supporting + runtime library called libitm. To compile code + with transactional memory constructs, use + the -fgnu-tm option. +

    + +

    + Support is currently available for Alpha, ARM, PowerPC, SH, SPARC, + and 32-bit/64-bit x86 platforms. +

    + +

    + For more details on transactional memory + see the GCC + WiKi. +

    +
  • + +
  • +

    + Support for atomic operations specifying the C++11/C11 memory model + has been added. These new __atomic routines replace the + existing __sync built-in routines. +

    +

    + Atomic support is also available for memory blocks. Lock-free + instructions will be used if a memory block is the same size and + alignment as a supported integer type. Atomic operations which do not + have lock-free support are left as function calls. A set of library + functions is available on the GCC atomic wiki in the "External + Atomics Library" section. +

    +

    + For more details on the memory models and features, see the + atomic wiki. +

    +
  • + +
  • When a binary operation is performed on vector types and one of the operands + is a uniform vector, it is possible to replace the vector with the + generating element. For example: +
    +typedef int v4si __attribute__ ((vector_size (16)));
    +v4si res, a = {1,2,3,4};
    +int x;
    +
    +res = 2 + a;  /* means {2,2,2,2} + a  */
    +res = a - x;  /* means a - {x,x,x,x}  */
    +      
    +
  • +
+ +

C

+ +
    +
  • There is support for some more features from the C11 revision + of the ISO C standard. GCC now accepts the + options -std=c11 and -std=gnu11, in + addition to the previous -std=c1x + and -std=gnu1x. +
      +
    • Unicode strings (previously supported only with options such + as -std=gnu11, now supported + with -std=c11), and the predefined + macros __STDC_UTF_16__ + and __STDC_UTF_32__.
    • +
    • Nonreturning functions (_Noreturn + and <stdnoreturn.h>).
    • +
    • Alignment support + (_Alignas, _Alignof, + max_align_t, <stdalign.h>).
    • +
    • A built-in function __builtin_complex is + provided to support C library implementation of + the CMPLX family of macros.
    • +
    +
  • +
+ + +

C++

+ +
    +
  • G++ now accepts the -std=c++11, + -std=gnu++11, and -Wc++11-compat options, + which are equivalent to -std=c++0x, + -std=gnu++0x, and -Wc++0x-compat, + respectively.
  • + +
  • G++ now implements C++11 extended friend syntax: +
    +template<class W>
    +class Q
    +{
    +  static const int I = 2;
    +public:
    +  friend W;
    +};
    +
    +struct B
    +{
    +  int ar[Q<B>::I];
    +};
  • + +
  • Thanks to Ville Voutilainen, G++ now implements C++11 explicit override control. +
    +struct B {
    +  virtual void f() const final;
    +  virtual void f(int);
    +};
    +
    +struct D : B {
    +  void f() const;            // error: D::f attempts to override final B::f
    +  void f(long) override;     // error: doesn't override anything
    +  void f(int) override;      // ok
    +};
    +
    +struct E final { };
    +struct F: E { }; // error: deriving from final class
  • + +
  • G++ now implements C++11 non-static data member initializers. +
    +struct A {
    +  int i = 42;
    +} a; // initializes a.i to 42
  • + +
  • Thanks to Ed Smith-Rowland, G++ now implements + C++11 user-defined literals. +
    +// Not actually a good approximation.  :)
    +constexpr long double operator"" _degrees (long double d) { return d * 0.0175; }
    +long double pi = 180.0_degrees;
  • + +
  • G++ now implements + C++11 alias-declarations. +
    +template <class T> using Ptr = T*;
    +Ptr<int> ip;  // decltype(ip) is int*
  • + +
  • Thanks to Ville Voutilainen and Pedro Lamarão, G++ now implements C++11 delegating constructors. +
    +struct A {
    +  A(int);
    +  A(): A(42) { } // delegate to the A(int) constructor
    +};
  • + +
  • G++ now fully implements C++11 atomic classes rather than just integer + derived classes. +
    +class POD {
    +  int a;
    +  int b;
    +};
    +std::atomic<POD> my_atomic_POD;
    +
  • + +
  • G++ now sets the predefined macro __cplusplus to the + correct value, 199711L for C++98/03, + and 201103L for C++11. +
  • + +
  • G++ now correctly implements the two-phase lookup rules such that an + unqualified name used in a template must have an appropriate declaration + found either in scope at the point of definition of the template or by + argument-dependent lookup at the point of instantiation. As a result, + code that relies on a second unqualified lookup at the point of + instantiation to find functions declared after the template or in + dependent bases will be rejected. The compiler will suggest ways to fix + affected code, and using the -fpermissive compiler flag will + allow the code to compile with a warning. + +
    +template <class T>
    +void f() { g(T()); } // error, g(int) not found by argument-dependent lookup
    +void g(int) { } // fix by moving this declaration before the declaration of f
    +
    +template <class T>
    +struct A: T {
    +  // error, B::g(B) not found by argument-dependent lookup
    +  void f() { g(T()); } // fix by using this->g or A::g
    +};
    +
    +struct B { void g(B); };
    +
    +int main()
    +{
    +  f<int>();
    +  A<B>().f();
    +}
  • + +
  • G++ now properly re-uses stack space allocated for temporary objects +when their lifetime ends, which can significantly lower stack consumption +for some C++ functions. As a result of this, some code with undefined +behavior will now break: +
    +const int &f(const int &i) { return i; }
    +....
    +const int &x = f(1);
    +const int &y = f(2);
    +Here, x refers to the temporary allocated to hold the +1 argument, which only lives until the end of the +initialization; it immediately becomes a dangling reference. So the +next statement re-uses the stack slot to hold the 2 +argument, and users of x get that value instead. + +

    Note that this should not cause any change of behavior for temporaries +of types with non-trivial destructors, as they are already destroyed at end +of full-expression; the change is that now the storage is released as +well.

  • + +
  • A new command-line option -Wdelete-non-virtual-dtor + has been added to warn when delete is used to destroy + an instance of a class which has virtual functions and non-virtual + destructor. It is unsafe to delete an instance of a derived class + through a pointer to a base class if the base class does not have a + virtual destructor. This warning is enabled by -Wall. +
  • + +
  • A new command-line option -Wzero-as-null-pointer-constant + has been added to warn when a literal '0' is used as null pointer + constant. It can be useful to facilitate the conversion to + nullptr in C++11. +
  • + +
  • As per C++98, access-declarations are now deprecated by + G++. Using-declarations are to be used instead. Furthermore, + some efforts have been made to improve the support of class + scope using-declarations. In particular, using-declarations + referring to a dependent type now work as expected + (bug c++/14258). +
  • + +
  • The ELF symbol visibility of a template instantiation is now properly + constrained by the visibility of its template arguments + (bug c++/35688).
  • + +
+ +

Runtime Library (libstdc++)

+ +
    +
  • + Improved experimental support for the new ISO C++ standard, C++11, + including: +
      +
    • using noexcept in most of the library;
    • +
    • implementations of pointer_traits, allocator_traits + and scoped_allocator_adaptor;
    • +
    • uses-allocator construction for tuple;
    • +
    • vector meets the allocator-aware container requirements;
    • +
    • replacing monotonic_clock with steady_clock;
    • +
    • enabling the thread support library on most POSIX targets;
    • +
    • many small improvements to conform to the FDIS.
    • +
    +
  • +
  • Added --enable-clocale=newlib configure option.
  • +
  • Debug Mode iterators for unordered associative containers.
  • +
  • Avoid polluting the global namespace and do not include + <unistd.h>.
  • + + +
+ +

Fortran

+
    +
  • The compile flag -fstack-arrays has been added, which causes + all local arrays to be put on stack memory. For some + programs this will improve the performance significantly. If your + program uses very large local arrays, it is possible that you will + have to extend your runtime limits for stack memory.
  • +
  • The -Ofast flag now also implies -fno-protect-parens and -fstack-arrays.
  • +
  • Front-end optimizations can now be selected by the + -ffrontend-optimize option and deselected by + the -fno-frontend-optimize option.
  • +
  • When front-end optimization removes a function call, + -Wfunction-elimination warns about that.
  • +
  • When performing front-end-optimization, the + -faggressive-function-elimination option + allows the removal of duplicate function calls even for impure + functions.
  • +
  • The flag -Wreal-q-constant has been added, which + warns if floating-point literals have been specified using + q (such as 1.0q0); the q + marker is now supported as a vendor extension to denote quad precision + (REAL(16) or, if not available, REAL(10)). + Consider using a kind parameter (such as in 1.0_qp) + instead, which can be obtained via SELECTED_REAL_KIND.
  • +
  • The GFORTRAN_USE_STDERR environment variable has + been removed. GNU Fortran now always prints error messages to + standard error. If you wish to redirect standard error, please + consult the manual for your OS, shell, batch environment etc. + as appropriate.
  • +
  • The -fdump-core option and + GFORTRAN_ERROR_DUMPCORE environment variable have + been removed. When encountering a serious error, gfortran will + now always abort the program. Whether a core dump is generated + depends on the user environment settings; see the ulimit -c + setting for POSIX shells, limit coredumpsize for C shells, + and the WER user-mode dumps settings on Windows.
  • +
  • The -fbacktrace option is now enabled by default. + When encountering a fatal error, gfortran will attempt to + print a backtrace to standard error before aborting. It can be + disabled with -fno-backtrace. Note: On POSIX targets + with the addr2line utility from GNU binutils, GNU + Fortran can print a backtrace with function name, file name, + line number information in addition to the addresses; otherwise + only the addresses are printed.
  • +
  • Fortran 2003: +
      +
    • Generic interface names which have the same name as derived types + are now supported, which allows to write constructor functions. Note + that Fortran does not support static constructor functions; only + default initialization or an explicit structure-constructor + initialization are available.
    • +
    • Polymorphic + (class) arrays are now supported.
    • +
  • +
  • Fortran 2008: +
      +
    • Support for the DO CONCURRENT construct has been + added, which allows the user to specify that individual loop + iterations have no interdependencies.
    • +
    • Coarrays: + Full single-image support except for polymorphic coarrays. + Additionally, preliminary support for multiple images via an + MPI-based + coarray communication library has been added. Note: + The library version is not yet usable as remote coarray + access is not yet possible.
    • +
  • +
  • TS 29113: +
      +
    • New flag -std=f2008ts permits programs that are expected + to conform to the Fortran 2008 standard and the draft Technical + Specification (TS) 29113 on Further Interoperability of Fortran + with C.
    • +
    • The OPTIONAL attribute is now allowed + for dummy arguments of BIND(C) procedures.
    • +
    • The RANK intrinsic has been added.
    • +
    • The implementation of the ASYNCHRONOUS attribute + in GCC is compatible with the candidate draft of TS 29113 + (since GCC 4.6).
    • +
  • +
+ +

Go

+
    +
  • GCC 4.7 implements + the Go 1 + language standard. The library support in 4.7.0 is not + quite complete, due to release timing. Release 4.7.1 includes + complete support for Go 1. The Go library is from the Go 1.0.1 + release.
  • +
  • Go has been tested on GNU/Linux and Solaris platforms. It may + work on other platforms as well.
  • +
+ + + + +

New Targets and Target Specific Improvements

+ +

ARM

+
    +
  • GCC now supports the Cortex-A7 processor implementing the + v7-a version of the architecture using the option + -mcpu=cortex-a7.
  • +
  • The default vector size in auto-vectorization for NEON is now 128 bits. + If vectorization fails thusly, the vectorizer tries again with + 64-bit vectors.
  • +
  • A new option -mvectorize-with-neon-double was added to + allow users to change the vector size to 64 bits.
  • + +
+ +

AVR

+
    +
  • GCC now supports the XMEGA architecture. + This requires GNU binutils 2.22 or later.
  • +
  • Support for the + named address spaces + __flash, __flash1, …, + __flash5 and __memx has been added. + These address spaces locate read-only data in + flash memory and allow reading from flash memory by means of ordinary + C code, i.e. without the need of (inline) assembler code: +
    +const __flash int values[] = { 42, 31 };
    +
    +int add_values (const __flash int *p, int i)
    +{
    +    return values[i] + *p;
    +}
  • +
  • Support has been added for a new AVR-specific configure option + --with-avrlibc=yes in order to arrange for better + integration of AVR-Libc. + This configure option is supported in avr-gcc 4.7.2 and newer and will + only take effect in non-RTEMS configurations. If avr-gcc is configured + for RTEMS, the option will be ignored which is the same as + specifying --with-avrlibc=no. + See PR54461 for more technical + details.
  • +
  • Support for AVR-specific built-in functions + has been added.
  • +
  • Support has been added for the signed and unsigned 24-bit scalar + integer types __int24 and __uint24.
  • +
  • New command-line options -maccumulate-args, + -mbranch-cost=cost and -mstrict-X + were added to allow better fine-tuning of code optimization.
  • +
  • The command option -fdata-sections now also takes affect + on the section names of variables with the progmem + attribute.
  • +
  • A new inline assembler print modifier %i to print a RAM address as I/O + address has been added: +
    +#include <avr/io.h> /* Port Definitions from AVR-LibC */
    +
    +void set_portb (uint8_t value)
    +{
    +    asm volatile ("out %0, %i1" :: "r" (value), "n" (&PORTB) : "memory");
    +}
    + The offset between an I/O address and the RAM address for that I/O + location is device-specific. This offset is taken into account when + printing a RAM address with the %i modifier so that the + address is suitable to be used as operand in an I/O command. + The address must be a constant integer known at compile time.
  • +
  • The inline assembler constraint "R" to represent integers + in the range −6 … 5 has been removed + without replacement.
  • +
  • Many optimizations to: +
      +
    • 64-bit integer arithmetic
    • +
    • Widening multiplication
    • +
    • Integer division by a constant
    • +
    • Avoid constant reloading in multi-byte instructions.
    • +
    • Micro-optimizations for special instruction sequences.
    • +
    • Generic built-in functions like + __builtin_ffs*, __builtin_clz*, etc.
    • +
    • If-else decision trees generated by switch + instructions
    • +
    • Merging of data located in flash memory
    • +
    • New libgcc variants for devices with 8-bit wide stack pointer
    • +
    • +
    +
  • +
  • Better documentation: +
      +
    • Handling of EIND and indirect jumps on devices with + more than 128 KiB of program memory.
    • +
    • Handling of the RAMPD, RAMPX, + RAMPY and RAMPZ special function registers.
    • +
    • Function attributes OS_main and OS_task.
    • +
    • AVR-specific built-in macros.
    • +
    +
  • +
+ +

C6X

+
    +
  • Support has been added for the Texas Instruments C6X family of + processors.
  • +
+ +

CR16

+
    +
  • Support has been added for National Semiconductor's CR16 + architecture.
  • +
+ +

Epiphany

+
    +
  • Support has been added for Adapteva's Epiphany architecture.
  • +
+ +

IA-32/x86-64

+
    +
  • Support for Intel AVX2 intrinsics, built-in functions and code generation is + available via -mavx2.
  • +
  • Support for Intel BMI2 intrinsics, built-in functions and code generation is + available via -mbmi2.
  • +
  • Implementation and automatic generation of __builtin_clz* + using the lzcnt instruction is available via -mlzcnt.
  • +
  • Support for Intel FMA3 intrinsics and code generation is available via + -mfma.
  • +
  • A new -mfsgsbase command-line option is available that makes GCC + generate new segment register read/write instructions through dedicated built-ins.
  • +
  • Support for the new Intel rdrnd instruction is available via -mrdrnd.
  • +
  • Two additional AVX vector conversion instructions are available via -mf16c.
  • +
  • Support for new Intel processor codename IvyBridge with RDRND, FSGSBASE and F16C + is available through -march=core-avx-i.
  • +
  • Support for the new Intel processor codename Haswell with AVX2, FMA, BMI, + BMI2, LZCNT is available through -march=core-avx2.
  • +
  • Support for new AMD family 15h processors (Piledriver core) is now available + through -march=bdver2 and -mtune=bdver2 options.
  • +
  • Support for the x32 psABI + is now available through the -mx32 option.
  • +
  • Windows mingw targets are using the -mms-bitfields option + by default.
  • +
  • Windows x86 targets are using the __thiscall calling + convention for C++ class-member functions.
  • +
  • Support for the configure option --with-threads=posix + for Windows mingw targets.
  • +
+ +

MIPS

+
    +
  • GCC now supports thread-local storage (TLS) for MIPS16. + This requires GNU binutils 2.22 or later.
  • + +
  • GCC can now generate code specifically for the Cavium Octeon+ + and Octeon2 processors. The associated command-line options are + -march=octeon+ and -march=octeon2 + respectively. Both options require GNU binutils 2.22 or later.
  • + +
  • GCC can now work around certain 24k errata, under the control + of the command-line option -mfix-24k. + These workarounds require GNU binutils 2.20 or later.
  • + +
  • 32-bit MIPS GNU/Linux targets such as mips-linux-gnu + can now build n32 and n64 multilibs. The result is effectively + a 64-bit GNU/Linux toolchain that generates 32-bit code by default. + Use the configure-time option --enable-targets=all + to select these extra multilibs.
  • + +
  • Passing -fno-delayed-branch now also stops the + assembler from automatically filling delay slots.
  • +
+ + + +

PowerPC/PowerPC64

+
    +
  • Vectors of type vector long long or vector long are + passed and returned using the same method as other vectors with the VSX + instruction set. Previously GCC did not adhere to the ABI + for 128-bit vectors with 64-bit integer base types (PR 48857). + This will also be fixed in the GCC 4.6.1 and 4.5.4 releases.
  • + +
  • A new option -mno-pointers-to-nested-functions was + added to allow AIX 32-bit/64-bit and GNU/Linux 64-bit PowerPC users to + specify that the compiler should not load up the chain register + (r11) before calling a function through a pointer. + If you use this option, you cannot call nested functions through a + pointer, or call other languages that might use the static chain.
  • + +
  • A new option msave-toc-indirect was added to allow AIX + 32-bit/64-bit and GNU/Linux 64-bit PowerPC users control whether we + save the TOC in the prologue for indirect calls or generate the save + inline. This can speed up some programs that call through a function + pointer a lot, but it can slow down other functions that only call + through a function pointer in exceptional cases.
  • + +
  • The PowerPC port will now enable machine-specific built-in + functions when the user switches the target machine using the + #pragma GCC target or + __attribute__ ((__target__ ("target"))) + code sequences. In addition, the target macros are updated. + However, due to the way the -save-temps switch is + implemented, you won't see the effect of these additional macros + being defined in preprocessor output.
  • +
+ +

SH

+
    +
  • A new option -msoft-atomic has been added. When it is + specified, GCC will generate GNU/Linux-compatible gUSA atomic sequences + for the new __atomic routines.
  • +
  • Since it is neither supported by GAS nor officially documented, code + generation for little endian SH2A has been disabled. Specifying + -ml with -m2a* will now result in a compiler + error.
  • +
  • The defunct -mbranch-cost option has been fixed.
  • +
  • Some improvements to the generated code of: +
      +
    • Utilization of the tst #imm,R0 instruction.
    • +
    • Dynamic shift instructions on SH2A.
    • +
    • Integer absolute value calculations.
    • +
  • +
+ +

SPARC

+
    +
  • The option -mflat has been reinstated. When it is + specified, the compiler will generate code for a single register + window model. This is essentially a new implementation and the + corresponding debugger support has been added to GDB 7.4.
  • +
  • Support for the options -mtune=native and + -mcpu=native has been added on selected native platforms + (GNU/Linux and Solaris).
  • +
  • Support for the SPARC T3 (Niagara 3) processor has been added.
  • +
  • VIS: +
      +
    • An intrinsics header visintrin.h has been added.
    • +
    • Builtin intrinsics for the VIS 1.0 edge handling and pixel compare + instructions have been added.
    • +
    • The little-endian version of alignaddr is now + supported.
    • +
    • When possible, VIS builtins are marked const, which + should increase the compiler's ability to optimize VIS + operations.
    • +
    • The compiler now properly tracks the %gsr register + and how it behaves as an input for various VIS instructions.
    • +
    • Akin to fzero, the compiler can now generate + fone instructions in order to set all of the bits + of a floating-point register to 1.
    • +
    • The documentation for the VIS intrinsics in the GCC manual has + been brought up to date and many inaccuracies were fixed.
    • +
    • Intrinsics for the VIS 2.0 bmask, + bshuffle, and non-condition-code + setting edge instructions have been added. Their availability + is controlled by the new -mvis2 and + -mno-vis2 options. They are enabled by default + on UltraSPARC-III and later CPUs.
    • +
    +
  • +
  • Support for UltraSPARC Fused Multiply-Add floating-point + extensions has been added. These instructions are enabled by + default on SPARC T3 (Niagara 3) and later CPUs.
  • +
+ +

TILE-Gx/TILEPro

+
    +
  • Support has been added for the Tilera TILE-Gx and TILEPro families of + processors.
  • +
+ + + + +

Other significant improvements

+ +
    +
  • + A new option (-grecord-gcc-switches) was added that + appends compiler command-line options that might affect code + generation to the DW_AT_producer attribute string in the + DWARF debugging information. +
  • + +
  • + GCC now supports various new GNU extensions to the DWARF debugging + information format, like + entry + value and call + site information, typed DWARF stack + or a + more compact macro representation. Support for these extensions + has been added to GDB 7.4. They can be disabled through the + -gstrict-dwarf command-line option. +
  • +
+ +

GCC 4.7.1

+ +

This is the list +of problem reports (PRs) from GCC's bug tracking system that are +known to be fixed in the 4.7.1 release. This list might not be +complete (that is, it is possible that some PRs that have been fixed +are not listed here).

+ +

The Go frontend in the 4.7.1 release fully supports +the Go 1 language +standard.

+ +

GCC 4.7.2

+ +

This is the list +of problem reports (PRs) from GCC's bug tracking system that are +known to be fixed in the 4.7.2 release. This list might not be +complete (that is, it is possible that some PRs that have been fixed +are not listed here).

+ + + + + + + + + + + + + + --- gcc-4.7-4.7.2.orig/debian/libgnat-BV.overrides +++ gcc-4.7-4.7.2/debian/libgnat-BV.overrides @@ -0,0 +1 @@ +libgnat-@BV@ binary: package-name-doesnt-match-sonames --- gcc-4.7-4.7.2.orig/debian/libgfortran3.symbols.alpha +++ gcc-4.7-4.7.2/debian/libgfortran3.symbols.alpha @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/jdb.sh +++ gcc-4.7-4.7.2/debian/jdb.sh @@ -0,0 +1,9 @@ +#!/bin/sh + +# Placeholder script to fake a +# JDK compatible JAVA_HOME directory. + +echo >&2 "This script is only a placeholder." +echo >&2 "Some programs need a JDK rather than only a JRE to work." +echo >&2 "They test for this tool to detect a JDK installation, but" +echo >&2 "don't really need its functionality to work correctly." --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.s390 +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.s390 @@ -0,0 +1,557 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.common" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSs@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSsmm@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSsixEm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIcE6_M_putEPcmPKcPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIwE6_M_putEPwmPKwPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0 + _ZNKSt8valarrayImE4sizeEv@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.16 4.7 + _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEmwRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EmwRKS1_@GLIBCXX_3.4.14 4.5.0 + _ZNSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_m@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEmmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6resizeEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6resizeEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_mw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7reserveEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEmmm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC1EmwRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC2EPKwmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC2EmwRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1 + _ZNSi3getEPci@GLIBCXX_3.4 4.1.1 + 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gcc-4.7-4.7.2.orig/debian/protoize.1 +++ gcc-4.7-4.7.2/debian/protoize.1 @@ -0,0 +1,42 @@ +.TH PROTOIZE 1 +.\" NAME should be all caps, SECTION should be 1-8, maybe w/ subsection +.\" other parms are allowed: see man(7), man(1) +.SH NAME +protoize, unprotoize \- create/remove ANSI prototypes from C code +.SH SYNOPSIS +.B protoize +.I "[options] files ...." +.br +.B unprotoize +.I "[options] files ...." +.SH "DESCRIPTION" +This manual page documents briefly the +.BR protoize , +and +.B unprotoize +commands. +This manual page was written for the Debian GNU/Linux distribution +(but may be used by others), because the original program does not +have a manual page. +Instead, it has documentation in the GNU Info format; see below. +.PP +.B protoize +is an optional part of GNU C. You can use it to add prototypes to a +program, thus converting the program to ANSI C in one respect. The companion +program `unprotoize' does the reverse: it removes argument types from +any prototypes that are found. +.PP +When you run these programs, you must specify a set of source files +as command line arguments. +.SH OPTIONS +These programs are non-trivial to operate, and it is neither possible nor +desirable to properly summarize options in this man page. Read the info +documentation for more information. +.SH "SEE ALSO" +The programs are documented fully by +.IR "Gcc: The use and the internals of the GNU compiler", +available via the Info system. The documentation for protoize/unprotoize +can be found in the subsection "Invoking GCC", under "Running Protoize." +.SH AUTHOR +This manual page was written by Galen Hazelwood, +for the Debian GNU/Linux system. --- gcc-4.7-4.7.2.orig/debian/rules.patch +++ gcc-4.7-4.7.2/debian/rules.patch @@ -0,0 +1,417 @@ +# -*- makefile -*- +# rules to patch the unpacked files in the source directory +# --------------------------------------------------------------------------- +# various rules to unpack addons and (un)apply patches. +# - patch / apply-patches +# - unpatch / reverse-patches + +.NOTPARALLEL: + +patchdir ?= debian/patches +series_file ?= $(patchdir)/series + +# which patches should be applied? + +debian_patches = \ + $(if $(with_linaro_branch),gcc-linaro) \ + svn-updates$(if $(with_linaro_branch),-linaro) \ + svn-libstdc++ \ + hjl-x32-gcc-4_7-branch \ + +ifeq ($(with_java),yes) +# debian_patches += \ +# svn-class-updates +endif + +ifneq ($(GFDL_INVARIANT_FREE),yes) + debian_patches += \ + rename-info-files \ + $(if $(with_linaro_branch),gcc-linaro-doc) \ + $(if $(with_linaro_branch),,svn-doc-updates) \ + hjl-x32-gcc-4_7-branch-doc \ + +else +endif +debian_patches += \ + gcc-gfdl-build + +# boehm-gc-nocheck: seems to work on the buildds \ + +debian_patches += \ + $(if $(with_linaro_branch),,aarch64-branch) \ + aarch64-multiarch \ + aarch64-libffi \ + aarch64-libffi-testsuite \ + gcc-textdomain \ + gcc-driver-extra-langs + +ifeq ($(distribution),Ubuntu) + ifneq (,$(filter $(distrelease),dapper hardy intrepid jaunty karmic lucid)) + debian_patches += gcc-hash-style-both + else + debian_patches += gcc-hash-style-gnu + endif +else + debian_patches += gcc-hash-style-both +endif + +debian_patches += \ + libstdc++-pic \ + libstdc++-doclink \ + libstdc++-man-3cxx \ + libstdc++-test-installed \ + libjava-stacktrace \ + libjava-jnipath \ + libjava-sjlj \ + libjava-disable-plugin \ + alpha-no-ev4-directive \ + boehm-gc-getnprocs \ + note-gnu-stack \ + libgomp-omp_h-multilib \ + sparc-force-cpu \ + pr24619 \ + gccgo-version \ + pr45078 \ + pr47818 \ + pr49940 \ + pr49944 \ + libffi-kfreebsd \ + gcc-base-version \ + libffi-powerpc-sf \ + libffi-powerpc-sysv-without-string-ops \ + mudflapth-link \ + libffi-m68k \ + libgo-fix-arm \ + gcc-cloog-dl \ + libiberty-md5 \ + libgo-hardening \ + pr26155 \ + arm-no-va_list-warn \ + libmudflap-x32 \ + armhf-triplet \ + +# $(if $(filter yes, $(DEB_CROSS)),,gcc-print-file-name) \ +# libstdc++-nothumb-check \ +# TODO: update ... +# libjava-rpath \ + +hardening_patches = +ifneq ($(distribution),Debian) + ifneq (,$(findstring gcc-4, $(PKGSOURCE))) + hardening_patches += gcc-default-format-security \ + gcc-default-fortify-source \ + gcc-default-relro \ + testsuite-hardening-format \ + testsuite-hardening-printf-types + endif +endif +ifeq ($(with_ssp)-$(with_ssp_default),yes-yes) + ifeq ($(distribution),Ubuntu) + hardening_patches += gcc-default-ssp$(if $(filter ppc64,$(DEB_TARGET_ARCH)),-ppc64) + else + hardening_patches += gcc-default-ssp + endif +endif + +# FIXME 4.5: Drop and adjust symbols files +ifneq (,$(findstring 4.4, $(PKGSOURCE))) + debian_patches += pr39491 +endif + +ifeq ($(with_ada),yes) + debian_patches += \ + ada-driver-check \ + ada-gcc-name \ + ada-default-project-path \ + ada-symbolic-tracebacks \ + ada-library-project-files-soname + + ifeq ($(biarch64),yes) + debian_patches += \ + ada-nobiarch-check + endif + + ifeq ($(with_libgnat),yes) + debian_patches += \ + ada-link-lib \ + ada-libgnatvsn \ + ada-libgnatprj \ + ada-acats + ifeq ($(with_gnat_zcx)-$(with_gnat_sjlj),yes-yes) + debian_patches += \ + ada-sjlj + endif + endif + + ifneq (,$(findstring $(DEB_TARGET_ARCH_OS),kfreebsd hurd)) + debian_patches += ada-kfreebsd-gnu \ + ada-bug564232 + endif + + ifeq ($(DEB_TARGET_ARCH_OS),hurd) + debian_patches += \ + gcc_ada_gcc-interface_Makefile.in \ + ada-s-osinte-gnu.adb \ + ada-s-osinte-gnu.ads \ + ada-s-taprop-gnu.adb + endif + +endif + +ifeq ($(with_d),yes) + debian_patches += \ + gdc-4.6 \ + gdc-libphobos-math \ + gdc-driver-zlib + + ifeq ($(with_libphobos),yes) + debian_patches += gdc-libphobos-build + else + debian_patches += gdc-driver-nophobos + endif + +else + debian_patches += gcc-d-lang +endif + +ifeq ($(DEB_TARGET_ARCH),alpha) + debian_patches += alpha-ieee mudflap-nocheck + ifneq ($(GFDL_INVARIANT_FREE),yes) + debian_patches += alpha-ieee-doc + endif +endif + +ifneq (,$(findstring $(DEB_TARGET_ARCH),arm armel armhf)) + debian_patches += libjava-armel-unwind +endif + +ifeq ($(DEB_TARGET_ARCH),m68k) + debian_patches += +endif + +ifeq ($(DEB_TARGET_ARCH),powerpcspe) + debian_patches += powerpc_remove_many +endif + +ifeq ($(DEB_TARGET_ARCH),ppc64) + ifeq ($(distribution),Ubuntu) + #debian_patches += ibm-branch + endif +endif + +#spu_patches = cell-branch +#ifneq ($(GFDL_INVARIANT_FREE),yes) +# spu_patches += cell-branch-doc +#endif + +#debian_patches += link-libs +debian_patches += $(if $(with_linaro_branch),,arm-dynamic-linker) + +# all patches below this line are applied for gcc-snapshot builds as well + +ifeq ($(single_package),yes) + spu_patches = + debian_patches = +endif + +ifeq ($(trunk_build),yes) + debian_patches += gcc-sysroot-trunk +else + debian_patches += gcc-sysroot +endif +debian_patches += libgo-mksysinfo + +ifeq ($(with_softfloat),yes) + debian_patches += arm-multilib-soft-float +else ifeq ($(multilib),yes) + ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise)) + debian_patches += arm-multilib-softfp + else + debian_patches += arm-multilib-soft + endif +endif +debian_patches += arm-multilib-defaults + +ifeq ($(DEB_CROSS),yes) + debian_patches += cross-include cross-fixes +endif + +ifeq ($(DEB_TARGET_ARCH_OS),hurd) + debian_patches += hurd-pthread hurd-changes +endif + +debian_patches += gcc-ice-hack gcc-ice-apport +#FIXME +#debian_patches += gold-and-ld + +debian_patches += libjava-fixed-symlinks +debian_patches += libstdc++-arm-wno-abi + +ifneq (,$(filter $(DEB_TARGET_ARCH), mips mipsel)) + # timeouts on the buildd's, Debian + debian_patches += libstdc++-no-testsuite +else ifeq ($(distribution)-$(DEB_TARGET_ARCH),Ubuntu-armel) + # timeouts on the buildd's, Ubuntu only + debian_patches += libstdc++-no-testsuite +endif +debian_patches += ada-mips +debian_patches += libffi-ro-eh_frame_sect + +ifeq ($(trunk_build),yes) + debian_patches += gcc-multiarch-trunk +else + debian_patches += gcc-multiarch$(if $(with_linaro_branch),-linaro) + debian_patches += gcc-powerpc-nof +endif +ifneq ($(GFDL_INVARIANT_FREE),yes) + debian_patches += gcc-multiarch-doc +endif +ifeq ($(with_multiarch_lib),yes) + ifneq ($(single_package),yes) + debian_patches += libjava-multiarch + endif +endif +debian_patches += libjava-nobiarch-check +debian_patches += config-ml +ifeq ($(biarch64),yes) + ifeq ($(DEB_CROSS),yes) + debian_patches += cross-biarch + endif +endif +debian_patches += gcc-powerpc-undef +ifneq (,$(findstring /$(DEB_TARGET_ARCH)/,$(biarch32archs))) +ifneq ($(DEB_TARGET_ARCH),x32) + ifeq ($(trunk_build),yes) + debian_patches += gcc-multilib64-multiarch-trunk + else + debian_patches += gcc-multilib64-multiarch + endif +endif +endif +ifeq ($(DEB_TARGET_ARCH),x32) + debian_patches += gcc-multilibx32-multiarch +endif + +ifeq (,$(filter $(distrelease),lenny squeeze dapper hardy intrepid jaunty karmic lucid maverick)) + debian_patches += gcc-no-add-needed +endif +ifeq (,$(filter $(distrelease),lenny squeeze wheezy sid experimental dapper hardy intrepid jaunty karmic lucid maverick)) + debian_patches += gcc-as-needed +endif +debian_patches += mips-fix-loongson2f-nop +ifeq ($(distribution),Ubuntu) + ifeq ($(DEB_TARGET_ARCH),ppc64) + debian_patches += gcc-ppc64-O3 + endif +endif +debian_patches += libgomp-kfreebsd-testsuite +#debian_patches += address-clauses-timed-entry-calls + +series_stamp = $(stampdir)/02-series-stamp +series: $(series_stamp) +$(series_stamp): + echo $(strip $(addsuffix .diff,$(debian_patches))) \ + | sed -r 's/ +/ /g' | tr " " "\n" > $(series_file) +ifneq (,$(strip $(hardening_patches))) + ifneq ($(trunk_build),yes) + echo $(strip $(addsuffix .diff,$(hardening_patches))) \ + | sed -r 's/ +/ /g' | tr " " "\n" >> $(series_file) + endif +endif + sed -r 's/(.)$$/\1 -p1/' -i $(series_file) + touch $@ + +autotools_files := $(addprefix ./,$(foreach file,$(shell lsdiff --no-filename \ + $(foreach patch,$(debian_patches),$(patchdir)/$(patch).diff) \ + | sed -r 's/[ab]\/src\//src\//' | sort | uniq),$(shell echo $(file) \ + | egrep 'configure\.(ac|in)|Makefile\.(am|in)|acinclude.m4'))) + +autoconf_version = 2.64 +ifeq ($(trunk_build),yes) + # The actual version depends on the build-dependencies set by + # variable AUTO_BUILD_DEP in rules.conf. Here, we assume the + # correct version is installed. + #autoconf_version = +endif + +# FIXME: the auto* stuff is done every time for every subdir, which +# leads to build errors. Idea: record the auto* calls in the patch +# files (AUTO ) and run them separately, +# maybe only once per directory). +$(patch_stamp): $(unpack_stamp) $(series_stamp) + QUILT_PATCHES=$(patchdir) \ + quilt --quiltrc /dev/null push -a || test $$? = 2 + +ifneq (,$(filter svn-updates, $(debian_patches))) + awk '/^EOF/ {exit} p==1 {print} /EOF$$/ {p=1}' \ + $(patchdir)/svn-updates.diff > src/LAST_UPDATED +endif + + if ! test -f ./autotools_files ; then touch ./autotools_files ; fi + + cd $(srcdir)/fixincludes && ./genfixes + + for f in $(autotools_files) ; \ + do case $$f in \ + */classpath/m4/acinclude.m4) \ + : ;; \ + */configure.*|*/acinclude.m4) \ + if grep ^"$$(md5sum $$f)"$$ ./autotools_files >/dev/null ; \ + then echo "Skipping already regenerated file $$f." ; \ + else \ + echo "Running autoconf$(autoconf_version) in $$(dirname $$f)..." ; \ + dir="$(CURDIR)"; cd $(CURDIR)/$$(dirname $$f) \ + && AUTOM4TE=/usr/bin/autom4te$(autoconf_version) autoconf$(autoconf_version) \ + && cd $$dir \ + && echo "$$(md5sum $$f)" >> ./autotools_files ; \ + fi ;; \ + */Makefile.*) ;; \ + *) echo "Unknown file: $$f"; false; \ + esac; \ + done + + for i in $(debian_patches); do \ + echo -e "\n$$i:" >> pxxx; \ + sed -n 's/^# *DP: */ /p' $(patchdir)/$$i.diff >> pxxx; \ + done +# -$(srcdir)/move-if-change pxxx $@ + mv pxxx $@ + +unpatch: + QUILT_PATCHES=$(patchdir) \ + quilt --quiltrc /dev/null pop -a -R || test $$? = 2 + rm -rf .pc + for f in $(autotools_files); do \ + rm -f $$(echo $$f | sed -r 's/\.(ac|am|in)$$//'); \ + done + +$(src_spu_stamp): $(patch_stamp) + rm -rf src-spu +ifeq (,$(strip $(hardening_patches))) + ln -s src src-spu +else + cp -a src src-spu + set -e; \ + for p in $(hardening_patches); do \ + list="$$p $$list"; \ + done; \ + for p in $$list; do \ + echo "Revert for spu build: $$p"; \ + patch -d src-spu -p2 -R < debian/patches/$$p.diff; \ + done +endif + set -e; \ + for p in $(spu_patches); do \ + echo "Apply for spu build: $$p"; \ + patch -d src-spu -p2 < debian/patches/$$p.diff; \ + done + touch $@ + +update-patches: $(series_stamp) + export QUILT_PATCHES=$(patchdir); \ + export QUILT_REFRESH_ARGS="--no-timestamps --no-index -pab"; \ + export QUILT_DIFF_ARGS="--no-timestamps --no-index -pab"; \ + while quilt push; do quilt refresh; done + +patch: $(patch_stamp) +.PHONY: patch series quilt autotools --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.ia64 +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.ia64 @@ -0,0 +1,146 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.2@GCC_3.3.2 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetBSP@GCC_3.3.2 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divsi3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_3.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __divxf3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunstfti@GCC_3.0 1:4.1.1 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __ia64_nonlocal_goto@GCC_3.0 1:4.1.1 + __ia64_restore_stack_nonlocal@GCC_3.0 1:4.1.1 + __ia64_save_stack_nonlocal@GCC_3.0 1:4.1.1 + __ia64_trampoline@GCC_3.0 1:4.1.1 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __modsi3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivsi3@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __umodsi3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.2.orig/debian/libobjc4.symbols.armel +++ gcc-4.7-4.7.2/debian/libobjc4.symbols.armel @@ -0,0 +1,4 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 + __objc_exception_class@Base 4.3.0 --- gcc-4.7-4.7.2.orig/debian/libgcjLGCJ.postrm +++ gcc-4.7-4.7.2/debian/libgcjLGCJ.postrm @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + remove|purge) + # only purge if no other library is installed. + if [ -z "$(ls /usr/lib/libgcj.so.@GCJ@* 2>/dev/null)" ]; then + rm -f /var/lib/gcj-@BV@/classmap.db + rmdir --ignore-fail-on-non-empty /var/lib/gcj-@BV@ 2>/dev/null || true + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.2.orig/debian/lib64gfortran3.symbols.powerpc +++ gcc-4.7-4.7.2/debian/lib64gfortran3.symbols.powerpc @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/README.maintainers +++ gcc-4.7-4.7.2/debian/README.maintainers @@ -0,0 +1,237 @@ +-*- Outline -*- + +Read this file if you are a Debian Developer or would like to become +one, or if you would like to create your own binary packages of GCC. + +* Overview + +From the GCC sources, Debian currently builds 3 source packages and +almost 100 binary packages, using a single set of build scripts. The +3 source packages are: + +gcc-4.3: C, C++, Fortran, Objective-C and Objective-C++, plus many + common libraries like libssp, libmudflap, and libgcc. +gcj-4.3: Java. +gnat-4.3: Ada. + +The way we do this is quite peculiar, so listen up :) + +When we build from the gcc-4.3 source package, we produce, among many +others, a gcc-4.3-source binary package that contains the pristine +upstream tarball and some Debian-specific patches. Any user can then +install this package on their Debian system, and will have the full +souces in /usr/src/gcc-4.3/gcc-.tar.bz2, along with the +Makefile snippets that unpack and patch them. + +The intended use for this package is twofold: (a) allow users to build +their own cross-compilers, and (b) build the other two packages, +gcj-4.3 and gnat-4.3. + +For gcj-4.3 and gnat-4.3, the "source tarball" just contains an empty +directory; e.g.: + +$ tar tzf gnat-4.3_4.3-20070609.orig.tar.gz +gnat-4.3-4.3-20070609.orig/ + +The build scripts for all source packages are the same, and they are +included, as usual, in the .diff.gz file. + +* The build sequence + +As for all other Debian packages, you build GCC by calling +debian/rules. + +The first thing debian/rules does it to look at the top-most entry in +debian/changelog: this tells it which source package it is building. +For example, if the first entry in debian/changelog reads: + +gcj-4.3 (4.3-20070609-1) unstable; urgency=low + + * Upload as gcj-4.3. + + -- Ludovic Brenta Tue, 26 Jun 2007 00:26:42 +0200 + +then, debian/rules will build only the Java binary packages. + +The second step is to unpack the GCC source tarball. This tarball is +either in the build directory (when building gcc-4.3), or in +/usr/src/gcc-4.3/gcc-.tar.bz2 (when building the other +source packages). + +The third step is to build debian/control from debian/control.m4 and a +complex set of rules specified in debian/rules.conf. The resulting +control file contains only the binary packages to be built. + +The fourth step is to select which patches to apply (this is done in +debian/rules.defs), and then to apply the selected patches (see +debian/rules.patch). + +The fifth step is to create a "build" directory, cd into it, call +../src/configure, and bootstrap the compiler and libraries selected. +This is in debian/rules2. + +The sixth step is to call "make install" in the build directory: this +installs the compiler and libraries into debian/tmp +(i.e. debian/tmp/usr/bin/gcc, etc.) + +The seventh step is to run the GCC test suite (this actually takes at +least as much time as bootstrapping, and you can disable it by setting +WITHOUT_CHECK to "yes" in the environment). + +The eighth step is to build the binary packages, i.e. the .debs. This +is done by a set of language- and architecture-dependent Makefile +snippets in the debian/rules.d/ directory, which move files from the +debian/tmp tree to the debian/ trees. + +* Making your own packages + +In this example, we will build our own gnat-4.3 package. + +1) Create a .orig.tar.gz tarball containing a single, empty directory. + +$ mkdir gnat-4.3-4.3-20070609.orig +$ tar czf gnat-4.3_4.3-20070609.orig.tar.gz gnat-4.3-4.3-20070609.orig + +2) Install gcc-4.3-source, which contains the real sources: + +# apt-get install gcc-4.3-source + +3) Create a build directory: + +$ mkdir gnat-4.3-4.3-20070609; cd gnat-4.3-4.3-20070609 + +4) Checkout from Subversion: + +$ svn checkout svn://svn.debian.org/gcccvs/branches/sid/gcc-4.3/debian + +5) Edit the debian/changelog file, adding a new entry at the top that + starts with "gnat-4.3" instead of "gcc-4.3". + +6) Generate the debian/control file, adjusted for gnat: + +$ debian/rules control + +7) Build: + +$ dpkg-buildpackage -rfakeroot + +* Hints + +You need a powerful machine to build GCC. The larger, the better. +The build scripts take advantage of as many CPU threads as are +available in your box (for example: 2 threads on a dual-core amd64; 4 +threads on a dual-core POWER5; 32 threads on an 8-core UltraSPARC T1, +etc.). + +If you have 2 GB or more of physical RAM, you can achieve maximum +performance by building in a tmpfs, like this: + +1) as root, create the new tmpfs: + +# mount -t tmpfs -o size=1280m none /home/lbrenta/src/debian/ram + +By default, the tmpfs will be limited to half your physical RAM. The +beauty of it is that it only consumes as much physical RAM as +necessary to hold the files in it; deleting files frees up RAM. + +2) As your regular user, create the working directory in the tmpfs + +$ cp --archive ~/src/debian/gcc-4.3-4.3-20070901 ~/src/debian/ram + +3) Build in there. On my dual-core, 2 GHz amd64, it takes 34 minutes + to build gnat, and the tmpfs takes 992 MiB of physical RAM but + exceeds 1 GiB during the build. + +Note that the build process uses a lot of temporary files. Your $TEMP +directory should therefore also be in a ram disk. You can achieve +that either by mounting it as tmpfs, or by setting TEMP to point to +~/src/debian/ram. + +Also note that each thread in your processor(s) will run a compiler in +it and use up RAM. Therefore your physical memory should be: + +Physical_RAM >= 1.2 + 0.4 * Threads (in GiB) + +(this is an estimate; your mileage may vary). If you have less +physical RAM than recommended, reduce the number of threads allocated +to the build process, or do not use a tmpfs to build. + +* Patching GCC + +Debian applies a large number of patches to GCC as part of the build +process. The patches are shell scripts located in debian/patches. +The file debian/rules.defs selects the language front-ends and +libraries to build. Then, based on that, debian/rules.patch selects +which patches to apply and in which order, then applies them and +produces a file listing the applied patches in order in +stamps/02-patch-stamp. + +There is currently no tool to help modify patches; you have to do it +by hand. Here is one possible way to do it: + +1) Apply all patches up to and EXCLUDING the patch you intend to + modify, in order. + +2) Make a deep copy of the src directory, e.g. + $ cp --archive src src.bak + +3) Apply the patch you intend to modify. + +4) Open the .dpatch file in your editor and remove the entire patch + section; leave alone the shell script part at the top. + +5) Change the files you want in the src directory. After making + changes, you can experiment with + $ make -C build -jK + (where K is the number of processor threads you have) + +6) $ diff -rNu src.bak src >> debian/patches/.dpatch + +7) Apply all remaining patches, to see if your change broke any of + them. + +8) $ svn commit debian/patches/.dpatch + +If you want to add a new patch, the procedure is similar. You must +first choose where in the list of patches you want to insert your new +patch. Then, apply all patches up to that point and start editing. +Do not forget to add a reference to your patch at the proper place in +debian/rules.patch. + +** Patching GCC with Quilt + +The above method uses an entire copy of the source tree, which is +currently 474 megabytes in size. If you are in a one-gigabyte ram +disk (see Hints above), this may be a problem. One solution to this +problem is to use quilt, which will only keep copies of the files +touched by patches, not all files. It also automates the updating of +a patch after you change the sources. + +Quilt however does not take into account the selection of patches made +in debian/rules.defs; instead it has a static list of patches. After +calling "debian/rules patch", you can generate such a list like this: + +$ egrep '^[^ ]+:' stamps/02-patch-stamp | \ + sed 's!:!.dpatch -p0!' > debian/patches/series + +Unfortunately, not all patches are applied with -p0; you must then +edit debian/patches/series by hand to replace -p0 with -p1 for a few +patches. + +Once you have your debian/patches/series: + +$ debian/rules unpatch +$ export QUILT_PATCHES=$PWD/debian/patches +$ cd src +$ quilt push -a (or quilt push ) +edit files at will; quilt add to add a new file to the patch +$ make -C ../build +$ quilt refresh +$ quilt push -a # check that no patch is broken +$ quilt pop -a +$ cd .. +$ debian/rules clean build +$ svn commit + +-- +Ludovic Brenta, 2007-12-05. --- gcc-4.7-4.7.2.orig/debian/lib64itm1.symbols +++ gcc-4.7-4.7.2/debian/lib64itm1.symbols @@ -0,0 +1,3 @@ +libitm.so.1 lib64itm1 #MINVER# +#include "libitm1.symbols.common" +#include "libitm1.symbols.64bit" --- gcc-4.7-4.7.2.orig/debian/libn32gcc1.symbols.mips +++ gcc-4.7-4.7.2/debian/libn32gcc1.symbols.mips @@ -0,0 +1,1749 @@ +libgcc_s.so.1 libn32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.2.0 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4 + GCC_4.5.0@GCC_4.5.0 1:4.5 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 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gcc-4.7-4.7.2.orig/debian/source.lintian-overrides +++ gcc-4.7-4.7.2/debian/source.lintian-overrides @@ -0,0 +1,5 @@ +gcc-4.7: invalid-arch-string-in-source-relation +gcc-4.7: quilt-build-dep-but-no-series-file +gcc-4.7: weak-library-dev-dependency libgnatvsn4.7-dev on libgnatvsn4.7 (= ${gnat:Version}) +gcc-4.7: weak-library-dev-dependency libgnatprj4.7-dev on libgnatprj4.7 (= ${gnat:Version}) +gcc-4.7: weak-library-dev-dependency libgcj13-dev on libgcj13-awt (= ${gcj:Version}) --- gcc-4.7-4.7.2.orig/debian/changelog +++ gcc-4.7-4.7.2/debian/changelog @@ -0,0 +1,10771 @@ +gcc-4.7 (4.7.2-5ubuntu4) raring; urgency=low + + * Update to SVN 20121027 (r192873) from the gcc-4_7-branch. + * Build x32 multilibs on amd64 and i386. + * Don't run the libstdc++ tests on armel, timeouts on the buildds. + * lib*-dev packages for cross builds are not Multi-Arch: same. LP: #1070694. + * Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, + only if the optimization level is > 0. + + -- Matthias Klose Sat, 27 Oct 2012 14:03:30 +0200 + +gcc-4.7 (4.7.2-5ubuntu3) raring; urgency=low + + * Fix hjl-x32-gcc-4_7-branch.diff. + + -- Matthias Klose Thu, 25 Oct 2012 13:45:40 +0200 + +gcc-4.7 (4.7.2-5ubuntu2) raring; urgency=low + + * Merge with Debian. + + -- Matthias Klose Thu, 25 Oct 2012 13:31:07 +0200 + +gcc-4.7 (4.7.2-5) UNRELEASED; urgency=low + + * Update to SVN 20121027 (r192873) from the gcc-4_7-branch. + - Fix PR target/54892 (ARM, LP: #1065122), PR rtl-optimization/54870, + PR rtl-optimization/53701, PR target/53975 (ia64), + PR tree-optimization/54902 (LP: #1065559), PR middle-end/54945, + PR target/55019 (ARM), PR c++/54984. + + [ Matthias Klose ] + * Update the Linaro support to the 4.7-2012.10 release. + * Define MULTIARCH_DIRNAME for arm64 (Wookey). + * Let the lib*objc-dev packages depend on the lib*gcc-dev packages. + * Let the libstdc++-dev package depend on the libgcc-dev package. + * Drop the dependency of the libstdc++-dev package on g++, make + libstdc++-dev and libstdc++-pic Multi-Arch: same. Closes: #678623. + * Install override files before calling dh_fixperms. + * Backport the libffi arm64 port. + * Build libx32gcc-dev, libx32objc-dev and libx32gfortran-dev packages. + * Allow conditional building of the x32 multilibs. + * Fix libmudflap build failure for x32 multilibs. + * Fix dependency on glibc for triarch builds. + * Add build-{arch,indep} targets. + * Fix libquadmath x32 multilib builds on kernels which don't support x32. + * Fix location of x32 specific C++ header files. + * Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, + only if the optimization level is > 0. + + [ Thibaut Girka ] + * Split out lib*gcc-dev packages. + * Split out lib*objc-dev packages. + * Split out lib*gfortran-dev packages. + + [ Daniel Schepler ] + * Add support for x32. Closes: #667005. + * New patch hjl-x32-gcc-4_7-branch.diff to incorporate changes from + that branch, including --with-abi=mx32 option. + + [ Marcin Juszkiewicz ] + * lib*-dev packages for cross builds are not Multi-Arch: same. LP: #1070694. + * Remove conflicts for armhf/armel cross packages. + + -- Matthias Klose Fri, 19 Oct 2012 14:26:15 +0200 + +gcc-4.7 (4.7.2-4ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Wed, 10 Oct 2012 01:16:02 +0200 + +gcc-4.7 (4.7.2-4) unstable; urgency=low + + * Fix PR c++/54858 (ice on valid), taken from the branch. + * Build again Go on armel and armhf. + + -- Matthias Klose Tue, 09 Oct 2012 12:00:59 +0200 + +gcc-4.7 (4.7.2-3) unstable; urgency=low + + * Revert the fix PR c/33763, and just disable the sorry message, + taken from the branch. Closes: #678589. LP: #1062343. + * Update libgo to 1.0.3. + * Go fixes: + - Fix a, b, c := b, a, 1 when a and b already exist. + - Fix some type reflection strings. + - Fix parse of (<- chan <- chan <- int)(x). + - Fix handling of omitted expression in switch. + - Better error for switch on non-comparable type. + * Fix PR debug/53135 (ice on valid), PR target/54703 (x86, wrong code), + PR c++/54777 (c++11, rejects valid), taken from the 4.7 branch. + * gcc-4.7-base: ensure smooth upgrades from squeeze by adding + Breaks: gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~) + as in gcc-4.4-base (multiarch patches re-worked in 4.6.1-8/4.4.6-9). + Fixes some squeeze->wheezy upgrade paths where apt chooses to hold back + gcc-4.4-base and keep gcj-4.4-base installed instead of upgrading + gcc-4.4-base and removing the obsolete gcj-4.4-base (Andreas Beckmann). + Closes: #677582. + * Add arm64 support, partly based on Wookey's patches (only applied for + arm64). Disabled for arm64 are ssp, gomp, mudflap, boehm-gc, Ada, ObjC, + Obj-C++ and Java). + + -- Matthias Klose Fri, 05 Oct 2012 20:00:30 +0200 + +gcc-4.7 (4.7.2-2ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Fri, 21 Sep 2012 17:08:03 +0200 + +gcc-4.7 (4.7.2-2) unstable; urgency=low + + * Fix PR tree-optimization/54563 (), PR target/54564 (fma builtin fix), + PR c/54552 (ice on valid), PR lto/54312 (memory hog), PR c/54103 (ice on + valid), PR middle-end/54638 (memory corruption), taken from the 4.7 branch. + * Go fixes, taken from the 4.7 branch. + * On ARM, don't warn anymore that 4.4 has changed the `va_list' mangling, + taken from the trunk. + * Mention the NEWS changes for all uploads. Closes: #688278. + + -- Matthias Klose Fri, 21 Sep 2012 11:58:10 +0200 + +gcc-4.7 (4.7.2-1ubuntu1) quantal; urgency=low + + * Include (but do not apply) the aarch64 backport to the 4.7 branch. + * Don't run the testsuite on armel, timeouts on the buildds. + + -- Matthias Klose Thu, 20 Sep 2012 13:14:47 +0200 + +gcc-4.7 (4.7.2-1) unstable; urgency=low + + * GCC 4.7.2 release. + * Issues addressed after the release candidate: + - PR c++/53661 (wrong warning), LTO backport from trunk, documentation fix. + + -- Matthias Klose Thu, 20 Sep 2012 12:19:07 +0200 + +gcc-4.7 (4.7.1-9ubuntu2) quantal; urgency=low + + * No change re-upload, with the testsuite disabled to get the + package into the archive on armel (failed three times to build + on the buildds without leaving an error log). + + -- Matthias Klose Mon, 17 Sep 2012 11:58:54 +0200 + +gcc-4.7 (4.7.1-9ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Thu, 13 Sep 2012 13:40:27 +0200 + +gcc-4.7 (4.7.1-9) unstable; urgency=low + + * GCC 4.7.2 release candidate 1. + * Update to SVN 20120914 (r191306) from the gcc-4_7-branch. + - Fix PR libstdc++/54388, PR libstdc++/54172, PR libstdc++/54172, + PR debug/54534, PR target/54536 (AVR), PR middle-end/54515 (ice on valid), + PR c++/54506 (rejects valid), PR c++/54341 (ice on valid), + PR c++/54253 (ice on valid), PR c/54559 (closes: #687496), + PR gcov-profile/54487, PR c++/53839, PR c++/54511, PR c++/53836, + PR fortran/54556. + * Update the Linaro support to the 4.7-2012.09 release. + - Adds support for the NEON vext instruction when shuffling. + - Backports improvements to scheduling transfers between VFP and core + registers. + - Backports support for the UBFX instruction on certain bit extract idioms. + + -- Matthias Klose Fri, 14 Sep 2012 19:12:47 +0200 + +gcc-4.7 (4.7.1-8ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Fri, 07 Sep 2012 13:50:37 +0200 + +gcc-4.7 (4.7.1-8) unstable; urgency=low + + * Update to SVN 20120908 (r191092) from the gcc-4_7-branch. + - Fix PR libstdc++/54376, PR libstdc++/54297, PR libstdc++/54351, + PR libstdc++/54297, PR target/54461 (AVR), PR target/54476 (AVR), + PR target/54220 (AVR), PR fortran/54208 (rejects valid), + PR middle-end/53667 (wrong code), PR target/54252 (ARM, wrong code), + PR rtl-optimization/54455 (ice on valid), PR driver/54335 (docs), + PR tree-optimization/54498 (wrong code), PR target/45070 (wrong code), + PR tree-optimization/54494 (wrong code), PR target/54436 (x86), + PR c/54428 (ice on valid), PR c/54363 (ice on valid), + PR rtl-optimization/54369 (mips, sparc, wrong code), PR middle-end/54146, + PR target/46254 (ice on valid), PR rtl-optimization/54088 (ice on valid), + PR target/54212 (ARM, wrong code), PR c++/54197 (wrong code), + PR lto/53572, PR tree-optimization/53922 (wrong code). + - Go fixes. + + [ Nobuhiro Iwamatsu ] + * Remove sh4-enable-ieee.diff, -mieee enabled by default. Closes: #685975. + + [ Matthias Klose ] + * Fix PR c++/54341, PR c++/54253, taken from the trunk. Closes: #685430. + * Update libitm package description. Closes: #686802. + + -- Matthias Klose Fri, 07 Sep 2012 22:16:55 +0200 + +gcc-4.7 (4.7.1-7ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Wed, 15 Aug 2012 16:55:52 +0200 + +gcc-4.7 (4.7.1-7) unstable; urgency=low + + * Update to SVN 20120814 (r190380) from the gcc-4_7-branch. + - Fix PR libstdc++/54036, PR target/53961 (x86), PR libstdc++/54185, + PR rtl-optimization/53942, PR rtl-optimization/54157. + + [ Thibaut Girka ] + * Fix cross compilers for 64bit architectures when using + DEB_CROSS_NO_BIARCH. + * Fix glibc dependency for multiarch enabled builds for architectures + with a different libc-dev package name. + + [ Aurelien Jarno ] + * powerpc64: Fix non-multilib builds. + + [ Matthias Klose ] + * Fix syntax error generating the control file for cross builds. + Closes: #682104. + * spu build: Move static libraries to version specific directories. + Closes: #680022. + * Don't run the libstdc++ tests on mipsel, times out on the buildds. + * Update the Linaro support to the 4.7-2012.08 release. + + -- Matthias Klose Tue, 14 Aug 2012 13:58:03 +0200 + +gcc-4.7 (4.7.1-6ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Thu, 02 Aug 2012 00:48:37 +0200 + +gcc-4.7 (4.7.1-6) unstable; urgency=low + + * Update to SVN 20120731 (r190015) from the gcc-4_7-branch. + - Fix PR libstdc++/54075, PR libstdc++/53270, PR libstdc++/53978, + PR target/33135 (SH), PR target/53877 (x86), PR rtl-optimization/52250, + PR middle-end/54017, PR target/54029, PR target/53961 (x86), + PR target/53110 (x86), PR rtl-optimization/53908, PR c++/54038, + PR c++/54026, PR c++/53995, PR c++/53989, PR c++/53549 (closes: #680931), + PR c++/53953. + + -- Matthias Klose Tue, 31 Jul 2012 20:00:56 +0200 + +gcc-4.7 (4.7.1-5ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Sat, 14 Jul 2012 01:12:20 +0200 + +gcc-4.7 (4.7.1-5) unstable; urgency=high + + * Update to SVN 20120713 (r189464) from the gcc-4_7-branch. + - Fix PR libstdc++/53657, PR c++/53733 (DR 1402), PR target/53811, + PR target/53853. + + -- Matthias Klose Fri, 13 Jul 2012 16:59:59 +0200 + +gcc-4.7 (4.7.1-4) unstable; urgency=medium + + * Update to SVN 20120709 (r189388) from the gcc-4_7-branch. + - Fix PR libstdc++/53872, PR libstdc++/53830, PR bootstrap/52947, + PR middle-end/52786, PR middle-end/50708, PR tree-optimization/53693, + PR middle-end/52621, PR middle-end/53433, PR fortran/53732, + PR libstdc++/53578, PR c++/53882 (closes: #680521), PR c++/53826. + * Update the Linaro support to the 4.7-2012.07 release. + * Fix build on pre-multiarch releases (based on a patch from Chip Salzenberg). + Closes: #680590. + + -- Matthias Klose Mon, 09 Jul 2012 18:58:47 +0200 + +gcc-4.7 (4.7.1-3ubuntu1) quantal; urgency=low + + * Update to SVN 20120707 (r189352) from the gcc-4_7-branch. + - Fix PR libstdc++/53872, PR libstdc++/53830, PR bootstrap/52947, + PR middle-end/52786, PR middle-end/50708, PR tree-optimization/53693, + PR middle-end/52621, PR middle-end/53433, PR fortran/53732, + PR libstdc++/53578. + * Update the Linaro support to the 4.7-2012.07 release. + * Fix build on pre-multiarch releases (based on patch from Chip Salzenberg). + Closes: #680590. + + -- Matthias Klose Sun, 08 Jul 2012 01:01:30 +0200 + +gcc-4.7 (4.7.1-3) unstable; urgency=low + + * Update to SVN 20120703 (r189219) from the gcc-4_7-branch. + - Fix PR preprocessor/37215, PR middle-end/38474, PR target/53595 (AVR), + PR middle-end/53790, PR debug/53682, PR target/53759 (x86), + PR c++/53816, PR c++/53821, PR c++/51214, PR c++/53498, PR c++/53305, + PR c++/52988 (wrong code), PR c++/53202 (wrong code), PR c++/53594. + - The change for PR libstdc++/49561 was reverted. The std::list size is + now the same again in c++98 and c++11 mode. + * Revert the local std::list work around. + * Build using isl instead of ppl for snapshot builds. + + -- Matthias Klose Tue, 03 Jul 2012 15:07:14 +0200 + +gcc-4.7 (4.7.1-2ubuntu1) quantal; urgency=low + + * Update the Linaro support to the 4.7-2012.06 release. + + -- Matthias Klose Sat, 23 Jun 2012 13:26:03 +0200 + +gcc-4.7 (4.7.1-2) unstable; urgency=medium + + * Update to SVN 20120623 (r188906) from the gcc-4_7-branch. + - Fix PR rtl-optimization/53700, PR target/52908, PR ada/53592, + PR libstdc++/53270, PR libstdc++/53678, PR gcov-profile/53744, + PR c++/52637, PR middle-end/53470, PR c++/53651, PR c++/53137, + PR c++/53599, PR fortran/53691, PR fortran/53685. + * Update NEWS files for 4.7.1. + * Bump gcc/FULL-VERSION to 4.7.1. + * Update the Linaro support to the 4.7-2012.06 release. + * Restore std::list ABI compatibility in c++11 mode. The upstream behaviour + can be enabled defining __CXX0X_STD_LIST_ABI_INCOMPAT__. This work around + will be replaced with an upstream solution. + * Fix PR debug/53682, taken from the trunk. Closes: #677606. + * Use $(with_gccbase) and $(with_gccxbase) to determine whether to enable it + in the control file (Thibaut Girka). + * When building a cross-compiler, runtime libraries for the target + architecture may be cross-built. Tell debhelper/dpkg-dev those packages + are indeed for a foreign architecture (Thibaut Girka). + + -- Matthias Klose Sat, 23 Jun 2012 11:58:35 +0200 + +gcc-4.7 (4.7.1-1) unstable; urgency=low + + * GCC 4.7.1 release. + + -- Matthias Klose Fri, 15 Jun 2012 00:38:27 +0200 + +gcc-4.7 (4.7.0-13ubuntu1) quantal; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Tue, 12 Jun 2012 17:54:25 +0200 + +gcc-4.7 (4.7.0-13) unstable; urgency=low + + * Update to SVN 20120612 (r188457) from the gcc-4_7-branch. + - Fix PR c++/53602 (LP: #1007616). + + * Document the changed ssp-buffer-size default in Ubuntu 10.10 and + later (Kees Cook). LP: #990141. + * Fix PR c++/26155, ICE after error with namespace alias. LP: #321883. + * Fix PR c++/53599 (reverting the fix for PR c++/53137). + Closes: #676729. LP: #1010896. + * Fix manual page names for cross builds (Thibaut Girka). Closes: #675516. + * Remove dpkg-cross build dependency for cross builds (Thibaut Girka). + Closes: #675511. + + -- Matthias Klose Tue, 12 Jun 2012 15:47:57 +0200 + +gcc-4.7 (4.7.0-12ubuntu1) quantal; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Wed, 06 Jun 2012 13:46:57 +0200 + +gcc-4.7 (4.7.0-12) unstable; urgency=low + + * Update to SVN 20120606 (r188261) from the gcc-4_7-branch (release + candidate 1 or 4.7.1). + - Fix PR libstdc++/52007, PR c++/53524, PR target/53559, + PR middle-end/47530, PR middle-end/53471, PR middle-end/52979, + PR target/46261, PR tree-optimization/53550, PR middle-end/52080, + PR middle-end/52097, PR middle-end/48124, PR middle-end/53501, + PR target/52667, PR target/52642, PR middle-end/48493, PR c++/53524, + PR c++/52973, PR c++/52725, PR c++/53137, PR c++/53484, PR c++/53500, + PR c++/52905, PR fortran/53521. + - Go and libgo updates. + * Include README.Debian in README.Debian.. + * Fix PR c/33763, proposed patch from the issue. Closes: #672411. + * Fix build failure in libgo with hardening defaults. + + -- Matthias Klose Wed, 06 Jun 2012 13:22:27 +0200 + +gcc-4.7 (4.7.0-11ubuntu2) quantal; urgency=low + + * Fix build failure in libgo with hardening defaults. + + -- Matthias Klose Thu, 31 May 2012 10:24:37 +0800 + +gcc-4.7 (4.7.0-11ubuntu1) quantal; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Thu, 31 May 2012 08:54:04 +0800 + +gcc-4.7 (4.7.0-11) unstable; urgency=low + + * Update to SVN 20120530 (r188035) from the gcc-4_7-branch. + - Fix PR c++/53356, PR c++/53491, PR c++/53503, PR c++/53220, + PR middle-end/53501, PR rtl-optimization/53519, + PR tree-optimization/53516, PR tree-optimization/53438, + PR target/52999, PR middle-end/53008. + + [ Matthias Klose ] + * Build-depend on netbase when building Go. Closes: #674306. + + [ Marcin Juszkiewicz ] + * Use the multiarch default for staged builds. + + -- Matthias Klose Thu, 31 May 2012 08:25:08 +0800 + +gcc-4.7 (4.7.0-10) unstable; urgency=low + + * Update to SVN 20120528 (r187927) from the gcc-4_7-branch. + - Fix PR rtl-optimization/52528, PR lto/52178, PR target/53435, + PR ada/52362, PR target/53385, PR middle-end/53460, + PR tree-optimization/53465, PR target/53448, PR tree-optimization/53408, + PR ada/52362, PR fortran/53389. + * Fix warning building libiberty/md5.c. PR other/53285. Closes: #674830. + + -- Matthias Klose Mon, 28 May 2012 11:30:36 +0800 + +gcc-4.7 (4.7.0-9) unstable; urgency=low + + * Update to SVN 20120522 (r187756) from the gcc-4_7-branch. + - Fix PR bootstrap/53183, PR tree-optimization/53436, + PR tree-optimization/53366, PR tree-optimization/53409, + PR tree-optimization/53410, PR c/53418, PR target/53416, + PR middle-end/52584, PR debug/52727, PR tree-optimization/53364, + PR target/53358, PR rtl-optimization/52804, PR target/46098, + PR target/53256, PR c++/53209, PR c++/53301, PR ada/52494, + PR fortran/53310 + * Update the Linaro support to the 4.7-2012.05 release. + + -- Matthias Klose Tue, 22 May 2012 13:01:33 +0800 + +gcc-4.7 (4.7.0-8) unstable; urgency=low + + * Update to SVN 20120509 (r187339) from the gcc-4_7-branch. + - Fix PR libstdc++/53193, PR target/53272, PR tree-optimization/53239, + PR tree-optimization/53195, PR target/52999, PR target/53228, + PR tree-optimization/52633, PR tree-optimization/52870, PR target/48496, + PR target/53199, PR target/52684, PR lto/52605, PR plugins/53126, + PR debug/53174, PR target/53187, PR tree-optimization/53144, + PR c++/53186, PR fortran/53255, PR fortran/53111, PR fortran/52864. + - Fix plugin check in gcc-{ar,nm,ranlib}-4.7. + * Install man pages for gcc-{ar,nm,ranlib}-4.7. + + -- Matthias Klose Mon, 07 May 2012 21:56:42 +0200 + +gcc-4.7 (4.7.0-7ubuntu3) quantal; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Wed, 02 May 2012 13:18:23 +0200 + +gcc-4.7 (4.7.0-7) unstable; urgency=low + + * Update to SVN 20120502 (r187039) from the gcc-4_7-branch. + - Fix PR libstdc++/53115, PR tree-optimization/53163, + PR rtl-optimization/53160, PR middle-end/53136, PR fortran/53148. + - libgo fix for mips. + * Fix setting MULTILIB_DEFAULTS for ARM multilib builds. + * Build Go on mips. + * Revert: Don't build multilib gnat on armel and armhf. + * Fix multiarch patch for alpha (Michael Cree). Closes: #670571. + * Fix Go multilib packaging issue for mips and mipsel. + + -- Matthias Klose Wed, 02 May 2012 12:42:01 +0200 + +gcc-4.7 (4.7.0-6) unstable; urgency=low + + * Update to SVN 20120430 (r186964) from the gcc-4_7-branch. + - Fix PR target/53138. + * Build Go on ARM. + * Treat wheezy the same as sid in more places (Peter Green). + Addresses: #670821. + + -- Matthias Klose Mon, 30 Apr 2012 13:06:21 +0200 + +gcc-4.7 (4.7.0-5ubuntu1) quantal; urgency=low + + * Re-enable multilib builds on armel and armhf. + + -- Matthias Klose Sat, 28 Apr 2012 12:19:11 +0200 + +gcc-4.7 (4.7.0-5) unstable; urgency=medium + + * Update to SVN 20120428 (r186932) from the gcc-4_7-branch. + - Fix PR c/52880, PR target/53065, PR tree-optimization/53085, + PR c/51527, PR target/53120. + + [ Matthias Klose ] + * Don't build multilib gnat on armel and armhf. + * Don't try to run the libstdc++ testsuite if the C++ frontend isn't built. + * Install the unwind-arm-common.h header file. + * Fix ARM biarch package builds. + + [ Aurelien Jarno ] + * Reenable parallel builds on GNU/kFreeBSD. + * Fix libgcc building on MIPS N32/64. Closes: #669858. + + -- Matthias Klose Sat, 28 Apr 2012 11:59:36 +0200 + +gcc-4.7 (4.7.0-4ubuntu2) quantal; urgency=low + + * Default to armv5t, soft float on armel. + + -- Matthias Klose Wed, 25 Apr 2012 11:42:06 +0200 + +gcc-4.7 (4.7.0-4ubuntu1) quantal; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Tue, 24 Apr 2012 09:18:11 +0200 + +gcc-4.7 (4.7.0-4) unstable; urgency=low + + * Update to SVN 20120424 (r186746) from the gcc-4_7-branch. + - Fix PR libstdc++/52924, PR libstdc++/52591, PR middle-end/52894, + PR testsuite/53046, PR libstdc++/53067, PR libstdc++/53027, + PR libstdc++/52839, PR bootstrap/52840, PR libstdc++/52689, + PR libstdc++/52699, PR libstdc++/52822, PR libstdc++/52942, + PR middle-end/53084, PR middle-end/52999, PR c/53060, + PR tree-optimizations/52891, PR target/53033, PR target/53020, + PR target/52932, PR middle-end/52939, PR tree-optimization/52969, + PR c/52862, PR target/52775, PR tree-optimization/52943, PR c++/53003, + PR c++/38543, PR c++/50830, PR c++/50303, PR c++/52292, PR c++/52380, + PR c++/52465, PR c++/52824, PR c++/52906. + + [ Matthias Klose ] + * Update the Linaro support to the 4.7-2012.04 release. + * Set the ARM hard-float linker path according to the consensus: + http://lists.linaro.org/pipermail/cross-distro/2012-April/000261.html + * Reenable the spu build on ppc64. Closes: #668272. + * Update and reenable the gcc-cloog-dl patch. + + [ Samuel Thibault ] + * ada-s-osinte-gnu.adb.diff, ada-s-osinte-gnu.ads.diff, + ada-s-taprop-gnu.adb.diff, gcc_ada_gcc-interface_Makefile.in.diff: + Add ada support for GNU/Hurd, thanks Svante Signell for the patches + and bootstrap! (Closes: #668426). + + -- Matthias Klose Tue, 24 Apr 2012 08:44:15 +0200 + +gcc-4.7 (4.7.0-3ubuntu1) precise; urgency=low + + * Update to SVN 20120412 (r186372) from the gcc-4_7-branch. + - Fix PR libstdc++/52924, PR libstdc++/52591, PR middle-end/52894. + * Update the Linaro support to the 4.7-2012.04 release. + + -- Matthias Klose Thu, 12 Apr 2012 12:07:02 +0200 + +gcc-4.7 (4.7.0-3) unstable; urgency=low + + * Update to SVN 20120409 (r186249) from the gcc-4_7-branch. + - Fix PR libitm/52854, PR libstdc++/52476, PR target/52717, + PR tree-optimization/52406, PR c++/52596, PR c++/52796, + PR fortran/52893, PR fortran/52668. + + [ Matthias Klose ] + * Re-add missing dependency on libgcc in gcc-multilib. Closes: #667519. + * Add support for GNU locales for GNU/Hurd (Svante Signell). + Closes: #667662. + * Reenable the spu build on ppc64. Closes: #664617. + * Apply proposed patch for PR52894, stage1 bootstrap failure on hppa + (John David Anglin). Closes: #667969. + + [ Nobuhiro Iwamatsu ] + * Fix cross build targeting sh4. Closes: #663028. + * Enable -mieee by default on sh4. Closes: #665328. + + -- Matthias Klose Mon, 09 Apr 2012 22:24:14 +0200 + +gcc-4.7 (4.7.0-2) unstable; urgency=low + + * Update to SVN 20120403 (r186107) from the gcc-4_7-branch. + - Fix PR middle-end/52547, PR libstdc++/52540, PR libstdc++/52433, + PR target/52507, PR target/52505, PR target/52461, PR target/52508, + PR c/52682, PR target/52610, PR middle-end/52640, PR target/50310, + PR target/48596, PR target/48806, PR middle-end/52547, R target/52496, + PR rtl-optimization/52543, PR target/52461, PR target/52488, + PR target/52499, PR target/52148, PR target/52496, PR target/52484, + PR target/52506, PR target/52505, PR target/52461, PR other/52545, + PR c/52577, PR c++/52487, PR c++/52671, PR c++/52582, PR c++/52521, + PR fortran/52452, PR target/52737, PR target/52698, PR middle-end/52693, + PR middle-end/52691, PR middle-end/52750, PR target/52692, + PR middle-end/51893, PR target/52737, PR target/52736, PR middle-end/52720, + PR c++/52672, PR c++/52718, PR c++/52685, PR c++/52759, PR c++/52743, + PR c++/52746, PR libstdc++/52799, PR libgfortran/52758, + PR middle-end/52580, PR middle-end/52493, PR tree-optimization/52678, + PR tree-optimization/52701, PR tree-optimization/52754, + PR tree-optimization/52835. + + [ Matthias Klose ] + * Update NEWS files for 4.7. + * Include -print-multiarch option in gcc --help output. Closes: #656998. + * Don't build Go on MIPS. + * Update alpha-ieee.diff for 4.7. + * Update gcc-multiarch.diff for sh4 (untested). Closes: #665935. + * Update gcc-multiarch.diff for hppa (untested). Closes: #666162. + * Re-add build dependency on doxygen. + + [ Samuel Thibault ] + * debian/patches/ada-bug564232.diff: Enable on hurd too. + * debian/patches/ada-libgnatprj.diff: Add hurd configuration. + + -- Matthias Klose Tue, 03 Apr 2012 16:30:58 +0200 + +gcc-4.7 (4.7.0-1) unstable; urgency=low + + * GCC 4.7.0 release. + + -- Matthias Klose Fri, 23 Mar 2012 05:44:37 +0100 + +gcc-4.7 (4.7.0~rc2-1) experimental; urgency=low + + * GCC-4.7 release candidate 2 (r185376). + * libgo: Work around parse error of struct timex_ on ARM. + * Update libstdc++6 symbols files. + * Allow building Go from a separate source package. + * Don't configure with --enable-gnu-unique-object on kfreebsd and hurd. + * Include -print-multiarch option in gcc --help output. Closes: #656998. + * Disable Go on mips* (PR go/52586). + + -- Matthias Klose Wed, 14 Mar 2012 15:49:39 +0100 + +gcc-4.7 (4.7.0~rc1-2ubuntu1) precise; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream tarball. + + -- Matthias Klose Sun, 11 Mar 2012 20:31:13 +0100 + +gcc-4.7 (4.7.0~rc1-2) experimental; urgency=low + + * Update to SVN 20120310 (r185183) from the gcc-4_6-branch. + * Always configure with --enable-gnu-unique-object. LP: #949805. + * Enable Go for ARM on releases with working getcontext/setcontext. + + -- Matthias Klose Sat, 10 Mar 2012 23:29:45 +0100 + +gcc-4.7 (4.7.0~rc1-1ubuntu1) precise; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream tarball. + + -- Matthias Klose Fri, 02 Mar 2012 18:42:32 +0100 + +gcc-4.7 (4.7-4.7.0~rc1-1) experimental; urgency=low + + * GCC-4.7 release candidate 1 (r184777). + + [ Marcin Juszkiewicz ] + * Fix ARM sf/hf multilib dpkg-shlibdeps dependency generation. + + [ Matthias Klose ] + * PR go/52218, don't build Go on ARM, getcontext/setcontext exists, + but return ENOSYS. + * Fix multiarch build on ia64. + * Fix path calculation for the libstdc++ -gdb.py file when installed into + multiarch locations. Closes: #661385. LP: #908163. + * Disable Go on sparc (libgo getcontext/setcontext check failing). + + [ Thorsten Glaser ] + * Apply patch from Alan Hourihane to fix err_bad_abi testcase on m68k. + + [ Jonathan Nieder ] + * libstdc++6: Depends on libc (>= 2.11) for STB_GNU_UNIQUE support + (Eugene V. Lyubimkin). Closes: #584572. + * libstdc++6, libobjc2, libgfortran3, libmudflap0, libgomp1: Breaks + pre-multiarch gcc. Closes: #651550. + * libstdc++6: Lower priority from required to important. Closes: #661118. + + [Samuel Thibault] + * Remove local patch, integrated upstream. Closes: ##661859. + + -- Matthias Klose Fri, 02 Mar 2012 18:42:56 +0100 + +gcc-4.7 (4.7-2012024-0ubuntu1) precise; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120224 (r184508). + + -- Matthias Klose Fri, 24 Feb 2012 14:02:55 +0100 + +gcc-4.7 (4.7-20120210-1) precise; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120210 (r184114). + * kbsd-gnu.diff: Remove, integrated upstream. + * Strip whitespace from with_libssp definition. Closes: #653255. + * Remove soft-float symbols from 64bit powerpc libgcc1 symbols files. + * Fix control file generation for cross packages. LP: #913734. + + -- Matthias Klose Fri, 10 Feb 2012 21:38:12 +0100 + +gcc-4.7 (4.7-20120205-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120205 (r183903). + * Enable Go on arm*, ia64, mips*, powerpc, s390*, sparc*. + * libgo: Fix ioctl macro extracton. + * Fix PR middle-end/52074, ICE in libgo on powerpc. + * Revert: * Install static libc++{98,11} libraries. + * Don't strip a `/' sysroot from the C++ include directories. + Closes: #658442. + + -- Matthias Klose Sun, 05 Feb 2012 09:16:03 +0100 + +gcc-4.7 (4.7-20120129-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120129 (r183674). + * Configure --with-sysroot for wheezy and sid. + * Install static libc++{98,11} libraries. + * Install libstdc++ gdb.py file into /usr/lib/debug. + * Just copy libstdc++convenience.a for the libstdc++_pic installation. + * Remove trailing dir separator from system root. + + -- Matthias Klose Sun, 29 Jan 2012 08:19:27 +0100 + +gcc-4.7 (4.7-20120121-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120121 (r183370). + + [ Matthias Klose ] + * Fix C++ include paths when configured --with-system-root. + + [ Marcin Juszkiewicz ] + * Fix control file generation for ARM multiarch cross builds. + + -- Matthias Klose Sat, 21 Jan 2012 20:24:29 +0100 + +gcc-4.7 (4.7-20120107-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120107 (r182981). + + * On armel/armhf, allow g*-multilib installation using the runtime + libraries of the corresponding multiarch architecture. + * Fix location of .jinfo files. Addresses: #654579. + * Replace Fortran 95 with Fortran in package descriptions. + + -- Matthias Klose Sat, 07 Jan 2012 21:24:56 +0100 + +gcc-4.7 (4.7-20111231-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20111231 (r182754). + + [ Aurelien Jarno ] + * Re-enable parallel builds on kfreebsd-i386, as the problem from bug + #637236 only affects kfreebsd-amd64. + + [ Matthias Klose ] + * Fix generating libphobos dependency for gdc. Addresses: #653078. + * Link libmudflapth.so with -lpthread. + + -- Matthias Klose Sat, 31 Dec 2011 09:42:13 +0100 + +gcc-4.7 (4.7-20111222-1) experimental; urgency=low + + * Update to SVN 20111222 (r182617) from the trunk. + + [Matthias Klose] + * Remove obsolete ARM patch. + * Install loongson.h header. + * Update libgcc and libstdc++ symbols files. + + [Samuel Thibault] + * Update hurd patch for 4.7, fixing build failure. Closes: #652693. + + [Robert Millan] + * Update kbsd-gnu.diff for the trunk. + + -- Matthias Klose Thu, 22 Dec 2011 10:52:01 +0100 + +gcc-4.7 (4.7-20111217-2) experimental; urgency=low + + * Don't provide 4.6.x symlinks. + * Disable multilib for armhf. + * Fix spu installation. + + -- Matthias Klose Sun, 18 Dec 2011 17:22:10 +0100 + +gcc-4.7 (4.7-20111217-1) experimental; urgency=low + + * GCC-4.7 snapshot build. + - Including the GFDL documentation; will stay in experimental + until the 4.7.0 release sometime next year. + * Update patches for the trunk. + * Update symbols files. + * Build libitm packages. + + -- Matthias Klose Sat, 17 Dec 2011 23:19:46 +0100 + +gcc-4.6 (4.6.2-9) unstable; urgency=medium + + * Update to SVN 20111217 (r182430) from the gcc-4_6-branch. + - Fix PR c++/51331. + * Fix build dependencies for armel/armhf. + + -- Matthias Klose Sat, 17 Dec 2011 10:40:26 +0100 + +gcc-4.6 (4.6.2-8) unstable; urgency=low + + * Update to SVN 20111216 (r182407) from the gcc-4_6-branch. + - Fix PR tree-optimization/51485, PR tree-optimization/50569, PR c++/51248, + PR c++/51406, PR c++/51161, PR rtl-optimization/49720, PR fortran/50923, + PR fortran/51338, PR fortran/51550, PR fortran/47545, PR fortran/49050, + PR fortran/51075. + + [ Matthias Klose ] + * gdc-4.6: Provide -{gdc,gdmd}-4.6 symlinks. + + [Ludovic Brenta] + Merge from gnat-4.6 (4.6.2-2) unstable; urgency=low + [Євгеній Мещеряков] + * debian/patches/pr47818.diff: new. Fixes: #614402. + * debian/rules.patch: apply it. + + Merge from gnat-4.6 (4.6.2-1) unstable; urgency=low + [Ludovic Brenta] + * Suggest ada-reference-manual-{html,info,pdf,text} instead of just + ada-reference-manual which no longer exists. + * Do not suggest gnat-gdb, superseded by gdb. + * Downgrade libgnat{vsn,prj}4.6-dev to priority extra; they conflict + with their 4.4 counterparts and priority optional packages may not + conflict with one another, per Policy 2.5. + + -- Matthias Klose Fri, 16 Dec 2011 16:59:30 +0100 + +gcc-4.6 (4.6.2-7) unstable; urgency=medium + + * Update to SVN 20111210 (r182189) from the gcc-4_6-branch. + - Fix PR rtl-optimization/51469, PR tree-optimization/51466, + PR tree-optimization/50078, PR target/51408, PR fortran/51310, + PR fortran/51448. + + -- Matthias Klose Sat, 10 Dec 2011 20:12:33 +0100 + +gcc-4.6 (4.6.2-6) unstable; urgency=low + + * Update to SVN 20111208 (r182120) from the gcc-4_6-branch. + - Fix PR c++/51265, PR bootstrap/50888, PR target/51393 (ix86), + PR target/51002 (AVR), PR target/51345 (AVR), PR debug/48190, + PR fortran/50684, PR fortran/51218, PR target/50906 (closes: #650318), + PR tree-optimization/51315 (closes: #635126), PR tree-optimization/50622, + PR fortran/51435, PR debug/51410, PR c/51339, PR rtl-optimization/48721, + PR middle-end/51323 (LP: #897583), PR middle-end/50074, + PR middle-end/50074. + + [ Matthias Klose ] + * Run the libstdc++ testsuite on all architectures again. Closes: #622699. + * Apply proposed patch for PR target/50906 (powerpcspe only). Closes: #650318. + * Fix PR target/49030 (ARM), taken from Linaro. Closes: #633479. + * Fix PR target/50193 (ARM), taken from Linaro. Closes: #642127. + * Install the libstdc++.so-gdb.py file. LP: #883269. + * Fix PR c++/50114, backport from trunk. LP: #827806. + * Merge changes to allow gcc-snapshot cross builds, taken from Linaro. + * Update the Linaro support to the 4.6 branch. + + [ Marcin Juszkiewicz ] + * Fix issues with gcc-snapshot cross builds. + * Allow building Linaro binary packages in a single package. + * Apply hardening patches for cross builds when enabled for native builds. + + -- Matthias Klose Thu, 08 Dec 2011 17:14:35 +0100 + +gcc-4.6 (4.6.2-5) unstable; urgency=low + + * Update to SVN 20111121 (r181596) from the gcc-4_6-branch. + - Fix PR c++/50870, PR c++/50608, PR target/47997, PR target/48108, + PR target/45233, PR middle-end/51077, PR target/30282, PR c++/50608, + PR target/50979, PR target/4810, PR rtl-optimization/51187, + PR target/50493, PR target/49992, PR target/49641, PR c++/51150, + PR target/50678, PR libstdc++/51142, PR libstdc++/51133. + + [ Matthias Klose ] + * Use the default gcc as stage1 compiler for all architectures. + + [ Marcin Juszkiewicz ] + * debian/control.m4: Use BASEDEP in more places. + * Work around debhelper not calling the correct strip for cross builds. + * Drop dpkg-cross build dependency for cross builds. + + -- Matthias Klose Mon, 21 Nov 2011 22:26:49 +0100 + +gcc-4.6 (4.6.2-4) unstable; urgency=low + + * Update to SVN 20111103 (r180830) from the gcc-4_6-branch. + - Fix PR target/50691, PR c++/50901, PR target/50945, + PR rtl-optimization/47918, PR libstdc++/50880. + + * Configure the armel build by explicitly passing --with-arch=armv4t + --with-float=soft. + * libffi: Simplify PowerPC assembly and avoid CPU-specific string + instructions (Kyle Moffett). + * Fix MULTIARCH_DIRNAME on powerpcspe (Kyle Moffett). Closes: #647324. + + -- Matthias Klose Thu, 03 Nov 2011 12:03:41 -0400 + +gcc-4.6 (4.6.2-3) unstable; urgency=low + + * disable parallel builds on kfreebsd-* even if DEB_BUILD_OPTIONS + enables them (continued investigation for #637236). + + -- Ludovic Brenta Sat, 29 Oct 2011 00:42:46 +0200 + +gcc-4.6 (4.6.2-2) unstable; urgency=low + + * Update to SVN 20111028 (r180603) from the gcc-4_6-branch. + - Fix PR target/50875. + + * Fix gcj, gdc and gnat builds, broken by the stage1 cross-compiler + package dependency fixes. + * Update the Linaro support to the 4.6 branch. + * Fix gcc-4.6-hppa64 installation. Closes: #646805. + * For ARM hard float, set the dynamic linker to + /lib/arm-linux-gnueabihf/ld-linux.so.3. + * Don't use parallel builds on kfreebsd. + + -- Matthias Klose Fri, 28 Oct 2011 16:36:55 +0200 + +gcc-4.6 (4.6.2-1) unstable; urgency=low + + * GCC 4.6.2 release. + + * Fix libgcc installation into /usr/lib/gcc//4.6. Closes: #645021. + * Fix stage1 cross-compiler package dependencies (Kyle Moffett). + Closes: #644439. + + -- Matthias Klose Wed, 26 Oct 2011 13:10:44 +0200 + +gcc-4.6 (4.6.1-16) unstable; urgency=medium + + * Update to SVN 20111019 (r180208) from the gcc-4_6-branch. + - Fix PR target/49967 (ia64), PR tree-optimization/50189, PR fortran/50273, + PR tree-optimization/50700, PR c/50565 (closes: #642144), + PR target/49965 (sparc), PR middle-end/49801, PR c++/49216, + PR c++/49855, PR c++/49896, PR c++/44473, PR c++/50611, PR fortran/50659, + PR tree-optimization/50723, PR tree-optimization/50712, PR obj-c++/48275, + PR c++/50618, PR fortran/47023, PR fortran/50570, PR fortran/50718, + PR libobjc/49883, PR libobjc/50002, PR target/50350, PR middle-end/50386, + PR middle-end/50326, PR target/50737, PR c++/50787, PR c++/50531, + PR fortran/50016, PR target/50737. + + [ Matthias Klose ] + * Fix libjava installation into /usr/lib/gcc//4.6. + * Fix powerpc and ppc64 libffi builds (Kyle Moffett). + * Apply proposed patch for PR target/50350. Closes: #642313. + * Re-apply the fix for PR tree-optimization/49911 on ia64. + * Apply proposed patch for PR target/50106 (ARM). + + [Xavier Grave] + * debian/patches/address-clauses-timed-entry-calls.diff: new; backport + bug fix about address clauses and timed entry calls. + + [Ludovic Brenta] + * debian/patches/ada-kfreebsd-gnu.diff: new; provide dummy + implementations of some optional POSIX Threads functions missing in + GNU/kFreeBSD. Closes: #642128. + + -- Matthias Klose Thu, 20 Oct 2011 00:24:13 +0200 + +gcc-4.6 (4.6.1-15) unstable; urgency=low + + * Update to SVN 20111010 (r179753) from the gcc-4_6-branch. + - Fix PR target/50652. + * Update the Linaro support to the 4.6-2011.10-1 release. + * Fix gcc-spu installation. + * Restore symlink for subminor GCC version. Closes: #644849. + + -- Matthias Klose Mon, 10 Oct 2011 17:10:40 +0200 + +gcc-4.6 (4.6.1-14) unstable; urgency=low + + * Update to SVN 20111008 (r179710) from the gcc-4_6-branch. + - Fix PR inline-asm/50571, PR c++/46105, PR c++/50508, PR libstdc++/50529, + PR libstdc++/49559, PR c++/40831, PR fortran/48706, PR target/49049, + PR tree-optimization/49279, PR fortran/50585, PR fortran/50625, + PR libstdc++/48698. + + [ Matthias Klose ] + * Configure and build to install into /usr/lib/gcc//4.6. + Closes: #643891. + * libgcc1: Versioned break to gcc-4.3. + * Fix gcc-multiarch for i386-linux-gnu with disabled multilibs. + * libffi: Fix PowerPC soft-floating-point support (Kyle Moffett). + + [ Marcin Juszkiewicz ] + * Enable gcc-snapshot cross builds. + + [ Iain Buclaw ] + * Port gdc to GCC-4.6. + + [ Aurelien Jarno ] + * Backport fix for PR target/49696 from the trunk (Closes: #633443). + + -- Matthias Klose Sat, 08 Oct 2011 14:40:49 +0200 + +gcc-4.6 (4.6.1-13) unstable; urgency=low + + * Update to SVN 20110926 (r179207) from the gcc-4_6-branch. + - Fix PR tree-optimization/50472, PR tree-optimization/50413, + PR tree-optimization/50412, PR c++/20039, PR c++/42844, + PR libstdc++/50510, PR libstdc++/50509. + * Revert the fix for PR tree-optimization/49911, bootstrap error on ia64. + * libffi: Define FFI_MMAP_EXEC_WRIT on kfreebsd-* (Petr Salinger). + + -- Matthias Klose Mon, 26 Sep 2011 19:59:55 +0200 + +gcc-4.6 (4.6.1-12) unstable; urgency=low + + * Update to SVN 20110924 (r179140) from the gcc-4_6-branch. + - Fix PR target/50464, PR target/50341, PR middle-end/49886, + PR target/50091, PR c++/50491, PR c++/50442 (Closes: #642176). + + -- Matthias Klose Sat, 24 Sep 2011 10:39:32 +0200 + +gcc-4.6 (4.6.1-11) unstable; urgency=low + + * Update to SVN 20110917 (r178926) from the gcc-4_6-branch. + - Fix PR c++/50424, PR c++/48320, PR fortran/49479. + + [ Matthias Klose ] + * Update the Linaro support to the 4.6-2011.09-1 release. + + [ Aurelien Jarno ] + * gcc.c (for_each_path): Allocate memory for multiarch suffix. + + -- Matthias Klose Sat, 17 Sep 2011 10:53:36 +0200 + +gcc-4.6 (4.6.1-10) unstable; urgency=medium + + * Update to SVN 20110910 (r178746) from the gcc-4_6-branch. + - Fix PR middle-end/50266, PR tree-optimization/49911, + PR tree-optimization/49518, PR tree-optimization/49628, + PR tree-optimization/49628, PR target/50310, PR target/50289, + PR c++/50255, PR c++/50309, PR c++/49267, PR libffi/49594. + - Revert fix for PR middle-end/49886, causing PR middle-end/50295. + + -- Matthias Klose Sat, 10 Sep 2011 03:38:48 +0200 + +gcc-4.6 (4.6.1-9) unstable; urgency=low + + * Update to SVN 20110903 (r178501) from the gcc-4_6-branch. + - Fix PR target/50090, PR middle-end/50116, PR target/50202, PR c/50179, + PR c++/50157, PR fortran/50163, PR libfortran/50192, + PR middle-end/49886, PR tree-optimization/50178, PR c++/50207, + PR c++/50089, PR c++/50220, PR c++/50234, PR c++/50224, + PR libstdc++/50268. + + [ Matthias Klose ] + * Fix gcc --print-multilib-osdir for non-biarch architectures. + * Fix multiarch for non-biarch builds. Closes: #635860. + * Move the lto plugin to the cpp packge. Closes: #639531. + + [ Thorsten Glaser ] + * [m68k] Disable multilib. Closes: #639303. + + -- Matthias Klose Sat, 03 Sep 2011 20:11:50 +0200 + +gcc-4.6 (4.6.1-8) unstable; urgency=low + + * Update to SVN 20110824 (r178027) from the gcc-4_6-branch. + Fix PR fortran/49792, PR tree-optimization/48739, PR target/50092, + PR c++/50086, PR c++/50054, PR fortran/50050, PR fortran/50130, + PR fortran/50129, PR fortran/49792, PR fortran/50109, PR c++/50024, + PR c++/46862. + + * Properly disable multilib builds for selected libraries on armel and armhf. + * Update and re-enable the gcc-ice patch. + * Update and re-enable the gcc-cloog-dl patch. + * Fix [ARM] PR target/50090: aliases in libgcc.a with default visibility, + taken from the trunk. + * Re-work the multiarch patches. + * Break older gcj-4.6 and gnat-4.6 versions, changed gcc_lib_dir. + * Omit the target alias from the go libdir. + * Linaro updates from the 4.6-2011.07-stable branch. + * Revert: + - libjava: Build with the system libffi PIC library. + * For native builds, gcc -print-file-name now resolve . and .., + and removes the subminor version number. + + -- Matthias Klose Wed, 24 Aug 2011 10:22:42 +0200 + +gcc-4.6 (4.6.1-7) unstable; urgency=low + + * Update to SVN 20110816 (r177780) from the gcc-4_6-branch. + - Fix PR middle-end/49923. + + [ Matthias Klose ] + * gcc-4.6-multilib: Depend on biarch quadmath library. Closes: #637174. + * Don't hard-code build dependency on gcc-multilib. + * Build-depends on python when building java. + * Fix thinko in java::lang::Class::finalize (taken from the trunk). + * Add support for ARM 64bit sync intrinsics (David Gilbert). Only + enable for armv7 or better. + * libjava: Build with the system libffi PIC library. + * Disable gnat multilib builds on armel and armhf. + + Merge from gnat-4.6 (4.6.1-4) unstable; urgency=low + + [Ludovic Brenta] + * debian/patches/ada-symbolic-tracebacks.diff + (src/gcc/ada/gcc-interface/Makefile.in): pass -iquote instead of -I- + to gnatgcc; fixes FTBFS on i386 and closes: #637418. + + Merge from gnat-4.6 (4.6.1-3) unstable; urgency=low + + [Євгеній Мещеряков] + * debian/patches/ada-mips.diff: do not use the alternate stack on mips, + as on mipsel. Closes: #566234. + + [Ludovic Brenta] + * debian/patches/pr49940.diff: new; copy the definition of function + lwp_self from s-osinte-freebsd.ads to s-osinte-kfreebsd-gnu.ads. + Closes: #636291. + * debian/patches/pr49944.diff: new. Closes: #636692. + * debian/patches/pr49819.diff: drop, merged upstream. + + -- Matthias Klose Tue, 16 Aug 2011 13:11:25 +0200 + +gcc-4.6 (4.6.1-6) unstable; urgency=low + + * Update to SVN 20110807 (r177547) from the gcc-4_6-branch. + - Fix PR rtl-optimization/49799, PR debug/49871, PR target/47364, + PR target/49866, PR tree-optimization/49671, PR target/39386, + PR ada/4981, PR fortran/45586, PR fortran/49791, PR middle-end/49897, + PR middle-end/49898, PR target/49920, PR target/47908 (closes: #635919), + PR c++/43886, PR c++/49593, PR c++/49803, PR c++/49924, PR c++/49260, + PR fortran/49885, PR fortran/48876, PR libstdc++/49925, PR target/50001, + PR tree-optimization/49948, PR c++/48993, PR c++/49921, PR c++/49669, + PR c++/49988, PR fortran/49112. + + [ Aurelien Jarno ] + * Update patches/kbsd-gnu.diff for recent changes. Closes: #635195. + * Add s390x support. + + [ Marcin Juszkiewicz ] + * Fixes for multilib cross builds. LP: #816852, #819147. + + [ Matthias Klose ] + * Fix libgo installation for cross builds. + * Only apply arm-multilib when building for multilib. + + -- Matthias Klose Sun, 07 Aug 2011 18:20:00 +0200 + +gcc-4.6 (4.6.1-5) unstable; urgency=low + + * Update to SVN 20110723 (r176672) from the gcc-4_6-branch. + - Fix PR target/49541, PR tree-optimization/49768, PR middle-end/49675, + PR target/49746, PR middle-end/49732, PR tree-optimization/49725, + PR target/49723, PR target/49541, PR tree-opt/49309, PR c++/49785, + PR ada/48711, PR ada/46350, PR fortran/49648, PR testsuite/49753, + PR tree-optimization/49309, PR tree-optimization/45819, PR target/49600, + PR fortran/49708, PR libstdc++/49293. + * Update the Linaro support to the 4.6-2011.07-0 release. + - Fix PR target/49335. LP: #791327. + * Update gcc-multiarch: + - Add -print-multiarch option. + - Fix library path for non-default multilib(s). + - Handle `.' in MULTILIB_DIRNAMES. + * Add support to build multilib on armel and armhf, only enable it for + Ubuntu/oneiric. LP: #810360. + * cpp-4.6: Add empty multiarch directories for the non-default multilibs, + needed for relative lookups from startfile_prefixes. + * Fix PR c++/49756, backport from trunk. LP: #721378. + * libgcc1: Add breaks to gcc-4.1 and gcc-4.3. Closes: #634821. + * Configure for DEB_TARGET_MULTIARCH defaults. + + -- Matthias Klose Sat, 23 Jul 2011 08:15:50 +0200 + +gcc-4.6 (4.6.1-4) unstable; urgency=low + + * Update to SVN 20110714 (r176280) from the gcc-4_6-branch. + - Fix PR tree-optimization/49094, PR target/39633, PR c++/49672, + PR fortran/49698, PR fortran/49690, PR fortran/49562, PR libfortran/49296, + PR target/49487, PR tree-optimization/49651, PR ada/48711. + + [ Matthias Klose ] + * Build Go on alpha for gcc-snapshot builds. + * For multicore ARM, clear both caches, not just the dcache (proposed + patch by Andrew Haley). + * Fix for PR rtl-optimization/{48830,48808,48792}, taken from the trunk. + LP: #807573. + * Fix PR tree-optimization/49169, optimisations strip the Thumb/ARM mode bit + off function pointers (Richard Sandiford). LP: #721531. + + [ Marcin Juszkiewicz ] + * Define DEB_TARGET_MULTIARCH macro. + * debian/rules2: Macro and configuration consolidation. + + -- Matthias Klose Thu, 14 Jul 2011 19:38:49 +0200 + +gcc-4.6 (4.6.1-3) unstable; urgency=medium + + * Update to SVN 20110709 (r176108) from the gcc-4_6-branch. + - Fix PR target/49335, PR tree-optimization/49618, PR c++/49598, + PR fortran/49479, PR target/49621, PR target/46779, PR target/49660, + PR c/49644, PR debug/49522, PR debug/49522, PR middle-end/49640, + PR c++/48157, PR c/49644, PR fortran/48926. + - Apparently fixes a boost issue. Closes: #632938. + * Apply proposed patch for PR fortran/49690. Closes: #631204. + + * README.Debian: New section 'Former and/or inactive maintainers'. + + -- Matthias Klose Sun, 10 Jul 2011 00:04:34 +0200 + +gcc-4.6 (4.6.1-2) unstable; urgency=medium + + * Update to SVN 20110705 (r175840) from the gcc-4_6-branch. + - Fix PR target/47997, PR c++/49528, PR c++/49440, PR c++/49418, + PR target/44643, PR tree-optimization/49615, PR tree-optimization/49572, + PR target/34734, PR tree-optimization/49539, PR tree-optimizations/49516, + PR target/49089, PR rtl-optimization/49014, PR target/48273, + PR fortran/49466, PR libfortran/49296, PR libffi/46660, PR debug/49262, + PR rtl-optimization/49472, PR rtl-optimization/49619, PR fortran/49623, + PR fortran/49540. + + [Ludovic Brenta, Євгеній Мещеряков, Xavier Grave] + * Adjust patches to GCC 4.6. + * Remove patches merged upstream: + - debian/patches/ada-arm-eabi.diff + - debian/patches/ada-bug589164.diff + - debian/patches/ada-bug601133.diff + - debian/patches/ada-gnatvsn.diff + - debian/patches/ada-mips.diff + - debian/patches/ada-polyorb-dsa.diff + + [Ludovic Brenta] + * debian/patches/ada-acats.diff: set LD_LIBRARY_PATH, ADA_INCLUDE_PATH + and ADA_OBJECTS_PATH so that the GNAT testsuite runs. + * debian/patches/adalibgnat{vsn,prj}.diff, + debian/rules.d/binary-ada.mk: install libgnat{vsn,prj}.so.* in the correct + multiarch directory. + * debian/control.m4, debian/rules.d/binary-ada.mk: move the SJLJ version + of the Ada run-time library to a new package, gnat-4.6-sjlj. + * debian/control.m4 (libgnatvsn4.6, libgnatvsn4.6-dbg, libgnatprj4.6, + libgnatprj4.6-dbg): pre-depend on multiarch-support and add + Multi-Arch: same. + + [Nicolas Boulenguez] + * debian/rules.d/binary-ada.mk: add gnathtml to the package gnat-4.6. + * debian/gnat.1: remove the version number of GCC. Mention gnathtml. + + [ Matthias Klose ] + * Do not install the spu and hppa64 cross compilers into the multiarch path. + * Update the Linaro support to 20110704. + + [ Thorsten Glaser ] + * Apply changes from src:gcc-4.4 for m68k support. Closes: #632380. + - debian/rules.defs: Remove m68k from locale_no_cpus. + - debian/patches/gcc-multiarch.diff: Add m68k multiarch_mappings. + - debian/patches/pr43804.diff: Fix backported from SVN. + - debian/rules.patch: Add pr43804. + + -- Matthias Klose Tue, 05 Jul 2011 10:45:56 +0200 + +gcc-4.6 (4.6.1-1) unstable; urgency=low + + * GCC 4.6.1 release. + + [Ludovic Brenta] + * debian/patches/ada-gnatvsn.diff, + debian/patches/ada-polyorb-dsa.diff: remove backports, no longer + needed. + + [ Matthias Klose ] + * Fix plugin header installation. Closes: #631082. + * Stop passing -Wno-error=unused-but-set-parameter and + -Wno-error=unused-but-set-variable if -Werror is present. + This was a temporary workaround introduced in 4.6.0~rc1-2. Closes: #615157. + * gcc-4.6-spu: Install the lto plugin. Closes: #631772. + + -- Matthias Klose Mon, 27 Jun 2011 13:54:04 +0200 + +gcc-4.6 (4.6.0-14) unstable; urgency=low + + * Update to SVN 20110616 (r175102) from the gcc-4_6-branch. + - Fix PR debug/48459, PR fortran/49103, PR rtl-optimization/49390, + PR c++/49117, PR c++/49369, PR c++/49290, PR target/44618, + PR tree-optimization/49419 (closes: #630567). + * Update the Linaro support to the 4.6-2011.06-0 release. + + -- Matthias Klose Thu, 16 Jun 2011 16:10:33 +0200 + +gcc-4.6 (4.6.0-13) unstable; urgency=low + + * Update to SVN 20110611 (r174958) from the gcc-4_6-branch. + * Extend multiarch support for mips/mipsel. + * Fix control files for gcj multiarch builds. + * Update libstdc++ symbols files. + + -- Matthias Klose Sat, 11 Jun 2011 20:49:42 +0200 + +gcc-4.6 (4.6.0-12) unstable; urgency=medium + + * Update to SVN 20110608 (r174800) from the gcc-4_6-branch. + - PR target/49186, PR rtl-optimization/49235, PR tree-optimization/48702, + PR tree-optimization/49243, PR c++/49134, PR target/49238, + PR gcov-profile/49299, PR c++/48780, PR c++/49298, PR fortran/49268. + * Fix c++ biarch header installation on i386. LP: #793411. + * Enable multiarch. + * Add multiarch attributes for gnat and libgnat packages. + * Add multiarch attributes for libgcj* packages. + * Adjust build dependency on multiarch glibc. + + -- Matthias Klose Wed, 08 Jun 2011 11:26:52 +0200 + +gcc-4.6 (4.6.0-11) unstable; urgency=low + + * Update to SVN 20110604 (r174637) from the gcc-4_6-branch. + - Fix PR c++/49165, PR tree-optimization/49218, PR target/45263, + PR target/43700, PR target/43995, PR tree-optimization/49217, + PR c++/49223, PR c++/47049, PR c++/47277, PR c++/48284, PR c++/48657, + PR c++/49176, PR fortran/48955, PR tree-optimization/49038, + PR tree-optimization/49093, PR middle-end/48985, PR middle-end/48953, + PR c++/49276, PR fortran/49265, PR fortran/45786. + * Configure the hppa64 and spu cross builds with --enable-plugin. + + -- Matthias Klose Sat, 04 Jun 2011 16:12:27 +0200 + +gcc-4.6 (4.6.0-10) unstable; urgency=high + + * Update to SVN 20110526 (r174290) from the gcc-4_6-branch. + - Fix PR target/44643, PR c++/49165, PR tree-optimization/49161, + PR target/49128, PR tree-optimization/44897, PR target/49133, + PR c++/44994, PR c++/49156, PR c++/45401, PR c++/44311, PR c++/44311, + PR c++/45698, PR c++/46145, PR c++/46245, PR c++/46696, PR c++/47184, + PR c++/48935, PR c++/45418, PR c++/45080, PR c++/48292, PR c++/49136, + PR c++/49042, PR c++/48884, PR c++/49105, PR c++/47263, PR c++/47336, + PR c++/47544, PR c++/48617, PR c++/48424, PR libstdc++/49141, + PR libobjc/48177. + * Proposed fix for PR tree-optimization/48702, PR tree-optimization/49144. + Closes: #627795. + * Proposed fix for PR fortran/PR48955. + * Add some conditionals to build the package on older releases. + + -- Matthias Klose Thu, 26 May 2011 16:00:49 +0200 + +gcc-4.6 (4.6.0-9) unstable; urgency=low + + * Update to SVN 20110524 (r174102) from the gcc-4_6-branch. + - Fix PR lto/49123, PR debug/49032, PR c/49120, PR middle-end/48973, + PR target/49104, PR middle-end/49029, PR c++/48647, PR c++/48945, + PR c++/48780, PR c++/49066, PR libstdc++/49058, PR target/49104. + * Use gcc-4.4 as the bootstrap compiler for kfreebsd to work around + a bootstrap issue. + + -- Matthias Klose Tue, 24 May 2011 09:41:35 +0200 + +gcc-4.6 (4.6.0-8) unstable; urgency=low + + * Update to SVN 20110521 (r173994) from the gcc-4_6-branch. + - Fix PR target/48986, PR preprocessor/48677, PR tree-optimization/48975, + PR tree-optimization/48822, PR debug/48967, PR debug/48159, + PR target/48857, PR target/48495, PR tree-optimization/48837, + PR tree-optimization/48611, PR tree-optimization/48794, PR c++/48859, + PR c++/48574, PR fortran/48889, PR target/49002, PR lto/48207, + PR tree-optimization/49039, PR tree-optimization/49018, PR lto/48703, + PR tree-optimization/48172, PR tree-optimization/48172, PR c++/48873, + PR tree-optimization/49000, PR c++/48869, PR c++/49043, PR c++/49082, + PR c++/48948, PR c++/48745, PR c++/48736, PR bootstrap/49086, + PR tree-optimization/49079, PR tree-optimization/49073. + * Update the Linaro support to the 4.6-2011.05-0 release. + * pr45979.diff: Update to the version from the trunk. + + -- Matthias Klose Sat, 21 May 2011 12:19:10 +0200 + +gcc-4.6 (4.6.0-7) unstable; urgency=low + + * Update to SVN 20110507 (r173528) from the gcc-4_6-branch. + - Fix PR middle-end/48597, PR c++/48656, PR fortran/48112, + PR fortran/48279, PR fortran/48788, PR tree-optimization/48809, + PR target/48262, PR fortran/48462, PR fortran/48746, + PR fortran/48810, PR fortran/48800, PR libstdc++/48760, + PR libgfortran/48030, PR preprocessor/48192, PR lto/48846, + PR target/48723, PR fortran/48894, PR target/48900, PR target/48252, + PR c++/40975, PR target/48252, PR target/48774, PR c++/48838, + PR c++/48749, PR ada/48844, PR fortran/48720, PR libstdc++/48750, + PR c++/48909, PR c++/48911, PR c++/48446, PR c++/48089. + + * Fix issue with volatile bitfields vs. inline asm memory constraints, + taken from the trunk, apply for ARM only. Addresses: #625825. + + -- Matthias Klose Sat, 07 May 2011 14:54:51 +0200 + +gcc-4.6 (4.6.0-6) unstable; urgency=low + + * Update to SVN 20110428 (r173059) from the gcc-4_6-branch. + - Fix PR c/48685 (closes: #623161), PR tree-optimization/48717, PR c/48716, + PR c/48742, PR debug/48768, PR tree-optimization/48734, + PR tree-optimization/48731, PR other/48748, PR c++/42687, PR c++/48726, + PR c++/48707, PR fortran/48588, PR libstdc++/48521, PR c++/48046, + PR preprocessor/48740. + * Update the ibm/gcc-4_6-branch to 20110428. + * Use gcc-4.6 as bootstrap compiler on kfreebsd-*. + + -- Matthias Klose Thu, 28 Apr 2011 10:33:52 +0200 + +gcc-4.6 (4.6.0-5) unstable; urgency=low + + * Update to SVN 20110421 (r172845) from the gcc-4_6-branch. + - Fix PR target/48288, PR tree-optimization/48611, PR lto/48148, + PR lto/48492, PR fortran/47976, PR c++/48594, PR c++/48657, + PR c++/46304, PR target/48708, PR middle-end/48695. + + * Update the Linaro support to the 4.6-2011.04-0 release. + + -- Matthias Klose Thu, 21 Apr 2011 22:50:25 +0200 + +gcc-4.6 (4.6.0-4) unstable; urgency=medium + + * Update to SVN 20110419 (r172584) from the gcc-4_6-branch. + - Fix PR target/48678, PR middle-end/48661, PR tree-optimization/48616, + PR lto/48538, PR c++/48537, PR c++/48632, PR testsuite/48675, + PR libstdc++/48635, PR libfortran/47571. + + [ Aurelien Jarno ] + * Enable SSP on mips/mipsel. + + [ Matthias Klose ] + * (Build-)depend on binutils 2.21.51. + + -- Matthias Klose Tue, 19 Apr 2011 23:45:16 +0200 + +gcc-4.6 (4.6.0-3) unstable; urgency=high + + * Update to SVN 20110416 (r172584) from the gcc-4_6-branch. + - Fix PR rtl-optimization/48143, PR target/48142, PR target/48349, + PR debug/48253, PR fortran/48291, PR target/16292, PR c++/48280, + PR c++/48212, PR c++/48369, PR c++/48281, PR c++/48265, PR lto/48246, + PR libstdc++/48398, PR bootstrap/48431, PR tree-optimization/48377, + PR debug/48343, PR rtl-optimization/48144, PR debug/48466, PR c/48517, + PR middle-end/48335, PR c++/48450, PR target/47829, PR c++/48534, + PR c++/48523, PR libstdc++/48566, PR libstdc++/48541, PR target/48366, + PR libstdc++/48465, PR middle-end/48591, PR target/48605, + PR middle-end/48591, PR target/48090, PR tree-optimization/48195, + PR rtl-optimization/48549, PR c++/48594, PR c++/48570, PR c++/48574, + PR fortran/48360, PR fortran/48456, PR libstdc++/48631, + PR libstdc++/48635, PR libstdc++/48476. + + [ Matthias Klose ] + * libjava-jnipath.diff: Add /usr/lib//jni as jnipath too. + * Add mudflap support for varargs (patch taken from the trunk). + * gcc-4.6-plugin-dev: Install gtype.state. + * Bootstrap with gcc-4.4 -g -O2 on armel. + * Fix linker plugin configuration. Closes: #620661. + * Update the Linaro support for GCC-4.6. + * gcc-snapshot builds: + - Fix build with multiarch changes. + - Use gcc-snapshot as the bootstrap compiler on armel. + - Re-enable building java in the gcc-snapshot package. + * Build supporting multiarch on wheezy/sid. + * Adjust (build)-dependency to new libgmp-dev name. + + [ Marcin Juszkiewicz ] + * Configure stage1 cross builds with --disable-libquadmath. + + -- Matthias Klose Sat, 16 Apr 2011 17:02:30 +0200 + +gcc-4.6 (4.6.0-2) unstable; urgency=low + + * Update to SVN 20110329 (r171700) from the gcc-4_6-branch. + - Fix PR bootstrap/48135, PR target/47553, PR middle-end/48269, + PR tree-optimization/48228, PR middle-end/48134, PR middle-end/48031, + PR other/48179, PR other/48221, PR other/48234, PR target/48237, + PR debug/48204, PR c/42544, PR c/48197, PR rtl-optimization/48141, + PR rtl-optimization/48141, PR c++/48166, PR c++/48296, PR c++/48289, + PR c++/47999, PR c++/48313, Core 1232, Core 1148, PR c++/47504, + PR c++/47570, PR preprocessor/48248, PR c++/48319. + + [ Matthias Klose ] + * Update NEWS files. + * Configure the hppa64 cross build with --disable-libquadmath. + * Don't build armhf from the Linaro branch. + * Don't try to build Go on sh4. + + [ Marcin Juszkiewicz ] + * Fixes issues with staged cross builds. LP: #741855, #741853. + * Fix libdir setting for multiarch enabled cross builds. LP: #741846. + * Drop alternatives for cross builds. LP: #676454. + + -- Matthias Klose Tue, 29 Mar 2011 23:22:07 +0200 + +gcc-4.6 (4.6.0-1) unstable; urgency=low + + * GCC 4.6.0 release. + + * Build the gold LTO plugin for ppc64 (Hiroyuki Yamamoto). Closes: #618865. + * Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX, + taken from the trunk. + * Fix PR target/47487 ICE building libgo, taken from the trunk. + * Merge multiarch changes from the gcc-4.5 package. + * Apply proposed patch to reduce the overhead of dwarf2 location tracking. + Addresses: #618748. + + -- Matthias Klose Sat, 26 Mar 2011 03:03:21 +0100 + +gcc-4.6 (4.6.0~rc1-3) experimental; urgency=low + + * GCC 4.6.0 release candidate 2. + + -- Matthias Klose Tue, 22 Mar 2011 22:11:42 +0100 + +gcc-4.6 (4.6.0~rc1-2) experimental; urgency=low + + [ Loic Minier ] + * Rework config/vxworks-dummy.h installation snippet to test + DEB_TARGET_GNU_CPU against patterns close to the upstream ones (arm% mips% + sh% sparc%) as to also install this header on other ports targetting the + relevant upstream CPUs such as armhf. Add a comment pointing at the + upstream bug. + * Update __aeabi symbol handling to test whether DEB_TARGET_GNU_TYPE matches + arm-linux-gnueabi% instead of testing whether DEB_TARGET_ARCH equals + armel. Add a comment pointing at the Debian bug and indicating that this + is only useful for older dpkg-dev versions. + * debian/rules.def: fix "armel" entry to "arm" in list of + DEB_TARGET_ARCH_CPUs for Debian experimental GCC 4.5/4.6 libraries. + * debian/rules2: drop commented out GCC #42509 workaround as this was fixed + upstream in 4.4+. + * Change bogus DEB_TARGET_GNU_CPU test on armel and armhf to just test for + arm as ths is what the Debian arm, armel and armhf port use. + * Rework snippet setting armv7 on Debian armhf / Ubuntu to avoid + duplication, as a comment called out for. + * Use "arm" instead of armel/armhf in DEB_TARGET_GNU_CPU test when deciding + whether to enable profiledbootstrap. + * Set DEJAGNU_TIMEOUT=600 on Ubuntu armhf as well. + * Fix a couple more uses of armel or armhf against DEB_TARGET_GNU_CPU. + * Patched a couple of comments mentioning armel to also mention armhf. + * Add patch armhf-triplet-backport, support for arm-linux-*eabi* backported + from a patch sent on the upstream mailing-list. + + [ Matthias Klose ] + * Update libstdc++ symbols files. + * Update libgfortran symbols files. + + -- Matthias Klose Sun, 20 Mar 2011 13:53:48 +0100 + +gcc-4.6 (4.6.0~rc1-2) experimental; urgency=low + + * Update to SVN 20110320 (r171192) from the gcc-4_6-branch. + + [ Matthias Klose ] + * Update gcc-default-ssp* patches for the release candidate. + * Pass -Wno-error=unused-but-set-parameter if -Werror is present (temporary + for rebuild tests). + * Always configure --with-plugin-ld, always install liblto_plugin.so. + + [ Marcin Juszkiewicz ] + * Add conflicts with -4.5-*dev packages. Closes: #618450. + + [ Petr Salinger] + * Disable lock-2.c test on kfreebsd-*. Closes: #618988. + * Re-enable parallel builds on kfreebsd. + * Package lto_plugin for kfreebsd-* and Hurd. + + -- Matthias Klose Sun, 20 Mar 2011 13:53:48 +0100 + +gcc-4.6 (4.6.0~rc1-1) experimental; urgency=low + + * Build from the GCC 4.6.0 release candidate tarball. + + [ Matthias Klose ] + * Disable Go on powerpc. Closes: #615827. + * Fix lintian errors for the -plugin-dev package. + * Update kbsd-gnu.diff (Petr Salinger). Closes: #615826. + * Disable parallel builds on kfreebsd (Petr Salinger). + * Update gmp (build) dependencies. + * Update GFDL compliant builds. Closes: #609161. + * For GFDL compliant builds, build a dummy s-tm-texi without access + to the texinfo sources. + + [ Aurelien Jarno ] + * Import symbol files for kfreebsd-amd64, kfreebsd-i386, sh4 and + sparc64 from gcc-4.5. + + -- Matthias Klose Mon, 14 Mar 2011 19:01:08 +0100 + +gcc-4.6 (4.6-20110227-1) experimental; urgency=low + + [ Matthias Klose ] + * Update libquadmath symbols file. + * gcc-4.6-plugin-dev: Install gengtype. + + [ Sebastian Andrzej Siewior ] + * Remove -many on powerpcspe (__SPE__). + * Remove classic FPU opcodes from libgcc if target has no support for them + (powerpcspe). + + -- Matthias Klose Sun, 27 Feb 2011 22:33:45 +0100 + +gcc-4.6 (4.6-20110216-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Pass --no-add-needed by default to the linker. See + http://wiki.debian.org/ToolChain/DSOLinking, section "Not resolving symbols + in indirect dependent shared libraries" for more information. + + -- Matthias Klose Wed, 16 Feb 2011 23:55:32 +0100 + +gcc-4.6 (4.6-20110125-1) experimental; urgency=low + + * debian/copyright: Add unicode copyright for + libjava/classpath/resource/gnu/java/locale/* files. Addresses: #609161. + + -- Matthias Klose Wed, 26 Jan 2011 03:42:10 +0100 + +gcc-4.6 (4.6-20110123-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Don't run the libstdc++ testsuite on mipsel, times out on the buildd. + + [ Marcin Juszkiewicz ] + * Fix biarch/triarch cross builds. + - dpkg-shlibdeps failed to find libraries for 64 or n32 builds + - LD_LIBRARY_PATH for dpkg-shlibdeps lacked host dirs. + + -- Matthias Klose Sun, 23 Jan 2011 12:14:49 +0100 + +gcc-4.6 (4.6-20110116-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Update patches for the trunk. + * Pass -Wno-error=unused-but-set-variable if -Werror is present (temporary + for rebuild tests). + * Work around PR libffi/47248, force a read only eh frame section. + + -- Matthias Klose Sun, 16 Jan 2011 23:28:28 +0100 + +gcc-4.6 (4.6-20110105-1) experimental; urgency=low + + [ Matthias Klose ] + * Rename and update libobjc symbols files. + * Update cloog/ppl build dependencies. + * Adjust libstdc++ configure and paths for stylesheets and dtds. + * Update copyright for libquadmath, libgo, gcc/go/gofrontend. + * Enable Go for more architectures. + * DP: libgo: Fix GOARCH for i386 biarch, add GOARCH for powerpc + + [ Kees Cook ] + * Update hardening patches for GCC-4.6. LP: #696990. + + -- Matthias Klose Wed, 05 Jan 2011 22:29:57 +0100 + +gcc-4.6 (4.6-20101220-1) maverick; urgency=low + + * GCC snapshot, taken from the trunk. + + -- Matthias Klose Tue, 21 Dec 2010 00:16:19 +0100 + +gcc-4.5 (4.5.2-7) unstable; urgency=low + + * Update to SVN 20110323 (r171351) from the gcc-4_5-branch. + - Fix PR c++/47125, PR fortran/47348, PR libstdc++/48114, + PR libfortran/48066, PR target/48171, PR target/47862. + PR preprocessor/48192. + + [ Steve Langasek ] + * Make dpkg-dev versioned build-dependency conditional on whether we want + to build for multiarch. + * Add a new patch, gcc-multiarch+biarch.diff, used only when building for + multiarch to set our multilib paths to the correct relative directories. + * debian/rules.defs: support turning on multiarch build by architecture; + but don't enable this yet, we still need to wait for dpkg-dev. + * When DEB_HOST_MULTIARCH is available (i.e., with the next dpkg upload), + use it as our multiarch path. + * debian/rules.d/binary-java.mk: jvm-exports path is /usr/lib/jvm-exports, + not $(libdir)/jvm-exports. + * OTOH, libgcj_bc *is* in $(libdir). + * the spu build is not a multiarch build; look in the correct + non-multiarch directory. + * debian/rules2: pass --libdir also for stageX builds, needed in order to + successfully build for multiarch. + * debian/rules2: $(usr_lib) for a cross-build should not include the + multiarch dir as part of the path. + * debian/patches/gcc-multiarch+biarch.diff: restore the original intent of + the patch, namely, that the multilib dir for the default variant is + always equal to libdir (the multiarch dir), and we walk up the tree + to find lib for the secondary variant. + * debian/patches/gcc-multiarch+biarch32.diff: apply the same multilib + directory rewriting for biarch paths with multiarch as we do without; + still needed in the near term. + * Put our list of patches in README.Debian.$(DEB_TARGET_ARCH) instead of + in README.Debian, so that the individual files are architecture-neutral + and play nicely with multiarch. LP: #737846. + * Add a comment at the bottom of README.Debian with a pointer to the new + file listing the patches. + + [ Loic Minier ] + * Rework config/vxworks-dummy.h installation snippet to test + DEB_TARGET_GNU_CPU against patterns close to the upstream ones (arm% mips% + sh% sparc%) as to also install this header on other ports targetting the + relevant upstream CPUs such as armhf. Add a comment pointing at the + upstream bug. + * Update __aeabi symbol handling to test whether DEB_TARGET_GNU_TYPE matches + arm-linux-gnueabi% instead of testing whether DEB_TARGET_ARCH equals + armel. Add a comment pointing at the Debian bug and indicating that this + is only useful for older dpkg-dev versions. + * debian/rules.def: fix "armel" entry to "arm" in list of + DEB_TARGET_ARCH_CPUs for Debian experimental GCC 4.5/4.6 libraries. + * debian/rules2: drop commented out GCC #42509 workaround as this was fixed + upstream in 4.4+. + * Change bogus DEB_TARGET_GNU_CPU test on armel and armhf to just test for + arm as ths is what the Debian arm, armel and armhf port use. + * Rework snippet setting armv7 on Debian armhf / Ubuntu to avoid + duplication, as a comment called out for. + * Use "arm" instead of armel/armhf in DEB_TARGET_GNU_CPU test when deciding + whether to enable profiledbootstrap. + * Set DEJAGNU_TIMEOUT=600 on Ubuntu armhf as well. + * Fix a couple more uses of armel or armhf against DEB_TARGET_GNU_CPU. + * Patched a couple of comments mentioning armel to also mention armhf. + * Add patch armhf-triplet-backport, support for arm-linux-*eabi* backported + from a patch sent on the upstream mailing-list. + + [ Matthias Klose ] + * Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX, + taken from the trunk. + * Fix PR preprocessor/48192, make conditional macros not defined for + #ifdef, proposed patch. + * Build the gold LTO plugin for ppc64 (Hiroyuki Yamamoto). Closes: #618864. + * Fix issue with volatile bitfields, default to -fstrict-volatile-bitfields + again on armel for Linaro builds. LP: #675347. + + -- Matthias Klose Wed, 23 Mar 2011 15:44:01 +0100 + +gcc-4.5 (4.5.2-6) unstable; urgency=low + + * Update to SVN 20110312 (r170895) from the gcc-4_5-branch. + - Fix PR tree-optimization/45967, PR tree-optimization/47278, + PR target/47862, PR c++/44629, PR c++/45651, PR c++/47289, PR c++/47705, + PR c++/47488, PR libgfortran/47778, PR c++/48029. + + [ Steve Langasek ] + * Make sure our libs Pre-Depend on 'multiarch-support' when building for + multiarch. + * debian/patches/gcc-multiarch*, debian/rules.patch: use i386 in the + multiarch path for amd64 / kfreebsd-amd64, not i486 or i686. This lets + us use a common set of paths on both Debian and Ubuntu, regardless of + the target default optimization level. + * debian/rules.conf: when building for multiarch, we need to be sure we + are building against a libc-dev that supports the corresponding paths. + (the referenced version number for this needs to be bumped once this is + officially in the archive.) + + [ Matthias Klose ] + * Don't run the libmudflap testsuite on hppa; times out on the buildd. + * Don't run the libstdc++ testsuite on mipsel; times out on the buildd. + * Post Linaro 4.5-2011.03-0 release changes (up to 20110313). + * Undefine LINK_EH_SPEC before redefining it to turn off warnings on + powerpc. + * Update gmp (build) dependencies. + + [ Aurelien Jarno ] + * Add symbol files on kfreebsd-i386. + * Add symbol files on kfreebsd-amd64. + * Add symbol files on sparc64. + * Add symbol files on sh4. + + -- Matthias Klose Sun, 13 Mar 2011 17:30:48 +0100 + +gcc-4.5 (4.5.2-5) unstable; urgency=low + + * Update to SVN 20110305 (r170696) from the gcc-4_5-branch. + - Fix PR target/43810, PR fortran/47886, PR tree-optimization/47615, + PR middle-end/47639, PR tree-optimization/47890, PR libfortran/47830, + PR tree-optimization/46723, PR target/45261, PR target/45808, + PR c++/46159, PR c++/47904, PR fortran/47886, PR libstdc++/47433, + PR target/42240, PR fortran/47878, PR libfortran/47694. + * Update the Linaro support to the 4.5-2011.03-0 release. + - Fix LP: #705689, LP: #695302, LP: #710652, LP: #710623, LP: #721021, + LP: #721021, LP: #709453. + + -- Matthias Klose Sun, 06 Mar 2011 02:58:01 +0100 + +gcc-4.5 (4.5.2-4) unstable; urgency=low + + * Update to SVN 20110222 (r170382) from the gcc-4_5-branch. + - Fix PR target/43653, PR fortran/47775, PR target/47840, + PR libfortran/47830. + + [ Matthias Klose ] + * Don't apply a patch twice. + * Build libgcc_s with -fno-stack-protector, when not building from the + Linaro branch. + * Backport proposed fix for PR tree-optimization/46723 from the trunk. + + [ Steve Langasek ] + * debian/control.m4: add missing Multi-Arch: same for libgcc4; make sure + Multi-Arch: same doesn't get set for libmudflap when building an + Architecture: all cross-compiler package. + * debian/rules2: use $libdir for libiberty.a. + * debian/patches/gcc-multiarch-*.diff: make sure we're using the same + set_multiarch_path definition for all variants. + + [ Sebastian Andrzej Siewior ] + * PR target/44364 + * Remove -many on powerpcspe (__SPE__) + * Remove classic FPU opcodes from libgcc if target has no support for them + (powerpcspe) + + -- Matthias Klose Wed, 23 Feb 2011 00:35:54 +0100 + +gcc-4.5 (4.5.2-3) experimental; urgency=low + + * Update to SVN 20110215 (r170181) from the gcc-4_5-branch. + - Fix PR rtl-optimization/44469, PR tree-optimization/47411, + PR bootstrap/44699, PR target/44392, PR fortran/47331, PR fortran/47448, + PR pch/14940, PR rtl-optimization/47166, PR target/47272, PR target/47580, + PR tree-optimization/47541, PR target/44606, PR boehm-gc/34544, + PR fortran/47569, PR libstdc++/47709, PR libstdc++/46914, PR libffi/46661. + * Update the Linaro support to the 4.5 2011.02-0 release. + * Pass --no-add-needed by default to the linker. See + http://wiki.debian.org/ToolChain/DSOLinking, section "Not resolving symbols + in indirect dependent shared libraries" for more information. + + -- Matthias Klose Wed, 16 Feb 2011 15:29:26 +0100 + +gcc-4.5 (4.5.2-2) experimental; urgency=low + + * Update to SVN 20110123 (r169142) from the gcc-4_5-branch. + - Fix PR target/46915, PR target/46729, PR libgcj/46774, PR target/47038, + PR target/46685, PR target/45447, PR tree-optimization/46758, + PR tree-optimization/45552, PR tree-optimization/43023, + PR middle-end/46734, PR fortran/45338, PR preprocessor/39213, + PR target/43309, PR fortran/46874, PR tree-optimization/47286, + PR tree-optimization/44592, PR target/47201, PR c/47150, PR target/46880, + PR middle-end/45852, PR tree-optimization/43655, PR debug/46893, + PR rtl-optimization/46804, PR rtl-optimization/46865, PR target/41082, + PR tree-optimization/46864, PR fortran/45777, PR tree-optimization/47365, + PR tree-optimization/47167, PR target/47318, PR target/46655, + PR fortran/47394, PR libstdc++/47354. + + [ Matthias Klose ] + * Update the Linaro support to the 4.5 2011.01-1 release. + * Don't build packages now built from the gcc-4.6 package for architectures + with a sucessful gcc-4.6 build. + + [ Kees Cook ] + * debian/patches/gcc-default-ssp.patch: do not ignore -fstack-protector-all + (LP: #691722). + + [ Marcin Juszkiewicz ] + * Fix biarch/triarch cross builds. + - dpkg-shlibdeps failed to find libraries for 64 or n32 builds + - LD_LIBRARY_PATH for dpkg-shlibdeps lacked host dirs. + + -- Matthias Klose Sun, 23 Jan 2011 11:54:52 +0100 + +gcc-4.5 (4.5.2-1) experimental; urgency=low + + * GCC 4.5.2 release. + + -- Matthias Klose Sat, 18 Dec 2010 14:14:38 +0100 + +gcc-4.5 (4.5.1-12) experimental; urgency=low + + * Update to SVN 20101129 (r167272) from the gcc-4_5-branch. + - Fix PR fortran/45742, PR tree-optimization/46498, PR target/45807, + PR target/44266, PR rtl-optimization/46315, PR tree-optimization/44545, + PR tree-optimization/46491, PR rtl-optimization/46571, PR target/31100, + PR c/46547, PR fortran/46638, PR tree-optimization/46675, PR debug/46258, + PR ada/40777. + + [ Matthias Klose ] + * Use lib instead of lib64 as the 64bit system dir on biarch + architectures defaulting to 64bit. Closes: #603597. + * Fix powerpc and s390 builds when biarch is disabled. + * Backport PR bootstrap/44768, miscompilation of dpkg on ARM + with -O2 (Chung-Lin Tang). LP: #674146. + * Update libgcc2 symbols file. Closes: #602099. + + [ Marcin Juszkiewicz ] + * Do not depend on target mpfr and zlib -dev packages for cross builds. + LP: #676027. + + [ Konstantinos Margaritis ] + * Add support for new target architecture `armhf'. Closes: #603948. + + -- Matthias Klose Mon, 22 Nov 2010 08:12:08 +0100 + +gcc-4.5 (4.5.1-11) experimental; urgency=low + + * Update to SVN 20101114 (r166728) from the gcc-4_5-branch. + - Fix PR fortran/45742. + * Don't hardcode debian/patches when referencing patches. Closes: #600502. + + -- Matthias Klose Sun, 14 Nov 2010 08:36:27 +0100 + +gcc-4.5 (4.5.1-10) experimental; urgency=low + + * Update to SVN 20101112 (r166653) from the gcc-4_5-branch. + - Fix PR rtl-optimization/44691, PR tree-optimization/46355, + PR tree-optimization/46177, PR c/44772, PR tree-optimization/46099, + PR middle-end/43690, PR tree-optimization/46165, PR middle-end/46419, + PR tree-optimization/46107, PR tree-optimization/45314, PR debug/45939, + PR rtl-optimization/46237, PR middle-end/44569, PR middle-end/44569, + PR tree-optimization/45902, PR target/46153, PR rtl-optimization/46226, + PR tree-optimization/46167, PR target/46098, PR target/45946, + PR fortran/42169, PR middle-end/46019, PR c/45969, PR c++/45894, + PR c++/46160, PR c++/45983, PR fortran/46152, PR fortran/46140, + PR libstdc++/45999, PR libgfortran/46373, PR libgfortran/46010, + PR fortran/46007, PR c++/46024. + * Update the Linaro support to the 4.5 2010.11 release. + * Update gcc-4.5 source dependencies. Closes: #600503. + * ARM: Fix Thumb-1 reload ICE with nested functions (Julian Brown), + taken from the trunk. + * Fix earlyclobbers on some arm.md DImode shifts (may miscompile "x >> 1"), + taken from the trunk. Closes: #600888. + + -- Matthias Klose Fri, 12 Nov 2010 18:34:47 +0100 + +gcc-4.5 (4.5.1-9) experimental; urgency=low + + * Update to SVN 20101014 (r165474) from the gcc-4_5-branch. + - Fix PR target/45820, PR tree-optimization/45854, PR target/45843, + PR target/43764, PR rtl-optimization/43358, PR bootstrap/44621, + PR libffi/45677, PR middle-end/45869, PR middle-end/45569, + PR tree-optimization/45752, PR fortran/45748, PR libstdc++/45403, + PR libstdc++/45924, PR libfortran/45710, PR bootstrap/44455, + PR java/43839, PR debug/45656, PR debug/44832, PR libstdc++/45711, + PR tree-optimization/45982. + + [ Matthias Klose ] + * Update the Linaro support to the 4.5 2010.10 release. + * Just try to build java on mips/mipsel (was disabled in 4.5.0-9, when + java was built from the same source package). Addresses: #599976. + * Remove the gpc packaging support. + * Fix libmudflap.so symlink. Addresses: #600161. + * Fix pch test failures with heap randomization on armel (PR pch/45979). + + [ Kees Cook ] + * Don't enable -fstack-protector with -ffreestanding. + + -- Matthias Klose Thu, 14 Oct 2010 19:17:41 +0200 + +gcc-4.5 (4.5.1-8) experimental; urgency=low + + * Update to SVN 20100925 (r164618) from the gcc-4_5-branch. + - Fix PR middle-end/44763, PR java/44095, PR target/35664, + PR rtl-optimization/41085, PR rtl-optimization/45051, + PR target/45694, PR middle-end/45678, PR middle-end/45678, + PR middle-end/45704, PR rtl-optimization/45728, PR libfortran/45532, + PR rtl-optimization/45695, PR rtl-optimization/42775, PR target/45726, + PR tree-optimization/45623, PR tree-optimization/45709, PR debug/43628, + PR tree-optimization/45709, PR rtl-optimization/45593, PR fortran/45081, + * Find 32bit system libraries on sparc64, s390x. + * Remove README.Debian from the source package to avoid confusion for + readers of the packaging. + * Don't include info files and man pages in hppa64 and spu builds. + Closes: #597435. + * Apply proposed patch for PR mudflap/24619 (instrumentation of dlopen) + (Brian M. Carlson) Closes: #507514. + + -- Matthias Klose Sat, 25 Sep 2010 14:11:39 +0200 + +gcc-4.5 (4.5.1-7) experimental; urgency=low + + * Update to SVN 20100914 (r164279) from the gcc-4_5-branch. + - Fix PR target/40959, PR middle-end/45567, PR debug/45660, + PR rtl-optimization/41087, PR rtl-optimization/44919, PR target/36502, + PR target/42313, PR target/44651. + * Add support to build from the Linaro 4.5 2010.09 release. + * gcc-4.5-plugin-dev: Install config/arm/arm-cores.def. + * Remove non-existing URL's in README.c++ (Osamu Aoki). Closes: #596406. + * Don't provide c++abi2-dev for g++ cross builds. + * Don't pass -mimplicit-it=thumb if -mthumb to as on ARM, rejected upstream. + + -- Matthias Klose Tue, 14 Sep 2010 12:52:34 +0200 + +gcc-4.5 (4.5.1-6) experimental; urgency=low + + * Update to SVN 20100909 (r164132) from the gcc-4_5-branch. + - Fix PR middle-end/45312, PR bootstrap/43847, PR middle-end/44554, + PR middle-end/40386, PR other/45443, PR c++/45200, PR c++/45293, + PR c++/45558, PR fortran/45595, PR fortran/45530, PR fortran/45489, + PR fortran/45019, PR libstdc++/45398. + + [ Matthias Klose ] + * Tighten binutils dependencies to 2.20.1-14. + + [ Marcin Juszkiewicz ] + * Fix the gcc-4.5-plugin-dev package name for cross builds. LP: #631474. + * Build the gcc-4.5-plugin-dev for stage1 cross builds. + * Fix priorities and sections for some cross packages. + + [ Al Viro ] + * Fix installation of libgcc_s.so as a linker script for biarch builds. + + [ Kees Cook ] + * Push glibc stack traces into stderr when building the package. + * debian/patches/gcc-default-ssp.patch: Lower ssp-buffer-size to 4. + + -- Matthias Klose Fri, 10 Sep 2010 21:25:37 +0200 + +gcc-4.5 (4.5.1-5) experimental; urgency=low + + * Always add dependencies on multilib library packages in *-multilib + packages. + * Fix installation of libgcc_s.so on architectures when libgcc_s.so is + a linker script, not a symlink (Steve Langasek). Closes: #595474. + * Remove the lib32gcc1 preinst script. Closes: #595495. + + -- Matthias Klose Sat, 04 Sep 2010 12:41:40 +0200 + +gcc-4.5 (4.5.1-4) experimental; urgency=low + + * Update to SVN 20100903 (r163833) from the gcc-4_5-branch. + - Fix PR target/45070, PR middle-end/45458, PR rtl-optimization/45353, + PR middle-end/45423, PR c/45079, PR tree-optimization/45393, + PR c++/44991, PR middle-end/45484, PR debug/45500, PR lto/45496. + + [ Matthias Klose ] + * Install config/vxworks-dummy.h in the gcc-4.5-plugin-dev package + on armel, mipsel and sparc64 too. + * Cleanup packaging files in gcc-source package. + * [ARM] Provide __builtin_expect() hints in linux-atomic.c (backport). + + [ Al Viro ] + * Fix builds with disabled biarch library packages. + * New variables {usr_lib,gcc_lib_dir,libgcc_dir}{,32,64,n32}, and switch + to using them in rules.d/*; as the result, most of the explicit pathnames + in there are gone _and_ we get uniformity across different flavours. + * New variables {usr_lib,gcc_lib_dir,libgcc_dir}{,32,64,n32}, and switch + to using them in rules.d/*; as the result, most of the explicit pathnames + in there are gone _and_ we get uniformity across different flavours. + * Merge bi-/tri-arch stuff in binary-gcc.mk. + * Merge rules for libgcc biarch variants. + * Merge rules for libstdc++ biarch variants. Fix n32 variant of + libstdc++-dbg removing _pic.a from the wrong place. + * Merge libgfortran rules. + * Merge rules for cxx-multi and objc-multi packages. + * Enable gcc-hppa64 in cross-gcc-to-hppa build. + + [ Marcin Juszkiewicz ] + * Create libgcc1 and gcc-*-base packages for stage2 cross builds. + LP: #628855. + + -- Matthias Klose Fri, 03 Sep 2010 18:09:40 +0200 + +gcc-4.5 (4.5.1-3) experimental; urgency=low + + * Update to SVN 20100829 (r163627) from the gcc-4_5-branch. + - Fix PR target/45327, PR middle-end/45292, PR fortran/45344, + PR target/41484, PR rtl-optimization/44858, PR rtl-optimization/45400, + PR tree-optimization/45260, PR c++/45315. + + [ Matthias Klose ] + * Don't run the libstdc++ testsuite on armel on the buildds. + * Integrate and extend bi/tri-arch cross builds patches. + * Fix dependencies for mips* triarch library packages depend on *both* lib64* + and libn32* packages. Closes: #594540. + * Tighten binutils dependencies to 2.20.1-13. + * Update LAST_UPDATED file when applying upstream updates. + + [ Al Viro ] + * Bi/tri-arch cross builds patches. + * Fix installation paths in bi/tri-arch libobjc and libmudflap packages. + * Merge rules for all flavours of libgomp, libmudflap, libobjc. + * Crossbuild fix for lib32gomp (use $(PFL)/lib32 instead of $(lib32)). + * gcc-4.5: libgcc_s.so.1 symlink creation on cross-builds. + * Enable gcc-multilib for cross-builds and fix what needs fixing. + * Enable g++-multilib for cross-builds, fix pathnames. + * Enable gobjc/gobjc++ multilib for cross-builds, fixes. + * Enable gfortran multilib for cross-builds, fix paths. + * Multilib dependency fixes for cross-builds. + + -- Matthias Klose Sun, 29 Aug 2010 18:24:37 +0200 + +gcc-4.5 (4.5.1-2) experimental; urgency=low + + * Update to SVN 20100818 (r163323) from the gcc-4_5-branch. + - Fix PR target/41089, PR tree-optimization/44914, PR c++/45112, + PR fortran/44929, PR middle-end/45262, PR debug/45259, PR debug/45055, + PR target/44805, PR middle-end/45034, PR tree-optimization/45109, + PR target/44942, PR fortran/31588, PR fortran/43954, PR fortran/44660, + PR fortran/42051, PR fortran/44064, PR fortran/45151, PR libstdc++/44963, + PR tree-optimization/45241, PR middle-end/44632 (closes: #585925), + PR libstdc++/45283, PR target/45296. + + [ Matthias Klose ] + * Allow overwriting of the PF macro used in the build from the environment + (Jim Heck). Closes: #588381. + * Fix libc-dbg build dependency for java enabled builds. Addresses: #591424. + * gcj: Align data in .rodata.jutf8.* sections, patch taken from the trunk. + * Configure with --enable-checking+release. LP: #612822. + * Add the complete packaging to the -source package. LP: #608650. + * Drop the gcc-ix86-asm-generic32.diff patch. + * Tighten (build-) dependency on cloog-ppl (>= 0.15.9-2). + * Apply proposed patch for PR middle-end/45292. + * Re-enable running the libstdc++ testsuite on armel and ia64 on the buildds. + + [ Steve Langasek ] + * s,/lib/,/$(libdir)/, throughout debian/rules*; a no-op in the current + case, but required for us to find the libraries when building for + multiarch + * Don't append multiarch paths to any multilib paths except for the default; + our biarch (multilib) builds need to remain independent of multiarch in + the near term, so we want to make sure we can find /usr/lib32 without + /usr/lib/i486-linux-gnu being available. + * debian/control.m4, debian/rules.conf: conditionally set packages to be + Multi-Arch: yes when MULTIARCH is defined. + + [ Marcin Juszkiewicz ] + * Allow building intermediate stages for cross builds. LP: #603497. + + -- Matthias Klose Wed, 18 Aug 2010 07:00:12 +0200 + +gcc-4.5 (4.5.1-1) experimental; urgency=low + + * GCC-4.5.1 release. + * Update to SVN 20100731 (r162781) from the gcc-4_5-branch. + - Fix PR tree-optimization/45052, PR target/43698. + * Apply proposed fixes for PR c++/45112, PR c/45079. + * Install config/vxworks-dummy.h in the gcc-4.5-plugin-dev package + on armel, mips, mipsel, sh4, sparc, sparc64. Closes: #590054. + * Link executables statically when `static' is passed in DEB_BUILD_OPTIONS + (Jim Heck). Closes: #590102. + * Stop building java packages from the gcc-4.5 source package. + + -- Matthias Klose Sat, 31 Jul 2010 16:30:20 +0200 + +gcc-4.5 (4.5.0-10) experimental; urgency=low + + * Update to SVN 20100725 (r162508) from the gcc-4_5-branch. + - Fix PR tree-optimization/45047, PR c++/43016, PR c++/45008. + * Disable building gcj/libjava on mips/mipsel (fails to link libgcj). + * Update libstdc++6 symbols files. + + -- Matthias Klose Sun, 25 Jul 2010 16:39:11 +0200 + +gcc-4.5 (4.5.0-9) experimental; urgency=low + + * Update to SVN 20100723 (r162448) from the gcc-4_5-branch (post + GCC-4.5.1 release candidate 1). + - Fix PR debug/45015, PR target/44942, PR tree-optimization/44900, + PR tree-optimization/44977, PR c++/44996, PR fortran/44929, + PR fortran/30668, PR fortran/31346, PR fortran/34260, + PR fortran/40011. + + [ Marcin Juszkiewicz ] + * Fix dependencies on cross library packages. + * Copy all debian/rules* files to the -source package. + + [ Matthias Klose ] + * Fix versioned build dependency on gcc-4.x-source package for cross builds. + LP: #609060. + * Set Vcs attributes in control file. + + -- Matthias Klose Fri, 23 Jul 2010 13:08:07 +0200 + +gcc-4.5 (4.5.0-8) experimental; urgency=low + + * Update to SVN 20100718 (r161892) from the gcc-4_5-branch. + - Fixes: PR target/44531, PR bootstrap/44820, PR target/44597, + PR target/44705, PR middle-end/44777, PR debug/44694, PR c++/44039, + PR tree-optimization/43801, PR target/44575, PR debug/44104, + PR middle-end/44671, PR middle-end/44686, PR tree-optimization/44357, + PR debug/44694, PR middle-end/43866, PR debug/42278, PR c++/44059, + PR tree-optimization/43905, PR middle-end/44133, PR tree-optimize/44063, + PR tree-optimization/44683, PR rtl-optimization/43332, PR debug/44610, + PR middle-end/44684, PR tree-optimization/44393, PR middle-end/44674, + PR c++/44628, PR c++/44587, PR fortran/44582, PR fortran/43841, + PR fortran/43843, PR libstdc++/44708, PR tree-optimization/44886, + PR target/43888, PR tree-optimization/44284, PR middle-end/44828, + PR middle-end/41355, PR c++/44703, PR ada/43731, PR fortran/44773, + PR fortran/44847. + + [ Marcin Juszkiewicz ] + * debian/rules2: Merge rules.d includes. + * Properly -name -dbg packages for cross builds. + * Various cross build fixes. + * Build libmudflap packages for cross builds. + * Fix generation of maintainer scripts for cross packages. + * Build a gcc-base package for cross builds. + + [ Kees Cook ] + * Fix additional libstdc++ testsuite failures for hardening defaults. + + [ Samuel Thibault ] + * Update hurd patch for 4.5, fixing build failure. Closes: #584819. + + [ Matthias Klose ] + * gcc-arm-implicit-it.diff: Only pass -mimplicit-it=thumb when in + thumb mode (Andrew Stubbs). + + -- Matthias Klose Sun, 18 Jul 2010 10:53:51 +0200 + +gcc-4.5 (4.5.0-7) experimental; urgency=low + + * Update to SVN 20100625 (r161383) from the gcc-4_5-branch. + - Fixes: PR bootstrap/44426, PR target/44546, PR target/44261, + PR target/43740, PR libstdc++/44630 (closes: #577458), + PR c++/44627 (LP: #503668), PR target/39690, PR target/44615, + PR fortran/44556, PR c/44555. + - Update libstdc++'s pretty printer for python2.6. Closes: #585202. + + [ Matthias Klose ] + * Fix libstdc++ symbols files for powerpc and sparc. + * Add maintainer scripts for cross packages. + + [ Samuel Thibault ] + * Update hurd patch for 4.5, fixing build failure. Closes: #584454, + #584819. + + [ Marcin Juszkiewicz ] + * Merge the rules.d/binary-*-cross.mk files into rules.d/binary-*.mk. + + -- Matthias Klose Fri, 25 Jun 2010 15:57:38 +0200 + +gcc-4.5 (4.5.0-6) experimental; urgency=low + + [ Matthias Klose ] + + * Update to SVN 20100617 (r161901) from the gcc-4_5-branch. Fixes: + PR target/44169, PR bootstrap/43170, PR objc/35996, PR objc++/32052, + PR objc++/23716, PR lto/44464, PR rtl-optimization/42461, PR fortran/44536, + PR tree-optimization/44258, PR tree-optimization/44423, PR target/44534, + PR bootstrap/44426, PR tree-optimization/44508, PR tree-optimization/44507, + PR lto/42776, PR target/44481, PR debug/41371, PR bootstrap/37304, + PR target/44067, PR debug/41371, PR debug/41371, PR target/44075, + PR c++/44366, PR c++/44401, PR fortran/44347, PR fortran/44430, + PR lto/42776, PR libstdc++/44487, PR other/43838, PR libgcj/44216. + * debian/patches/cross-fixes.diff: Update for 4.5 (Marcin Juszkiewicz). + * debian/patches/libstdc++-pic.diff: Fix installation for cross builds. + * Fix PR bootstrap/43847, --enable-plugin for cross builds. + * Export long double versions of "C" math library for arm-linux-gnueabi, + m68k-linux-gnu (ColdFire), mips*-linux-gnu (o32 ABI), sh*-linux-gnu + (not 32 bit). Merge the libstdc++-*-ldbl-compat.diff patches. + * Merge binary-libgcc.mk packaging changes into binary-libgcc-cross.mk + (Loic Minier). + * Update libgcc and libstdc++ symbols files. + + [ Aurelien Jarno ] + + * libstdc++-mips-ldbl-compat.diff: On MIPS provide the long double + versions of "C" math functions in libstdc++ as we need to keep the + ABI. Closes: #584610. + + -- Matthias Klose Thu, 17 Jun 2010 14:56:14 +0200 + +gcc-4.5 (4.5.0-5) experimental; urgency=low + + * Update to SVN 20100602 (r160097) from the gcc-4_5-branch. Fixes: + PR target/44338, PR middle-end/44337, PR tree-optimization/44182, + PR target/44161, PR c++/44358, PR fortran/44360, PR lto/44385. + * Fix PR target/44261, taken from the trunk. Closes: #582787. + * Fix passing the expanded -iplugindir option. + * Disable broken profiled bootstrap on alpha. + * On ix86, pass -mtune=generic32 in 32bit mode to the assembler, when + configured for i586-linux-gnu or i686-linux-gnu. + + -- Matthias Klose Thu, 03 Jun 2010 00:44:37 +0200 + +gcc-4.5 (4.5.0-4) experimental; urgency=low + + * Update to SVN 20100527 (r160047) from the gcc-4_5-branch. Fixes: + PR rtl-optimization/44164, PR middle-end/44069, PR target/44199, + PR lto/44196, PR target/43733, PR target/44245, PR target/43869, + PR debug/44223, PR tree-optimization/44038, PR tree-optimization/43949, + PR debug/44205, PR debug/44178, PR bootstrap/43870, PR target/44202, + PR target/44074, PR lto/43455, PR lto/42653, PR lto/42425, PR lto/43080, + PR lto/43946, PR c++/43382, PR c++/41510, PR c++/44193, PR c++/44157, + PR c++/44158, PR lto/44256, PR libstdc++/44190, PR lto/44312, + PR target/43636, PR target/43726, PR c++/43555PR libstdc++/40497. + + [ Matthias Klose ] + + * Enable multilibs again on powerpcspe. Closes: #579780. + * Fix setting CC for REVERSE_CROSS build (host == target,host != build). + Closes: #579779. + * Fix setting biarch_cpu macro. + * Don't bother with un-normalized paths in .la files, just remove them. + * debian/locale-gen: Update locales needed for the libstdc++-v3 testsuite. + * If libstdc++6 is built from newer gcc-4.x source, run the libstdc++-v3 + testsuite against the installed lib too. + * Configure with --enable-secureplt on powerpcspe. + + [ Aurelien Jarno ] + + * Fix $(distrelease) on non-official archives. Fix powerpcspe, sh4 and + sparc64 builds. + + -- Matthias Klose Sun, 30 May 2010 12:52:02 +0200 + +gcc-4.5 (4.5.0-3) experimental; urgency=low + + * Update to SVN 20100519 (r159556) from the gcc-4_5-branch. Fixes: + PR c++/43704, PR fortran/43339, PR middle-end/43337, PR target/43635, + PR tree-optimization/43783, PR tree-optimization/43796, PR middle-end/43570, + PR libgomp/43706, PR libgomp/43569, PR middle-end/43835, PR c/43893, + PR tree-optimization/43572, PR tree-optimization/43845, PR libgcj/40860, + PR target/43744, PR debug/43370, PR c++/43880, PR middle-end/43671, + PR debug/43972, PR target/43921, PR c++/38064, PR c++/43953, + PR fortran/43985, PR fortran/43592, PR fortran/40539, PR c++/43787, + PR middle-end/44085, PR middle-end/44071, PR middle-end/43812, + PR debug/44028, PR rtl-optimization/44012, PR target/44046, + PR documentation/44016, PR fortran/44036, PR fortran/40728, + PR libstdc++/44014, PR lto/44184, PR bootstrap/42347, PR middle-end/44102, + PR c++/44127, PR debug/44136, PR target/44088, PR tree-optimization/44124, + PR fortran/43591, PR fortran/44135, PR libstdc++/43259. + + [ Matthias Klose ] + * Revert gcj-arm-no-merge-exidx-entries patch, fixed by PR libgcj/40860. + * Don't run the libstdc++-v3 testsuite on the ia64 buildds. Timeouts. + * Backport two libjava fixes from the trunk to run josm with gcj. + * Ubuntu only: + - Pass --hash-style=gnu instead of --hash-style=both to the linker. + * Preliminary architecture port for powerpcspe (Kyle Moffett). + Closes: #579780. + * Update configury to be able to target i686 instead of i486 on i386. + + [ Aurelien Jarno] + * Don't link with --hash-style=both on mips/mipsel as GNU hash is not + compatible with the MIPS ABI. + * Default to -mplt on mips(el), -march=mips2 and -mtune=mips32 on 32-bit + mips(el), -march=mips3 and -mtune=mips64 on 64-bit mips(el). + + -- Matthias Klose Wed, 19 May 2010 09:48:20 +0200 + +gcc-4.5 (4.5.0-2) experimental; urgency=low + + * Update to SVN 20100419 from the gcc-4_5-branch. + - Fix PR tree-optimization/43627, c++/43641, PR c++/43621, PR c++/43611, + PR fortran/31538, PR fortran/30073, PR target/43662, + PR tree-optimization/43572, PR tree-optimization/43771. + * Install the linker plugin. + * Search the linker plugin as a readable, not an executable file. + * Link with --hash-style=both on mips/mipsel. + * On mips, pass -mfix-loongson2f-nop to as, if -mno-fix-loongson2f-nop + is not passed. + * Sequel to PR40521, fix -g to generate .eh_frame on ARM. + * On ARM, let gcj pass --no-merge-exidx-entries to the linker. + * Build-depend/depend on binutils snapshot. + * Update NEWS.html and NEWS.gcc. + + -- Matthias Klose Mon, 19 Apr 2010 15:22:55 +0200 + +gcc-4.5 (4.5.0-1) experimental; urgency=low + + * GCC 4.5.0 release. + * Always apply biarch patches. + * Build the lto-linker plugin again. Closes: #575448. + * Run the libstdc++v3 testsuite on armel again. + * Fix --enable-libstdcxx-time documentation, show configure result. + * On linux targets always pass --no-add-needed to the linker. + * Update the patch to search for plugins in a default plugin directory. + * Fix java installations in snapshot builds. + * Configure --with-plugin-ld=ld.gold. + * Linker selection: ld is used by default, to use the gold linker, + pass -fuse-linker-plugin (no other side effects if -flto/-fwhopr + is not passed). To force ld.bfd or ld.gold, pass -B/usr/lib/compat-ld + for ld.bfd or /usr/lib/gold-ld for ld.gold. + * Don't apply the gold-and-ld patch for now. + * Stop building the documentation for dfsg compliant builds. Closes: #571759. + + -- Matthias Klose Wed, 14 Apr 2010 13:29:20 +0200 + +gcc-4.5 (4.5-20100404-1) experimental; urgency=low + + * Update to SVN 20100404 from the trunk. + * Fix build failures building cross compilers configure --with-ld. + * lib32gcc1: Set priority to `extra'. + * Apply proposed patch to search for plugins in a default plugin directory. + * In snapshot builds, use for javac/ecj1 the jvm provided by the package. + * libstdc++-arm-ldbl-compat.diff: On ARM provide the long double versions + of "C" math functions in libstdc++; these are dropped when built + against glibc-2.11. + + -- Matthias Klose Sun, 04 Apr 2010 15:51:25 +0200 + +gcc-4.5 (4.5-20100321-1) experimental; urgency=low + + * Update to SVN 20100321 from the trunk. + * gcj-4.5-jre-headless: Stop providing java-virtual-machine. + * gcj-4.5-plugin-dev: Don't suggest mudflap packages. + * Apply proposed patch to enable both gold and ld in a single toolchain. + New option -fuse-ld=ld.bfd, -fuse-ld=gold. + + -- Matthias Klose Sun, 21 Mar 2010 11:45:48 +0100 + +gcc-4.5 (4.5-20100227-1) experimental; urgency=low + + * Update to SVN 20100227 from the trunk. + * Don't run the libstdc++-v3 testsuite on arm*-*-linux-gnueabi, when + defaulting to thumb mode (Timeouts on the Ubuntu buildd). + + -- Matthias Klose Sat, 27 Feb 2010 08:29:55 +0100 + +gcc-4.5 (4.5-20100222-1) experimental; urgency=low + + * Update to SVN 20100222 from the trunk. + - Install additional header files needed by plugins. Closes: #562881. + * gcc-4.5-plugin-dev: Should depend on libgmp3-dev. Closes: #566366. + * Update libstdc++6 symbols files. + + -- Matthias Klose Tue, 23 Feb 2010 02:16:22 +0100 + +gcc-4.5 (4.5-20100216-0ubuntu1~ppa1) lucid; urgency=low + + * Update to SVN 20100216 from the trunk. + * Don't call dh_makeshlibs with -V for shared libraries with + symbol files. + * Don't run the libstdc++-v3 testsuite in thumb mode on armel + to work around buildd timeout (see PR target/42509). + + -- Matthias Klose Wed, 17 Feb 2010 02:06:02 +0100 + +gcc-4.5 (4.5-20100204-1) experimental; urgency=low + + * Update to SVN 20100204 from the trunk. + + -- Matthias Klose Thu, 04 Feb 2010 19:44:19 +0100 + +gcc-4.5 (4.5-20100202-1) experimental; urgency=low + + * Update to SVN 20100202 from the trunk. + - gcc-stack_chk_fail-check.diff: Remove, applied upstream. + * Update libstdc++6 symbol files. + * Build gnat in snapshot builds on arm. + * Configure with --enable-checking=yes for snapshot builds, and for + 4.5 builds before the release. + * Temporary workaround: On arm-linux-gnueabi run the libstdc++v3 testsuite + with -Wno-abi. + * When building the hppa64 cross compiler, add $(builddir)/gcc to + LD_LIBRARY_PATH to find the just built libgcc6. Closes: #565862. + * On sh4-linux, use sh as java architecture name instead of sh4. + * On armel, build gnat-4.5 using gcc-snapshot. + * Revert the bump of the libgcc soversion on hppa (6 -> 4). + + -- Matthias Klose Tue, 02 Feb 2010 19:35:25 +0100 + +gcc-4.5 (4.5-20100107-1) experimental; urgency=low + + [ Matthias Klose ] + * Update to SVN 20100107 from the trunk. + * Revert the workaround for the alpha build (PR bootstrap/42511 is fixed). + * testsuite-hardening-format.diff: Add a fix for the libstdc++ testsuite. + * Build-depend again on autogen. + * Work around PR lto/41569 (installation bug when configured with + --enabled-gold). + * On armel run the testsuite both in arm and thumb mode, when the + distribution is supporthing tumb processors. + * Work around PR target/42509 (armel), not setting BOOT_CFLAGS, but + applying libcpp-arm-workaround.diff. + + [ Nobuhiro Iwamatsu ] + * Update gcc-multiarch patch for sh4. + + -- Matthias Klose Thu, 07 Jan 2010 16:34:57 +0100 + +gcc-4.5 (4.5-20100106-0ubuntu1) lucid; urgency=low + + * Update to SVN 20100106 from the trunk. + * gcj-4.5-jdk: Include /usr/lib/jvm-exports. + * Rename libgcc symbols file for hppa. + * On alpha and armel, set BOOT_CFLAGS to -g -O1 to work around bootstrap + failures (see PR target/42509 (armel) and PR bootstrap/42511 (alpha)). + * Base the source build-dependency on the package version instead of the + gcc version. + + -- Matthias Klose Wed, 06 Jan 2010 14:17:29 +0100 + +gcc-4.5 (4.5-20100103-1) experimental; urgency=low + + * Update to SVN 20100103 from the trunk. + + [ Samuel Thibault ] + * Update hurd patch for 4.5. Closes: #562802. + + [ Aurelien Jarno ] + * Remove patches/kbsd-gnu-ada.diff (merged upstream). + + [ Matthias Klose ] + * libgcj11: Move .so symlinks into gcj-4.5-jdk. Addresses: #563280. + * gcc-snapshot: On sparc64, use gcc-snapshot as bootstrap compiler. + * Don't use expect-tcl8.3 on hppa anymore. + * Merge gnat-4.4 changes back from 4.4.2-5. + * Bump libgcc soversion on hppa (4 -> 6). + * Default to v9a (ultrasparc) on sparc*-linux. + + -- Matthias Klose Sun, 03 Jan 2010 17:25:27 +0100 + +gcc-4.5 (4.5-20091226-1) experimental; urgency=low + + * Update to SVN 20091226 from the trunk. + * Fix powerpc spu installation. + * Enable multiarch for sh4. + * Fix libffi multilib test runs. + * Configure the hppa -> hppa64 cross compiler --with-system-zlib. + * gcc-4.5-hppa64: Don't ship info dir file. + * lib32stdc++6{,-dbg}: Add dependency on 32bit glibc. + + -- Matthias Klose Sat, 26 Dec 2009 15:38:23 +0100 + +gcc-4.5 (4.5-20091223-1) experimental; urgency=low + + * Update to SVN 20091223 from the trunk. + + [ Matthias Klose ] + * Update hardening patches for 4.5. + * Don't call install-info directly, depend on dpkg | install-info instead. + * Add conflicts with packages built from GCC 4.4 sources. + * On ARM, pass --hash-style=both to ld. + * Update libgfortran3 symbols file. + * Update libstdc++6 symbols file. + + [ Arthur Loiret ] + * debian/rules.conf (gen_no_archs): Handle multiple arm ports. + + -- Matthias Klose Wed, 23 Dec 2009 18:02:24 +0100 + +gcc-4.5 (4.5-20091220-1) experimental; urgency=low + + * Update to SVN 20091220 from the trunk. + - Remove patches applied upstream: arm-boehm-gc-locks.diff, + arm-gcc-gcse.diff, deb-protoize.diff, gcc-arm-thumb2-sched.diff, + gcc-atom-doc.diff, gcc-atom.diff, gcc-build-id.diff, + gcc-unwind-debug-hook.diff, gcj-use-atomic-builtins-doc.diff, + gcj-use-atomic-builtins.diff, libjava-atomic-builtins-eabi.diff, + libjava-nobiarch-check-snap.diff, lp432222.diff, pr25509-doc.diff, + pr25509.diff, pr39429.diff, pr40133.diff, pr40134.diff, rev146451.diff, + s390-biarch-snap.diff, sh4-scheduling.diff, sh4_atomic_update.diff. + - Update patches: gcc-multiarch.diff, gcc-textdomain.diff, + libjava-nobiarch-check.diff, libjava-subdir.diff, libstdc++-doclink.diff, + libstdc++-man-3cxx.diff, libstdc++-pic.diff, note-gnu-stack.diff, + rename-info-files.diff, s390-biarch.diff. + * Stop building the protoize package, removed from the GCC 4.5 sources. + * gcc-4.5: Install lto1, lto-wrapper, and new header files for intrinsics. + * libstdc++6-4.5-dbg: Install the python files for use with gdb. + * Build java packages from the gcc-4.5 source package. + + -- Matthias Klose Sun, 20 Dec 2009 10:56:56 +0100 + +gcc-4.4 (4.4.2-6) unstable; urgency=low + + * Update to SVN 20091220 from the gcc-4_4-branch (r155367). + Fix PR c++/42387, PR c++/41183. + + [ Matthias Klose ] + * Apply svn-doc-updates.diff for non DFSG builds. + * gcc-snapshot: + - Remove patches integrated upstream: pr40133.diff. Closes: #561550. + + [ Nobuhiro Iwamatsu ] + * Backport linux atomic ops changes for sh4 from the trunk. Closes: #561550. + * Backport from trunk: [SH] Not run scheduling before reload as default. + Closes: #561429. + + [ Arthur Loiret ] + * Apply spu patches independently of the hardening patches; fix build + failure on powerpc. + + -- Matthias Klose Sun, 20 Dec 2009 10:20:19 +0100 + +gcc-4.4 (4.4.2-5) unstable; urgency=low + + * Update to SVN 20091212 from the gcc-4_4-branch (r155122). + Revert the fix for PR libstdc++/42261, fix PR fortran/42268, + PR target/42263, PR target/42263, PR target/41196, PR target/41939, + PR rtl-optimization/41574. + + [ Matthias Klose ] + * Regenerate svn-updates.diff. + * Disable biarch testsuite runs for libffi (broken and unused). + * Support xz compression of source tarballs. + * Fix typo in PR libstdc++/40133 to do the link tests. + * gcc-snapshot: + - Remove patches integrated upstream: pr40134-snap.diff. + - Update s390-biarch.diff for trunk. + + [ Aurelien Jarno ] + * Add sparc64 support: disable multilib and install the libraries + in /lib. + + -- Matthias Klose Sun, 13 Dec 2009 10:28:19 +0100 + +gcc-4.4 (4.4.2-4) unstable; urgency=low + + * Update to SVN 20091210 from the gcc-4_4-branch (r155122), Fixes: + PR target/42165, PR target/42113, PR libgfortran/42090, + PR middle-end/42049, PR c++/42234, PR fortran/41278, PR libstdc++/42261, + PR libstdc++/42273 PR java/41991. + + [ Matthias Klose ] + * gcc-arm-thumb2-sched.diff: Don't restrict reloads to LO_REGS for Thumb-2. + * PR target/40134: Don't redefine LIB_SPEC on hppa. + * PR target/42263, fix wrong code bugs in SMP support on ARM, backport from + the trunk. + * Pass -mimplicit-it=thumb to as by default on ARM, when configured + --with-mode=thumb. + * Fix boehm-gc build on ARM --with-mode=thumb. + * ARM: Don't copy uncopyable instructions in gcse.c (backport from trunk). + * Build the spu cross compiler for powerpc from the cell-4_4-branch. + * gcj: add option -fuse-atomic-builtins (backport from the trunk). + + [ Arthur Loiret ] + * Make svn update interdiffs more readable. + + -- Matthias Klose Thu, 10 Dec 2009 04:29:36 +0100 + +gcc-4.4 (4.4.2-3) unstable; urgency=low + + * Update to SVN 20091118 from the gcc-4_4-branch (r154294). + Fix PR PR c++/9381, PR c++/21008, PR c++/35067, PR c++/36912, PR c++/37037, + PR c++/37093, PR c++/38699, PR c++/39786, c++/36959, PR c++/41754, + PR c++/41876, PR c++/41967, PR c++/41972, PR c++/41994, PR c++/42059, + PR c++/42061, + PR fortran/41772, PR fortran/41850, PR fortran/41909, + PR middle-end/40946, PR middle-end/41317, R tree-optimization/41643, + PR target/41900, PR rtl-optimization/41917, PR middle-end/41963, + PR middle-end/42029. + * Snapshot builds: + - Patch updates. + - Configure with --disable-browser-plugin. + * Configure with --disable-libstdcxx-pch on hppa. + * Backport armel patches form the trunk: + - Fix PR objc/41848 - workaround ObjC and -fsection-anchors. + - Enable scheduling for Thumb-2, including the fix for PR target/42031. + - Fix PR target/41939, EABI violation in accessing values below the stack. + + -- Matthias Klose Wed, 18 Nov 2009 08:37:18 -0600 + +gcc-4.4 (4.4.2-2) unstable; urgency=low + + * Update to SVN 20091031 from the gcc-4_4-branch (r153603). + - Fix PR debug/40521, PR target/40913, PR middle-end/22072, + PR target/41665, PR c++/38798, PR c++/40092, PR c++/37875, + PR c++/37204, PR fortran/41755, PR libstdc++/40654, PR libstdc++/40826, + PR target/41702, PR c/41842, PR target/41762, PR c++/40808, + PR fortran/41777, PR libstdc++/40852. + * Snapshot builds: + - Configure with --enable-plugin, disable the gcjwebplugin by a patch. + Addresses: #551200. + - Proposed patch for PR lto/41652, compile lto-plugin with + -D_FILE_OFFSET_BITS=64 + - Allow disabling the ada build via DEB_BUILD_OPTIONS nolang=ada. + * Fixes for reverse cross builds. + * On sparc default to v9 in 32bit mode. + * Fix __stack_chk_fail check for cross builds configured --with-headers. + * Apply some fixes for uClibc cross builds (Jonas Meyer, Hector Oron). + + -- Matthias Klose Sat, 31 Oct 2009 14:16:03 +0100 + +gcc-4.4 (4.4.2-1) unstable; urgency=low + + * GCC 4.4.2 release. + - Fixes PR target/26515, PR target/41680, PR rtl-optimization/41646, + PR c++/39863, PR c++/41038. + * Fix setting timeout for testsuite runs. + * gcj-4.4/gcc-snapshot: Drop build-dependency on libgconf2-dev, disabled + by default. + * gcj-4.4: Run the libffi testsuite as well. + * Add explicit build dependency on zlib1g-dev. + * Fix cross builds, add support for gomp and gfortran (only tested for + non-biarch targets). + * (Build-)depend on binutils-2.20. + * Fix up omp.h for multilibs (taken from Fedora). + + -- Matthias Klose Sun, 18 Oct 2009 02:31:32 +0200 + +gcc-4.4 (4.4.1-6) unstable; urgency=low + + * Snapshot builds: + - Add build dependency on libelfg0-dev (>= 0.8.12). + - Add build dependency on binutils-gold where available. + - Suggest binutils-gold; not perfect, it is required when using + -use-linker-plugin. + - Work around installation failure in the lto-plugin (PR lto/41569). + - Install java home symlinks in /usr/lib/jvm. + - Revert the dwarf2cfi_asm workaround, obsoleted by PR debug/40521. + * PR debug/40521: + - Apply patch for PR debug/40521, taken from the trunk. + - Revert the dwarf2cfi_asm workaround, obsoleted by PR debug/40521. + - Depend on binutils (>= 2.19.91.20091005). + * Update to SVN 20091005 from the gcc-4_4-branch (r152450). + - Fixes PR fortran/41479. + * In the test summary, add more information about package versions + used for the build. + + -- Matthias Klose Wed, 07 Oct 2009 02:12:56 +0200 + +gcc-4.4 (4.4.1-5) unstable; urgency=medium + + * Update to SVN 20091003 from the gcc-4_4-branch (r152174). + - Fixes PR target/22093, PR c/39779, PR libffi/40242, PR target/40473, + PR debug/40521, PR c/41049, PR debug/41065, PR ada/41100, + PR tree-optimization/41101, PR libgfortran/41328, PR libffi/41443, + PR fortran/41515. + * Updates for snapshot builds: + - Fix build dependency on automake for snapshot builds. + - Update patches pr40134-snap and libjava-nobiarch-check-snap. + * Fix lintian errors in libstdc++ packages and lintian warnings in the + source package. + * Add debian/README.source. + * Don't apply PR libstdc++/39491 for the trunk anymore. + * Install java home symlinks for snapshot builds in /usr/lib/jvm, + including javac. Depend on ecj. Addresses #536102. + * Fix build failure on armel with -mfloat-abi=softfp. + * Don't pessimize the code for newer armv6 and armv7 processors. + * libjava: Use atomic builtins For Linux ARM/EABI, backported from the + trunk. + * Proposed patch to fix wrong-code on powerpc (Alan Modra). LP: #432222. + * Link against -ldl instead of -lcloog -lppl. Exit with an error when using + the Graphite loop transformation infrastructure without having the + libcloog-ppl0 package installed (patch taken from Fedora). Packages + using these optimizations should build-depend on libcloog-ppl0. + gcc-4.4: Suggest the cloog runtime libraries. + * Install a hook _Unwind_DebugHook, called during unwinding. Intended as + a hook for a debugger to intercept exceptions. CFA is the CFA of the + target frame. HANDLER is the PC to which control will be transferred + (patch taken from Fedora). + + -- Matthias Klose Sat, 03 Oct 2009 13:33:05 +0100 + +gcc-4.4 (4.4.1-4) unstable; urgency=low + + * Update to SVN 20090911 from the gcc-4_4-branch (r151649). + - Fixes PR target/34412, PR middle-end/41094, PR target/40718, + PR fortran/41062, PR libstdc++/41005, PR target/41184, + PR bootstrap/41180, PR c++/41127, PR fortran/41258, + PR rtl-optimization/40861, PR target/41315, PR fortran/39876. + + [ Matthias Klose ] + * Avoid underscores in doc-base document id's to workaround a + dh_installdocs bug. + * Update file names for the Ada user's guide. + * Set Homepage attribute for packages. + * Update the patch for gnat on armel. + * gcj-4.4-jdk: Depend on libantlr-java. Addresses: #546062. + * Backport patch for PR tree-optimization/41101 from the trunk. + Closes: #541816. + * Update libstdc++6.symbols for symbols introduced with the fix + for PR libstdc++/41005. + * Apply proposed patches for PR libstdc++/40133 and PR target/40134. + Add symbols exception propagation support in libstdc++ on armel + to the libstdc++6 symbols. + + [ Ludovic Brenta] + Merge from gnat-4.4 (4.4.1-3) unstable; urgency=low + * debian/rules.defs, debian/rules.d/binary-ada.mk, debian/rules.patch: + better support for architectures that support only one exception + handling mechanism (SJLJ or ZCX). + + -- Matthias Klose Sat, 12 Sep 2009 03:18:17 +0200 + +gcc-4.4 (4.4.1-3) unstable; urgency=low + + * Update to SVN 20090822 from the gcc-4_4-branch (r151011). + - Fixes PR tree-optimization/41016, PR tree-optimization/41011, + PR tree-optimization/41008, PR tree-optimization/40991, + PR tree-optimization/40964, PR target/8603 (closes: #161432), + PR target/41019, PR target/41015, PR target/40957, PR target/40934, + PR rtl-optimization/41033, PR middle-end/41047, PR middle-end/41006, + PR fortran/41070, PR fortran/40995, PR fortran/40847, PR debug/40990, + PR debug/37801, PR c/41046, PR c/40948, PR c/40866, PR bootstrap/41018, + PR middle-end/41123,PR target/40971, PR c++/41131, PR fortran/41102, + PR libfortran/40962. + + [ Arthur Loiret ] + * Only use -fno-stack-protector when known to the stage1 compiler. + + [ Aurelien Jarno ] + * lib32* packages: remove the Pre-Depends: libc6-i386 (>= 2.9-18) and + upgrade the Conflicts: libc6-i386 from (<< 2.9-18) to (<< 2.9-22). + Closes: #537466. + * kbsd-gnu-ada.dpatch: add support for kfreebsd-amd64. + + [ Matthias Klose ] + * Build gnat on armel, the gnat-4.4 build still failing, gcc-snapshot + builds good enough to build itself. + * Merge enough of the gnat-4.4 changes back to allow a combined build + from the gcc-4.4 source. + * Build libgnatprj for armel. + * On armel build just one version of the ada run-time library. + * Update auto* build dependencies for snapshot builds. + * Apply proposed patch for PR target/40718. + + -- Matthias Klose Sun, 23 Aug 2009 11:50:38 +0200 + +gcc-4.4 (4.4.1-2) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090808 from the gcc-4_4-branch (r150577). + - Fixes PR target/40832, PR rtl-optimization/40710, + PR tree-optimization/40321, PR build/40010, PR fortran/40727, + PR build/40010, PR rtl-optimization/40924, PR c/39902, + PR middle-end/40943, PR target/40577, PR c++/39987, PR debug/39706, + PR c++/40948, PR c++/40749, PR fortran/40851, PR fortran/40878, + PR target/40906. + * Bump GCC version required in dependencies to 4.4.1. + * Enable Ada for snapshot builds on all archs with a gnat package + available in the archive. + * Build-depend on binutils 2.19.51.20090805, needed at least for armel. + + [ Aurelien Jarno ] + * kbsd-gnu-ada.dpatch: new patch to fix build on GNU/kFreeBSD. + + -- Matthias Klose Sat, 08 Aug 2009 10:17:39 +0200 + +gcc-4.4 (4.4.1-1) unstable; urgency=low + + * GCC 4.4.1 release. + - Fixes PR target/39943, PR tree-optimization/40792, PR c++/40780, + PR middle-end/40747, PR libstdc++/40691, PR libfortran/40714, + PR tree-optimization/40813 (ICE in OpenJDK build on sparc). + * Apply proposed patch for PR target/39429, an ARM wrong-code error. + * Fix a typo in the arm back-end (proposed patch). + * Build-depend on libmpc-dev for snapshot builds. + * Fix build failure in cross builds (Hector Oron). Closes: #522597. + * Run the testsuite as part of the build target, not the install target. + + -- Matthias Klose Wed, 22 Jul 2009 13:24:39 +0200 + +gcc-4.4 (4.4.0-11) unstable; urgency=medium + + [ Matthias Klose ] + * Update to SVN 20090715 from the gcc-4_4-branch (r149690). + - Corresponds to the 4.4.1 release candidate. + - Fixes PR target/38900, PR debug/40666, PR middle-end/40669, + PR middle-end/40328, PR target/40587, PR middle-end/40585, + PR c++/40566, PR tree-optimization/40542, PR c/39902, + PR tree-optimization/40579, PR tree-optimization/40550, PR c++/40684, + PR c++/35828, PR c++/37816, PR c++/40639, PR c++/40633, PR c++/40619, + PR c++/40595, PR fortran/40440, PR fortran/40551, PR fortran/40638, + PR fortran/40443, PR libstdc++/40600, PR rtl-optimization/40667, PR c++/40740, + PR c++/36628, PR c++/37206, PR c++/40689, PR c++/40502, PR middle-end/40747. + * Backport of PR c/25509, new option -Wno-unused-result. LP: #305176. + * gcc-4.4: Depend on libgomp1, even if not building the libgomp1 package. + * Add proposed patches for PR libstdc++/40133, PR target/40134; don't apply + yet. + + [Emilio Pozuelo Monfort] + * Backport build-id support, configure with --enable-linker-build-id. + + -- Matthias Klose Tue, 14 Jul 2009 16:09:33 -0400 + +gcc-4.4 (4.4.0-10) unstable; urgency=low + + [ Arthur Loiret ] + * debian/rules.patch: Record the auto* calls to run them once only. + + [ Matthias Klose ] + * Update to SVN 20090627 from the gcc-4_4-branch (r149023). + - Fixes PR other/40024. + * Fix typo, adding blacklisted symbols to the libgcc1 symbols file on armel. + * On mips/mipsel use -O2 in STAGE1_CFLAGS until binutils is updated. + + -- Matthias Klose Sun, 28 Jun 2009 10:13:08 +0200 + +gcc-4.4 (4.4.0-9) unstable; urgency=high + + * Update to SVN 20090624 from the gcc-4_4-branch (r148821). + - Fix PR objc/28050 (LP: #362217), PR libstdc++/40297, PR c++/40342. + * Continue the well planned lib32 transition on amd64, adding pre-dependencies + on libc6-i386 (>= 2.9-18) on Debian. Closes: #533767. + * Enable SSP on arm and armel, run the testsuite with -fstack-protector. + LP: #375189. + * Fix spu fortran build in gcc-snapshot builds. + * Add missing symbols for 64bit libgfortran library. + * Update libstdc++ symbol files for sparc 64bit, adding symbols + for exception propagation support. + * Explicitely add __aeabi symbols to the libgcc1 symbols file on armel. + Closes: #533843. + + -- Matthias Klose Wed, 24 Jun 2009 23:46:02 +0200 + +gcc-4.4 (4.4.0-8) unstable; urgency=medium + + * Let all 32bit libs conflict with libc6-i386 (<< 2.9-17). Closes: #533767. + * Update to SVN 20090620 from the gcc-4_4-branch (r148747). + - Fixes PR fortran/39800, PR fortran/40402. + * Work around tar bug on kfreebsd unpacking java class file updates (#533356). + + -- Matthias Klose Sat, 20 Jun 2009 15:15:22 +0200 + +gcc-4.4 (4.4.0-7) unstable; urgency=medium + + * Update to SVN 20090618 from the gcc-4_4-branch (r148685). + - Fixes PR middle-end/40446, PR middle-end/40389, PR middle-end/40460, + PR fortran/40168, PR target/40470. + * On amd64, install 32bit libraries into /lib32 and /usr/lib32. + * lib32gcc1, lib32gomp1, lib32stdc++6: Conflict with libc6-i386 (= 2.9-15), + libc6-i386 (= 2.9-16). + * Handle serialver alternative in -jdk install scripts, not in -jre-headless. + + -- Matthias Klose Fri, 19 Jun 2009 01:36:00 +0200 + +gcc-4.4 (4.4.0-6) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090612 from the gcc-4_4-branch (r148433). + - Fixes PR c++/38064, PR c++/40139, PR target/40017, PR target/40266, + PR bootstrap/40027, PR tree-optimization/40087, PR target/39856, + PR rtl-optimization/40105, PR target/39942, PR middle-end/40204, + PR debug/40109, PR tree-optimization/39999, PR libfortran/37754, + PR fortran/22423, PR libfortran/39667, PR libfortran/39782, + PR libfortran/38668, PR libfortran/39665, PR libfortran/39702, + PR libfortran/39709, PR libfortran/39665i, PR libgfortran/39664, + PR fortran/38654, PR libfortran/37754, PR libfortran/37754, + PR libfortran/25561, PR libfortran/37754, PR middle-end/40291, + PR target/40017, PR middle-end/40340, PR c++/40308, PR c++/40311, + PR c++/40306, PR c++/40307, PR c++/40370, PR c++/40372, PR c++/40373, + PR c++/40381, PR fortran/40019, PR fortran/39893. + * gcj-4.4-jdk: Depend on libecj-java-gcj instead of libecj-java. + * Let gjdoc --version use the Configuration class instead of + version.properties (Alexander Sack). LP: #385682. + * Preserve libgcc_s.so linker scripts. Closes: #532263. + + [Ludovic Brenta] + * debian/patches/ppc64-ada.dpatch, + debian/patches/ada-mips.dpatch, + debian/patches/ada-mipsel.dpatch: remove, merged upstream. + * debian/patches/*ada*.dpatch: + - rename to *.diff; + - remove the dpatch prologue shell script + - refresh with quilt -p ab and without time stamps + - adjust to GCC 4.4 + * debian/patches/ada-library-project-files-soname.diff, + debian/patches/ada-polyorb-dsa.diff, + debian/patches/pr39856.diff: new. + * debian/rules.patch: adjust accordingly. + * debian/rules.defs: re-enable Ada. + * debian/rules2: do a lean bootstrap when building Ada. + * debian/rules.d/binary-ada.mk: do not build gnatbl or gprmake anymore, + removed upstream. + + -- Matthias Klose Fri, 12 Jun 2009 18:34:13 +0200 + +gcc-4.4 (4.4.0-5) unstable; urgency=medium + + * Update to SVN 20090517 from the gcc-4_4-branch (r147630). + - Fixes PR tree-optimization/40062, PR middle-end/39986, + PR middle-end/40057, PR fortran/39879, PR libstdc++/40038, + PR middle-end/40035, PR target/37179, PR middle-end/39666, + PR tree-optimization/40074, PR fortran/40018, PR fortran/38863, + PR middle-end/40147, PR fortran/40018, PR target/40153. + + [ Matthias Klose ] + * Update libstdc++ symbols files. + * Update libgcc, libobjc, libstdc++ symbols files for armel. + * Fix version symlink in gcc_lib_dir. Closes: #527837. + * Fix symlinks for javac and header files in /usr/lib/jvm. + Closes: #528084. + * Don't build the stage1 compiler with -O with recent binutils (trunk). + * Revert doing link tests to check for the atomic builtins, disabling + exception propagation support in libstdc++ on armel. See PR40133, PR40134. + * On mips/mipsel don't run the java testsuite with -mabi=64. + * Default to armv4 for the gcc-snapshot package as well. Closes: #523936. + * Mention GCC trunk in the gcc-snapshot package description. Closes: #526309. + * Remove unneed '..' elements from symlinks in JAVA_HOME. + * Fix some lintian warnings for gcc-snapshot. + + [ Arthur Loiret ] + * Add missing dir separator to multiarch path. Closes: #527537. + + -- Matthias Klose Sun, 17 May 2009 11:15:52 +0200 + +gcc-4.4 (4.4.0-4) unstable; urgency=medium + + * Update to SVN 20090506 from the gcc-4_4-branch (r147161). + - Fixes PR rtl-optimization/39914, PR testsuite/39776, + PR tree-optimization/40022, PR libstdc++/39909. + + [ Matthias Klose ] + * gcc-4.4-source: Don't depend on gcc-4.4-base, depend on quilt + and patchutils. + * On armel, link the shared libstdc++ with both -lgcc_s and -lgcc. + * Update libgcc and libstdc++ symbol files for mips and mipsel. + * Update libstdc++ symbol files for armel and hppa, adding symbols + for exception propagation support. + * Add ARM EABI symbols to libstdc++ symbol files for armel. + * Add libobjc symbols file for armel. + * Fix PR libstdc++/40038, missing ceill/tanhl symbols in libstdc++. + + [ Aurelien Jarno ] + * Fix libc name for biarch packages on kfreebsd-amd64. + + -- Matthias Klose Wed, 06 May 2009 15:10:36 +0200 + +gcc-4.4 (4.4.0-3) unstable; urgency=low + + * libstdc++-doc: Install the man pages again. + * Fix build configuration for the GC enabled ObjC runtime library. + * Fix thinko in autotools_files, resulting in autoconf not run in + some cases. + * Do link tests to check for the atomic builtins, enables exception + propagation support in libstdc++ on armel and hppa. + + -- Matthias Klose Sun, 03 May 2009 23:38:56 +0200 + +gcc-4.4 (4.4.0-2) unstable; urgency=low + + [ Samuel Thibault ] + * Enable java build on the hurd. + + [ Matthias Klose ] + * libobjc2.symbols.armel: Remove, use the default one. + * Address PR libstdc++/39491, removing __signbitl from the libstdc++6 + symbols file on hppa. + * libstdc++6.symbols.armel: Fix error introduced with copy from the + arm symbols file. + * libstdc++6.symbols.*: Don't assume exception propagation support + enabled for all architectures (although it should on armel, hppa, + sparc). + * Disable the build of the ObjC garbage collection library on mips*, + working around a build failure. + + -- Matthias Klose Sat, 02 May 2009 14:22:35 +0200 + +gcc-4.4 (4.4.0-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090429 from the gcc-4_4-branch (r146989). + * Configure java enabled builds with --enable-java-home. + * Integrate the bits previously found in java-gcj-compat. + * Rename the packages using the naming schema used for OpenJDK: + gcj-X.Y-{jre-headless,jre,jre-lib,jdk,source}. The packages + {gij,gcj,gappletviewer}-X.Y and libgcjN-{jar,source} are gone. + * Build the libgcj documentation with the just built gjdoc. + * Don't use profiled bootstrap when building the gcj source. + * Apply proposed patch for PR target/39856. + * Fix some lintian warnings. + * Don't include debug symbols for libstdc++.so.6, if the library is + built by a newer GCC version. + * Adjust hrefs to point to the local libstdc++ documentation. LP: #365414. + * Update libgcc, libgfortran, libobjc, libstdc++ symbol files. + * gcc-4.4: Include libssp_nonshared.a. + * For ix86, set the java architecture directory to i386. + + [ Samuel Thibault ] + * Update Hurd changes. + * Configure with --enable-clocale=gnu on hurd-i386. + * debian/patches/hurd-pthread.diff: Reapply. + + -- Matthias Klose Thu, 30 Apr 2009 00:30:20 +0200 + +gcc-4.4 (4.4.0-1~exp2) experimental; urgency=low + + * Update to SVN 20090423 from the gcc-4_4-branch. + + [ Aurelien Jarno ] + * kbsd-gnu.diff: remove parts merged upstream. + + [ Matthias Klose ] + * Remove conflicts/replaces for *-spu packages. + * Configure the spu cross compiler without --with-sysroot and + --enable-multiarch. + * Fix and reenable the gfortran-spu build. + * Work around build failures with missing libstdc++ baseline files. + * Install gjdoc man page. + * Fix java configuration with --enable-java-home and include symlinks + for JAVA_HOME in /usr/lib/jvm. + * Apply proposed fix for PR middle-end/39794. + * Install libstdc++ man pages with suffix .3cxx instead of .3. + Closes: #525244. + * lib*stdc++6-{dbg,doc}: Add conflicts to the corresponding 4.3 packages. + + -- Matthias Klose Thu, 23 Apr 2009 18:11:49 +0200 + +gcc-4.4 (4.4.0-1~exp1) experimental; urgency=low + + * Final GCC 4.4.0 release. + + * Don't build the Fortran SPU cross compiler, currently broken. + * spu cross build: Build without spucache and spumea64. + * Configure --with-arch-32=i486 on amd64, i386, and kfreebsd-{amd64,i386}, + --with-arch-32=i586 on hurd-i386, --with-cpu=atom on lpia. + * Build using profiled bootstrap. + * Remove the gcc-4.4-base.postinst. Addresses: #524708. + * Update debian/copyright: Include runtime library exception, remove + D and Phobas license. + * Apply proposed patch for PR libstdc++/39491, missing symbol in libstdc++ + on hppa. + * Remove unsused soft-fp functions in the 64bit libgcc on powerpc (PR39828). + * Update NEWS files for 4.4. + * Build again libgfortran for the non-default multilib configuration. + * Restore missing chunks in note-gnu-stack.diff, lost during the conversion + to quilt. + + -- Matthias Klose Wed, 22 Apr 2009 00:53:16 +0200 + +gcc-4.4 (4.4-20090418-1) experimental; urgency=low + + * Update to SVN 20090418 from the gcc-4_4-branch. + + [ Arthur Loiret ] + * Update patches: + - boehm-gc-nocheck, cross-include, libjava-rpath, link-libs: + Rebase on trunk. + - gcc-m68k-pch, libjava-debuginfo, libjava-loading-constraints: + Remove, merged in trunk. + - cell-branch, cell-branch-doc: Remove, there is no upstream cell 4.4 + branch yet. + - gdc-fix-build-kbsd-gnu, svn-gdc-updates, gpc-4.1, gpc-gcc-4.x, + gpc-names: Remove, gpc and gdc are not ported to GCC 4.4 yet. + - svn-class-updates, svn-doc-updates, svn-updates: Make empty. + - Refresh all others, and convert them all to quilt. + + * Build system improvements: + - Partial rewrite/refactor of rules files. + - Switch patch system to quilt. + - Autogenerate debian/copyright. + - Use the autoconf2.59 package. + + * multilib/multiarch support improvements: Closes: #369064, #484589. + - mips-triarch.diff: Replace with a newer version (approved upstream). + - s390-biarch.diff: Ditto. + - debian/rules2: Configure with --enable-targets=all on mips-linux, + mipsel-linux and s390-linux. + - gcc-multiarch.diff: New, add multiarch include directories and + libraries path to the system paths. + - debian/rules2: Configure with --enable-multiarch. Configure spu build + with --with-multiarch-defaults=spu-elf. + - multiarch-include.diff: Remove. + - debian/multiarch.inc: Ditto. + + * cross-compilers changes: + - Never build a separated -base package, don't symlink any doc dir. + - Build gobjc again. + + * Run the 64-bit tests with -mabi=64 instead of -m64 on mips/mipsel to + hopefully fix the massive failure. + * Always set $(distribution) to "Debian" on mips/mipsel, workarounds FTBFS + on those archs due to a kernel bug triggered by lsb_release call. + Adresses: #524416. + * debian/rules.patch: Only apply the ada-nobiarch-check patch when ada is + enabled. Remove gpc and gdc patches. + * debian/rules.unpack (install_autotools_stamp): Remove. + * debian/rules.defs (configure_dependencies): Remove autotools dependency. + * debian/rules.conf: Add a copyright-file target. + * debian/control.m4: Build-Depends on autoconf2.59 and patchutils. + Make gcc-4.4-source Depends on autoconf2.59. + Add myself to Uploaders. + * debian/rules.d/binary-source.mk: Don't build and install an embedded + copy or autoconf2.59 in gcc-4.4-source. + * debian/copyright.in: New. + + [ Matthias Klose ] + * Build gcj on hppa. + * Add support to build vfp optimized runtime libraries on armel. + * gcc-4.4-spu: Depend on newlib-spu. + * Fix sections of -dbg and java packages. + * gcc-default-ssp.dpatch: Set the default as well, when calling the + preprocessor. LP: #346126. + * Build-depend on quilt. + * Keep the copyright file in the archive. + * Remove conflict of the gcc-X.Y-source packages. + * Update removal of gfdl doc files for 4.4. + * Don't re-run the autotools (introduced with the switch to quilt). + * On arm and armel, install the arm_neon.h header. LP: #360819. + * When hardening options are turned on by default, patch the testsuite + to handle the hardening defaults (Kees Cook). + * Only run the patch target once. Avoids multiple autotool runs, but + doesn't reflect changes in the series file anymore. + * libgcj-doc: Fix documentation title. + * Fix gcj source build with recent build changes. + * Don't check for libraries in DEB_BUILD_OPTIONS/nolang. + * gappletviewer: Include missing binary. + + [ Aurelien Jarno ] + * Remove: patches/kbsd-gnu-ada.dpatch (merged upstream). + * kbsd-gnu.diff: add fix for stuff broken by upstream. + + -- Matthias Klose Mon, 20 Apr 2009 01:34:26 +0200 + +gcc-4.4 (4.4-20090317-1) experimental; urgency=low + + * Initial upload of GCC-4.4, based on trunk 20090317 (r144904). + + [Matthias Klose] + * Branch from the gcc-4.3 packaging. + * Remove *-trunk patches, update remaining patches for the trunk. + * Remove patches integrated upstream: libobjc-gc-link, libjava-file-support, + libjava-realloc-leak, libjava-armel-ldflags, libstdc++-symbols-hppa, + gcc-m68k-pch, libjava-extra-cflags, libjava-javah-bridge-tgts, + hppa-atomic-builtins, armel-atomic-builtins, libssp-gnu, libobjc-armel, + gfortran-armel-updates, sparc-biarch, libjava-xulrunner-1.9. + * Update patches for 4.4, mostly using the patches converted for quilt by + Arthur Loiret. + * debian/patches/libjava-soname.dpatch: Remove, unmodifed upstream library. + * debian/patches/gcc-driver-extra-langs.dpatch: Search Ada files in subdir. + * debian/rules.unpack, debian/rules.d/binary-source.mk: Update for included + autoconf tarball. + * debian/rules.d/binary-{gcc,java}.mk: Install new header files. + * debian/libgfortran3.symbols.common: Remove symbol not generated by + gfortran (__iso_c_binding_c_f_procpointer@GFORTRAN_1.0), PR38871. + * debian/rules.conf: Update for 4.4. + * Fix build dependencies and configure options for 4.4, which were applied + for snapshot builds only. + + [Arthur Loiret] + * Update patches from debian/patches: + - Remove backported fixes: + PR ada: pr10768.dpatch, pr15808.dpatch, pr15915.dpatch, pr16086.dpatch, + pr16087.dpatch, pr16098.dpatch, pr17985.dpatch, pr18680.dpatch, + pr22255.dpatch, pr22387.dpatch, pr28305.dpatch, pr28733.dpatch, + pr29015.dpatch, pr30740.dpatch, pr30827.dpatch pr33688.dpatch, + pr34466.dpatch, pr35050.dpatch, pr35792.dpatch. + PR target: pr27880.dpatch, pr28102.dpatch, pr30961.dpatch, + pr35965.dpatch, pr37661.dpatch. + PR libgcj: pr24170.dpatch, pr35020.dpatch. + PR gcov-profile: pr38292.dpatch. + PR other: pr28322.dpatch. + * debian/rules.patch: Update. + * debian/symbols/libgomp1.symbols.common: Add new symbols from OpenMP 3.0. + + -- Matthias Klose Tue, 17 Mar 2009 02:28:01 +0100 + +gcc-4.3 (4.3.3-5) unstable; urgency=low + + Merge from gnat-4.3 (4.3.3-1): + + [Petr Salinger] + * debian/patches/ada-libgnatprj.dpatch: enable support for GNU/kFreeBSD. + Fixes: #512277. + + [Ludovic Brenta] + * debian/patches/ada-acats.dpatch: attempt to fix ACATS tests (not entirely + successful yet). + * New upstream version. Fixes: #514565. + + [Matthias Klose] + * Update to SVN 20090301 from the gcc-4_3-branch. + - Fix PR c/35446, PR c++/38950, PR fortran/38852, PR fortran/39006, + PR c++/39225 (closes: #516727), PR c++/38950, PR target/38056, + PR target/39228, PR middle-end/36578, PR inline-asm/39058, + PR middle-end/37861. + * Don't provide the 4.3.2 symlink in gcc_lib_dir anymore. + * Require binutils-2.19.1. + + -- Matthias Klose Sun, 01 Mar 2009 14:18:09 +0100 + +gcc-4.3 (4.3.3-4) unstable; urgency=low + + * Fix Fix PR gcov-profile/38292 (wrong profile information), taken + from the trunk. + * Update to SVN 20090215 from the gcc-4_3-branch. + Fix PR c/35435, PR tree-optimization/39100, PR rtl-optimization/39076, + PR c/35433, PR tree-optimization/39041, PR target/38988, + PR middle-end/38969, PR c++/36897, PR c++/39054, PR c/39035, PR c/35434, + PR c/36432, PR target/38991, PR c/39084, PR target/39118. + * Reapply the fix for PR middle-end/38615. + * Include autoconf-2.59 sources into the source package, and install as + part of the gcc-4.3-source package. + * Explicitely use autoconf-1.9. + * Disable building the gcjwebplugin. + * Don't configure with --enable-cld on amd64 and i386. + + -- Matthias Klose Sun, 15 Feb 2009 23:40:09 +0100 + +gcc-4.3 (4.3.3-3) unstable; urgency=medium + + * Revert fix for PR middle-end/38615. Closes: #513420. + + -- Matthias Klose Thu, 29 Jan 2009 07:05:15 +0100 + +gcc-4.3 (4.3.3-2) unstable; urgency=low + + * Update to SVN 20090127 from the gcc-4_3-branch. + - Fix PR tree-optimization/38359. Closes: #492505. + - Fix PR tree-optimization/38932 (ice-on-valid-code), PR target/38931 + (ice-on-valid-code), PR rtl-optimization/38879 (wrong-code), + PR c++/23287 (rejects-valid), PR fortran/38907 (ice-on-valid-code), + PR fortran/38859 (wrong-code), PR fortran/38657 (rejects-valid), + PR fortran/38672 (ice-on-valid-code). + * Fix PR middle-end/38969, taken from the trunk. Closes: #513007. + + -- Matthias Klose Tue, 27 Jan 2009 23:42:45 +0100 + +gcc-4.3 (4.3.3-1) unstable; urgency=low + + * GCC-4.3.3 release (no changes compared to the 4.3.2-4 upload). + * Fix PR middle-end/38615 (wrong code, taken from the trunk). + + -- Matthias Klose Sat, 24 Jan 2009 14:43:09 +0100 + +gcc-4.3 (4.3.2-4) unstable; urgency=medium + + * Update to SVN 20090119 from the gcc-4_3-branch. + - Fix PR tree-optimization/36765 (wrong code). + * Remove patch for PR 34571, applied upstream (fix build failure on alpha). + * Apply proposed patch for PR middle-end/38902 (wrong code). + + -- Matthias Klose Tue, 20 Jan 2009 00:22:41 +0100 + +gcc-4.3 (4.3.2-3) unstable; urgency=low + + * Update to SVN 20090117 from the gcc-4_3-branch (4.3.3 release candidate). + - Fix PR target/34571, PR debug/7055, PR tree-optimization/37194, + PR tree-optimization/38529, PR fortran/38763, PR fortran/38765, + PR fortran/38669, PR fortran/38487, PR fortran/35681, PR fortran/38657, + PR c++/36019, PR c++/31488, PR c++/37646, PR c++/36334, PR c++/38357, + PR c++/31260, PR c++/38877, PR libstdc++/36801, PR libgcj/38396. + - debian/patches/libgcj-bc.dpatch: Remove, applied upstream. + * Fix PR middle-end/38616 (wrong code with -fstack-protector). + * Update backport for PR28322 (Gunther Nikl). + + -- Matthias Klose Sat, 17 Jan 2009 21:09:35 +0100 + +gcc-4.3 (4.3.2-2) unstable; urgency=low + + * Update to SVN 20090110 from the gcc-4_3-branch. + - Fix PR target/36654, PR tree-optimization/38752, PR fortran/38675, + PR fortran/37469, PR libstdc++/38000. + + -- Matthias Klose Sat, 10 Jan 2009 18:32:34 +0100 + +gcc-4.3 (4.3.2-2~exp5) experimental; urgency=low + + * Adjust build-dependencies for cross builds. Closes: #499998. + * Update to SVN 20081231 from the gcc-4_3-branch. + - Fix PR middle-end/38565, PR target/38062, PR bootstrap/38383, + PR target/38402, PR testsuite/35677, PR tree-optimization/38478, + PR target/38054, PR middle-end/29056, PR testsuite/28870, + PR target/38254. + - Fix PR libstdc++/37144, PR c++/37582, PR libstdc++/38080. + - Fix PR fortran/38602, PR fortran/38602, PR fortran/38487, + PR fortran/38113, PR fortran/35983, PR fortran/35937, PR testsuite/36889. + * Update the spu cross compiler from the cell-gcc-4_3-branch 20081217. + * debian/patches/libobjc-armel.dpatch: Don't define EH_USES. + * Apply the Atomic builtins patch for PARISC. + + -- Matthias Klose Thu, 18 Dec 2008 00:34:46 +0100 + +gcc-4.3 (4.3.2-2~exp4) experimental; urgency=low + + * Update to SVN 20081130 from the gcc-4_3-branch. + - Fix PR bootstrap/33304, PR middle-end/37807, PR middle-end/37809, + PR rtl-optimization/37489, PR target/35574, PR c/37924, + PR tree-optimization/37879, PR middle-end/37858, PR middle-end/37870, + PR target/38016, PR target/37939, PR rtl-optimization/37769, + PR target/37909, PR fortran/37597, PR fortran/35820, PR fortran/37445, + PR fortran/PR35769, PR fortran/37903, PR fortran/37749. + - Fix PR target/37640, PR tree-optimization/37868, PR bootstrap/33100, + PR other/38214, PR c++/37142, PR c++/35405, PR c++/37563, PR c++/38030, + PR c++/37932, PR c++/38007. + - Fix PR fortran/37836, PR fortran/38171, PR fortran/35681, + PR fortran/37792, PR fortran/37926, PR fortran/38033, PR fortran/36526. + - Fix PR target/38287. Closes: #506713. + * Atomic builtins using kernel helpers for PARISC and ARM Linux/EABI, taken + from the trunk. + + -- Matthias Klose Mon, 01 Dec 2008 01:29:51 +0100 + +gcc-4.3 (4.3.2-2~exp3) experimental; urgency=low + + * Update to SVN 20081117 from the gcc-4_3-branch. + * Add build dependencies on spu packages for snapshot builds. + * Add build dependency on libantlr-java for snapshot builds. + * Disable fortran on spu for snapshot builds. + * Add dependency on binutils-{hppa64,spu} for snapshot builds. + + -- Matthias Klose Mon, 17 Nov 2008 21:57:51 +0100 + +gcc-4.3 (4.3.2-2~exp2) experimental; urgency=low + + * Update to SVN 20081023 from the gcc-4_3-branch. + - General regression fixes: PR rtl-optimization/37882 (wrong code), + - Fortran regression fixes: PR fortran/37787, PR fortran/37723. + * Use gij-4.3 for builds in java maintainer mode. + * Don't run the testsuite with -fstack-protector for snapshot builds. + * Update the spu cross compiler from the cell-gcc-4_3-branch 20081023. + Don't disable multilibs, install additional components in the gcc-4.3-spu + package. + * Enable building the spu cross compiler for powerpc and ppc64 snapshot + builds. + * Apply proposed patch for PR tree-optimization/37868 (wrong code). + * Apply proposed patch to parallelize make check. + * For biarch builds, disable the gnat testsuite for the non-default + architecture (no biarch support in gnat yet). + + -- Matthias Klose Thu, 23 Oct 2008 22:06:38 +0200 + +gcc-4.3 (4.3.2-2~exp1) experimental; urgency=low + + * Update to SVN 20081017 from the gcc-4_3-branch. + - General regression fixes: PR rtl-optimization/37408 (wrong code), + PR tree-optimization/36630, PR tree-optimization/37102 (wrong code), + PR c/35437 (ice on invalid code), PR middle-end/37731 (wrong code), + PR target/37603 (wrong code, hppa), PR tree-optimization/35737 (ice on + valid code), PR middle-end/36575 (wrong code), PR c/37645 (ice on valid + code), PR tree-optimization/37539 (compile time hog), PR middle-end/37236 + (ice on invalid code), PR tree-optimization/36343 (wrong code), + PR rtl-optimization/37544 (wrong code), PR target/35620 (ice on valid + code), PR target/35713 (ice on valid code, wrong code), PR c/35712 (wrong + code), PR target/37466 (wrong code, AVR). + - C++ regression fixes: PR c++/37389 (LP: #252301), PR c++/37555 (ice on + invalid code). + - Fortran regression fixes: PR fortran/37199, PR fortran/36214, + PR fortran/35770, PR fortran/36454, PR fortran/36374, PR fortran/37274, + PR fortran/37583, PR fortran/36700, PR fortran/35945, PR fortran/37626, + PR fortran/37504, PR fortran/37580, PR fortran/37706, PR fortran/35680, + PR fortran/37794. + * Remove obsolete patches: ada-driver.dpatch, pr33148.dpatch. + * Fix naming of bridge targets in gjavah (wrong header generation). + * Fix PR target/37661, SPARC64 int-to-TFmode conversions. + * Include the complete test summaries in a binary package, to allow + regression checking from the previous build. + * Tighten inter-package dependencies to (>= 4.3.2-1). + * Drop the 4.3.1 symlink in gcc_lib_dir, add a 4.3.3 symlink to 4.3. + + -- Matthias Klose Fri, 17 Oct 2008 23:26:50 +0200 + +gcc-4.3 (4.3.2-1) unstable; urgency=medium + + [Matthias Klose] + * Final gcc-4.3.2 release (regression fixes). + - Remove the generated install docs from the tarball (GFDL licensed). + - C++ regression fixes: PR debug/37156. + - general regression fixes: PR debug/37156, PR target/37101. + - Java regression fixes: PR libgcj/8995. + * Update to SVN 20080905 from the gcc-4_3-branch. + - C++ regression fixes: PR c++/36741 (wrong diagnostic), + - general regression fixes: PR target/37184 (ice on valid code), + PR target/37191 (ice on valid code), PR target/37197 (ice on valid code), + PR middle-end/36817 (ice on valid code), PR middle-end/36548 (wrong code), + PR middle-end/37125 (wrong code), PR c/37261 (wrong diagnostic), + PR target/37168 (ice on valid code), PR middle-end/36449 (wrong code), + PR middle-end/37248 (missed optimization), PR target/36332 (wrong code). + - Fortran regression fixes: PR fortran/37193 (rejects valid code). + * Move symlinks in gcc_lib_dir from cpp-4.3 to gcc-4.3-base. Closes: #497369. + * Don't build-depend on autogen on architectures where it is not installable + (needed for the fixincludes testsuite only); don't build-depend on it for + source packages not running the fixincludes testsuite. + + [Ludovic Brenta] + * Add sdefault.ads to libgnatprj4.3-dev. Fixes: #492866. + * turn gnatvsn.gpr and gnatprj.gpr into proper library project files. + * Unconditionally build-depend on gnat when building gnat-4.3. + Fixes: #487564. + * (debian/rules.d/binary-ada.mk): Add a symlink libgnat.so to + /usr/lib/libgnat-4.3.so in the adalib directory. Fixes: #493814. + * (debian/patches/ada-sjlj.dpatch): remove dangling symlinks from all + adalib directories. + * debian/patches/ada-alpha.dpatch: remove, applied upstream. + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/pr16086.dpatch: new; backport from GCC 4.4. + Closes: #248172. + * debian/patches/pr35792.dpatch: new; backport from GCC 4.4. + * debian/patches/pr15808.dpatch (fixes: #246392), + debian/patches/pr30827.dpatch: new; backport from the trunk. + + -- Matthias Klose Fri, 05 Sep 2008 22:52:58 +0200 + +gcc-4.3 (4.3.1-9) unstable; urgency=low + + * Update to SVN 20080814 from the gcc-4_3-branch. + - C++/libstdc++ regression fixes: PR c++/36688, PR c++/37016, PR c++/36999, + PR c++/36405, PR c++/36767, PR c++/36852. + - general regression fixes: PR target/36613, PR rtl-optimization/36998, + PR middle-end/37042, PR middle-end/35432, PR target/35659, + PR middle-end/37026, PR middle-end/36691, PR tree-optimization/36991, + PR rtl-optimization/35542, PR bootstrap/35752, PR rtl-optimization/36419, + PR debug/36278, PR preprocessor/36649, PR rtl-optimization/36929, + PR tree-optimization/36830, PR c/35746, PR middle-end/37014, + PR middle-end/37103. + - Fortran regression fixes: PR fortran/36132. + - Java regression fixes: PR libgcj/31890. + - Fixes PR middle-end/37090. Closes: #494815. + + -- Matthias Klose Thu, 14 Aug 2008 18:02:52 +0000 + +gcc-4.3 (4.3.1-8) unstable; urgency=low + + * Undo Revert PR tree-optimization/36262 on i386 (PR 36917 is invalid). + + -- Matthias Klose Fri, 25 Jul 2008 21:47:52 +0200 + +gcc-4.3 (4.3.1-7) unstable; urgency=low + + * Update to SVN 20080722 from the gcc-4_3-branch. + - Fix PR middle-end/36811, infinite loop building with -O3. + - C++/libstdc++ regression fixes: PR c++/36407, PR c++/34963, + PR libstdc++/36832, PR libstdc++/36552, PR libstdc++/36729. + - Fortran regression fixes: PR fortran/36366, PR fortran/36824. + - general regression fixes: PR middle-end/36877, PR target/36780, + PR target/36827, PR rtl-optimization/35281, PR rtl-optimization/36753, + PR target/36827, PR target/36784, PR target/36782, PR middle-end/36369, + PR target/36780, PR target/35492, PR middle-end/36811, + PR rtl-optimization/36419, PR target/35802, PR target/36736, + PR target/34780. + * Revert PR tree-optimization/36262 on i386, causing miscompilation of + OpenJDK hotspot. + * gij/gcj: Don't remove alternatives on upgrade. Addresses: #479950. + + -- Matthias Klose Tue, 22 Jul 2008 23:55:54 +0200 + +gcc-4.3 (4.3.1-6) unstable; urgency=low + + * Start the logwatch script on alpha as well to avoid timeouts in + the testsuite. + + -- Matthias Klose Mon, 07 Jul 2008 11:31:58 +0200 + +gcc-4.3 (4.3.1-5) unstable; urgency=low + + * Update to SVN 20080705 from the gcc-4_3-branch. + - Fix PR target/36634, wrong-code on powerpc with -msecure-plt. + * Fix PR target/35965, PIC + -fstack-protector on arm/armel. Closes: #469517. + * Don't run the libjava testsuite with -mabi=n32. + * Update patch for PR other/28322, that unknown -Wno-* options do not + cause errors, but warnings instead. + * On m68k, add -fgnu89-inline when in gnu99 mode (requested by Michael + Casadeval for the m68k port). Closes: #489234. + + -- Matthias Klose Sun, 06 Jul 2008 01:39:30 +0200 + +gcc-4.3 (4.3.1-4) unstable; urgency=low + + * Revert: debian/patches/gcc-multilib64dir.dpatch: Remove obsolete patch. + * Remove obsolete multiarch-lib patch. + + -- Matthias Klose Mon, 30 Jun 2008 23:05:17 +0200 + +gcc-4.3 (4.3.1-3) unstable; urgency=medium + + [Arthur Loiret] + * debian/rules2: + - configure sh4-linux with --with-multilib-list=m4,m4-nofpu + and --with-cpu=sh4. + - configure sparc-linux with --enable-targets=all on snapshot builds + (change already in 4.3.1-1). + * debian/rules.patch: Don't apply sh4-multilib.dpatch. + + [Matthias Klose] + * Update to SVN 20080628 from the gcc-4_3-branch. + - Fix PR target/36533, wrong-code with incorrectly assumed aligned_operand. + Closes: #487115. + * debian/rules.defs: Remove hurd-i386 from ssp_no_archs (Samuel Thibault). + Closes: #483613. + * Do not create a /usr/lib/gcc//4.3.0 symlink. + * debian/patches/gcc-multilib64dir.dpatch: Remove obsolete patch. + * libjava/classpath: Set and use EXTRA_CFLAGS (taken from the trunk). + + -- Matthias Klose Sat, 28 Jun 2008 16:00:38 +0200 + +gcc-4.3 (4.3.1-2) unstable; urgency=low + + * Update to SVN 20080610 from the gcc-4_3-branch. + - config.gcc: Fix quoting for in the enable_cld test. + * Use GNU locales on hurd-i386 (Samuel Thibault). Closes: #485395. + * libstdc++-doc: Fix URL's for locally installed docs. Closes: #485133. + * libjava: On armel apply kludge to fix unwinder infinitely looping 'til + it runs out of memory. + * Adjust dependencies to require GCC 4.3.1. + + -- Matthias Klose Wed, 11 Jun 2008 00:35:38 +0200 + +gcc-4.3 (4.3.1-1) unstable; urgency=high + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/pr16087.dpatch: new. Fixes: #248173. + * Correct the patches from the previous upload. + + [Ludovic Brenta] + * debian/patches/ada-acats.dpatch: really run the just-built gnat, not the + bootstrap gnat. + * debian/rules2: when running the Ada test suite, do not run the multilib + tests as gnat does not support multilib yet. + * Run the ACATS testsuite again (patch it so it correctly finds gnatmake). + + [Thiemo Seufer] + * debian/patches/ada-libgnatprj.dpatch, + debian/patches/ada-mips{,el}.dpatch: complete support for mips and mipsel. + Fixes: #482433. + + [Matthias Klose] + * GCC-4.3.1 release. + * Do not include standard system paths in libgcj pkgconfig file. + * Suggest the correct libmudflap0-dbg package. + * Fix PR libjava/35020, taken from the trunk. + * Apply proposed patch for PR tree-optimization/36343. + * On hurd-i386 with -fstack-protector do not link with libssp_nonshared + (Samuel Thibault). Closes: #483613. + * Apply proposed patch for PR tree-optimization/34244. + * Remove debian-revision in symbols files. + * Fix installation of all biarch -multilib packages which are not triarch. + * Fix some lintian warnings. + * Include library symlinks in gobjc and gfortran multilib packages, when + not building the library packages. + * Fix sections in doc-base files. + * Don't apply the sparc-biarch patch when building the gcc-snapshot package. + * libjava: Add @file support for gjavah & gjar. + * Apply patch for PR rtl-optimization/36111, taken from the trunk. + + * Closing reports reported against gcc-4.0 and fixed in gcc-4.3: + - General + + Fix PR optimization/3511, inlined strlen() could be smarter. + Close: #86251. + - C + + Fix PR c/9072, Split of -Wconversion in two different flags. + Closes: #128950, #226952. + - C++/libstdc++ + + PR libstdc++/24660, implement versioning weak symbols in libstdc++. + Closes: #328421. + - Architecture specific: + - mips + + PR target/26560, unable to find a register to spill in class + 'FP_REGS'. Closes: #354439. + - sparc + + Fix PR rtl-optimization/23454, ICE in invert_exp_1. Closes: #340951. + * Closing reports reported against gcc-4.1 and fixed in gcc-4.2: + - General + + PR tree-optimization/30132, ICE in find_lattice_value. Closes: #400484. + + PR other/29534, ICE in "gcc -O -ftrapv" with decreasing array index. + Closes: #405065. + + Incorrect SSE2 code generation for vector initialization. + Closes: #406442. + + Fix segfault in cc1 due to infinite loop in error() when using -ftrapv. + Closes: #458072. + + Fix regression in code size with -Os compared to GCC-3.3. + Closes: #348298. + - C++ + + Fix initialization of global variables with non-constant initializer. + Closes: #446067. + + Fix ICE building muse. Closes: #429385. + * Closing reports reported against gcc-4.1 and fixed in gcc-4.3: + - C++ + + PR c++/28705, ICE: in type_dependent_expression_p. Closes: #406324. + + PR c++/7302, -Wnon-virtual-dtor should't complain of protected dtor. + Closes: #356316. + + PR c++/28316, PR c++/24791, PR c++/20133, ICE in instantiate_decl. + Closes: #327346, #355909. + - Fortran + + PR fortran/31639, ICE in gfc_conv_constant. Closes: #401496. + - Java + + Fix ICE using gcj with --coverage. Closes: #416326. + + PR libgcj/29869, LogManager class loading failure. Closes: #399251 + + PR swing/29547 setText (String) of JButton does not work + with HTML code. Closes: #392791. + + PR libgcj/29178, CharsetEncoder.canEncode() gives different results + than Sun version. Closes: #388596. + + PR java/8923, ICE when modifying a variable decleared "final static". + Closes: #351512. + + PR java/22507, segfault building Apache Cocoon. Closes: #318534. + + PR java/2499, class members should be inherited from implemented + interfaces. Closes: #225434. + + PR java/10581, ICE compiling freenet. Closes: #186922. + + PR libgcj/28340, gij ignores -Djava.security.manager. Closes: #421098. + + PR java/32846, build failure on GNU/Hurd. Closes: #408888. + + PR java/29194, fails to import package from project. Closes: #369873. + + PR libgcj/31700, -X options not recognised by JNI_CreateJavaVM. + Closes: #426742. + + java.util.Calendar.setTimeZone fails to set ZONE_OFFSET. + Closes: #433636. + - Architecture specific: + - alpha + + C++, fix segfault in constructor with -Os. Closes: #438436. + - hppa + + PR target/30131, ICE in propagate_one_insn. Closes: #397341. + - m32r + + PR target/28508, assembler error (operand out of range). + Closes: #417542. + - m68k + + PR target/34688, ICE in output_operand. Closes: #459429. + * Closing reports reported against gcc-4.2 and fixed in gcc-4.3: + - General + + PR tree-optimization/33826, wrong code generation for infinitely + recursive functions. Closes: #445536. + - C++ + + PR c++/24791, ICE on invalid instantiation of template's static member. + Closes: #446698. + + [Aurelien Jarno] + * Really apply arm-funroll-loops.dpatch on arm and armel. Closes: #476460. + + -- Matthias Klose Sat, 07 Jun 2008 23:16:21 +0200 + +gcc-4.3 (4.3.0-5) unstable; urgency=medium + + * Update to SVN 20080523 from the gcc-4_3-branch. + - Remove gcc-i386-emit-cld patch. + - On Debian amd64 and i386 configure with --enable-cld. + * Fix PR tree-optimization/36129, ICE with -fprofile-use. + * Add spu build dependencies independent of the architecture. + * Move arm -funroll-loops fix to arm-funroll-loops from + gfortran-armel-updates. Apply it on both arm and armel. + Closes: #476460. + * Use iceape-dev as a build dependency for Java enabled builds. + * Build the sru cross compiler from a separate source dir without applying + the hardening patches. + + -- Matthias Klose Fri, 23 May 2008 10:12:02 +0200 + +gcc-4.3 (4.3.0-4) unstable; urgency=low + + [ Aurelien Jarno ] + * Fix gnat-4.3 build on mips/mipsel. + * Update libgcc1 symbols for hurd-i386. + + [ Arthur Loiret ] + * Make gcc-4.3-spu Recommends newlib-spu. Closes: #476088 + * Build depend on spu build dependencies only when building + as gcc-4.x source package. + * Disable spu for snapshot builds. + * Support sh4 targets: + - sh4-multilib.dpatch: Add, fix multilib (m4/m4-nofpu) for sh4-linux + - multiarch-include.dpatch: Don't apply on sh4. + + [ Matthias Klose ] + * Stop building libffi packages. + * Update to SVN 20080501 from the gcc-4_3-branch. + - Fix PR target/35662, wrong gfortran code on mips/mipsel. Closes: #476427. + - Fixes mplayer build on powerpc. Closes: #475153. + * Stop building gij/gcj on alpha, arm and hppa. Closes: #459560. + * libstdc++6-4.3-doc: Fix file location in doc-base file. Closes: #476253. + * debian/patches/template.dpatch: Remove the `exit 0' line. + * Fix alternative names for amd64 cross builds. Addresses: #466422. + * debian/copyright: Update to GPLv3, remove the text of the GFDL + and reference the copy in common-licenses. + * Generate the locale data for the testsuite, if the locales package + is installed (not a dependency on all archs). + * Update libgcc2 symbols for m68k, libstdc++6 symbols for arm, m68k, mips + and mipsel. + * Do not include a symbols file for libobjc_gc.so. + * Add four more symbols to libgcj_bc, patch taken from the trunk. + * Adjust names of manual pages in the spu build on powerpc. + * ARM EABI (armel) updates (Andrew Jenner, Julian Brown): + - Add Objective-C support. + - Fortran support patches. + - Fix ICE in gfortran.dg/vector_subscript_1.f90 for -Os -mthumb reload. + * Build ObjC and Obj-C++ packages on armel. + * Reenable running the testsuite on m68k. + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/gnalasup_to_lapack.dpatch: new. + * debian/patches/pr34466.dpatch, + debian/patches/pr22255.dpatch, + debian/patches/pr33688.dpatch, + debian/patches/pr10768.dpatch, + debian/patches/pr28305.dpatch, + debian/patches/pr17985.dpatch (#278685) + debian/patches/pr15915.dpatch, + debian/patches/pr16098.dpatch, + debian/patches/pr18680.dpatch, + debian/patches/pr28733.dpatch, + debian/patches/pr22387.dpatch, + debian/patches/pr29015.dpatch: new; backport Ada bug fixes from GCC 4.4. + * debian/patches/rules.patch: apply them. + * debian/patches/pr35050.dpatch: update. + + [Andreas Jochens] + * debian/patches/ppc64-ada.dpatch: update, adding support for ppc64. + (#476868). + + [Ludovic Brenta] + * Apply ppc64-ada.dpatch whenever we build libgnat, not just on ppc64. + * debian/patches/pr28322.dpatch: never pass -Wno-overlength-strings to + the bootstrap compiler, as the patch breaks the detection of whether + the bootstrap compiler supports this option or not. + Fixes: #471192. Works around #471767. + * Merge Aurélien Jarno's mips patch. Fixes: #472854. + + [ Samuel Tardieu ] + * debian/patches/pr30740.dpatch: new Ada bug fix. + * debian/patches/pr35050.dpatch: new Ada bug fix. + + [ Xavier Grave ] + * debian/patches/ada-mips{,el}.dpatch: new; split mips/mipsel support + into new patches, out of ada-sjlj.dpatch. + * debian/rules.d/binary-ada.mk: fix the version number of libgnarl-4.3.a. + + [Roman Zippel] + * PR target/25343, fix gcc.dg/pch/pch for m68k. + + -- Matthias Klose Thu, 01 May 2008 21:08:09 +0200 + +gcc-4.3 (4.3.0-3) unstable; urgency=medium + + [ Matthias Klose ] + * Update to SVN 20080401 from the gcc-4_3-branch. + - Fix PR middle-end/35705 (hppa only). + * Update libstdc++6 symbols for hurd-i386. Closes: #472334. + * Update symbol files for libgomp (ppc64). + * Only apply the gcc-i386-emit-cld patch on amd64 and i386 architectures. + * Update libstdc++ baseline symbols for hppa. + * Install powerpc specific header files new in 4.3. + * gcc-4.3-hppa64: Don't include the install tools in the package. + + [ Aurelien Jarno ] + * Fix gobjc-4.3-multilib dependencies. Closes: #473455. + * Fix gnat-4.3 build on mips/mipsel. + * patches/ada-alpha.dpatch: new patch to fix gnat-4.3 build on alpha. + Closes: #472852. + * patches/config-ml.dpatch: also check for n32 multidir. + + [ Arthur Loiret ] + * Build-Depends on binutils (>= 2.18.1~cvs20080103-2) on mips and mipsel, + required for triarch. + * libstdc++-pic.dpatch: Update, don't fail anymore if shared lib is disabled. + + [ Andreas Jochens ] + * Fix build failures on ppc64. Closes: #472917. + - gcc-multilib64dir.dpatch: Remove "msoft-float" and "nof" from MULTILIB + variables. + - Removed ppc64-biarch.dpatch. + - Add debian/lib32gfortan3.symbols.ppc64. + + [ Arthur Loiret, Matthias Klose ] + * Build compilers for spu-elf target on powerpc and ppc64. + - Add gcc-4.3-spu, g++-4.3-spu and gfortran-4.3-spu packages. + - Partly based on the work in Ubuntu on the spu toolchain. + + -- Matthias Klose Tue, 01 Apr 2008 23:29:21 +0000 + +gcc-4.3 (4.3.0-2) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080321 from the gcc-4_3-branch. + - Remove some broken code that attempts to enforce linker + constraints. Closes: #432541. + * Temporary fix, will be removed once a fixed kernel is available + in testing: Emit cld instruction when stringops are used (i386). + Do not expose the -mcld option until added upstream. Closes: #469567. + * Update NEWS files. + * libjava: Don't leak upon failed realloc (taken from the trunk). + * debian/rules2: The build is not yet prepared to take variables from + the environment; unexport and unset those. + + [Arthur Loiret/Aurelien Jarno] + * MIPS tri-arch support: + - mips-triarch.dpatch: new patch to default to o32 and follow the + glibc convention for n32 & 64 bit names. + - Rename $(biarch) and related vars into $(biarch64). + - Fix biarchsubdir to allow triarch. + - Add biarchn32 support. + - Add mips and mipsel to biarch64 and biarchn32 archs. + - Update binary rules for biarchn32 and libn32 targets. + - Fix multilib deps for triarch. + - control.m4: Add libn32 packages. + + -- Matthias Klose Sat, 22 Mar 2008 00:06:33 +0100 + +gcc-4.3 (4.3.0-1) unstable; urgency=low + + [Matthias Klose] + * GCC-4.3.0, final release. + * Update to SVN 20080309 from the gcc-4_3-branch. + * Build from a modified tarball, without GFDL documentation with + invariant sections and cover texts. + * debian/rules.unpack: Avoid make warnings. + * debian/rules.d/binary-cpp.mk: Add 4.3.0 symlink in gcclibdir. + * Stop building treelang (removed upstream). + * gcj-4.3: Hardcode libgcj-bc dependency, don't run dh_shlibdeps on ecj1. + + [Aurelien Jarno] + * Update libssp-gnu.dpatch and reenable it. + + -- Matthias Klose Sun, 09 Mar 2008 15:18:08 +0100 + +gcc-4.3 (4.3.0~rc2-1) unstable; urgency=medium + + * Update to SVN 20080301 from the gcc-4_3-branch. + * Include the biarch libobjc_gc library in the packages. + * Link libobjc_gc with libgcjgc_convenience.la. + * Add new symbols to libstdc++6 symbol files, remove the symbols for + support (reverted upstream for the 4.3 branch). + * Disable running the testsuite on m68k. + * Update PR other/28322, ignore only unknown -W* options. + + -- Matthias Klose Sat, 01 Mar 2008 15:09:16 +0100 + +gcc-4.3 (4.3-20080227-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080227 from the gcc-4_3-branch. + * Fix PR other/28322, GCC new warnings and compatibility. + Addresses: #367657. + + [Hector Oron] + * Fix cross-compile builds. Closes: #467471. + + -- Matthias Klose Thu, 28 Feb 2008 00:30:38 +0100 + +gcc-4.3 (4.3-20080219-1) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20080219 from the gcc-4_3-branch. + * Apply proposed patch for PR target/34571 (alpha). + * libgcj9-dev: Don't claim that the package contains the static + libraries. + * libjava-xulrunner1.9.dpatch: Add configure check for xulrunner-1.9. + Name the alternative xulrunner-1.9-javaplugin.so. + * libgcj-doc: Don't include the examples; these cannot be built + with the existing Makefile anyway. Addresses: #449608. + * Manpages for gc-analyze and grmic are GFDL. Don't include these when + building DFSG compliant packages. + * Fix build failure building amd64 cross-target libstdc++ packages + (Tim Bagot). Addresses: #464365. + * Fix typos in rename-info-files patch (Richard Guenther). + * Fix PR libgcj/24170. + + [Aurelien Jarno] + * kbsd-gnu-ada.dpatch: new patch to fix build on GNU/kFreeBSD. + + [Ludovic Brenta] + * debian/rules.defs: Temporarily disable the testsuite when building gnat. + * debian/patches/libffi-configure.dpatch: run autoconf in the top-level + directory, where we've changed configure.ac; not in src/gcc. + * debian/patches/ada-sjlj.dpatch: do not run autoconf since we don't + change configure.ac. + * debian/control.m4 (gnat-4.3-doc): conflict with gnat-4.[12]-doc. + Closes: #464801. + + -- Matthias Klose Tue, 19 Feb 2008 23:20:45 +0000 + +gcc-4.3 (4.3-20080202-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080202 from the trunk. + - Fix PR c/35017, pedwarns about valid code. Closes: #450506. + - Fix PR target/35045, wrong code generation with -O3 on i386. + Closes: #463478. + * gcj-4.3: On armel depend on g++-4.3. + * Re-enable build of libobjc_gc, using the internal version of boehm-gc. + Closes: #212248. + + [Ludovic Brenta] + * debian/patches/ada-default-project-path.dpatch, + debian/patches/ada-gcc-name.dpatch, + debian/patches/ada-symbolic-tracebacks.dpatch, + debian/patches/ada-link-lib.dpatch, + debian/patches/ada-libgnatvsn.dpatch, + debian/patches/ada-libgnatprj.dpatch, + debian/patches/ada-sjlj.dpatch: adjust to GCC 4.3. + * debian/README.gnat, debian/TODO, + debian/rules.d/binary-ada.mk: merge from gnat-4.2. + * debian/README.maintainers: add instructions for patching GCC. + * debian/patches/ada-driver.dpatch: remove, no longer used. + * debian/patches/libffi-configure.dpatch: do not patch the top-level + configure anymore; instead, rerun autoconf. This allows removing the + patch cleanly. + * debian/rules2: use gnatgcc as the bootstrap compiler, not gcc-4.2. + + -- Matthias Klose Sat, 02 Feb 2008 19:58:48 +0100 + +gcc-4.3 (4.3-20080127-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080126 from the trunk. + * Tighten build dependency on doxygen. + * Update libstdc++ patches to current svn. + * gij-4.3: Provide java*-runtime-headless instead of java*-runtime. + + [ Aurelien Jarno] + * debian/multiarch.inc: change mipsel64 into mips64el. + + -- Matthias Klose Sun, 27 Jan 2008 01:33:35 +0100 + +gcc-4.3 (4.3-20080116-1) unstable; urgency=medium + + * Update to SVN 20080116 from the trunk. + * Update debian/watch. + * Build libgomp documentation without building libgomp. Addresses: #460660. + * Handle lzma compressed tarballs. + * Fix dependency generation for the gcc-snapshot package: Addresses: #454667. + * Restore lost chunk in libjava-subdir.dpatch. + + -- Matthias Klose Wed, 16 Jan 2008 20:33:50 +0100 + +gcc-4.3 (4.3-20080112-1) unstable; urgency=low + + * Update to SVN 20080112 from the trunk. + * Tighten build-dependency on dpkg-dev (closes: #458894). + * Update symbol definitions for alpha. + * Build-depend on libmpfr-dev for all source packages. + + -- Matthias Klose Sun, 13 Jan 2008 00:40:28 +0100 + +gcc-4.3 (4.3-20080104-1) unstable; urgency=low + + * Update to SVN 20080104 from the trunk. + * Update symbol definitions for alpha, hppa, ia64, mips, mipsel, powerpc, + s390, sparc. + + -- Matthias Klose Fri, 04 Jan 2008 07:34:15 +0100 + +gcc-4.3 (4.3-20080102-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080102 from the trunk. + - Fix 64bit biarch builds (addresses: #447443). + * debian/rules.d/binary-java.mk: Reorder packaging to get shlibs + dependencies right. + * Use lib instead of lib64 as multilibdir on amd64 and ppc64. + * Build the java plugin always using libxul-dev. + * Add libgcj_bc to the libgcj9-0 shlibs file. + * Add symbol files for libgcc1, lib32gcc1, lib64gcc1, libstdc++6, + lib32stdc++6, lib64stdc++6, libgomp1, lib32gomp1, lib64gomp1, libffi4, + lib32ffi4, lib64ffi4, libobjc2, lib32objc2, lib64objc2, libgfortran3, + lib32gfortran3, lib64gfortran3. + Adjust build dependencies on dpkg-dev and debhelper. + * Do not build the java packages from the gcc-4.3 source package. + + [ Aurelien Jarno ] + * Disable amd64-biarch patch on kfreebsd-amd64. + + -- Matthias Klose Wed, 02 Jan 2008 23:48:14 +0100 + +gcc-4.3 (4.3-20071124-1) experimental; urgency=low + + [ Matthias Klose ] + * Update to SVN 20071124 from the trunk. + * Fix dependencies of lib*gcc1-dbg packages. + * gcjwebplugin: Fix path of the gcj subdirectory. LP: #149792. + * gij-hppa: Call gij-4.2, not gij-4.1. Addresses: #446282. + * Don't run the testsuite on hppa when expect-tcl8.3 is not available. + * Fix libgcc1-dbg doc directory symlink. Closes: #447969. + + [ Aurelien Jarno ] + * Update kbsd-gnu patch. + * Remove kbsd-gnu-ada patch (merged upstream). + + -- Matthias Klose Sat, 24 Nov 2007 13:14:29 +0100 + +gcc-4.3 (4.3-20070930-1) experimental; urgency=low + + [Matthias Klose] + * Update to SVN 20070929 from the trunk. + * Update debian patches to the current trunk. + * Regenerate the control file. + * On powerpc-linux-gnu and i486-linux-gnu cross-compile the 64bit + multilib libraries to allow a sucessful build on 32bit kernels + (our buildds). Although we won't get 64bit test results this way ... + * Remove the build dependency on expect-tcl8.3. + * Fix MULTILIB_OSDIRNAMES for cross builds targeted for amd64 and ppc64. + * When -fstack-protector is the default (Ubuntu), do not enable + -fstack-protector when -nostdlib is specified. LP: #77865. + * Always set STAGE1_CFLAGS to -g -O2, only pass other settings + when configuring when required. + * Configure --with-bugurl, adjust the bug reporting instructions. + * gcc-4.3: Install new cpuid.h header. + * Fix installation of the s390 libstdc++ biarch headers. + * Install new bmmintrin.h, mmintrin-common.h headers. + * Build -dbg packages for libgcc, libgomp, libmudflap, libffi, libobjc, + libgfortran. + * Downgrade libmudflap-dev recommendation to a suggestion. Closes: #443929. + + [Riku Voipio] + * Configure armeabi with --disable-sjlj-exceptions. + * armel testsuite takes ages, adjust build accordingly. + + -- Matthias Klose Sun, 30 Sep 2007 12:06:02 +0200 + +gcc-4.3 (4.3-20070902-1) experimental; urgency=low + + * Upload to experimental. + + -- Matthias Klose Sun, 2 Sep 2007 20:51:16 +0200 + +gcc-4.3 (4.3-20070902-0ubuntu1) gutsy; urgency=low + + * Update to SVN 20070902 from the trunk. + * Fix the build logic for the Ubuntu i386 buildd; we can't build biarch. + * Only remove libgcj9's classmap db if no other libgcj9* library is + installed. + * A lot more updates for 4.3 packaging. + + -- Matthias Klose Sat, 01 Sep 2007 21:01:43 +0200 + +gcc-4.3 (4.3-20070901-0ubuntu1) gutsy; urgency=low + + * Update to SVN 20070901 from the trunk. + * First gcc-4.3 package build. + - Update patches for the *-linux-gnu builds. + - Update build files for 4.3. + * Add proposed patch for PR middle-end/33029. + * gcj-4.3: Install gc-analyze. + + -- Matthias Klose Sat, 1 Sep 2007 20:52:16 +0200 + +gcc-4.2 (4.2.2-7) unstable; urgency=low + + * Update to SVN 20080114 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/34762. LP: #182412. + * Update debian/watch. Closes: #459259. Addresses: #459391, #459392. + * Build libgomp documentation without building libgomp. Closes: #460660. + * Restore gomp development files. Closes: #460736. + + -- Matthias Klose Mon, 14 Jan 2008 23:20:04 +0100 + +gcc-4.2 (4.2.2-6) unstable; urgency=low + + * Update to SVN 20080113 from the ubuntu/gcc-4_2-branch. + * Adjust build-dependency on debhelper, dpkg-dev. + * Fix gnat-4.2 build failure (addresses: #456867). + * Do not build packages built from the gcc-4.3 source. + + -- Matthias Klose Sun, 13 Jan 2008 13:48:49 +0100 + +gcc-4.2 (4.2.2-5) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080102 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/32889, ICE in delete_output_reload. + Closes: #444873, #445336, #451047. + - Fix PR target/34215, ICE in assign_386_stack_local. + Closes: #446714, #452451. + - Fix PR target/33848, reference to non-existent label at -O1 on + mips/mipsel. Closes: #441633. + * debian/rules.d/binary-java.mk: dpkg-shlibsdeps can't handle the dangling + symlink to libgcj_bc.so.1. Remove it temporarily. + * Add libgcj_bc to the libgcj8-1 shlibs file. + * Fix build failures for gnat-4.2, gpc-4.2, gdc-4.2 introduced by recent + gdc changes. + * Add symbol files for libgcc1, lib32gcc1, lib64gcc1, libstdc++6, + lib32stdc++6, lib64stdc++6, libgomp1, lib32gomp1, lib64gomp1, libffi4, + lib32ffi4, lib64ffi4, libobjc2, lib32objc2, lib64objc2. Adjust build + dependencies on dpkg-dev and debhelper. + Adjust build-dependency on dpkg-dev. + + [Arthur Loiret] + * Fix gdc-4.2 build failure. + * Update gdc to upstream SVN 20071124. + - d-bi-attrs: Support attributes on declarations in other modules. + - d-codegen.cc (IRState::attributes): Support constant declarations as + string arguments. + * Enable libphobos: + - gdc-4.2.dpatch: Fix ICEs. + - gdc-4.2-build.dpatch: Update, make it cleaner. + * Install libphobos in the private gcc lib dir. + * gdc-4.2.dpatch: Update from gdc-4.1.dpatch. + - gcc/tree-sra.c: Do not use SRA on structs with aliased fields created + for anonymous unions. + - gcc/predict.c: Add null-pointer check. + * debian/rules.defs: Disable phobos on hurd-i386. + - gdc-hurd-proc_maps.dpatch: Remove. + + -- Matthias Klose Wed, 02 Jan 2008 15:49:30 +0100 + +gcc-4.2 (4.2.2-4) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20071123 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/34130, wrong code with some __builtin_abs expressions. + Closes: #452108. + * Don't run the testsuite on hppa when expect-tcl8.3 is not available. + * Fix libgcc1-dbg doc directory symlink. Closes: #447969. + * Use gcc-multilib as build-dependency instead of gcc-4.1-mulitlib. + * Support for fast-math on hurd-i386 (Michael Banck). Closes: #451520. + * Fix again profiling support on the Hurd (Thomas Schwinge). Closes: #434937. + + [Arthur Loiret] + * Merge gdc-4.1 patches and build infrastructure: + - gdc-4.2.dpatch: Add, setup gcc-4.2.x for D. + - gdc-4.2-build.dpatch: Add, update gdc builtins and driver objs. + - gdc-driver-zlib.dpatch: Add, use up-to-date system zlib. + - gdc-driver-defaultlib.dpatch: Add, add -defaultlib/-debuglib switches. + - gdc-driver-nophobos.dpatch: Add, disable libphobos when unsupported. + - gdc-libphobos-build.dpatch: Add, enable libphobos build when supported. + - gdc-fix-build.dpatch: Add, fix build on non-biarched 64bits targets. + - gdc-libphobos-std-format.dpatch: Add, replace assert when formating a + struct on non-x86_64 archs by a FormatError. + - gdc-arm-unwind_ptr.dpatch: Add, fix build on arm. + - gdc-mips-gcc-config.dpatch: Add, fix build on mips. + - gdc-hurd-proc_maps.dpatch: Add, fix build on hurd. + + -- Matthias Klose Sat, 24 Nov 2007 12:01:06 +0100 + +gcc-4.2 (4.2.2-3) unstable; urgency=low + + * Update to SVN 20071014 from the ubuntu/gcc-4_2-branch. + - Fix build failure in libjava on mips/mipsel. + * Make 4.2.2-2 a requirement for frontends built from separate sources. + Addresses: #446596. + + -- Matthias Klose Sun, 14 Oct 2007 14:13:00 +0200 + +gcc-4.2 (4.2.2-2) unstable; urgency=low + + * Update to SVN 20071011 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/33448, ICE in create_tmp_var. Closes: #439687. + - Remove debian/patches/pr31899.dpatch, applied upstream. + - Remove debian/patches/pr33381.dpatch, applied upstream. + * gij-hppa: Call gij-4.2, not gij-4.1. Addresses: #446282. + + -- Matthias Klose Thu, 11 Oct 2007 23:41:52 +0200 + +gcc-4.2 (4.2.2-1) unstable; urgency=low + + * Update to SVN 20071008 from the ubuntu/gcc-4_2-branch, corresponding + to the GCC-4.2.2 release. + * Fix dependencies of lib*gcc1-dbg packages. Closes: #445190. + * Remove libjava-armeabi patch integrated upstream. + * gcjwebplugin: Fix path of the gcj subdirectory. LP: #149792. + * Apply proposed patch for PR debug/31899. Closes: #445268. + + * Add niagara2 optimization support (David Miller). + + -- Matthias Klose Mon, 08 Oct 2007 21:12:41 +0200 + +gcc-4.2 (4.2.1-6) unstable; urgency=high + + [Matthias Klose] + * Update to SVN 20070929 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/33382, ICE (closes: #441481). + - Fix PR tree-optimization/28544 (4.2.1, closes: #380482). + - Fix PR libffi/28313, port to mips64 (closes: #358235). + * Fix PR tree-optimization/33099, PR tree-optimization/33381, + wrong code generation with VRP/SCEV. Closes: #440545, #443576. + * Update Hurd fixes (Samuel Thibault). + * When -fstack-protector is the default (Ubuntu), do not enable + -fstack-protector when -nostdlib is specified. LP: #77865. + * Add -g to BOOT_CFLAGS, set STAGE1_CFLAGS to -g -O, only pass + other settings when required. + * Fix installation of the s390 libstdc++ biarch headers. + * Allow the powerpc build on a 32bit machine (without running the + biarch testsuite). + * Build -dbg packages for libgcc, libgomp, libmudflap, libffi, libobjc, + libgfortran. + * Drop the build dependency on expect-tcl8.3 (the hppa testsuite seems + to complete sucessfully with the expect package). + * Downgrade libmudflap-dev recommendation to a suggestion. Closes: #443929. + + * Closing reports reported against gcc-4.1 and fixed in gcc-4.2: + - General + + PR rtl-optimization/21299, error in invalid asm statement. + Closes: #380121. + - C++ + + PR libstdc++/19664, libstdc++ headers have pop/push of the visibility + around the declarations (closes: #307207, #324290, #423547). + + PR c++/21581, functions in anonymous namespaces default to "hidden" + visibility (closes: #278310). + + PR c++/4882, specialization of inner template using outer template + argument (closes: #269513). + + PR c++/6634, wrong parsing of "long long double" (closes: #247112). + + PR c++/10891, code using dynamic_cast causes segfaults when -fno-rtti + is used (closes: #188943). + + PR libstdc++/14991, stream::attach(int fd) porting entry out-of-date. + Closes: #178561. + + PR libstdc++/31638, string usage leads to warning with -Wcast-align. + Closes: #382153. + + Fix memory hog seen with g++-4.1. Closes: #411234. + - Fortran + + PR fortran/29228, ICE in gfc_trans_deferred_array (closes: #387222). + + PR fortran/24285, allow dollars everywhere in format (closes: #324600). + + PR libfortran/28354, 0.99999 printed as 0. instead of 1. by + format(f3.0). Closes: #397671. + + Fix ICE in gfc_get_extern_function_decl (closes: #396292). + - Architecture specific: + - i386 + + Fix error with -m64 (unable to find a register to spill in class + 'DIREG'). Closes: #430049. + - mips + + Fix ICE in tsubst (closes: #422303). + - s390 + + Fix ICE (segmentation fault) building dcmtk (closes: #435736). + + [Roman Zippel] + * Update the m68k patches. + + [Riku Voipio] + * Configure armeabi with --disable-sjlj-exceptions. + * armel testsuite takes ages, adjust build accordingly. + + [Ludovic Brenta and Xavier Grave] + * Add a version of the Ada run-time library using the setjump/longjump + exception handling mechanism (static library only). Use with + gnatmake --RTS=sjlj. Particularly useful for distributed (Annex E) + programs. + * Restore building libgnatvsn-dev and libgnatprj-dev. + + -- Matthias Klose Sat, 29 Sep 2007 11:19:40 +0200 + +gcc-4.2 (4.2.1-5) unstable; urgency=low + + * Update to SVN 20070825 from the ubuntu/gcc-4_2-branch. + - Fix PR debug/32610, LP: #121911. + * Apply proposed patches: + - Improve debug info for packed arrays with constant bounds + (PR fortran/22244). + - Fix ICE in rtl_for_decl_init on const vector initializers + (PR debug/32914). + - Fix (neg (lt X 0)) optimization (PR rtl-optimization/33148). + - Fix libgcc.a(tramp.o) on ppc32. + - Fix redundant reg/mem stores/moves (PR target/30961). + * Update the -fdirectives-only backport. + * gappletviewer-4.2: Include the gcjwebplugin binary. LP: #131114. + * Update gpc patches and build support (not yet enabled). + * Fix gcc-snapshot hppa64 install target. + * Set the priority of the source package to optional. + * Remove .la files from the biarch libstdc++ debug packages, + conflict with the 3.4 package. Closes: #440490. + + [Arthur Loiret] + * Add build support for GDC. + + -- Matthias Klose Mon, 27 Aug 2007 01:39:32 +0200 + +gcc-4.2 (4.2.1-4) unstable; urgency=medium + + * gcc-4.2: Include missing std*.h header files. + + -- Matthias Klose Tue, 14 Aug 2007 11:14:35 +0200 + +gcc-4.2 (4.2.1-3) unstable; urgency=low + + * Update to SVN 20070812 from the ubuntu/gcc-4_2-branch. + * debian/rules.defs: Fix typo, run the checks in biarch mode too. + * libgcj8-awt: Loosen dependency on gcj-4.2-base. + * Build only needed multilib libraries when building as gcj or gnat. + * Always build biarch libgomp in biarch builds. + * debian/rules2: Adjust testsuite logs files for logwatch.sh. + * Include header files from $/gcc_lib_dir)/include-fixed. + * Backport from trunk: -fdirectives-only (when preprocessing, handle + directives, but do not expand macros). + * Report an ICE to apport (if apport is available and the environment + variable GCC_NOAPPORT is not set) + * Fix gcj build failure on the Hurd (Samuel Thibault). Closes: #437470. + + -- Matthias Klose Sun, 12 Aug 2007 21:11:00 +0200 + +gcc-4.2 (4.2.1-2) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070804 from the ubuntu/gcc-4_2-branch (20070804): + - Merge gcc-4_2-branch SVN 20070804. + - Imported classpath CVS 20070727. + - Bump the libgcj soname, add conflict with java-gcj-compat (<< 1.0.76-4). + - Remove patches integrated in the branches: pr32862. + - Update patches: libjava-subdir, libjava-jar. + - Add regenerated class files: svn-class-updates. + + * Fix profiling support on the Hurd (Michael Casadeval). Closes: #434937. + * Fix build on kfreebsd-amd64 (Aurelien Jarno). Closes: #435053. + * Period of grace is over, run the testsuite on m68k-linux again. + * Update infrastructure for the gcc-source package (Bastian Blank). + * Update profiling on the Hurd (Samuel Thibault, Michael Casadevall). + Closes: #433539. + * debian/rules2: Allow DEB_BUILD_OPTIONS=parallel= to overwrite NJOBS. + * Allow lang=, nolang= in DEB_BUILD_OPTIONS; deprecating + WITHOUT_LANG, and WITHOUT_CHECK. + * debian/rules.defs, debian/rules.conf: Cache some often used macros. + + * Preliminary work: Enable Java for ARM EABI (Andrew Haley), build + libffi for armel. + * gcj: Don't build the browser plugin in gcc-snapshot builds to get + rid of the xulrunner dependency. + * gcjwebplugin: Register for more browsers (package currently not built). + * gij/boehm-gc: Use sysconf as fallback, if reading /proc/stat fails. + Closes: #422469. + * libjava: Avoid dependency on MAXHOSTNAMELEN (Samuel Thibault). + * gcj: On arm and armel, use the ecj1 binary built from the ecj package. + * gcj: Don't require javac without java maintainer mode, remove build + dependencies on gcj and ecj, add build dependency on libecj-java. + + -- Matthias Klose Sun, 05 Aug 2007 15:56:07 +0200 + +gcc-4.2 (4.2.1-1) unstable; urgency=medium + + [Ludovic Brenta] + * debian/patches/ada-symbolic-tracebacks.c: remove all trace of + the function convert_addresses from adaint.c. Fixes FTBFS on alpha, + s390 and possibly other platforms. Closes: #433633. + * debian/control.m4: list myself as uploader if the source package name + is gnat. Relax build-dependency on gnat-4.2-source. + * debian/control.m4, debian/rules.conf: Build-depend on libmpfr-dev only + if building Fortran. + + [Matthias Klose] + * debian/rules.conf: Fix breakage of Fortran build dependencies introduced + by merge of the Ada bits. + * Don't include the gccbug binary anymore in the gcc package; upstream bug + reports should be reported to the upstream bug tracker at + http://gcc.gnu.org/bugzilla. + * Don't build and test libjava for the biarch architecture. + * Install gappletviewer man page. Addresses: #423094. + * debian/patches/m68k-java.dpatch: Readd. + * gjar: support @ arguments. + * Update to SVN 20070726 from the ubuntu/gcc-4_2-branch. + - Fix mips/mipsel builds. + * libmudflap0: Fix update leaving an empty doc dir. Closes: #428306. + * arm/armel doesn't have ssp support. Closes: #433172. + * Update kbsd-gnu-ada patch (Aurelien Jarno): Addresses: #434754. + * gcj-4.2: Build depend on gcj-4.2 to build the classpath examples files + for the binary-indep target. + * Fix PR java/32862, bugs in EnumMap implementation. Addresses: #423160. + + [Arthur Loiret] + * Fix cross builds targeting x86_64. Closes: LP: #121834. + + -- Matthias Klose Thu, 26 Jul 2007 21:46:03 +0200 + +gcc-4.2 (4.2.1-0) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070719 from the ubuntu/gcc-4_2-branch, corresponding + to the GCC-4.2.1 release. + - debian/patches/arm-gij.dpatch: Remove. Closes: #433714. + * Apply proposed patch for PR tree-optimization/32723. + * Tighten build dependency on libmpfr-dev. + * On ia64, apply proposed patch for PR target/27880. Closes: #433719. + + [Hector Oron] + * Fix cross and reverse-cross builds. Closes: #432356. + + -- Matthias Klose Thu, 19 Jul 2007 17:59:37 +0200 + +gnat-4.2 (4.2-20070712-1) unstable; urgency=low + + * debian/rules.d/binary-ada.mk, debian/control.m4: + disable building libgnatvsn-dev and libgnatprj-dev, as they conflict + with packages from gnat-4.1. Will reenable them for the transition to + gnat-4.2. + * Upload as gnat-4.2. Closes: #432525. + + -- Ludovic Brenta Sat, 14 Jul 2007 15:12:34 +0200 + +gcc-4.2 (4.2-20070712-1) unstable; urgency=high + + [Matthias Klose] + * Update to SVN 20070712 from the ubuntu/gcc-4_2-branch. + - 4.2.1 RC2, built from SVN. + - same as gcc-4_2-branch, plus backport of gcc/java, boehm-gc, libffi, + libjava, zlib from the trunk. + - debian/patches/arm-libffi.dpatch: Remove. + - Fixes ICE in update_equiv_regs. Closes: #432604. + * debian/control.m4: Restore build dependency on dejagnu. + * debian/patches/arm-gij.dpatch: Update. + * i386-biarch.dpatch: Update for the backport for PR target/31868. + Closes: #432599. + + -- Matthias Klose Fri, 13 Jul 2007 08:07:51 +0200 + +gcc-4.2 (4.2-20070707-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070707 from the ubuntu/gcc-4_2-branch. + - debian/patches/libjava-soname.dpatch: Remove. + - debian/patches/disable-configure-run-check.dpatch: Update. + * Only suggest multilib packages on multilib architectures. + * Point ICE messages to the 4.2 docdir. + * Explicitely use fastjar to build gcj-4.1. Addresses: #416001. + * Configure with --enable-libgcj on m32r (Kazuhiro Inaoka). + * Include the hppa64 cross compiler on hppa snapshot builds. + * debian/patches/arm-libffi.dpatch: Update. + * libgcj-doc: Include the generated documentation. + * Fix building the libjava/classpath examples. + * Support reverse cross builds (Neil Williams). Closes: #431086. + + -- Matthias Klose Sat, 07 Jul 2007 10:59:26 +0200 + +gcc-4.2 (4.2-20070627-1) unstable; urgency=high + + [Matthias Klose] + * Update to SVN gcc-4_2-branch/20070626. + * Update to SVN trunk/20070626 (gcc/java, libjava, libffi, boehm-gc). + * On mips*-linux, always imply -lpthread for -pthread (Thiemo Seufer). + Addresses: #428741. + * Fix libstdc++ cross builds (Arthur Loiret). Closes: #430395. + * README.Debian: Point to debian-toolchain for general toolchain topics. + * Use the generated locales for the libstdc++ build to fix the setting + of the gnu locale model. Closes: #428926, #429660. + * For ix86 lpia targets, configure --with-tune=i586. + * Make build dependency on gcc-4.1-multilib architecture specific. + * Do not ignore bootstrap comparision failure on ia64. + + [Ludovic Brenta] + * ada-link-lib.dpatch: update to apply cleanly on GCC 4.2. + * ada-libgnat{vsn,prj}.dpatch: adjust to GCC 4.2. Reenable in rules.patch. + * rules.conf: do not build libgomp as part of gnat-4.2. + * rules.conf, control.m4: build-depend on libz-dev, lib32z-dev or + lib64-dev only when building Java. + * rules2, rules.defs: $(with_mudflap): remove, use $(with_libmudflap) only. + * config.m4, binary-ada.mk: tighten dependencies; no Ada package depends + on gcc-4.2-base anymore. + * TODO: rewrite. + * README.gnat: include in gnat-4.2-base. Remove outdated information. + * README.maintainers: new. Include in gnat-4.2-base. + + [Hector Oron] + * Merge DEB_CROSS_INDEPENDENT with DEB_CROSS. + * Disables libssp0 for arm and armel targets when cross compiling. + * Updates README.cross. + * Fixes linker mapping problem on binary-libstdcxx-cross.mk. Closes: #430688. + + -- Matthias Klose Wed, 27 Jun 2007 21:54:08 +0200 + +gcc-4.2 (4.2-20070609-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070609. + - Remove patches integrated upstream: pr30052, hppa-caller-save-pic-tls. + * Update to SVN trunk/20070609 (gcc/java, libjava, libffi, boehm-gc). + - Remove patches integrated upstream: libjava-qt-peer, + classpath-config-guess. + * Do not build with --enable-java-maintainer-mode. + * debian/rules.patch: Comment out m68k-peephole, requires m68k-split_shift. + * Add target to apply patches up to a specific patch (Wouter Verhelst). + Closes: #424855. + * libstdc++6-4.2-*: Add conflicts with 4.1 packages. Closes: #419511. + * Apply proposed fix for PR target/28102. Closes: #426905. + * Fix build failure for cross compiler builds (Jiri Palecek). Closes: #393897. + * Update build macros for kfreebsd-amd64. Closes: #424693. + + -- Matthias Klose Sat, 9 Jun 2007 06:54:13 +0200 + +gcc-4.2 (4.2-20070528-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070528. + * Add backport for PR middle-end/20218. + * Add proposed PTA solver backport, PR tree-optimization/30052. + * Add backport for PR target/31868. + * Reenable the testsuite for arm, mips, mipsel. + + -- Matthias Klose Mon, 28 May 2007 09:03:04 +0200 + +gcc-4.2 (4.2-20070525-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070525. + * Update to SVN trunk/20070520 (gcc/java, libjava, libffi, boehm-gc). + * Do not explicitely configure for __cxa_atexit. + * libstdc++6-4.2-doc: Conflict with libstdc++6-4.1-doc. Closes: #424896. + * Update m68k patches: + - Remove patches applied upstream: m68k-jumptable, m68k-gc, + - Reenable patches: m68k-save_pic, m68k-dwarf, m68k-limit_reload, + m68k-prevent-qipush, m68k-peephole, m68k-return, m68k-sig-unwind, + m68k-align-code m68k-align-stack, m68k-symbolic-operand, + m68k-bitfield-offset. + - Update: m68k-return, m68k-secondary-addr-reload, m68k-notice-move + m68k-secondary-addr-reload, m68k-notice-move. + - TODO: m68k-split_shift, m68k-dwarf3, m68k-fpcompare. + * Update the kfreebsd and arm patches (Aurelien Jarno). Closes: #425011. + * Temporarily disable the testsuite on slow architectures to get the + package built soon. + + -- Matthias Klose Fri, 25 May 2007 07:14:36 +0200 + +gcc-4.2 (4.2-20070516-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070516. + * Update to SVN trunk/20070516 (gcc/java, libjava, libffi, boehm-gc). + * Merge changes from gcc-4.1_4.1.2-7. + * Update NEWS files. + + -- Matthias Klose Wed, 16 May 2007 02:33:57 +0200 + +gcc-4.2 (4.2-20070502-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070502. + - Remove pr11953 patch, integrated upstream. + * Update to SVN trunk/20070502 (gcc/java, libjava, libffi, boehm-gc). + * Adjust tetex/tex-live build dependency. + * Fix gobjc-4.2's, gobjc++-4.2's dependency on libobjc2. + * Tighten (build) dependency on binutils. Addresses: #421197. + * gfortran-4.2: Depend on libgfortran2, provide the libgfortran.so + symlink. Adresses: #421362. + * Build-depend on gcc-multilib [amd64 i386 powerpc ppc64 s390 sparc]. + * (Build-) depend on glibc (>= 2.5) for all architectures. + * Remove libssp packages from the control file. + + -- Matthias Klose Wed, 2 May 2007 18:46:57 +0200 + +gcc-4.2 (4.2-20070405-1) experimental; urgency=low + + * Update to SVN gcc-4_2-branch/20070405. + * Update to SVN trunk/20070405 (gcc/java, libjava, libffi, boehm-gc). + * gcc-4.2-hppa64: Don't depend on libc6-dev. + * Robustify setting of make's -j flag. Closes: #410919. + * gcc-snapshot: Use the install_snap_stamp target for installation. + + -- Matthias Klose Thu, 5 Apr 2007 23:56:35 +0200 + +gcc-4.2 (4.2-20070307-1) experimental; urgency=low + + * Update to SVN gcc-4_2-branch/20070307. + * Update to SVN trunk/20070307 (gcc/java, libjava, libffi, boehm-gc). + * Build gnat from separate sources. + * Merge changes from gcc-4.1-4.1.2-1. + * Install into /usr/lib/gcc//4.2, to ease upgrades + between subminor versions. + * Configure --with-gxx-include-dir=/usr/include/c++/4.2 + + -- Matthias Klose Thu, 8 Mar 2007 02:52:00 +0100 + +gcc-4.2 (4.2-20070210-1) experimental; urgency=low + + * Merge Java backport from Ubuntu: + - Update to SVN gcc-4_2-branch/20070210. + - Update to SVN trunk/20070210 (gcc/java, libjava). + - Backout trunk specific gcc/java changes. + - Build-depend on gcj-4.1 and ecj-bootstrap. + - gcj-4.2: Depend on ecj-bootstrap, recommend ecj-bootstrap-gcj. + - Merge libgcj8-awt-gtk back into libgcj8-awt; the Qt peers + are disabled by upstream again. + - Generate manual pages for the classpath tools from the classpath + documentation. + - Adopt packaging for the merged libjava. + - Update patches for the merged libjava: libjava-lib32-properties, + i386-biarch, reporting, libjava-soname, libjava-subdir, + libjava-lib32subdir. + - Remove obsolete patches: libjava-plugin-binary, libjava-ia32fix, + libstdc++-docfixes. + + * Set priority of development packages to optional. + * debian/libgcjGCJ.postrm: Don't fail on purge when directories + don't exist anymore. Closes: #406017. + * debian/patches/gcc-textdomain.dpatch: Update for 4.2. + * Generate and install libgomp docs into gcc-4.2-doc. + + -- Matthias Klose Sat, 10 Feb 2007 16:53:11 +0100 + +gcc-4.2 (4.2-20070105-1) experimental; urgency=low + + * Update to SVN 20070105. + * Add tetex-extra to Build-Depend-Indep (libstd++ doxygen docs), + fix doxygen build (libstdc++-docfixes.dpatch). + * Enable parallel build by default on SMP machines. + + -- Matthias Klose Fri, 5 Jan 2007 22:42:18 +0100 + +gcc-4.2 (4.2-20061217-1) experimental; urgency=low + + * Update to SVN 20061217. + * Merge changes from gcc-4.1_4.1.1-16 to gcc-4.1_4.1.1-21. + * Update patches to the current branch. + * Add multilib packages for gcc, g++, gobjc, gobjc++, gfortran. + * Link using --hash-style=gnu (alpha, amd64, ia64, i386, powerpc, ppc64, + s390, sparc). + + -- Matthias Klose Sun, 17 Dec 2006 15:54:54 +0100 + +gcc-4.2 (4.2-20061003-1) experimental; urgency=low + + * libgcj.postinst: Remove /var/lib/gcj-4.2 on package removal. + * Don't install backup files in the doc directory, only one gcc-4.1 + upgrade was broken. Closes: #389366. + * Merge gcc-biarch-generic.dpatch into i386-biarch.dpatch. + * Update link-libs.dpatch. + * Merge libgfortran2-dev into gfortran-4.2. + + -- Matthias Klose Tue, 3 Oct 2006 16:26:38 +0000 + +gcc-4.2 (4.2-20060923-1) experimental; urgency=low + + * Update to SVN 20060923. + * Remove patches applied upstream: kbsd-gnu-java, kbsd-gnu. + + -- Matthias Klose Sat, 23 Sep 2006 15:11:36 +0200 + +gcc-4.2 (4.2-20060905-1) experimental; urgency=low + + * Update to SVN 20060905. + * Merge changes from gcc-4.1 (4.1.1-10 - 4.1.1-12). + * Move gomp development files into gcc and gfortran. + * Build-depend on binutils (>= 2.17). + + -- Matthias Klose Tue, 5 Sep 2006 03:33:00 +0200 + +gcc-4.2 (4.2-20060818-1) experimental; urgency=low + + * Update to SVN 20060818. + - libjava-libgcjbc.dpatch: Remove, applied upstream. + * Merge changes from the Ubuntu gcj-4.2 package: + - libjava-soname.dpatch: Remove, applied upstream. + - libjava-native-libdir.dpatch: update. + - libffi-without-libgcj.dpatch: Remove, new libffi-configure to + enable --disable-libffi. + - Changes required for the classpath-0.92 update: + - New packages gappletviewer-4.2, gcjwebplugin-4.2. + - gij-4.2: Add keytool alternative. + - gcj-4.2: Add jarsigner alternative. + - libgcj8-dev: Remove conflicts with older libgcjX-dev packages. + - lib32gcj8: Populate the /usr/lib32/gcj-4.2 directory. + - libjava-library-path.dpatch: + - When running the i386 binaries on amd64, look in + /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + - Add /usr/lib/jni to java.library.path. Adresses: #364820. + - Add more debugging symbols to libgcj8-dbg. Adresses: #383705. + - Fix and renable the biarch build for sparc. + * Disable gnat for alpha, fails to build. + * Configure without --enable-objc-gc, fails to build. + + -- Matthias Klose Sat, 19 Aug 2006 18:25:50 +0200 + +gcc-4.2 (4.2-20060709-1) experimental; urgency=low + + * Test build, SVN trunk 20060709. + * Merge libssp0-dev into gcc-4.1 (-fstack-protector is a common option). + * Rename libmudflap0-dev to libmudflap0-4.2-dev. + * Ignore compiler warnings when checking whether compiler driver understands + Ada fails. + * Merge changes from the gcc-4.1 package. + + -- Matthias Klose Sun, 9 Jul 2006 14:28:03 +0200 + +gcc-4.2 (4.2-20060617-1) experimental; urgency=low + + * Test build, SVN trunk 20060617. + + [Matthias Klose] + * Configure using --enable-objc-gc, using the internal boehm-gc. + * Build-depend on bison (>= 1:2.3). + * Build the QT based awt peer library, not yet the same functionality + as the GTK based peer library. + * Update libjava-* patches. + + [Ludovic Brenta] + * Do not provide the symbolic link /usr/bin/gnatgcc; this will now + be provided by package gnat from the source package gcc-defaults. + * debian/control.m4, debian/control (gnat): conflict with gnat (<< 4.1), + not all versions of gnat, since gcc-defaults will now provide gnat (= 4.1) + which depends on gnat-4.1. + + [Bastian Blank] + * Make it possible to overwrite arch per DEB_TARGET_ARCH and + DEB_TARGET_GNU_TYPE. + * Disable biarch only on request for cross builds. + * Use correct source directory for tarballs. + * Produce correct multiarch.inc for source builds. + + -- Matthias Klose Sat, 17 Jun 2006 19:02:01 +0200 + +gcc-4.2 (4.2-20060606-1) experimental; urgency=low + + * Test build, SVN trunk 20060606. + * Remove obsolete patches, update patches for 4.2. + * Update the biarch-include patches to work with mips-triarch. + * Disable Ada, not yet updated. + * New packages: libgomp*. + * Remove fastjar, not included upstream anymore. + + -- Matthias Klose Tue, 6 Jun 2006 10:52:28 +0200 + +gcc-4.1 (4.1.2-12) unstable; urgency=high + + * i386-biarch.dpatch: Update for the backport for PR target/31868. + Closes: #427185. + * m68k-libffi2.dpatch: Update. Closes: #425399. + + -- Matthias Klose Mon, 4 Jun 2007 23:53:23 +0200 + +gcc-4.1 (4.1.2-11) unstable; urgency=low + + * Update to SVN 20070601. + * Build the libmudflap0-dev package again. + * Don't build libffi, when the packages are not built. + + -- Matthias Klose Fri, 1 Jun 2007 23:55:22 +0200 + +gcc-4.1 (4.1.2-10) unstable; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Wed, 30 May 2007 00:29:29 +0200 + +gcc-4.1 (4.1.2-9) unstable; urgency=low + + * Update to SVN 20070528. + * Don't build packages now built from the gcc-4.2 source (arm, m68k, + mips, mipsel). + * Add backport for PR middle-end/20218. + * Add backport for PR target/31868. + + -- Matthias Klose Tue, 29 May 2007 00:01:12 +0200 + +gcc-4.1 (4.1.2-8) unstable; urgency=low + + * Update to SVN 20070518. + * Don't build packages now built from the gcc-4.2 source. + + [ Aurelian Jarno ] + * Update libffi patch for ARM. Closes: #425011. + * arm-pr30486, arm-pr28516, arm-unbreak-eabi-armv4t: New. + * Disable FFI, Java, ObjC for armel. + + -- Matthias Klose Sun, 20 May 2007 10:31:24 +0200 + +gcc-4.1 (4.1.2-7) unstable; urgency=low + + * Update to SVN 20070514. + * Link using --hash-style=both on supported architectures. Addresses: #421790. + * On hppa, build ecjx as a native binary. + * note-gnu-stack.dpatch: Fix ARM comment marker (Daniel Jacobowitz). + Closes: #422978. + * Add build dependency on libxul-dev for *-freebsd. Closes: #422995. + * Update config.guess/config.sub and build gcjwebplugin on GNU/kFreeBSD + (Aurelian Jarno). Closes: #422995. + * Disable ssp on hurd-i386. Closes: #423757. + + -- Matthias Klose Mon, 14 May 2007 08:40:08 +0200 + +gcc-4.1 (4.1.2-6) unstable; urgency=low + + * Update libjava from the gcc-4.1 Fedora branch 20070504. + * gfortran-4.1: Fix the target of the libgfortran.so symlink. + Closes: #421362. + * Build-depend on gcc-multilib [amd64 i386 powerpc ppc64 s390 sparc]. + * Readd build dependency on binutils on arm. + * (Build-) depend on glibc (>= 2.5) for all architectures. + * Remove libssp packages from the control file. + * Fix wrong code generation on hppa when TLS variables are used. + Closes: #422421. + + -- Matthias Klose Sun, 6 May 2007 10:00:23 +0200 + +gcc-4.1 (4.1.2-5) unstable; urgency=low + + * Update to SVN 20070429. + * Update libjava from the gcc-4.1 Fedora branch 20070428. + * Update m68k patches: + - Remove pr25514, pr27736, applied upstream. + - Update m68k-java. + * Link using --hash-style=gnu/both. + * Tighten (build) dependency on binutils. Closes: #421197. + * gij-4.1: Add a conflict with java-gcj-compat (<< 1.0.69). + * gfortran-4.1: Depend on libgfortran1, provide the libgfortran.so + symlink. Closes: #421362. + * gcc-4.1, gcc-4.1-multilib: Fix compatibility symlinks. Closes: #421382. + * Temporarily remove build dependency on locales on arm, hppa, m68k, mipsel. + * Temporarily remove build dependency on binutils on arm. + * Fix FTBFS on GNU/kFreeBSD (Aurelian Jarno). Closes: #421423. + * gij-4.1 postinst: Create /var/lib/gcj-4.1. Closes: #421526. + + -- Matthias Klose Mon, 30 Apr 2007 08:13:32 +0200 + +gcc-4.1 (4.1.2-4) unstable; urgency=medium + + * Update to SVN 20070423. + - Remove pr11953, applied upstream. + - Fix ld version detection in libstdc++v3. + * Update libjava from the gcc-4.1 Fedora branch 20070423. + * Merge libgfortran1-dev into gfortran-4.1. + * Add multilib packages for gcc, g++, gobjc, gobjc++, gfortran. + * Don't link using --hash-style=gnu/both; loosen dependency on binutils. + * Don't revert the patch to fix PR c++/27227. + + -- Matthias Klose Mon, 23 Apr 2007 23:13:14 +0200 + +gcc-4.1 (4.1.2-3) experimental; urgency=low + + * Update to SVN 20070405. + * Update libjava from the gcc-4.1 Fedora branch 20070405. + * Robustify setting of make's -j flag. Closes: #414316. + * Only build the libssp packages, when building the common libraries. + * gcc-4.1-hppa64: Don't depend on libc6-dev. + + -- Matthias Klose Fri, 6 Apr 2007 00:28:29 +0200 + +gcc-4.1 (4.1.2-2) experimental; urgency=low + + * Update to SVN 20070306. + * Update libjava from the gcc-4.1 Fedora branch 20070306. + + [Matthias Klose] + * Don't install gij-wrapper anymore, directly register gij as a java + alternative. + * Don't install gcjh-wrapper anymore. + * Don't use exact versioned dependencies on gcj-base for libgcj and + libgcj-awt. + * Fix glibc build dependency for alpha. + * Support -ffast-math on hurd-i386 (Samuel Thibault). Closes: #413342. + * Update kfreebsd-amd64 patches (Aurelien Jarno). Closes: #406015. + * gij: Consistently use $(dbexecdir) to reference the gcj sub dir. + * Install into /usr/lib/gcc//4.1, to ease upgrades + between minor versions. + Add compatibility symlinks in /4.1.2 to build gnat-4.1 + and gcj-4.1 from separate sources. + + -- Matthias Klose Wed, 7 Mar 2007 03:51:47 +0100 + +gcc-4.1 (4.1.2-1) experimental; urgency=low + + [Matthias Klose] + * Update to gcc-4.1.2. + * Update libjava backport patches, split out boehm-gc-backport patch. + * Enable the cpu-default-generic patch (i386, amd64), backport from 4.2. + * Correct mfctl instruction syntax (hppa), backport from the trunk. + * Backport PR java/9861 (name mangling updates). + * gcc.c (main): Call expandargv (backport from 4.2). + * Apply gcc dwarf2 unwinding patches from the trunk. + * Apply backport for PR 20208 on amd64 i386 powerpc ppc64 sparc s390. + * Apply patches from the 4.1 branch for PR rtl-optimization/28772, + PR middle-end/30313, PR middle-end/30473, PR c++/30536, PR debug/30189, + PR fortran/30478, PR rtl-optimization/30787, PR tree-optimization/30823, + PR rtl-optimization/28173, PR ada/30684, bug in pointer dependency test, + PR rtl-optimization/30931, PR fortran/25392, PR fortran/30400, + PR libgfortran/30910, PR libgfortran/30918, PR fortran/29441, + PR target/30634. + * Update NEWS files. + * Include a backport of the ecj+generics java updates as + gcj-ecj-20070215.tar.bz2. Install it into the gcc-4.1-source package. + * Do not build fastjar anymore from this source. + * debian/control.m4: Move expect-tcl8.3 before dejagnu. + * Work around firefox/icewhatever dropping plugin dependencies on xpcom. + * Refactor naming of libgcj packages in the build files. + * Make libstdc++-doc's build dependencies depending on the source package. + * Do not build packages on architectures, which are already built by gcc-4.2. + + * Merge the gcj generics backport from Ubuntu: + + - Merge the Java bits (eclipse based compiler, 1.5 compatibility, + classpath generics) from the gcc-4.1 Fedora branch. + - Drop all previous patches from the classpath-0.93 merge, keep + the boehm-gc backport (splitted out as a separate patch). + - Add a gcj-ecj-generics.tar.bz2 tarball, containing gcc/java, libjava, + config/unwind_ipinfo.m4, taken from the Fedora branch. + - Drop the libjava-hppa, libjava-plugin-binary, pr29362, pr29805 patches + integrated in the backport. + - Update patches for the merge: reporting, libjava-subdir, i386-biarch, + classpath-tooldoc, pr26885 + - Add libjava-dropped, libjava-install; dropped chunks from the merge. + - Add pr9861-nojava mangling changes, non-java parts for PR 9861. + - Add gcc-expandv, expand `@' parameters on the commandline; backport + from the trunk. + - Disable the m68k-gc patch, needs update for the merge. + - Configure --with-java-home set for 1.5.0. + - Configure with --enable-java-maintainer-mode to build the header + and class files on the fly. + - Add build dependency on ecj-bootstrap, configure --with-ecj-jar. + - Build an empty libgcj-doc package; gjdoc currently cannot handle + generics. + - Apply gcc dwarf2 unwinding patches from the trunk, allowing the Events + testcase to pass. + - Tighten dependencies on shared libraries. + - Use /usr/lib/gcj-4-1-71 as private gcj subdir. + - Bump the libgcj soversion to 71, rename the libgcj7-0 package + to libgcj7-1, rename the libgcj7-awt package to libgcj7-1-awt. + - gij-4.1: Add and provide alternatives for gorbd, grmid, gserialver. + - gcj-4.1: Remove gcjh, gcjh-wrapper, gjnih. + - gcj-4.1: Add and provide alternatives for jar, javah, native2ascii, + tnameserv. + - gcj-4.1: Add dependency on ecj-bootstrap, recommend fastjar, + ecj-bootstrap-gcj. + - Add build dependency on ecj-bootstrap version providing the GCCMain + class. + - libgcj7-1: Recommend libgcj7-1-awt. + - Add build dependency on libmagic-dev. + - Build-depend on gcj-4.1; build our own ecj1 and gjdoc before + starting the build. + - Make ecj1 available when running the testsuite. + - Fix build failure on sparc-linux. + - Fix gjavah compatibility problems (PR cp-tools/3070[67]). + - Fixed driver issue source files (PR driver/30714). + - Add (rudimentary) manual pages for classpath tools. + + [Kevin Brown] + * debian/control.m4, debian/rules.d/binary-ada.mk: provide new packages + containing debugging symbols for Ada libraries: libgnat-4.1-dbg, + libgnatprj4.1-dbg, and libgnatvsn4.1-dbg. Adresses: #401385. + + -- Matthias Klose Sat, 3 Mar 2007 23:12:08 +0100 + +gcc-4.1 (4.1.1ds2-30) experimental; urgency=low + + * Update to SVN 20070106. + * Do not revert the fixes for PR 25878, PR 29138, PR 29408. + * Don't build the packages built by gcc-4.2 source. + * debian/patches/note-gnu-stack.dpatch: Add .note.GNU-stack sections + for gcc's crt files, libffi and boehm-gc. Taken from FC. Closes: #382741. + * Merge from Ubuntu: + - Backport g++ visibility patches from the FC gcc-4_1-branch. + - Update the long-double patches; require glibc-2.4 as a build dependency + on alpha, powerpc, sparc, s390. Bump the shlibs dependencies to + require 4.1.1-21. + - On powerpc-linux configure using --enable-secureplt. Closes: #382748. + - When using the cpu-default-generic patch, build for generic x86-64 + on amd64 and i386 biarch. + - Link using --hash-style=both (alpha, amd64, ia64, i386, powerpc, ppc64, + s390, sparc). + * gij-4.1: Recommends libgcj7-awt instead of suggesting it. Closes: #394917. + * Split the gcc-long-double patch into a code and doc part. + * Set priority of development packages to optional. + * Add support for kfreebsd-amd64 (Aurelian Jarno). Closes: #406015. + + -- Matthias Klose Sat, 6 Jan 2007 10:35:42 +0100 + +gcc-4.1 (4.1.1ds2-22) unstable; urgency=high + + * Enable -pthread for GNU/Hurd (Michael Banck). Closes: #400031. + * Update the m68k-fpcompare patch (Roman Zippel). Closes: #401585. + + -- Matthias Klose Sun, 10 Dec 2006 12:35:06 +0100 + +gcc-4.1 (4.1.1ds2-20) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061115. + - Fix PR tree-optimization/27891, ICE in tree_split_edge. + Closes: #370248, #391657, #394630. + - Fix PR tree-optimization/9814, duplicate of PR tree-optimization/29797. + Closes: #181096. + * Apply the libjava/net backport from the redhat/gcc-4_1-branch. + * Apply proposed patch for PR java/29805. + + [Roman Zippel] + * Build the ObjC and ObjC++ compilers in cross builds. + * debian/patches/m68k-symbolic-operand.dpatch: Better recognize + symbolic operands in addresses. + * debian/patches/m68k-bitfield-offset.dpatch: Only use constant offset + for register bitfields (combine expects shifts, but does a rotate). + * debian/patches/m68k-bitfield-offset.dpatch: Update and apply. + + [Daniel Jacobowitz] + * Don't try to use _Unwind_Backtrace on SJLJ targets. + See bug #387875, #388505, GCC PR 29206. + + -- Matthias Klose Wed, 15 Nov 2006 08:59:53 -0800 + +gcc-4.1 (4.1.1ds2-19) unstable; urgency=low + + * Fix typo in arm-pragma-pack.dpatch. + + -- Matthias Klose Sat, 28 Oct 2006 11:04:00 +0200 + +gcc-4.1 (4.1.1ds2-18) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20061028. + * Fix #pragma pack on ARM (Paul Brook). Closes: #394703. + * Revert PR c++/29138, PR c++/29408. Closes: #392559. + * Revert PR c++/25878. Addresses: #387989. + * fastjar: Provide jar. Closes: #395397. + + [Ludovic Brenta] + * debian/control.m4 (libgnatprj-dev): depend on libgnatvsn-dev. + debian/gnatprj.gpr: with gnatvsn.gpr. Closes: #395000. + + -- Matthias Klose Thu, 26 Oct 2006 23:51:10 +0200 + +gcc-4.1 (4.1.1ds2-17) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061020. + - Fix PR debug/26881, ICE in dwarf2out_finish. Closes: #377613. + - Fix PR PR c++/29408, parse error for valid code. Closes: #392327, #393010. + - Fix PR c++/29435, segfault with sizeof and templates. Closes: #393071. + - Fix PR target/29338, segfault with -finline-limit on arm. Closes: 390620. + - Fix 3.4/4.0 backwards compatibility problem in libstdc++. + * Fix PR classpath/29362, taken from the redhat/gcc-4_1-branch. + * Remove the INSTALL directory from the source tarball. Closes: #392974. + * Disable building the static libgcj; non-functional, and cutting + down build times. + * libgcj7-0: Tighten dependency on libgcj-common. + * libgcj7-dev: Install .pc file as libgcj-4.1.pc. + * README.cross: Updated (Hector Oron). Addresses: #380251. + * config-ml.dpatch: Use *-linux-gnu as *_GNU_TYPE. Closes: #394034. + + [Nikita V. Youshchenko] + * Fix typo in the cross build scripts. Closes: #391445. + + [Falk Hueffner] + * alpha-no-ev4-directive.dpatch: Fix kernel build failure. + + [Roman Zippel] + * debian/patches/m68k-align-code.dpatch: Use "move.l %a4,%a4" to advance + within code. + * debian/patches/m68k-align-stack.dpatch: Try to keep the stack word aligned. + * debian/patches/m68k-dwarf3.dpatch: Emit correct dwarf info for cfa offset + and register with -fomit-frame-pointer. + * debian/patches/m68k-fpcompare.dpatch: Bring fp compare early to its + desired form to relieve reload. Closes: #390879. + * debian/patches/m68k-prevent-swap.dpatch: Don't swap operands + during reloads. + * debian/patches/m68k-reg-inc.dpatch: Reinsert REG_INC notes after splitting + an instruction. + * debian/patches/m68k-secondary-addr-reload.dpatch: Add secondary reloads + to allow reload to get byte values into addr regs. Closes: #385327. + * debian/patches/m68k-symbolic-operand.dpatch: Better recognize symbolic + operands in addresses. + * debian/patches/m68k-limit_reload.dpatch: Remove, superseded by + m68k-secondary-addr-reload.dpatch. + * debian/patches/m68k-notice-move.dpatch: Apply, was checked in in -16. + * debian/patches/m68k-autoinc.dpatch: Updated, don't attempt to increment + the register, if it's used multiple times in the instruction . + + -- Matthias Klose Sat, 21 Oct 2006 00:25:05 +0200 + +gcc-4.1 (4.1.1ds1-16) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061008. + - Fix PR c++/29226, ICE in make_decl_rtl. Closes: #388263. + * libgcj7-0: Fix package removal. Closes: #390874. + * Configure with --disable-libssp on architectures that don't + support it (alpha, hppa, ia64, m68k, mips, mipsel). + * On hppa, remove build-dependency on dash. + * gij/gcj: Do not install slave links for the non DFSG manpages. + Closes: #390425, #390532. + * libgcj-common: rebuild-gcj-db: Don't do anything, if no classmap + files are found. Closes: #390966. + * Fix PR libstdc++/11953, extended for all linux architectures. + Closes: #391268. + * libffi4-dev: Conflict with libffi. Closes: #387561. + * Backport PR target/27880 to the gcc-4_1-branch. Patch by Steve Ellcey. + Closes: #390693. + * On ia64, don't use _Unwind_GetIPInfo in libjava and libstdc++. + * Add a README.ssp with minimal documentation about stack smashing + protection. Closes: #366094. + * Do not build libgcj-common from the gcc-4.1/gcj-4.1 sources anymore. + + [Roman Zippel] + * debian/patches/m68k-notice-move.dpatch: Don't set cc_status + for fp move without fp register. + + -- Matthias Klose Sun, 8 Oct 2006 02:21:49 +0200 + +gcc-4.1 (4.1.1ds1-15) unstable; urgency=medium + + * Update to SVN 20060927. + - Fix PR debug/29132, exception handling on mips. Closes: #389468, #390042. + - Fix typo in gcc documentation. Closes: #386180. + - Fix PR target/29230, wrong code generation on arm. Closes: #385505. + * libgcj-common: Ignore exit value of gcj-dbtool in rebuild-gcj-db on + arm, m68k, hppa. Adresses: #388505. + * libgcj-common: Replaces java-gcj-compat-dev and java-gcj-compat. + Closes: #389539. + * libgcj-common: /usr/share/gcj/debian_defaults: Define gcj_native_archs. + * Update the java backport from the redhat/gcc-4_1-branch upto 2006-09-27; + remove libjava-str2double.dpatch, pr28661.dpatch. + * Disable ssp on hppa, not supported. + * i386-biarch.dpatch: Avoid warnings about macro redefinitions. + + -- Matthias Klose Fri, 29 Sep 2006 22:32:41 +0200 + +gcc-4.1 (4.1.1ds1-14) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20060920. + - Fix PR c++/26957. Closes: #373257, #386910. + - Fix PR rtl-optimization/28243. Closes: #378325. + * Remove patch for PR rtl-optimization/28634, applied upstream. + * Fix FTBFS on GNU/kFreeBSD (fallout from the backport of classpath-0.92). + (Petr Salinger). Closes: #385974. + * Merge from Ubuntu: + - Do not encode the subminor version in the jar files. + - Fix typo for the versioned gcj subdirectory in lib32gcj-0. + - When running the i386 binaries on amd64, adjust the properties + java.home, gnu.classpath.home.url, sun.boot.class.path, + gnu.gcj.precompiled.db.path. + - Configure the 32bit build on amd64 + --with-java-home=/usr/lib32/jvm/java-1.4.2-gcj-4.1-1.4.2.0/jre. + - Configure --with-long-double-128 for glibc-2.4 on alpha, powerpc, ppc64, + s390, s390x, sparc, sparc64. + - Update the java backport from the redhat/gcc-4_1-branch upto 2006-09-20. + - Fix PR java/29013, invalid byte code generation. Closes: #386926. + - debian/patches/gcc-pfrs-2.dpatch: Apply a fix for a regression in the + backport of PR 28946 from the trunk (H.J. Lu). + * Backport PR classpath/28661 from the trunk. + * Don't ship the .la files for the java modules. Closes: #386228. + * gcj-4.1: Remove dangling symlink. Closes: #386430. + * gij: Suggest java-gcj-compat, gcj: Suggest java-gcj-compat-dev. + Closes: #361942. + * Fix infinite loop in string-to-double conversion on 64bit targets. + Closes: #348792. + * gij-4.1: Ignore exit value of gcj-dbtool in postinst. Adresses: #388505. + * libgcj-common: Move rebuild-gcj-db from java-gcj-compat into libgcj-common. + * On hppa, install a wrapper around gij-4.1 to ignore unaligned memory + accesses. Works around buildd configurations enabling this check by + default. Addresses: #364819. + + [Ludovic Brenta] + * debian/patches/ada-libgnatprj.dpatch: Build mlib-tgt-linux.adb instead of + mlib-tgt.adb. Closes: #387826. + * debian/patches/ada-pr15802.dpatch: Backport from the trunk. + Closes: #246384. + * debian/control.m4 (gnat-4.1): do not provide gnat (supplied by + gcc-defaults instead); conflict with gnat-4.2 which will soon be in + unstable. + + [Roman Zippel] + * debian/patches/m68k-dwarf2.dpatch: Recognize stack adjustments also + in the src of an instruction. + * debian/patches/m68k-jumptable.dpatch: Don't force byte offset when + accessing the jumptable, gas can generate the correct offset size instead. + * debian/patches/m68k-peephole.dpatch: Convert some text peepholes to rtl + peepholes, so the correct DWARF2 information can be generated for stack + manipulations (Keep a few peepholes temporarily disabled). + * debian/patches/m68k-peephole-note.dpatch: Don't choke on notes while + reinserting REG_EH_REGION notes. + * debian/patches/m68k-return.dpatch: Don't use single return if fp register + have to be restored. Closes: #386864. + * debian/patches/m68k-sig-unwind.dpatch: Add support for unwinding over + signal frames. + * Fix PR rtl-optimization/27736, backport from the trunk. + * Add java support for m68k. Closes: #312830, #340874, #381022. + + -- Matthias Klose Sun, 24 Sep 2006 19:36:31 +0200 + +gcc-4.1 (4.1.1ds1-13) unstable; urgency=medium + + * Update to SVN 20060901; remove patches applied upstream: + - PR target/24367. + - PR c++/26670. + * Apply proposed patch for PR fortran/28908. + * Fix biarch symlinks in lib64stdc++ for cross builds. + * Fix biarch symlinks in lib32objc on amd64. + + -- Matthias Klose Fri, 1 Sep 2006 00:04:05 +0200 + +gcc-4.1 (4.1.1ds1-12) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20060830. + * Add backport of PR other/26208, bump libgcc1 shlibs dependency. + * Add backport of PR c++/26670. Closes: #356548. + * Apply proposed patch for PR target/24367 (s390). + * Add /usr/lib/jni to the libjava dlsearch path. Closes: #364820. + * Build without GFDL licensed docs. Closes: #384036. + - debian/patches/{svn-doc-updates,pr25524-doc,pr26885-doc}.dpatch: + Split out -doc specific patches. + - debian/*.texi, debian/porting.html: Add dummy documentation. + - debian/rules.unpack, debian/rules.patch: Update for non-gfdl build. + - fastjar.texi: Directly define the gcctabopt and gccoptlist macros. + + * Merge from Ubuntu: + - Backport the classpath-0.92, libjava, gcc/java merge from the + redhat/gcc-4_1-branch branch. + - Apply the proposed patch for PR libgcj/28698. + - Change the libgcj/libgij sonames. Rename libgcj7 to libgcj7-0. + - Do not remove the rpath from libjvm.so and libjawt.so. Some + configure scripts rely on being able to link that libraries + directly. + - When running the i386 binaries on amd64, look in + /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + - Add /usr/lib/jni to java.library.path. Closes: #364820. + - Add debugging symbols for more binary packages to libgcj7-dbg. + Closes: #383705. + - libgcj7-dev: Remove conflicts with older libgcjX-dev packages. + - Do not build the libgcj-bc and lib32gcj-bc packages anymore from + the gcj-4.1 source. + + [Roman Zippel] + * debian/patches/m68k-limit_reload.dpatch: Correctly limit reload class. + Closes: #375522. + * debian/patches/m68k-split_shift.dpatch: Use correct predicates for long long + shifts and use more splits. Closes: #381572. + * debian/patches/m68k-prevent-qipush.dpatch: Prevent combine from creating + a byte push on the stack (invalid on m68k). Closes: #385021. + * debian/patches/m68k-autoinc.dpatch: Recognize a few more autoinc possibilities. + * debian/patches/pr25514.dpatch: Backport from the trunk. + * debian/patches/m68k-gc.dpatch: Change STACKBOTTOM to LINUX_STACKBOTTOM + so it works with 2.6 kernels. + * Other m68k bug reports fixed in 4.1.1-11 and 4.1.1-12: + Closes: #378599, #345574, #344041, #323426, #340293. + * Build the stage1 compiler using -g -O2; saves a few hours build time + and apparently is working at the moment. + + -- Matthias Klose Tue, 29 Aug 2006 21:37:28 +0200 + +gcc-4.1 (4.1.1-11) unstable; urgency=low + + * The "Our priority are our users, remove the documentation!" release. + + [Matthias Klose] + * Fix build failure building the hppa->hppa64 cross compiler. + * Update to SVN 20060814. + - Fix directory traversal vulnerability in fastjar. Closes: #368397. + CVE-2006-3619. + - Fix PR rtl-optimization/23454, ICE in invert_exp_1 on sparc. + Closes: #321215. + - Fix PR c++/26757, C++ front-end producing two DECLs with the same UID. + Closes: #356569. + * Remove patch for PR rtl-optimization/28075, applied upstream. + * Apply proposed patch for PR rtl-optimization/28634, rounding problem with + -fdelayed-branch on hppa/mips. Closes: #381710. + * Fixed at least in 4.1.1-10: boost::date_time build failure. + Closes: #382352. + * Build-depend on make (>= 3.81), add make (>= 3.81) as dependency to + gcc-4.1-source. Closes: #381117. + * Backport of libffi from the trunk; needed for the java backport in + experimental. + * libffi4-dev: Install the libffi_convenience library as libffi_pic.a. + * When building a package without the GFDL'd documentation, don't create + the alternative's slave links for manual pages for the java tools. + * Do not build the -doc packages and derived manual pages licensed under + the GFDL with invariant sections or cover texts. + * Only build the libssp package, if the target libc doesn't provide + ssp support. + * Run the complete testsuite, when building a standalone gcj package. + + [Roman Zippel] + * debian/patches/m68k-fjump.dpatch: + Always use as fjcc pseudo op, we rely heavily on as to generate the + right size for the jump instructions. Closes: #359281. + * debian/patches/m68k-gc.dpatch: + The thread suspend handler has to save all registers. + Reenable MPROTECT_VDB, it should work, otherwise it's probably a kernel bug. + * debian/patches/m68k-save_pic.dpatch: + Correctly save the pic register, when not done by reload(). + (fixes _Unwind_RaiseException and thus exception handling). + * debian/patches/m68k-libffi.dpatch: Add support for closures. + * debian/patches/m68k-bitfield.dpatch: Avoid propagation of mem expression + past a zero_extract lvalue. + * debian/patches/m68k-dwarf.dpatch: Correct the dwarf frame information, + but preserve compatibility. + + [Christian Aichinger] + * Fix building a cross compiler targeted for ia64. Closes: #382627. + + -- Matthias Klose Tue, 15 Aug 2006 00:41:00 +0200 + +gcc-4.1 (4.1.1-10) unstable; urgency=low + + * Update to SVN 20060729. + - Fix PR c++/28225, segfault in type_dependent_expression_p. + Closes: #376148. + * Apply proposed patch for PR rtl-optimization/28075. + Closes: #373820. + * Apply proposed backport and proposed patch for PR rtl-optimization/28221. + Closes: #376084. + * libgcj7-jar: Loosen dependency on gcj-4.1-base. + * Add ssp header files to the private gcc includedir. + * Do not build the Ada packages from the gcc-4.1 source, introducing + a new gnat-4.1 source package. + * Build libgnat on alpha and s390 as well. + * Do not build the gnat-4.1-doc package (GFDL with invariant sections or + cover texts). + * Remove references to the stl-manual package. Closes: #378698. + + -- Matthias Klose Sat, 29 Jul 2006 22:08:59 +0200 + +gcc-4.1 (4.1.1-9) unstable; urgency=low + + * Update to SVN 20060715. + - Fix PR c++/28016, do not emit uninstantiated static data members. + Closes: #373895, #376871. + * Revert the patch to fix PR c++/27227. Closes: #378321. + * multiarch-include.dpatch: Renamed from biarch-include.dpatch; + apply for all architectures. + * Do not build the java compiler in gcc-4.1 package, just include the + options and specs in the gcc driver. + * Remove gnat-4.0 as an alternative build dependency. + * Add a patch to enable -fstack-protector by default for C, C++, ObjC, ObjC++. + The patch is disabled by default. + + -- Matthias Klose Sat, 15 Jul 2006 17:07:29 +0200 + +gcc-4.1 (4.1.1-8) unstable; urgency=medium + + * Update to SVN 20060708. + - Fix typo in gcov documentation. Closes: #375140. + - Fix typo in gccint documentation. Closes: #376412. + - [alpha], Fix -fvisibility-inlines-hidden segfaults on reference to + static method. PR target/27082. Closes: #369642. + + * Fix ppc64 architecture string in debian/multiarch.inc. Closes: #374535. + * Fix conflict, replace and provide libssp0-dev for cross compilers. + Closes: #377012. + * Ignore compiler warnings when checking whether compiler driver understands + Ada fails. Closes: #376660. + * Backport fix for PR libmudflap/26864 from the trunk. Closes: #26864. + * README.C++: Remove non-existing URL. Closes: #347601. + * gij-4.1: Provide java2-runtime. Closes: #360906. + + * Closed reports reported against gcc-3.0 and fixed in gcc-4.1: + - C++ + + PR libstdc++/13943, call of overloaded `llabs(int)' is ambiguous. + Closes: #228645. + - Java + + Fixed segmentation fault on compiling bad program. Closes: #165635 + * Closed reports reported against gcc-3.3 and fixed in gcc-4.1: + - Stack protector available. Closes: #213994, #233208. + - Better documentation of -finline-limit option. Closes: #296047. + * Closed reports reported against gcc-3.4 and fixed in gcc-4.1: + - General + + Fixed [unit-at-a-time] Using -O2 cannot detect missing return + statement in a function. Closes: #276843. + - C++ + + PR13943, call of overloaded `llabs(int)' is ambiguous. Closes: #228645. + + PR c++/21280, #pragma interface, templates, and "inline function used + but never defined". Closes: #364412. + - Architecture specific: + - m68k + + Segfault building glibc. Closes: #353618. + + ICE when trying to build boost. Closes: #321486. + * Closed reports reported against gcc-4.0 and fixed in gcc-4.1: + - General + + Handling of #pragma GCC visibility for builtin functions. + Closes: #330279. + + gettext interpretation the two conditional strings as one. + Closes: #227193. + + ICE due to if-conversion. Closes: #335078. + + Fix unaligned accesses with __attribute__(packed) and memcpy. + Closes: #355297. + + Fix ICE in expand_expr_real_1, at expr.c. Closes: #369817. + - Ada + + Link error not finding -laddr2line. Closes: #322849. + + ICE on invalid code. Closes: #333564. + - C++ + + libstdc++: bad thousand separator with fr_FR.UTF-8. Closes: #351786. + + The Compiler uses less memory than 4.0. Closes: #336225. + + Fix "fails to compare reverse map iterators". Closes: #362840. + + Fix "fail to generate code for base destructor defined inline with + pragma interface". Closes: #356435. + + Fix ICE in cp_expr_size, at cp/cp-objcp-common.c. Closes: #317455. + + Fix wrong warning: control may reach end of non-void function. + Closes: #319309. + + Fix bogus warning "statement has no effect" with template and + statement-expression. Closes: #336915. + + Fixed segfault on syntax error. Closes: #349087. + + Fix ICE with __builtin_constant_p in template argument. + Closes: #353366. + + Implement DR280 (fixing "no operator!= for const_reverse_iterator"). + Closes: #244894. + - Fortran + + Fix wrong behaviour in unformatted writing. Closes: #369547. + - Java + + Fixed segfault on -fdump-tree-all-all. Closes: #344265. + + Fixed ant code completion in eclipse generating a nullpointer + exception. Closes: #337510. + + Fixed abort in gnu_java_awt_peer_gtk_GtkImage.c. Closes: #343112. + + Fixed assertion failure in gij with rhdb-explain. Closes: #335650. + + Fixed assertion failure when calling JTabbedPane.addTab(null, ...). + Closes: #314704. + + Fixed error when displaying empty window with bound larger than the + displayed content. Closes: #324502. + + Fixed: Exception in JComboBox.removeAllItems(). Closes: #314706. + + Fixed assertian error in gnu_java_awt_peer_gtk_GtkImage.c. + Closes: #333733. + - libmudflap + + PR libmudflap/23170, libmudflap should not use functions marked + obsolescent by POSIX/SUS. Closes: #320398. + - Architecture specific: + - m68k + + FTBFS building tin. Closes: #323016. + + ICE with -g -fomit-frame-pointer. Closes: #331150. + + ICE in instantiate_virtual_regs_lossage. Closes: #333536. + + Wrong code generation with loop unrolling. Closes: #342121. + + ICEs while building gst-ffmpeg. Closes: #343692. + - mips + + Fix gjdoc build failure. Closes: #344986. + + Fix link failure for static libs and object files when xgot + needs to be used. Closes: #274942. + * gnat bug reports fixed since gnat-3.15p: + - GNAT miscounts UTF8 characters in string with -gnaty. Closes: #66175. + - Bug box from "with Text_IO" when compiling optimized. Closes: #243795. + - Nonconforming parameter lists not detected. Closes: #243796. + - Illegal use clause not detected. Closes: #243797. + - Compiler enters infinite loop on illegal program with tagged records. + Closes: #243799. + - Compiler crashes on illegal program (missing discriminant, unconstrained + parent). Closes: #243800. + - Bug box at sinfo.adb:1215 on illegal program. Closes: #243801. + - Bug box at sinfo.adb:1651 on illegal program. Closes: #243802. + - Illegal program not detected (entry families). Closes: #243803. + - Illegal program not detected, RM 10.1.1(14). Closes: #243807. + - Bug box at exp_ch9.adb:7254 on illegal code. Closes: #243812. + - Illegal program not detected, RM 4.1.4(14). Closes: #243816. + - Bug box in Gigi, code=116, on legal program. Closes: #244225. + - Illegal program not detected, 12.7(10) (generic parameter is visible, + shouldn't be). Closes: #244483. + - Illegal program not detected, ambiguous aggregate. Closes: #244496. + - Bug box at sem_ch3.adb:8003. Closes: #244940. + - Bug box in Gigi, code=103, on illegal program. Closes: #244945. + - Legal program rejected, overloaded procedures. Closes: #246188. + - Bug box in Gigi, code=999, on legal program. Closes: #246388. + - Illegal program not detected, RM 10.1.6(3). Closes: #246389. + - Illegal program not detected, RM 3.10.2(24). Closes: #247014. + - Illegal program not detected, RM 3.9(17). Closes: #247015. + - Legal program rejected. Closes: #247016. + - Legal program rejected. Closes: #247021. + - Illegal program not detected, RM 4.7(3). Closes: #247022. + - Illegal program not detected, RM 3.10.2(27). Closes: #247562. + - Legal program rejected, "limited type has no stream attributes". + Closes: #247563. + - Wrong output from legal program. Closes: #247565. + - Compiler enters infinite loop on illegal program. Closes: #247567. + - Illegal program not detected, RM 8.6(31). Closes: #247568. + - Legal program rejected, visible declaration not seen. Closes: #247572. + - Illegal program not detected, RM 8.2(9). Closes: #247573. + - Wrong output from legal program, dereferencing access all T'Class. + Closes: #248171. + - Compiler crashes on illegal program, RM 5.2(6). Closes: #248174. + - Cannot find generic package body, RM 1.1.3(4). Closes: #248677. + - Illegal program not detected, RM 3.4.1(5). Closes: #248679. + - Compiler ignores legal override of abstract subprogram. Closes: #248686. + - Bug box, Assert_Failure at sinfo.adb:2365 on illegal program. + Closes: #251266. + - Ada.Numerics.Generic_Elementary_Functions.Log erroneout with -gnatN. + Closes: #263498. + - Bug box, Assert_Failure at atree.adb:2906 or Gigi abort, code=102 + with -gnat -gnatc. Closes: #267788. + - Bug box in Gigi, code=116, 'Unrestricted_Access of a protected + subprogram. Closes: #269775. + - Stack overflow on illegal program, AI-306. Closes: #276225. + - Illegal program not detected, RM B.1(24). Closes: #276226. + - Wrong code generated with -O -fPIC. Closes: #306833. + - Obsolete: bashism's in debian/rules file. Closes: #370681. + - Supports more debian architectures. Closes: #171477. + + -- Matthias Klose Sat, 8 Jul 2006 16:24:47 +0200 + +gcc-4.1 (4.1.1-7) unstable; urgency=low + + * Prefer gnat-4.1 over gnat-4.0 as a build dependency. + * libssp0: Set priority to standard. + + -- Matthias Klose Sun, 2 Jul 2006 10:22:50 +0000 + +gcc-4.1 (4.1.1-6) unstable; urgency=low + + [Ludovic Brenta] + * Do not provide the symbolic link /usr/bin/gnatgcc; this will now + be provided by package gnat from the source package gcc-defaults. + * debian/control.m4, debian/control (gnat): conflict with gnat (<< 4.1), + not all versions of gnat, since gcc-defaults will now provide gnat (= 4.1) + which depends on gnat-4.1. + + [Matthias Klose] + * libjava: Change the default for enable_hash_synchronization_default + on PA-RISC. Tighten the libgcj7 shlibs version on hppa. + * Update to SVN 20060630. + * Apply proposed patch for PR 26991. + * Don't use the version for the libstdc++ shlibs dependency for the libgcj + shlibs dependency. + * Merge from Ubuntu edgy: + - Fix %g7 usage in TLS, add patch sparc-g7.dpatch, fixes glibc-2.4 build + failure on sparc (Fabio M. Di Nitto). + - Merge libssp0-dev into gcc-4.1 (-fstack-protector is a common option). + - Run the testsuite with -fstack-protector as well. + + [Bastian Blank] + * Make it possible to overwrite arch per DEB_TARGET_ARCH and DEB_TARGET_GNU_TYPE. + * Disable biarch only on request for cross builds. + * Use correct source directory for tarballs. + * Produce correct multiarch.inc for source builds. + + -- Matthias Klose Sat, 1 Jul 2006 01:49:55 +0200 + +gcc-4.1 (4.1.1-5) unstable; urgency=low + + * Fix build error running with dpkg-buildpackage -rsudo. + + -- Matthias Klose Wed, 14 Jun 2006 01:54:13 +0200 + +gcc-4.1 (4.1.1-4) unstable; urgency=low + + * Really do not backout the fix for PR c++/26068. + Closes: #372152, #372559. + * Update fastjar version string to 4.1. + * Disable pascal again. + + -- Matthias Klose Mon, 12 Jun 2006 20:29:57 +0200 + +gcc-4.1 (4.1.1-3) unstable; urgency=low + + * Update to SVN 20060608, do not revert the fix for PR c++/26068. + Closes: #372152, #372559. + * Fix build failures for Pascal, enable Pascal on all architectures. + * Fix another build failure on GNU/kFreeBSD (Aurelien Jarno). + Closes: #370661. + * Fix build fauilure in gcc/p with parallel make. + * Remove cross-configure patch (Kazuhiro Inaoka). Closes: #370649. + * Only build the gcc-4.1-source package, when building from the gcc-4.1 + source. + * Fix upgrade problem from standalone gcj-4.1. + * Fix build error using bison-2.2, build-depend on bison (>= 2.3). + Closes: #372605. + * Backport PR libstdc++/25524 from the trunk, update the biarch-include + patch. mips triarch support can be added more easily. + + -- Matthias Klose Mon, 12 Jun 2006 00:23:45 +0200 + +gcc-4.1 (4.1.1-2) unstable; urgency=low + + * Update to SVN 20060604. + - Fix PR c++/26757, C++ front-end producing two DECLs with the same UID. + Closes: #356569. + - Fix PR target/27158, ICE in extract_insn with -maltivec. + Closes: #362307. + * Revert PR c++/26068 to work around PR c++/27884 (Martin Michlmayr). + Closes: #370308. + * Mention Ada in copyright, update copyright file (Ludovic Brenta). + Closes: #366744. + * Fix kbsd-gnu-java.dpatch (Petr Salinger). Closes: #370320. + * Don't include version control files in gcc-4.1-source. + + -- Matthias Klose Sun, 4 Jun 2006 19:13:37 +0000 + +gcc-4.1 (4.1.1-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20060601. + * Reenable the gpc build. + * PR libgcj/26483, libffi patch for IA-64 denorms, taken from trunk. + * Disable Ada for m32r targets. Closes: #367595. + * lib32gfortran1: Do not create empty directory /usr/lib32. Closes: #367999. + * gcc-4.1: Add a conflict to the gcj-4.1 version with a different + gcc_libdir. + * Build gij/gcj for GNU/k*BSD. Closes: #367166. + * Update hurd-changes patch (Michael Banck). Closes: #369690. + * debian/copyright: Add exception for the gpc runtime library. + * Update gpc/gpc-doc package descriptions. + + [Ludovic Brenta] + * patches/ada-libgnatprj.dpatch: add prj-pars.ad[bs] and sfn_scan.ad[bs] + to libgnatprj; remove them from gnatmake. + + -- Matthias Klose Thu, 1 Jun 2006 20:35:54 +0200 + +gcc-4.1 (4.1.0-4) unstable; urgency=low + + [Ludovic Brenta] + * Fix a stupid bug whereby fname.ad{b,s} would be included in both + libgnatvsn-dev and libgnatprj-dev, preventing use of gnatprj.gpr. + Closes: #366733. + + -- Matthias Klose Thu, 11 May 2006 04:34:50 +0200 + +gcc-4.1 (4.1.0-3) unstable; urgency=low + + * Update to SVN 20060507. + * debian/rules.d/binary-java.mk: Use $(lib32) everywhere. Closes: #365388. + * Always configure hppa64-linux-gnu with + --includedir=/usr/hppa64-linux-gnu/include. + * Make libgnatvsn4.1 and libgnatprj4.1 priority optional. Closes: #365900. + * Call autoconf2.13 explicitely in the Ada patches, build-depend on + autoconf2.13. Closes: #365780. + * Fix libgnatprj-dev and libgnatvsn-dev dependencies on their shared + libraries. + * Deduce softfloat and vfp (ARM) configure options (Pjotr Kourzanov). + * Update proposed patch for PR26885 (May 2 version). + * Build the libxxstdc++-dbg packages, when not building the library pacakges. + * Do not include the _pic library in the libxxstdc++-dbg packages. + + -- Matthias Klose Sun, 7 May 2006 15:29:53 +0200 + +gcc-4.1 (4.1.0-2) unstable; urgency=medium + + * Update to SVN 20060428. + * Apply proposed patches for PR26885. + + * Keep libffi doc files in its own directory. Closes: #360466. + * Update ppc64 patches for 4.1 (Andreas Jochens). Closes: #360498. + * Fix PR tree-optimization/26763, wrong-code, taken from the 4.1 branch. + Closes: #356896. CVE-2006-1902. + * hppa-cbranch, hppa-cbranch2 patches: Fix for PR target/26743, + PR target/11254, PR target/10274, backport from trunk (Randolph Chung). + * Let libgccN provide -dcv1 when cross-compiling (Pjotr Kourzanov). + Closes: #363289. + * (Build-)depend on glibc-2.3.6-7. Closes: #360895, #361904. + * Fix a pedantic report about a package description. Add a hint that + we do not like bug reports with locales other than "C". Closes: #361409. + * Enable the libjava interpreter on mips/mipsel. + * gcc-4.1-source: Depend on gcc-4.1-base. + * gnat-4.1: Fix permissions of .ali files. + * Build lib32gcj7 on amd64. + * debian/patches/ada-gnatvsn.dpatch: New. Apply proposed fix for + PR27194. + + [Ludovic Brenta] + * debian/patches/ada-default-project-path.dpatch: new. Change the + default search path for project files to the one specified + by the Debian Policy for Ada: /usr/share/ada/adainclude. + * debian/patches/ada-symbolic-tracebacks.dpatch: new. Enable support for + symbolic tracebacks in exceptions. + * debian/patches/ada-missing-lib.dpatch: remove, superseded by the above. + * debian/patches/ada-link-lib.dpatch: changed. + - Instead of building libada as a target library only, build it as + both a host and, if different, target library. + - Build the GNAT tools in their top-level directory; do not use + recursive makefiles. + - Link the GNAT tools dynamically against libgnat. + - Apply proposed fix for PR27300. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-libgnatvsn.dpatch: new. + - Introduce a new shared library named libgnatvsn, containing + common components of GNAT under the GNAT-Modified GPL, for + use in GNAT tools, ASIS, GLADE and GPS. + - Link the gnat tools against this new library. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-libgnatprj.dpatch: new. + - Introduce a new shared library named libgnatprj, containing the + GNAT Project Manager, i.e. the parts of GNAT that parses project + files (*.gpr). Licensed under pure GPL; for use in GLADE and GPS. + - Link the gnat tools against this new library. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-acats.dpatch: new. + - When running the ACATS, look for the gnat tools in their new + directory (build/gnattools), and for the shared libraries in + build/gcc/ada/rts, build/libgnatvsn and build/libgnatprj. + * debian/gnatvsn.gpr, debian/gnatprj.gpr: new. + * debian/rules.d/binary-ada.mk, debian/control.m4: new binary packages: + libgnatvsn-dev, libgnatvsn4.1, libgnatprj-dev, libgnatprj4.1. Place + the *.gpr files in their respective -dev packages. + + -- Matthias Klose Sat, 29 Apr 2006 00:32:09 +0200 + +gcc-4.1 (4.1.0-1) unstable; urgency=low + + * libstdc++CXX-BV-dev.preinst: Remove (handling of c++ include dir for 4.0). + * libgcj-common: Move removal of docdir from preinst into postinst. + * libgcj7: Move removal of docdir from preinst into postinst. + * Drop alternative build dependency on gnat-3.4, not built anymore. + * Fix PR libgcj/26103, wrong exception thrown (4.1 branch). + * debian/patches/libjava-stacktrace.dpatch: Add support to print file names + and line numbers in stacktraces. + * Add debugging symbols for libgcjawt and lib-gnu-java-awt-peer-gtk + in the libgcj7-dbg and lib32gcj7-dbg packages. + * Remove dependency of the libgcj-dbg packages on the libgcj-dev packages, + add recommendations on binutils and libgcj-dev. Mention the requirement + of binutils for the stacktraces. + * Fix upgrade from version 4.0.2-9, loosing the Debian changelog. + Closes: #355439. + * gij/gcj: Install one alternative for each command, do not use slave + links for rmiregistry, javah, rmic. Ubuntu #26781. Closes: #342557. + * Fix for PR tree-optimization/26587, taken from the 4.1 branch. + * Fix PR libstdc++/26526 (link failure when _GLIBCXX_DEBUG is defined). + * Configure with --enable-clocale=gnu, even if not building C++ packages. + * Remove runtime path from biarch libraries as well. + * PR middle-end/26557 (ice-on-vaild-code, regression), taken from + the gcc-4_1-branch. Closes: #349083. + * PR tree-optimization/26672 (ice-on-vaild-code, regression), taken from + the gcc-4_1-branch. Closes: #356231. + * PR middle-end/26004 (rejects-vaild-code, regression), taken from + the gcc-4_1-branch. + * When building as standalone gcj, build libgcc4 (hppa only) and fastjar. + * Configure --with-cpu=v8 on sparc. + * debian/patches/libjava-hppa.dpatch: pa/pa32-linux.h + (CRT_CALL_STATIC_FUNCTION): Define when CRTSTUFFS_O is defined. + (John David Anglin). Closes: #353346. + * Point to the 4.1 version of README.Bugs (closes: #356230). + * Disable the libmudflap testsuite on alpha (getting killed). + + -- Matthias Klose Sat, 18 Mar 2006 23:00:39 +0100 + +gcc-4.1 (4.1.0-0) experimental; urgency=low + + * GCC 4.1.0 final release. + * Build the packages for the Java language from a separate source. + * Update NEWS.html, NEWS.gcc. + * libgcj-doc: Auto generated API documentation for libgcj7, classpath + example programs. + * Add gjdoc to Build-Depends-Indep. + * On amd64, build-depend on libc6-dev-i386 instead of ia32-libs-dev. + * Internal ssp headers now installed in the gcc libdir. + * Do not build gcj-4.1-base when building the gcc-4.1 packages. + * When building as gcj-4.1, use the tarball from the gcc-4.1-source + package. + + [Ludovic Brenta] + * Allow to enable and disable NLS and bootstrapping from the environment. + - Adding "nls" to WITHOUT_LANG disables NLS support. + - If WITH_BOOTSTRAP is set, debian/rules2 calls configure + --enable-bootstrap=$(WITH_BOOTSTRAP) and just "make". If + WITH_BOOTSTRAP is unset, it calls configure without a bootstrapping + option and calls "make profiledbootstrap" or "make bootstrap-lean" + depending on the target CPU. + Currently overwritten to default to "bootstrap". + + -- Matthias Klose Thu, 2 Mar 2006 00:03:45 +0100 + +gcc-4.1 (4.1ds9-0exp9) experimental; urgency=low + + * Update to GCC 4.1.0 release candidate 1 (gcc-4.1.0-20060219 tarball). + * Update gcc-version patch for gcc-4.1. + * libgccN, libstdc++N*: Fix upgrade of /usr/share/doc symlinks. + * libjava awt & swing update, taken from trunk 2006-02-16. + * libgcj7-dev: Suggest libgcj-doc, built from a separate source package. + * Shorten build-dependency line (work around buildd problems + on arm* and mips*). + * New patch gcc-ice-hack (saving the preprocessed source on an ICE), + taken from Fedora. + + -- Matthias Klose Mon, 20 Feb 2006 10:07:23 +0100 + +gcc-4.1 (4.1ds8-0exp8) experimental; urgency=low + + * Update to SVN 20060212, taken from the 4.1 release branch. + * libgccN: Fix upgrade of /usr/share/doc/libgccN symlink. + + -- Matthias Klose Sun, 12 Feb 2006 19:48:31 +0000 + +gcc-4.1 (4.1ds7-0exp7) experimental; urgency=low + + * Update to SVN 20060127, taken from the 4.1 release branch. + - On hppa, bump the libgcc soversion to 4. + * Add an option not to depend on the system -base package for cross compiler + (Ian Wienand). Closes: #347484. + * Remove workaround increasing the stack size limit for some architectures, + not needed anymore on ia64. + * On amd64, build-depend on libc6-dev-i386, depend on libc6-i386, where + available. + * libstdc++6: Properly upgrade the doc directory. Closes: #346171. + * libstdc++6: Add a conflict to scim (<< 1.4.2-1). Closes: #343313. + * Set default 32bit ix86 architecture to i486. + + -- Matthias Klose Fri, 27 Jan 2006 22:23:22 +0100 + +gcc-4.1 (4.1ds6-0ubuntu6) experimental; urgency=low + + * Update to SVN 20060107, taken from the 4.1 release branch. + - Remove fix for PR ada/22533, fixed by patch for PR c++/23171. + * Remove binary packages from the control file, which aren't built + yet on any architecture. + * gcc-hppa64: Use /usr/hppa64-linux-gnu/include as location for the glibc + headers, tighten glibc (build-)dependency. + * libffi [arm]: Add support for closures, libjava [arm]: enable the gij + interpreter (Phil Blundell). Addresses: #337263. + * For the gcj standalone build, include cc1 into the gcj-4.1 package, + needed for linking java programs compiled to native code. + + -- Matthias Klose Sat, 7 Jan 2006 03:36:33 +0100 + +gcc-4.1 (4.1ds4-0exp4) experimental; urgency=low + + * Update to SVN 20051210, taken from the 4.1 release branch. + * Prepare to build the java packages from it's own source (merged + from Ubuntu). + - Build the java packages from the gcc-4.1 source, as long as packages + are prepared for experimental. + - When built as gcj, run only the libjava testsuite, don't build the + libstdc++ debug packages, don't package the gcc source. + - Loosen package dependencies, when java packages are built from + separate sources. + - Fix gcj hppa build, when java packages are built from separate sources. + - gij-4.1: Install test-summary, when doing separate builds. + - Allow java packages be installed independent from other packages built + from the source package. + - Rename libgcj7-common to libgcj7-jar. + - Introduce a gcj-4.1-base package to completely separate the two and not + duplicate the changelog in each gcj/gij package. + * Java related changes: + - libjava-xml-transform: Update from classpath trunk, needed for + eclipse (Michael Koch), applied upstream. + - Fix java wrapper scripts to point to 4.1 (closes: #341710). + - Reenable java on mips and mipsel. + - Fix libgcj6 dependency. Ubuntu #19935. + - Add libxt-dev as a java build dependency. autoconf explicitely checks + for X11/Intrinsic.h. + * Ada related changes: + - Apply proposed fix for PR ada/22533, reenable ada on alpha, powerpc, + mips, mipsel and s390. + - Add Ada support for GNU/kFreeBSD (Aurelien Jarno). Closes: #341356. + - Remove ada bootstrap workaround for alpha. + * Build a separate gcc-4.1-source package (Bastian Blank). Closes: #333922. + * Remove obsolete patch: libstdc++-automake. + * Remove patch integrated upstream: libffi-mips. + * Fix the installation of the hppa64 compiler in snapshot builds. + * Rename libgfortran0* to libgfortran1* (upstream soversion change). + * Add a dependency on libc-dev for all compilers / -dev packages except + gcc (which can be used for kernel builds without libc-dev). + * libffi4-dev: Fix package description. + * On amd64, install 32bit libraries into /emul/ia32-linux/usr/lib. + Addresses: #341147. + * Fix installation of biarch libstdc++ headers on amd64. + * Configure --with-tune=i686 on ix86 architectures (on Ubuntu with + -mtune=pentium4). Remove the cpu-default-* patches. + * debian/control.m4: Fix libxxgcc package names. + * Update the build infrastructure to build cross compilers + (Nikita V. Youshchenko). + * Tighten binutils (build-)dependency. Closes: #342484. + * Symlink more doc directories. + * debian/control.m4: Explicitely set Architecture for biarch packages. + + -- Matthias Klose Sat, 10 Dec 2005 16:56:45 +0100 + +gcc-4.1 (4.1ds1-0ubuntu1) UNRELEASED; urgency=low + + * Build Java packages only. + * Update to SVN 20051121, taken from the 4.1 release branch. + - Remove libjava-saxdriver-fix patch, applied upstream. + - Remove ada-gnat-version patch, applied upstream. + * Fix FTBFS in biarch builds on 32bit kernels. + * Update libstdc++-doc doc-base file (closes: #339046). + * Remove obsolete patch: gcc-alpha-ada_fix. + * Fix installation of biarch libstdc++ headers (Ubuntu #19655). + * Fix sparc and s390 biarch patches to build the 64bit libffi. + * Work around biarch build failure in libjava/classpath/native/jni/midi-alsa. + * Install spe.h header on powerpc. + * Add libasound build dependencies. + * libgcj: Fix installation of libgjsmalsa library. + * Remove patches not used anymore: libjava-no-rpath, i386-config-ml-nomf, + libobjc, multiarch-include, disable-biarch-check-mf, gpc-profiled, + gpc-no-gpidump, libgpc-shared, acats-expect. + * Fix references to manuals in gnat(1). Ubuntu #19772. + * Remove build dependency on xlibs-dev, add libxtst-dev. + * Do not configure with --disable-werror. + * Merge *-config-ml patches into one config-ml patch, configure the biarch + libs in debian/rules.defs. + * debian/gcj-wrapper: Accept -Xss. + * Do not build biarch java on Debian (missing biarch libasound). + * Do not build the java packages from this source package, avoiding + dependencies on X. + + -- Matthias Klose Mon, 21 Nov 2005 20:29:43 +0100 + +gcc-4.1 (4.1ds0-0exp0) experimental; urgency=low + + * Configure libstdc++ using the default allocator. + * Update to 20051112, taken from the svn trunk. + + -- Matthias Klose Sat, 12 Nov 2005 23:47:01 +0100 + +gcc-4.1 (4.1ds0-0ubuntu0) breezy; urgency=low + + * UNRELEASED + * First snapshot of gcc-4.1 (CVS 20051019). + - adds SSP support (closes: #213994, #233208). + * Remove patches applied upstream/not needed anymore. + * Update patches for 4.1: link-libs, gcc-textdomain, libjava-dlsearch-path, + rename-info-files, reporting, classmap-path, i386-biarch, sparc-biarch, + libjava-biarch-awt, ada-gcc-name. + * Disable patches: + - 323016, m68k, necessary for 4.1? + * debian/copyright: Update for 4.1. + * debian/control, debian/control.m4, debian/rules.defs, debian/rules.conf: + Update for 4.1, add support for Obj-C++ and SSP. + * Fix generation of Ada docs in info format. + * Set Ada library version to 4.1. + * Drop gnat-3.3 as an alternative build dependency. + * Use fortran instead of f95 for the build files. + * Update build support for awt peer libs. + * Add packaging support for SSP library. + * Add packaging support for Obj-C++. + * Run the testsuite for -march=i686 on i386 and amd64 as well. + * Fix generation of Pascal docs in html format. + * Update config-ml patches to build libssp biarch. + * Disable libssp for hppa64 build. + * libgcj7-dev: Install jni_md.h. + * Disable gnat for powerpc, currently fails to build. + * Add biarch runtime lib packages for ssp, mudflap, ffi. + * Do not explicitely configure with --enable-java-gc=boehm, which is the + default. + * libjava-saxdriver-fix: Fix a problem in the Aelfred2 SAX parser. + * libstdc++6-4.0-dev: Depend on the libc-dev package. Ubuntu #18885. + * Build-depend on expect-tcl8.3 on all architectures. + * Build-depend on lib32z1-dev on amd64 and ppc64, drop build dependency on + amd64-libs. + * Disable ada on alpha mips mipsel powerpc s390, currently broken. + + -- Matthias Klose Wed, 19 Oct 2005 11:02:31 +0200 + +gcc-4.0 (4.0.2-3) unstable; urgency=low + + * Update to CVS 20051015, taken from the gcc-4_0-branch. + - gcc man page fixes (closes: #327254, #330099). + - PR java/19870, PR java/20338, PR java/21844, PR java/21540: + Remove Debian patches. + - Applied libjava-echo-fix patch. + - Fix PR target/24284, ICE (Segmentation fault) on sparc-linux. + Closes: #329840. + - Fix PR c++/23797, ICE on typename outside template. Closes: #325545. + - Fix PR c++/22551, ICE in tree_low_cst. Closes: #318932. + * libstdc++6: Tighten libstdc++ shlibs version to 4.0.2-3 (new symbol). + * Update generated Ada files. + * Fix logic to disable mudflap and Obj-C++ via the environment. + * Remove f77 build bits. + * gij-4.0: Remove /var/lib/gcj-4.0/classmap.db on purge (closes: #330800). + * Let gcj-4.0 depend on libgcj6-dev, instead of recommending it. This is + not necessary for byte-code compilations, but for compilations to native + code. For compilations to byte-code, use a better compiler like ecj + for now (found in the ecj-bootstrap package). + * Disable biarch setup in cross compilers (Josh Triplett). Closes: #333952. + * Fix with_libnof logic for cross-compilations (Josh Triplett). + Closes: #333951. + * Depend on binutils (>= 2.16.1cvs20050902-1) on the alpha architecture. + Closes: #333954. + * On i386, build-depend on libc6-dev-amd64. Closes: #329108. + * (Build-)depend on glibc 2.3.5-5. + + -- Matthias Klose Sun, 2 Oct 2005 14:25:54 +0200 + +gcc-4.0 (4.0.2-2) unstable; urgency=low + + * Update to CVS 20051001, taken from the gcc-4_0-branch. Includes the + changes between 4.0.2 RC3 and the final 4.0.2 release, missing from + the upstream tarball. Remove patches applied upstream (gcc-c-decl, + pr23182, pr23043, pr23367, pr23891, pr21418, pr24018). + * On ix86 architectures run the testsuite for -march=i686 as well. + * Build libffi on the Hurd (closes: #328705). + * Add big-endian arm (armeb) support (Lennert Buytenhek). Closes: #330730. + * Update libjava xml to classpath CVS HEAD 20050930 (Michael Koch). + * Reapply patch to make -mieee the default on alpha-linux. Closes: #330826. + * Add workaround not to make libmudflap _start/_end not small data on + mips/mipsel, taken from CVS HEAD. + * Don't build the nof libraries on powerpc. + * Number crunching time on m68k, reenable gfortran on m68k-linux-gnu. + + -- Matthias Klose Sat, 1 Oct 2005 15:42:10 +0200 + +gcc-4.0 (4.0.2-1) unstable; urgency=low + + * GCC 4.0.2 release. + * lib64stdc++6: Set priority to optional. + * Fix bug in StreamSerializer, seen with eclipse-3.1 (Ubuntu 12744). + Backport from CVS HEAD, Michael Koch. + * Apply java patches, proposed for the 4.0 branch: PR java/24018, + PR libgcj/23182, PR java/19870, PR java/21844, PR libgcj/23367, + PR java/20338. + * Update the expect/pty test to actually call expect directly, rather + than test for the existence of PTYs, since a working expect is what + we really care about, not random device files (Adam Conrad). + Closes: #329715. + * Add build dependencies on lib64z1-dev. + * gcc-c-decl.dpatch: Fix C global decl handling regression in 4.0.2 from + 4.0.1 + + -- Matthias Klose Thu, 29 Sep 2005 19:50:08 +0200 + +gcc-4.0 (4.0.1-9) unstable; urgency=low + + * Update to CVS 20050922, taken from the gcc-4_0-branch (4.0.2 RC3). + * Apply patches: + - Fix PR java/21418: Order of source files matters when compiling, + backported from mainline. + - Fix for PR 23043, backported form mainline. + - Proposed patch for #323016 (m68k only). Patch by Roman Zippel. + * libstdc++6: Tighten libstdc++ shlibs version to 4.0.1-9 (new symbol). + * Fail the build early, if the system doesn't have any pty devices + created in /dev. Needed for running the testsuite. + * Update hurd changes again (closes: #328973). + + -- Matthias Klose Thu, 22 Sep 2005 07:28:18 +0200 + +gcc-4.0 (4.0.1-8) unstable; urgency=medium + + * Update to CVS 20050917, taken from the gcc-4_0-branch. + - Fix FTBFS for boost, introduced in 4.0.1-7 (closes: #328684). + * Fix PR java/23891, eclipse bootstrap. + * Set priority of gcc-4.0-hppa64 package to standard. + * Bump standards version to 3.6.2. + * Fix java wrapper script, mishandles command line options with arguments. + Patch from Olly Betts. Closes: #296456. + * Bump epoch of the lib32gcc1 package to the same epoch as for the the + libgcc1 and lib64gcc1 packages. + * Fix some lintian warnings. + * Build libffi on the Hurd (closes: #328705). + * For biarch builds, disable the testsuite for the non-default architecture + for runtime libraries, which are not built by default (libjava). + * Add gsfonts-x11 to Build-Depends-Indep to avoid warnings from doxygen. + * Install Ada .ali files read-only. + + -- Matthias Klose Sat, 17 Sep 2005 10:35:23 +0200 + +gcc-4.0 (4.0.1-7) unstable; urgency=low + + * Update to CVS 20050913, taken from the gcc-4_0-branch. + - Fix PR c++/19004, ICE in uses_template_parms (closes: #284777). + - Fix PR rtl-optimization/23454, ICE in invert_exp_1 on sparc. + Closes: #321215. + - Fix PR libstdc++/23417, make bits/stl_{list,tree}.h -Weffc++ clean. + Closes: ##322170. + * Install 'altivec.h' on ppc64 (closes: #323945). + * Install locale data with the versioned package name (closes: #321591). + * Fix fastjar build without building libjava. + * On hppa, don't build using gcc-3.3 when ada is disabled. + * On m68k, don't build the stage1 compiler using -O. + + * Ludovic Brenta + - Allow the choice whether or not to build with NLS. + - Fix a typo whereby libffi was always enabled on i386. + + -- Matthias Klose Tue, 13 Sep 2005 23:23:11 +0200 + +gcc-4.0 (4.0.1-6) unstable; urgency=low + + * Update to CVS 20050821, taken from the gcc-4_0-branch. + - debian/patches/pr21562.dpatch: Removed, applied upstream. + - debian/patches/libjava-awt-name.dpatch: Updated. + - debian/patches/classpath-20050618.dpatch: Updated. + * Use all available CPU's for the check target, unless USE_NJOBS == no. + * debian/patches/biarch-include.dpatch: Include + /usr/local/include/-linux-gnu before including /usr/local/include. + * Fix biarch system include directories for the non-default architecture. + * Prefer gnat-4.0 over gnat-3.4 over gnat-3.3 as a build-dependency. + + -- Matthias Klose Thu, 18 Aug 2005 18:36:23 +0200 + +gcc-4.0 (4.0.1-5) unstable; urgency=low + + * Update to CVS 20050816, taken from the gcc-4_0-branch. + - Fix PR middle-end/23369, wrong code generation for funcptr comparison + on hppa. Closes: #321785. + - Fix PR fortran/23368 ICE with NAG routines (closes: #322912). + * Build-depend on libcairo2-dev (they say, that's the final package name ...) + * libgcj: Search /usr/lib/gcj-4.0 for dlopened libraries, place a copy + of the .la files in the libgcj6 package into this directory. + Closes: #322576. + * Tighten the dependencies between the compiler packages to the same + version and release. Use some substitution variables for control file + generation. + * Remove build dependencies for gpc. + * Don't use '/emul/ia32-linux' on ppc64 (closes: #322890). + * Synchronize with Ubuntu. + + -- Matthias Klose Tue, 16 Aug 2005 22:45:47 +0200 + +gcc-4.0 (4.0.1-4ubuntu1) breezy; urgency=low + + * Jeff Bailey + + Enable i386 biarch using biarch glibc (not yet enabled for unstable). + - debian/rules.d/binary-libgcc.mk: Make i386 lib64gcc1 depend on + libc6-amd64 + - debian/control.m4: Suggest libc6-amd64 rather than amd64-libs. + - debian/rules.conf: Build-Dep on libc6-dev-amd64 [i386] + Build-Dep on binutils >= 2.16.1-2ubuntu3 + - debian/rules2: Enable biarch build in Ubuntu. + + * Matthias Klose + + - Add shlibs file and dependency information for the lib32gcc1 package. + - debian/patches/gcc-textdomain.dpatch: Update (closes: #321591). + - Set priority of gcc-4.0-base and libstdc++6 packages to `required'. + Closes: #321016. + - libffi-hppa.dpatch: Remove, applied upstream. + + -- Matthias Klose Mon, 8 Aug 2005 19:39:02 +0200 + +gcc-4.0 (4.0.1-4) unstable; urgency=low + + * Enable the biarch compiler for powerpc (closes: #268023). + * Update to CVS 20050806, taken from the gcc-4_0-branch. + * Build depend on libcairo0.6.0-dev (closes: #321540). + * Fix Ada build on the hurd (closes: #321350). + * Update libffi for mips (Thiemo Seufer). Closes: #321100. + * Fix segfault on 64bit archs in the AWT Gtk peer library (Dan Frazier). + Closes: #320915. + * Add libXXgcc1 build dependencies for biarch builds. + + -- Matthias Klose Sun, 7 Aug 2005 07:01:59 +0000 + +gcc-4.0 (4.0.1-3) unstable; urgency=medium + + * Update to CVS 20050725, taken from the gcc-4_0-branch. + - Fix ICE with -O and -mno-ieee-fp/-ffast-math (closes: #319087). + * Synchronize with Ubuntu. + * Fix applying hurd specific patches for the hurd build (closes: #318443). + * Do not build-depend on libmpfr-dev on architectures, where fortran + is not built. + * Apply biarch include patch on ppc64 as well (closes: #318603). + * Correct libstdc++-dev package description (closes: #319082). + * debian/rules.defs: Replace DEB_TARGET_GNU_CPU with DEB_TARGET_ARCH_CPU. + * gcc-4.0-hppa64: Rename hppa64-linux-gcc to hppa64-linux-gnu-gcc. + Closes: #319818. + + -- Matthias Klose Mon, 25 Jul 2005 10:43:06 +0200 + +gcc-4.0 (4.0.1-2ubuntu3) breezy; urgency=low + + * Update to CVS 20050720, taken from the gcc-4_0-branch. + - Fix PR22278, volatile issues, seen when building xorg. + * Build against new libcairo1-dev (0.5.2). + + -- Matthias Klose Wed, 20 Jul 2005 12:29:50 +0200 + +gcc-4.0 (4.0.1-2ubuntu2) breezy; urgency=low + + * Acknowledge that i386 biarch builds still need to be fixed for glibc-2.3.5. + + -- Matthias Klose Tue, 19 Jul 2005 08:29:30 +0000 + +gcc-4.0 (4.0.1-2ubuntu1) breezy; urgency=low + + * Synchronize with Debian. + * Update to CVS 20050718, taken from the gcc-4_0-branch. + - Fix PR c++/22132 (closes: #318488), upcasting a const class pointer + to struct the class derives from generates wrong code. + * Build biarch runtime libraries for Fortran and ObjC. + * Apply proposed patch for PR22309 (crash with mt_allocator if libstdc++ + is dlclosed). Closes: #293466. + + -- Matthias Klose Mon, 18 Jul 2005 17:10:18 +0200 + +gcc-4.0 (4.0.1-2) unstable; urgency=low + + * Don't apply the patch to make -mieee the default on alpha-linux-gnu. + Causes the bootstrap to fail on alpha-linux-gnu. + + -- Matthias Klose Tue, 12 Jul 2005 00:14:12 +0200 + +gcc-4.0 (4.0.1-1) unstable; urgency=high + + * GCC 4.0.1 final release. See /usr/share/doc/gcc-4.0/NEWS.{gcc,html}. + * Build fastjar on mips/mipsel, fix fastjar build without building java. + * Disable the comparision check on unstable/ia64. adaint.o differs, + currently cannot be reproduced with glibc-2.3.5 and binutils-2.16.1. + * libffi/hppa: Fix handling of 3 and 5-7 byte struct returns. + * amd64: Fix libgcc symlinks to point to /usr/lib32, instead of /lib32. + * On powerpc, don't build with -j >1, apparently doesn't succeeds + on the Debian buildd. + * Apply revised patch to make -mieee the default on alpha-linux, + and add -mieee-disable switch to turn the default off (Tyson Whitehead). + * Disable multiarch-includes; redo biarch-includes to include the paths + for the non-default biarch, when called with -m32/-m64. + * Move new java headers from libstdc++-dev to libgcj-dev, add replaces + line. + * Update classpath patch to work with cairo-0.5.1. Patch provided by + Michael Koch. + * Further classpath updates for gnu.xml and javax.swing.text.html. + Patch provided by Michael Koch. + * Require binutils (>= 2.16.1) as a build dependency and a dependency. + * On i386, require amd64-libs-dev (>= 1.2). + * Update debian/NEWS.{html,gcc}. + + * Closing bug reports reported against older gcc versions (some of them + still present in Debian, but not anymore as the default compiler). + Usually, forwarded bug reports are linked to + http://gcc.gnu.org/PR + The upstream bug number usually can be found in the Debian reports. + + * Closed reports reported against gcc-3.3 and fixed in gcc-3.4: + - General: + + PR rtl-optimization/2960: Duplicate loop conditions even with -Os + Closes: #94701. + + PR optimization/3995: i386 optimisation: joining tests. + Closes: #105309. + + PR rtl-optimization/11635: Unnecessary store onto stack, more + curefully expand union cast (closes: #202016). + + PR target/7618: vararg disallowed in virtual function. Closes: #205404. + + Large array problem on 64 bit platforms (closes: #209152). + + Mark more strings as translatable (closes: #227129). + + PR gcc/14711: ICE when compiling a huge source file Closes: #234711. + + Better code generation for if(!p) return NULL;return p; + Closes: #242318. + + PR rtl-optimization/16152: Perl ftbfs on {ia64,arm,m68k}-linux. + Closes: #255801. + + ICE (segfault) while compiling Linux 2.6.9 (closes: #277206). + + Link error building memtest (closes: #281445). + - Ada: + + PR ada/12450: Constraint error for valid input (closes: #210844). + + PR ada/13620: miscompilation of array initializer with + -O3 -fprofile-arcs. Closes: #226244. + - C: + + PR c/6897: Code produced with -fPIC reserves EBX, but compiles + bad __asm__ anyway (closes: #73065). + + PR c/9209: On i386, gcc-3.0 allows $ in indentifiers but not the asm. + Closes: #121282. + + PR c/11943: Accepts invalid declaration "int x[2, 3];" in C99 mode. + Closes: #177303. + + PR c/11942: restrict keyword broken in C99 mode. Closes: #187091. + + PR other/11370: -Wunreachable-code gives false complaints. + Closes: #196600. + + PR c/11369: Too relaxed checking with -Wstrict-prototypes. + Closes: #197504. + + PR c/11445: False positive warning with -Wunreachable-code. + Closes: #200140. + + PR c/11459: -stdc=c90 -pedantic warns about C90's non long-long + support when in C99 mode. Closes: #200392. + + PR c/456: Handling of constant expressions. Closes: #225935. + + ICE on invalid #define with -traditional (closes: #242916). + + No warning when initializing a variable with itself, new option + -Winit-self (closes: #293957). + - C++: + + C++ parse error (closes: #42946). + + PR libstdc++/9073: Replacement for __STL_ASSERTIONS (libstdc++v3 + debug mode). Closes: #128993. + + Parse errors in nested constructor calls (closes: #138561). + + PR optimization/1823: -ftrapv aborts with pointer difference due to + division optimization. Closes: #169862. + + ICE on invalid code (closes: #176101). + + PR c++/10199: ICE handling method parametrized by template. + Closes: #185604. + + High memory usage building packages OpenOffice.org and MythTV. + Closes: #194345, #194513. + + Improved documentation of std::lower_bound (closes: #196380). + + ICE in regenerate_decl_from_template (closes: #197674). + + PR c++/11444: Function fails to propagate up class tree + (template-related). Closes: #198042. + + ICE when using namespaced typedef of primitive type as struct. + Closes: #198261. + + Bug using streambuf / iostream to read from a named pipe. + Closes: #216105. + + PR c++/11437: ICE in lookup_name_real (closes: #200011). + + Add large file support (LFS) in libstdc++ (closes: #220000). + + PR c++/13621: ICE compiling a statement expression returning type + string (closes: #224413). + + g++ doesn't find inherited inner class after template instantiation. + Closes: #227518. + + PR libstdc++/13928: Add whatis info in man pages generated by doxygen. + Closes: #229642. + + Missing symbol _M_setstate in libstdc++ (closes: #232709). + + Unable to parse declaration of inline constructor explicit + specialization (closes: #234709). + + ICE (segfault) on invalid C++ code (closes: #246031). + + ICE in lookup_tempate_function (closes: #262441). + + Undefined symbols in libstdc++, when using specials char_traits. + Closes: #266110. + + PR libstdc++/16011: Outputting numbers with ostream in the locale fr_BE + causes infinite recursion (closes: #270795). + + ICE in tree_low_cst (closes: #276291). + + ICE in in expand_call (closes: #283503). + + typeof operator is misparsed in a template function (closes: #288555). + + ICE in tree_low_cs (closes: #291374). + + Improve uninformative error messages (closes: #292961, #293076). + + ICE on array initialization (closes: #294560). + + Failure to build xine-lib with -finline-functions (closes: #306854). + - Java: + + Fix error finding files in subdirectories (closes: #195480). + + Implement java.text.CollationElementIterator lacks getOffset(). + Closes: #259789. + - Treelang: + + Pointer truncation on 64bit architectures (closes: #308367). + - Architecture specific: + - alpha + + PR debug/10695: ICE on alpha while building agistudio. + Closes: #192568. + + ICE when building fceu (closes: #228018, #252764). + - amd64 + + Miscompilation of Objective-C code (closes: #250174). + + g++ hangs compiling k3d on amd64 (closes: #285364). + - arm + + PR target/19008: gcc -O3 -fPIC produces wrong code via auto inlining. + Closes: #285238. + - i386 + + PR target/4106: i386 -fPIC asm ebx clobber no error. + Closes: #153472. + + PR target/10984: x86/sse2 ICEs on vector intrinsics. Closes: #166940. + + Wrong code generation on at least ix86 (closes: #275655). + - m68k + + PR target/9201: ICE compiling octave-2.1 (closes: #175478). + + ICE in verify_initial_elim_offsets (closes: #204407, #257012). + + g77 generates invalid assembly code (closes: #225621). + + ICE in verify_local_live_at_start (closes #245584). + - powerpc + + PR optimization/12828: -floop-optimize is unstable on PowerPC (float + to int conversion problem). Closes: #218219. + + PR target/13619: ICE building altivec code in ffmpeg. + Closes: #226148. + + PR target/20046: Miscompilation of bind 9.3.0. Closes: #292958. + - sparc + + ICE (segfault) while building atlas3 on sparc32 (closes: #249108). + + Wrong optimization on sparc32 when building linux kernel. + Closes: #254626. + + * Closed reports reported against gcc-3.3 or gcc-3.4 and fixed in gcc-4.0: + - General: + + PR rtl-optimization/6901: Optimizer improvement (removing unused + local variables). Closes: #67206. + + PR middle-end/179: Failure to detect use of unitialized variable + with -O -Wall. Closes: #117765. + + ICE building glibc's nptl on amd64 (closes: #260710, #307993). + + PR middle-end/17827: ICE in make_decl_rtl. Closes: #270854. + + PR middle-end/21709: ICE on compile-time complex NaN. Closes: #305344. + - Ada: + + PR ada/10889: Convention Fortran matrices mishandled in generics. + Closes: #192135. + + PR ada/13897: Implement tasking on powerpc. Closes: #225346. + - C: + + PR c/13072: Bogus warning with VLA in switch. Closes: #218803. + + PR c/13519: typeof(nonconst+const) is const. Closes: #208981. + + PR c/12867: Incorrect warning message (void format, should be void* + format). Closes: #217360. + + PR c/16066: PR 16066] i386 loop strength reduction bug. + Closes: #254659. + - C++: + + PR c++/13518: -Wnon-virtual-dtor doesn't always work. Closes: #212260. + + PR translation/16025: ICE with unsupported locale(closes: #242158). + + PR c++/15125: -Wformat doesn't warn for different types in fprintf. + Closes: #243507. + + PR c++/15214: Warn only if the dtor is non-private or the class has + friends. (closes: #246639). + + PR libstdc++/17218: Unknown subjects in generated libstdc++ manpages. + Closes: #262934. + + PR libstdc++/17223: Missing .so references in generated libstdc++ + manpages. Closes: #262956. + + libstdc++-doc: Improve man pages (closes: #280910). + + PR c++/19006: ICE in tree_low_cst. Closes: #285692. + + g++ does not check arguments to fprintf. Closes: #281847. + - Java: + + PR java/7304: gcj ICE (closes: #152501). + + PR libgcj/7305: Installation of headers not directly in /usr/include. + Closes: #195483. + + PR libgcj/11941: libgcj timezone handling (closes: #203212). + + PR java/14709: gcj fails to wait for its child processes on exec(). + Closes: #238432. + + PR libgcj/21703: gcj hangs when rapidly calling String.intern(). + Closes: #275547. + + SocketChannel.get(ByteBuffer) returns 0 at EOF. Closes: #281602. + + PR java/19711: gcj segfaults instead of reporting the ambiguous + expression. Closes: #286715. + + Static libgcj contains repeated archive members (closes: #298263). + - Architecture specific: + - alpha + + Unaligned accesses with ?-operator (closes: #301983). + - arm + + Compilation error of glibc-2.3.4 on arm (closes: #298508). + - m68k + + ICE in add_insn_before (closes: #248432). + - mips + + Fix o32 ABI breakage in gcc 3.3/3.4 (closes: #270620). + - powerpc + + ICE in extract_insn (closes: #311128). + + * Closing bug reports as wontfix: + - g++ defines _GNU_SOURCE when using the libstdc++ header files. + Behaviour did change since 3.0. Closes: #126703, #164872. + + -- Matthias Klose Sat, 9 Jul 2005 17:10:54 +0000 + +gcc-4.0 (4.0.0ds2-12) unstable; urgency=high + + * Update to CVS 20050701, taken from the gcc-4_0-branch. + * Apply proposed patch for MMAP configure fix; aka PR 19877. Backport + from mainline. + * Disable Fortran on m68k. Currently FTBFS. + * Split multiarch-include/lib patches. Update multiarch-include patch. + * Fix FTBFS of the hppa64-linux cross compiler. Don't add the + multiarch include dirs when cross compiling. + * Configure --with-java-home, as used by java-gcj-compat. + Closes: #315646. + * Make libgcj-dbg packages priority extra. + * Set the path of classmap.db to /var/lib/gcj-@gcc_version@. + * On m68k, do not create the default classmap.db in the gcj postinst. + See #312830. + * On amd64, install the 32bit libraries into /emul/ia32-linux/usr/lib. + Restore the /usr/lib32 symlink. + * On amd64, don't reference lib64, but instead lib (lib64 is a symlink + to lib). Closes: #293050. + * Remove references to build directories from the .la files. + * Make cpp-X.Y conflict with earlier versions of gcc-X.Y, g++-X.Y, gobjc-X.Y, + gcj-X.Y, gfortran-X.Y, gnat-X.Y, treelang-X.Y, if a path component in + the gcc library path changes (i.e. version or target alias). + * Disable Ada for sh3 sh3eb sh4 sh4eb. + * For gcj-4.0, add a conflict to libgcj4-dev and libgcj5-dev. + Closes: #316499. + + -- Matthias Klose Sat, 2 Jul 2005 11:04:35 +0200 + +gcc-4.0 (4.0.0ds1-11) unstable; urgency=low + + * debian/rules.defs: Disable Ada for alpha. + * debian/rules.conf: Fix typo in type-handling replacement code. + * Don't ship an empty libgcj6-dbg package. + + -- Matthias Klose Thu, 23 Jun 2005 09:03:21 +0200 + +gcc-4.0 (4.0.0ds1-10) unstable; urgency=medium + + * debian/patches/libstdc++-api-compat.dpatch: Apply proposed patch + to fix libstdc++ 3.4.5/4.0 compatibility. + * type-handling output became insane. Don't use it anymore. + * Drop the reference to the stl-manual package (closes: #314983). + * Disable java on GNU/kFreeBSD targets, requested by Robert Millan. + Closes: #315140. + * Terminate the acats-killer process, even if the build is aborted + by the user (closes: #314405). + * debian/rules.defs: Define DEB_TARGET_ARCH_{OS,CPU}. + * Start converting the use of DEB_*_GNU_* to DEB_*_ARCH_* in the build + files. + * Do not configure with --enable-gtk-cairo. Needs newer gtk. Drop + build dependency on libcairo-dev. + * Fix setting of the system header directory for the hurd (Michael Banck). + Closes: #315386. + * Fix FTBFS on hurd-i386: MAXPATHLEN issue (Michael Banck). Closes: #315384. + + -- Matthias Klose Wed, 22 Jun 2005 19:45:50 +0200 + +gcc-4.0 (4.0.0ds1-9ubuntu2) breezy; urgency=low + + * Fix version number in libgcj shlibs file. + + -- Matthias Klose Sun, 19 Jun 2005 10:34:02 +0200 + +gcc-4.0 (4.0.0ds1-9ubuntu1) breezy; urgency=low + + * Update to 4.0.1, release candidate 2. + * libstdc++ shlibs file: Require 4.0.0ds1-9ubuntu1 as minimum version. + * Rename libawt to libgcjawt to avoid conflicts with other + libawt implementations (backport from HEAD). + * Update classpath awt, swing and xml parser for HTML support in swing. + Taken from classpath CVS HEAD 2005-06-18. Patch provided by Michael Koch. + * Remove the libgcj-buffer-strategy path, part of the classpath update. + * libgcj shlibs file: Require 4.0.0ds1-9ubuntu1 as minimum version. + * Require cairo-0.5 as build dependency. + * gij-4.0: Provide java1-runtime. + * gij-4.0: Provide an rmiregistry alternative (using grmiregistry-4.0). + * gcj-4.0: Provide an rmic alternative (using grmic-4.0). + * libgcj6-dev conflicts with libgcj5-dev, libgcj4-dev, not libgcj6. + Closes: #312741. + * libmudflap-entry-point.dpatch: Correct name of entry point on mips/mipsel. + * Apply proposed patch for PR 18421 and PR 18719 (m68k only). + * Apply proposed path for PR 21562. + * Add build dependency on dpkg (>= 1.13.7). + * On linux systems, configure for -linux-gnu. + * Configure the hppa64 cross compiler to target hppa64-linux-gnu. + * (Build-)depend on binutils-2.16.1. + * libstdc{32,64}++6-4.0-dbg: Depend on libstdc++6-4.0-dev. + * gnat-4.0: only depend on libgnat, when a shared libgnat is built. + * gfortran-4.0: Depend on libgmp3c2 | libgmp3. + * On hppa, explicitely use gcc-3.3 as a build dependency in the case + that Ada is disabled. + * libmudflap: Always build the library for the non-default biarch + architecture, or else the test results show link failures. + + -- Matthias Klose Sat, 18 Jun 2005 00:42:55 +0000 + +gcc-4.0 (4.0.0-9) unstable; urgency=low + + * Upload to unstable. + + -- Matthias Klose Wed, 25 May 2005 19:02:20 +0200 + +gcc-4.0 (4.0.0-8ubuntu3) breezy; urgency=low + + * debian/control: Regenerate. + + -- Matthias Klose Sat, 4 Jun 2005 10:56:27 +0200 + +gcc-4.0 (4.0.0-8ubuntu2) breezy; urgency=low + + * Fix powerpc-config-ml patch. + + -- Matthias Klose Fri, 3 Jun 2005 15:47:52 +0200 + +gcc-4.0 (4.0.0-8ubuntu1) breezy; urgency=low + + * powerpc biarch support: + - Enable powerpc biarch support, build lib64gcc1 on powerpc. + - Add patch to disable libstdc++'s configure checking, if it can't run + 64bit binaries on 32bit kernels (Sven Luther). + - Apply the same patch to the other runtime librararies as well. + - Run the testsuite with -m64, if we can execute 64bit binaries. + - Add libc6-dev-ppc64 as build dependency for powerpc. + * 32bit gcj libs for amd64. + * debian/logwatch.sh: Don't remove logwatch pid file on exit (suggested + by Ryan Murray). + * Update to CVS 20050603, taken from the gcc-4_0-branch. + * g++-4.0 provides c++abi2-dev. + * Loosen dependencies on packages of architecture `all' to not break + binary only uploads. + * Build libgfortran for biarch as well, else the testsuite will fail. + + -- Matthias Klose Fri, 3 Jun 2005 13:38:19 +0200 + +gcc-4.0 (4.0.0-8) experimental; urgency=low + + * Synchronize with Ubuntu. + + -- Matthias Klose Mon, 23 May 2005 01:56:28 +0000 + +gcc-4.0 (4.0.0-7ubuntu7) breezy; urgency=low + + * Fix build failures for builds with disabled testsuite. + * Adjust debian/rules conditionals to work with all dpkg versions. + * Build separate lib32stdc6-4.0-dbg/lib64stdc6-4.0-dbg packages. + * Add the debugging symbols of the optimzed libstdc++ build in the + lib*stdc++6-dbg packages as well. + * Build a libgcj6-dbg package. + * Update to CVS 20050522, taken from the gcc-4_0-branch. + * Add Ada support for the ppc64 architecture (Andreas Jochens): + * debian/patches/ppc64-ada.dpatch + - Add gcc/ada/system-linux-ppc64.ads, which has been copied from + gcc/ada/system-linux-ppc.ads and changed to use 'Word_Size' 64 + instead of 32. + - gcc/ada/Makefile.in: Use gcc/ada/system-linux-ppc64.ads on powerpc64. + * debian/rules.patch + - Use ppc64-ada patch on ppc64. + * debian/rules.d/binary-ada.mk + Place the symlinks libgnat.so, libgnat-4.0.so, libgnarl.so, + libgnarl-4.0.so in '/usr/lib' instead of '/adalib'. + Closes: #308948. + * Add libc6-dev-i386 as an alternative build dependency for amd64. + Closes: #305690. + + -- Matthias Klose Sun, 22 May 2005 22:14:20 +0200 + +gcc-4.0 (4.0.0-7ubuntu6) breezy; urgency=low + + * Don't trust dpkg-architecture (1.13.4), it "hurds" ... + + -- Matthias Klose Wed, 18 May 2005 11:36:38 +0200 + +gcc-4.0 (4.0.0-7ubuntu5) breezy; urgency=low + + * libgcj6-dev: Don't provide libgcj-dev. + + -- Matthias Klose Wed, 18 May 2005 00:30:32 +0000 + +gcc-4.0 (4.0.0-7ubuntu4) breezy; urgency=low + + * Update to CVS 20050517, taken from the gcc-4_0-branch. + * Apply proposed patch for PR21293. + + -- Matthias Klose Tue, 17 May 2005 23:05:40 +0000 + +gcc-4.0 (4.0.0-7ubuntu2) breezy; urgency=low + + * Update to CVS 20050515, taken from the gcc-4_0-branch. + + -- Matthias Klose Sun, 15 May 2005 23:48:00 +0200 + +gcc-4.0 (4.0.0-7ubuntu1) breezy; urgency=low + + * Synchronize with Debian. + + -- Matthias Klose Mon, 9 May 2005 19:35:29 +0200 + +gcc-4.0 (4.0.0-7) experimental; urgency=low + + * Update to CVS 20050509, taken from the gcc-4_0-branch. + * Remove the note from the fastjar package description, stating, that + fastjar is incomplete compared to the "standard" jar utility. + * Fix typo in build depends. dpkg-checkbuilddeps doesn't like a comma + inside []. + * Tighten shlibs dependencies to require the current version. + + -- Matthias Klose Mon, 9 May 2005 19:02:03 +0200 + +gcc-4.0 (4.0.0-6) experimental; urgency=low + + * Update to CVS 20050508, taken from the gcc-4_0-branch. + + -- Matthias Klose Sun, 8 May 2005 14:08:28 +0200 + +gcc-4.0 (4.0.0-5ubuntu1) breezy; urgency=low + + * Temporarily disable the i386 biarch build. Remove the amd64-libs-dev + build dependency, add (build-)conflict (<= 1.1ubuntu1). + + -- Matthias Klose Sat, 7 May 2005 16:56:21 +0200 + +gcc-4.0 (4.0.0-5) breezy; urgency=low + + * gnat-3.3 and gnat-4.0 are alternative build dependencies (closes: #308002). + * Update to CVS 20050507, taken from the gcc-4_0-branch. + * gcj-4.0: Install gjnih. + * Add libgcj buffer strategy framework (Thomas Fitzsimmons), needed for OOo2. + Backport from 4.1. + * Fix all lintian errors and most of the warnings. + + -- Matthias Klose Sat, 7 May 2005 12:26:15 +0200 + +gcc-4.0 (4.0.0-4) breezy; urgency=low + + * Still prefer gnat-3.3 over gnat-4.0 as a build dependency. + + -- Matthias Klose Fri, 6 May 2005 22:30:43 +0200 + +gcc-4.0 (4.0.0-3) breezy; urgency=low + + * Update to CVS 20050506, taken from the gcc-4_0-branch. + * Update priority of java alternatives to 40. + * Move gcj-dbtool to gij package, move the default classmap.db to + /var/lib/gcj-4.0/classmap.db. Create it in the postinst. + * Fix gcc-4.0-hppa64 postinst (closes: #307762). + * Fix gcc-4.0-hppa64, gij-4.0 and gcj-4.0 postinst, to not ignore errors + from update-alternatives. + * Fix gcc-4.0-hppa64, fastjar, gij-4.0 and gcj-4.0 prerm, + to not ignore errors from update-alternatives. + + -- Matthias Klose Fri, 6 May 2005 17:50:58 +0200 + +gcc-4.0 (4.0.0-2) experimental; urgency=low + + * GCC 4.0.0 release. + * Update to CVS 20050503, taken from the gcc-4_0-branch. + * Add gnat-4.0 as an alternative build dependency (closes: #305690). + + -- Matthias Klose Tue, 3 May 2005 15:41:26 +0200 + +gcc-4.0 (4.0.0-1) experimental; urgency=low + + * GCC 4.0.0 release. + + -- Matthias Klose Sun, 24 Apr 2005 11:28:42 +0200 + +gcc-4.0 (4.0ds11-0pre11) breezy; urgency=low + + * CVS 20050413, taken from the gcc-4_0-branch. + * Add proposed patches for PR20126, PR20490, PR20929. + + -- Matthias Klose Wed, 13 Apr 2005 09:43:00 +0200 + +gcc-4.0 (4.0ds10-0pre10) experimental; urgency=low + + * gcc-4.0.0-20050410 release candidate 1, built from the prerelease tarball. + - C++ fix for "optimizer breaks function inlining". Closes: #302989. + * Append the GCC version to the fastjar/grepjar version string. + * Use short file names in the libstdc++ docs (closes: #301140). + * Fix libstdc++-dbg dependencies (closes: #303866). + + -- Matthias Klose Mon, 11 Apr 2005 13:16:01 +0200 + +gcc-4.0 (4.0ds9-0pre9) experimental; urgency=low + + * CVS 20050326, taken from the gcc-4_0-branch. + * Reenable Ada on ia64. + * Build libgnat on hppa, sparc, s390 again. + * ppc64 support (Andreas Jochens): + * debian/control.m4 + - Add libc6-dev-powerpc [ppc64] to the Build-Depends. + - Change the Description for lib32gcc1: s/ia32/32 bit Version/ + * debian/rules.defs + - Define 'biarch_ia32' for ppc64 to use the same 32 bit multilib + facilities as amd64. + * debian/rules.d/binary-gcc.mk + - Correct an error in the 'files_gcc' definition for biarch_ia32 + (replace '64' by '32'). + * debian/rules2 + - Do not use '--disable-multilib' on powerpc64-linux. + Use '--disable-nof --disable-softfloat' instead. + * debian/rules.d/binary-libstdcxx.mk + - Put the 32 bit libstdc++ files in '/usr/lib32'. + * debian/rules.patch + - Apply 'ppc64-biarch' patch on ppc64. + * debian/patches/ppc64-biarch.dpatch + - MULTILIB_OSDIRNAMES: Use /lib for native 64 bit libraries and + /lib32 for 32 bit libraries. + - Add multilib handling to src/config-ml.in (taken from + amd64-biarch.dpatch). + * Rename biarch_ia32 to biarch32, as suggsted by Andreas. + * Use /bin/dash on hppa. + * Reenable the build of the hppa64 compiler. + * Enable parallel builds by defaults (set environment variale USE_NJOBS=no + or USE_NJOBS= to modify the default, which is to use the + number of available processors). + + -- Matthias Klose Sat, 26 Mar 2005 19:07:30 +0100 + +gcc-4.0 (4.0ds8-0pre8) experimental; urgency=low + + * CVS 20050322, taken from the gcc-4_0-branch. + - Add proposed fix for PR19406. + * Configure --with-gtk-cairo only if version 0.3.0 is found. + * Split out gcc-4.0-locales package. Better chance of getting + bug reports in english language. + + -- Matthias Klose Tue, 22 Mar 2005 14:20:24 +0100 + +gcc-4.0 (4.0ds7-0pre7) experimental; urgency=low + + * CVS 20050304, taken from the gcc-4_0-branch. + * Build the treelang compiler. + + -- Matthias Klose Fri, 4 Mar 2005 21:29:56 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu6) hoary; urgency=low + + * Fix lib32gcc1 symlink on amd64. Ubuntu #7099. + + -- Matthias Klose Thu, 3 Mar 2005 00:17:26 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu5) hoary; urgency=low + + * Add patch from PR20160, avoid creating archives with components + that have duplicate basenames. + + -- Matthias Klose Wed, 2 Mar 2005 14:22:04 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu4) hoary; urgency=low + + * CVS 20050301, taken from the gcc-4_0-branch. + Test builds on i386, amd64, powerpc, ia64, check libgcc_s.so.1. + * Add fastjar-4.0 binary and manpage. Some java packages append it + for all java related tools. + * Add libgcj6-src package for source code availability in IDE's. + * On hppa, disable the build of the hppa64 cross compiler, disable + java, disable running the testsuite (request by Lamont). + * On amd64, lib32gcc1 replaces ia32-libs.openoffice.org (<< 1ubuntu3). + * Build-Depend on libcairo1-dev, configure with --enable-gtk-cairo. + Work around libtool problems install libjawt. + Install jawt header files in libgcj6-dev. + * Add workaround for PR debug/19769. + + -- Matthias Klose Tue, 1 Mar 2005 11:26:19 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu3) hoary; urgency=low + + * Drop libgmp3-dev (<< 4.1.4-3) as an alterntative build dependency. + + -- Matthias Klose Thu, 10 Feb 2005 15:16:27 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu2) hoary; urgency=low + + * Disable Ada for powerpc. + + -- Matthias Klose Wed, 9 Feb 2005 16:47:07 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu1) hoary; urgency=low + + * Avoid build dependency on type-handling. + * Install 32bit libs on amd64 in /lib32 and /usr/lib32. + + -- Matthias Klose Wed, 9 Feb 2005 08:27:21 +0100 + +gcc-4.0 (4.0ds5-0pre6) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050208. + * Build-depend on graphviz (moved to main), remove the pregenerated + libstdc++ docs from the diff. + * Fix PR19162, libobjc build failure on arm-linux (closes: #291497). + + -- Matthias Klose Tue, 8 Feb 2005 11:47:31 +0000 + +gcc-4.0 (4.0ds4-0pre5) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050125. + * Call the 4.0 gcx versions in the java wrappers (closes: #291075). + * Correctly install libgij (closes: #291077). + * libgcj6-dev: Add conflicts to other libgcj-dev packages (closes: #290950). + + -- Matthias Klose Mon, 24 Jan 2005 23:59:54 +0100 + +gcc-4.0 (4.0ds3-0pre4) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050115. + * Update cross build patches (Nikita V. Youshchenko). + * Enable Ada on i386, amd64, mips, mipsel, powerpc, sparc, s390. + Doesn't yet bootstrap on alpha, hppa, ia64. + + -- Matthias Klose Sat, 15 Jan 2005 18:44:03 +0100 + +gcc-4.0 (4.0ds2-0pre3) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041224. + + -- Matthias Klose Wed, 22 Dec 2004 00:31:44 +0100 + +gcc-4.0 (4.0ds1-0pre2) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041205. + * Lot's of merges and updates from the gcc-3.4 packages. + + -- Matthias Klose Sat, 04 Dec 2004 12:14:51 +0100 + +gcc-4.0 (4.0ds0-0pre1) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041114. + - Addresses many issues with the libstdc++ man pages (closes: #278549). + * Disable Ada on hppa, ia64, mips, mipsel, powerpc, s390 and sparc, at least + these are known to be broken at the time of the snapshot. + * Minor kbsd.gnu build fixes (Robert Millan). Closes: #273004. + * For amd64, add missing libstdc++ files to 'libstdc++6-dev' package. + (Andreas Jochens). Fixes: #274362. + * Update libffi-mips patch (closes: #274096). + * Updated i386-biarch patch. Don't build 64bit libstdc++, ICE. + * Update sparc biarch patch. + * Fix symlinks for gfortran manpage (closes: #278548). + * Update cross build patches (Nikita V. Youshchenko). + * Update Ada patches (Ludovic Brenta). + + -- Matthias Klose Sat, 13 Nov 2004 10:38:25 +0100 + +gcc-4.0 (4.0-0pre0) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20040912. + + * Matthias Klose + + - Integrate accumulated packaging patches from gcc-3.4. + - Rename libstdc++6-* packages to libstdc++6-4-* (closes: #261693). + - libffi4-dev: conflict with libffi3-dev (closes: #265939). + + * Robert Millan + + * control.m4: + - s/locale_no_archs !hurd-i386/locale_no_archs/g + (This is now handled in rules.defs. [1]) + - s/procps [check_no_archs]/procps [linux_gnu_archs]/g [2] + - Add type-handling to build-deps. [3] + * rules.conf: + - Don't require (>= $(libc_ver)) for libc0.1-dev. [4] + - Generate *_no_archs variables with type-handling and use them for + for m4's -D parameters. [3] + * rules.defs: + - use filter instead of findstring [1]. + - s/netbsd-elf-gnu/netbsdelf-gnu/g [5]. + - enable java for kfreebsd-gnu [6] + - enable ffi for kfreebsd-gnu and knetbsd-gnu [6] + - enable libgc for kfreebsd-gnu [6] + - enable checks for kfreebsd-gnu and knetbsd-gnu [7] + - enable locales for kfreebsd-gnu and gnu [1] [8]. + * Closes: #264025. + + -- Matthias Klose Sun, 12 Sep 2004 12:52:56 +0200 + +gcc-3.5 (3.5ds1-0pre1) experimental; urgency=low + + * gcc-3.5 snapshot, taken from the HEAD branch CVS 20040724. + * Install locale data with versioned package name (closes: #260497). + * Fix libgnat symlinks. + + -- Matthias Klose Sat, 24 Jul 2004 21:26:23 +0200 + +gcc-3.5 (3.5-0pre0) experimental; urgency=low + + * gcc-3.5 snapshot, taken from the HEAD branch CVS 20040718. + + -- Matthias Klose Sun, 18 Jul 2004 12:26:00 +0200 + +gcc-3.4 (3.4.1-1) experimental; urgency=low + + * gcc-3.4.1 final release. + - configured wth --enable-libstdcxx-allocator=mt. + * Fixes for generating cross compiler packages (Jeff Bailey). + + -- Matthias Klose Fri, 2 Jul 2004 22:49:05 +0200 + +gcc-3.4 (3.4.0-4) experimental; urgency=low + + * gcc-3.4.1 release candidate 1. + * Add logic to build biarch compiler on powerpc (disabled, needs lib64c). + * Don't build the libg2c0 package on mipsel-linux (no clear answer on + debian-mips, if the libg2c0's built by gcc-3.3 and gcc-3.4 are compatible + (post-sarge issue). + * Don't use gcc-2.95 as bootstrap compiler on m68k anymore. + + -- Matthias Klose Sat, 26 Jun 2004 22:40:20 +0200 + +gcc-3.4 (3.4.0-3) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040613. + * On sparc, set the the build target to sparc64-linux, build with + switch defaulting to code generation for v7. To generate code for + sparc64, use the -m64 switch. + * Add missing doc-base files to -doc packages. + * Add portability patches and kbsd-gnu patch (Robert Millan). + Closes: #251293, #251294. + * Apply fixes for cross build (Nikita V. Youshchenko). + * Do not include the precompiled libstdc++ header files into the -dev + package (still experimental). Closes: #251707. + * Reflect renaming of Ada user's guide. + * Move AWT peer libraries for libgcj into it's own package (fixes: #247791). + + -- Matthias Klose Mon, 14 Jun 2004 00:03:18 +0200 + +gcc-3.4 (3.4.0-2) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040516. + * Do not provide the /usr/hppa64-linux/include in the gcc-hppa64 package, + migrated to libc6-dev. Adjust dependencies. + * Integrate gpc test results into the GCC test summary. + * gnatchop calls gcc-3.4 (closes: #245438). + * debian/locale-gen.sh: Update for recent libstdc+++ testsuite. + * debian/copyright: Add libstdc++-v3's exception clause. + * Add libffi update for mips (Thiemo Seufer). + * Reference Debian specific bug reporting instructions. + * Update README.Bugs. + * Fix FTBFS for libstdc++-doc. + * Update libjava patch for hppa (Randolph Chung). + * Fix installation of ffitarget.h header file. + * On amd64-linux, configure --without-multilib, disable Ada. + + -- Matthias Klose Sun, 16 May 2004 07:53:39 +0200 + +gcc-3.4 (3.4.0-1) experimental; urgency=low + + * gcc-3.4.0 final release. + + * Why experimental? + - Do not interfer with packages currently built from gcc-3.3 sources, + i.e. libgcc1, libobjc1, libffi2, libffi2-dev, libg2c0. + - Biarch sparc compiler doesn't built yet. + - Use of configure flags affecting binary ABI's not yet determined. + - Several ABI bugs have been fixed. Unfortunately, these changes will break + binary compatibility with earlier releases on several architectures: + alpha, mips, sparc, + - hppa and m68k changed sjlj based exception handling to dwarf2 based + exception handling. + + See NEWS.html or http://gcc.gnu.org/gcc-3.4/changes.html for more + specific information. + + -- Matthias Klose Tue, 20 Apr 2004 20:54:56 +0200 + +gcc-3.4 (3.4ds3-0pre4) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040403. + * Add gpc tarball, gpc patches for 3.4 (Waldek Hebisch). + * Reenable sparc-biarch patches (closes: #239856). + * Build the shared libgnat library, needed to fix FTBFS for some + Ada library packages (Ludovic Brenta). + Currently enabled for hppa, i386, ia64. + + -- Matthias Klose Sat, 3 Apr 2004 08:47:55 +0200 + +gcc-3.4 (3.4ds1-0pre2) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040320. + * For libstdc++6-doc, add a conflict to libstdc++5-3.3-doc (closes: #236560). + * For libstdc++6-dbg, add a conflict to libstdc++5-3.3-dbg (closes: #236798). + * Reenable s390-biarch patches. + * Update the cross compiler build files (Nikita V. Youshchenko). + + -- Matthias Klose Sat, 20 Mar 2004 09:15:10 +0100 + +gcc-3.4 (3.4ds0-0pre1) experimental; urgency=low + + * Start gcc-3.4 packaging, get rid of the epoch for most of the + packages. + + -- Matthias Klose Sun, 22 Feb 2004 16:00:03 +0100 + +gcc-3.3 (1:3.3.3ds6-6) unstable; urgency=medium + + * Update to gcc-3_3-branch CVS 20040401. + - Fixed ICE in emit_move_insn_1 on legal code (closed: #223215). + - Fix PR 14755, miscompilation of loops with bitfield counter. + Closes: #241255. + - Fix PR 16040, crash in function initializing const data with + reinterpret_cast-ed pointer-to-member function crashes (closes: #238621). + - Remove patches integrated upstream. + * Reenable build of gpidump on powerpc and s390. + + -- Matthias Klose Thu, 1 Apr 2004 23:51:54 +0200 + +gcc-3.3 (1:3.3.3ds6-5) unstable; urgency=medium + + * Update to gcc-3_3-branch CVS 20040321. + - Fix PR target/13889 (ICE on valid code on m68k). + * Fix FTFBS on s390. Do not build gpc's gpidump on s390. + * Reenable gpc on arm. + + -- Matthias Klose Mon, 22 Mar 2004 07:37:26 +0100 + +gcc-3.3 (1:3.3.3ds6-4) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040320. + - Revert patch for PR14640 (with this, at least mozilla-firefox was + miscompiled on x86 (closes: #238621). + * Update the gpc tarball (there were two releases with the same name ...). + * Reenable gpc on alpha and ia64. + + -- Matthias Klose Sat, 20 Mar 2004 07:39:24 +0100 + +gcc-3.3 (1:3.3.3ds5-3) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040314. + - Fixes miscompilation with -O -funroll-loops on powerpc (closes: #229567). + - Fix ICE in dwarf-2 on code using altivec (closes: #203835). + * Update hurd-changes patch. + * Add libgcj4-dev as a recommendation for gcj (closes: #236547). + * debian/copyright: Added exemption to static linking of libgcc. + + * Phil Blundell: + - debian/patches/arm-ldm.dpatch, debian/patches/arm-gotoff.dpatch: Update. + + -- Matthias Klose Sun, 14 Mar 2004 09:56:06 +0100 + +gcc-3.3 (1:3.3.3ds5-2) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040306. + - Fixes bootstrap comparision error on ia64. + - Allows ghc build with gcc-3.3. + - On amd64, don't imply 3DNow! for -m64 by default. + - Some arm specific changes + - Fix C++/13944: exception in constructor of a class to be thrown is not + caught. Closes: #228099. + * Enable the build of gcc-3.3-hppa64 on hppa. + Add symlinks for as and ld to point to hppa64-linux-{as,ld}. + * gcj-3.3 depends on g++-3.3, recommends gij-3.3. gij-3.3 suggests gcj-3.3. + * Fix libgc2c-pic compatibility links (closes: #234333). + The link will be removed for gcc-3.4. + * g77-3.3: Conflict with other g77-x.y packages. + * Tighten shlibs dependencies to latest released versions. + + * Phil Blundell: + - debian/patches/arm-233633.dpatch: New Fixes problems with half-word + loads on ARMv3 architecture. (Closes: #233633) + - debian/patches/arm-ldm.dpatch: New. Avoids inefficient epilogue for + leaf functions in PIC code on ARM. + + -- Matthias Klose Sat, 6 Mar 2004 10:57:14 +0100 + +gcc-3.3 (1:3.3.3ds5-1) unstable; urgency=medium + + * gcc-3.3.3 final release. + See /usr/share/doc/gcc-3.3/NEWS.{gcc,html}. + + -- Matthias Klose Mon, 16 Feb 2004 08:59:52 +0100 + +gcc-3.3 (1:3.3.3ds4-0pre4) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20040214 (2nd gcc-3.3.3 prerelease). + * Fix title of libstdc++'s html main index (closes: #196381). + * Move libg2c libraray files out of the gcc specific libdir to /usr/lib. + For g77-3.3 add conflicts to other g77 packages. Closes: #224848. + * Update the stack protector patch to 3.3-7, but don't apply it by default. + Closes: #230338. + * On arm, use arm6 as the cpu default (backport from mainline, PR12527). + * Add libffi and libjava support for hppa (Randolph Chung). Closes: #232615. + + -- Matthias Klose Sat, 14 Feb 2004 09:26:15 +0100 + +gcc-3.3 (1:3.3.3ds3-0pre3) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20040125. + - Fixed PR11350, undefined labels with -Os -fPIC (closes: #195911). + - Fixed PR11793, ICE in extract_insn, at recog.c (closes: #203835). + - Fixed PR13544, removed backport for PR12862. + - Integrated backport for PR12441. + * Fixed since 3.3: java: not implemented interface methods of abstract + classes not found (closes: #225438). + * Disable pascal on arm architecture (currently broken). + * Update the build files to build a cross compiler (Nikita V. Youshchenko). + See debian/README.cross in the source package. + * Apply revised patch to make -mieee the default on alpha-linux, + and add -mieee-disable switch to turn the default off (closes: #212912). + (Tyson Whitehead) + + -- Matthias Klose Sun, 25 Jan 2004 17:41:04 +0100 + +gcc-3.3 (1:3.3.3ds2-0pre2) unstable; urgency=medium + + * Update to gcc-3.3.3 CVS 20040110. + - Fixes compilation not terminating at -O1 on hppa (closes: #207516). + * Add backport to fix PR12441 (closes: #224576). + * Revert backport to 3.3 branch to fix PR12862, which introduced another + regression (PR13544). Closes: #225663. + * Tighten dependency of gnat-3.3 on gcc-3.3 (closes: #226273). + * Disable treelang build for cross compiler build. + * Disable pascal on alpha and ia64 architectures (currently broken). + + -- Matthias Klose Sat, 10 Jan 2004 12:33:59 +0100 + +gcc-3.3 (1:3.3.3ds1-0pre1) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20031229. + - Fixes bootstrap error on ia64-linux. + - Fix -pthread on mips{,el}-linux (closes: #224875). + - Fix -Wformat for C++ (closes: #217075). + * Backport from mainline: Preserve inline-ness when redeclaring + a function template (closes: #195264). + * Add missing intrinsics headers on ix86 (closes: #224593). + * Fix location of libg2c libdir in libg2c.la file (closes: #224848). + + -- Matthias Klose Mon, 29 Dec 2003 10:36:29 +0100 + +gcc-3.3 (1:3.3.3ds0-0pre0.1) unstable; urgency=high + + * NMU + * Fixed mips(el) spec file for -pthread: (Closes: #224875) + * [debian/patches/mips-pthread.dpatch] New. + * [debian/rules.patch] Added it to debian_patches. + + -- J.H.M. Dassen (Ray) Sat, 27 Dec 2003 15:51:47 +0100 + +gcc-3.3 (1:3.3.3ds0-0pre0) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20031206. + - Fixes ICE in verify_local_live_at_start (hppa). Closes: #201550. + - Fixes miscompilation of linux-2.6/sound/core/oss/rate.c. + Closes: #219949. + * Add missing unwind.h to gcc package (closes: #220846). + * Regenerate control file to fix build dependencies for m68k. + * More gpc only patches to fix test failures on m68k. + * Reenable gpc for the Hurd (closes: #189851). + + -- Matthias Klose Sat, 6 Dec 2003 10:29:07 +0100 + +gcc-3.3 (1:3.3.2ds5-4) unstable; urgency=low + + * Update libffi-dev package description (closes: #219508). + * For gij and libgcj fix dependency on the libstdc++ package, if + the latter isn't installed during the build. + * Apply patch to emit .note.GNU-stack section on linux arches + which by default need executable stack. + * Prefer gnat-3.3 over gnat-3.2 as a build dependency. + * Update the pascal tarball (different version released with the + same name). + * Add pascal patches to address various gpc testsuite failures. + On alpha and ia64, build gpc from the 20030830 version. Reenable + the build on m68k. + Remove the 20030507 gpc version from the tarball. + * Apply patch to build the shared ada libs and link the ada tools + against the shared libs. Not enabled by default, because gnat + and gnatlib are rebuilt during install. (Ludovic Brenta) + + -- Matthias Klose Sun, 9 Nov 2003 22:34:33 +0100 + +gcc-3.3 (1:3.3.2ds4-3) unstable; urgency=low + + * Fix rules to omit inclusion of gnatpsta in mips(el) gnat package. + + -- Matthias Klose Sun, 2 Nov 2003 14:29:59 +0100 + +gcc-3.3 (1:3.3.2ds4-2) unstable; urgency=medium + + * s390-ifcvt patch added. Fixes gcl miscompilation (closes: #217240). + (Gerhard Tonn) + * Fix an infinite loop in g++ compiling lufs, regression from 3.3.1. + * Fix a wrong code generation bug on alpha. + (Falk Hueffner) + * Update NEWS files. + * Add Falk Hueffner to the Debian GCC maintainers. + * Enable ada on mips and mipsel, but don't build the gnatpsta tool. + + -- Matthias Klose Wed, 29 Oct 2003 00:12:37 +0100 + +gcc-3.3 (1:3.3.2ds4-1) unstable; urgency=medium + + * Update to gcc-3.3.2. + * Update NEWS files. + * Miscompilation in the pari package at -O3 fixed (closes: #198172). + * On alpha-linux, revert -mieee as the default (Falk Hueffner). + Reopens: #212912. + * Add ia64-unwind patch (Jeff Bailey). + * Closed reports reported against gcc-2.96 (ia64), fixed at least in gcc-3.3: + - ICE in verify_local_live_at_start, at flow.c:2733 (closes: #135404). + - Compilation failure of stlport (closes: #135224). + - Infinite loop compiling cssc's pfile.cc with -O2 (closes: #115390). + - Added missing some string::compare() members (closes: #141199). + - header declares std::pow (closes: #161853). + - does have at() method (closes: #59776). + - Fixed error in stl_deque.h (closes: #69530). + - Fixed problem with bastring (closes: #75759, #96539). + - bad_alloc and std:: namespace problem (closes: #75120). + - Excessive warnings from headers with -Weffc++ (closes: #76827). + + -- Matthias Klose Fri, 17 Oct 2003 08:07:01 +0200 + +gcc-3.3 (1:3.3.2ds3-0pre5) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20031005. + - Fixes cpp inserting a spurious newline (closes: #210478, #210482). + - Fixes generation of unrecognizable insn compiling kernel source + on alpha (closes: #202762). + - Fixes ICE in add_abstract_origin_attribute (closes: #212406). + - Fixes forward declaration in libstdc++ (closes: #209386). + - Fixes ICE in in extract_insn, at recog.c on alpha (closes: #207564). + * Make libgcj-common architecture all (closes: #211909). + * Build depend on: flex-old | flex (<< 2.5.31). + * Fix spec linking libraries with -pthread on powerpc (closes: #211054). + * debian/patches/arm-gotoff.dpatch: fix two kinds of PIC lossage. + (Phil Blundell) + * debian/patches/arm-common.dpatch: fix excessive alignment of common + blocks causing binutils testsuite failures. + (Phil Blundell) + * Update priorities in debian/control to match the archive. + (Ryan Murray) + * s390-nonlocal-goto patch added. Fixes some pascal testcase failures. + (Gerhard Tonn) + * On alpha-linux, make -mieee default and add -mieee-disable switch + to turn default off (closes: #212912). + (Tyson Whitehead) + * Add gpc upstream patch for memory corruption fix. + + -- Matthias Klose Sun, 5 Oct 2003 19:53:49 +0200 + +gcc-3.3 (1:3.3.2ds2-0pre4) unstable; urgency=low + + * Add gcc-unsharing_lhs patch (closes: #210848) + + -- Ryan Murray Fri, 19 Sep 2003 22:51:19 -0600 + +gcc-3.3 (1:3.3.2ds2-0pre3) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20030908. + * PR11716 (Michael Eager, Dan Jacobowitz): + Make GCC think that the maximum length of a short branch is + 64K instead of 128K. It's a big hammer, but it works. + Closes: #207915. + * Downgrade gpc to 20030507 on alpha and ia64 (closes: #208717). + + -- Matthias Klose Mon, 8 Sep 2003 21:49:52 +0200 + +gcc-3.3 (1:3.3.2ds1-0pre2) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20030831. + - Fix java NullPointerException detection with 2.6 kernels. + Closes: #206377. + - Fix bug in C++ typedef handling (closes: #205402). + - Fix -Wunreachable-code giving false complaints (closes: #196600). + * Update to gpc-20030830. + * Don't include /usr/share/java/repository into the class path according + to the new version of th Debian Java policy (closes: #205643). + * Build-Depend/Depend on libgc-dev. + + -- Matthias Klose Sun, 31 Aug 2003 08:56:53 +0200 + +gcc-3.3 (1:3.3.2ds0-0pre1) unstable; urgency=low + + * Remove the build dependency on locales for now. + + -- Matthias Klose Fri, 15 Aug 2003 07:48:18 +0200 + +gcc-3.3 (1:3.3.2ds0-0pre0) unstable; urgency=medium + + * Update to gcc-3.3.2 CVS 20030812. + - Fixes generation of wrong code for XDM-AUTHORIZATION-1 key generation + and/or validation. Closes: #196090. + * Update NEWS files. + * Change ix86 default CPU type for code generation: + - i386-linux -> i486-linux + - i386-gnu -> i586-gnu + - i386-freebsd-gnu -> i486-freebsd-gnu + Use -march=i386 to target i386 CPUs. + + -- Matthias Klose Tue, 12 Aug 2003 10:31:28 +0200 + +gcc-3.3 (1:3.3.1ds3-1) unstable; urgency=low + + * gcc-3.3.1 (taken from CVS 20030805). + - C++: Fix declaration conflicts (closes: #203351). + - Fix ICE on ia64 (closes: #203840). + + -- Matthias Klose Tue, 5 Aug 2003 20:38:02 +0200 + +gcc-3.3 (1:3.3.1ds2-0rc2) unstable; urgency=low + + * Update to gcc-3.3.1 CVS 20030728. + - Fix ICE in extract_insn, at recog.c:2148 on m68k. + Closes: #177840, #180375, #190818. + - Fix ICE while building libquicktime on alpha (closes: #192576). + - Fix failure to deal with using and private inheritance (closes: #202696). + * On sparc, /usr/lib was added to the library search path. Fix it. + * Closed reports reported against gcc-3.2.x and fixed in gcc-3.3: + - Fix error building the gcl package on arm (closes: #199835). + + -- Matthias Klose Mon, 28 Jul 2003 20:39:07 +0200 + +gcc-3.3 (1:3.3.1ds1-0rc1) unstable; urgency=low + + * Update to gcc-3.3.1 CVS 20030722 (3.3.1 release candidate 1). + - Fix ICE in copy_to_mode_reg on 64-bit targets (closes: #189365). + - Remove documentation about multi-line strings (closes: #194391). + - Correctly document -falign-* parameters (closes: #198269). + - out-of-class specialization of a private nested template class. + Closes: #193830. + - Tighten shlibs dependency due to new symbols in libgcc. + * README.Debian for libg2c0, describing the need for g77-x.y when + working with the g2c header and library (closes: #189059). + * Call make with -j, if USE_NJOBS is set and non-empty + in the environment. + * Add another two m68k patches, partly replacing the workarounds provided + by Roman Zippel. + * Add the stack protector patch, but don't apply it by default. Edit + debian/rules.patch to apply it (closes: #171699, #189494). + * Remove wrong symlinks from gnat package (closes: #201882). + * Closed reports reported against gcc-2.95 and fixed in newer versions: + - SMP kernel compilation on alpha (closes: #134197, #146883). + - ICE on arm while building imagemagick (closes: #173475). + * Closed reports reported against gcc-3.2.x and fixed in gcc-3.3: + - Miscompilation of octave2.1 on hppa (closes: #192296, #193804). + + -- Matthias Klose Sun, 13 Jul 2003 10:26:30 +0200 + +gcc-3.3 (1:3.3.1ds0-0pre0) unstable; urgency=medium + + * Update to gcc-3.3.1 CVS 20030626. + - Fix ICE on arm compiling xfree86 (closes: #195424). + - Fix ICE on arm compiling fftw (closes: #186185). + - Fix ICE on arm in change_address_1, affecting a few packages. + Closes: #197099. + - Fix ICE in merge_assigned_reloads building Linux 2.4.2x sched.c. + Closes: #195237. + - Do not warn about failing to inline functions declared in system headers. + Closes: #193049. + - Fix ICE on mips{,el} in propagate_one_insn (closes: #194330, #196091). + - Fix ICE on m68k in reg_overlap_mentioned_p (closes: #194749). + - Build crtbeginT.o on m68k (closes: #197613). + * Fix g++ man page symlink (closes: #196271). + * mips/mipsel: Depend on binutils (>= 2.14.90.0.4). Closes: #196744. + * Disable treelang on powerpc (again). Closes: #196915. + * Pass -encoding in gcj-wrapper. + + -- Matthias Klose Fri, 27 Jun 2003 00:14:43 +0200 + +gcc-3.3 (1:3.3ds9-3) unstable; urgency=low + + * Closing more reports, fixed in 3.2/3.3: + - ICE building texmacs on m68k (closes: #177433). + - libstdc++: doesn't define trunc(...) (closes: #105285). + - libstdc++: setw is ignored for strings output (closes: #52382, #76645). + * Add build support to omit the manual pages and info docs from the + packages, disabled by default. Wait for a Debian statement, which can + be cited. Adresses: #193787. + * Reenable the m68k-const patch, don't run the g77 testsuite on m68k. + Addresses ICEs (#177840, #190818). + * Update arm-xscale patch. + * libstdc++: use __attribute__(__unknown__), instead of (unknown). + Closes: #195796. + * Build-Depend on glibc (>= 2.3.1) to prevent incorrect builds on woody. + Request from Adrian Bunk. + * Add treelang-update patch (Tim Josling), reenable treelang on powerpc. + * Add -{cpp,gcc,g++,gcj,g77} symlinks (addresses: #189466). + * Make sure not to build using binutils-2.14.90.0.[12]. + + -- Matthias Klose Mon, 2 Jun 2003 22:35:45 +0200 + +gcc-3.3 (1:3.3ds9-2) unstable; urgency=medium + + * Correct autoconf-related snafu in newly added ARM patches (Phil Blundell). + * Correct libgcc1 dependency (closes: #193689). + * Work around ldd/dpkg-shlibs failure on s390x. + + -- Matthias Klose Sun, 18 May 2003 09:40:15 +0200 + +gcc-3.3 (1:3.3ds9-1) unstable; urgency=low + + * gcc-3.3 final release. + See /usr/share/doc/gcc-3.3/NEWS.{gcc,html}. + * First merge of i386/x86-64 biarch support (Arnd Bergmann). + Disabled by default. Closes: #190066. + * New gpc-20030507 version. + * Upstream gpc update to fix netbsd build failure (closes: #191407). + * Add arm-xscale.dpatch, arm-10730.dpatch, arm-tune.dpatch, copied + from gcc-3.2 (Phil Blundell). + * Closing bug reports reported against older gcc versions (some of them + still present in Debian, but not anymore as the default compiler). + Usually, forwarded bug reports are linked to + http://gcc.gnu.org/PR + The upstream bug number usually can be found in the Debian reports. + + * Closed reports reported against gcc-3.1.x, gcc-3.2.x and fixed in gcc-3.3: + - General: + + GCC accepts multi-line strings without \ or " " &c (closes: #2910). + + -print-file-name sometimes fails (closes: #161615). + + ICE: reporting routines re-entered (closes: #179597, #180937). + + Misplaced paragraph in gcc documentation (closes: #179363). + + Error: suffix or operands invalid for `div' (closes: #150558). + + builtin memcmp() could be optimised (closes: #85535). + - Ada: + + Preelaborate, exceptions, and -gnatN (closes: #181679). + - C: + + Duplicate loop conditions even with -Os (closes: #94701). + + ICE (signal 11) (closes: #65686). + - C++: + + C++ error on virtual function which uses ... (closes: #165829). + + ICE when warning about cleanup nastiness in switch statements + (closes: #184108). + + Fails to compile virtual inheritance with variable number of + argument method (closes: #151357). + + xmmintrin.h broken for c++ (closes: #168310). + + Stack corruption with variable-length automatic arrays and virtual + destructors (closes: #188527). + + ICE on illegal code (closes: #184862). + + _attribute__((unused)) is ignored in C++ (closes: #45440). + + g++ handles &(void *)foo bizzarely (closes: #79225). + + ICE (with wrong code, though) (closes: #81122). + - Java: + + Broken zip file handling (closes: #180567). + - ObjC: + + @protocol forward definitions do not work (closes: #80468). + - Architecture specific: + - alpha + + va_start is off by one (closes: #186139). + + ICE while building kseg/ddd (closes: #184753). + + g++ -O2 optimization error (closes: #70743). + - arm + + ICE with -O2 in change_address_1 (closes: #180750). + + gcc optimization error with -O2, affecting bison (closes: #185903). + - hppa + + ICE in insn_default_length (closes: #186447). + - ia64 + + gcc-3.2 fails w/ optimization (closes: #178830). + - i386 + + unnecessary generation of instruction cwtl (closes: #95318). + + {athlon} ICE building mplayer (closes: #184800). + + {pentium4} ICE while compiling mozilla with -march=pentium4 + (closes: #187910). + + i386 optimisation: joining tests (closes: #105309). + - m68k + + ICE in instantiate_virtual_regs_1 (closes: #180493). + + gcc optimizer bug on m68k (closes: #64832). + - powerpc + + ICE in extract_insn, at recog.c:2175 building php3 (closes: #186299). + + ICE with -O -Wunreachable-code (closes: #189702). + - s390 + + Operand out of range at assembly time when using -O2 + (closes: #178596). + - sparc + + gcc-3.2 regression (wrong code) (closes: #176387). + + ICE in mem_loc_descriptor when optimizing (closes: #178909). + + ICE in gen_reg_rtx when optimizing (closes: #178965). + + Optimisation leads to unaligned access in memcpy (closes: #136659). + + * Closed reports reported against gcc-3.0 and fixed in gcc-3.2.x: + - General: + + Use mkstemp instead of mktemp (closed: #127802). + - Preprocessor: + + Fix redundant error message from cpp (closed: #100722). + - C: + + Optimization issue on ix86 (pointless moving) (closed: #97904). + + Miscompilation of allegro on ix86 (closed: #105741). + + Fix generation of ..ng references for static aliases (alpha-linux). + (closed: #108036). + + ICE compiling pari on hppa (closed: #111613). + + ICE on ia64 in instantiate_virtual_regs_1 (closed: #121668). + + ICE in c-typeck.c (closed: #123687). + + ICE in gen_subprogram_die on alpha (closed: #127890). + + SEGV in initialization of flexible char array member (closed: #131399). + + ICE on arm compiling lapack (closed: #135967). + + ICE in incomplete_type_error (closed: #140606). + + Fix -Wswitch (also part of -Wall) (closed: #140995). + + Wrong code in mke2fs on hppa (closed: #150232). + + sin(a) * sin(b) gives wrong result (closed: #164135). + - C++: + + Error in std library headers on arm (closed: #107633). + + ICE nr. 19970302 (closed: #119635). + + std::wcout does not perform encoding conversions (closed: #128026). + + SEGV, when compiling iostream.h with -fPIC (closed: #134315). + + Fixed segmentation fault in included code for (closed: #137017). + + Fix with exception handling and -O (closed: #144232). + + Fix octave-2.1 build failure on ia64 (closed: #144584). + + nonstandard overloads in num_get facet (closed: #155900). + + ICE in expand_end_loop with -O (closed: #158371). + - Fortran: + + Fix blas build failure on arm (closed: #137959). + - Java: + + Interface members are public by default (closed: #94974). + + Strange message with -fno-bounds-check in combination with -W. + (closed: #102353). + + Crash in FileWriter using IOException (closed: #116128). + + Fix ObjectInputStream.readObject() calling constructors. + (closed: #121636). + + gij: better error reporting on `class not found' (closed: #125649). + + Lockup during .java->.class compilation (closed: #141899). + + Compile breaks using temporary inner class instance (closed: #141900). + + Default constructor for inner class causes broken bytecode. + (closed: #141902). + + gij-3.2 linked against libgcc1 (closed: #165180). + + gij-wrapper understands -classpath parameter (closed: #146634). + + gij-3.2 doesn't ignore -jar when run as "java" (closed: #167673). + - ObjC: + + ICE on alpha (closed: #172353). + + * Closed reports reported against gcc-2.95 and fixed in newer versions: + - General: + + Undocumented option -pthread (closes: #165110). + + stdbool.h broken (closes: #167439). + + regparm/profiling breakage (closes: #20695). + + another gcc optimization error (closes: #51456). + + ICE in `output_fix_trunc' (closes: #55967). + + Fix "Unable to generate reloads for" (closes: #58219, #131890). + + gcc -c -MD x/y.c -o x/y.o leaves y.d in cwd (closes: #59232). + + Compiler error with -O2 (closes: #67631). + + ICE (unrecognizable insn) compiling php4 (closes: #83550, #84969). + + Another ICE (closes: #90666). + + man versus info inconsistency (-W and -Wall) (closes: #93708). + + ICE on invalid extended asm (closes: #136630). + + ICE in `emit_no_conflict_block' compiling perl (closes: #154599). + + ICE in `gen_tagged_type_instantiation_die'(closes: #166766). + + ICE on __builtin_memset(s, 0, -1) (closes: #170994). + + -Q option to gcc appears twice in the documentation (closes: #137382). + + New options for specifying targets:- -MQ and -MT (closes: #27878). + + Configure using --enable-nls (closes: #51651). + + gcc -dumpspecs undocumented (closes: #65406). + - Preprocessor: + + cpp fails to parse macros with varargs correctly(closes: #154767). + + __VA_ARGS__ stringification crashes preprocessor if __VA_ARGS__ is + empty (closes: #152709). + + gcc doesn't handle empty args in macro function if there is only + one arg(closes: #156450). + - C: + + Uncaught floating point exception causes ICE (closes: #33786). + + gcc -fpack-struct doesn't pack structs (closes: #64628). + + ICE in kernel (matroxfb) code (closes: #151196). + + gcc doesn't warn about unreachable code (closes: #158704). + + Fix docs for __builtin_return_address(closes: #165992). + + C99 symbols in limits.h not defined (closes: #168346). + + %zd printf spec generates warning, even in c9x mode (closes: #94891). + + Update GCC attribute syntax (closes: #12253, #43119). + - C++ & libstdc++-v3: + + template and virtual inheritance bug (closes: #152315). + + g++ has some troubles with nested templates (closes: #21255). + + vtable thunks implementation is broken (closes: #34876, #35477). + + ICE for templated friend (closes: #42662). + + ICE compiling mnemonic (closes: #42989). + + Deprecated: result naming doesn't work for functions defined in a + class (closes: #43170). + + volatile undefined ... (closes: #50529). + + ICE concerning templates (closes: #53698). + + Program compiled -O3 -malign-double segfaults in ofstream::~ofstream + (closes: #56867). + + __attribute__ ((constructor)) doesn't work with C++ (closes: #61806). + + Another ICE (closes: #65687). + + ICE in `const_hash' (closes: #72933). + + ICE on illegal code (closes: #83221). + + Wrong code with -O2 (closes: #83363). + + ICE on template class (closes: #85934). + + No warning for missing return in non-void member func (closes: #88260). + + Not a bug/fixed in libgcc1: libgcc.a symbols end up exported by + shared libraries (closes: #118670). + + ICE using nested templates (closes: #118781). + + Another ICE with templates (closes: #127489). + + More ICEs (closes: #140427, #141797). + + ICE when template declared after use(closes: #148603). + + template function default arguments are not handled (closes: #157292). + + Warning when including stl.h (closes: #162074). + + g++ -pedantic-errors -D_GNU_SOURCE cannot #include + (closes: #151671). + + c++ error message improvement suggestion (closes: #46181). + + Compilation error in stl_alloc.h with -fhonor-std (closes: #59005). + + libstdc++ has no method at() in stl_= (closes: #68963). + - Fortran: + + g77 crash (closes: #130415). + - ObjC: + + ICE: program cc1obj got fatal signal 11 (closes: #62309). + + Interface to garbage collector is undocumented. (closes: #68987). + - Architecture specific: + - alpha + + Can't compile with define gnu_source with stdio and curses + (closes: #97603). + + Header conflicts on alpha (closes: #134558). + + lapack-dev: cannot link on alpha (closes: #144602). + + ICE `fixup_var_refs_1' (closes: #43001). + + Mutt segv on viewing list of attachments (closes: #47981). + + ICE building open-amulet (closes: #48530). + + ICE compiling hatman (closes: #55291). + + dead code removal in switch() broken (closes: #142844). + - arm + + Miscompilation using -fPIC on arm (closes: #90363). + + infinite loop with -O on arm (closes: #151675). + - i386 + + ICE when using -mno-ieee-fp and -march=i686 (closes: #87540). + - m68k + + Optimization (-O2) broken on m68k (closes: #146006). + - mips + + g++ exception catching does not work... (closes: #105569). + + update-menus gets Bus Error (closes: #120333). + - mipsel + + aspell: triggers ICE on mipsel (closes: #128367). + - powerpc + + -O2 produces wrong code (gnuchess example) (closes: #131454). + - sparc + + Misleading documentation for -malign-{jump,loop,function}s + (closes: #114029). + + Sparc GCC issue with -mcpu=ultrasparc (closes: #172956). + + flightgear: build failure on sparc (closes: #88694). + + -- Matthias Klose Fri, 16 May 2003 07:13:57 +0200 + +gcc-3.3 (1:3.3ds8-0pre9) unstable; urgency=high + + * gcc-3.3 second prerelease. + - Fixing exception handling on s390 (urgency high). + * Reenabled gpc build (I had it disabled ...). Closes: #192347. + + -- Matthias Klose Fri, 9 May 2003 07:32:14 +0200 + +gcc-3.3 (1:3.3ds8-0pre8) unstable; urgency=low + + * gcc-3.3 prerelease. + - Fixes gcj ICE (closes: #189545). + * For libstdc++ use the i486 atomicity implementation, introduced with + 0pre6, left out in 0pre7 (closes: #191684). + * Add README.Debian for treelang (closes: #190812). + * Apply NetBSD changes (Joel Baker). Closes: #191551. + * New symbols in libgcc1, tighten the shlibs dependency. + * Disable testsuite run on mips/mipsel because of an outdated libc-dev + package. + * Do not build libffi with debug information, although configuring + with --enable-debug. + + -- Matthias Klose Tue, 6 May 2003 06:53:49 +0200 + +gcc-3.3 (1:3.3ds7-0pre7) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030429). + * Revert upstream libstdc++ change (closes: #191145, #191147, #191148, + #191149, #149159, #149151, and other reports). + Sorry for not detecting this before the upload, seems to be + broken on i386 "only". + * hurd-i386: Use /usr/include, not /include. + * Disable gpc on hurd-i386 (closes: #189851). + * Disable building the debug version of libstdc++ on powerpc-linux + (fixes about 200 java test cases). + * Install libstdc++v3 man pages (closes: #127263). + + -- Matthias Klose Tue, 29 Apr 2003 23:28:44 +0200 + +gcc-3.3 (1:3.3ds6-0pre6) unstable; urgency=high + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030426). + * libstdc++-doc: Fix index.html link (closes: #189424). + * Revert back to the i486 atomicity implementation, that was used + for gcc-3.2 as well. Reopens: #184446, #185662. Closes: #189983. + For this reason, tighten the libstdc++5 shlibs dependency. See + http://lists.debian.org/debian-devel/2003/debian-devel-200304/msg01895.html + Don't build the ix86 specfic libstdc++ libs anymore. + + -- Matthias Klose Sun, 27 Apr 2003 19:47:54 +0200 + +gcc-3.3 (1:3.3ds5-0pre5) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030415). + * Disable treelang on powerpc. + * Disable gpc on m68k. + * Install locale data. Conflict with gcc-3.2 (<= 1:3.2.3-0pre8). + * Fix generated bits/atomicity.h (closes: #189183). + * Tighten libgcc1 shlibs dependency (new symbol _Unwind_Backtrace). + + -- Matthias Klose Wed, 16 Apr 2003 00:37:05 +0200 + +gcc-3.3 (1:3.3ds4-0pre4) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030412). + * Avoid sparc64 dependencies for libgcc1 on sparc (Clint Adams). + * Make the default sparc 32bit target v8 instead of v7. This mainly + enables hardmul, which should speed up v8 and v9 systems by a large + margin (Ben Collins). + * Tighten binutils dependency for sparc. + * On i386, build libstdc++ optimized for i486 and above. The library + in /usr/lib is built for i386. Closes: #184446, #185662. + * Add gpc build (from gcc-snapshot package). + * debian/control: Include all packages, that _can_ be built from + this source package (except the cross packages). + * Add m68k patches: m68k-const, m68k-subreg, m68k-loop. + * Run the 3.3 testsuite a second time with the installed gcc-3.2 + to check for regressions (promised, only this time, and for the + final release ;). Add build dependencies (gobjc-3.2, g77-3.2, g++-3.2). + + -- Matthias Klose Sat, 12 Apr 2003 10:11:11 +0200 + +gcc-3.3 (1:3.3ds3-0pre3) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030331). + * Reenable java on arm. + * Build-Depend on binutils-2.13.90.0.18-1.3 on m68k. Fixes all + bprob/gcov testsuite failures. + * Enable C++ build on arm. + * Enable the sparc64 build. + + -- Matthias Klose Mon, 31 Mar 2003 23:24:54 +0200 + +gcc-3.3 (1:3.3ds2-0pre2) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030317). + * Disable building the gcc-3.3-nof package. + * Disable Ada on mips and mipsel. + * Remove the workaround to build Ada on powerpc. + * Add GNU Free documentation license to copyright file. + * Update the sparc64 build patches (Clint Adams). Not yet enabled. + * Disable C++ on arm (Not yet tested). + * Add fix for ICE on powerpc (see: #184684). + + -- Matthias Klose Sun, 16 Mar 2003 21:40:57 +0100 + +gcc-3.3 (1:3.3ds1-0pre1) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030310). + * Add gccbug manpage. + * Don't build libgnat package (no shared library). + * Configure with --enable-sjlj-exceptions on hppa and m68k for + binary compatibility with libstdc++ built with gcc-3.2. + * Disable Java on arm-linux (never seen it sucessfully bootstrap). + * Install non-conflicting baseline README. + * multilib *.so and *.a moved to /usr/lib/gcc-lib/... , so that several + compiler versions can be installed concurrently. + * Remove libstdc++-incdir patch applied upstream. + * libstdc++ 64 bit development files now handled in -dev target. + (Gerhard Tonn) + * Drop build dependencies for gpc (tetex-bin, help2man, libncurses5-dev). + * Add libstdc++5-3.3-dev confict to libstdc++5-dev (<= 1:3.2.3-0pre3). + * Enable builds on m68k (all but C++ for the moment). gcc-3.3 bootstraps, + while gcc-3.2 doesn't. + + -- Matthias Klose Mon, 10 Mar 2003 23:41:00 +0100 + +gcc-3.3 (1:3.3ds0-0pre0) unstable; urgency=low + + * First gcc-3.3 package, built for s390 only. All other architectures + build the gcc-3.3-base package only. + To build the package on other architectures, edit debian/rules.defs + (macro no_dummy_archs). + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030301). + * Don't include the gcc locale files (would conflict with 3.2). + * Remove libffi-install-fix patch. + * Fix netbsd-i386 patches. + * Change priority of libstdc++5 and gcc-3.2-base to important. + * Install gcjh-wrapper for javah. + * gij suggests fastjar, gcj recommends fastjar. + * Allow builds using automake1.4 | automake (<< 1.5). + * Backport fix for to output more correct line numbers. + * Add help2man to build dependencies needed for some gpc man pages. + * gpc: Install binobj and gpidump binaries and man pages. + * Apply cross compilation patches submitted by Bastian Blank. + * Replace s390-biarch patch and copy s390-config-ml patch from 3.2 + (Gerhard Tonn). + * Configure using --enable-debug. + * Add infrastructure to only build a subset of binary packages. + * Rename libstdc++-{dev,dbg,pic,doc} packages. + * Build treelang compiler. + + -- Matthias Klose Sat, 1 Mar 2003 12:56:42 +0100 + +gcc-3.2 (1:3.2.3ds2-0pre3) unstable; urgency=low + + * gcc-3.2.3 prerelease (CVS 20030228) + - Fixes bootstrap failure on alpha-linux. + - Fixes ICE on m68k (closes: #177016). + * Build Pascal with -O1 on powerpc, disable Pascal on arm, m68k and + sparc (due to wrong code generation for fwrite in glibc, + see PR optimization/9279). + * Apply cross compilation patches submitted by Bastian Blank. + + -- Matthias Klose Fri, 28 Feb 2003 20:26:30 +0100 + +gcc-3.2 (1:3.2.3ds1-0pre2) unstable; urgency=medium + + * gcc-3.2.3 prerelease (CVS 20030221) + - Fixes ICE on hppa (closes: #181813). + * Patch for ffitest in s390-java.dpatch deleted, since already fixed + upstream. (Gerhard Tonn) + * Build crtbeginT.o on m68k-linux (closes: #179807). + * Install gcjh-wrapper for javah (closes: #180218). + * gij suggests fastjar, gcj recommends fastjar (closes: #179298). + * Allow builds using automake1.4 | automake (<< 1.5) (closes: #180048). + * Backport fix for to output more correct line numbers (closes: #153965). + * Add help2man to build dependencies needed for some gpc man pages. + * gpc: Install binobj and gpidump binaries and man pages. + * Disable gpc on arm due to wrong code generation for fwrite in + glibc (see PR optimization/9279). + + -- Matthias Klose Sat, 22 Feb 2003 19:58:20 +0100 + +gcc-3.2 (1:3.2.3ds0-0pre1) unstable; urgency=low + + * gcc-3.2.3 prerelease (CVS 20030210) + - Fixes long millicode calls on hppa (closes: #180520) + * New gpc-20030209 version. Remove gpc-update.dpatch and gpc-testsuite.dptch + as they are no longer needed. + * Fix netbsd-i386 patches (closes: #180129, #179931) + * m68k-bootstrap.dpatch: backport gcse.c changes from 3.3/MAIN to 3.2 + * Change priority of libstdc++5 and gcc-3.2-base to important. + + -- Ryan Murray Tue, 11 Feb 2003 06:18:09 -0700 + +gcc-3.2 (1:3.2.2ds8-1) unstable; urgency=low + + * gcc-3.2.2 release. + - Fixes ICE, regression from 2.95 (closes: #176117). + - Fixes ICE, regression from 2.95 (closes: #179161). + * libstdc++ for biarch installs now upstream to usr/lib64, + therefore mv usr/lib/64 usr/lib64 no longer necessary. (Gerhard Tonn) + + -- Ryan Murray Wed, 5 Feb 2003 01:35:29 -0700 + +gcc-3.2 (1:3.2.2ds7-0pre8) unstable; urgency=low + + * gcc-3.2.2 prerelease (CVS 20030130). + * update s390 libffi patch + * debian/control: add myself to uploaders and change libc12-dev depends to + libc-dev on i386 (closes: #179128) + * Build-Depend on procps so that ps is available for logwatch + + -- Ryan Murray Fri, 31 Jan 2003 04:00:15 -0700 + +gcc-3.2 (1:3.2.2ds6-0pre7) unstable; urgency=low + + * gcc-3.2.2 prerelease (CVS 20030128). + - Update needed for hppa. + - Fixes ICE on arm, regression from 2.95.x (closes: #168086). + - Can use default bison (1.875). + * Apply netbsd build patches (closes: #177674, #178328, #178325, + #178326, #178327). + * Run the logwatch script on "slow" architectures (arm, m68k) only. + * autoreconf.dpatch: Only update libtool.m4, which is newer conceptually + than libtool 1.4 (Ryan Murray). + * Apply autoreconf patch universally (Ryan Murray). + * More robust gij/gcj wrapper scripts, include /usr/lib/jni in default + JNI search path (Ben Burton). Closes: #167932. + * Build crtbeginT.o on m68k (closes: #177036). + * Fixed libc-dev source dependency (closes: #178602). + * Tighten shlib dependency to the current package version; should be + 1:3.2.2-1 for the final release (closes: #178867). + + -- Matthias Klose Tue, 28 Jan 2003 21:59:30 +0100 + +gcc-3.2 (1:3.2.2ds5-0pre6) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20030123). + * Build locales needed by the libstdc++ testsuite. + * Update config.{guess,sub} files from autotools-dev (closes: #177674). + * Disable Ada and Java on netbsd-i386 (closes: #177679). + * gnat: Add suggests for gnat-doc and ada-reference-manual. + + -- Matthias Klose Thu, 23 Jan 2003 22:16:53 +0100 + +gcc-3.2 (1:3.2.2ds4-0pre5.1) unstable; urgency=low + + * Readd build dependency `locales' on arm. locales is now installable + * Add autoreconf patch for mips{,el}. (closes: #176311) + + -- Ryan Murray Wed, 22 Jan 2003 14:31:14 -0800 + +gcc-3.2 (1:3.2.2ds4-0pre5) unstable; urgency=low + + * Remove build dependency `libc6-dev-sparc64 [sparc]' for now. + * Remove build dependency `locales' on arm. locales is uninstallable + on arm due to the missing glibc-2.3. + * Use bison-1.35. bison-1.875 causes an hard error on the reduce/reduce + conflict in objc-parse.y. + + -- Matthias Klose Fri, 10 Jan 2003 10:10:43 +0100 + +gcc-3.2 (1:3.2.2ds4-0pre4) unstable; urgency=low + + * Try building with gcc-2.95 on m68k-linux. Building gcc-3.2 with gcc-3.2 + does not work for me. m68k-linux doesn't look good at all ... + * Fix s390 build error. + * Add locales to build dependencies. A still unsolved issue is the + presence of the locales de_DE, en_PH, en_US, es_MX, fr_FR and it_IT, + or else some tests in the libstdc++ testsuite will fail. + * Put all -nof files in the -nof package (closes: #175253). + * Correctly exit logwatch script (closes: #175251). + * Install linker-map.gnu file for libstdc++_pic (closes: #175144). + * Install versioned gpcs docs only (closes: #173844). + * Include gpc test results in gpc package. + * Link local libstdc++ documentation to local source-level documentation. + * Clarify libstdc++ description (so version and library version). + Closes: #175799. + * Include library in libstdc++-dbg package (closes: #176005). + + -- Matthias Klose Wed, 8 Jan 2003 23:39:50 +0100 + +gcc-3.2 (1:3.2.2ds3-0pre3) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021231). + - Fix loop count computation for preconditioned unrolled loops. + Closes: #162919. + - Fix xmmintrin.h (_MM_TRANSPOSE4_PS) CVS 20021027 (closes: #163647). + - Fix [PR 8601] strlen/template interaction causes ICE CVS 20021201. + Closes: #166143. + * Watch the log files, which are written during the testsuite runs and print + out a message, if there is still activity. No more buildd timeouts on arm + and m68k ... + * Remove gpc's reference to librx1g-dev package (closes: #172953). + * Remove trailing dots on package descriptions. + * Fix external reference to cpp.info in gcc.info (closes: #174598). + + -- Matthias Klose Tue, 31 Dec 2002 13:47:52 +0100 + +gcc-3.2 (1:3.2.2ds2-0pre2) unstable; urgency=medium + + * Friday, 13th upload, so what do you expect ... + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021212). + * Fix gnat build (autobuild maintainers: please revert back to gnat-3.2 + (<= 1:3.2.1ds6-1) for building gnat-3.2, if the build fails building + gnatlib and gnattools). + * Really disable sparc64 support. + + -- Matthias Klose Fri, 13 Dec 2002 00:26:37 +0100 + +gcc-3.2 (1:3.2.2ds1-0pre1) unstable; urgency=low + + * A candidate for the transition ... + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021210). + - doc/invoke.texi: Remove last reference to -a (closes: #171748). + * Disable sparc64 support. For now please use egcs64 to build sparc64 + kernels. + * Disable Pascal on the sparc architecture (doesn't bootstrap). + + -- Matthias Klose Tue, 10 Dec 2002 22:33:13 +0100 + +gcc-3.2 (1:3.2.2ds0-0pre0) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021202). + - Should fix _Pragma expansion within macros (closes: #157416). + * New gpc-20021128 version. Run check using EXTRA_TEST_PFLAGS=-g0 + * Add tetex-bin to build dependencies (gpc needs it). Closes: #171203. + + -- Matthias Klose Tue, 3 Dec 2002 08:22:33 +0100 + +gcc-3.2 (1:3.2.1ds6-1) unstable; urgency=low + + * gcc-3.2.1 final release. + * Build gpc-20021111 for all architectures. hppa and i386 are + known to work. For the other architectures, send the usual FTBFS ... + WARNING: this gpc version is an alpha version, especially debug info + doesn't work well, so use -g0 for compiling. If you need a stable + gpc compiler, use gpc-2.95. + * Encode the gpc upstream version in the package name, the gpc release + date in the version number (requested by gpc upstream). + * Added libncurses5-dev and libgmp3-dev as build dependencies for the + gpc tests and runtime. + * Clean CVS files as well (closes: #169101). + * s390-biarch.dpatch added, backported from CVS (Gerhard Tonn). + * s390-config-ml.dpatch added, disables biarch for java, + libffi and boehm-gc on s390. They need a 64 bit runtime + during build which is not yet available on s390 (Gerhard Tonn). + * Biarch support for packaging adapted (Gerhard Tonn). + biarch variable added and with-sparc64 variable substituted in + most places by biarch. + dh_shlibdeps is applied only to 32 bit libraries on s390, since + ldd for 64 bit libraries don't work on 32 bit runtime. + Build dependency to libc6-dev-s390x added. + + -- Matthias Klose Wed, 20 Nov 2002 00:20:58 +0100 + +gcc-3.2 (1:3.2.1ds5-0pre6) unstable; urgency=medium + + * gcc-3.2.1 prerelease. + * Removed arm patch integrated upstream. + * Adjust gnat build dependency (closes: #167116). + * Always configure with --enable-clocale=gnu. The autobuilders do have + locales installed, but not generated the "de_DE" locale needed for + the autoconf test in libstdcc++-v3/aclocal.m4. + * libstdc++ documentaion: Don't compresss '*.txt' referenced by html pages. + + -- Matthias Klose Tue, 12 Nov 2002 07:19:44 +0100 + +gcc-3.2 (1:3.2.1ds4-0pre5) unstable; urgency=medium + + * gcc-3.2.1 snapshot (CVS 20021103). + * sparc64-build.dpatch: Updated. Lets sparc boostrap again. + * s390-loop.dpatch removed, already fixed upstream (Gerhard Tonn). + * bison.dpatch: Removed, patch submitted upstream. + * backport-java-6865.dpatch: Apply again during build. + * Tighten glibc dependency (closes: #166703). + + -- Matthias Klose Sun, 3 Nov 2002 12:22:02 +0100 + +gcc-3.2 (1:3.2.1ds3-0pre4) unstable; urgency=high + + * gcc-3.2.1 snapshot (CVS 20021020). + - Expansion of _Pragma within macros fixed (closes: #157416). + * FTBFS: With the switch to bison-1.50 (and 1.75), gcc-3.2 fails to build from + source on Debian unstable systems. This is fixed in gcc HEAD, but not on + the current release branch. + HELP NEEDED: + - check what is missing from the patches in debian/patches/bison.dpatch. + This is a backport of the bison related patches, but showing regressions + in the gcc testsuite, so it cannot be applied. + - build gcc using byacc (bootstrap currently fails using byacc). + - build bison-1.35 in it's own package (the current 1.35-3 package fails + to build form source). + - and finally ask upstream to backport the patch to the branch. It's not + helpful not beeing able to follow the stable branch. Maybe we should + just switch to gcc HEAD as BSD does ... + As a terrible workaround, build the sources from CVS first on a machine, + with bison-1.35 installed, then package the tarball, so the bison + generated files are not rebuilt. + + * re-add lost patch: configure with --enable-__cxa_atexit (closes: #163422), + Therefore urgency high. + * gcj-wrapper, gij-wrapper: Accept names starting with `.' (closes: #163172, + #164009). + * Point g++ manpage to correct g++ version (closes: #162843). + * Support for i386-freebsd-gnu (closes: #163883). + * s390-java.dpatch replaced with backport from cvs head (Gerhard Tonn). + * Disable the testsuite run on the Hurd (closes: #159650). + * s390-loop.dpatch added, fixes runtime problem (Gerhard Tonn). + * debian/patches/bison.dpatch: Backport for bison-1.75 compatibility. + Don't use it due to regressions. + * debian/patches/backport-java-6865.dpatch: Directly applied in the + included tarball because of bison problems. + * Make fixincludes priority optional, so linda can depend on it. + * Tighten binutils dependency. + + -- Matthias Klose Sun, 20 Oct 2002 10:52:49 +0200 + +gcc-3.2 (1:3.2.1ds2-0pre3) unstable; urgency=low + + * gcc-3.2.1 snapshot (CVS 20020923). + * Run the libstdc++ check-abi script. Results are put into the file + /usr/share/doc/libstdc++5/README.libstdc++-baseline in the libstdc++5-dev + package. This file contains a new baseline, if no baseline for this + architecture is included in the gcc sources. + * gcj-wrapper: Accept files starting with an underscore, accept + path names (closes: #160859, #161517). + * Explicitely call automake-1.4 when rebuilding Makefiles (closes: #161438). + * Let installed fixincludes script find files in /usr/lib/fixincludes. + * debian/rules.patch: Add .NOTPARALLEL as target, so that patches are + applied sequentially (closes: #159395). + + -- Matthias Klose Tue, 24 Sep 2002 07:36:56 +0200 + +gcc-3.2 (1:3.2.1ds1-0pre2) unstable; urgency=low + + * gcc-3.2.1 snapshot (CVS 20020913). Welcome back m68k in bootstrap land! + * Fix arm-tune.dpatch (closes: #159354). + * Don't overwrite LD_LIBRARY_PATH in build (closes: #158459). + * --disable-__cxa_atexit on NetBSD (closes: #159620). + * Reenable installation of message catalogs (disabled in 3.2-0pre2). + Closes: #160175. + * Ben Collins + - Re-enable sparc64 build. This time, it's part of the default compiler. + I have disabled 64/alt libraries as they are too much overhead. All + libraries build 64bit, but currently only libgcc/libstdc++ include the + 64bit libraries. + Closes: #160404. + * Depend on autoconf2.13, instead of autoconf. + * Phil Blundell + - debian/patches/arm-update.dpatch: Fix python2.2 build failure. + + -- Matthias Klose Sat, 7 Sep 2002 08:05:02 +0200 + +gcc-3.2 (1:3.2.1ds0-0pre1) unstable; urgency=medium + + * gcc-3.2.1 snapshot (CVS 20020829). + New g++ option -Wabi: + Warn when G++ generates code that is probably not compatible with the + vendor-neutral C++ ABI. Although an effort has been made to warn about + all such cases, there are probably some cases that are not warned about, + even though G++ is generating incompatible code. There may also be + cases where warnings are emitted even though the code that is generated + will be compatible. + The current version of the ABI is 102, defined by the __GXX_ABI_VERSION + macro. + * debian/NEWS.*: Updated. + * Fix libstdc++-dev dependency on libc-dev for the Hurd (closes: #157004). + * Add versioned expect build dependency. + * Tighten binutils dependency to 2.13.90.0.4. + * debian/patches/arm-tune.dpatch: Increase stack limit for configure. + * 3.2-0pre4 did build gnat-3.2 compilers for all architectures. Build-Depend + on gnat-3.2 now (closes: #156734). + * Remove bashism's in gcj-wrapper (closes: #157982). + * Add -cp and -classpath options to gij(1). Backport from HEAD (#146634). + * Add fastjar documentation. + + -- Matthias Klose Fri, 30 Aug 2002 10:35:00 +0200 + +gcc-3.2 (1:3.2ds0-0pre4) unstable; urgency=low + + * Correct build dependency on gnat-3.1. + + -- Matthias Klose Mon, 12 Aug 2002 01:21:58 +0200 + +gcc-3.2 (1:3.2ds0-0pre3) unstable; urgency=low + + * gcc-3.2 upstream prerelease. + * Disable all configure options, which are standard: + --enable-threads=posix --enable-long-long, --enable-clocale=gnu + + -- Matthias Klose Fri, 9 Aug 2002 21:59:08 +0200 + +gcc-3.2 (1:3.2ds0-0pre2) unstable; urgency=low + + * gcc-3.2 snapshot (CVS 20020802). + * Fix g++-include dir. + * Don't install the locale files (temporarily, until we don't build + gcc-3.1 anymore). + * New package libgcj-common to avoid conflict with classpath package. + + -- Matthias Klose Sat, 3 Aug 2002 09:08:34 +0200 + +gcc-3.2 (1:3.2ds0-0pre1) unstable; urgency=low + + * gcc-3.2 snapshot (CVS 20020729). + + -- Matthias Klose Mon, 29 Jul 2002 20:36:54 +0200 + +gcc-3.1 (1:3.1.1ds3-1) unstable; urgency=low + + * gcc-3.1.1 release. Following this release we will have a gcc-3.2 + release soon, which is gcc-3.1.1 plus some C++ ABI changes. Once + gcc-3.2 hits the archives, gcc-3.1.1 will go away. + * Don't build the sparc64 compiler. The packaging/patches are + currently broken. + * Add missing headers on m68k and powerpc. + * Install libgcc_s_nof on powerpc. + * Install libffi's copyright and doc files (closes: #152198). + * Remove dangling symlink (closes: #149002). + * libgcj3: Add a conflict to the classpath package (closes: #148664). + * README.C++: Fix URLs. + * libstdc++-dbg: Install into /usr/lib/debug, document it. + * backport-java-6865.dpatch: backport from HEAD. + * Fix typo in gcj docs (closes: #148890). + * Change libstdc++ include dir: /usr/include/c++/3.1. + * libstdc++-codecvt.dpatch: New patch (closes: #149776). + * Build libstdc++-pic package. + * Move 64bit libgcc in its own package libgcc1-64 (closes: #147249). + * Tighten glibc dependency. + + -- Matthias Klose Mon, 29 Jul 2002 00:34:49 +0200 + +gcc-3.1 (1:3.1.1ds2-0pre3) unstable; urgency=low + + * Updated to CVS 2002-06-06 (gcc-3_1-branch). + * Updated s390-java patch (Gerhard Tonn). + * Don't use -O in STAGE1_FLAGS on m68k. + * Fix `-classpath' option in gcj-wrapper script (closes: #150142). + * Remove g++-cxa-atexit patch, use --enable-__cxa_atexit configure option. + + -- Matthias Klose Wed, 3 Jul 2002 23:52:58 +0200 + +gcc-3.1 (1:3.1.1ds1-0pre2) unstable; urgency=low + + * Updated to CVS 2002-06-06 (gcc-3_1-branch), fixing an ObjC regression. + * Welcome m68k to bootstrap land (thanks to Andreas Schwab). + * Add javac wrapper for gcj-3.1 (Michael Koch). + * Remove dangling symlink in /usr/share/doc/gcc-3.1 (closes: #149002). + + -- Matthias Klose Fri, 7 Jun 2002 00:26:05 +0200 + +gcc-3.1 (1:3.1.1ds0-0pre1) unstable; urgency=low + + * Updated to CVS 2002-05-31 (gcc-3_1-branch). + * Change priorities from fastjar and gij-wrapper-3.1 from 30 to 31. + * Update arm-tune patch. + * Install xmmintrin.h header on i386 (closes: #148181). + * Install altivec.h header on powerpc. + * Call correct gij in gij-wrapper (closes: #148662, #148682). + + -- Matthias Klose Wed, 29 May 2002 22:47:40 +0200 + +gcc-3.1 (1:3.1ds2-2) unstable; urgency=low + + * Tighten binutils dependency. + * Fix libstdc include dir for multilibs (Dan Jacobowitz). + + -- Matthias Klose Tue, 21 May 2002 08:03:49 +0200 + +gcc-3.1 (1:3.1ds2-1) unstable; urgency=low + + * GCC 3.1 release. + * Ada cannot be built by the autobuilders for the first time. Do it by hand. + gnatgcc and gnatbind need to be in the PATH. + * Build with CC=gnatgcc, when building the Ada compiler. + * Hurd fixes. + * Don't build the sparc64 compiler; the hack isn't up to date and glibc + isn't converted to use /lib64 and /usr/lib64. + * m68k-linux shows bootstrap comparision failures. If you want to build + the compiler anyway and ignore the bootstrap comparision failure, edit + debian/rules.patch and uncomment the patch to ignore the failure. See + /usr/share/doc/gcc-3.1/BOOTSTRAP_COMPARISION_FAILURE for the differences. + + -- Matthias Klose Wed, 15 May 2002 09:53:00 +0200 + +gcc-3.1 (1:3.1ds1-0pre6) unstable; urgency=low + + * Build from the "final prerelease" tarball (gcc-3.1-20020508.tar.gz). + * Build gnat-3.1-doc package. + * Build fastjar package without building java packages. + * Hurd fixes. + * Updated sparc64-build patch. + * Add s390-ada patch (Gerhard Tonn). + * Undo the dwarf2 support for hppa from -0pre5. + + -- Matthias Klose Thu, 9 May 2002 17:21:09 +0200 + +gcc-3.1 (1:3.1ds0-0pre5) unstable; urgency=low + + * Use /usr/include/g++-v3-3.1 as C++ include dir. + * Update s390-java patch (Gerhard Tonn). + * Tighten binutils dependency (gas patch for m68k-linux). + * Use gnat-3.1 as the gnat package name (as found in gcc/ada/gnatvsn.ads). + * dwarf2 support hppa: a snapshot of the gcc/config/pa directory + from the trunk dated 2002-05-02. + + -- Matthias Klose Fri, 3 May 2002 22:51:37 +0200 + +gcc-3.1 (1:3.1ds0-0pre4) unstable; urgency=low + + * Use gnat-5.00w as the gnat package name (as found in gcc/ada/gnatvsn.ads). + * Don't build the shared libgnat library. It assumes an existing shared + libiberty library. + * Don't install the libgcjgc library. + + -- Matthias Klose Thu, 25 Apr 2002 08:48:04 +0200 + +gcc-3.1 (1:3.1ds0-0pre3) unstable; urgency=low + + * Build fastjar on all architectures. + * Update m68k patches. + * Update s390-java patch (Gerhard Tonn). + + -- Matthias Klose Sun, 14 Apr 2002 15:34:47 +0200 + +gcc-3.1 (1:3.1ds0-0pre2) unstable; urgency=low + + * Add Ada support. To successfully build, a working gnatbind and gcc + driver with Ada support is needed. + * Apply needed arm patches from 3.0.4. + + -- Matthias Klose Sat, 6 Apr 2002 13:17:08 +0200 + +gcc-3.1 (1:3.1ds0-0pre1) unstable; urgency=low + + * First try for gcc-3.1. + + -- Matthias Klose Mon, 1 Apr 2002 23:39:30 +0200 + +gcc-3.0 (1:3.0.4ds3-6) unstable; urgency=medium + + * Second try at fixing sparc build problems. + + -- Phil Blundell Sun, 24 Mar 2002 14:49:26 +0000 + +gcc-3.0 (1:3.0.4ds3-5) unstable; urgency=medium + + * Enable java on ARM. + * Create missing directory to fix sparc build. + + -- Phil Blundell Fri, 22 Mar 2002 20:21:59 +0000 + +gcc-3.0 (1:3.0.4ds3-4) unstable; urgency=low + + * Link with system zlib (closes: #136359). + + -- Matthias Klose Tue, 12 Mar 2002 20:47:59 +0100 + +gcc-3.0 (1:3.0.4ds3-3) unstable; urgency=low + + * Build libf2c (pic and non-pic) with -mieee on alpha-linux. + + -- Matthias Klose Sun, 10 Mar 2002 00:37:24 +0100 + +gcc-3.0 (1:3.0.4ds3-2) unstable; urgency=medium + + * Apply hppa-build patch (Randolph Chung). Closes: #136731. + * Make libgcc1 conflict/replace with libgcc1-sparc64. Closes: #135709. + * gij-3.0 provides the `java' command. Closes: #128947. + * Depend on binutils (>= 2.11.93.0.2-2), allows stripping of libgcj.a + again. Closes: #99307. + * Update README.cross pointing to the README of the toolchain-source + package. + + -- Matthias Klose Wed, 6 Mar 2002 21:53:34 +0100 + +gcc-3.0 (1:3.0.4ds3-1) unstable; urgency=low + + * Final gcc-3.0.4 release. + * debian/rules.d/binary-java.mk: Fix dormant typo, exposed by removing the + duplicate libgcj dependency and adding the gij-3.0 package. + Closes: #134005. + * New patch by Phil Blundell to fix scalapack build error on m68k. + + -- Matthias Klose Wed, 20 Feb 2002 23:59:43 +0100 + +gcc-3.0 (1:3.0.4ds2-0pre020210) unstable; urgency=low + + * Make the base package dependent on the binary-arch target. Closes: #133433. + * Get libstdc++ on arm woring (define _GNU_SOURCE). Closes: #133435. + + -- Matthias Klose Mon, 11 Feb 2002 20:31:12 +0100 + +gcc-3.0 (1:3.0.4ds2-0pre020209) unstable; urgency=high + + * Update to CVS sources (20020209 gcc-3_0-branch). + * Apply patch to fix bootstrap error on arm-linux (submitted upstream + by Phil Blundell). Closes: #130422. + * Make base package architecture any. + * Decouple versioned shlib dependencies from release number for + libobjc as well. + + -- Matthias Klose Sat, 9 Feb 2002 01:30:11 +0100 + +gcc-3.0 (1:3.0.4ds1-0pre020203) unstable; urgency=medium + + * One release critical bug outstanding: + - bootstrap error on arm. + * Update to CVS sources (20020203 gcc-3_0-branch). + * Fixed upstream: PR c/3504: Correct documentation of __alignof__. + Closes: #85445. + * Remove libgcc-powerpc patch, integrated upstream (closes: #131977). + * Tighten binutils build dependency (to address #126162). + * Move jv-convert to gcj package (closes: #131985). + + -- Matthias Klose Sun, 3 Feb 2002 14:47:14 +0100 + +gcc-3.0 (1:3.0.4ds0-0pre020127) unstable; urgency=low + + * Two release critical bugs outstanding: + - bootstrap error on arm. + - bus errors for C++ and java executables on sparc (see the testsuite + results). + * Update to CVS sources (20020125 gcc-3_0-branch). + * Enable java support for s390 architecture (patch from Gerhard Tonn). + * Updated NEWS file for 3.0.3. + * Disable building the gcc-sparc64, but build a multilibbed compiler + for sparc as the default. + * Disabled the subreg-byte patch for sparc (request from Ben Collins). + * Fixed reference to libgcc1 package in README (closes: #126218). + * Do recommend libc-dev, not depend on it. For low-end or embedded systems + the dependency on libc-dev can make the difference between + having enough or having too little space to build a kernel. + * README.cross: Updated by Hakan Ardo. + * Decouple versioned shlib dependencies from release number. Closes: #118391. + * Fix diversions for gcc-3.0-sparc64 package (closes: #128178), + unconditionally remove `sparc64-linux-gcc' alternative. + * g77/README.libg2c.Debian: New file mentioning `libg2c-pic'. The next + g77 version (3.1) does build a static and shared library (closes: #104250). + * Fix formatting errors in the synopsis of the java man pages. Maybe the + reason for #127571. Closes: #127571. + * fastjar: Fail for the (currently incorrect) -u option. Addresses: #116145. + Add alternative for `jar' using priority 30 (closes: #118648). + * jv-convert: Add --help option and man page. Backport from HEAD branch. + * libgcj2-dev: Remove duplicate dependency (closes: #127805). + * Giving up and make just another new package gij-X.Y with only the gij-X.Y + binary for policy conformance (closes: #127111). + * gij: Provides an alternative for `java' (priority 30) using a wrapper + script (Stephen Zander) (closes: #128974). Added simple manpage. + + -- Matthias Klose Sun, 27 Jan 2002 13:33:41 +0100 + +gcc-3.0 (1:3.0.3ds3-1) unstable; urgency=low + + * Final gcc-3.0.3 release. + * Do not compress .txt files in libstdc++ docs referenced from html + pages (closes: #124136). + * libstdc++-dev suggests libstdc++-doc. + * debian/patches/gcc-ia64-NaT.dpatch: Update (closes: #123685). + + -- Matthias Klose Fri, 21 Dec 2001 02:54:11 +0100 + +gcc-3.0 (1:3.0.3ds2-0pre011215) unstable; urgency=low + + * Update to CVS sources (011215). + * libstdc++ documentation updated upstream (closes: #123790). + * debian/patches/gcc-ia64-NaT.dpatch: Disable. Fixes bootstrap error + on ia64 (#123685). + + -- Matthias Klose Sat, 15 Dec 2001 14:43:21 +0100 + +gcc-3.0 (1:3.0.3ds1-0pre011210) unstable; urgency=medium + + * Update to CVS sources (011208). + * Supposed to fix powerpc build error (closes: #123155). + + -- Matthias Klose Thu, 13 Dec 2001 07:26:05 +0100 + +gcc-3.0 (1:3.0.3ds0-0pre011209) unstable; urgency=medium + + * Update to CVS sources (011208). Frozen for upstream 3.0.3 release. + * Apply contrib/PR3145.patch, a backport of Nathan Sidwell's patch to + fix PR c++/3145, the infamous "virtual inheritance" bug. This affected + especially KDE2 (eg. artsd). Franz Sirl + * cc1plus segfault in strength reduction fixed upstream. Closes: #122547. + * debian/patches/gcc-ia64-NaT.dpatch: Add patch to avoid a bug that can + cause miscompiled userapps to crash the kernel. Closes: #121924. + * Reenable shared libgcc for powerpc. Fixed upstream. + http://gcc.gnu.org/ml/gcc-patches/2001-11/msg00340.html + debian/patches/libgcc-powerpc.dpatch: New patch. + * Add upstream changelogs. + * Remove gij alternative. Move to gij package. + + -- Matthias Klose Sun, 9 Dec 2001 09:36:48 +0100 + +gcc-3.0 (1:3.0.2ds4-4) unstable; urgency=medium + + * Disable building of libffi on mips and mipsel. + (closes: #117503). + * Enable building of shared libgcc on s390 + (closes: #120452). + + -- Christopher C. Chimelis Sat, 1 Dec 2001 06:15:29 -0500 + +gcc-3.0 (1:3.0.2ds4-3) unstable; urgency=medium + + * Fix logic to build libffi without java (closes: #117503). + + -- Matthias Klose Sun, 4 Nov 2001 14:34:50 +0100 + +gcc-3.0 (1:3.0.2ds4-2) unstable; urgency=medium + + * Enable java for ia64 (Jeff Licquia). Closes: #116798. + * Allow building of libffi without gcj (Jeff Licquia). + New libffi packages for arm hurd-i386 mips mipsel, + still missing: hppa, s390. + * debian/NEWS.gcc: Add 3.0.2 release notes. + * debian/patches/hppa-align.dpatch: New patch from Alan Modra, + submitted by Randolph Tausq. + + -- Matthias Klose Thu, 25 Oct 2001 23:59:31 +0200 + +gcc-3.0 (1:3.0.2ds4-1) unstable; urgency=medium + + * Final gcc-3.0.2 release. The source tarball is not the released + tarball, but taken from CVS 011024). + * Remove patch for s390, included upstream. + + -- Matthias Klose Wed, 24 Oct 2001 00:49:40 +0200 + +gcc-3.0 (1:3.0.2ds3-0pre011014) unstable; urgency=low + + * Update to CVS sources (011014). Frozen for upstream 3.0.2 release. + Closes: #109351, #114099, #114216, #105741 (allegro3938). + * Added debian/patches/fastjar.dpatch, which makes fastjar extract + filenames correctly (previously, some had incorrect names on extract). + Closes: #113236. + * Priorities fixed in the past (closes: #94404). + + -- Matthias Klose Sun, 14 Oct 2001 13:19:43 +0200 + +gcc-3.0 (1:3.0.2ds2-0pre010923) unstable; urgency=low + + * Bootstraps on powerpc again (closes: #112777). + + -- Matthias Klose Sun, 23 Sep 2001 01:32:11 +0200 + +gcc-3.0 (1:3.0.2ds2-0pre010922) unstable; urgency=low + + * Update to CVS sources (010922). + * Fixed upstream (closes: #111801). #105569 on hppa. + * Update hppa patch (Matt Taggart). + * Fix libstdc++-dev package description (closes: #112758). + * debian/rules.d/binary-objc.mk: Fix build error (closes: #112462). + * Make gobjc-3.0 conflict with gcc-3.0-sparc64 (closes: #111772). + + -- Matthias Klose Sat, 22 Sep 2001 09:34:49 +0200 + +gcc-3.0 (1:3.0.2ds1-0pre010908) unstable; urgency=low + + * Update to CVS sources (010908). + * Update hppa patch (Matt Taggart). + * Depend on libgc6-dev, not libgc5-dev, which got obsolete (during + the freeze ...). However adds s390 support (closes: #110189). + * debian/patches/m68k-reload.dpatch: New patch (Roman Zippel). + Fixes #89023. + * debian/patches/gcc-sparc.dpatch: New patch ("David S. Miller"). + Fixes libstdc++ testsuite failures on sparc. + + -- Matthias Klose Sat, 8 Sep 2001 14:26:20 +0200 + +gcc-3.0 (1:3.0.2ds0-0pre010826) unstable; urgency=low + + * gcc-3.0-nof: Fix symlink to gcc-3.0-base doc directory. + * debian/patches/gcj-without-rpath: New patch. + * Remove self dependency on libgcj package. + * Handle diversions for upgrades from 3.0 and 3.0.1 -> 3.0.2 + in gcc-3.0-sparc64 package. + * Build libg2c.a with -fPIC -DPIC and name the result libg2c-pic.a. + Link with this library to avoid linking with non-pic code. + Use this library when building dynamically loadable objects (python + modules, gimp plugins, ...), which need to be linked against g2c or + a library which is linked against g2c (i.e. lapack). + Packages needing '-lg2c-pic' must have a build dependency on + 'g77-3.0 (>= 1:3.0.2-0pre010826). + + -- Matthias Klose Sun, 26 Aug 2001 13:59:03 +0200 + +gcc-3.0 (1:3.0.2ds0-0pre010825) unstable; urgency=low + + * Update to CVS sources (010825). + * Add libc6-dev-sparc64 to gcc-3.0-sparc64 and to sparc build dependencies. + * Remove conflicts on egcc package (closes: #109718). + * Fix gcc-3.0-nof dependency. + * s390 patches against gcc-3.0.1 (Gerhard Tonn). + * debian/control: Require binutils (>= 2.11.90.0.27) + + -- Matthias Klose Sat, 25 Aug 2001 10:59:15 +0200 + +gcc-3.0 (1:3.0.1ds3-1) unstable; urgency=low + + * Final gcc-3.0.1 release. + * Changed upstream: default of -flimit-inline is 600 (closes: #106716). + * Add fastjar man page (submitted by "The Missing Man Pages Project", + http://www.netmeister.org/misc/m2p2i/) (closes: #103051). + * Fixed in last upload as well: #105246. + * debian/patches/cpp-memory-leak.dpatch: New patch + * Disable installation of shared libgcc on s390 (Gerhard Tonn). + + -- Matthias Klose Mon, 20 Aug 2001 20:47:13 +0200 + +gcc-3.0 (1:3.0.1ds2-0pre010811) unstable; urgency=high + + * Update to CVS sources (010811). Includes s390 support. + * Add xlibs-dev to Build-Depends (libgcj). + * Enable java for powerpc, disable java for ia64. + * Enable ObjC garbage collection for all archs, which have a libgc5-dev + package. + * New patch libstdc++-codecvt (Michael Piefel) (closes: #104614). + * Don't strip static libgcj library (work around binutils bug #107812). + * Handle diversions for upgrade 3.0 -> 3.0.1 in gcc-3.0-sparc64 package + (closes: #107569). + + -- Matthias Klose Sat, 11 Aug 2001 20:42:15 +0200 + +gcc-3.0 (1:3.0.1ds1-0pre010801) unstable; urgency=high + + * Update to CVS sources (010801). (closes: #107012). + * Remove build dependency on non-free graphviz and include pregenerated + docs (closes: #107124). + * Fixed in 3.0.1 (closes: #99307). + * Updated m68k-updates patch (Roman Zippel). + * Another fix for ia64 packaging bits (Randolph Chung). + + -- Matthias Klose Tue, 31 Jul 2001 21:52:55 +0200 + +gcc-3.0 (1:3.0.1ds0-0pre010727) unstable; urgency=high + + * Update to CVS sources (010727). + * Add epoch to source version. Change '.dsx' to 'dsx', so that + 3.1.1ds0 gt 3.1ds7 (closes: #106538). + + -- Matthias Klose Sat, 28 Jul 2001 09:56:29 +0200 + +gcc-3.0 (3.0.1.ds0-0pre010723) unstable; urgency=high + + * ia64 packaging bits (Randolph Chung) (closes: #106252). + + -- Matthias Klose Mon, 23 Jul 2001 23:02:03 +0200 + +gcc-3.0 (3.0.1.ds0-0pre010721) unstable; urgency=high + + * Update to CVS sources (010721). + - Remove patches applied upstream: libstdc++-limits.dpatch, + objc-data-references + - Updated other patches. + * Fix gij alternative (closes: #103468, #103883). + * Patch to fix bootstrap on sparc (closes: #103568). + * Corrected (closes: #105371) and updated README.Debian. + * m68k patches for sucessful bootstrap (Roman Zippel). + * Add libstdc++v3 porting hints to README.Debian and README.C++. + * m68k md fix (#105622) (Roman Zippel). + * debian/rules2: Disable non-functional ulimit on Hurd (#105884). + * debian/control: Require binutils (>= 2.11.90.0.24) + * Java is enabled for alpha (closes: #87300). + + -- Matthias Klose Sun, 22 Jul 2001 08:24:04 +0200 + +gcc-3.0 (3.0.ds9-4) unstable; urgency=high + + * Move this version to testing ASAP. testing still has a prerelease + version with now incompatible ABI's. If sparc doesn't build, + then IMHO it's better to remove it from testing. + * debian/control.m4: Set uploaders field. Adjust description of + gcc-3.0 (binary) package (closes: #102271, #102620). + * Separate gij.1 in it's own pseudo man page (closes: #99523). + * debian/patches/java-manpages.dpatch: New patch. + * libgcj: Install unversioned gij. + + -- Matthias Klose Tue, 3 Jul 2001 07:38:08 +0200 + +gcc-3.0 (3.0.ds9-3) unstable; urgency=high + + * Reenable configuration with posix threads on i386 (lost in hurd-i386 + merge). + + -- Matthias Klose Sun, 24 Jun 2001 22:21:45 +0200 + +gcc-3.0 (3.0.ds9-2) unstable; urgency=medium + + * Move this version to testing ASAP. testing still has a prerelease + version with now incompatible ABI's. + * Add libgcc0 and libgcc300 to the build conflicts (#102041). + * debian/README.FIRST: Removed (#101534). + * Updated subreg-byte patch (doc files). + * Disable java for the Hurd, mips and mipsel (#101570). + * Patch for building on the Hurd (#101708) (Jeff Bailey ). + * Packaging fixes for the Hurd (#101711) (Jeff Bailey ). + * Include pregenerated doxygen (1.2.6) docs for libstdc++-v3 (#101557). + The current doxygen-1.2.8.1 segaults. + * C++: Enable -fuse-cxa-atexit by default (#101901). + * Correct mail address in gccbug (#101743). + * Make rules resumable after failure in binary-xxx targets (#101637). + + -- Matthias Klose Sun, 24 Jun 2001 16:04:53 +0200 + +gcc-3.0 (3.0.ds9-1) unstable; urgency=low + + * Final 3.0 release. + * Update libgcc version number (#100983, #100988, #101069, #101115, #101328). + * Updated hppa-build patch (Matt Taggart ). + * Disable java for hppa. + * Updated subreg-byte patch for sparc (Ben Collins). + + -- Matthias Klose Mon, 18 Jun 2001 18:26:04 +0200 + +gcc-3.0 (3.0.ds8-0pre010613) unstable; urgency=low + + * Update patches for recent (010613 23:13 +0200) CVS sources. + * Fix packaging bugs (#100459, #100447, #100483). + * Build-Depend on gawk, mawk doesn't work well with test_summary. + + -- Matthias Klose Wed, 13 Jun 2001 23:13:38 +0200 + +gcc-3.0 (3.0.ds7-0pre010609) unstable; urgency=low + + * Fix build dependency for the hurd (#99164). + * Update patches for recent (010609) CVS sources. + * Disable java on powerpc (link error in libjava). + * gcc-3.0-base.postinst: Don't prompt for non-interactive installs (#100110). + + -- Matthias Klose Sun, 10 Jun 2001 09:45:57 +0200 + +gcc-3.0 (3.0.ds6-0pre010526) unstable; urgency=high + + * Urgency "high" for replacing the gcc-3.0 snapshots in testing, which + now are incompatile due to the changed ABIs. + * Upstream begins tagging with "gcc-3_0_pre_2001mmdd". + * Tighten dependencies to install only binary packages derived from + one source (#98851). Tighten libc6-dev dependency to match libc6. + + -- Matthias Klose Sun, 27 May 2001 11:35:31 +0200 + +gcc-3.0 (3.0.ds6-0pre010525) unstable; urgency=low + + * ATTENTION: The ABI (exception handling) changed. No upgrade path from + earlier snapshots (you had been warned in the postinst ...) + Closing #93597, #94576, #96448, #96461. + You have to rebuild + * HELP is appreciated for scanning the Debian BTS and sending followups + to bug reports!!! + * Should we name debian gcc uploads? What about a "still seeking + g++ maintainer" upload? + * Fixed in gcc-3.0: #97030 + * Update patches for recent (010525) CVS sources. + * Make check depend on build target (fakeroot problmes). + * debian/rules.d/binary-libgcc.mk: new file, build first. + * Free memory detection on the hurd for running the testsuite. + * Update debhelper build dependency. + * libstdc++-doc: Include doxygen generated docs. + * Fix boring packaging bugs, too tired for appropriate changelogs ... + #93343, #96348, #96262, #97134, #97905, #96451, #95812, #93157 + * Fixed bugs: #87000. + + -- Matthias Klose Sat, 26 May 2001 23:10:42 +0200 + +gcc-3.0 (3.0.ds5-0pre010510) unstable; urgency=low + + * Update patches for recent (010506) CVS sources. + * New version of source, as of 2001-05-10 + * New version of gpc source, as of 2001-05-06 (disabled by default). + * Make gcc-3.0-sparc64 provide an alternative for sparc64-linux-gcc, + since it can build kernels just fine (it seems) + * Add hppa patch from Matt Taggart + * Fix objc info inclusion...now merged with gcc info + * Do not install the .la for libstdc++, since it confuses libtool linked + applications when libstdc++3-dev and libstdc++2.10-dev are both + installed (closes #97905). + * Fixed gcc-base and libgcc section/prio to match overrides + + -- Ben Collins Mon, 7 May 2001 00:08:52 +0200 + +gcc-3.0 (3.0.ds5-0pre010427) unstable; urgency=low + + * Fixed priority for fastjar from optional to extra + * New version of source, as of 2001-04-27 + * Fix description of libgcj-dev + * libffi-install: Make libffi installable + * Add libffi and libffi-dev packages. libffi is only enabled for java + targets right now. Perhaps more will be enabled later. + * Fixes to build cross compiler package (for avr) + (Hakan Ardo ). + * Better fixincludes description (#93157). + * Remove all remnants of libg++ + * Remove all hacks around libstdc++ version. Since we are strictly v3 now, + we can treat it like a normal shared lib, and not worry about all those + ABI changes. + * Remove all cruft control scripts. Note, debhelper will create scripts + that it needs to. It will do the doc link stuff and the ldconfig stuff + explicitly. + * Clean up the SONAME parsing stuff, make it a little more cleaner over + all the lib packages + * Make libffi install when built (IOW, whenever java is enabled). This + should obsolete the libffi package, which is old and broken + * Revert to normal sonames, except for ia64 (for now) + * Remove all references to dh_testversion, since they are deprecated for + Build-Depends + * Fix powerpc nof build + * Remove all references to the MULTILIB stuff, since the arches are + using specialized builds anyway (nof, softfloat). + * Added 64bit sparc64 package (gcc-3.0-sparc64, libgcc0-sparc64) + * Removed obsolete shlibs.local file + + -- Ben Collins Sun, 15 Apr 2001 21:33:15 -0400 + +gcc-3.0 (3.0.ds4-0pre010403) unstable; urgency=low + + * debian/README: Updated for gcc-3.0 + * debian/rules.patch: Added subreg-byte patch for sparc + * debian/rules.unpack: Update to current CVS for gcc tarball name + * debian/patches/subreg-byte.dpatch: sparc subreg-byte support + * debian/patches/gcc-rawhide.dpatch: Removed + debian/patches/gpc-2.95.dpatch: Removed + debian/patches/sparc32-rfi.dpatch: Removed + debian/patches/temporary.dpatch: Removed + * Moving to unstable now + * debian/patches/gcc-ppc-disable-shared-libgcc.dpatch: New patch, + disables shared libgcc for powerpc target, since it isn't compatible + with the EABI objects. + * Create $(with_shared_libgcc) var + * debian/rules.d/binary-gcc.mk: Use this new variable to determine if + the libgcc package actually has any files + + -- Ben Collins Tue, 3 Apr 2001 23:00:55 -0400 + +gcc-3.0 (3.0.ds2-0pre010223) experimental; urgency=low + + * New snapshot. Use distinct shared object names for shared libraries: + we don't know if binary API's still change until the final release. + * Versioned package names. + * debian/control.m4: New file. Add gcc-base, libgcc0, libobjc1, + libstdc++-doc, libgcj1, libgcj1-dev, fastjar, fixincludes packages. + Remove gcc-docs package. + * debian/gcov.1: Remove. + * debian/*: Remove 2.95.x support. Prepare for 3.0. + * debian/patches: Remove 2.95.x patches. + * Changed source package name. It's not allowed anymore to overwrite + source packages with different content. Introducing a 'debian source + element' (.ds), which is stripped again from the version number + for the binary packages. + * Fixed bugs and added functionality: + #26436, #27878, #33786, #34876, #35477, #42662, #46181, #42989, + #47981, #48530, #50529, #51227, #51456, #51651, #52382, #53698, + #55291, #55967, #56867, #58219, #59005, #59232, #59776, #64628, + #65687, #67631, #68632, #68963, #68987, #69530, #72933, #75120, + #75759, #76645, #76827, #83221, #87540 + * libgcj fixes: 42894, #51266, #68560, #71187, #79984 + + -- Matthias Klose Sat, 24 Feb 2001 13:41:11 +0100 + +gcc-2.95 (2.95.3-2.001222) experimental; urgency=low + + * New upstream version 2.95.3 experimental (CVS 20001222). + * debian/control.in: Versioned package names, removal of snapshot logic. + Remove fake gcc-docs package. + * Reserve -1 release numbers for woody. + * Updated to gpc-20001218. + + -- Matthias Klose Fri, 22 Dec 2000 19:53:03 +0100 + +gcc (2.95.2-20) unstable; urgency=low + + * Apply patch from gcc-2_95-branch; remove ulimit for make check. + + -- Matthias Klose Sun, 10 Dec 2000 17:01:13 +0100 + +gcc (2.95.2-19) unstable; urgency=low + + * Added testsuite-20001207 from current snapshots. We'll need results + for 2.95.2 to make sure there are no regressions against that release. + Dear build daemons and porters to other architectures, please send an + email to gcc-testresults@gcc.gnu.org. + You can do this by running "debian/rules mail-summary". + * Updated to gpc-20001206. + * Added S/390 patch prepared by Chu-yeon Park (#78983). + * debian/patches/libio.dpatch: Fix iostream doc (fixes #77647). + * debian/patches/gcc-doc.dpatch: Update URL (fixes #77542). + * debian/patches/gcc-reload1.dpatch Patch from the gcc-bug list which + fixes a problem in "long long" on i[345]86 (i686 was not affected). + + -- Matthias Klose Sat, 9 Dec 2000 12:30:32 +0100 + +gcc (2.95.2-18) unstable; urgency=low + + * debian/control.in: Fix syntax errors (fixes #76146, #76458). + Disable gpc on the hurd by request (#75686). + * debian/patches/arm-various.dpatch: Patches from Philip Blundell + for ARM arch (fixes #75801). + * debian/patches/gcc-alpha-mi-thunk.dpatch: Patches from Chris Chimelis + for alpha arch. + * debian/patches/g77-docs.dpatch: Adjust g77 docs (fixes #72594). + * Update gpc to gpc-20001118. + * Reenable gpc for alpha. + * debian/README.C++: Merge debian/README.libstdc++ and C++ FAQ information + provided by Matt Zimmermann. + * Build gcj only on architectures, where libgcj-2.95.1 can be built as well. + Probably needs some adjustments ... + * Conditionalize for chill, fortran, java, objc and chill. + + * NOT APPLIED: + debian/patches/libstdc++-bastring.dpatch: Apply fix (fixes #75759). + + -- Matthias Klose Sun, 19 Nov 2000 10:40:41 +0100 + +gcc (2.95.2-17) unstable; urgency=low + + * Disable gpc for alpha. + * Include gpc-cpp in gpc package (fixes #74492). + * Don't build gcc-docs compatibility package anymore. + + -- Matthias Klose Wed, 11 Oct 2000 06:16:53 +0200 + +gcc (2.95.2-16) unstable; urgency=low + + * Applied the emdebian/cross compiler patch and documentation + (Frank Smith ). + * Applied patch for avr target (Hakan Ardo ). + * debian/control.in: Add awk to Build-Depends. + Tighten libc6-dev dependency for libstdc++-dev (fixes #73031, + #72531, #72534). + * Disable libobjc_gc for m68k again (fixes #74380). + * debian/patches/arm-namespace.dpatch: Apply patch from Philip + Blundell to fix name space pollution on arm + (fixes #70937). + * Fix more warnings in STL headers (fixes #69352, #71943). + + -- Matthias Klose Mon, 9 Oct 2000 21:51:41 +0200 + +gcc (2.95.2-15) unstable; urgency=low + + * debian/control.in: Add libgc5-dev to build depends (fixes #67015). + * debian/rules.def: Build GC enabled ObjC runtime for sparc. + * Bug #58741 fixed (in some version since 2.95.2-5). + * debian/control.in: Recommend librx1g-dev, libgmp2-dev, libncurses5-dev + (unit dependencies). + * Patches from Marcus Brinkmann for the hurd (fixes #67763): + - debian/rules.defs: Disable objc_gc on hurd-i386. + Disable libg++ on GNU systems. + - debian/rules2: Set correct names of libstdc++/libg++ + libraries on GNU systems. + Write out correct shlibs and shlibs.local file content. + - Keep _G_config.h for the Hurd. + * Apply patch for ObjC linker warnings. + * Don't apply gcj backport patch for sparc. + * Apply libio compatability patch + * debian/glibcver.sh: generate appropriate version for glibc + * debian/rules.conf: for everything after glibc 2.1, we always append + "-glibc$(ver)" to the C++ libs for linux. + * Back down gpc to -13 version (-14 wont compile on anything but i386 + and m68k becuase of gpc). + * Remove extraneous and obsolete sparc64 patches/files from debian/* + + -- Ben Collins Thu, 21 Sep 2000 08:08:35 -0400 + +gcc-snapshot (20000901-2.2) experimental; urgency=low + + * New snapshot. + * debian/rules2: Move tradcpp0 to cpp package. + + -- Matthias Klose Sat, 2 Sep 2000 01:14:28 +0200 + +gcc-snapshot (20000802-2.1) experimental; urgency=low + + * New snapshot. + * debian/rules2: Fixes. tradcpp0 is in gcc package, not cpp. + + -- Matthias Klose Thu, 3 Aug 2000 07:40:05 +0200 + +gcc-snapshot (20000720-2) experimental; urgency=low + + * New snapshot. + * Enable libstdc++-v3. + * debian/rules2: Don't use -D for /usr/bin/install. + + -- Matthias Klose Thu, 20 Jul 2000 22:33:37 +0200 + +gcc (2.95.2-14) unstable; urgency=low + + * Update gpc patch. + + -- Matthias Klose Wed, 5 Jul 2000 20:51:16 +0200 + +gcc (2.95.2-13) frozen unstable; urgency=low + + * Update debian/README: document how to compile 2.0.xx kernels; don't + register gcc272 as an alternative for gcc (closes #62419). + Clarify compiler setup (closes #65548). + * debian/control.in: Make libstdc++-dev depend on current version of g++. + * Undo CVS update from release -8 (problems on alpha, #55263). + + -- Matthias Klose Mon, 19 Jun 2000 23:06:48 +0200 + +gcc (2.95.2-12) frozen unstable; urgency=low + + * debian/gpc.postinst: Correct typo introduced with -11 (fixes #64193). + * debian/patches/gcc-rs600.dpatch: ppc codegen fix (fixes #63933). + + -- Matthias Klose Sun, 21 May 2000 15:56:05 +0200 + +gcc (2.95.2-11) frozen unstable; urgency=medium + + * Upload to unstable again (fixes critical #63784). + * Fix doc-base files (fixes important #63810). + * gpc wasn't built in -10 (fixes #63977). + * Make /usr/bin/pc an alternative (fixes #63888). + * Add SYSCALLS.c.X to gcc package. + + -- Matthias Klose Sun, 14 May 2000 22:17:44 +0200 + +gcc (2.95.2-10) frozen; urgency=low + + * debian/control.in: make gcc conflict on any version of egcc + (slink to potato upgrade problem, fixes grave #62084). + * Build protoize programs, separate out in new package (fixes #59436, + #62911). + * Create dummy gcc-docs package for smooth update from slink (fixes #62537). + * Add doc-base support for all -doc packages (fixes #63380). + + -- Matthias Klose Mon, 1 May 2000 22:24:28 +0200 + +gcc (2.95.2-9) frozen unstable; urgency=low + + * Disable the sparc-bi-arch.dpatch (patch from Ben Collins, built + for sparc as NMU 8.1) (fixes critical #61529 and #61511). + "Seems that when you compile gcc 2.95.x for sparc64-linux and compile + sparc32 programs, the code is not the same as sparc-linux compile for + sparc32 (this is a bug, and is fixed in gcc 2.96 CVS)." + * debian/patches/gcj-vs-iconv.dpatch: Option '--encoding' for + encoding of input files. Patch from Tom Tromey + backported to 2.95.2 (fixes #42895). + Compile a Latin-1 encoded file with `gcj --encoding=Latin1 ...'. + * debian/control.in: gcc, g++ and gobjc suggest their corresponding + task packages (fixes #59623). + + -- Matthias Klose Sat, 8 Apr 2000 20:19:15 +0200 + +gcc (2.95.2-8) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000313. + * debian/rules2: configure with --enable-java-gc=no for sparc. Fixes + gcj side of #60535. + * debian/rules.patch: Disable gcc-emit-rtl patch for all archs but + alpha. Disable g++-is-tree patch ("just for 2.95.1"). + * debian/README: Update for gcc-2.95. + + -- Matthias Klose Mon, 27 Mar 2000 00:03:16 +0200 + +gcc (2.95.2-7) frozen unstable; urgency=low + + * debian/patches/gcc-empty-struct-init.dpatch; Apply patch from + http://gcc.gnu.org/ml/gcc-patches/2000-02/msg00637.html. Fixes + compilation of 2.3.4x kernels. + * debian/patches/gcc-emit-rtl.dpatch: Apply patch from David Huggins-Daines + (backport from 2.96 CVS to fix #55263). + * debian/patches/gcc-pointer-arith.dpatch: Apply patch from Jim Kingdon + (backport from 2.96 CVS to fix #54951). + + -- Matthias Klose Thu, 2 Mar 2000 23:16:43 +0100 + +gcc (2.95.2-6) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000220. + * Remove dangling symlink probably left over from libstdc++2.9 + package (fixes #53661). + * debian/patches/gcc-alpha-complex-float.dpatch: Fixed patch by + David Huggins-Daines (fixes #58486). + * debian/g++.{postinst,prerm}: Remove outdated g++FAQ registration + (fixes #58253). + * debian/control.in: gcc-doc replaces gcc-docs (fixes #58108). + * debian/rules2: Include some fixed headers (asm, bits, linux, ...). + * debian/patches/{gcc-alpha-ev5-fix,libstdc++-valarray}.dpatch: Remove. + Applied upstream. + * debian/patches/libstdc++-bastring.dpatch: Add patch from + sicard@bigruth.solsoft.fr (fixes #56715). + + -- Matthias Klose Sun, 20 Feb 2000 15:08:13 +0100 + +gcc (2.95.2-5) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000116. + * Add more build dependencies (fixes #53204). + * debian/patches/gcc-alpha-complex-float.dpatch: Patch from + Joel Klecker to compile glibc correctly on alpha. + "Should fix the g77 problems too." + * debian/patches/{libio,libstdc++-wall2}.dpatch. Remove patches + applied upstream. + + -- Matthias Klose Sun, 16 Jan 2000 19:16:54 +0100 + +gcc (2.95.2-4) unstable; urgency=low + + * debian/patches/libio.dpatch: Patch from Martin v. Loewis. + (fixes: #35628). + * debian/patches/libstdc++-deque.dpatch: Patch from Martin v. Loewis. + (fixes: #52689). + * debian/control.in: Updated Build-Depends, removed outdated README.build. + Fixes #51246. + * Tighten dependencies to cpp (>= 2.95.2-4) (closes: #50294). + * debian/rules.patch: Really do not apply patches/gcj-backport.dpatch. + Fixes #51636. + * Apply updated sparc-bi-arch.dpatch from Ben Collins. + * libstdc++: Define wstring type, if __ENABLE_WSTRING is defined. Request + from the author of the War FTP Daemon for Linux ("Jarle Aase" + ). + * debain/g++.preinst: Remove dangling sysmlinks (fixes #52359). + + -- Matthias Klose Sun, 19 Dec 1999 21:53:48 +0100 + +gcc (2.95.2-3) unstable; urgency=low + + * debian/rules2: Don't install $(gcc_lib_dir)/include/asm; these are + headers fixed for glibc-1.x (closes: #49434). + * debian/patches/cpp-dos-newlines.dpatch: Keep CR's without + following LF (closes: #49186). + * Bug #37358 (internal compiler errors when building vdk_0.6.0-5) + fixed in gcc-2.95.? (closes: #37358). + * Apply patch gcc-alpha-ev5-fix from Richard Henderson + (should fix #48527 and #46963). + * debian/README.Bugs: Documented non bug #44554. + * Applied patch from Alexandre Oliva to fix gpc boostrap on alpha. + Reenabled gpc on all architectures. + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 19991108. + * Explicitely generate postinst/prerm chunks for usr/doc transition. + debhelper currently doesn't handle generation for packages with + symlinked directories. + * debian/patches/libstdc++-wall3.dpatch: Fix warnings in stl_deque.h + and stl_rope.h (closes: #46444, #46720). + * debian/patches/gcj-backport.dpatch: Add file, don't apply (yet). + + -- Matthias Klose Wed, 10 Nov 1999 18:58:45 +0100 + +gcc (2.95.2-2) unstable; urgency=low + + * New gpc-19991030 snapshot. + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 19991103. + * Reintegrated sparc patches (bcollins@debian.org), which were lost + in 2.95.2-1. + * debian/rules2: Only install $(gcc_lib_dir)/include/asm, when existing. + * debian/patches/gpc-2.95.{dpatch,diff}: updated patch to drop + initialization in stor-layout.c. + * debian/NEWS.gcc: Updated for gcc-2.95.2. + * debian/bugs/bug-...: Removed testcases for fixed bugs. + * debian/patches/...dpatch: Removed patches applied upstream. + * debian/{rules2,g++.postinst,g++.prerm}: Handle c++ alternative. + * debian/changelog: Merged gcc272, egcs and snapshot changelogs. + + -- Matthias Klose Tue, 2 Nov 1999 23:09:23 +0200 + +gcc (2.95.2-1.1) unstable; urgency=low + + * Most of the powerpc patches have been applied upstream. Remove all + but ppc-ice, ppc-andrew-dwarf-eh, and ppc-descriptions. + * mulilib-install.dpatch was definitely a bad idea. Fix it properly + by using install -D. + * Also, don't make directories before installing any more. Simplifies + rules a (tiny) bit. + * Do not build with LDFLAGS=-s. Everything gets stripped out anyway by + dh_strip -a -X_debug; so leave the binaries in the build tree with + debugging symbols for simplified debugging of the packages. + + -- Daniel Jacobowitz Sat, 30 Oct 1999 12:40:12 -0400 + +gcc (2.95.2-1) unstable; urgency=low + + * gcc-2.95.2 release (taken from the CVS archive). -fstrict-aliasing + is disabled upstream. + + -- Matthias Klose Mon, 25 Oct 1999 10:26:19 +0200 + +gcc (2.95.2-0pre4) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19991021. + * Updated gpc to gpc-19991018 snapshot (closes: #33037, #47453). + Enable gpc for all architectures ... + * Document gcc exit codes (closes: #43863). + * According to the bug submitter (Sergey V Kovalyov ) + the original source of these CERN librarties is outdated now. The latest + version of cernlibs compiles and works fine with slink (closes #31546). + * According to the bug submitter (Gergely Madarasz ), + the problem triggered on i386 cannot be reproduced with the current + jade and php3 versions anymore (closes: #35215). + * Replace corrupted m68k-pic.dpatch (from Roman Hodek and Andreas Schwab + and apply to + all architectures (closes: #48011). + * According to the bug submitter (Herbert Xu ) + this bug "probably has been fixed". Setting it to severity "fixed" + (fixes: #39616), will close it later ... + * debian/README.Bugs: Document throwing C++ exceptions "through" C + libraries (closes: #22769). + + -- Matthias Klose Fri, 22 Oct 1999 20:33:00 +0200 + +gcc (2.95.2-0pre3) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19991019. + * Apply NMU patches (closes: #46217). + * debian/control.in: Fix egcs64 conflict-dependency for sparc + architecture (closes: #47088). + * debian/rules2: dbg-packages share doc dir with lib packages + (closes #45067). + * debian/patches/gcj-debian-policy.dpatch: Patch from Stephane + Bortzmeyer to conform to Debian policy (closes: #44463). + * debian/bugs/bug-*: Added test cases for new bug reports. + * debian/patches/libstdc++-bastring.dpatch: Patch by Richard Kettlewell + (closes #46550). + * debian/rules.patch: Apply libstdc++-wall2 patch (closes #46609). + * debian/README: Fix typo (closes: #45253). + * debian/control.in: Remove primary/secondary distinction; + dbg-packages don't provide their normal counterparts (closes #45206). + * debian/rules.patch: gcc-combine patch applied upstream. + * debian/rules2: Only use mail if with_check is set (off by default). + * debian/rules.conf: Tighten binutils dependency to 2.9.5.0.12. + + -- Matthias Klose Tue, 19 Oct 1999 20:33:00 +0200 + +gcc (2.95.2-0pre2.0.2) unstable; urgency=HIGH (for m68k) + + * Binary-only NMU for m68k as quick fix for another bug; the patch + is in CVS already, too. + * Applied another patch by Andreas Schwab to fix %a5 restauration in + some cases. + + -- Roman Hodek Thu, 30 Sep 1999 16:09:15 +0200 + +gcc (2.95.2-0pre2.0.1) unstable; urgency=HIGH (for m68k) + + * Binary-only NMU for m68k as quick fix for serious bugs; the patches + are already checked into gcc CVS and should be in the next official + version, too. + * Applied two patches by Andreas Schwab to fix -fpic and loop optimization. + + -- Roman Hodek Mon, 27 Sep 1999 15:32:49 +0200 + +gcc (2.95.2-0pre2) unstable; urgency=low + + * Fixed in 2.95.2 (closes: #43478). + * Previous version had Pascal examples missing in doc directory. + + -- Matthias Klose Wed, 8 Sep 1999 22:18:17 +0200 + +gcc (2.95.2-0pre1) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19990828. + * Apply work around memory corruption (just for 2.95.1) by + Daniel Jacobowitz . + * debian/patches/libstdc++-wall2.dpatch: Patch from Franck Sicard + to fix some warnings (closes: #44670). + * debian/patches/libstdc++-valarray.dpatch: Patch from Hideaki Fujitani + to fix a bug in valarray_array.h. + * Applied NMU from Jim Pick minus the jump.c and fold-const.c patches + already in the gcc-2_95-branch (closes: #44690). + * Conform to debian-java policy (closes: #44463). + * Move docs to /usr/share/doc (closes: #44782). + * Remove debian/patches/gcc-align.dpatch applied upstream. + * debian/*.postinst: Call install-info only, when configuring. + * debian/*.{postinst,prerm}: Add #DEBHELPER# comments to handle + /usr/doc -> /usr/share/doc transition. + + -- Matthias Klose Wed, 8 Sep 1999 22:18:17 +0200 + +gcc (2.95.1-2.1) unstable; urgency=low + + * Non-maintainer upload. + * ARM platform no longer needs library-prefix patch. + * Updated patches from Philip Blundell. + + -- Jim Pick Wed, 8 Sep 1999 20:14:07 -0700 + +gcc (2.95.1-2) unstable; urgency=low + + * debian/gcc.{postinst,prerm}: gcc provides an alternative for + sparc64-linux-gcc. + * Applied patch from Ben Collins to enable bi-architecture (32/64) + support for sparc. + * Rebuild debian/control and debian/rules.parameters after unpacking. + * debian/rules2: binary-indep. Conditionalize on with_pascal. + + -- Matthias Klose Sat, 4 Sep 1999 13:47:30 +0200 + +gcc (2.95.1-1) unstable; urgency=low + + * Updated to release gcc-2.95.1 and cvs updates of the gcc-2_95-branch + until 19990828. + * debian/README.gcc: Updated NEWS file to include 2.95 and 2.95.1 news. + * debian/README.java: New file. + * debian/rules.defs: Disabled gpc for alpha, arm. Disabled ObjC-GC + for alpha. + * debian/rules [clean]: Remove debian/rules.parameters. + * debian/rules2 [binary-arch]: Call dh_shlibdeps with LD_LIBRARY_PATH set + to installation dir of libstdc++. Why isn't this the default? + * debian/control.in: *-dev packages do not longer conflict with + libg++272-dev package. + * Apply http://egcs.cygnus.com/ml/gcc-patches/1999-08/msg00599.html. + * Only define BAD_THROW_ALLOC, when using exceptions (fixes #43462). + * For ObjC (when configured with GC) recommend libgc4-dev, not libgc4. + * New version of 68060 build patch. + * debian/rules.conf: For m68k, depend on binutils version 2.9.1. + + -- Matthias Klose Sat, 28 Aug 1999 18:16:31 +0200 + +gcc (2.95.1-0pre2) unstable; urgency=medium + + * gpc is back again (fixes grave #43022). + * debian/patches/gpc-updates.dpatch: Patches sent to upstream authors. + * Work around the fatal dependtry assertion failure bug in dpkg (hint + from "Antti-Juhani Kaijanaho" , fixes important #43072). + + -- Matthias Klose Mon, 16 Aug 1999 19:34:14 +0200 + +gcc (2.95.1-0pre1) unstable; urgency=low + + * Updated to cvs 19990815 gcc-2_95-branch; included install docs and + FAQ from 2.95 release; upload source package as well. + * Source package contains tarballs only (gcc, libg++, installdocs). + * debian/rules: Splitted into debian/rules{,.unpack,.patch,.conf,2}. + * debian/gcc.postinst: s/any key/RETURN; warn only when upgrading from + pre 2.95 version; reference /usr/doc, not /usr/share/doc. + * Checked syntax for attributes of functions; checked for #35068; + checked for bad gmon.out files (at least with libc6 2.1.2-0pre5 and + binutils 2.9.1.0.25-2 the problem doesn't show up anymore). + * debian/patches/cpp-macro-doc.dpatch: Document macro varargs in cpp.texi. + * gcc is primary compiler for all platforms but m68k. Setting + severity of #22513 to fixed. + * debian/patches/gcc-default-arch.dpatch: New patch to enable generation + of i386 instruction as default (fixes #42743). + * debian/rules: Removed outdated gcc NEWS file (fixes #42742). + * debian/patches/libstdc++-out-of-mem.dpatch: Throw exception instead + of aborting when out of memory (fixes #42622). + * debian/patches/cpp-dos-newlines.dpatch: Handle ibackslashes after + DOS newlines (fixes #29240). + * Fixed in gcc-2.95.1: #43001. + * Bugs closed in this version: + Closes: #11525, #12253, #22513, #29240, #35068, #36182, #42584, #42585, + #42602, #42622, #42742 #42743, #43001, #43002. + + -- Matthias Klose Sun, 15 Aug 1999 10:31:50 +0200 + +gcc (2.95-3) unstable; urgency=high + + * Provide /lib/cpp again (fixes important bug #42524). + * Updated to cvs 19990805 gcc-2_95-branch. + * Build with the default scheduler. + * Apply install-multilib patch from Dan Jacobowitz. + * Apply revised cpp-A- patch from Dan Jacobowitz. + + -- Matthias Klose Fri, 6 Aug 1999 07:25:19 +0200 + +gcc (2.95-2) unstable; urgency=low + + * Remove /lib/cpp. This driver uses files from /usr/lib/gcc-lib anyway. + * The following bugs are fixed (compared to egcs-1.1.2). + Closes: #4429, #20889, #21122, #26369, #28417, #28261, #31416, #35261, + #35900, #35906, #38246, #38872, #39098, #39526, #40659, #40991, #41117, + #41290, #41302, #41313. + * The following by Joel Klecker: + - Adopt dpkg-architecture variables. + - Go back to SHELL = bash -e or it breaks where /bin/sh is not bash. + - Disabled the testsuite, it is not included in the gcc 2.95 release. + + -- Matthias Klose Sat, 31 Jul 1999 18:00:42 +0200 + +gcc (2.95-1) unstable; urgency=low + + * Update for official gcc-2.95 release. + * Built without gpc. + * debian/rules: Remove g++FAQ from rules, which is outdated. + For ix86, build for i386, not i486. + * Apply patch from Jim Pick for building multilib package on arm. + + -- Matthias Klose Sat, 31 Jul 1999 16:38:21 +0200 + +gcc (2.95-0pre10) unstable; urgency=low + + * Use ../builddir-gcc-$(VER) by default instead of ./builddir; upstream + strongly advises configuring outside of the source tree, and it makes + some things much easier. + * Add patch to prevent @local branches to weak symbols on powerpc (fixes + apt compilation). + * Add patch to make cpp -A- work as expected. + * Renamed debian/patches/ppc-library-prefix.dpatch to library-prefix.dpatch; + apply on all architectures. + * debian/control.in: Remove snapshot dependencies. + * debian/*.postinst: Reflect use of /usr/share/{info,man}. + + -- Daniel Jacobowitz Thu, 22 Jul 1999 19:27:12 -0400 + +gcc (2.95-0pre9) unstable; urgency=low + + * The following bugs are fixed (compared to egcs-1.1.2): #4429, #20889, + #21122, #26369, #28417, #28261, #35261, #38246, #38872, #39526, #40659, + #40991, #41117, #41290. + * Updated to CVS gcc-19990718 snapshot. + * debian/control.in: Removed references to egcs in descriptions. + Changed gcj's Recommends libgcj-dev to Depends. + * debian/rules: Apply ppc-library-prefix for alpha as well. + * debian/patches/arm-config.dpatch: Updated patch sent by Jim Pick. + + -- Matthias Klose Sun, 18 Jul 1999 12:21:07 +0200 + +gcc (2.95-0pre8) unstable; urgency=low + + * Updated CVS. + * debian/copyright: s%doc/copyright%share/common-licenses% + * debian/README.Bugs: s/egcs.cygnus.com/gcc.gnu.org/ s/egcs-bugs/gcc-bugs/ + * debian/patches/reporting.dpatch: Remake diff for current sources. + * debian/libstdc++-dev.postinst: It's /usr/share/info/iostream.info. + * debian/rules: Current dejagnu snapshot reports a framework version + of 1.3.1. + + -- Joel Klecker Sun, 18 Jul 1999 02:09:57 -0700 + +gcc-snapshot (19990714-0pre6) experimental; urgency=low + + * Updated to CVS gcc-19990714 snapshot. + * Applied ARM patch (#40515). + * Converted DOS style linefeeds in debian/patches/ppc-* files. + * debian/rules: Reflect change in gcc/version.c; use sh -e as shell: + for some obscure reason, bash -e doesn't work. + * Reflect version change for libstdc++ (2.10). Remove libg++-name + patch; libg++ now has version 2.8.1.3. Removed libc version from + the package name. + + -- Matthias Klose Wed, 14 Jul 1999 18:43:57 +0200 + +gcc-snapshot (19990625-0pre5.1) experimental; urgency=low + + * Non-maintainer upload. + * Added ARM specific patch. + + -- Jim Pick Tue, 29 Jun 1999 22:36:08 -0700 + +gcc-snapshot (19990625-0pre5) experimental; urgency=low + + * Updated to CVS gcc-19990625 snapshot. + + -- Matthias Klose Fri, 25 Jun 1999 16:11:53 +0200 + +gcc-snapshot (19990609-0pre4.1) experimental; urgency=low + + * Added and re-added a few last PPC patches. + + -- Daniel Jacobowitz Sat, 12 Jun 1999 16:48:01 -0500 + +gcc-snapshot (19990609-0pre4) experimental; urgency=low + + * Updated to CVS egcs-19990611 snapshot. + + -- Matthias Klose Fri, 11 Jun 1999 10:20:09 +0200 + +gcc-snapshot (19990609-0pre3) experimental; urgency=low + + * CVS gcc-19990609 snapshot. + * New gpc-19990607 snapshot. + + -- Matthias Klose Wed, 9 Jun 1999 19:40:44 +0200 + +gcc-snapshot (19990524-0pre1) experimental; urgency=low + + * egcs-19990524 snapshot. + * First snapshot of the gcc-2_95-branch. egcs-1.2 is renamed to gcc-2.95, + which is now the "official" successor to gcc-2.8.1. The full version + name is: gcc-2.95 19990521 (prerelease). + * debian/control.in: Changed maintainers to `Debian GCC maintainers'. + * Moved all version numbers to epoch 1. + * debian/rules: Major changes. The support for secondary compilers + was already removed for the egcs-1.2 snapshots. Many fixes by + Joel Klecker . + - Send mail to Debian maintainers for successful builds. + - Fix VER and VERNO sed expressions. + - Replace remaining GNUARCH occurrences. + * New gpc snapshot (but don't build). + * debian/patches/valarray.dpatch: Backport from libstdc++-v3. + * debian/gcc-doc.*: Info is now gcc.info* (Joel Klecker ). + * Use cpp driver provided by the package. + * New script c89 (fixes #28261). + + -- Matthias Klose Sat, 22 May 1999 16:10:36 +0200 + +egcs (1.1.2-2) unstable; urgency=low + + * Integrate NMU's for arm and sparc (fixes #37582, #36857). + * Apply patch for the Hurd (fixes #37753). + * Describe open bugs in TODO.Debian. Please have a look if you can help. + * Update README / math functions section (fixes #35906). + * Done by J.H.M. Dassen (Ray) : + - At Richard Braakman's request, made -dbg packages for libstdc++ + and libg++. + - Provide egcc(1) (fixes lintian error). + + -- Matthias Klose Sun, 16 May 1999 14:30:56 +0200 + +egcs-snapshot (19990502-1) experimental; urgency=low + + * New snapshot. + + -- Matthias Klose Thu, 6 May 1999 11:51:02 +0200 + +egcs-snapshot (19990418-2) experimental; urgency=low + + * Merged Rays changes to build debug packages. + + -- Matthias Klose Wed, 21 Apr 1999 16:54:56 +0200 + +egcs-snapshot (19990418-1) experimental; urgency=low + + * New snapshot. + * Disable cpplib. + + -- Matthias Klose Mon, 19 Apr 1999 11:32:19 +0200 + +egcs (1.1.2-1.2) unstable; urgency=low + + * NMU for arm + * Added arm-optimizer.dpatch with optimizer workaround for ARM + + -- Jim Pick Mon, 19 Apr 1999 06:17:13 -0700 + +egcs (1.1.2-1.1) unstable; urgency=low + + * NMU for sparc + * Included dpatch to modify the references to gcc/crtstuff.c so that + __register_frame_info is not a weak reference. This allows potato to + remain binary compatible with slink, while still retaining compatibility + with other sparc/egcs1.1.2 distributions. Diff in .dpatch format has + been sent to the maintainer with a note it may not be needed for 1.1.3. + + -- Ben Collins Tue, 27 Apr 1999 10:15:03 -0600 + +egcs (1.1.2-1) unstable; urgency=low + + * Final egcs-1.1.2 release built for potato as primary compiler + for all architectures except m68k. + + -- J.H.M. Dassen (Ray) Thu, 8 Apr 1999 13:14:29 +0200 + +egcs-snapshot (19990321-1) experimental; urgency=low + + * New snapshot. + * Disable gpc. + * debian/rules: Simplified (no secondary compiler, bumped all versions + to same epoch, libapi patch is included upstream). + * Separated out cpp documentation to cpp-doc package. + * Fixed in this version: #28417. + + -- Matthias Klose Tue, 23 Mar 1999 02:11:18 +0100 + +egcs (1.1.2-0slink2) stable; urgency=low + + * Applied H.J.Lu's egcs-19990315.linux patch. + * Install faq.html and egcs-1.1.2 announcment. + + -- Matthias Klose Tue, 23 Mar 1999 01:14:54 +0100 + +egcs (1.1.2-0slink1) stable; urgency=low + + * Final egcs-1.1.2 release; compiled with glibc-2.0 for slink on i386. + * debian/control.in: gcc provides egcc, when FIRST_PRIMARY defined. + * Fixes #30767, #32278, #34252, #34352. + * Don't build the libstdc++.so.2.9 library on architectures, which have + switched to glibc-2.1. + + -- Matthias Klose Wed, 17 Mar 1999 12:55:59 +0100 + +egcs (1.1.1.63-2.2) unstable; urgency=low + + * Non-maintainer upload. + * Incorporate patch from Joel Klecker to fix snapshot packages + by moving/removing the application of libapi. + * Disable the new libstdc++-dev-config and the postinst message in + glibc 2.1 versions. + + -- Daniel Jacobowitz Mon, 12 Mar 1999 14:16:02 -0500 + +egcs (1.1.1.63-2.1) unstable; urgency=low + + * Non-maintainer upload. + * Compile with glibc 2.1 release version. + * New upstream version egcs-1.1.2 pre3. + * Miscellaneous rules updates (see changelog.snapshot). + * New set of powerpc-related patches from Franz Sirl, + . + * Disable libgcc.dpatch (new solution implemented upstream). Remove it. + * Also pass $target to config.if. + * Enable Dwarf2 EH for powerpc. Bump the C++ binary version. No + loss in -backwards- compatibility as far as I can tell, so add a + compatibility symlink, and add to shlibs file. + * Add --no-backup-if-mismatch to the debian/patches/*.dpatch files, + to prevent bogus .orig's in diffs. + * Merged with (unreleased) 1.1.1.62-1 and 1.1.1.63-{1,2} packages from + Matthias Klose . + * Stop adding a backwards compatibility link for egcs-nof on powerpc. + To my knowledge, nothing uses it. Do add the libstdc++ API change + link, though. + + -- Daniel Jacobowitz Mon, 8 Mar 1999 14:24:01 -0500 + +egcs (1.1.1.63-2) stable; urgency=low + + * Provide a libstdc++ with a shared object name, which is compatible + to other distributions. Documented the change in README.Debian, + the libstdc++-2.9.postinst and the libstdc++-dev-config script. + + -- Matthias Klose Fri, 12 Mar 1999 00:36:20 +0100 + +egcs (1.1.1.63-1.1) unstable; urgency=low + + * Non-Maintainer release. + * Build against glibc 2.1. + * Make egcs the primary compiler on i386. + * Also confilct with egcc (<< FIRST_PRIMARY) + if FIRST_PRIMARY is defined. + (this tells dpkg that gcc completely obsoletes egcc) + * Remove hjl-12 patch again, HJL says it should not be + necessary with egcs 1.1.2. + (as per forwarded reply from Christopher Chimelis) + * Apply libapi patch in clean target before regenerating debian/control + and remove the patch afterward. Otherwise, the libstdc++ and libg++ + package names are generated wrong on a glibc 2.1 system. + + -- Joel Klecker Tue, 9 Mar 1999 15:31:02 -0800 + +egcs (1.1.1.63-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre3. + * Applied improved libstdc++ warning patch from Rob Browning. + + -- Matthias Klose Tue, 9 Mar 1999 16:14:07 +0100 + +egcs (1.1.1.62-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre2. + * New upstream version libg++-2.8.1.3. + * Readded ARM support + * Readded hjl-12 per request from Christopher C Chimelis + + + -- Matthias Klose Fri, 26 Feb 1999 09:54:01 +0100 + +egcs-snapshot (19990224-0.1) experimental; urgency=low + + * New snapshot. + * Add the ability to disable CPPLIB by setting CPPLIB=no in + the environment. + * Disable gpc for powerpc; I spent a long time getting it to + make correctly, and then it goes and ICEs. + + -- Daniel Jacobowitz Tue, 24 Feb 1999 23:34:12 -0500 + +egcs (1.1.1.61-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre1. + * debian/control.in: Applied patch from bug report #32987. + * Split up H.J.Lu's hjl-19990115-linux patch into several small + chunks: libapi, arm-mips, libgcc, hjl-other. The changelog.Linux + aren't included in the separate chunks. Please refer to the + unmodified hjl-19990115-linux patch file in the egcs source pkg. + * Apply warning patch to fix the annoying spew you get if you try to + use ropes or deques with -Wall (which makes -Wall mostly useless for + spotting errors in your own code). Fixes #32996. + * debian/rules: Unapply patches in the exact reverse order they were + applied. + + -- Matthias Klose Sat, 20 Feb 1999 22:06:21 +0100 + +egcs (1.1.1-5) frozen unstable; urgency=medium + + * Move libgcc.map file to g++ package, where gcc is the secondary + compiler (fixes #32329, #32605, #32631). + * Prepare to rename libstdc++2.9 package for glibc-2.1 (fixes #32148). + * Apply NMU patch for arm architecure (fixes #32367). + * Don't apply hjl-12 patch for alpha architectures (requested by the + alpha developers, Christopher C Chimelis ). + * Call makeinfo with --no-validate to fix obscure build failure on alpha. + * Build gpc info files in doc subdirectory. + * Remove c++filt diversion (C++ name demangling patch is now in binutils, + fixes #30820 and #32502). + + -- Matthias Klose Sun, 31 Jan 1999 23:19:35 +0100 + +egcs (1.1.1-4.1) unstable; urgency=low + + * Non-maintainer upload. + * Pascal doesn't build for ARM. + + -- Jim Pick Sun, 24 Jan 1999 16:13:34 -0800 + +egcs (1.1.1-4) frozen unstable; urgency=high + + * Don't strip compiler libraries libgcc.a libobjc.a libg2c.a libgpc.a + * Move Pascal examples to the right place (fixes #32149, part 1). + * Add dependencies for switching from secondary to primary compiler, + if FIRST_PRIMARY is defined (fixes #32149, part 2). + + -- Matthias Klose Wed, 20 Jan 1999 16:51:30 +0100 + +egcs (1.1.1-3) frozen unstable; urgency=low + + * Updated with the H.J.Lu's hjl-19990115-linux patch (fixes the + __register_frame_info problems, mips and arm port included). + * Update gpc to 19990118 (beta release candidate). + * Strip static libraries (fixes #31247 and #31248). + * Changed maintainer address. + + -- Matthias Klose Tue, 19 Jan 1999 16:34:28 +0100 + +egcs (1.1.1-2) frozen unstable; urgency=low + + * Moved egcs-docs, g77-doc and gpc-doc packages to doc section. + * Downgraded Recommends: egcs-docs to Suggests: egcs-docs dependencies + (for archs, where egcs is the primary compiler). + * Add 'Suggests: stl-manual' dependency to libstdc++2.9-dev. + * Applied one more alpha patch: + ftp://ftp.yggdrasil.com/private/hjl/egcs/1.1.1/egcs-1.1.1.diff.12.gz + * Applied PPro optimization patch. + * Apply emit-rtl-nan patch. + * Upgraded to libg++-2.8.1.2a-19981218.tar.gz. + * Upgraded to gpc-19981218. + * Make symlinks for gobjc, libstdc++2.9-dev and libg++2.8.2 doc directories. + + -- Matthias Klose Wed, 23 Dec 1998 18:04:53 +0200 + +egcs-snapshot (19981211-1) experimental; urgency=low + + * New snapshot. + * Adapted gpc to egcs-2.92.x (BOOT_CFLAGS must include -g). + * New libg++-2.8.1.2a-19981209.tar.gz. + * debian/rules: new target mail-summary. + + -- Matthias Klose Fri, 11 Dec 1998 18:14:53 +0200 + +egcs (1.1.1-1) frozen unstable; urgency=high + + * Final egcs-1.1.1 release. + * The last version depended on a versioned libc6 again. + * Add lost dependency for libg++ on libstdc++. + * Added debian-libstdc++.sh script to generate a libstdc++ on a Linux + system, which doesn't use the libapi patch. + + -- Matthias Klose Wed, 2 Dec 1998 12:06:15 +0200 + +egcs (1.1.0.91.59-2) frozen unstable; urgency=high + + * Fixes bugs from libc6 2.0.7u-6 upload without dependency line + Conflicts: libstdc++-2.9 (<< 2.91.59): #30019, #30066, #30078. + * debian/copyright: Updated URLs. + * gcc --help now mentions /usr/doc/debian/bug-reporting.txt. + * Install README.Debian and include information about patches applied. + * Depend on unversioned libc6 on i386, such that libstdc++2.9 can be used + on a hamm system. + + -- Matthias Klose Fri, 27 Nov 1998 18:32:02 +0200 + +egcs (1.1.0.91.59-1) frozen unstable; urgency=low + + * This is egcs-1.1.1 prerelease #3, compiled with libc6 2.0.7u-6. + * Added dependency for libstdc++2.9-dev on g++ (fixes #29631). + * Package g77 provides f77 (fixes #29817). + * Already fixed in earlier egcs-1.1 releases: #2493, #25271, #10620. + * Bugs reported for gcc-2.7.x and fixed in the egcs version of gcc: + #2493, #4430, #4954, #5367, #6047, #10612, #12375, #20606, #24788, #26100. + * Upgraded libg++ to libg++-2.8.1.2a-19981114. + * Upgraded gpc to gpc-19981124. + * Close #25869: egcs and splay maintainers are unable to reproduce this + bug with the current Debian packages. Bug submitter doesn't respond. + * Close #25407: egcs maintainer cannot reproduce this bug with the current + Debian compiler. Bug submitter doesn't respond. + * Use debhelper 1.2.7 for building. + * Replace the libstdc++ and libg++ compatibility links with fake libraries. + + -- Matthias Klose Wed, 25 Nov 1998 12:11:42 +0200 + +egcs (1.1.0.91.58-5) frozen unstable; urgency=low + + * Applied patch to build on the m68060. + * Added c++filt and c++filt.1 to the g++ package. + * Updated gpc to gpc-981105; fixes some regressions compared to egcs-1.1. + * Separated out g77 and gpc doumentation to new packages g77-doc and gpc-doc. + * Closed bugs (#22158). + * Close #20248; on platforms where gas and gld are the default versions, + it makes no difference to configure with or without enable-ld. + * Close #24349. The bugs are in the amulet source. + See http://www.cs.cmu.edu/afs/cs/project/amulet/www/FAQ.html#GCC28x + * Rename gcc.info* files to egcs.info* (fixes #24088). + * Documented known bugs (and workarounds) in BUGS.Debian. + * Fixed demangling of C++ names (fixes #28787). + * Applied patch form aspell to libstdc++/stl/stl_rope.h. + * Updated from cvs 16 Nov 1998. + + -- Matthias Klose Tue, 17 Nov 1998 09:41:24 +0200 + +egcs-snapshot (19981115-2) experimental; urgency=low + + * New snapshot. Disabled gpc. + * New packages g77-doc and gpc-doc. + + -- Matthias Klose Mon, 16 Nov 1998 12:48:09 +0200 + +egcs (1.1.0.91.58-3) frozen unstable; urgency=low + + * Previous version installed in potato, not slink. + * Updated from cvs 3 Nov 1998. + + -- Matthias Klose Tue, 3 Nov 1998 18:34:44 +0200 + +egcs (1.1.0.91.58-2) unstable; urgency=low + + * [debian/rules]: added targets to apply and unapply patches. + * [debian/README.patches]: New file. + * Moved patches dir to debian/patches. debian/rules has to select + the patches to apply. + * Manual pages for genclass and gcov (fixes #5995, #20950, #22196). + * Apply egcs-1.1-reload patch needed for powerpc architecture. + * Fixed bugs (#17768, #20252, #25508, #27788). + * Reapplied alpha patch (#20875). + * Fixes first part of #22513, extended README.Debian (combining C & C++). + * Already fixed in earlier egcs-1.1 releases: #17963, #20252, #20524, + #20640, #22450, #24244, #24288, #28520. + + -- Matthias Klose Fri, 30 Oct 1998 13:41:45 +0200 + +egcs (1.1.0.91.58-1) experimental; urgency=low + + * New upstream version. That's the egcs-1.1.1 prerelease plus patches from + the cvs archive upto 29 Oct 1998. + * Merged files from the egcs and snapshot packages. + * Updated libg++ to libg++-2.8.1.2 (although the Debian package name is still + 2.8.2). + * Moved patches dir to patches-1.1. + * Dan Jacobowitz: + * This is a snapshot from the egcs_1_1_branch, with + libapi, reload, builtin-apply, and egcs patches from + the debian/patches/ dir applied, along with the egcs-gpc-patches + and gcc/p/diffs/gcc-egcs-2.91.55.diff. + * Conditionalize gcj and chill (since they aren't in this branch). + * Fake snapshots drop the -snap-main. + + -- Matthias Klose Thu, 29 Oct 1998 15:15:19 +0200 + +egcs-snapshot (1.1-19981019-5.1) experimental; urgency=low + + * This is a snapshot from the egcs_1_1_branch, with + libapi, reload, builtin-apply, and egcs patches from + the debian/patches/ dir applied, along with the egcs-gpc-patches + and gcc/p/diffs/gcc-egcs-2.91.55.diff. + * Conditionalize gcj and chill (since they aren't in this + branch). + * Fake snapshots drop the -snap-main. + + -- Daniel Jacobowitz Mon, 19 Oct 1998 22:19:23 -0400 + +egcs (1.1b-5) unstable; urgency=low + + * [debian/control.in] Fixed typo in dependencies (#28076, #28087, #28092). + + -- J.H.M. Dassen (Ray) Sun, 18 Oct 1998 22:56:51 +0200 + +egcs (1.1b-4) unstable; urgency=low + + * Strengthened g++ dependency on libstdc++_LIB_SO_-dev from + `Recommends' to `Depends'. + * Updated README.Debian for egcs-1.1. + * Updated TODO. + + -- Matthias Klose Thu, 15 Oct 1998 12:38:47 +0200 + +egcs-snapshot (19981005-0.1) experimental; urgency=low + + * Make libstdc++2.9-snap-main and libg++-snap-main provide + their mainstream equivalents and put those equivalents into + their shlibs file. + * Package gcj, the GNU Compiler for Java(TM). + + * New upstream version of egcs (The -regcs_latest_snapshot branch). + * Build without libg++ entirely. + * Leave out gpc for now - the internals are sufficiently different + that it does not trivially compile. + * Include an experimental reload patch for powerpc - this is, + in the words of its author, not release quality, but it allows + powerpc linuxthreads to function. + * On architectures where we are the primary compiler, let snapshots + build with --prefix=/usr and conflict with the stable versions. + * Package chill, a front end for the language Chill. + * Other applied patches from debian/patches/: egcs-patches and + builtin-apply-patch. + * Use reload.c revision 1.43 to avoid a nasty bug. + + -- Daniel Jacobowitz Wed, 7 Oct 1998 00:27:42 -0400 + +egcs (1.1b-3.1) unstable; urgency=low + + * NMU to fix the egcc -> gcc link once and for all + + -- Christopher C. Chimelis Tue, 22 Sep 1998 16:11:19 -0500 + +egcs (1.1b-3) unstable; urgency=low + + * Oops. The egcc -> gcc link on archs where gcc is egcc was broken. + Thanks to Chris Chimelis for pointing this out. + + -- J.H.M. Dassen (Ray) Mon, 21 Sep 1998 20:51:35 +0200 + +egcs (1.1b-2) unstable; urgency=low + + * New upstream spellfix release (Debian revision is 2 as the internal + version numbers didn't change). + * Added egcc -> gcc symlink on architectures where egcc is the primary C + compiler. Thus, maintainers of packages that require egcc, can now + simply use "egcc" without conditionals. + * Porters: we hope/plan to make egcs's gcc the default C compiler on all + platforms once the 2.2.x kernels are available. Please test this version + thoroughly, and give us a GO / NO GO for your architecture. + * Some symbols cpp used to predefine were removed upstream in order to clean + up the cpp namespace, but imake requires them for determining the proper + settings for LinuxMachineDefines (see /usr/X11R6/lib/X11/{Imake,linux}.cf), + thus we put them back. Thanks to Paul Slootman for reporting his imake + problems on Alpha. + * [gcc/config/alpha/linux.h] Added -D__alpha to CPP_PREDEFINES . + Thanks to Chris Chimelis for the alpha-only 1.1a-1.1 NMU which fixed + this already. + * [gcc/config/i386/linux.h] Added -D__i386__ to CPP_PREDEFINES . + * [gcc/config/sparc/linux.h] Has -Dsparc in CPP_PREDEFINES . + * [gcc/config/sparc/linux64.h] Has -Dsparc in CPP_PREDEFINES . + * [gcc/config/m68k/linux.h] Has -Dmc68000 in CPP_PREDEFINES . + * [gcc/config/rs6000/linux.h] Has -Dpowerpc in CPP_PREDEFINES . + * [gcc/config/arm/linux.h] Has -Darm in CPP_PREDEFINES . + * [gcc/config/i386/gnu.h] Has -Di386 in CPP_PREDEFINES . + * Small fixes and updates in README. + * Changes affecting the source package only: + * [gcc/Makefile.in, gcc/cp/Make-lang.in, gcc/p/Make-lang.in] + Daniel Jacobowitz: Ugly hacks of various kinds to make cplib2.txt get + properly regenerated with multilib. + * [debian/TODO] Created. + * [INSTALL/index.html] Fixed broken link. + + -- J.H.M. Dassen (Ray) Sun, 20 Sep 1998 14:05:15 +0200 + +egcs (1.1a-1) unstable; urgency=low + + * New upstream release. + * Added README.libstdc++ . + * Updated Standards-Version. + * Matthias: + * Downgraded gobjc dependency on egcs-docs from Recommends: to Suggests: . + * [libg++/Makefile.in] Patched not to rely on a `-f' flag of `ln'. + + -- J.H.M. Dassen (Ray) Wed, 2 Sep 1998 19:57:43 +0200 + +egcs (1.1-1) unstable; urgency=low + + * egcs-1.1 prerelease (from the last Debian package only the version file + changed). + * "Final" gpc Beta 2.1 gpc-19980830. + * Included libg++ and gpc in the .orig tarball. so that diffs are getting + smaller. + * debian/control.in: Changed maintainer address to galenh-egcs@debian.org. + * debian/copyright: Updated URLs. + + -- Matthias Klose Mon, 31 Aug 1998 12:43:13 +0200 + +egcs (1.0.99.56-0.1) unstable; urgency=low + + * New upstream snapshot 19980830 from CVS (called egcs-1.1 19980830). + * New libg++ snapshot 980828. + * Put all patches patches subdirectory; see patches/README in the source. + * debian/control.in: readded for libg++2.8.2-dev: + Replaces: libstdc++2.8-dev (<= 2.90.29-0.5) + * Renamed libg++2.9 package to libg++2.8.2. + * gcc/p/gpc-decl.c: Fix from Peter@Gerwinski.de; fixes optimization errors. + * patches/gpc-patch2: Fix from Peter@Gerwinski.de; fixes alpha errors. + * debian/rules: New configuration flag for building with and without + libstdc++api patch; untested without ... + + -- Matthias Klose Sun, 30 Aug 1998 12:04:22 +0200 + +egcs (1.0.99-0.6) unstable; urgency=low + + * PowerPC fixes. + * On powerpc, generate the -msoft-float libs and package them + as egcs-nof. + * Fix signed char error in gpc. + * Create a libg++.so.2.9 compatibility symlink. + + -- Daniel Jacobowitz Tue, 25 Aug 1998 11:44:09 -0400 + +egcs (1.0.99-0.5) unstable; urgency=low + + * New upstream snapshot 19980824. + * New gpc snapshot gpc-980822; reenabled gpc for alpha. + + -- Matthias Klose Tue, 25 Aug 1998 01:21:08 +0200 + +egcs (1.0.99-0.4) unstable; urgency=low + + * New upstream snapshot 19980819. Should build glibc 2.0.9x on PPC. + + -- Matthias Klose Wed, 19 Aug 1998 14:18:07 +0200 + +egcs (1.0.99-0.3) unstable; urgency=low + + * New upstream snapshot 19980816. + * debian/rules: build correct debian/control and debian/*.shlibs + * Enabled Haifa scheduler for ix86. + + -- Matthias Klose Mon, 17 Aug 1998 16:29:35 +0200 + +egcs (1.0.99-0.2) unstable; urgency=low + + * New upstream snapshot: egcs-19980812, minor changes only. + * Fixes for building on `primary' targets. + * Disabled gpc on `alpha' architecture. + * Uses debhelper 1.1.6 + * debian/control.in: Replace older snapshot versions in favor of newer + normal versions. + * debian/rules: Fixes building of binary-arch target only. + + -- Matthias Klose Thu, 13 Aug 1998 11:59:41 +0200 + +egcs (1.0.99-0.1) unstable; urgency=low + + * New upstream version: pre egcs-1.1 version. + * Many changes ... for details see debian/changelog.snapshot in the + source package. + * New packages libstdc++2.9 and libstdc++2.9-dev. + * New libg++ snapshot 980731: new packages libg++2.9 and libg++2.9-dev. + * New gpc snapshot gpc-980729: new package gpc. + * Uses debhelper 1.1 + + -- Matthias Klose Mon, 10 Aug 1998 13:00:27 +0200 + +egcs-snapshot (19980803-4) experimental; urgency=low + + * rebuilt debian/control. + + -- Matthias Klose Wed, 5 Aug 1998 08:51:47 +0200 + +egcs-snapshot (19980803-3) experimental; urgency=low + + * debian/rules: fix installation locations of NEWS, header and + `undocumented' files. + * man pages aren't compressed for the snapshot package. + + -- Matthias Klose Tue, 4 Aug 1998 17:34:31 +0200 + +egcs-snapshot (19980803-2) experimental; urgency=low + + * debian/rules: Uses debhelper. Old in debian/rules.old. + renamed postinst, prerm files for use with debhelper. + * debian/{libg++2.9,libstdc++2.9}/postinst: call ldconfig only, + when called for configure. + * egcs-docs is architecture independent package. + * new libg++ snapshot 980731. + * installed libstdc++ api patch (still buggy). + + -- Matthias Klose Mon, 3 Aug 1998 13:20:59 +0200 + +egcs-snapshot (19980729-1) experimental; urgency=low + + * New snapshot version 19980729 from CVS archive. + * New gpc snapshot gpc-980729. + * Let gcc/configure decide about using the Haifa scheduler. + * Remove -DDEBIAN. That was needed for the security improvements with + regard to the /tmp problem. egcs-1.1 chooses another approach. + * Save test-protocol and extract gpc errors to gpc-test-summary. + * Tighten binutils dependency to 2.9.1. + * debian/rules: new build-info target + * debian/{control.in,rules}: _SO_ and BINUTILSV substitution. + * debian/rules: add dependency for debian/control. + * debian/rules: remove bin/c++filt + * TODO: next version will use debhelper; the unorganized moving of + files becomes unmanageable ... + * TODO: g++ headers in stdc++ package? check! + + -- Matthias Klose Thu, 30 Jul 1998 12:10:20 +0200 + +egcs-snapshot (19980721-1) experimental; urgency=low + + * Unreleased. Infinite loops in executables made by gpc. + + -- Matthias Klose Wed, 22 Jul 1998 18:07:20 +0200 + +egcs-snapshot (19980715-1) experimental; urgency=low + + * New snapshot version from CVS archive. + * New gpc snapshot gpc-980715. + * New libg++ version libg++-2.8.2-980708. Changed versioning + schema for library. The major versions of libc, libstdc++ and the + g++ interface are coded in the library name. Use this new schema, + but provide a symlink to our previous schema, since the library + seems to be binary compatible. + * [debian/rules]: Fixed bug in build target, when bootstrap returns + with an error + + -- Matthias Klose Wed, 15 Jul 1998 10:55:05 +0200 + +egcs-snapshot (19980701-1) experimental; urgency=low + + * New snapshot version from CVS archive. + Two check programs in libg++ had to be manually killed to finish the + testsuite (tBag and tSet). + * New gpc snapshot gpc-980629. + * Incorporated debian/rules changes from egcs-1.0.3a-0.5 (but don't remove + gcc/cp/parse.c gcc/c-parse.c gcc/c-parse.y gcc/objc/objc-parse.c + gcc/objc/objc-parse.y, since these files are part of the release). + * Disable the -DMKTEMP_EACH_FILE -DHAVE_MKSTEMP -DDEBIAN flags for the + snapshot. egcs-1.1 will have another solution. + * Don't bootstrap the snapshot with -fno-force-mem. Internal compiler + error :-( + * libf2c.a and f2c.h have changed names to libg2c.a and g2c.h and + have moved again into the gcc-lib dir. They are installed under + libg2c.a and g2c.h. Is it necessary to provide links f2c -> g2c ? + * debian/rules: reflect change of build dir of libraries. + + -- Matthias Klose Wed, 2 Jul 1998 13:15:28 +0200 + +egcs-snapshot (19980628-0.1) experimental; urgency=low + + * New upstream snapshot version. + * Non-maintainer upload; Matthias appears to be absent currently. + * Updated shlibs. + * Merged changes from regular egcs: + * [debian/control] Tightened dependency on binutils to 2.8.1.0.23 or + newer, as according to INSTALL/SPECIFIC PowerPC (and possibly Sparc) + need this. + * [debian/rules] Clean up some generated files outside builddir, + so the .diff.gz becomes smaller. + * [debian/rules] Partial sync/update with the one for the regular egcs + version. + * [debian/rules] Make gcc/p/configure executable. + + -- J.H.M. Dassen (Ray) Wed, 1 Jul 1998 07:12:15 +0200 + +egcs (1.0.3a-0.6) frozen unstable; urgency=low + + * Some libg++ development files were in libstdc++2.8-dev rather than + libg++2.8-dev. Fixed this and dealt with upgrading from the earlier + versions (fixes #23908; this bug is not marked release-critical, but + is annoying and can be quite confusing for users. Therefore, I think + this fix should go in 2.0). + + -- J.H.M. Dassen (Ray) Tue, 30 Jun 1998 11:10:14 +0200 + +egcs (1.0.3a-0.5) frozen unstable; urgency=low + + * Fixed location of .hP files (Fixes #23448). + * [debian/rules] simplified extraction of the files for libg++2.8-dev. + + -- J.H.M. Dassen (Ray) Wed, 17 Jun 1998 09:33:41 +0200 + +egcs (1.0.3a-0.4) frozen unstable; urgency=low + + * [gcc/gcc.c] There is one call to choose_temp_base for determining the + tempdir to be used only; #ifdef HAVE_MKSTEMP delete the tempfile created + as a side effect. (fixes #23123 for egcs). + * [gcc/collect2.c] There's still a vulnerability here; I don't see how + I can fix it without leaving behind tempfiles though. + * [debian/control] Tightened dependency on binutils to 2.8.1.0.23 or + newer, as according to INSTALL/SPECIFIC PowerPC (and possibly Sparc) + need this. + * [debian/rules] Clean up some generated files outside builddir, so the + .diff.gz becomes smaller. + + -- J.H.M. Dassen (Ray) Sat, 13 Jun 1998 09:06:52 +0200 + +egcs-snapshot (19980608-1) experimental; urgency=low + + * New snapshot version. + + -- Matthias Klose Tue, 9 Jun 1998 14:07:44 +0200 + +egcs (1.0.3a-0.3) frozen unstable; urgency=high (security fixes) + + * [gcc/toplev.c] set flag_force_mem to 1 at optimisation level 3 or higher. + This works around #17768 which is considered release-critical. + * Changes by Matthias: + * [debian/README] Documentation of the compiler situation for Objective C. + * [debian/rules, debian/control.*] Generate control file from a master + file. + * [debian/rules] Updates for Pascal and Fortran parts; brings it in sync + with the one for the egcs snapshots. + * Use the recommended settings LDFLAGS=-s CFLAGS= BOOT_CFLAGS='-O2'. + * Really compile -DMKTEMP_EACH_FILE -DHAVE_MKSTEMP (really fixes #19453 + for egcs). + * [gcc/gcc.c] A couple of temp files weren't marked for deletion. + + -- J.H.M. Dassen (Ray) Sun, 31 May 1998 22:56:22 +0200 + +egcs (1.0.3a-0.2) frozen unstable; urgency=high (security fixes) + + * Security improvements with regard to the /tmp problem + (gcc opens predictably named files in TMPDIR which can be abused via + symlinks) (Fixes #19453 for egcs). + * Compile -DMKTEMP_EACH_FILE to ensure the %u name is generated randomly + every time; affects gcc/gcc.c . + * [gcc/choose-temp.c, libiberty/choose-temp.c]: use mktemp(3) if compiled + -DUSE_MKSTEMP . + * Security improvements: don't use the result of choose_temp_base in a + predictable fashion. + [gcc/gcc.c]: + * @c, @objective-c: use random name rather then tempbasename.i for + intermediate preprocessor output (%g.i -> %d%u). + * @c, @objective-c: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @c, @objective-c, @cpp-output, @assembler-with-cpp: switched + "as [-o output file] " to + "as [-o output file]". + * @c, @objective-c, @assembler-with-cpp: use previous random name + (cc1|cpp output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U) + [gcc/f/lang-specs.h]: + * @f77-cpp-input: use random name rather then tempbasename.i for + intermediate cpp output (%g.i -> %d%u). + * @f77-cpp-input: use previous random name (cpp output) rather than + tempbasename.i for f771 input (%g.i -> %U). + * @f77-cpp-input: switched + "as [-o output file] " to + "as [-o output file]". + * @f77-cpp-input: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: use random name rather then tempbasename.i for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @f77: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %U). + * Run the testsuite (this requires the dejagnu package in experimental; + unfortunately, it is difficult to distinguish this version from the one + in frozen). + if possible, and log the results in warn_summary and bootstrap-summary. + * [gcc/choose-temp.c, libiberty/choose-temp.c]: s|returh|return| in + comment. + * Added notes on the Debian compiler setup [debian/README] to the + development packages. + * Matthias: + * [libg++/etc/lf/Makefile.in] Replaced "-ltermcap" by "-lncurses". + * [debian/rules] Updated so it can be used for both egcs releases and + snapshots easily; added support for the GNU Pascal Compiler gpc. + * [contrib/test_summary, contrib/warn_summary] Added from CVS. + * Run compiler checks and include results in /usr/doc/. + * Updates to the README. + * [debian/rules] Use assignments to speed up startup. + * [debian/rules] Show the important variables at the start of the build + process. + * [debian/control.secondary] Added a dependency of gobjc on egcc on + architectures where egcs provides the secondary compiler, as + /usr/bin/egcc is the compiler driver for gobjc. (Fixes #22829). + * [debian/control.*] Bumped Standards-Version; used shorter version + numbers in the dependency relationships (esthetic difference only); + fixed typo. + + -- J.H.M. Dassen (Ray) Tue, 26 May 1998 21:47:41 +0200 + +egcs-snapshot (19980525-1) experimental; urgency=low + + * New snapshot version. + + -- Matthias Klose Tue, 26 May 1998 18:04:06 +0200 + +egcs-snapshot (19980517-1) experimental; urgency=low + + * "Initial" release of the egcs-snapshot package; many debian/* files + derived from the egcs-1.0.3a-0.1 package (maintained by Galen Hazelwood + , NMU's by J.H.M. Dassen (Ray) ) + * The egcs-snapshot packages can coexist with the packages of the + egcs release. Package names have a '-ss' appended. + * All packages are installed in a separate tree (/usr/lib/egcs-ss following + the FHSS). + * Made all snapshot packages extra, all snapshot packages conflict + with correspondent egcs packages, which are newer than the snapshot. + * Included libg++-2.8.1-980505. + * Included GNU Pascal (gpc-980511). + * Haifa scheduler enabled for all snapshot packages. + * Run compiler checks and include results in /usr/doc/. + * Further information in /usr/doc//README.snapshot. + + -- Matthias Klose Wed, 20 May 1998 11:14:06 +0200 + +egcs (1.0.3a-0.1) frozen unstable; urgency=low + + * New upstream release egcs-2.90.29 980515 (egcs-1.0.3 release) + (we were using 1.0.3-prerelease). This includes the Haifa patches + we had since 1.0.3-0.2 and the gcc/objc/thr-posix.c patch we had + since 1.0.3-0.1; the differences with 1.0.3-prerelease + patches + we had is negligable. + * iostream info documentation was in the wrong package (libg++2.8-dev). + Now it's in libstdc++2.8-dev. (Thanks to Jens Rosenboom for bringing + this to my attention). As 1.0.3-0.3 didn't make it out of Incoming, + I'm not adding "Replaces:" for this; folks who had 1.0.3-0.3 installed + already know enough to use --force-overwrite. + * [gcc/objc/objc-act.c] Applied patch Matthias Klose supplied me with that + demangles Objective C method names in gcc error messages. + * Explicitly disable Haifa scheduling on Alpha, to make it easier to use + this package's diff with egcs snapshots, which may turn on Haifa + scheduling even though it is still unstable. (Requested by Chris Chimelis) + * Don't run "configure" again if builddir already exists (makes it faster + to restart builds in case one is hacking internals). Requested by + Johnnie Ingram. + * [gcc/gbl-ctors.h] Don't use extern declaration for atexit on glibc 2.1 + and higher (the prototype has probably changed; having the declaration + broke Sparc compiles). + * [debian/rules] Determine all version number automatically (from the + version string in gcc/version.c). + * [debian/copyright] Updated FTP locations; added text about libg++ (fixes + #22465). + + -- J.H.M. Dassen (Ray) Sat, 16 May 1998 17:41:44 +0200 + +egcs (1.0.3-0.3) frozen unstable; urgency=low + + * Made an "egcs-doc" package containing documentation for egcs (e)gcc, + g++, gobjc, so that administrators can choose whether to have this + documenation or the documentation that comes with the GNU gcc package. + Dependency on this is Recommends: on architectures where egcs provides + the primary C compiler; Suggests: on the others (where GNU gcc is still + the primary C compiler). + * Use the g++ FAQ from gcc/cp rather than libg++, as that version is more + up to date. + * Added iostream info documentation to libstdc++2.8-dev. + + -- J.H.M. Dassen (Ray) Wed, 13 May 1998 08:46:10 +0200 + +egcs (1.0.3-0.2) frozen unstable; urgency=low + + * Added libg++ that works with egcs, found at + ftp://ftp.yggdrasil.com/private/hjl/libg++-2.8.1-980505.tar.gz + (fixes #20587 (Severity: important)). + * The "libg++" and "libg++-dev" virtual packages now refer to the GNU + extensions. + * Added the g++ FAQ that comes with libg++ to the g++ package. + * libg++/Makefile.in: added $(srcdir) to rule for g++FAQ.info so that it + builds OK in builddir. + * Added -D__i386__ to the cpp predefines on intel. + * Patches Matthias supplied me with: + * Further 1.0.3 prerelease patches from CVS. + This includes patches to the Haifa scheduler. Alpha porters, please + check if this makes the Haifa scheduler OK again. + * Objective C patches from CVS. + + -- J.H.M. Dassen (Ray) Fri, 8 May 1998 14:43:20 +0200 + +egcs (1.0.3-0.1) frozen unstable; urgency=low (high for maintainers that use objc) + + * bug fixes only in new upstream version + * Applied patches from egcs CVS archive (egcs_1_03_prerelease) + (see gcc/ChangeLog in the egcs source package). + * libstdc++2.8-dev no longer Provides: libg++-dev (fixes #21153). + * libstdc++2.8-dev now Conflicts: libg++27-dev (bo), + libg++272-dev (hamm) [regular packages] rather than + Conflicts: libg++-dev [virtual package] to prepare the way for "libg++" + to be used as a virtual package for a new libg++ package (i.e. an up to + date one, which not longer contains libstdc++, but only the GNU + extensions) that is compatible with the egcs g++ packages. Such a package + isn't available yet. Joel Klecker tried building libg++2.8.1.1a within + egcs's libstdc++ setup, but it appears to need true gcc 2.8.1 . + * Filed Severity: important bugs against wxxt1-dev (#21707) because these + still depend on libg++-dev, which is removed in this version. + A fixed libsidplay1-dev has already been uploaded. + * libstdc++2.8 is now Section: base and Priority: required (as dselect is + linked against it). + * Disabled Haifa scheduling on Alpha again; Chris Chimelis reported + that this caused problems on some machines. + * [gcc/extend.texi] + ftp://maya.idiap.ch/pub/tmb/usenix88-lexic.ps.Z is no longer available; + use http://master.debian.org/~karlheg/Usenix88-lexic.pdf . + (fixes the egcs part of #20002). + * Updated Standards-Version. + * Changed chmod in debian/rules at Johnie Ingram's request. + * Rather than hardwire the Debian part of the packages' version number, + extract it from debian/changelog . + * Use gcc/objc/thr-posix.c from 980418 egcs snapshot to make objc work. + (Fixes #21192). + * Applied workaround for the GNUstep packages on sparc systems. + See README.sparc (on sparc packages only) in the doc directory. + This affects the other compilers as well. + * Already done in 1.0.2-0.7: the gobjc package now provides a virtual + package objc-compiler. + + -- J.H.M. Dassen (Ray) Tue, 28 Apr 1998 12:05:28 +0200 + +egcs (1.0.2-0.7) frozen unstable; urgency=low + + * Separated out Objective-C compiler. + * Applied patch from http://www.cygnus.com/ml/egcs/1998-Apr/0614.html + + -- Matthias Klose Fri, 17 Apr 1998 10:25:48 +0200 + +egcs (1.0.2-0.6) frozen unstable; urgency=low + + * Due to upstream changes (libg++ is now only the GNU specific C++ + classes, and is no longer maintained; libstdc++ contains the C++ + standard library, including STL), the virtual "libg++-dev" + package's meaning has become confusing. Therefore, new or updated + packages should no longer use the virtual "libg++-dev" package. + * Corrected g++'s Recommends to libstdc++2.8-dev (>=2.90.27-0.1). + The previous version had Recommends: libstdc++-dev (>=2.90.27-0.1) + which doesn't work, as libstc++-dev is a virtual package. + * Bumped Standards-Version. + + -- J.H.M. Dassen (Ray) Tue, 14 Apr 1998 11:52:08 +0200 + +egcs (1.0.2-0.5) frozen unstable; urgency=low (high for maintainers of packages that use libstdc++) + + * Modified shlibs file for libstdc++ to generate versioned dependencies, + as it is not link compatible with the 1.0.1-x versions in + project/experimental. (Fixes #20247, #20033) + Packages depending on libstd++ should be recompiled to fix their + dependencies. + * Strenghtened g++'s Recommends: libstdc++-dev to the 1.0.2 version or + newer. + * Fixed problems with the unknown(7) symlink for gcov. + * Reordering links now works. + + -- Adam Heath Sun, 12 Apr 1998 13:09:30 -0400 + +egcs (1.0.2-0.4) frozen unstable; urgency=low + + * Unreleased. This is the version Adam Heath received from me. + * Replaces: gcc (<= 2.7.2.3-3) so that the overlap with the older gcc + packages (including bo's gcc_2.7.2.1-8) is handled properly + (fixes #19931, #19672, #20217, #20593). + * Alpha architecture (fixes #20875): + * Patched gcc/config/alpha/linux.h for the gmon functions to operate + properly. + * Made egcs the primary C compiler. + * Enabled Hafia scheduling. + * Lintian-detected problems: + * E: libstdc++2.8: ldconfig-symlink-before-shlib-in-deb usr/lib/libstdc++.so.2.8 + * E: egcc: binary-without-manpage gcov + Reported as wishlist bug; added link to undocumented(7). + * W: libstdc++2.8: non-standard-executable-perm usr/lib/libstdc++.so.2.8.0 0555 + * E: libstdc++2.8: shlib-with-executable-bit usr/lib/libstdc++.so.2.8.0 0555 + + -- J.H.M. Dassen (Ray) Fri, 10 Apr 1998 14:46:46 +0200 + +egcs (1.0.2-0.3) frozen unstable; urgency=low + + * Really fixed dependencies. + + -- J.H.M. Dassen (Ray) Mon, 30 Mar 1998 11:30:26 +0200 + +egcs (1.0.2-0.2) frozen unstable; urgency=low + + * Fixed dependencies. + + -- J.H.M. Dassen (Ray) Sat, 28 Mar 1998 13:58:58 +0100 + +egcs (1.0.2-0.1) frozen unstable; urgency=low + + * New upstream version; it now has -Di386 in CPP_PREDEFINES. + * Only used the debian/* patches from 1.0.1-2; the rest of it appears + to be in 1.0.2 already. + + -- J.H.M. Dassen (Ray) Fri, 27 Mar 1998 11:47:14 +0100 + +egcs (1.0.1-2) unstable; urgency=low + + * Integrated pre-release 1.0.2 patches + * Split out g++ + * egcs may now provide either the primary or secondary C compiler + + -- Galen Hazelwood Sat, 14 Mar 1998 14:15:32 -0700 + +egcs (1.0.1-1) unstable; urgency=low + + * New upstream version + * egcs is now the standard Debian gcc! + * gcc now provides c-compiler (#15248 et al.) + * g77 now provides fortran77-compiler + * g77 dependencies now correct (#16991) + * /usr/doc/gcc/changelog.gz now has correct permissions (#16139) + + -- Galen Hazelwood Sat, 7 Feb 1998 19:22:30 -0700 + +egcs (1.0-1) experimental; urgency=low + + * First official release + + -- Galen Hazelwood Thu, 4 Dec 1997 16:30:11 -0700 + +egcs (970917-1) experimental; urgency=low + + * New upstream snapshot (There's a lot of stuff here as well, including + a new libstdc++, but it _still_ won't build...) + * eg77 driver now works properly + + -- Galen Hazelwood Wed, 17 Sep 1997 20:44:29 -0600 + +egcs (970904-1) experimental; urgency=low + + * New upstream snapshot + + -- Galen Hazelwood Sun, 7 Sep 1997 18:25:06 -0600 + +egcs (ss-970814-1) experimental; urgency=low + + * Initial packaging (of initial snapshot!) + + -- Galen Hazelwood Wed, 20 Aug 1997 00:36:28 +0000 + +gcc272 (2.7.2.3-12) unstable; urgency=low + + * Compiled on a glibc-2.0 based system. + * Reflect move of manpage to /usr/share in gcc.postinst as well. + * Moved gcc272-docs to section doc, priority optional. + + -- Matthias Klose Sat, 28 Aug 1999 13:42:13 +0200 + +gcc272 (2.7.2.3-11) unstable; urgency=low + + * Follow Debian policy for GNU system type (fixes #42657). + * config/i386/linux.h: Remove %[cpp_cpu] from CPP_SPEC. Stops gcc-2.95 + complaining about obsolete spec operators (using gcc -V 2.7.2.3). + Patch suggested by Zack Weinberg . + + -- Matthias Klose Sun, 15 Aug 1999 20:12:21 +0200 + +gcc272 (2.7.2.3-10) unstable; urgency=low + + * Renamed source package to gcc272. The egcs source package is renamed + to gcc, because it's now the "official" GNU C compiler. + * Changed maintainer address to "Debian GCC maintainers". + * Install info and man stuff to /usr/share. + + -- Matthias Klose Thu, 27 May 1999 12:29:23 +0200 + +gcc (2.7.2.3-9) unstable; urgency=low + + * debian/{postinst,prerm}-doc: handle gcc272.info, not gcc.info. + Fixes #36306. + + -- Matthias Klose Tue, 20 Apr 1999 07:32:58 +0200 + +gcc (2.7.2.3-8) unstable; urgency=low + + * Make gcc-2.7 the secondary compiler. Rename gcc package to gcc272. + On i386, sparc and m68k, this package is compiled against glibc2.0. + * The cpp package is built from the egcs source package. + + -- Matthias Klose Mon, 29 Mar 1999 22:48:50 +0200 + +gcc (2.7.2.3-7) frozen unstable; urgency=low + + * Separated out ObjC compiler to gobjc27 package. + * Changed maintainer address. + * Synchronized README.Debian with egcs-1.1.1-3. + + -- Matthias Klose Tue, 29 Dec 1998 19:05:26 +0100 + +gcc (2.7.2.3-6) frozen unstable; urgency=low + + * Link with -lc on i386, m68k, sparc, when building shared libraries + (fixes #25122). + + -- Matthias Klose Thu, 3 Dec 1998 12:12:12 +0200 + +gcc (2.7.2.3-5) frozen unstable; urgency=low + + * Updated maintainer info. + * Updated Standards-Version; made lintian-clean. + * gcc-docs can coexist with the latest egcs-docs, so added (<= version) to + the Conflicts. + * Updated the README and renamed it to README.Debian . + * Put a reference to /usr/doc/gcc/README.Debian in the info docs. + * Updated description of g++272 . + * Clean up generated info files, to keep the diff small. + + -- J.H.M. Dassen (Ray) Tue, 17 Nov 1998 20:05:59 +0100 + +gcc (2.7.2.3-4.8) frozen unstable; urgency=high + + * Non-maintainer release + * Fix type in extended description + * Removed wrong test in postinst + * Add preinst to clean up some stuff from an older gcc package properly + and stop man complaining about dangling symlinks + + -- Wichert Akkerman Fri, 17 Jul 1998 18:48:32 +0200 + +gcc (2.7.2.3-4.7) frozen unstable; urgency=high + + * Really fixed gcc-docs postinst (Fixes #23470), so that `gcc-docs' + becomes installable. + + -- J.H.M. Dassen (Ray) Mon, 15 Jun 1998 07:53:40 +0200 + +gcc (2.7.2.3-4.6) frozen unstable; urgency=high + + * [gcc.c] There is one call to choose_temp_base for determining the + tempdir to be used only; + #ifdef HAVE_MKSTEMP delete the tempfile created as a side effect. + (fixes #23123 for gcc). + * gcc-docs postinst was broken (due to a broken line) (fixes #23391, #23401). + * [debian/control] description for gcc-docs said `egcs' where it should have + said `gcc' (fixes #23396). + + -- J.H.M. Dassen (Ray) Thu, 11 Jun 1998 12:48:50 +0200 + +gcc (2.7.2.3-4.5) frozen unstable; urgency=high + + * The previous version left temporary files behind, as they were not + marked for deletion afterwards. + + -- J.H.M. Dassen (Ray) Sun, 31 May 1998 22:49:14 +0200 + +gcc (2.7.2.3-4.4) frozen unstable; urgency=high (security fixes) + + * Security improvements with regard to the /tmp problem + (gcc opens predictably named files in TMPDIR which can be abused via + symlinks) (Fixes #19453 for gcc): + * Compile -DMKTEMP_EACH_FILE to ensure the %u name is generated randomly + every time; affects gcc/gcc.c . + * [cp/g++.c, collect2.c, gcc.c] If compiled -DHAVE_MKSTEMP use mkstemp(3) + rather than mktemp(3). + * Security improvements: don't use the result of choose_temp_base in a + predictable fashion. + [gcc.c]: + * @c, @objective-c: use random name rather then tempbasename.i for + intermediate preprocessor output (%g.i -> %d%u). + * @c, @objective-c: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @c, @objective-c, @cpp-output, @assembler-with-cpp: switched + "as [-o output file] " to + "as [-o output file]". + * @c, @objective-c, @assembler-with-cpp: use previous random name + (cc1|cpp output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U) + [f/lang-specs.h]: + * @f77-cpp-input: use random name rather then tempbasename.i for + intermediate cpp output (%g.i -> %d%u). + * @f77-cpp-input: use previous random name (cpp output) rather than + tempbasename.i for f771 input (%g.i -> %U). + * @f77-cpp-input: switched + "as [-o output file] " to + "as [-o output file]". + * @f77-cpp-input: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: use random name rather then tempbasename.i for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @f77: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %U). + + -- J.H.M. Dassen (Ray) Sat, 30 May 1998 17:27:03 +0200 + +gcc (2.7.2.3-4.3) frozen unstable; urgency=high + + * The "alpha" patches from -4 affected a lot more than alpha support, + and in all likeliness broke compilation of libc6 2.0.7pre3-1 + and 2.0.7pre1-4 . I removed them by selective application of the + diff between -4 and -4. (should fix #22292). + * Fixed reference to the trampolines paper (fixes #20002 for Debian; + this still needs to be forwarded). + * This is for frozen too. (obsoletes #22390 (request to move -4.2 to + frozen)). + * Split of gcc-docs package, so that the gcc can be succesfully installed + on systems that have egcs-docs installed. + * Added the README on the compiler situation that's already in the egcs + packages. + * Use the recommended settings LDFLAGS=-s CFLAGS= BOOT_CFLAGS='-O2'. + + -- J.H.M. Dassen (Ray) Thu, 28 May 1998 20:03:59 +0200 + +gcc (2.7.2.3-4.2) unstable; urgency=low + + * Still for unstable, as I have received no feedback about the g++272 + package yet. + * gcc now Provides: objc-compiler . + * Clean up /etc/alternatives/{g++,g++.1.gz} if they are dangling. + (fixes #19765, #20563) + + -- J.H.M. Dassen (Ray) Wed, 22 Apr 1998 12:40:45 +0200 + +gcc (2.7.2.3-4.1) unstable; urgency=low + + * Bumped Standards-Version. + * Forked off a g++272 package (e.g. for code that uses the GNU extensions + in libg++); for now this is in "unstable" only; feedback appreciated. + * Some cleanup (lintian): permissions, absolute link, gzip manpage. + + -- J.H.M. Dassen (Ray) Fri, 17 Apr 1998 13:05:25 +0200 + +gcc (2.7.2.3-4) unstable; urgency=low + + * Added alpha patches + * Only build C and objective-c compilers, split off g++ + + -- Galen Hazelwood Sun, 8 Mar 1998 21:16:39 -0700 + +gcc (2.7.2.3-3) unstable; urgency=low + + * Added patches for m68k + * Added patches for sparc (#13968) + + -- Galen Hazelwood Fri, 17 Oct 1997 18:25:21 -0600 + +gcc (2.7.2.3-2) unstable; urgency=low + + * Added g77 support (g77 0.5.21) + + -- Galen Hazelwood Wed, 10 Sep 1997 18:44:54 -0600 + +gcc (2.7.2.3-1) unstable; urgency=low + + * New upstream version + * Now using pristine source + * Removed misplaced paragraph in cpp.texi (#10877) + * Fix security bug for temporary files (#5298) + * Added Suggests: libg++-dev (#12335) + * Patched objc/thr-posix.c to support conditions (#12502) + + -- Galen Hazelwood Mon, 8 Sep 1997 12:20:07 -0600 + +gcc (2.7.2.2-7) unstable; urgency=low + + * Made cc and c++ managed through alternates mechanism (for egcs) + + -- Galen Hazelwood Tue, 19 Aug 1997 22:37:03 +0000 + +gcc (2.7.2.2-6) unstable; urgency=low + + * Tweaked Objective-C thread support (#11069) + + -- Galen Hazelwood Wed, 9 Jul 1997 11:56:57 -0600 + +gcc (2.7.2.2-5) unstable; urgency=low + + * More updated m68k patches + * Now conflicts with libc5-dev (#10006, #10112) + * More strict Depends: cpp, prevents version mismatch (#9954) + + -- Galen Hazelwood Thu, 19 Jun 1997 01:29:02 -0600 + +gcc (2.7.2.2-4) unstable; urgency=low + + * Moved to unstable + * Temporarily removed fortran support (waiting for new g77) + * Updated m68k patches + + -- Galen Hazelwood Fri, 9 May 1997 13:35:14 -0600 + +gcc (2.7.2.2-3) experimental; urgency=low + + * Built against libc6 (fixes bug #8511) + + -- Galen Hazelwood Fri, 4 Apr 1997 13:30:10 -0700 + +gcc (2.7.2.2-2) experimental; urgency=low + + * Fixed configure to build crt{begin,end}S.o on i386 + + -- Galen Hazelwood Tue, 11 Mar 1997 16:15:02 -0700 + +gcc (2.7.2.2-1) experimental; urgency=low + + * Built for use with libc6-dev (experimental purposes only!) + * Added m68k patches from Andreas Schwab + + -- Galen Hazelwood Fri, 7 Mar 1997 12:44:17 -0700 + +gcc (2.7.2.1-7) unstable; urgency=low + + * Patched to support g77 0.5.20 + + -- Galen Hazelwood Thu, 6 Mar 1997 22:20:23 -0700 + +gcc (2.7.2.1-6) unstable; urgency=low + + * Added (small) manpage for protoize/unprotoize (fixes bug #6904) + * Removed -lieee from specs file (fixes bug #7741) + * No longer builds aout-gcc + + -- Galen Hazelwood Mon, 3 Mar 1997 11:10:20 -0700 + +gcc (2.7.2.1-5) unstable; urgency=low + + * debian/control now lists cpp in section "interpreters" + * Re-added Objective-c patches for unstable + + -- Galen Hazelwood Wed, 22 Jan 1997 10:27:52 -0700 + +gcc (2.7.2.1-4) stable unstable; urgency=low + + * Changed original source file so dpkg-source -x works + * Removed Objective-c patches (unsafe for stable) + * Built against rex's libc, so fixes placed in -3 are available to + those still using rex + + -- Galen Hazelwood Tue, 21 Jan 1997 11:11:53 -0700 + +gcc (2.7.2.1-3) unstable; urgency=low + + * New (temporary) maintainer + * Updated to new standards and source format + * Integrated aout-gcc into gcc source package + * Demoted aout-gcc to Priority "extra" + * cpp package description more clear (fixes bug #5428) + * Removed cpp "Replaces: gcc" (fixes bug #5762) + * Minor fix to invoke.texi (fixes bug #2909) + * Added latest Objective-C patches for GNUstep people (fixes bug #4657) + + -- Galen Hazelwood Sun, 5 Jan 1997 09:57:36 -0700 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.arm +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.arm @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_sj0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.2.orig/debian/libgcc1.symbols.powerpc +++ gcc-4.7-4.7.2/debian/libgcc1.symbols.powerpc @@ -0,0 +1,142 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + 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__enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_4.1.0 1:4.1.1 + __gcc_qdiv@GCC_4.1.0 1:4.1.1 + __gcc_qmul@GCC_4.1.0 1:4.1.1 + __gcc_qsub@GCC_4.1.0 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.7-4.7.2.orig/debian/cpp-BV-CRB.preinst.in +++ gcc-4.7-4.7.2/debian/cpp-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-cpp /usr/bin/@TARGET@-cpp-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/gcc-snapshot.overrides +++ gcc-4.7-4.7.2/debian/gcc-snapshot.overrides @@ -0,0 +1,4 @@ +gcc-snapshot binary: bad-permissions-for-ali-file + +# keep patched ltdl copy +gcc-snapshot binary: embedded-library --- gcc-4.7-4.7.2.orig/debian/gcj-BV-jre-headless.postinst +++ gcc-4.7-4.7.2/debian/gcj-BV-jre-headless.postinst @@ -0,0 +1,48 @@ +#! /bin/sh -e + +prio=@java_priority@ + +update-alternatives --quiet \ + --install /usr/bin/java java /usr/bin/gij-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/java.1.gz java.1.gz /usr/share/man/man1/gij-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmiregistry rmiregistry /usr/bin/grmiregistry-@BV@ $prio \ + --slave /usr/share/man/man1/rmiregistry.1.gz rmiregistry.1.gz /usr/share/man/man1/grmiregistry-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/keytool keytool /usr/bin/gkeytool-@BV@ $prio \ + --slave /usr/share/man/man1/keytool.1.gz keytool.1.gz /usr/share/man/man1/gkeytool-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/orbd orbd /usr/bin/gorbd-@BV@ $prio \ + --slave /usr/share/man/man1/orbd.1.gz orbd.1.gz /usr/share/man/man1/gorbd-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmid rmid /usr/bin/grmid-@BV@ $prio \ + --slave /usr/share/man/man1/rmid.1.gz rmid.1.gz /usr/share/man/man1/grmid-@BV@.1.gz + +case "$1" in +configure) + if [ ! -f /var/lib/gcj-@BV@/classmap.db ]; then + uname=$(uname -m) + mkdir -p /var/lib/gcj-@BV@ + if gcj-dbtool-@BV@ -n /var/lib/gcj-@BV@/classmap.db; then + case "$uname" in arm*|m68k|parisc*) + echo >&2 "gcj-dbtool succeeded unexpectedly" + esac + else + case "$uname" in + arm*|m68k|parisc*) + echo >&2 "ERROR: gcj-dbtool did fail; known problem on $uname";; + *) + exit 2 + esac + touch /var/lib/gcj-@BV@/classmap.db + fi + fi +esac + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.2.orig/debian/lib64gfortran3.symbols.mips +++ gcc-4.7-4.7.2/debian/lib64gfortran3.symbols.mips @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.2.orig/debian/gcj-BV-jdk.doc-base +++ gcc-4.7-4.7.2/debian/gcj-BV-jdk.doc-base @@ -0,0 +1,15 @@ +Document: gcj-@BV@ +Title: The GNU Ahead-of-time Compiler for the Java Language +Author: Various +Abstract: This manual describes how to use gcj, the GNU compiler for + the Java programming language. gcj can generate both .class files and + object files, and it can read both Java source code and .class files. +Section: Programming/Java + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/java/gcj.html +Files: /usr/share/doc/gcc-@BV@-base/java/gcj.html + +Format: info +Index: /usr/share/info/gcj-@BV@.info.gz +Files: /usr/share/info/gcj-@BV@* --- gcc-4.7-4.7.2.orig/debian/rules.defs +++ gcc-4.7-4.7.2/debian/rules.defs @@ -0,0 +1,1496 @@ +# -*- makefile -*- +# definitions used in more than one Makefile / rules file + +# common vars +SHELL = /bin/bash -e # brace expansion used in rules file +PWD := $(shell pwd) +srcdir = $(PWD)/src +builddir = $(PWD)/build +stampdir = stamps + +distribution := $(shell lsb_release -is) +distrelease := $(shell lsb_release -cs) + +# On non official archives, "lsb_release -cs" default to "n/a". Assume +# sid in that case +ifeq ($(distrelease),n/a) +distrelease := sid +endif + +on_buildd := $(shell [ -f /CurrentlyBuilding -o "$$LOGNAME" = buildd ] && echo yes) + +# creates {srcdir,builddir}_{hppa64,neon,spu} +$(foreach x,srcdir builddir,$(foreach target,hppa64 spu neon,$(eval \ + $(x)_$(target) := $($(x))-$(target)))) + +# for architecture dependent variables and changelog vars +vafilt = $(subst $(2)=,,$(filter $(2)=%,$(1))) +# for rules.sonames +vafilt_defined = 1 + +DPKG_VARS := $(shell dpkg-architecture) +DEB_BUILD_GNU_TYPE ?= $(call vafilt,$(DPKG_VARS),DEB_BUILD_GNU_TYPE) +DEB_HOST_ARCH ?= $(call vafilt,$(DPKG_VARS),DEB_HOST_ARCH) +DEB_HOST_GNU_CPU ?= $(call vafilt,$(DPKG_VARS),DEB_HOST_GNU_CPU) +DEB_HOST_GNU_SYSTEM ?= $(call vafilt,$(DPKG_VARS),DEB_HOST_GNU_SYSTEM) +DEB_HOST_GNU_TYPE ?= $(call vafilt,$(DPKG_VARS),DEB_HOST_GNU_TYPE) +DEB_HOST_MULTIARCH ?= $(call vafilt,$(DPKG_VARS),DEB_HOST_MULTIARCH) + +CHANGELOG_VARS := $(shell dpkg-parsechangelog | \ + sed -n 's/ /_/g;/^[^_]/s/^\([^:]*\):_\(.*\)/\1=\2/p') + +# the name of the source package +PKGSOURCE := $(call vafilt,$(CHANGELOG_VARS),Source) +# those are required here too +SOURCE_VERSION := $(call vafilt,$(CHANGELOG_VARS),Version) +DEB_VERSION := $(strip $(shell echo $(SOURCE_VERSION) | \ + sed -e 's/.*://' -e 's/ds[0-9]*//')) +# epoch used for gcc versions up to 3.3.x, now used for some remaining +# libraries: libgcc1, libobjc1 +EPOCH := 1 +DEB_EVERSION := $(EPOCH):$(DEB_VERSION) +BASE_VERSION := $(shell echo $(DEB_VERSION) | sed -e 's/\([1-9]\.[0-9]\).*-.*/\1/') + +ifneq (,$(findstring gdc,$(PKGSOURCE))) + BASE_VERSION := $(shell echo $(DEB_VERSION) | sed -e 's/.*-\([1-9]\.[0-9]\).*-.*/\1/') +endif + +# push glibc stack traces into stderr +export LIBC_FATAL_STDERR_=1 + +# --------------------------------------------------------------------------- +# set target +# - GNU triplet via DEB_TARGET_GNU_TYPE +# - Debian arch in debian/target +# - Debian arch via DEB_GCC_TARGET or GCC_TARGET +# +# alias +ifdef GCC_TARGET + DEB_GCC_TARGET := $(GCC_TARGET) +endif +ifdef DEB_TARGET_GNU_TYPE + TARGET_VARS := $(shell dpkg-architecture -f -t$(DEB_TARGET_GNU_TYPE) 2>/dev/null) +else + # allow debian/target to be used instead of DEB_GCC_TARGET - this was requested + # by toolchain-source maintainer + DEBIAN_TARGET_FILE := $(strip $(if $(wildcard debian/target),$(shell cat debian/target 2>/dev/null))) + ifndef DEB_TARGET_ARCH + ifneq (,$(DEBIAN_TARGET_FILE)) + DEB_TARGET_ARCH := $(DEBIAN_TARGET_FILE) + else + ifdef DEB_GCC_TARGET + DEB_TARGET_ARCH := $(DEB_GCC_TARGET) + else + DEB_TARGET_ARCH := $(DEB_HOST_ARCH) + endif + endif + endif + TARGET_VARS := $(shell dpkg-architecture -f -a$(DEB_TARGET_ARCH) 2>/dev/null) +endif + +DEB_TARGET_ARCH ?= $(call vafilt,$(TARGET_VARS),DEB_HOST_ARCH) +DEB_TARGET_ARCH_OS ?= $(call vafilt,$(TARGET_VARS),DEB_HOST_ARCH_OS) +DEB_TARGET_ARCH_CPU ?= $(call vafilt,$(TARGET_VARS),DEB_HOST_ARCH_CPU) +DEB_TARGET_GNU_CPU ?= $(call vafilt,$(TARGET_VARS),DEB_HOST_GNU_CPU) +DEB_TARGET_GNU_TYPE ?= $(call vafilt,$(TARGET_VARS),DEB_HOST_GNU_TYPE) +DEB_TARGET_GNU_SYSTEM ?= $(call vafilt,$(TARGET_VARS),DEB_HOST_GNU_SYSTEM) +DEB_TARGET_MULTIARCH ?= $(call vafilt,$(TARGET_VARS),DEB_HOST_MULTIARCH) + +ifeq ($(DEB_TARGET_ARCH),) + $(error Invalid architecure.) +endif + +# including unversiond symlinks for binaries +#with_unversioned = yes + +# --------------------------------------------------------------------------- +# cross-compiler config +# - typical cross-compiler +# - reverse cross (built to run on the target) +# - full canadian +# - native +# +# build != host && host == target : reverse cross (REVERSE_CROSS == yes) +# build == host && host != target : typical cross (DEB_CROSS == yes) +# build != host && host != target : canadian (DEB_CROSS == yes) +# build == host && host == target : native +ifneq ($(DEB_BUILD_GNU_TYPE),$(DEB_HOST_GNU_TYPE)) + ifneq ($(DEB_HOST_GNU_TYPE),$(DEB_TARGET_GNU_TYPE)) + DEB_CROSS = yes + else + REVERSE_CROSS = yes + endif +else + ifneq ($(DEB_HOST_GNU_TYPE),$(DEB_TARGET_GNU_TYPE)) + DEB_CROSS = yes + else + # first ones are squeeze+1 and maverick + ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid)) + with_sysroot = / + endif + endif +endif + +# --------------------------------------------------------------------------- +# cross compiler support +ifeq ($(DEB_CROSS),yes) + # TARGET: Alias to DEB_TARGET_ARCH (Debian arch name) + # TP: Target Prefix. Used primarily as a prefix for cross tool + # names (e.g. powerpc-linux-gcc). + # TS: Target Suffix. Used primarily at the end of cross compiler + # package names (e.g. gcc-powerpc). + # LS: Library Suffix. Used primarily at the end of cross compiler + # library package names (e.g. libgcc-powerpc-cross). + DEB_TARGET_ALIAS ?= $(DEB_TARGET_GNU_TYPE) + TARGET := $(DEB_TARGET_ARCH) + TP := $(subst _,-,$(DEB_TARGET_GNU_TYPE))- + TS := -$(subst _,-,$(DEB_TARGET_ALIAS)) + LS := -$(subst _,-,$(DEB_TARGET_ARCH))-cross + + cross_bin_arch := -$(subst _,-,$(DEB_TARGET_ALIAS)) + cross_lib_arch := -$(subst _,-,$(DEB_TARGET_ARCH))-cross + cmd_prefix := $(DEB_TARGET_GNU_TYPE)- + + TARGET_ALIAS := $(DEB_TARGET_ALIAS) + + lib_binaries := indep_binaries + cross_shlibdeps = $(SET_CROSS_LIB_PATH) DEB_HOST_ARCH=$(TARGET) ARCH=$(DEB_TARGET_ARCH) MAKEFLAGS="CC=something" + cross_gencontrol = DEB_HOST_ARCH=$(TARGET) + cross_makeshlibs = DEB_HOST_ARCH=$(TARGET) + cross_clean = DEB_HOST_ARCH=$(TARGET) +else + TARGET_ALIAS := $(DEB_TARGET_GNU_TYPE) + + ifeq ($(TARGET_ALIAS),i386-gnu) + TARGET_ALIAS := i586-gnu + endif + + cmd_prefix := + + #ifeq ($(TARGET_ALIAS),i486-linux-gnu) + # TARGET_ALIAS := i686-linux-gnu + #endif + + TARGET_ALIAS := $(subst i386,i486,$(TARGET_ALIAS)) + + # configure as linux-gnu, not linux + #ifeq ($(findstring linux,$(TARGET_ALIAS))/$(findstring linux-gnu,$(TARGET_ALIAS)),linux/) + # TARGET_ALIAS := $(TARGET_ALIAS)-gnu + #endif + + # configure as linux, not linux-gnu + #TARGET_ALIAS := $(subst linux-gnu,linux,$(TARGET_ALIAS)) + + lib_binaries := arch_binaries + cross_shlibdeps := + cross_gencontrol := + cross_makeshlibs := + cross_clean := +endif + +printarch: + @echo DEB_TARGET_ARCH: $(DEB_TARGET_ARCH) + @echo DEB_TARGET_ARCH_OS: $(DEB_TARGET_ARCH_OS) + @echo DEB_TARGET_ARCH_CPU: $(DEB_TARGET_ARCH_CPU) + @echo DEB_TARGET_GNU_SYSTEM: $(DEB_TARGET_GNU_SYSTEM) + @echo DEB_TARGET_MULTIARCH: $(DEB_TARGET_MULTIARCH) + @echo MULTIARCH_CONFARG: $(MULTIARCH_CONFARG) + @echo TARGET_ALIAS: $(TARGET_ALIAS) + @echo TP: $(TP) + @echo TS: $(TS) + +# ------------------------------------------------------------------- +# bootstrap options +ifdef WITH_BOOTSTRAP + # "yes" is the default and causes a 3-stage bootstrap. + # "off" runs a complete build with --disable-bootstrap + # "no" means to just build the first stage, and not create the stage1 + # directory. + # "lean" means a lean 3-stage bootstrap, i.e. delete each stage when no + # longer needed. + with_bootstrap = $(WITH_BOOTSTRAP) +endif +ifneq ($(findstring nostrap, $(DEB_BUILD_OPTIONS)),) + with_bootstrap := off +endif + +# ------------------------------------------------------------------- +# stage options +ifdef DEB_STAGE + with_cdev := yes + separate_lang := yes + # "stage1" is minimal compiler with static libgcc + # "stage2" is minimal compiler with shared libgcc + ifeq ($(DEB_STAGE),stage1) + with_shared_libgcc := no + endif + ifeq ($(DEB_STAGE),stage2) + with_libgcc := yes + with_shared_libgcc := yes + endif +endif + +ifeq ($(BACKPORT),true) + with_dev := no + with_source := yes + with_base_only := yes +endif + +# ------------------------------------------------------------------- +# sysroot options +ifdef WITH_SYSROOT + with_sysroot = $(WITH_SYSROOT) +endif +ifdef WITH_BUILD_SYSROOT + with_build_sysroot = $(WITH_BUILD_SYSROOT) +endif + +# ------------------------------------------------------------------- +# for components configuration + +COMMA = , +SPACE = $(EMPTY) $(EMPTY) + +# lang= overwrites all of nolang=, overwrites all of WITHOUT_LANG + +DEB_LANG_OPT := $(filter lang=%,$(DEB_BUILD_OPTIONS)) +DEB_LANG := $(strip $(subst $(COMMA), ,$(patsubst lang=%,%,$(DEB_LANG_OPT)))) +DEB_NOLANG_OPT := $(filter nolang=%,$(DEB_BUILD_OPTIONS)) +DEB_NOLANG := $(strip $(subst $(COMMA), ,$(patsubst nolang=%,%,$(DEB_NOLANG_OPT)))) +lfilt = $(strip $(if $(DEB_LANG), \ + $(if $(filter $(1) $(2),$(DEB_LANG)),yes),$(3))) +nlfilt = $(strip $(if $(DEB_NOLANG), \ + $(if $(filter $(1) $(2),$(DEB_NOLANG)),disabled by $(DEB_NOLANG_OPT),$(3)))) +wlfilt = $(strip $(if $(filter $(1) $(2), $(subst $(COMMA), ,$(WITHOUT_LANG))), \ + disabled by WITHOUT_LANG=$(WITHOUT_LANG),$(3))) +envfilt = $(strip $(or $(call lfilt,$(1),$(2)),$(call nlfilt,$(1),$(3)),$(call wlfilt,$(1),$(3)),$(4))) + +# ------------------------------------------------------------------- +# architecture specific config + +# FIXME: libjava is not ported for thumb, this hack only works for +# separate gcj builds +ifeq (,$(findstring gcj,$(PKGSOURCE))) + ifeq ($(DEB_TARGET_ARCH),armhf) + with_arm_thumb := yes + else + ifeq ($(distribution)-$(DEB_TARGET_ARCH),Ubuntu-armel) + ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise)) + with_arm_thumb := yes + endif + endif + endif +endif + +# build using fsf or linaro +ifeq ($(distribution),Ubuntu) + ifeq (,$(findstring gnat, $(PKGSOURCE))) + ifneq (,$(findstring $(DEB_TARGET_ARCH),armel armhf amd64 i386 powerpc)) + with_linaro_branch = yes + endif + endif +endif + +# check if we're building for armel or armhf +ifeq ($(DEB_TARGET_ARCH),armhf) + float_abi := hard +else ifneq (,$(filter $(distribution)-$(DEB_TARGET_ARCH), Ubuntu-armel)) + ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise)) + float_abi := softfp + else + float_abi := soft + endif +else ifneq (,$(filter $(DEB_TARGET_ARCH), arm armel)) + float_abi := soft +endif + +# ------------------------------------------------------------------- +# basic config + +# common things --------------- +# build common packages, where package names don't differ in different +# gcc versions (fixincludes, libgcj-common) ... +with_common_pkgs := yes +# ... and some libraries, which do not change (libgcc1, libmudflap, libssp0). +with_common_libs := yes +# XXX: should with_common_libs be "yes" only if this is the default compiler +# version on the targeted arch? + +# is this a multiarch-enabled build? +ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick)) + with_multiarch_lib := yes +endif + +ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick)) + multiarch_stage1 := yes +endif + +# mapping for the non-default biarch multilib / multiarch names +multiarch_xarch_map = \ + amd64=i386-linux-gnu,x86_64-linux-gnux32 \ + armel=arm-linux-gnueabi \ + armhf=arm-linux-gnueabihf \ + i386=x86_64-linux-gnu,x86_64-linux-gnux32 \ + powerpc=powerpc64-linux-gnu \ + ppc64=powerpc-linux-gnu \ + sparc=sparc64-linux-gnu \ + sparc64=sparc-linux-gnu \ + s390=s390x-linux-gnu \ + s390x=s390-linux-gnu \ + mips=mips64-linux-gnuabin32,mips64-linux-gnuabi64 \ + mipsel=mips64el-linux-gnuabin32,mips64el-linux-gnuabi64 \ + x32=x86_64-linux-gnu,i386-linux-gnu \ + kfreebsd-amd64=i386-kfreebsd-gnu +xarch_multiarch_names = $(subst $(COMMA),$(SPACE),$(patsubst $(DEB_TARGET_ARCH)=%,%, \ + $(filter $(DEB_TARGET_ARCH)=%,$(multiarch_xarch_map)))) + +ifneq ($(DEB_STAGE),stage1) + # build a -base package. + ifneq ($(DEB_CROSS),yes) + with_gccbase := yes + else + with_gccxbase := yes + endif +endif + +# build dev packages. +with_dev := yes + +with_cpp := yes + +# set lang when built from a different source package. +separate_lang := no + +ifneq (,$(findstring gcc-snapshot, $(PKGSOURCE))) + single_package = yes + trunk_build = yes + with_linaro_branch = +else ifneq (,$(findstring gcc-linaro, $(PKGSOURCE))) + single_package = yes + trunk_build = no +else + # --program-suffix=-$(BASE_VERSION) + versioned_packages := yes +endif + +#no_dummy_cpus := ia64 i386 hppa s390 sparc +#ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(no_dummy_cpus))) +# with_base_only := no +# with_common_libs := yes +# with_common_pkgs := yes +#else +# with_base_only := yes +# with_common_libs := no +# with_common_pkgs := no +# with_dev := no +#endif + +ifeq ($(versioned_packages),yes) + pkg_ver := -$(BASE_VERSION) + PV := $(pkg_ver) +endif + +# ------------------------------------------------------------------- +# configure languages + +# C --------------------------- +enabled_languages := c + +# Build all packages needed for C development +ifneq ($(with_base_only),yes) + ifeq ($(with_dev),yes) + with_cdev := yes + endif +endif + +ifndef DEB_STAGE +# Ada -------------------- +ada_no_cpus := m32r m68k sh3 sh3eb sh4 sh4eb +ada_no_systems := +ada_no_cross := yes +ada_no_snap := no +ifneq (,$(filter $(DEB_TARGET_ARCH),arm64 armhf m68k powerpcspe sh4 sparc64)) + ada_no_snap := yes +endif + +ifeq ($(with_dev),yes) + ifneq ($(separate_lang),yes) + with_ada := yes + endif +endif +ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(ada_no_cpus))) + with_ada := disabled for cpu $(DEB_TARGET_ARCH_CPU) +endif +ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(ada_no_systems))) + with_ada := disabled for system $(DEB_TARGET_GNU_SYSTEM) +endif +ifeq ($(ada_no_cross)-$(DEB_CROSS),yes-yes) + with_ada := disabled for cross compiler package +endif +ifeq ($(ada_no_snap)-$(single_package),yes-yes) + with_ada := disabled for snapshot build +endif +with_ada := $(call envfilt, ada, , , $(with_ada)) + +ifneq ($(single_package),yes) + with_separate_gnat := yes +endif +ifeq ($(with_ada)-$(with_separate_gnat),yes-yes) + ifneq (,$(findstring gnat,$(PKGSOURCE))) + languages := c + separate_lang := yes + else + debian_extra_langs += ada + with_ada := built from separate source + with_libgnat := built from separate source + endif +endif + +ifeq ($(with_ada),yes) + enabled_languages += ada + with_libgnat := yes + # There are two exception handling mechanisms: ZCX (Zero-Cost + # eXceptions) and SJLJ (setjump/longjump), selected and supported by + # libgnat. Thus we build both versions of libgnat on architectures + # that support both (see ada-sjlj.diff). Most cpus support both + # mechanisms; here, we declare the few that support only one. + libgnat_zcx_only_cpus := + libgnat_sjlj_only_cpus := arm armel armhf + ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(libgnat_sjlj_only_cpus))) + with_gnat_zcx := no + else + with_gnat_zcx := yes + endif + ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(libgnat_zcx_only_cpus))) + with_gnat_sjlj := no + else + with_gnat_sjlj := yes + endif + ifeq ($(with_gnat_zcx)-$(with_gnat_sjlj),no-no) + # TODO: support cpus that do not support exceptions at all, + # perhaps by building a restricted runtime library? For now, flag + # this as a packaging error. + $(error this target supports neither ZCX nor SJLJ) + endif +endif + +# C++ ------------------------- +cxx_no_cpus := avr +ifneq ($(with_base_only),yes) + ifneq ($(separate_lang),yes) + with_cxx := yes + endif +endif +ifneq (,$(findstring $(DEB_TARGET_ARCH_CPU),$(cxx_no_cpus))) + with_cxx := disabled for cpu $(DEB_TARGET_ARCH_CPU) +endif +with_cxx := $(call envfilt, c++, obj-c++ java, , $(with_cxx)) + +# Build all packages needed for C++ development +ifeq ($(with_cxx),yes) + ifeq ($(with_dev),yes) + with_cxxdev := yes + with_libcxxdbg := yes + endif + ifeq ($(with_common_pkgs),yes) + with_libcxx := yes + endif + + # debugging versions of libstdc++ + ifneq (,$(findstring gcc-, $(PKGSOURCE))) + ifeq ($(with_cxxdev),yes) + with_debug := yes + debug_no_cpus := + ifneq (,$(findstring $(DEB_TARGET_ARCH_CPU),$(debug_no_cpus))) + with_debug := disabled for cpu $(DEB_TARGET_GNU_CPU) + endif + endif + endif + with_debug := $(call envfilt, debug, , , $(with_debug)) + + enabled_languages += c++ +endif + +# Java -------------------- +# - To build a standalone gcj package (with no corresponding gcc +# package): with_separate_libgcj=yes, with_standalone_gcj=yes +# - To build the java packages from the gcc source package: +# with_separate_libgcj=no, with_standalone_gcj=no +# - To build gcc and java from separate sources: +# with_separate_libgcj=yes, with_standalone_gcj=no + +java_no_cpus := arm64 # mips mipsel +java_no_systems := knetbsd-gnu +java_no_cross := yes + +ifneq ($(single_package),yes) + with_separate_libgcj := yes +endif +with_standalone_gcj := no + +ifneq ($(separate_lang),yes) + with_java := yes +endif + +# java converted for V3 C++ ABI for some archs +ifeq ($(with_base_only),yes) + with_java := no +endif +ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(java_no_cpus))) + with_java := disabled for cpu $(DEB_TARGET_ARCH_CPU) +endif +ifneq (,$(filter $(DEB_TARGET_GNU_SYSTEM),$(java_no_systems))) + with_java := disabled for system $(DEB_TARGET_GNU_SYSTEM) +endif +ifeq ($(java_no_cross)-$(DEB_CROSS),yes-yes) + with_java := disabled for cross compiler package +endif +with_java := $(call envfilt, java, , c++, $(with_java)) + +ifeq ($(with_java)-$(with_separate_libgcj),yes-yes) + ifneq (,$(findstring gcj, $(PKGSOURCE))) + languages := c c++ + separate_lang := yes + else + debian_extra_langs += java + with_java := built from separate source + with_gcj := built from separate source + with_libgcj := buit from separate source + endif +endif + +with_java_plugin := no + +ifeq ($(with_java),yes) + # use the same names as OpenJDK + java_cpu_map = armel=arm armhf=arm hppa=parisc i686=i386 i586=i386 i486=i386 mipsel=mips powerpc=ppc sh4=sh + java_cpu = $(patsubst $(DEB_TARGET_ARCH_CPU)=%,%, \ + $(filter $(DEB_TARGET_ARCH_CPU)=%,$(java_cpu_map))) + ifeq (,$(java_cpu)) + java_cpu = $(DEB_TARGET_ARCH_CPU) + endif + java_priority = 10$(subst .,,$(BASE_VERSION)) + + with_libgcj := yes + with_libgcjbc := no + + ifneq (,$(findstring gcj-4,$(PKGSOURCE))) + ifneq (,$(filter $(DEB_TARGET_ARCH), arm)) + with_gcj_base_only := yes + endif + endif + + ifeq ($(single_package),yes) + with_ecj := yes + endif + + #ifneq (,$(filter $(DEB_TARGET_ARCH),hppa)) + # with_native_ecj := yes + #endif + + with_java_maintainer_mode := no + + # used as well in debian/rules.conf to determine the build deps + java_awt_peers = gtk # qt # xlib + + ifeq ($(with_common_libs),yes) + with_libgcj_doc := yes + endif + + # Build all packages needed for Java development (gcj, libgcj-dev) + ifeq ($(with_dev),yes) + with_javadev := yes + with_gcj := yes + endif + + with_java_alsa := yes + ifeq (,$(filter $(DEB_TARGET_GNU_SYSTEM),linux-gnu)) + with_java_alsa := no + endif + + enabled_languages += java +endif + +# Go ------------------- +# - To build a standalone gccgo package (with no corresponding gcc +# package): with_separate_libgo=yes, with_standalone_go=yes +# - To build the java packages from the gcc source package: +# with_separate_libgo=no, with_standalone_go=no +# - To build gcc and java from separate sources: +# with_separate_libgo=yes, with_standalone_go=no + +go_no_cross := yes +go_no_cross := no + +ifneq (,$(findstring gccgo, $(PKGSOURCE))) + with_separate_libgo := yes +endif + +go_no_cpus := avr arm hppa m68k sh4 sparc sparc64 +ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty oneiric)) + go_no_cpus := $(filter-out arm, $(go_no_cpus)) +endif +ifneq ($(trunk_build),yes) + go_no_cpus := $(go_no_cpus) alpha arm64 +endif +go_no_systems := gnu kfreebsd-gnu + +ifneq ($(with_base_only),yes) + ifneq ($(separate_lang),yes) + with_go := yes + endif +endif +ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(go_no_cpus))) + with_go := disabled for cpu $(DEB_TARGET_ARCH_CPU) +endif +ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(go_no_systems))) + with_go := disabled for system $(DEB_TARGET_GNU_SYSTEM) +endif +ifeq ($(go_no_cross)-$(DEB_CROSS),yes-yes) + with_go := disabled for cross compiler package +endif +with_go := $(call envfilt, go, , , $(with_go)) + +# Build all packages needed for Go development +ifeq ($(with_go),yes) + ifeq ($(with_common_libs),yes) + with_libgo := yes + endif + enabled_languages += go +endif + +ifeq ($(with_go)-$(with_separate_libgo),yes-yes) + ifneq (,$(findstring gccgo, $(PKGSOURCE))) + languages := c c++ go + separate_lang := yes + else + debian_extra_langs += go + with_go := built from separate source + with_libgo := buit from separate source + endif +endif + +# D --------------------------- +d_no_cross := yes +d_no_snap := yes + +ifneq ($(single_package),yes) + with_separate_gdc := yes +endif + +ifneq ($(separate_lang),yes) + with_d := yes +endif +ifeq ($(d_no_snap)-$(single_package),yes-yes) + with_d := disabled for snapshot build +endif + +ifeq ($(with_d)-$(with_separate_gdc),yes-yes) + ifneq (,$(findstring gdc,$(PKGSOURCE))) + languages := c c++ + separate_lang := yes + else + debian_extra_langs += d + with_d := built from separate source + endif +endif + +ifeq ($(with_base_only),yes) + with_d := no +endif + +ifeq ($(with_d),yes) + # no suffix for D 1.0 + #libphobos_version := + # still experimental + libphobos_version := 2 + + with_libphobos := yes + + libphobos_no_cpus := alpha avr arm hppa ia64 m68k mips mipsel powerpc powerpcspe ppc64 s390 s390x sh4 sparc sparc64 + libphobos_no_systems := gnu + ifneq (,$(findstring $(DEB_TARGET_ARCH_CPU),$(libphobos_no_cpus))) + with_libphobos := disabled for cpu $(DEB_TARGET_ARCH_CPU) + endif + ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(libphobos_no_systems))) + with_libphobos := disabled for system $(DEB_TARGET_GNU_SYSTEM) + endif + + enabled_languages += d +endif + +# Fortran 95 ------------------- +fortran_no_cross := yes +fortran_no_cross := no + +ifneq ($(with_base_only),yes) + ifneq ($(separate_lang),yes) + with_fortran := yes + endif +endif +ifeq ($(fortran_no_cross)-$(DEB_CROSS),yes-yes) + with_fortran := disabled for cross compiler package +endif +with_fortran := $(call envfilt, fortran, , , $(with_fortran)) + +# Build all packages needed for Fortran development +ifeq ($(with_fortran),yes) + ifeq ($(with_dev),yes) + with_fdev := yes + endif + ifeq ($(with_common_libs),yes) + with_libgfortran := yes + endif + enabled_languages += fortran +endif + +# libquadmath ------------------- + +ifneq (,$(findstring $(DEB_TARGET_ARCH_CPU), ia64 i386 i486 i586 i686 amd64)) + # FIXME: upstream build tied to gfortran build + ifeq ($(with_fortran),yes) + with_qmath := yes + ifneq (,$(findstring gcc-4,$(PKGSOURCE))) + ifeq ($(with_common_libs),yes) + with_libqmath := yes + endif + endif + endif +endif + +# ObjC ------------------------ +objc_no_cross := no + +ifneq ($(with_base_only),yes) + ifneq ($(separate_lang),yes) + with_objc := yes + objc_no_archs = arm64 + ifneq (,$(filter $(DEB_TARGET_ARCH),$(objc_no_archs))) + with_objc := + endif + endif +endif +ifeq ($(objc_no_cross)-$(DEB_CROSS),yes-yes) + with_objc := disabled for cross compiler package +endif +with_objc := $(call envfilt, objc, obj-c++, , $(with_objc)) + +ifeq ($(with_objc),yes) + # the ObjC runtime with garbage collection enabled needs the Boehm GC + with_objc_gc := yes + + # disable ObjC garbage collection library (needs libgc) + libgc_no_cpus := arm64 avr mips mipsel # alpha amd64 arm armel armhf hppa i386 ia64 m68k mips mipsel powerpc ppc64 s390 s390x sparc + libgc_no_systems := knetbsd-gnu + ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(libgc_no_cpus))) + with_objc_gc := disabled for cpu $(DEB_TARGET_ARCH_CPU) + endif + ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(libgc_no_systems))) + with_objc_gc := disabled for system $(DEB_TARGET_GNU_SYSTEM) + endif + + # Build all packages needed for Objective-C development + ifeq ($(with_dev),yes) + with_objcdev := yes + endif + # libobjc soname change in 4.7 + #ifeq ($(with_common_libs),yes) + with_libobjc := yes + #endif + + enabled_languages += objc +endif + +# ObjC++ ---------------------- +objcxx_no_cross := no + +ifeq ($(with_objc),yes) + ifneq ($(with_base_only),yes) + ifneq ($(separate_lang),yes) + with_objcxx := yes + endif + endif +endif +ifeq ($(objcxx_no_cross)-$(DEB_CROSS),yes-yes) + with_objcxx := disabled for cross compiler package +endif +with_objcxx := $(call envfilt, obj-c++, , c++ objc, $(with_objcxx)) + +ifeq ($(with_objcxx),yes) + enabled_languages += obj-c++ +endif + +# ------------------------------------------------------------------- +# other config + +# not built from the main source package +ifeq (,$(findstring gcc-,$(PKGSOURCE))) + extra_package := yes +endif + +with_nls := yes +ifeq ($(trunk_build),yes) + with_nls := no +endif +with_nls := $(call envfilt, nls, , , $(with_nls)) + +# powerpc nof libraries ----- +with_libnof := no + +ifneq (,$(findstring gcc-4,$(PKGSOURCE))) + with_source := yes +endif +with_source := $(call envfilt, source, , , $(with_source)) + +# ssp & libssp ------------------------- +with_ssp := yes +ssp_no_archs = alpha arm64 hppa ia64 m68k +ifneq (, $(filter $(DEB_TARGET_ARCH),$(ssp_no_archs) $(ssp_no_archs:%=uclibc-%))) + with_ssp := not available on $(DEB_TARGET_ARCH) +endif +with_ssp := $(call envfilt, ssp, , , $(with_ssp)) + +ifeq ($(with_ssp),yes) + ifneq ($(distribution),Debian) + ifneq (,$(findstring gcc-4, $(PKGSOURCE))) + with_ssp_default := yes + endif + endif +endif + +# mudflap ------------------- +with_mudflap := yes +with_mudflap := $(call envfilt, mudflap, , , $(with_mudflap)) +mudflap_no_archs = arm64 +ifneq (,$(filter $(DEB_TARGET_ARCH),$(mudflap_no_archs))) + with_mudflap := +endif + +# gomp -------------------- +with_gomp := yes +with_gomp := $(call envfilt, gomp, , , $(with_gomp)) +gomp_no_archs = arm64 +ifneq (,$(filter $(DEB_TARGET_ARCH),$(gomp_no_archs))) + with_gomp := +endif + +# itm -------------------- +itm_archs = amd64 i386 x32 +ifneq (,$(filter $(DEB_TARGET_ARCH),$(itm_archs))) + with_itm := yes +endif +with_itm := $(call envfilt, itm, , , $(with_itm)) + +# gold -------------------- +# armel with binutils 2.20.51 only +gold_archs = amd64 armel armhf i386 lpia powerpc ppc64 sparc +ifneq (,$(filter $(DEB_TARGET_ARCH),$(gold_archs))) + with_gold := yes +endif + +# plugins -------------------- +with_plugins := yes + +endif # ifndef DEB_STAGE + +# Don't include docs with GFDL invariant sections +GFDL_INVARIANT_FREE := yes +ifeq ($(distribution),Ubuntu) + GFDL_INVARIANT_FREE := no +endif + +# ------------------------------------------------------------------- +# non-extra config +ifeq ($(extra_package),yes) + ifeq ($(with_separate_libgcj)-$(with_standalone_gcj),yes-no) + # build stuff + with_mudflap := + + # package stuff + with_gccbase := no + with_cdev := no + with_cxx := no + with_cxxdev := no + endif + ifeq ($(with_separate_libgo),yes) + # build stuff + with_mudflap := + + # package stuff + with_gccbase := yes + with_cdev := no + with_cxx := no + with_cxxdev := no + endif +else + # libssp ------------------ + ifeq ($(with_ssp)-$(with_common_libs),yes-yes) + #ifneq ($(DEB_CROSS),yes) + with_libssp := $(if $(wildcard $(builddir)/gcc/auto-host.h),$(shell if grep -qs '^\#define TARGET_LIBC_PROVIDES_SSP 1' $(builddir)/gcc/auto-host.h; then echo 'libc provides ssp'; else echo 'yes'; fi)) + #endif + endif + + # libmudflap -------------- + ifeq ($(with_mudflap)-$(with_common_libs),yes-yes) + with_libmudflap := yes + endif + + # libgomp ----------------- + ifeq ($(with_gomp)-$(with_common_libs),yes-yes) + #ifneq ($(DEB_CROSS),yes) + with_libgomp := yes + #endif + endif + + # libitm ----------------- + ifeq ($(with_itm)-$(with_common_libs),yes-yes) + #ifneq ($(DEB_CROSS),yes) + with_libitm := yes + #endif + endif + + # libquadmath ----------------- + ifeq ($(with_qmath)-$(with_common_libs),yes-yes) + #ifneq ($(DEB_CROSS),yes) + with_libqmath := yes + #endif + endif + + # fixincludes ------- + ifneq ($(DEB_CROSS),yes) + ifeq ($(with_common_pkgs),yes) + with_fixincl := yes + endif + endif + + # Shared libgcc -------------------- + ifneq ($(DEB_STAGE),stage1) + with_shared_libgcc := yes + endif + ifeq ($(with_common_libs),yes) + with_libgcc := yes + endif + + # libgcc-math -------------------- + with_libgmath := no + ifneq (,$(findstring i486,$(DEB_TARGET_ARCH))) + #with_libgccmath := yes + #with_lib64gmath := yes + #with_libgmathdev := yes + endif + ifeq ($(DEB_TARGET_ARCH),amd64) + #with_libgccmath := yes + #with_lib32gmath := yes + #with_libgmathdev := yes + endif + + # hppa64 build ---------------- + hppa64_no_snap := no + ifeq ($(DEB_TARGET_ARCH),hppa) + with_hppa64 := yes + endif + ifeq ($(hppa64_no_snap)-$(trunk_build),yes-yes) + with_hppa64 := disabled for snapshot build + endif + with_hppa64 := $(call envfilt, hppa64, , , $(with_hppa64)) + + # spu build ------------------- + spu_no_snap := no + ifneq (,$(findstring $(DEB_TARGET_ARCH),powerpc ppc64)) + ifneq ($(DEB_CROSS),yes) + with_spu := yes + endif + endif + ifeq ($(spu_no_snap)-$(trunk_build),yes-yes) + with_spu := disabled for snapshot build + endif + with_spu := $(call envfilt, spu, , , $(with_spu)) + + ifeq ($(with_spu),yes) + with_spucache := yes + with_spumea64 := yes + endif + + # neon build ------------------- + # FIXME: build as a cross compiler to build on armv4 as well + ifneq (,$(findstring gcc-4, $(PKGSOURCE))) + ifeq ($(distribution),Ubuntu) +# neon_archs = armel armhf +# ifneq (, $(filter $(DEB_TARGET_ARCH),$(neon_archs))) +# with_neon = yes +# endif + endif + endif +endif + +# run testsuite --------------- +with_check := yes +# if you don't want to run the gcc testsuite, uncomment the next line +#with_check := disabled by hand +ifeq ($(with_base_only),yes) + with_check := no +endif +ifeq ($(DEB_CROSS),yes) + with_check := disabled for cross compiler package +endif +ifeq ($(REVERSE_CROSS),yes) + with_check := disabled for reverse cross build +endif +check_no_cpus := m68k +check_no_systems := gnu +ifneq (,$(findstring $(DEB_TARGET_ARCH_CPU),$(check_no_cpus))) + with_check := disabled for cpu $(DEB_TARGET_ARCH_CPU) +endif +ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(check_no_systems))) + with_check := disabled for system $(DEB_TARGET_GNU_SYSTEM) +endif +ifeq ($(distribution)-$(DEB_HOST_ARCH),Ubuntu-hppa) + ifneq ($(single_package),yes) + with_check := disabled, testsuite timeouts with expect + endif +endif +ifneq (,$(findstring gdc,$(PKGSOURCE))) + with_check := disabled for D +endif +with_check := $(call envfilt, check, , , $(with_check)) +ifdef WITHOUT_CHECK + with_check := disabled by environment +endif +ifneq ($(findstring nocheck, $(DEB_BUILD_OPTIONS)),) + with_check := disabled by DEB_BUILD_OPTIONS +endif +with_check := disabled for this build + +# not a dependency on all archs, but if available, use it for the testsuite +ifneq (,$(wildcard /usr/bin/localedef)) + locale_data = generate +endif + +all_enabled_languages := $(enabled_languages) +languages_without_lang_opt := c++ objc obj-c++ + +debian_extra_langs := $(subst obj-c++,objcp,$(debian_extra_langs)) +export debian_extra_langs + +# multilib +biarch_map := i686=x86_64 powerpc=powerpc64 sparc=sparc64 s390=s390x s390x=s390 \ + x86_64=i686 powerpc64=powerpc mips=mips64 mipsel=mips64el +ifeq (,$(filter $(distrelease),lenny etch squeeze wheezy sid dapper hardy jaunty karmic lucid)) + biarch_map := $(subst i686=,i486=,$(biarch_map)) +endif +ifeq ($(distribution),Ubuntu) + ifeq (,$(filter $(distrelease),dapper hardy jaunty karmic lucid maverick natty)) + biarch_map += arm=arm + endif +endif +biarch_cpu := $(strip $(patsubst $(DEB_TARGET_GNU_CPU)=%,%, \ + $(filter $(DEB_TARGET_GNU_CPU)=%,$(biarch_map)))) + +biarch64 := no +biarch32 := no +biarchn32 := no +biarchx32 := no +biarchhf := no +biarchsf := no +flavours := +define gen_biarch + ifneq (yes,$$(call envfilt, biarch, , ,yes)) + biarch$1archs := + endif + ifneq (,$$(findstring /$$(DEB_TARGET_ARCH)/,$$(biarch$1archs))) + biarch$1 := yes + flavours += $1 + #biarch$1subdir = $$(biarch_cpu)-$$(DEB_TARGET_GNU_SYSTEM) + biarch$1subdir = $1 + ifeq ($$(with_libgcc),yes) + with_lib$1gcc := yes + endif + ifeq ($$(with_libcxx),yes) + with_lib$1cxx := yes + endif + ifeq ($$(with_libcxxdbg),yes) + with_lib$1cxxdbg := yes + endif + ifeq ($$(with_libobjc),yes) + with_lib$1objc := yes + endif + ifeq ($$(with_libgfortran),yes) + with_lib$1gfortran := yes + endif + ifeq ($$(with_libmudflap),yes) + with_lib$1mudflap := yes + endif + ifeq ($$(with_libssp),yes) + with_lib$1ssp := yes + endif + ifeq ($$(with_libgomp),yes) + with_lib$1gomp:= yes + endif + ifeq ($$(with_libitm),yes) + with_lib$1itm:= yes + endif + ifeq ($$(with_libqmath),yes) + with_lib$1qmath := yes + endif + ifeq ($$(with_libgo),yes) + with_lib$1go := yes + endif + + biarch_multidir_names = libiberty libgcc + ifneq (,$$(findstring gcc-, $$(PKGSOURCE))) + biarch_multidir_names += libstdc++-v3 libobjc libgfortran libssp \ + libgomp libmudflap zlib libitm + ifeq ($$(with_objc_gc),yes) + biarch_multidir_names += boehm-gc + endif + endif + ifneq (,$(findstring yes, $(with_java) $(with_go))) + biarch_multidir_names += libffi + endif + ifeq ($(with_fortran),yes) + biarch_multidir_names += libquadmath + endif + ifeq ($(with_go),yes) + biarch_multidir_names += libgo + endif + ifeq ($(trunk_build),yes) + biarch_multidir_names += libbacktrace + endif + export biarch_multidir_names + ifneq (,$$(findstring 32,$1)) + TARGET64_MACHINE := $$(strip $$(subst $$(DEB_TARGET_GNU_CPU),$$(biarch_cpu), \ + $$(TARGET_ALIAS))) + TARGET32_MACHINE := $$(TARGET_ALIAS) + else + TARGET64_MACHINE := $$(TARGET_ALIAS) + TARGET64_MACHINE := $$(strip $$(subst $$(DEB_TARGET_GNU_CPU),$$(biarch_cpu), \ + $$(TARGET_ALIAS))) + endif + export TARGET32_MACHINE + export TARGET64_MACHINE + endif +endef +biarch32archs := /amd64/ppc64/kfreebsd-amd64/s390x/x32/ +biarch64archs := /i386/powerpc/sparc/s390/mips/mipsel/x32/ +biarchn32archs := /mips/mipsel/ +ifeq ($(distribution),Ubuntu) + ifeq (,$(filter $(distrelease),dapper hardy jaunty karmic lucid maverick natty)) + biarchhfarchs := /armel/ + biarchsfarchs := /armhf/ + endif + ifeq (,$(filter $(distrelease),dapper hardy jaunty karmic lucid maverick natty oneiric precise quantal)) + biarchx32archs := /amd64/i386/ + endif +endif +ifeq ($(distribution),Debian) + ifeq (,$(filter $(distrelease),etch squeeze wheezy sid)) + biarchx32archs := /amd64/i386/ + endif +endif +$(foreach x,32 64 n32 x32 hf sf,$(eval $(call gen_biarch,$(x)))) + +#ifeq ($(DEB_TARGET_ARCH),ia64) +# biarch32 := yes +#endif + +#ifeq ($(trunk_build),yes) +# no_biarch_libs := yes +#endif +ifdef DEB_CROSS_NO_BIARCH + no_biarch_libs := yes +endif +ifeq ($(with_d)-$(with_separate_gdc),yes-yes) + no_biarch_libs := yes +endif + +ifeq ($(no_biarch_libs),yes) + with_lib64gcc := no + with_lib64cxx := no + with_lib64cxxdbg := no + with_lib64objc := no + with_lib64ffi := no + with_lib64gcj := no + with_lib64gfortran := no + with_lib64mudflap := no + with_lib64ssp := no + with_lib64go := no + with_lib64gomp := no + with_lib64itm := no + with_lib64qmath := no + + with_lib32gcc := no + with_lib32cxx := no + with_lib32cxxdbg := no + with_lib32objc := no + with_lib32ffi := no + with_lib32gcj := no + with_lib32gfortran := no + with_lib32mudflap := no + with_lib32ssp := no + with_lib32go := no + with_lib32gomp := no + with_lib32itm := no + with_lib32qmath := no + + with_libn32gcc := no + with_libn32cxx := no + with_libn32cxxdbg := no + with_libn32objc := no + with_libn32ffi := no + with_libn32gcj := no + with_libn32gfortran := no + with_libn32mudflap := no + with_libn32ssp := no + with_libn32go := no + with_libn32gomp := no + with_libn32itm := no + with_libn32qmath := no + + with_libx32gcc := no + with_libx32cxx := no + with_libx32cxxdbg := no + with_libx32objc := no + with_libx32ffi := no + with_libx32gcj := no + with_libx32gfortran := no + with_libx32mudflap := no + with_libx32ssp := no + with_libx32go := no + with_libx32gomp := no + with_libx32itm := no + with_libx32qmath := no + + with_libhfgcc := no + with_libhfcxx := no + with_libhfcxxdbg := no + with_libhfobjc := no + with_libhfffi := no + with_libhfgcj := no + with_libhfgfortran := no + with_libhfmudflap := no + with_libhfssp := no + with_libhfgo := no + with_libhfgomp := no + with_libhfitm := no + with_libhfqmath := no + + with_libsfgcc := no + with_libsfcxx := no + with_libsfcxxdbg := no + with_libsfobjc := no + with_libsfffi := no + with_libsfgcj := no + with_libsfgfortran := no + with_libsfmudflap := no + with_libsfssp := no + with_libsfgo := no + with_libsfgomp := no + with_libsfitm := no + with_libsfqmath := no + + with_java_plugin := no + + ifdef DEB_CROSS_NO_BIARCH + biarch64 := disabled by DEB_CROSS_NO_BIARCH + biarch32 := disabled by DEB_CROSS_NO_BIARCH + biarchn32 := disabled by DEB_CROSS_NO_BIARCH + biarchx32 := disabled by DEB_CROSS_NO_BIARCH + biarchhf := disabled by DEB_CROSS_NO_BIARCH + biarchsf := disabled by DEB_CROSS_NO_BIARCH + endif + + ifeq ($(with_d)-$(with_separate_gdc),yes-yes) + biarch64 := disabled for D + biarch32 := disabled for D + biarchn32 := disabled for D + biarchx32 := disabled for D + biarchhf := disabled for D + biarchsf := disabled for D + endif + + ifeq ($(with_ada)-$(with_separate_gnat),yes-yes) + biarchhf := disabled for Ada + biarchsf := disabled for Ada + endif + +endif + +ifneq (,$(filter yes,$(biarch32) $(biarch64) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf))) + multilib := yes +endif + +multilib_archs = $(sort $(subst /, , $(biarch64archs) $(biarch32archs) $(biarchn32archs) $(biarchx32archs) $(biarchhfarchs) $(biarchsfarchs))) + +biarchsubdirs := \ + $(if $(filter yes,$(biarch64)),$(biarch64subdir),) \ + $(if $(filter yes,$(biarch32)),$(biarch32subdir),) \ + $(if $(filter yes,$(biarchn32)),$(biarchn32subdir),) \ + $(if $(filter yes,$(biarchx32)),$(biarchx32subdir),) \ + $(if $(filter yes,$(biarchhf)),$(biarchhfsubdir),) \ + $(if $(filter yes,$(biarchsf)),$(biarchsfsubdir),) +biarchsubdirs := {$(strip $(shell echo $(biarchsubdirs) | tr " " ","))} + +ifeq ($(biarch32),yes) + with_32bit_check := $(strip $(if $(wildcard build/runcheck.out), \ + $(shell cat build/runcheck.out), \ + $(shell CC="gcc -m32" bash debian/runcheck.sh))) +endif + +ifeq ($(biarch64),yes) + ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),mips mipsel)) + with_64bit_check := $(strip $(if $(wildcard build/runcheck.out), \ + $(shell cat build/runcheck.out), \ + $(shell CC="gcc -mabi=64" bash debian/runcheck.sh))) + else + with_64bit_check := $(strip $(if $(wildcard build/runcheck.out), \ + $(shell cat build/runcheck.out), \ + $(shell CC="gcc -m64" bash debian/runcheck.sh))) + endif +endif + +ifeq ($(biarchn32),yes) + with_n32bit_check := $(strip $(if $(wildcard build/runcheck.out), \ + $(shell cat build/runcheck.out), \ + $(shell CC="gcc -mabi=n32" bash debian/runcheck.sh))) +endif + +ifeq ($(biarchx32),yes) + with_x32bit_check := $(strip $(if $(wildcard build/runcheck.out), \ + $(shell cat build/runcheckout), \ + $(shell CC="gcc -mx32" bash debian/runcheck.sh))) +endif + +# GNU locales +force_gnu_locales := yes +locale_no_cpus := +locale_no_systems := +ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(locale_no_systems))) + force_gnu_locales := disabled for system $(DEB_TARGET_GNU_SYSTEM) +endif + +gcc_tarpath := $(firstword $(wildcard gcc-*.tar.* /usr/src/gcc-$(BASE_VERSION)/gcc-*.tar.*)) +gcc_tarball := $(notdir $(gcc_tarpath)) +gcc_srcdir := $(subst -dfsg,,$(patsubst %.tar.xz,%,$(patsubst %.tar.lzma,%,$(patsubst %.tar.gz,%,$(gcc_tarball:.tar.bz2=))))) + +ifeq ($(with_d),yes) + gdc_tarpath := $(firstword $(wildcard gdc-*.tar.* /usr/src/gcc-$(BASE_VERSION)/gdc-*.tar.*)) + gdc_tarball := $(notdir $(gdc_tarpath)) + gdc_srcdir := $(patsubst %.tar.xz,%,$(patsubst %.tar.lzma,%,$(patsubst %.tar.gz,%,$(gdc_tarball:.tar.bz2=)))) +endif + +ecj_jar := $(firstword $(wildcard ecj.jar /usr/share/java/eclipse-ecj.jar /usr/share/java/ecj.jar)) + +unpack_stamp := $(stampdir)/01-unpack-stamp +pre_patch_stamp := $(stampdir)/02-pre-patch-stamp +patch_stamp := $(stampdir)/02-patch-stamp +src_spu_stamp := $(stampdir)/02-src-spu-stamp +control_stamp := $(stampdir)/03-control-stamp +configure_stamp := $(stampdir)/04-configure-stamp +build_stamp := $(stampdir)/05-build-stamp +build_html_stamp := $(stampdir)/05-build-html-stamp +build_locale_stamp := $(stampdir)/05-build-locale-stamp +build_doxygen_stamp := $(stampdir)/05-build-doxygen-stamp +build_javasrc_stamp := $(stampdir)/05-build-javasrc-stamp +build_javadoc_stamp := $(stampdir)/05-build-javadoc-stamp +check_stamp := $(stampdir)/06-check-stamp +check_inst_stamp := $(stampdir)/06-check-inst-stamp +install_stamp := $(stampdir)/07-install-stamp +install_snap_stamp := $(stampdir)/07-install-snap-stamp +binary_stamp := $(stampdir)/08-binary-stamp + +configure_dummy_stamp := $(stampdir)/04-configure-dummy-stamp +build_dummy_stamp := $(stampdir)/05-build-dummy-stamp +install_dummy_stamp := $(stampdir)/07-install-dummy-stamp + +configure_hppa64_stamp := $(stampdir)/04-configure-hppa64-stamp +build_hppa64_stamp := $(stampdir)/05-build-hppa64-stamp +install_hppa64_stamp := $(stampdir)/07-install-hppa64-stamp + +configure_neon_stamp := $(stampdir)/04-configure-neon-stamp +build_neon_stamp := $(stampdir)/05-build-neon-stamp +install_neon_stamp := $(stampdir)/07-install-neon-stamp + +configure_spu_stamp := $(stampdir)/04-configure-spu-stamp +build_spu_stamp := $(stampdir)/05-build-spu-stamp +install_spu_stamp := $(stampdir)/07-install-spu-stamp + +control_dependencies := $(patch_stamp) + +ifeq ($(single_package),yes) + configure_dependencies = $(configure_stamp) + build_dependencies = $(build_stamp) + install_dependencies = $(install_snap_stamp) + ifeq ($(with_check),yes) + check_dependencies += $(check_stamp) + endif +else + ifeq ($(with_base_only),yes) + configure_dependencies = $(configure_dummy_stamp) + build_dependencies = $(build_dummy_stamp) + install_dependencies = $(install_dummy_stamp) + else + configure_dependencies = $(configure_stamp) + build_dependencies = $(build_stamp) + install_dependencies = $(install_stamp) + ifeq ($(with_check),yes) + check_dependencies += $(check_stamp) + endif + endif +endif + +ifneq (,$(findstring gcj-, $(PKGSOURCE))) + ifeq ($(with_gcj_base_only),yes) + configure_dependencies = $(configure_dummy_stamp) + build_dependencies = $(build_dummy_stamp) + install_dependencies = $(install_dummy_stamp) + endif +endif + +ifeq ($(with_neon),yes) + build_dependencies += $(build_neon_stamp) + install_dependencies += $(install_neon_stamp) +endif + +ifeq ($(with_hppa64),yes) + build_dependencies += $(build_hppa64_stamp) + ifneq ($(trunk_build),yes) + install_dependencies += $(install_hppa64_stamp) + endif +endif + +ifeq ($(with_spu),yes) + control_dependencies += $(src_spu_stamp) + build_dependencies += $(build_spu_stamp) + ifneq ($(trunk_build),yes) + install_dependencies += $(install_spu_stamp) + endif +endif + +build_dependencies += $(check_dependencies) + +stamp-dir: + mkdir -p $(stampdir) + +ifeq ($(DEB_CROSS),yes) + define cross_mangle_shlibs + sed -i s/$(cross_lib_arch)//g debian/$(1)/DEBIAN/shlibs + endef + define cross_mangle_substvars + sed -i 's/lib[^ ,(]*/&$(cross_lib_arch)/g' debian/$(1).substvars + endef +else + define cross_mangle_shlibs + endef + define cross_mangle_substvars + endef +endif + +ifneq (,$(filter $(DEB_TARGET_ARCH), mips mipsel)) + define cross_mangle_control + $(if $(findstring 64,$(1)),sed -i -r '/^(Dep|Rec|Sug)/s/[a-z0-9-]+32[^$(COMMA)]+($(COMMA) *|$$)//g;/^(Dep|Rec|Sug)/s/$(p_lgcc)/$(p_l64gcc)/;/^(Dep|Rec|Sug)/s/ *$(COMMA) *$$//' debian/$(1)/DEBIAN/control,@:) + $(if $(findstring n32,$(1)),sed -i -r '/^(Dep|Rec|Sug)/s/[a-z0-9-]+64[^$(COMMA)]+($(COMMA) *|$$)//g;/^(Dep|Rec|Sug)/s/$(p_lgcc)/$(p_ln32gcc)/;/^(Dep|Rec|Sug)/s/ *$(COMMA) *$$//' debian/$(1)/DEBIAN/control,@:) + endef +else + define cross_mangle_control + endef +endif --- gcc-4.7-4.7.2.orig/debian/lib64gfortran3.overrides +++ gcc-4.7-4.7.2/debian/lib64gfortran3.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +lib64gfortran3 binary: binary-or-shlib-defines-rpath --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.mips +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.mips @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.2.orig/debian/libstdc++6.symbols.armel +++ gcc-4.7-4.7.2/debian/libstdc++6.symbols.armel @@ -0,0 +1,26 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + CXXABI_ARM_1.3.3@CXXABI_ARM_1.3.3 4.4.0 + _ZNKSt9type_info6beforeERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt9type_infoeqERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + __aeabi_atexit@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_cctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_noctor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_nocookie@CXXABI_ARM_1.3.3 4.4.0 + __cxa_begin_cleanup@CXXABI_1.3 4.3.0 + __cxa_end_cleanup@CXXABI_1.3 4.3.0 + __cxa_type_match@CXXABI_1.3 4.3.0 --- gcc-4.7-4.7.2.orig/debian/patches/libgo-hardening.diff +++ gcc-4.7-4.7.2/debian/patches/libgo-hardening.diff @@ -0,0 +1,13 @@ +# DP: Avoid compiler warnings in libgo + +--- a/src/libgo/runtime/print.c ++++ b/src/libgo/runtime/print.c +@@ -17,7 +17,7 @@ + G* g = runtime_g(); + + if(g == nil || g->writebuf == nil) { +- runtime_write(2, v, n); ++ ssize_t rv __attribute((unused)) = runtime_write(2, v, n); + return; + } + --- gcc-4.7-4.7.2.orig/debian/patches/arm-multilib-softfp.diff +++ gcc-4.7-4.7.2/debian/patches/arm-multilib-softfp.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/softfp float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 +@@ -24,6 +24,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.7-4.7.2.orig/debian/patches/powerpc_remove_many.diff +++ gcc-4.7-4.7.2/debian/patches/powerpc_remove_many.diff @@ -0,0 +1,31 @@ +# DP: Subject: [PATCH] remove -many on __SPE__ target +# DP: this helps to to detect opcodes which are not part of the current +# DP: CPU because without -many gas won't touch them. This currently could +# DP: break the kernel build as the 603 on steroids cpus use performance +# DP: counter opcodes which are not available on the steroid less 603 core. + +--- a/src/gcc/config/rs6000/rs6000.h ++++ b/src/gcc/config/rs6000/rs6000.h +@@ -98,6 +98,12 @@ + #define ASM_CPU_476_SPEC "-mpower4" + #endif + ++#ifndef __SPE__ ++#define ASM_CPU_SPU_MANY_NOT_SPE "-many" ++#else ++#define ASM_CPU_SPU_MANY_NOT_SPE ++#endif ++ + /* Common ASM definitions used by ASM_SPEC among the various targets for + handling -mcpu=xxx switches. There is a parallel list in driver-rs6000.c to + provide the default assembler options if the user uses -mcpu=native, so if +@@ -170,7 +176,8 @@ + %{mcpu=e500mc64: -me500mc64} \ + %{maltivec: -maltivec} \ + %{mvsx: -mvsx %{!maltivec: -maltivec} %{!mcpu*: %(asm_cpu_power7)}} \ +--many" ++" \ ++ASM_CPU_SPU_MANY_NOT_SPE + + #define CPP_DEFAULT_SPEC "" + --- gcc-4.7-4.7.2.orig/debian/patches/libjava-nobiarch-check.diff +++ gcc-4.7-4.7.2/debian/patches/libjava-nobiarch-check.diff @@ -0,0 +1,25 @@ +# DP: For biarch builds, disable the testsuite for the non-default architecture +# DP: for runtime libraries, which are not built by default (libjava). + +--- + libjava/testsuite/Makefile.in | 4 +++- + 2 files changed, 25 insertions(+), 1 deletions(-) + +--- a/src/libjava/testsuite/Makefile.in ++++ b/src/libjava/testsuite/Makefile.in +@@ -381,12 +381,14 @@ + + + check-DEJAGNU: site.exp ++ runtestflags="`echo '$(RUNTESTFLAGS)' | sed 's/,-m[36][24]//;s/,-mabi=n32//;s/,-mabi=64//'`"; \ ++ case "$$runtestflags" in *\\{\\}) runtestflags=; esac; \ + srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \ + EXPECT=$(EXPECT); export EXPECT; \ + runtest=$(RUNTEST); \ + if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ + exit_status=0; l='$(DEJATOOL)'; for tool in $$l; do \ +- if $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \ ++ if $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $$runtestflags; \ + then :; else exit_status=1; fi; \ + done; \ + else echo "WARNING: could not find \`runtest'" 1>&2; :;\ --- gcc-4.7-4.7.2.orig/debian/patches/libjava-sjlj.diff +++ gcc-4.7-4.7.2/debian/patches/libjava-sjlj.diff @@ -0,0 +1,38 @@ +# DP: Don't try to use _Unwind_Backtrace on SJLJ targets. +# DP: See bug #387875, #388505, GCC PR 29206. + +--- + libjava/sysdep/generic/backtrace.h | 17 +++++++++++++++++ + 1 files changed, 17 insertions(+), 0 deletions(-) + +--- a/src/libjava/sysdep/generic/backtrace.h ++++ b/src/libjava/sysdep/generic/backtrace.h +@@ -13,6 +13,20 @@ + + #include + ++#ifdef SJLJ_EXCEPTIONS ++ ++#undef _Unwind_GetIPInfo ++#define _Unwind_GetIPInfo(ctx,ip_before_insn) \ ++ (abort (), (void) (ctx), *ip_before_insn = 1, 0) ++ ++#undef _Unwind_GetRegionStart ++#define _Unwind_GetRegionStart(ctx) \ ++ (abort (), (void) (ctx), 0) ++ ++#undef _Unwind_Backtrace ++#define _Unwind_Backtrace(trace_fn,state_ptr) \ ++ (fallback_backtrace (trace_fn, state_ptr)) ++ + /* Unwind through the call stack calling TRACE_FN with STATE for every stack + frame. Returns the reason why the unwinding was stopped. */ + _Unwind_Reason_Code +@@ -20,4 +34,7 @@ + { + return _URC_NO_REASON; + } ++ ++#endif /* SJLJ_EXCEPTIONS */ ++ + #endif --- gcc-4.7-4.7.2.orig/debian/patches/alpha-no-ev4-directive.diff +++ gcc-4.7-4.7.2/debian/patches/alpha-no-ev4-directive.diff @@ -0,0 +1,30 @@ +# DP: never emit .ev4 directive. + +--- + gcc/config/alpha/alpha.c | 7 +++---- + 1 files changed, 3 insertions(+), 4 deletions(-) + +--- a/src/gcc/config/alpha/alpha.c ++++ b/src/gcc/config/alpha/alpha.c +@@ -9740,7 +9740,7 @@ + fputs ("\t.set nomacro\n", asm_out_file); + if (TARGET_SUPPORT_ARCH | TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) + { +- const char *arch; ++ const char *arch = NULL; + + if (alpha_cpu == PROCESSOR_EV6 || TARGET_FIX || TARGET_CIX) + arch = "ev6"; +@@ -9750,10 +9750,9 @@ + arch = "ev56"; + else if (alpha_cpu == PROCESSOR_EV5) + arch = "ev5"; +- else +- arch = "ev4"; + +- fprintf (asm_out_file, "\t.arch %s\n", arch); ++ if (arch) ++ fprintf (asm_out_file, "\t.arch %s\n", arch); + } + } + #endif --- gcc-4.7-4.7.2.orig/debian/patches/ada-kfreebsd-gnu.diff +++ gcc-4.7-4.7.2/debian/patches/ada-kfreebsd-gnu.diff @@ -0,0 +1,233 @@ +Index: b/src/gcc/ada/s-osinte-kfreebsd-gnu.adb +=================================================================== +--- /dev/null ++++ b/src/gcc/ada/s-osinte-kfreebsd-gnu.adb +@@ -0,0 +1,158 @@ ++------------------------------------------------------------------------------ ++-- -- ++-- GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS -- ++-- -- ++-- S Y S T E M . O S _ I N T E R F A C E -- ++-- -- ++-- B o d y -- ++-- -- ++-- Copyright (C) 1991-1994, Florida State University -- ++-- Copyright (C) 1995-2006, AdaCore -- ++-- -- ++-- GNARL is free software; you can redistribute it and/or modify it under -- ++-- terms of the GNU General Public License as published by the Free Soft- -- ++-- ware Foundation; either version 2, or (at your option) any later ver- -- ++-- sion. GNARL is distributed in the hope that it will be useful, but WITH- -- ++-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- ++-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -- ++-- for more details. You should have received a copy of the GNU General -- ++-- Public License distributed with GNARL; see file COPYING. If not, write -- ++-- to the Free Software Foundation, 51 Franklin Street, Fifth Floor, -- ++-- Boston, MA 02110-1301, USA. -- ++-- -- ++-- As a special exception, if other files instantiate generics from this -- ++-- unit, or you link this unit with other files to produce an executable, -- ++-- this unit does not by itself cause the resulting executable to be -- ++-- covered by the GNU General Public License. This exception does not -- ++-- however invalidate any other reasons why the executable file might be -- ++-- covered by the GNU Public License. -- ++-- -- ++-- GNARL was developed by the GNARL team at Florida State University. -- ++-- Extensive contributions were provided by Ada Core Technologies, Inc. -- ++-- -- ++------------------------------------------------------------------------------ ++ ++-- This is the GNU/kFreeBSD version of this package. ++ ++pragma Polling (Off); ++-- Turn off polling, we do not want ATC polling to take place during ++-- tasking operations. It causes infinite loops and other problems. ++ ++-- This package encapsulates all direct interfaces to OS services ++-- that are needed by children of System. ++ ++package body System.OS_Interface is ++ ++ -------------------- ++ -- Get_Stack_Base -- ++ -------------------- ++ ++ function Get_Stack_Base (thread : pthread_t) return Address is ++ pragma Warnings (Off, thread); ++ ++ begin ++ return Null_Address; ++ end Get_Stack_Base; ++ ++ ------------------ ++ -- pthread_init -- ++ ------------------ ++ ++ procedure pthread_init is ++ begin ++ null; ++ end pthread_init; ++ ++ ----------------------------------- ++ -- pthread_mutexattr_setprotocol -- ++ ----------------------------------- ++ ++ function pthread_mutexattr_setprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : int) return int is ++ pragma Unreferenced (attr, protocol); ++ begin ++ return 0; ++ end pthread_mutexattr_setprotocol; ++ ++ ----------------------------------- ++ -- pthread_mutexattr_getprotocol -- ++ ----------------------------------- ++ ++ function pthread_mutexattr_getprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : access int) return int is ++ pragma Unreferenced (attr, protocol); ++ begin ++ return 0; ++ end pthread_mutexattr_getprotocol; ++ ++ -------------------------------------- ++ -- pthread_mutexattr_setprioceiling -- ++ -------------------------------------- ++ ++ function pthread_mutexattr_setprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : int) return int is ++ pragma Unreferenced (attr, prioceiling); ++ begin ++ return 0; ++ end pthread_mutexattr_setprioceiling; ++ ++ -------------------------------------- ++ -- pthread_mutexattr_getprioceiling -- ++ -------------------------------------- ++ ++ function pthread_mutexattr_getprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : access int) return int is ++ pragma Unreferenced (attr, prioceiling); ++ begin ++ return 0; ++ end pthread_mutexattr_getprioceiling; ++ ++ ----------------- ++ -- To_Duration -- ++ ----------------- ++ ++ function To_Duration (TS : timespec) return Duration is ++ begin ++ return Duration (TS.tv_sec) + Duration (TS.tv_nsec) / 10#1#E9; ++ end To_Duration; ++ ++ ------------------------ ++ -- To_Target_Priority -- ++ ------------------------ ++ ++ function To_Target_Priority ++ (Prio : System.Any_Priority) return Interfaces.C.int ++ is ++ begin ++ return Interfaces.C.int (Prio); ++ end To_Target_Priority; ++ ++ ----------------- ++ -- To_Timespec -- ++ ----------------- ++ ++ function To_Timespec (D : Duration) return timespec is ++ S : time_t; ++ F : Duration; ++ ++ begin ++ S := time_t (Long_Long_Integer (D)); ++ F := D - Duration (S); ++ ++ -- If F has negative value due to a round-up, adjust for positive F ++ -- value. ++ ++ if F < 0.0 then ++ S := S - 1; ++ F := F + 1.0; ++ end if; ++ ++ return timespec'(tv_sec => S, ++ tv_nsec => long (Long_Long_Integer (F * 10#1#E9))); ++ end To_Timespec; ++ ++end System.OS_Interface; +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -1097,7 +1097,7 @@ + a-numaux.ads ${dir}LAST_UPDATED < ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * configure.tgt: Add AArch64. +Index: libstdc++-v3/configure.host +=================================================================== +--- a/src/libstdc++-v3/configure.host (.../gcc-4_7-branch) ++++ b/src/libstdc++-v3/configure.host (.../ARM/aarch64-4.7-branch) +@@ -94,6 +94,9 @@ + # variants into the established source config/cpu/* sub-directories. + # THIS TABLE IS SORTED. KEEP IT THAT WAY. + case "${host_cpu}" in ++ aarch64*) ++ try_cpu=aarch64 ++ ;; + alpha*) + try_cpu=alpha + ;; +Index: libstdc++-v3/config/cpu/aarch64/cxxabi_tweaks.h +=================================================================== +--- a/src/libstdc++-v3/config/cpu/aarch64/cxxabi_tweaks.h (.../gcc-4_7-branch) ++++ b/src/libstdc++-v3/config/cpu/aarch64/cxxabi_tweaks.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,60 @@ ++// Control various target specific ABI tweaks. AArch64 version. ++ ++// Copyright (C) 2004, 2006, 2008, 2009, 2011, 2012 ++// Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// Under Section 7 of GPL version 3, you are granted additional ++// permissions described in the GCC Runtime Library Exception, version ++// 3.1, as published by the Free Software Foundation. ++ ++// You should have received a copy of the GNU General Public License and ++// a copy of the GCC Runtime Library Exception along with this program; ++// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++// . ++ ++/** @file cxxabi_tweaks.h ++ * The header provides an CPU-variable interface to the C++ ABI. ++ */ ++ ++#ifndef _CXXABI_TWEAKS_H ++#define _CXXABI_TWEAKS_H 1 ++ ++#ifdef __cplusplus ++namespace __cxxabiv1 ++{ ++ extern "C" ++ { ++#endif ++ ++ // The AArch64 ABI uses the least significant bit of a 64-bit ++ // guard variable. ++#define _GLIBCXX_GUARD_TEST(x) ((*(x) & 1) != 0) ++#define _GLIBCXX_GUARD_SET(x) *(x) = 1 ++#define _GLIBCXX_GUARD_BIT 1 ++#define _GLIBCXX_GUARD_PENDING_BIT __guard_test_bit (1, 1) ++#define _GLIBCXX_GUARD_WAITING_BIT __guard_test_bit (2, 1) ++ __extension__ typedef int __guard __attribute__((mode (__DI__))); ++ ++ // __cxa_vec_ctor has void return type. ++ typedef void __cxa_vec_ctor_return_type; ++#define _GLIBCXX_CXA_VEC_CTOR_RETURN(x) return ++ // Constructors and destructors do not return a value. ++ typedef void __cxa_cdtor_return_type; ++ ++#ifdef __cplusplus ++ } ++} // namespace __cxxabiv1 ++#endif ++ ++#endif + +Property changes on: libstdc++-v3/config/cpu/aarch64/cxxabi_tweaks.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: libstdc++-v3/ChangeLog.aarch64 +=================================================================== +--- a/src/libstdc++-v3/ChangeLog.aarch64 (.../gcc-4_7-branch) ++++ b/src/libstdc++-v3/ChangeLog.aarch64 (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,4 @@ ++2012-05-25 Yufeng Zhang ++ ++ * config/cpu/aarch64/cxxabi_tweaks.h: New file. ++ * configure.host: Enable aarch64. +Index: libgcc/config.host +=================================================================== +--- a/src/libgcc/config.host (.../gcc-4_7-branch) ++++ b/src/libgcc/config.host (.../ARM/aarch64-4.7-branch) +@@ -83,6 +83,9 @@ + cpu_type=m32c + tmake_file=t-fdpbit + ;; ++aarch64*-*-*) ++ cpu_type=aarch64 ++ ;; + alpha*-*-*) + cpu_type=alpha + ;; +@@ -279,6 +282,16 @@ + esac + + case ${host} in ++aarch64*-*-elf) ++ extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o" ++ tmake_file="${tmake_file} ${cpu_type}/t-aarch64" ++ tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp" ++ ;; ++aarch64*-*-linux*) ++ md_unwind_header=aarch64/linux-unwind.h ++ tmake_file="${tmake_file} ${cpu_type}/t-aarch64" ++ tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp" ++ ;; + alpha*-*-linux*) + tmake_file="${tmake_file} alpha/t-alpha alpha/t-ieee t-crtfm alpha/t-linux" + extra_parts="$extra_parts crtfastmath.o" +Index: libgcc/config/aarch64/sfp-machine.h +=================================================================== +--- a/src/libgcc/config/aarch64/sfp-machine.h (.../gcc-4_7-branch) ++++ b/src/libgcc/config/aarch64/sfp-machine.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,153 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#define _FP_W_TYPE_SIZE 64 ++#define _FP_W_TYPE unsigned long ++#define _FP_WS_TYPE signed long ++#define _FP_I_TYPE int ++ ++typedef int TItype __attribute__ ((mode (TI))); ++typedef unsigned int UTItype __attribute__ ((mode (TI))); ++#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype)) ++ ++/* The type of the result of a floating point comparison. This must ++ match __libgcc_cmp_return__ in GCC for the target. */ ++typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__))); ++#define CMPtype __gcc_CMPtype ++ ++#define _FP_MUL_MEAT_Q(R,X,Y) \ ++ _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) ++ ++#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) ++ ++#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) ++#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) ++#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 ++#define _FP_NANSIGN_S 0 ++#define _FP_NANSIGN_D 0 ++#define _FP_NANSIGN_Q 0 ++ ++#define _FP_KEEPNANFRACP 1 ++ ++/* This appears to be in line with the VFP conventions in the v7-a ++ ARM-ARM. Need to check with the v8 version. */ ++#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ ++ do { \ ++ if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \ ++ && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \ ++ { \ ++ R##_s = Y##_s; \ ++ _FP_FRAC_COPY_##wc(R,Y); \ ++ } \ ++ else \ ++ { \ ++ R##_s = X##_s; \ ++ _FP_FRAC_COPY_##wc(R,X); \ ++ } \ ++ R##_c = FP_CLS_NAN; \ ++ } while (0) ++ ++#define FP_EX_INVALID 0x01 ++#define FP_EX_DIVZERO 0x02 ++#define FP_EX_OVERFLOW 0x04 ++#define FP_EX_UNDERFLOW 0x08 ++#define FP_EX_INEXACT 0x10 ++ ++#define FP_HANDLE_EXCEPTIONS \ ++ do { \ ++ const float fp_max = __FLT_MAX__; \ ++ const float fp_min = __FLT_MIN__; \ ++ const float fp_1e32 = 1.0e32f; \ ++ const float fp_zero = 0.0; \ ++ const float fp_one = 1.0; \ ++ unsigned fpsr; \ ++ if (_fex & FP_EX_INVALID) \ ++ { \ ++ __asm__ __volatile__ ("fdiv\ts0, %s0, %s0" \ ++ : \ ++ : "w" (fp_zero) \ ++ : "s0"); \ ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \ ++ } \ ++ if (_fex & FP_EX_DIVZERO) \ ++ { \ ++ __asm__ __volatile__ ("fdiv\ts0, %s0, %s1" \ ++ : \ ++ : "w" (fp_one), "w" (fp_zero) \ ++ : "s0"); \ ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \ ++ } \ ++ if (_fex & FP_EX_OVERFLOW) \ ++ { \ ++ __asm__ __volatile__ ("fadd\ts0, %s0, %s1" \ ++ : \ ++ : "w" (fp_max), "w" (fp_1e32) \ ++ : "s0"); \ ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \ ++ } \ ++ if (_fex & FP_EX_UNDERFLOW) \ ++ { \ ++ __asm__ __volatile__ ("fmul\ts0, %s0, %s0" \ ++ : \ ++ : "w" (fp_min) \ ++ : "s0"); \ ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \ ++ } \ ++ if (_fex & FP_EX_INEXACT) \ ++ { \ ++ __asm__ __volatile__ ("fsub\ts0, %s0, %s1" \ ++ : \ ++ : "w" (fp_max), "w" (fp_one) \ ++ : "s0"); \ ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \ ++ } \ ++ } while (0) ++ ++ ++#define FP_RND_NEAREST 0 ++#define FP_RND_ZERO 0xc00000 ++#define FP_RND_PINF 0x400000 ++#define FP_RND_MINF 0x800000 ++ ++#define _FP_DECL_EX \ ++ unsigned long int _fpcr __attribute__ ((unused)) = FP_RND_NEAREST ++ ++#define FP_INIT_ROUNDMODE \ ++ do { \ ++ __asm__ __volatile__ ("mrs %0, fpcr" \ ++ : "=r" (_fpcr)); \ ++ } while (0) ++ ++#define FP_ROUNDMODE (_fpcr & 0xc00000) ++ ++#define __LITTLE_ENDIAN 1234 ++#define __BIG_ENDIAN 4321 ++ ++#if defined __AARCH64EB__ ++# define __BYTE_ORDER __BIG_ENDIAN ++#else ++# define __BYTE_ORDER __LITTLE_ENDIAN ++#endif ++ ++ ++/* Define ALIASNAME as a strong alias for NAME. */ ++# define strong_alias(name, aliasname) _strong_alias(name, aliasname) ++# define _strong_alias(name, aliasname) \ ++ extern __typeof (name) aliasname __attribute__ ((alias (#name))); + +Property changes on: libgcc/config/aarch64/sfp-machine.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: libgcc/config/aarch64/crti.S +=================================================================== +--- a/src/libgcc/config/aarch64/crti.S (.../gcc-4_7-branch) ++++ b/src/libgcc/config/aarch64/crti.S (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,68 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by the ++# Free Software Foundation; either version 3, or (at your option) any ++# later version. ++# ++# This file is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# Under Section 7 of GPL version 3, you are granted additional ++# permissions described in the GCC Runtime Library Exception, version ++# 3.1, as published by the Free Software Foundation. ++# ++# You should have received a copy of the GNU General Public License and ++# a copy of the GCC Runtime Library Exception along with this program; ++# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++# . ++ ++/* An executable stack is *not* required for these functions. */ ++#if defined(__ELF__) && defined(__linux__) ++.section .note.GNU-stack,"",%progbits ++.previous ++#endif ++ ++# This file creates a stack frame for the contents of the .fini and ++# .init sections. Users may put any desired instructions in those ++# sections. ++ ++#ifdef __ELF__ ++#define TYPE(x) .type x,function ++#else ++#define TYPE(x) ++#endif ++ ++ # Note - this macro is complemented by the FUNC_END macro ++ # in crtn.S. If you change this macro you must also change ++ # that macro match. ++.macro FUNC_START ++ # Create a stack frame and save any call-preserved registers ++ stp x29, x30, [sp, #-16]! ++ stp x27, x28, [sp, #-16]! ++ stp x25, x26, [sp, #-16]! ++ stp x23, x24, [sp, #-16]! ++ stp x21, x22, [sp, #-16]! ++ stp x19, x20, [sp, #-16]! ++.endm ++ ++ .section ".init" ++ .align 2 ++ .global _init ++ TYPE(_init) ++_init: ++ FUNC_START ++ ++ ++ .section ".fini" ++ .align 2 ++ .global _fini ++ TYPE(_fini) ++_fini: ++ FUNC_START ++ ++# end of crti.S + +Property changes on: libgcc/config/aarch64/crti.S +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: libgcc/config/aarch64/t-softfp +=================================================================== +--- a/src/libgcc/config/aarch64/t-softfp (.../gcc-4_7-branch) ++++ b/src/libgcc/config/aarch64/t-softfp (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,7 @@ ++softfp_float_modes := tf ++softfp_int_modes := si di ti ++softfp_extensions := sftf dftf ++softfp_truncations := tfsf tfdf ++softfp_exclude_libgcc2 := n ++ ++TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes +Index: libgcc/config/aarch64/crtn.S +=================================================================== +--- a/src/libgcc/config/aarch64/crtn.S (.../gcc-4_7-branch) ++++ b/src/libgcc/config/aarch64/crtn.S (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,61 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by the ++# Free Software Foundation; either version 3, or (at your option) any ++# later version. ++# ++# This file is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# Under Section 7 of GPL version 3, you are granted additional ++# permissions described in the GCC Runtime Library Exception, version ++# 3.1, as published by the Free Software Foundation. ++# ++# You should have received a copy of the GNU General Public License and ++# a copy of the GCC Runtime Library Exception along with this program; ++# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++# . ++ ++/* An executable stack is *not* required for these functions. */ ++#if defined(__ELF__) && defined(__linux__) ++.section .note.GNU-stack,"",%progbits ++.previous ++#endif ++ ++# This file just makes sure that the .fini and .init sections do in ++# fact return. Users may put any desired instructions in those sections. ++# This file is the last thing linked into any executable. ++ ++ # Note - this macro is complemented by the FUNC_START macro ++ # in crti.S. If you change this macro you must also change ++ # that macro match. ++ # ++ # Note - we do not try any fancy optimizations of the return ++ # sequences here, it is just not worth it. Instead keep things ++ # simple. Restore all the save resgisters, including the link ++ # register and then perform the correct function return instruction. ++.macro FUNC_END ++ ldp x19, x20, [sp], #16 ++ ldp x21, x22, [sp], #16 ++ ldp x23, x24, [sp], #16 ++ ldp x25, x26, [sp], #16 ++ ldp x27, x28, [sp], #16 ++ ldp x29, x30, [sp], #16 ++ ret ++.endm ++ ++ ++ .section ".init" ++ ;; ++ FUNC_END ++ ++ .section ".fini" ++ ;; ++ FUNC_END ++ ++# end of crtn.S + +Property changes on: libgcc/config/aarch64/crtn.S +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: libgcc/config/aarch64/linux-unwind.h +=================================================================== +--- a/src/libgcc/config/aarch64/linux-unwind.h (.../gcc-4_7-branch) ++++ b/src/libgcc/config/aarch64/linux-unwind.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,143 @@ ++/* Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by the ++ Free Software Foundation; either version 3, or (at your option) any ++ later version. ++ ++ This file is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ . */ ++ ++#ifndef inhibit_libc ++ ++#include ++#include ++ ++#define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state ++ ++static _Unwind_Reason_Code ++aarch64_fallback_frame_state (struct _Unwind_Context *context, ++ _Unwind_FrameState * fs) ++{ ++ /* The kernel creates an rt_sigframe on the stack immediately prior ++ to delivering a signal. ++ ++ This structure must have the same shape as the linux kernel ++ equivalent. */ ++ struct rt_sigframe ++ { ++ siginfo_t info; ++ struct ucontext uc; ++ }; ++ ++ struct rt_sigframe *rt_; ++ _Unwind_Ptr new_cfa; ++ unsigned *pc = context->ra; ++ struct sigcontext *sc; ++ struct _aarch64_ctx *extension_marker; ++ int i; ++ ++ /* A signal frame will have a return address pointing to ++ __default_sa_restorer. This code is hardwired as: ++ ++ 0xd2801168 movz x8, #0x8b ++ 0xd4000001 svc 0x0 ++ */ ++ if (pc[0] != 0xd2801168 || pc[1] != 0xd4000001) ++ { ++ return _URC_END_OF_STACK; ++ } ++ ++ rt_ = context->cfa; ++ sc = &rt_->uc.uc_mcontext; ++ ++/* This define duplicates the definition in aarch64.md */ ++#define SP_REGNUM 31 ++ ++ new_cfa = (_Unwind_Ptr) sc; ++ fs->regs.cfa_how = CFA_REG_OFFSET; ++ fs->regs.cfa_reg = STACK_POINTER_REGNUM; ++ fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa; ++ ++ for (i = 0; i < AARCH64_DWARF_NUMBER_R; i++) ++ { ++ fs->regs.reg[AARCH64_DWARF_R0 + i].how = REG_SAVED_OFFSET; ++ fs->regs.reg[AARCH64_DWARF_R0 + i].loc.offset = ++ (_Unwind_Ptr) & (sc->regs[i]) - new_cfa; ++ } ++ ++ /* The core context may be extended with an arbitrary set of ++ additional contexts appended sequentially. Each additional ++ context contains a magic identifier and size in bytes. The size ++ field can be used to skip over unrecognized context extensions. ++ The end of the context sequence is marked by a context with magic ++ 0 or size 0. */ ++ for (extension_marker = (struct _aarch64_ctx *) &sc->__reserved; ++ extension_marker->magic; ++ extension_marker = (struct _aarch64_ctx *) ++ ((unsigned char *) extension_marker + extension_marker->size)) ++ { ++ if (extension_marker->magic == FPSIMD_MAGIC) ++ { ++ struct fpsimd_context *ctx = ++ (struct fpsimd_context *) extension_marker; ++ int i; ++ ++ for (i = 0; i < AARCH64_DWARF_NUMBER_V; i++) ++ { ++ _Unwind_Sword offset; ++ ++ fs->regs.reg[AARCH64_DWARF_V0 + i].how = REG_SAVED_OFFSET; ++ ++ /* sigcontext contains 32 128bit registers for V0 to ++ V31. The kernel will have saved the contents of the ++ V registers. We want to unwind the callee save D ++ registers. Each D register comprises the least ++ significant half of the corresponding V register. We ++ need to offset into the saved V register dependent on ++ our endianness to find the saved D register. */ ++ ++ offset = (_Unwind_Ptr) & (ctx->vregs[i]) - new_cfa; ++ ++ /* The endianness adjustment code below expects that a ++ saved V register is 16 bytes. */ ++ gcc_assert (sizeof (ctx->vregs[0]) == 16); ++#if defined (__AARCH64EB__) ++ offset = offset + 8; ++#endif ++ fs->regs.reg[AARCH64_DWARF_V0 + i].loc.offset = offset; ++ } ++ } ++ else ++ { ++ /* There is context provided that we do not recognize! */ ++ } ++ } ++ ++ fs->regs.reg[31].how = REG_SAVED_OFFSET; ++ fs->regs.reg[31].loc.offset = (_Unwind_Ptr) & (sc->sp) - new_cfa; ++ ++ fs->signal_frame = 1; ++ ++ fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET; ++ fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset = ++ (_Unwind_Ptr) (sc->pc) - new_cfa; ++ ++ fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN; ++ ++ return _URC_NO_REASON; ++} ++ ++#endif + +Property changes on: libgcc/config/aarch64/linux-unwind.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: libgcc/config/aarch64/t-aarch64 +=================================================================== +--- a/src/libgcc/config/aarch64/t-aarch64 (.../gcc-4_7-branch) ++++ b/src/libgcc/config/aarch64/t-aarch64 (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,21 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++LIB2ADD += $(srcdir)/config/aarch64/sync-cache.c +Index: libgcc/config/aarch64/sync-cache.c +=================================================================== +--- a/src/libgcc/config/aarch64/sync-cache.c (.../gcc-4_7-branch) ++++ b/src/libgcc/config/aarch64/sync-cache.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,57 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++void ++__aarch64_sync_cache_range (const void *base, const void *end) ++{ ++ unsigned icache_lsize; ++ unsigned dcache_lsize; ++ static unsigned int cache_info = 0; ++ const char *address; ++ ++ if (! cache_info) ++ /* CTR_EL0 [3:0] contains log2 of icache line size in words. ++ CTR_EL0 [19:16] contains log2 of dcache line size in words. */ ++ asm volatile ("mrs\t%0, ctr_el0":"=r" (cache_info)); ++ ++ icache_lsize = 4 << (cache_info & 0xF); ++ dcache_lsize = 4 << ((cache_info >> 16) & 0xF); ++ ++ /* Loop over the address range, clearing one cache line at once. ++ Data cache must be flushed to unification first to make sure the ++ instruction cache fetches the updated data. 'end' is exclusive, ++ as per the GNU definition of __clear_cache. */ ++ ++ for (address = base; address < (const char *) end; address += dcache_lsize) ++ asm volatile ("dc\tcvau, %0" ++ : ++ : "r" (address) ++ : "memory"); ++ ++ asm volatile ("dsb\tish" : : : "memory"); ++ ++ for (address = base; address < (const char *) end; address += icache_lsize) ++ asm volatile ("ic\tivau, %0" ++ : ++ : "r" (address) ++ : "memory"); ++ ++ asm volatile ("dsb\tish; isb" : : : "memory"); ++} + +Property changes on: libgcc/config/aarch64/sync-cache.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: libgcc/ChangeLog.aarch64 +=================================================================== +--- a/src/libgcc/ChangeLog.aarch64 (.../gcc-4_7-branch) ++++ b/src/libgcc/ChangeLog.aarch64 (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,56 @@ ++2012-09-06 Marcus Shawcroft ++ ++ * config/aarch64/sfp-machine.h (FP_EX_INVALID, FP_EX_DIVZERO) ++ (FP_EX_OVERFLOW, FP_EX_UNDERFLOW, FP_EX_INEXACT) ++ (FP_HANDLE_EXCEPTIONS, FP_RND_NEAREST, FP_RND_ZERO, FP_RND_PINF) ++ (FP_RND_MINF, _FP_DECL_EX, FP_INIT_FOUNDMODE, FP_ROUNDMODE): New. ++ ++2012-09-03 Marcus Shawcroft ++ ++ * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cache ++ the ctr_el0 register. ++ ++2012-09-03 Marcus Shawcroft ++ ++ * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Lift ++ declarations to top of function. Update comment. Correct ++ icache_linesize and dcache_linesize calculation. ++ ++2012-07-17 Marcus Shawcroft ++ ++ * config/aarch64/sfp-machine.h (__ARM_EABI__): Remove. ++ ++2012-06-08 Jim MacArthur ++ ++ * config.host ++ (aarch64*-*-elf): Remove t-softfp-sfdf and t-softfp-excl. ++ (aarch64*-*-linux*): Likewise. ++ ++2012-06-08 Jim MacArthur ++ ++ * config.host ++ (aarch64*-*-elf): Add t-aarch64. ++ (aarch64*-*-linux*): Add t-aarch64, remove t-linux. ++ * config/aarch64/lib1funcs.S: Delete. ++ * config/aarch64/sync-cache.c: New file. ++ * config/aarch64/t-aarch64: New file. ++ * config/aarch64/t-linux: Delete. ++ ++2012-06-08 Jim MacArthur ++ ++ * config/aarch64/t-aarch64: Delete. ++ * config.host (aarch64*-*-elf): Remove reference to t-aarch64. ++ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * configure.ac: Enable AArch64. ++ * configure: Regenerate. +Index: config.guess +=================================================================== +--- a/src/config.guess (.../gcc-4_7-branch) ++++ b/src/config.guess (.../ARM/aarch64-4.7-branch) +@@ -2,9 +2,9 @@ + # Attempt to guess a canonical system name. + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, + # 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, +-# 2011 Free Software Foundation, Inc. ++# 2011, 2012 Free Software Foundation, Inc. + +-timestamp='2011-06-03' ++timestamp='2012-08-14' + + # This file is free software; you can redistribute it and/or modify it + # under the terms of the GNU General Public License as published by +@@ -17,9 +17,7 @@ + # General Public License for more details. + # + # You should have received a copy of the GNU General Public License +-# along with this program; if not, write to the Free Software +-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA +-# 02110-1301, USA. ++# along with this program; if not, see . + # + # As a special exception to the GNU General Public License, if you + # distribute this file as part of a program that contains a +@@ -57,8 +55,8 @@ + + Originally written by Per Bothner. + Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, +-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free +-Software Foundation, Inc. ++2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 ++Free Software Foundation, Inc. + + This is free software; see the source for copying conditions. There is NO + warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." +@@ -145,7 +143,7 @@ + case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in + *:NetBSD:*:*) + # NetBSD (nbsd) targets should (where applicable) match one or +- # more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*, ++ # more of the tuples: *-*-netbsdelf*, *-*-netbsdaout*, + # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently + # switched to ELF, *-*-netbsd* would select the old + # object file format. This provides both forward +@@ -202,6 +200,10 @@ + # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. + echo "${machine}-${os}${release}" + exit ;; ++ *:Bitrig:*:*) ++ UNAME_MACHINE_ARCH=`arch | sed 's/Bitrig.//'` ++ echo ${UNAME_MACHINE_ARCH}-unknown-bitrig${UNAME_RELEASE} ++ exit ;; + *:OpenBSD:*:*) + UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'` + echo ${UNAME_MACHINE_ARCH}-unknown-openbsd${UNAME_RELEASE} +@@ -792,21 +794,26 @@ + echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} + exit ;; + *:FreeBSD:*:*) +- case ${UNAME_MACHINE} in +- pc98) +- echo i386-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; ++ UNAME_PROCESSOR=`/usr/bin/uname -p` ++ case ${UNAME_PROCESSOR} in + amd64) + echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + *) +- echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; ++ echo ${UNAME_PROCESSOR}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + esac + exit ;; + i*:CYGWIN*:*) + echo ${UNAME_MACHINE}-pc-cygwin + exit ;; ++ *:MINGW64*:*) ++ echo ${UNAME_MACHINE}-pc-mingw64 ++ exit ;; + *:MINGW*:*) + echo ${UNAME_MACHINE}-pc-mingw32 + exit ;; ++ i*:MSYS*:*) ++ echo ${UNAME_MACHINE}-pc-msys ++ exit ;; + i*:windows32*:*) + # uname -m includes "-pc" on this system. + echo ${UNAME_MACHINE}-mingw32 +@@ -861,6 +868,13 @@ + i*86:Minix:*:*) + echo ${UNAME_MACHINE}-pc-minix + exit ;; ++ aarch64:Linux:*:*) ++ echo ${UNAME_MACHINE}-unknown-linux-gnu ++ exit ;; ++ aarch64_be:Linux:*:*) ++ UNAME_MACHINE=aarch64_be ++ echo ${UNAME_MACHINE}-unknown-linux-gnu ++ exit ;; + alpha:Linux:*:*) + case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in + EV5) UNAME_MACHINE=alphaev5 ;; +@@ -895,14 +909,17 @@ + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + cris:Linux:*:*) +- echo cris-axis-linux-gnu ++ echo ${UNAME_MACHINE}-axis-linux-gnu + exit ;; + crisv32:Linux:*:*) +- echo crisv32-axis-linux-gnu ++ echo ${UNAME_MACHINE}-axis-linux-gnu + exit ;; + frv:Linux:*:*) +- echo frv-unknown-linux-gnu ++ echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; ++ hexagon:Linux:*:*) ++ echo ${UNAME_MACHINE}-unknown-linux-gnu ++ exit ;; + i*86:Linux:*:*) + LIBC=gnu + eval $set_cc_for_build +@@ -943,7 +960,7 @@ + test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; } + ;; + or32:Linux:*:*) +- echo or32-unknown-linux-gnu ++ echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + padre:Linux:*:*) + echo sparc-unknown-linux-gnu +@@ -984,7 +1001,7 @@ + echo ${UNAME_MACHINE}-dec-linux-gnu + exit ;; + x86_64:Linux:*:*) +- echo x86_64-unknown-linux-gnu ++ echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + xtensa*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu +@@ -1191,6 +1208,9 @@ + BePC:Haiku:*:*) # Haiku running on Intel PC compatible. + echo i586-pc-haiku + exit ;; ++ x86_64:Haiku:*:*) ++ echo x86_64-unknown-haiku ++ exit ;; + SX-4:SUPER-UX:*:*) + echo sx4-nec-superux${UNAME_RELEASE} + exit ;; +@@ -1246,7 +1266,7 @@ + NEO-?:NONSTOP_KERNEL:*:*) + echo neo-tandem-nsk${UNAME_RELEASE} + exit ;; +- NSE-?:NONSTOP_KERNEL:*:*) ++ NSE-*:NONSTOP_KERNEL:*:*) + echo nse-tandem-nsk${UNAME_RELEASE} + exit ;; + NSR-?:NONSTOP_KERNEL:*:*) +@@ -1315,11 +1335,11 @@ + i*86:AROS:*:*) + echo ${UNAME_MACHINE}-pc-aros + exit ;; ++ x86_64:VMkernel:*:*) ++ echo ${UNAME_MACHINE}-unknown-esx ++ exit ;; + esac + +-#echo '(No uname command or uname output not recognized.)' 1>&2 +-#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 +- + eval $set_cc_for_build + cat >$dummy.c < ++ ++ * config/aarch64/arm_neon.h (vqdmlalh_lane_s16, vqdmlalh_s16, ++ vqdmlals_lane_s32, vqdmlals_s32, vqdmlslh_lane_s16, vqdmlslh_s16, ++ vqdmlsls_lane_s32, vqdmlsls_s32): Remove old temporary inline asm ++ implementations. ++ ++2012-10-05 Sofiane Naci ++ ++ * config/aarch64/aarch64.md (*fnmadd4): Add missing ++ constraints. ++ ++2012-10-04 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h: Rename vqmll_* to ++ vqdmll_*. ++ ++2012-10-04 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vfma_n_f32, vfmaq_n_f32, vfmaq_n_f64): New. ++ ++2012-10-04 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vbslq_f64): Fix parameter type. ++ ++2012-10-02 Tejas Belagod ++ Ulrich Weigand ++ ++ * reload.c (find_reloads_subreg_address): Remove FORCE_REPLACE ++ parameter. Always replace normal subreg with memory reference ++ whenever possible. Return NULL otherwise. ++ (find_reloads_toplev): Always call find_reloads_subreg_address ++ for subregs of registers equivalent to a memory location. ++ Only recurse further if find_reloads_subreg_address fails. ++ (find_reloads_address_1): Only call find_reloads_subreg_address ++ for subregs of registers equivalent to a memory location. ++ Properly handle failure of find_reloads_subreg_address. ++ ++2012-10-01 Ian Bolton ++ Richard Henderson ++ ++ * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Fix a ++ functional typo and refactor code in switch statement. ++ * config/aarch64/aarch64.md (add_losym): Handle symbol + offset. ++ * config/aarch64/predicates.md (aarch64_tls_ie_symref): Match const. ++ (aarch64_tls_le_symref): Likewise. ++ ++2012-09-26 Marcus Shawcroft ++ ++ * config/aarch64/predicates.md (aarch64_simd_reg_or_zero): Remove ++ duplicate. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64.c (aarch64_shift_truncation_mask): Define. ++ (TARGET_SHIFT_TRUNCATION_MASK): Define. ++ * config/aarch64/aarch64.h (SHIFT_COUNT_TRUNCATED): Conditionalize on ++ TARGET_SIMD. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vrshrn_high_n_s16, vrshrn_high_n_s32) ++ (vrshrn_high_n_s64, vrshrn_high_n_u16, vrshrn_high_n_u32) ++ (vrshrn_high_n_u64, vshrn_high_n_s16, vshrn_high_n_s32) ++ (vshrn_high_n_s32, vshrn_high_n_s64, vshrn_high_n_u16, vshrn_high_n_u32) ++ (vshrn_high_n_u64): Fix template to reference correct operands. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vmovq_n_f64): Add. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vfmaq_lane_f64): Fix prototype and ++ assembler template accordingly. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-protos.h (aarch64_simd_imm_scalar_p): Declare. ++ * config/aarch64/aarch64.c (aarch64_simd_imm_scalar_p): New. ++ * config/aarch64/aarch64.md (*movdi_aarch64): Add alternative for moving ++ valid scalar immediate into a Advanved SIMD D-register. ++ * config/aarch64/constraints.md (Dd): New. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (aarch64_cm): Tighten ++ predicate for operand 2 of the compare pattern to accept register ++ or zero. ++ * config/aarch64/predicates.md (aarch64_simd_reg_or_zero): New. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): Split Q-reg ++ vector value move contained in general registers. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64.c (aarch64_simd_expand_builtin): Expand binary ++ operations' constant operand only if the predicate allows it. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_data): ++ Populate intrinsic table with struct loads and store descriptors. ++ (init_aarch64_simd_builtins): Remove cruft. ++ (aarch64_simd_expand_builtin): Expand the builtins. ++ * config/aarch64/aarch64-modes.def: Define new vector modes for register ++ lists. ++ * config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move): New. ++ (aarch64_simd_mem_operand_p): New. ++ (aarch64_simd_imm_zero_p): New. ++ (aarch64_output_move_struct): New. ++ (aarch64_simd_disambiguate_copy): New. ++ * config/aarch64/aarch64-simd.md (simd_mode): Add OI, CI and XI to the ++ list. ++ (mov): Tighten predicates for simd operand. ++ (movmisalign): Likewise. ++ (*aarch64_simd_mov): Tighten predicates and constraints for simd ++ operands. ++ (*aarch64_combinez): New. ++ (vec_load_lanesoi, vec_store_lanesoi) ++ (vec_load_lanesci, vec_store_lanesci) ++ (vec_load_lanesxi) ++ (vec_store_lanesxi, mov, *aarch64_mov) ++ (aarch64_ld2_dreg, aarch64_ld3_dreg) ++ (aarch64_ld4_dreg, aarch64_ld) ++ (aarch64_ld) ++ (aarch64_get_dreg) ++ (aarch64_get_qreg, aarch64_st2_dreg) ++ (aarch64_st3_dreg, aarch64_st4_dreg) ++ (aarch64_st) ++ (aarch64_st) ++ (aarch64_set_qreg): New expanders and patterns ++ for vector struct loads and stores. ++ * config/aarch64/aarch64.c (aarch64_vect_struct_mode_p): New. ++ (aarch64_vector_mode_p): New. ++ (aarch64_array_mode_supported_p): New. ++ (aarch64_hard_regno_mode_ok): Check that reglists don't go out of ++ range and don't allocate general regs to large int modes. ++ (aarch64_classify_address): Restrict addressing modes of large int ++ modes to same as SIMD addressing modes. ++ (aarch64_print_operand): Print specifiers for register lists. ++ (aarch64_legitimize_reload_address): Treat large int modes simliar to ++ SIMD modes. ++ (aarch64_class_max_nregs): Return the correct max number of register ++ for a particular mode. ++ (aarch64_legitimate_constant_p): Do not allow large int modes ++ immediate values. ++ (aarch64_simd_imm_zero_p): New. ++ (aarch64_simd_mem_operand_p): Check if mem operand has a valid SIMD ++ addressing mode. ++ (aarch64_simd_disambiguate_copy): Copy values that span multiple ++ register with and without overlapping. ++ (aarch64_simd_attr_length_move): Length of instruction sequence ++ depending on the mode. ++ * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_QREG_MODE): New. ++ * config/aarch64/aarch64.md (UNSPEC_VSTRUCTDUMMY, UNSPEC_LD2) ++ (UNSPEC_LD3, UNSPEC_LD4, UNSPEC_ST2, UNSPEC_ST3, UNSPEC_ST4): New. ++ * config/aarch64/arm_neon.h: Remove assembler implementation of vector ++ struct loads and stores and add new C implementations. ++ * config/aarch64/constraints.md (Utv): New memory constraint for SIMD ++ memory operands. ++ (Dz): New. ++ * config/aarch64/iterators.md (VDIC, VSTRUCT, DX): New mode iterators. ++ (Vendreg, nregs, VRL2, VRL3, VRL4, VSTRUCT_DREG): New mode attributes. ++ * config/aarch64/predicates.md (aarch64_simd_struct_operand): New. ++ (aarch64_simd_general_operand): New. ++ (aarch64_simd_nonimmediate_operand): New. ++ (aarch64_simd_reg_or_zero): New. ++ (aarch64_simd_imm_zero): New. ++ ++2012-09-20 Ramana Radhakrishnan ++ ++ * config/aarch64/aarch64.md: Make unspec and unspecv constants ++ c_enums and split out to iterators.md and sync.md. ++ * config/aarch64/iterators.md: Add SIMD unspec c_enums. ++ * config/aarch64/sync.md: Add sync unspecv c_enums. ++ ++2012-09-18 Ian Bolton ++ ++ * config/aarch64/aarch64.h: Define CTZ_DEFINED_VALUE_AT_ZERO. ++ * config/aarch64/aarch64.md (clrsb2): New pattern. ++ * config/aarch64/aarch64.md (rbit2): New pattern. ++ * config/aarch64/aarch64.md (ctz2): New pattern. ++ ++2012-09-18 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-linux.h (MULTIARCH_TUPLE): Remove. ++ (STANDARD_STARTFILE_PREFIX_1): Likewise. ++ (STANDARD_STARTFILE_PREFIX_2): Likewise. ++ ++2012-09-17 Ian Bolton ++ ++ * config/aarch64/aarch64.md (csinc3): Turn into named ++ pattern. ++ * config/aarch64/aarch64.md (ffs2): New pattern. ++ ++2012-09-17 Ian Bolton ++ ++ * config/aarch64/aarch64.md (fmsub4): Rename fnma4. ++ * config/aarch64/aarch64.md (fnmsub4): Rename fms4. ++ * config/aarch64/aarch64.md (fnmadd4): Rename fnms4. ++ * config/aarch64/aarch64.md (*fnmadd4): New pattern. ++ ++2012-09-11 Sofiane Naci ++ ++ * config.sub: Update to version 2010-08-18. ++ * config.guess: Update to version 2010-08-14. ++ ++2012-09-10 James Greenhalgh ++ Richard Earnshaw ++ ++ * common/config/aarch64/aarch64-common.c ++ (aarch_option_optimization_table): New. ++ (TARGET_OPTION_OPTIMIZATION_TABLE): Define. ++ * gcc/config.gcc ([aarch64] target_has_targetm_common): Set to yes. ++ * gcc/config/aarch64/aarch64-elf.h (ASM_OUTPUT_DEF): New definition. ++ * gcc/config/aarch64/aarch64.c (TARGET_MIN_ANCHOR_OFFSET): Define. ++ (TARGET_MAX_ANCHOR_OFFSET): Likewise. ++ ++2012-09-10 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_classify_address): ++ Allow 16 byte modes in constant pool. ++ ++2012-07-23 Ian Bolton ++ ++ * gcc/config/aarch64/aarch64.c (aarch64_print_operand): Use ++ aarch64_classify_symbolic_expression for classifying operands. ++ ++ * gcc/config/aarch64/aarch64.c ++ (aarch64_classify_symbolic_expression): New function. ++ ++ * gcc/config/aarch64/aarch64.c (aarch64_symbolic_constant_p): ++ New function. ++ ++ * gcc/config/aarch64/predicates.md (aarch64_valid_symref): ++ Symbol with constant offset is a valid symbol reference. ++ ++ ++2012-07-17 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c ++ (aarch64_regno_ok_for_index_p): Handle NULL reg_renumber. ++ (aarch64_regno_ok_for_base_p): Likewise. ++ (offset_7bit_signed_scaled_p): New. ++ (offset_9bit_signed_unscaled_p): New. ++ (offset_12bit_unsigned_scaled_p): New. ++ (aarch64_classify_address): Replace pair_p with allow_reg_index_p. ++ Conservative test for valid TImode and TFmode addresses. Use ++ offset_7bit_signed_scaled_p offset_9bit_signed_unscaled_p and ++ offset_12bit_unsigned_scaled_p. Remove explicit TImode and TFmode ++ tests. ++ * config/aarch64/aarch64.md (movti_aarch64): Replace 'm' with 'Ump'. ++ (movtf_aarch64): Replace 'm' with 'Ump', replace 'Utf' with 'm'. ++ * config/aarch64/constraints.md (Utf): Remove. ++ (Ump) ++ ++2012-07-17 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_rtx_costs): ++ Move misplaced parenthesis. ++ ++2012-07-17 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): ++ Do not emit lsl for a shift of 0. ++ (*aarch64_simd_mov): Likwise. ++ ++2012-07-04 Tejas Belagod ++ ++ * config/aarch64/aarch64-linux.h (LINUX_TARGET_LINK_SPEC): Rename ++ LINUX_DYNAMIC_LINKER to GLIBC_DYNAMIC_LINKER. ++ ++2012-06-29 Tejas Belagod ++ ++ * config/aarch64/aarch64.h (aarch64_cmodel): Fix enum name. ++ ++2012-06-22 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (aarch64_sqdmulh_lane, ++ aarch64_sqdmll_lane_internal, ++ aarch64_sqdmlal_lane, aarch64_sqdmlal_laneq, ++ aarch64_sqdmlsl_lane, aarch64_sqdmlsl_laneq, ++ aarch64_sqdmll2_lane_internal, ++ aarch64_sqdmlal2_lane, aarch64_sqdmlal2_laneq, ++ aarch64_sqdmlsl2_lane, aarch64_sqdmlsl2_laneq, ++ aarch64_sqdmull_lane_internal, aarch64_sqdmull_lane, ++ aarch64_sqdmull_laneq, aarch64_sqdmull2_lane_internal, ++ aarch64_sqdmull2_lane, aarch64_sqdmull2_laneq): Change the ++ constraint of the indexed operand to use instead of w. ++ * config/aarch64/aarch64.c (aarch64_hard_regno_nregs): Add case for ++ FP_LO_REGS class. ++ (aarch64_regno_regclass): Return FP_LO_REGS if register in V0 - V15. ++ (aarch64_secondary_reload): Change condition to check for both FP reg ++ classes. ++ (aarch64_class_max_nregs): Add case for FP_LO_REGS. ++ * config/aarch64/aarch64.h (reg_class): New register class FP_LO_REGS. ++ (REG_CLASS_NAMES): Likewise. ++ (REG_CLASS_CONTENTS): Likewise. ++ (FP_LO_REGNUM_P): New. ++ * config/aarch64/aarch64.md (V15_REGNUM): New. ++ * config/aarch64/constraints.md (x): New register constraint. ++ * config/aarch64/iterators.md (vwx): New. ++ ++2012-06-22 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vpadd_f64): Remove. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Update LINK_SPEC. ++ ++ * config/aarch64/aarch64-linux.h (LINUX_TARGET_LINK_SPEC): Remove ++ %{version:-v}, %{b} and %{!dynamic-linker}. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Replace sprintf with snprintf. ++ ++ * config/aarch64/aarch64.c ++ (aarch64_elf_asm_constructor): Replace sprintf with snprintf. ++ (aarch64_elf_asm_destructor): Likewise. ++ (aarch64_output_casesi): Likewise. ++ (aarch64_output_asm_insn): Likewise. ++ * config/aarch64/aarch64-builtins.c (init_aarch64_simd_builtins): ++ Likewise. ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): Replace ++ sprintf with snprintf, and fix code layout. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Fix documentation layout. ++ ++ * doc/invoke.texi: Fix white spaces after dots. ++ Change aarch64*be-*-* to aarch64_be-*-*. ++ Add documentation for -mcmodel=tiny. ++ (-march): Fix formatting. ++ (-mcpu): Likewise. ++ (-mtune): Rephrase. ++ (-march and -mcpu feature modifiers): New subsection. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Use Enums for code models option selection. ++ ++ * config/aarch64/aarch64-elf-raw.h (AARCH64_DEFAULT_MEM_MODEL): Delete. ++ * config/aarch64/aarch64-linux.h (AARCH64_DEFAULT_MEM_MODEL): Delete. ++ * config/aarch64/aarch64-opts.h (enum aarch64_code_model): New. ++ * config/aarch64/aarch64-protos.h: Update comments. ++ * config/aarch64/aarch64.c: Update comments. ++ (aarch64_default_mem_model): Rename to aarch64_code_model. ++ (aarch64_expand_mov_immediate): Remove error message. ++ (aarch64_select_rtx_section): Remove assertion and update comment. ++ (aarch64_override_options): Move memory model initialization from here. ++ (struct aarch64_mem_model): Delete. ++ (aarch64_memory_models[]): Delete. ++ (initialize_aarch64_memory_model): Rename to ++ initialize_aarch64_code_model and update. ++ (aarch64_classify_symbol): Handle AARCH64_CMODEL_TINY and ++ AARCH64_CMODEL_TINY_PIC ++ * config/aarch64/aarch64.h ++ (enum aarch64_memory_model): Delete. ++ (aarch64_default_mem_model): Rename to aarch64_cmodel. ++ (HAS_LONG_COND_BRANCH): Update. ++ (HAS_LONG_UNCOND_BRANCH): Update. ++ * config/aarch64/aarch64.opt ++ (cmodel): New. ++ (mcmodel): Update. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Use Enums for TLS option selection. ++ ++ * config/aarch64/aarch64-opts.h (enum aarch64_tls_type): New. ++ * config/aarch64/aarch64.c ++ (aarch64_tls_dialect): Remove. ++ (tls_symbolic_operand_type): Update comment. ++ (aarch64_override_options): Remove TLS option setup code. ++ * config/aarch64/aarch64.h ++ (TARGET_TLS_TRADITIONAL): Remove. ++ (TARGET_TLS_DESC): Update definition. ++ (enum tls_dialect): Remove. ++ (enum tls_dialect aarch64_tls_dialect) Remove. ++ * config/aarch64/aarch64.opt ++ (tls_type): New. ++ (mtls-dialect): Update. ++ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * common/config/aarch64/aarch64-common.c: New file. ++ * config/aarch64/aarch64-arches.def: New file. ++ * config/aarch64/aarch64-builtins.c: New file. ++ * config/aarch64/aarch64-cores.def: New file. ++ * config/aarch64/aarch64-elf-raw.h: New file. ++ * config/aarch64/aarch64-elf.h: New file. ++ * config/aarch64/aarch64-generic.md: New file. ++ * config/aarch64/aarch64-linux.h: New file. ++ * config/aarch64/aarch64-modes.def: New file. ++ * config/aarch64/aarch64-option-extensions.def: New file. ++ * config/aarch64/aarch64-opts.h: New file. ++ * config/aarch64/aarch64-protos.h: New file. ++ * config/aarch64/aarch64-simd.md: New file. ++ * config/aarch64/aarch64-tune.md: New file. ++ * config/aarch64/aarch64.c: New file. ++ * config/aarch64/aarch64.h: New file. ++ * config/aarch64/aarch64.md: New file. ++ * config/aarch64/aarch64.opt: New file. ++ * config/aarch64/arm_neon.h: New file. ++ * config/aarch64/constraints.md: New file. ++ * config/aarch64/gentune.sh: New file. ++ * config/aarch64/iterators.md: New file. ++ * config/aarch64/large.md: New file. ++ * config/aarch64/predicates.md: New file. ++ * config/aarch64/small.md: New file. ++ * config/aarch64/sync.md: New file. ++ * config/aarch64/t-aarch64-linux: New file. ++ * config/aarch64/t-aarch64: New file. ++ * config.gcc: Add AArch64. ++ * configure.ac: Add AArch64 TLS support detection. ++ * configure: Regenerate. ++ * doc/extend.texi (Complex Numbers): Add AArch64. ++ * doc/invoke.texi (AArch64 Options): New. ++ * doc/md.texi (Machine Constraints): Add AArch64. ++ ++ * read-rtl.c (rtx_list): New data structure. ++ (int_iterator_mapping): New data structure. ++ (int_iterator_data): New. List of int iterator details. ++ (num_int_iterator_data): New. ++ (ints): New group list. ++ (find_int): New. Find an int iterator in a list. ++ (dummy_uses_int_iterator): Dummy handle. ++ (dummy_apply_int_iterator): Dummy handle. ++ (uses_int_iterator_p): New. ++ (apply_iterator_to_rtx): Handle case for rtx field specifier 'i'. ++ (initialize_iterators): Initialize int iterators data struts. ++ (find_int_iterator): New. Find an Int iterators from a hash-table. ++ (add_int_iterator: Add int iterator to database. ++ (read_rtx): Parse and read int iterators mapping and attributes. ++ Initialize int iterators group's hash-table. Memory management. ++ (read_rtx_code): Handle case for rtl field specifier 'i'. +Index: gcc/reload.c +=================================================================== +--- a/src/gcc/reload.c (.../gcc-4_7-branch) ++++ b/src/gcc/reload.c (.../ARM/aarch64-4.7-branch) +@@ -283,7 +283,7 @@ + static void find_reloads_address_part (rtx, rtx *, enum reg_class, + enum machine_mode, int, + enum reload_type, int); +-static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type, ++static rtx find_reloads_subreg_address (rtx, int, enum reload_type, + int, rtx, int *); + static void copy_replacements_1 (rtx *, rtx *, int); + static int find_inc_amount (rtx, rtx); +@@ -4745,31 +4745,19 @@ + } + + /* If the subreg contains a reg that will be converted to a mem, +- convert the subreg to a narrower memref now. +- Otherwise, we would get (subreg (mem ...) ...), +- which would force reload of the mem. ++ attempt to convert the whole subreg to a (narrower or wider) ++ memory reference instead. If this succeeds, we're done -- ++ otherwise fall through to check whether the inner reg still ++ needs address reloads anyway. */ + +- We also need to do this if there is an equivalent MEM that is +- not offsettable. In that case, alter_subreg would produce an +- invalid address on big-endian machines. +- +- For machines that extend byte loads, we must not reload using +- a wider mode if we have a paradoxical SUBREG. find_reloads will +- force a reload in that case. So we should not do anything here. */ +- + if (regno >= FIRST_PSEUDO_REGISTER +-#ifdef LOAD_EXTEND_OP +- && !paradoxical_subreg_p (x) +-#endif +- && (reg_equiv_address (regno) != 0 +- || (reg_equiv_mem (regno) != 0 +- && (! strict_memory_address_addr_space_p +- (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0), +- MEM_ADDR_SPACE (reg_equiv_mem (regno))) +- || ! offsettable_memref_p (reg_equiv_mem (regno)) +- || num_not_at_initial_offset)))) +- x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, +- insn, address_reloaded); ++ && reg_equiv_memory_loc (regno) != 0) ++ { ++ tem = find_reloads_subreg_address (x, opnum, type, ind_levels, ++ insn, address_reloaded); ++ if (tem) ++ return tem; ++ } + } + + for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) +@@ -6007,12 +5995,31 @@ + if (ira_reg_class_max_nregs [rclass][GET_MODE (SUBREG_REG (x))] + > reg_class_size[(int) rclass]) + { +- x = find_reloads_subreg_address (x, 0, opnum, +- ADDR_TYPE (type), +- ind_levels, insn, NULL); +- push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass, +- GET_MODE (x), VOIDmode, 0, 0, opnum, type); +- return 1; ++ /* If the inner register will be replaced by a memory ++ reference, we can do this only if we can replace the ++ whole subreg by a (narrower) memory reference. If ++ this is not possible, fall through and reload just ++ the inner register (including address reloads). */ ++ if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x))) != 0) ++ { ++ rtx tem = find_reloads_subreg_address (x, opnum, ++ ADDR_TYPE (type), ++ ind_levels, insn, ++ NULL); ++ if (tem) ++ { ++ push_reload (tem, NULL_RTX, loc, (rtx*) 0, rclass, ++ GET_MODE (tem), VOIDmode, 0, 0, ++ opnum, type); ++ return 1; ++ } ++ } ++ else ++ { ++ push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass, ++ GET_MODE (x), VOIDmode, 0, 0, opnum, type); ++ return 1; ++ } + } + } + } +@@ -6089,18 +6096,13 @@ + } + + /* X, a subreg of a pseudo, is a part of an address that needs to be +- reloaded. ++ reloaded, and the pseusdo is equivalent to a memory location. + +- If the pseudo is equivalent to a memory location that cannot be directly +- addressed, make the necessary address reloads. ++ Attempt to replace the whole subreg by a (possibly narrower or wider) ++ memory reference. If this is possible, return this new memory ++ reference, and push all required address reloads. Otherwise, ++ return NULL. + +- If address reloads have been necessary, or if the address is changed +- by register elimination, return the rtx of the memory location; +- otherwise, return X. +- +- If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the +- memory location. +- + OPNUM and TYPE identify the purpose of the reload. + + IND_LEVELS says how many levels of indirect addressing are +@@ -6111,130 +6113,108 @@ + stack slots. */ + + static rtx +-find_reloads_subreg_address (rtx x, int force_replace, int opnum, +- enum reload_type type, int ind_levels, rtx insn, +- int *address_reloaded) ++find_reloads_subreg_address (rtx x, int opnum, enum reload_type type, ++ int ind_levels, rtx insn, int *address_reloaded) + { ++ enum machine_mode outer_mode = GET_MODE (x); ++ enum machine_mode inner_mode = GET_MODE (SUBREG_REG (x)); ++ unsigned outer_size = GET_MODE_SIZE (outer_mode); ++ unsigned inner_size = GET_MODE_SIZE (inner_mode); + int regno = REGNO (SUBREG_REG (x)); + int reloaded = 0; ++ rtx tem, orig; ++ int offset; + +- if (reg_equiv_memory_loc (regno)) +- { +- /* If the address is not directly addressable, or if the address is not +- offsettable, then it must be replaced. */ +- if (! force_replace +- && (reg_equiv_address (regno) +- || ! offsettable_memref_p (reg_equiv_mem (regno)))) +- force_replace = 1; ++ gcc_assert (reg_equiv_memory_loc (regno) != 0); + +- if (force_replace || num_not_at_initial_offset) +- { +- rtx tem = make_memloc (SUBREG_REG (x), regno); ++ /* We cannot replace the subreg with a modified memory reference if: + +- /* If the address changes because of register elimination, then +- it must be replaced. */ +- if (force_replace +- || ! rtx_equal_p (tem, reg_equiv_mem (regno))) +- { +- unsigned outer_size = GET_MODE_SIZE (GET_MODE (x)); +- unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); +- int offset; +- rtx orig = tem; ++ - we have a paradoxical subreg that implicitly acts as a zero or ++ sign extension operation due to LOAD_EXTEND_OP; + +- /* For big-endian paradoxical subregs, SUBREG_BYTE does not +- hold the correct (negative) byte offset. */ +- if (BYTES_BIG_ENDIAN && outer_size > inner_size) +- offset = inner_size - outer_size; +- else +- offset = SUBREG_BYTE (x); ++ - we have a subreg that is implicitly supposed to act on the full ++ register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs); + +- XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); +- PUT_MODE (tem, GET_MODE (x)); +- if (MEM_OFFSET_KNOWN_P (tem)) +- set_mem_offset (tem, MEM_OFFSET (tem) + offset); +- if (MEM_SIZE_KNOWN_P (tem) +- && MEM_SIZE (tem) != (HOST_WIDE_INT) outer_size) +- set_mem_size (tem, outer_size); ++ - the address of the equivalent memory location is mode-dependent; or + +- /* If this was a paradoxical subreg that we replaced, the +- resulting memory must be sufficiently aligned to allow +- us to widen the mode of the memory. */ +- if (outer_size > inner_size) +- { +- rtx base; ++ - we have a paradoxical subreg and the resulting memory is not ++ sufficiently aligned to allow access in the wider mode. + +- base = XEXP (tem, 0); +- if (GET_CODE (base) == PLUS) +- { +- if (CONST_INT_P (XEXP (base, 1)) +- && INTVAL (XEXP (base, 1)) % outer_size != 0) +- return x; +- base = XEXP (base, 0); +- } +- if (!REG_P (base) +- || (REGNO_POINTER_ALIGN (REGNO (base)) +- < outer_size * BITS_PER_UNIT)) +- return x; +- } ++ In addition, we choose not to perform the replacement for *any* ++ paradoxical subreg, even if it were possible in principle. This ++ is to avoid generating wider memory references than necessary. + +- reloaded = find_reloads_address (GET_MODE (tem), &tem, +- XEXP (tem, 0), &XEXP (tem, 0), +- opnum, type, ind_levels, insn); +- /* ??? Do we need to handle nonzero offsets somehow? */ +- if (!offset && !rtx_equal_p (tem, orig)) +- push_reg_equiv_alt_mem (regno, tem); ++ This corresponds to how previous versions of reload used to handle ++ paradoxical subregs where no address reload was required. */ + +- /* For some processors an address may be valid in the +- original mode but not in a smaller mode. For +- example, ARM accepts a scaled index register in +- SImode but not in HImode. Note that this is only +- a problem if the address in reg_equiv_mem is already +- invalid in the new mode; other cases would be fixed +- by find_reloads_address as usual. ++ if (paradoxical_subreg_p (x)) ++ return NULL; + +- ??? We attempt to handle such cases here by doing an +- additional reload of the full address after the +- usual processing by find_reloads_address. Note that +- this may not work in the general case, but it seems +- to cover the cases where this situation currently +- occurs. A more general fix might be to reload the +- *value* instead of the address, but this would not +- be expected by the callers of this routine as-is. ++#ifdef WORD_REGISTER_OPERATIONS ++ if (outer_size < inner_size ++ && ((outer_size - 1) / UNITS_PER_WORD ++ == (inner_size - 1) / UNITS_PER_WORD)) ++ return NULL; ++#endif + +- If find_reloads_address already completed replaced +- the address, there is nothing further to do. */ +- if (reloaded == 0 +- && reg_equiv_mem (regno) != 0 +- && !strict_memory_address_addr_space_p +- (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0), +- MEM_ADDR_SPACE (reg_equiv_mem (regno)))) +- { +- push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0, +- base_reg_class (GET_MODE (tem), +- MEM_ADDR_SPACE (tem), +- MEM, SCRATCH), +- GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0, +- opnum, type); +- reloaded = 1; +- } +- /* If this is not a toplevel operand, find_reloads doesn't see +- this substitution. We have to emit a USE of the pseudo so +- that delete_output_reload can see it. */ +- if (replace_reloads && recog_data.operand[opnum] != x) +- /* We mark the USE with QImode so that we recognize it +- as one that can be safely deleted at the end of +- reload. */ +- PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, +- SUBREG_REG (x)), +- insn), QImode); +- x = tem; +- } +- } ++ /* Since we don't attempt to handle paradoxical subregs, we can just ++ call into simplify_subreg, which will handle all remaining checks ++ for us. */ ++ orig = make_memloc (SUBREG_REG (x), regno); ++ offset = SUBREG_BYTE (x); ++ tem = simplify_subreg (outer_mode, orig, inner_mode, offset); ++ if (!tem || !MEM_P (tem)) ++ return NULL; ++ ++ /* Now push all required address reloads, if any. */ ++ reloaded = find_reloads_address (GET_MODE (tem), &tem, ++ XEXP (tem, 0), &XEXP (tem, 0), ++ opnum, type, ind_levels, insn); ++ /* ??? Do we need to handle nonzero offsets somehow? */ ++ if (!offset && !rtx_equal_p (tem, orig)) ++ push_reg_equiv_alt_mem (regno, tem); ++ ++ /* For some processors an address may be valid in the original mode but ++ not in a smaller mode. For example, ARM accepts a scaled index register ++ in SImode but not in HImode. Note that this is only a problem if the ++ address in reg_equiv_mem is already invalid in the new mode; other ++ cases would be fixed by find_reloads_address as usual. ++ ++ ??? We attempt to handle such cases here by doing an additional reload ++ of the full address after the usual processing by find_reloads_address. ++ Note that this may not work in the general case, but it seems to cover ++ the cases where this situation currently occurs. A more general fix ++ might be to reload the *value* instead of the address, but this would ++ not be expected by the callers of this routine as-is. ++ ++ If find_reloads_address already completed replaced the address, there ++ is nothing further to do. */ ++ if (reloaded == 0 ++ && reg_equiv_mem (regno) != 0 ++ && !strict_memory_address_addr_space_p ++ (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0), ++ MEM_ADDR_SPACE (reg_equiv_mem (regno)))) ++ { ++ push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0, ++ base_reg_class (GET_MODE (tem), MEM_ADDR_SPACE (tem), ++ MEM, SCRATCH), ++ GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0, opnum, type); ++ reloaded = 1; + } ++ ++ /* If this is not a toplevel operand, find_reloads doesn't see this ++ substitution. We have to emit a USE of the pseudo so that ++ delete_output_reload can see it. */ ++ if (replace_reloads && recog_data.operand[opnum] != x) ++ /* We mark the USE with QImode so that we recognize it as one that ++ can be safely deleted at the end of reload. */ ++ PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn), ++ QImode); ++ + if (address_reloaded) + *address_reloaded = reloaded; + +- return x; ++ return tem; + } + + /* Substitute into the current INSN the registers into which we have reloaded +Index: gcc/configure +=================================================================== +--- a/src/gcc/configure (.../gcc-4_7-branch) ++++ b/src/gcc/configure (.../ARM/aarch64-4.7-branch) +@@ -23421,6 +23421,19 @@ + tls_first_minor=19 + tls_as_opt='--fatal-warnings' + ;; ++ aarch64*-*-*) ++ conftest_s=' ++ .section ".tdata","awT",%progbits ++foo: .long 25 ++ .text ++ adrp x0, :tlsgd:x ++ add x0, x0, #:tlsgd_lo12:x ++ bl __tls_get_addr ++ nop' ++ tls_first_major=2 ++ tls_first_minor=20 ++ tls_as_opt='--fatal-warnings' ++ ;; + powerpc-*-*) + conftest_s=' + .section ".tdata","awT",@progbits +Index: gcc/testsuite/gcc.target/aarch64/fcvt_float_int.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_int.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_int.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++#define GPI int ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtas\tw\[0-9\]+, *s\[0-9\]" 2 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/fcvt_float_int.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/mnegl-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/mnegl-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/mnegl-2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,16 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++long long r; ++ ++void test_signed (int a, int b) ++{ ++ /* { dg-final { scan-assembler "smnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = ((long long) a) * (-((long long) b)); ++} ++ ++void test_unsigned (unsigned int a, unsigned int b) ++{ ++ /* { dg-final { scan-assembler "umnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = ((long long) a) * (-((long long) b)); ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/mnegl-2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/fcvt_float_long.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_long.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_long.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++#define GPI long ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 3 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 3 } } */ ++/* { dg-final { scan-assembler-times "fcvtas\tx\[0-9\]+, *s\[0-9\]" 2 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/fcvt_float_long.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.x +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.x (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.x (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,32 @@ ++ ++typedef float *__restrict__ pRF32; ++typedef double *__restrict__ pRF64; ++ ++ ++void max_F32 (pRF32 a, pRF32 b, pRF32 c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] > b[i] ? a[i] : b[i]); ++} ++ ++void min_F32 (pRF32 a, pRF32 b, pRF32 c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] < b[i] ? a[i] : b[i]); ++} ++ ++void max_F64 (pRF64 a, pRF64 b, pRF64 c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] > b[i] ? a[i] : b[i]); ++} ++ ++void min_F64 (pRF64 a, pRF64 b, pRF64 c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] < b[i] ? a[i] : b[i]); ++} +Index: gcc/testsuite/gcc.target/aarch64/frint.x +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/frint.x (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/frint.x (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,66 @@ ++extern GPF SUFFIX(trunc) (GPF); ++extern GPF SUFFIX(ceil) (GPF); ++extern GPF SUFFIX(floor) (GPF); ++extern GPF SUFFIX(nearbyint) (GPF); ++extern GPF SUFFIX(rint) (GPF); ++extern GPF SUFFIX(round) (GPF); ++ ++GPF test1a (GPF x) ++{ ++ return SUFFIX(__builtin_trunc)(x); ++} ++ ++GPF test1b (GPF x) ++{ ++ return SUFFIX(trunc)(x); ++} ++ ++GPF test2a (GPF x) ++{ ++ return SUFFIX(__builtin_ceil)(x); ++} ++ ++GPF test2b (GPF x) ++{ ++ return SUFFIX(ceil)(x); ++} ++ ++GPF test3a (GPF x) ++{ ++ return SUFFIX(__builtin_floor)(x); ++} ++ ++GPF test3b (GPF x) ++{ ++ return SUFFIX(floor)(x); ++} ++ ++GPF test4a (GPF x) ++{ ++ return SUFFIX(__builtin_nearbyint)(x); ++} ++ ++GPF test4b (GPF x) ++{ ++ return SUFFIX(nearbyint)(x); ++} ++ ++GPF test5a (GPF x) ++{ ++ return SUFFIX(__builtin_rint)(x); ++} ++ ++GPF test5b (GPF x) ++{ ++ return SUFFIX(rint)(x); ++} ++ ++GPF test6a (GPF x) ++{ ++ return SUFFIX(__builtin_round)(x); ++} ++ ++GPF test6b (GPF x) ++{ ++ return SUFFIX(round)(x); ++} +Index: gcc/testsuite/gcc.target/aarch64/tst-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/tst-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/tst-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,49 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++volatile unsigned int w0, w1; ++volatile int result; ++ ++void test_si() { ++ /* { dg-final { scan-assembler "tst\tw\[0-9\]*, w\[0-9\]*\n" } } */ ++ result = !(w0 & w1); ++ /* { dg-final { scan-assembler "tst\tw\[0-9\]*, \(0x\[0-9a-fA-F\]+\)|\(\[0-9\]+\)" } } */ ++ result = !(w0 & 0x00f0); ++ /* { dg-final { scan-assembler "tst\tw\[0-9\]*.*lsl 4" } } */ ++ result = !(w0 & (w1 << 4)); ++} ++ ++void test_si_tbnz() { ++ /* { dg-final { scan-assembler "tbnz\t\[wx\]\[0-9\]*" } } */ ++jumpto: ++ if (w0 & 0x08) goto jumpto; ++} ++ ++void test_si_tbz() { ++ /* { dg-final { scan-assembler "tbz\t\[wx\]\[0-9\]*" } } */ ++jumpto: ++ if (!(w1 & 0x08)) goto jumpto; ++} ++ ++volatile unsigned long long x0, x1; ++ ++void test_di() { ++ /* { dg-final { scan-assembler "tst\tx\[0-9\]*, x\[0-9\]*\n" } } */ ++ result = !(x0 & x1); ++ /* { dg-final { scan-assembler "tst\tx\[0-9\]*, \(0x\[0-9a-fA-F\]+\)|\(\[0-9\]+\)" } } */ ++ result = !(x0 & 0x00f0); ++ /* { dg-final { scan-assembler "tst\tx\[0-9\]*.*lsl 4" } } */ ++ result = !(x0 & (x1 << 4)); ++} ++ ++void test_di_tbnz() { ++ /* { dg-final { scan-assembler "tbnz\tx\[0-9\]*" } } */ ++jumpto: ++ if (x0 & 0x08) goto jumpto; ++} ++ ++void test_di_tbz() { ++ /* { dg-final { scan-assembler "tbz\tx\[0-9\]*" } } */ ++jumpto: ++ if (!(x1 & 0x08)) goto jumpto; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/tst-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,1181 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#include "../../../config/aarch64/arm_neon.h" ++ ++/* { dg-final { scan-assembler-times "\\tadd\\tx\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vaddd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vaddd_u64 (a, b); ++} ++ ++int64x1_t ++test_vaddd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vaddd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tadd\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vaddd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d) ++{ ++ return vqaddd_s64 (vaddd_s64 (vqaddd_s64 (a, b), vqaddd_s64 (c, d)), ++ vqaddd_s64 (a, d)); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vceqd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vceqd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vceqzd_s64 (int64x1_t a) ++{ ++ return vceqzd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vcged_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vcged_s64 (a, b); ++} ++ ++uint64x1_t ++test_vcled_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vcled_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vcgezd_s64 (int64x1_t a) ++{ ++ return vcgezd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vcged_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vcged_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vcgtd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vcgtd_s64 (a, b); ++} ++ ++uint64x1_t ++test_vcltd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vcltd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vcgtzd_s64 (int64x1_t a) ++{ ++ return vcgtzd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vcgtd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vcgtd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vclezd_s64 (int64x1_t a) ++{ ++ return vclezd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmlt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vcltzd_s64 (int64x1_t a) ++{ ++ return vcltzd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tdup\\tb\[0-9\]+, v\[0-9\]+\.b" 2 } } */ ++ ++int8x1_t ++test_vdupb_lane_s8 (int8x16_t a) ++{ ++ return vdupb_lane_s8 (a, 2); ++} ++ ++uint8x1_t ++test_vdupb_lane_u8 (uint8x16_t a) ++{ ++ return vdupb_lane_u8 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tdup\\th\[0-9\]+, v\[0-9\]+\.h" 2 } } */ ++ ++int16x1_t ++test_vduph_lane_s16 (int16x8_t a) ++{ ++ return vduph_lane_s16 (a, 2); ++} ++ ++uint16x1_t ++test_vduph_lane_u16 (uint16x8_t a) ++{ ++ return vduph_lane_u16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tdup\\ts\[0-9\]+, v\[0-9\]+\.s" 2 } } */ ++ ++int32x1_t ++test_vdups_lane_s32 (int32x4_t a) ++{ ++ return vdups_lane_s32 (a, 2); ++} ++ ++uint32x1_t ++test_vdups_lane_u32 (uint32x4_t a) ++{ ++ return vdups_lane_u32 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tdup\\td\[0-9\]+, v\[0-9\]+\.d" 2 } } */ ++ ++int64x1_t ++test_vdupd_lane_s64 (int64x2_t a) ++{ ++ return vdupd_lane_s64 (a, 2); ++} ++ ++uint64x1_t ++test_vdupd_lane_u64 (uint64x2_t a) ++{ ++ return vdupd_lane_u64 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmtst\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vtst_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vtstd_s64 (a, b); ++} ++ ++uint64x1_t ++test_vtst_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vtstd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\taddp\\td\[0-9\]+, v\[0-9\]+\.2d" 1 } } */ ++ ++test_vpaddd_s64 (int64x2_t a) ++{ ++ return vpaddd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqadd\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vqaddd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vqaddd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqadd\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqadds_u32 (uint32x1_t a, uint32x1_t b) ++{ ++ return vqadds_u32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqadd\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqaddh_u16 (uint16x1_t a, uint16x1_t b) ++{ ++ return vqaddh_u16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqadd\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqaddb_u8 (uint8x1_t a, uint8x1_t b) ++{ ++ return vqaddb_u8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqadd\\td\[0-9\]+" 5 } } */ ++ ++int64x1_t ++test_vqaddd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vqaddd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqadd\\ts\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqadds_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqadds_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqadd\\th\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqaddh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqaddh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqadd\\tb\[0-9\]+, b\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqaddb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vqaddb_s8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqdmlalh_s16 (int32x1_t a, int16x1_t b, int16x1_t c) ++{ ++ return vqdmlalh_s16 (a, b, c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqdmlalh_lane_s16 (int32x1_t a, int16x1_t b, int16x8_t c) ++{ ++ return vqdmlalh_lane_s16 (a, b, c, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqdmlals_s32 (int64x1_t a, int32x1_t b, int32x1_t c) ++{ ++ return vqdmlals_s32 (a, b, c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int64x1_t ++test_vqdmlals_lane_s32 (int64x1_t a, int32x1_t b, int32x4_t c) ++{ ++ return vqdmlals_lane_s32 (a, b, c, 1); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqdmlslh_s16 (int32x1_t a, int16x1_t b, int16x1_t c) ++{ ++ return vqdmlslh_s16 (a, b, c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqdmlslh_lane_s16 (int32x1_t a, int16x1_t b, int16x8_t c) ++{ ++ return vqdmlslh_lane_s16 (a, b, c, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqdmlsls_s32 (int64x1_t a, int32x1_t b, int32x1_t c) ++{ ++ return vqdmlsls_s32 (a, b, c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int64x1_t ++test_vqdmlsls_lane_s32 (int64x1_t a, int32x1_t b, int32x4_t c) ++{ ++ return vqdmlsls_lane_s32 (a, b, c, 1); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqdmulhh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqdmulhh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int16x1_t ++test_vqdmulhh_lane_s16 (int16x1_t a, int16x8_t b) ++{ ++ return vqdmulhh_lane_s16 (a, b, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqdmulhs_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqdmulhs_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqdmulhs_lane_s32 (int32x1_t a, int32x4_t b) ++{ ++ return vqdmulhs_lane_s32 (a, b, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqdmullh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqdmullh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqdmullh_lane_s16 (int16x1_t a, int16x8_t b) ++{ ++ return vqdmullh_lane_s16 (a, b, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqdmulls_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqdmulls_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int64x1_t ++test_vqdmulls_lane_s32 (int32x1_t a, int32x4_t b) ++{ ++ return vqdmulls_lane_s32 (a, b, 1); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqrdmulhh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqrdmulhh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int16x1_t ++test_vqrdmulhh_lane_s16 (int16x1_t a, int16x8_t b) ++{ ++ return vqrdmulhh_lane_s16 (a, b, 6); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqrdmulhs_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqrdmulhs_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqrdmulhs_lane_s32 (int32x1_t a, int32x4_t b) ++{ ++ return vqrdmulhs_lane_s32 (a, b, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsuqadd\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vuqaddb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vuqaddb_s8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsuqadd\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vuqaddh_s16 (int16x1_t a, int8x1_t b) ++{ ++ return vuqaddh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsuqadd\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vuqadds_s32 (int32x1_t a, int8x1_t b) ++{ ++ return vuqadds_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsuqadd\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vuqaddd_s64 (int64x1_t a, int8x1_t b) ++{ ++ return vuqaddd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusqadd\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vsqaddb_u8 (uint8x1_t a, int8x1_t b) ++{ ++ return vsqaddb_u8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusqadd\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vsqaddh_u16 (uint16x1_t a, int8x1_t b) ++{ ++ return vsqaddh_u16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusqadd\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vsqadds_u32 (uint32x1_t a, int8x1_t b) ++{ ++ return vsqadds_u32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusqadd\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vsqaddd_u64 (uint64x1_t a, int8x1_t b) ++{ ++ return vsqaddd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqabs\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqabsb_s8 (int8x1_t a) ++{ ++ return vqabsb_s8 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqabs\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqabsh_s16 (int16x1_t a) ++{ ++ return vqabsh_s16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqabs\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqabss_s32 (int32x1_t a) ++{ ++ return vqabss_s32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqneg\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqnegb_s8 (int8x1_t a) ++{ ++ return vqnegb_s8 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqneg\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqnegh_s16 (int16x1_t a) ++{ ++ return vqnegh_s16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqneg\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqnegs_s32 (int32x1_t a) ++{ ++ return vqnegs_s32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtun\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqmovunh_s16 (int16x1_t a) ++{ ++ return vqmovunh_s16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtun\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqmovuns_s32 (int32x1_t a) ++{ ++ return vqmovuns_s32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtun\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqmovund_s64 (int64x1_t a) ++{ ++ return vqmovund_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtn\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqmovnh_s16 (int16x1_t a) ++{ ++ return vqmovnh_s16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtn\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqmovns_s32 (int32x1_t a) ++{ ++ return vqmovns_s32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtn\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqmovnd_s64 (int64x1_t a) ++{ ++ return vqmovnd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqxtn\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqmovnh_u16 (uint16x1_t a) ++{ ++ return vqmovnh_u16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqxtn\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqmovns_u32 (uint32x1_t a) ++{ ++ return vqmovns_u32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqxtn\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqmovnd_u64 (uint64x1_t a) ++{ ++ return vqmovnd_u64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsub\\tx\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vsubd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vsubd_u64 (a, b); ++} ++ ++int64x1_t ++test_vsubd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vsubd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsub\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vsubd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d) ++{ ++ return vqsubd_s64 (vsubd_s64 (vqsubd_s64 (a, b), vqsubd_s64 (c, d)), ++ vqsubd_s64 (a, d)); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqsub\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vqsubd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vqsubd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqsub\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqsubs_u32 (uint32x1_t a, uint32x1_t b) ++{ ++ return vqsubs_u32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqsub\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqsubh_u16 (uint16x1_t a, uint16x1_t b) ++{ ++ return vqsubh_u16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqsub\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqsubb_u8 (uint8x1_t a, uint8x1_t b) ++{ ++ return vqsubb_u8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqsub\\td\[0-9\]+" 5 } } */ ++ ++int64x1_t ++test_vqsubd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vqsubd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqsub\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqsubs_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqsubs_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqsub\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqsubh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqsubh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqsub\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqsubb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vqsubb_s8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshl\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vshld_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vshld_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushl\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vshld_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vshld_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsrshl\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vrshld_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vrshld_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\turshl\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vrshld_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vrshld_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tasr\\tx\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vshrd_n_s64 (int64x1_t a) ++{ ++ return vshrd_n_s64 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tlsr\\tx\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vshrd_n_u64 (uint64x1_t a) ++{ ++ return vshrd_n_u64 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tssra\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vsrad_n_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vsrad_n_s64 (a, b, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusra\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vsrad_n_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vsrad_n_u64 (a, b, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsrshr\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vrshrd_n_s64 (int64x1_t a) ++{ ++ return vrshrd_n_s64 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\turshr\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vrshrd_n_u64 (uint64x1_t a) ++{ ++ return vrshrd_n_u64 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vrsrad_n_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vrsrad_n_s64 (a, b, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vrsrad_n_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vrsrad_n_u64 (a, b, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshl\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqrshlb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vqrshlb_s8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshl\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqrshlh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqrshlh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshl\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqrshls_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqrshls_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshl\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqrshld_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vqrshld_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshl\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqrshlb_u8 (uint8x1_t a, uint8x1_t b) ++{ ++ return vqrshlb_u8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshl\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqrshlh_u16 (uint16x1_t a, uint16x1_t b) ++{ ++ return vqrshlh_u16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshl\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqrshls_u32 (uint32x1_t a, uint32x1_t b) ++{ ++ return vqrshls_u32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshl\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vqrshld_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vqrshld_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshlu\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqshlub_n_s8 (int8x1_t a) ++{ ++ return vqshlub_n_s8 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshlu\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqshluh_n_s16 (int16x1_t a) ++{ ++ return vqshluh_n_s16 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshlu\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqshlus_n_s32 (int32x1_t a) ++{ ++ return vqshlus_n_s32 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshlu\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqshlud_n_s64 (int64x1_t a) ++{ ++ return vqshlud_n_s64 (a, 6); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshl\\tb\[0-9\]+" 2 } } */ ++ ++int8x1_t ++test_vqshlb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vqshlb_s8 (a, b); ++} ++ ++int8x1_t ++test_vqshlb_n_s8 (int8x1_t a) ++{ ++ return vqshlb_n_s8 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshl\\th\[0-9\]+" 2 } } */ ++ ++int16x1_t ++test_vqshlh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqshlh_s16 (a, b); ++} ++ ++int16x1_t ++test_vqshlh_n_s16 (int16x1_t a) ++{ ++ return vqshlh_n_s16 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshl\\ts\[0-9\]+" 2 } } */ ++ ++int32x1_t ++test_vqshls_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqshls_s32 (a, b); ++} ++ ++int32x1_t ++test_vqshls_n_s32 (int32x1_t a) ++{ ++ return vqshls_n_s32 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshl\\td\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vqshld_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vqshld_s64 (a, b); ++} ++ ++int64x1_t ++test_vqshld_n_s64 (int64x1_t a) ++{ ++ return vqshld_n_s64 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshl\\tb\[0-9\]+" 2 } } */ ++ ++uint8x1_t ++test_vqshlb_u8 (uint8x1_t a, uint8x1_t b) ++{ ++ return vqshlb_u8 (a, b); ++} ++ ++uint8x1_t ++test_vqshlb_n_u8 (uint8x1_t a) ++{ ++ return vqshlb_n_u8 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshl\\th\[0-9\]+" 2 } } */ ++ ++uint16x1_t ++test_vqshlh_u16 (uint16x1_t a, uint16x1_t b) ++{ ++ return vqshlh_u16 (a, b); ++} ++ ++uint16x1_t ++test_vqshlh_n_u16 (uint16x1_t a) ++{ ++ return vqshlh_n_u16 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshl\\ts\[0-9\]+" 2 } } */ ++ ++uint32x1_t ++test_vqshls_u32 (uint32x1_t a, uint32x1_t b) ++{ ++ return vqshls_u32 (a, b); ++} ++ ++uint32x1_t ++test_vqshls_n_u32 (uint32x1_t a) ++{ ++ return vqshls_n_u32 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshl\\td\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vqshld_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vqshld_u64 (a, b); ++} ++ ++uint64x1_t ++test_vqshld_n_u64 (uint64x1_t a) ++{ ++ return vqshld_n_u64 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrun\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqshrunh_n_s16 (int16x1_t a) ++{ ++ return vqshrunh_n_s16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrun\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqshruns_n_s32 (int32x1_t a) ++{ ++ return vqshruns_n_s32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrun\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqshrund_n_s64 (int64x1_t a) ++{ ++ return vqshrund_n_s64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrun\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqrshrunh_n_s16 (int16x1_t a) ++{ ++ return vqrshrunh_n_s16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrun\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqrshruns_n_s32 (int32x1_t a) ++{ ++ return vqrshruns_n_s32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrun\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqrshrund_n_s64 (int64x1_t a) ++{ ++ return vqrshrund_n_s64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrn\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqshrnh_n_s16 (int16x1_t a) ++{ ++ return vqshrnh_n_s16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrn\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqshrns_n_s32 (int32x1_t a) ++{ ++ return vqshrns_n_s32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrn\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqshrnd_n_s64 (int64x1_t a) ++{ ++ return vqshrnd_n_s64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshrn\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqshrnh_n_u16 (uint16x1_t a) ++{ ++ return vqshrnh_n_u16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshrn\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqshrns_n_u32 (uint32x1_t a) ++{ ++ return vqshrns_n_u32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshrn\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqshrnd_n_u64 (uint64x1_t a) ++{ ++ return vqshrnd_n_u64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrn\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqrshrnh_n_s16 (int16x1_t a) ++{ ++ return vqrshrnh_n_s16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrn\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqrshrns_n_s32 (int32x1_t a) ++{ ++ return vqrshrns_n_s32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrn\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqrshrnd_n_s64 (int64x1_t a) ++{ ++ return vqrshrnd_n_s64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshrn\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqrshrnh_n_u16 (uint16x1_t a) ++{ ++ return vqrshrnh_n_u16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshrn\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqrshrns_n_u32 (uint32x1_t a) ++{ ++ return vqrshrns_n_u32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshrn\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqrshrnd_n_u64 (uint64x1_t a) ++{ ++ return vqrshrnd_n_u64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tlsl\\tx\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vshl_n_s64 (int64x1_t a) ++{ ++ return vshld_n_s64 (a, 9); ++} ++ ++uint64x1_t ++test_vshl_n_u64 (uint64x1_t a) ++{ ++ return vshld_n_u64 (a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsli\\td\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vsli_n_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vslid_n_s64 (a, b, 9); ++} ++ ++uint64x1_t ++test_vsli_n_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vslid_n_u64 (a, b, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsri\\td\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vsri_n_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vsrid_n_s64 (a, b, 9); ++} ++ ++uint64x1_t ++test_vsri_n_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vsrid_n_u64 (a, b, 9); ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/fcvt_double_long.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_long.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_long.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF double ++#define SUFFIX(x) x ++#define GPI long ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 3 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 3 } } */ ++/* { dg-final { scan-assembler-times "fcvtas\tx\[0-9\]+, *d\[0-9\]" 2 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/fcvt_double_long.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/frint_double.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/frint_double.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/frint_double.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,14 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF double ++#define SUFFIX(x) x ++ ++#include "frint.x" ++ ++/* { dg-final { scan-assembler-times "frintz\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintp\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintm\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frinti\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintx\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frinta\td\[0-9\]" 2 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/frint_double.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,30 @@ ++/* { dg-options "-O2 -mcmodel=small -fPIC" } */ ++/* { dg-do compile } */ ++ ++extern int __finite (double __value) __attribute__ ((__nothrow__)) __attribute__ ((__const__)); ++int ++__ecvt_r (value, ndigit, decpt, sign, buf, len) ++ double value; ++ int ndigit, *decpt, *sign; ++ char *buf; ++{ ++ if ((sizeof (value) == sizeof (float) ? __finitef (value) : __finite (value)) && value != 0.0) ++ { ++ double d; ++ double f = 1.0; ++ d = -value; ++ if (d < 1.0e-307) ++ { ++ do ++ { ++ f *= 10.0; ++ } ++ while (d * f < 1.0); ++ } ++ } ++ if (ndigit <= 0 && len > 0) ++ { ++ buf[0] = '\0'; ++ *sign = (sizeof (value) == sizeof (float) ? __finitef (value) : __finite (value)) ? (sizeof (value) == sizeof (float) ? __signbitf (value) : __signbit (value)) != 0 : 0; ++ } ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/ffs.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/ffs.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/ffs.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,12 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int functest(unsigned int x) ++{ ++ return __builtin_ffs(x); ++} ++ ++/* { dg-final { scan-assembler "cmp\tw" } } */ ++/* { dg-final { scan-assembler "rbit\tw" } } */ ++/* { dg-final { scan-assembler "clz\tw" } } */ ++/* { dg-final { scan-assembler "csinc\tw" } } */ +Index: gcc/testsuite/gcc.target/aarch64/arch-diagnostics-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/arch-diagnostics-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/arch-diagnostics-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,7 @@ ++/* { dg-error "unknown" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -march=dummy" } */ ++ ++void f () ++{ ++ return; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/arch-diagnostics-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/csinv-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/csinv-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/csinv-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,50 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int ++test_csinv32_condasn1(unsigned int w0, ++ unsigned int w1, ++ unsigned int w2, ++ unsigned int w3) { ++ unsigned int w4; ++ ++ /* { dg-final { scan-assembler "csinv\tw\[0-9\]*.*ne" } } */ ++ w4 = (w0 == w1) ? ~w3 : w2; ++ return w4; ++} ++ ++unsigned int ++test_csinv32_condasn2(unsigned int w0, ++ unsigned int w1, ++ unsigned int w2, ++ unsigned int w3) { ++ unsigned int w4; ++ ++ /* { dg-final { scan-assembler "csinv\tw\[0-9\]*.*eq" } } */ ++ w4 = (w0 == w1) ? w3 : ~w2; ++ return w4; ++} ++ ++unsigned long long ++test_csinv64_condasn1(unsigned long long x0, ++ unsigned long long x1, ++ unsigned long long x2, ++ unsigned long long x3) { ++ unsigned long long x4; ++ ++ /* { dg-final { scan-assembler "csinv\tx\[0-9\]*.*ne" } } */ ++ x4 = (x0 == x1) ? ~x3 : x2; ++ return x4; ++} ++ ++unsigned long long ++test_csinv64_condasn2(unsigned long long x0, ++ unsigned long long x1, ++ unsigned long long x2, ++ unsigned long long x3) { ++ unsigned long long x4; ++ ++ /* { dg-final { scan-assembler "csinv\tx\[0-9\]*.*eq" } } */ ++ x4 = (x0 == x1) ? x3 : ~x2; ++ return x4; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/csinv-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vmlsq_laneq.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vmlsq_laneq.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vmlsq_laneq.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,158 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++ ++extern void abort (void); ++ ++void ++test1 () ++{ ++ int16x8_t val1, val2, val3; ++ int16x8_t result; ++ uint64_t act, exp; ++ ++ val1 = vcombine_s16 (vcreate_s16 (UINT64_C (0xffff9ab680000000)), ++ vcreate_s16 (UINT64_C (0x00000000ffff0000))); ++ val2 = vcombine_s16 (vcreate_s16 (UINT64_C (0x32b77fffffff7fff)), ++ vcreate_s16 (UINT64_C (0x0000ffff00007fff))); ++ val3 = vcombine_s16 (vcreate_s16 (UINT64_C (0x7fff00007fff0000)), ++ vcreate_s16 (UINT64_C (0x80007fff00000000))); ++ result = vmlsq_laneq_s16 (val1, val2, val3, 6); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_s16 (result), 0); ++ exp = UINT64_C (0xb2b69ab5ffffffff); ++ if (act != exp) ++ abort (); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_s16 (result), 1); ++ exp = UINT64_C (0x00007fffffffffff); ++ if (act != exp) ++ abort (); ++} ++ ++void ++test2 () ++{ ++ int32x4_t val1, val2, val3; ++ int32x4_t result; ++ uint64_t exp, act; ++ ++ val1 = vcombine_s32 (vcreate_s32 (UINT64_C (0x00008000f46f7fff)), ++ vcreate_s32 (UINT64_C (0x7fffffffffff8000))); ++ val2 = vcombine_s32 (vcreate_s32 (UINT64_C (0x7fff7fff0e700000)), ++ vcreate_s32 (UINT64_C (0xffff000080000000))); ++ val3 = vcombine_s32 (vcreate_s32 (UINT64_C (0x00000000ffff0000)), ++ vcreate_s32 (UINT64_C (0xd9edea1a8000fb28))); ++ result = vmlsq_laneq_s32 (val1, val2, val3, 3); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_s32 (result), 0); ++ exp = UINT64_C (0xcefb6a1a1d0f7fff); ++ if (act != exp) ++ abort (); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_s32 (result), 1); ++ exp = UINT64_C (0x6a19ffffffff8000); ++ if (act != exp) ++ abort (); ++} ++ ++void ++test3 () ++{ ++ uint16x8_t val1, val2, val3; ++ uint16x8_t result; ++ uint64_t act, exp; ++ ++ val1 = vcombine_u16 (vcreate_u16 (UINT64_C (0x000080008000802a)), ++ vcreate_u16 (UINT64_C (0x7fffffff00007fff))); ++ val2 = vcombine_u16 (vcreate_u16 (UINT64_C (0x7fffcdf1ffff0000)), ++ vcreate_u16 (UINT64_C (0xe2550000ffffffff))); ++ val3 = vcombine_u16 (vcreate_u16 (UINT64_C (0x80007fff80000000)), ++ vcreate_u16 (UINT64_C (0xbe2100007fffffff))); ++ ++ result = vmlsq_laneq_u16 (val1, val2, val3, 7); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_u16 (result), 0); ++ exp = UINT64_C (0x3e2115ef3e21802a); ++ if (act != exp) ++ abort (); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_u16 (result), 1); ++ exp = UINT64_C (0x3d0affffbe213e20); ++ if (act != exp) ++ abort (); ++} ++ ++void ++test4 () ++{ ++ uint32x4_t val1, val2, val3; ++ uint32x4_t result; ++ uint64_t act, exp; ++ ++ val1 = vcombine_u32 (vcreate_u32 (UINT64_C (0x3295fe3d7fff7fff)), ++ vcreate_u32 (UINT64_C (0x7fff00007fff7fff))); ++ val2 = vcombine_u32 (vcreate_u32 (UINT64_C (0xffff7fff7fff8000)), ++ vcreate_u32 (UINT64_C (0x7fff80008000ffff))); ++ val3 = vcombine_u32 (vcreate_u32 (UINT64_C (0x7fff7fff80008000)), ++ vcreate_u32 (UINT64_C (0x0000800053ab7fff))); ++ ++ result = vmlsq_laneq_u32 (val1, val2, val3, 2); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_u32 (result), 0); ++ exp = UINT64_C (0x4640fe3cbffeffff); ++ if (act != exp) ++ abort (); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_u32 (result), 1); ++ exp = UINT64_C (0xbffe8000d3abfffe); ++ if (act != exp) ++ abort (); ++} ++ ++void ++test5 () ++{ ++ float32x4_t val1, val2, val3; ++ float32x4_t result; ++ float32_t act; ++ ++ val1 = vcombine_f32 (vcreate_f32 (UINT64_C (0x3f49daf03ef3dc73)), ++ vcreate_f32 (UINT64_C (0x3f5d467a3ef3dc73))); ++ val2 = vcombine_f32 (vcreate_f32 (UINT64_C (0x3d2064c83d10cd28)), ++ vcreate_f32 (UINT64_C (0x3ea7d1a23d10cd28))); ++ val3 = vcombine_f32 (vcreate_f32 (UINT64_C (0x3f6131993edb1e04)), ++ vcreate_f32 (UINT64_C (0x3f37f4bf3edb1e04))); ++ ++ result = vmlsq_laneq_f32 (val1, val2, val3, 0); ++ ++ act = vgetq_lane_f32 (result, 0); ++ if (act != 0.46116194128990173f) ++ abort (); ++ ++ act = vgetq_lane_f32 (result, 1); ++ if (act != 0.7717385292053223f) ++ abort (); ++ ++ act = vgetq_lane_f32 (result, 2); ++ if (act != 0.46116194128990173f) ++ abort (); ++ ++ act = vgetq_lane_f32 (result, 3); ++ if (act != 0.7240825295448303f) ++ abort (); ++} ++ ++int ++main (void) ++{ ++ test1 (); ++ test2 (); ++ test3 (); ++ test4 (); ++ test5 (); ++ ++ return 0; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/vmlsq_laneq.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv.x +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv.x (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv.x (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,43 @@ ++ ++typedef float *__restrict__ pRF32; ++typedef double *__restrict__ pRF64; ++ ++float maxv_f32 (pRF32 a) ++{ ++ int i; ++ float s = a[0]; ++ for (i=1;i<8;i++) ++ s = (s > a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++float minv_f32 (pRF32 a) ++{ ++ int i; ++ float s = a[0]; ++ for (i=1;i<16;i++) ++ s = (s < a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++double maxv_f64 (pRF64 a) ++{ ++ int i; ++ double s = a[0]; ++ for (i=1;i<8;i++) ++ s = (s > a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++double minv_f64 (pRF64 a) ++{ ++ int i; ++ double s = a[0]; ++ for (i=1;i<16;i++) ++ s = (s < a[i] ? s : a[i]); ++ ++ return s; ++} +Index: gcc/testsuite/gcc.target/aarch64/vect-faddv.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-faddv.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-faddv.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,31 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3 -ffast-math" } */ ++ ++extern void abort (void); ++ ++#include "vect-faddv.x" ++ ++int main (void) ++{ ++ float addv_f32_value = -120.0f; ++ double addv_f64_value = 120.0; ++ float af32[16]; ++ double af64[16]; ++ int i; ++ ++ /* Set up input vectors. */ ++ for (i=0; i<16; i++) ++ { ++ af32[i] = (float)-i; ++ af64[i] = (double)i; ++ } ++ ++ if (addv_f32 (af32) != addv_f32_value) ++ abort (); ++ ++ if (addv_f64 (af64) != addv_f64_value) ++ abort (); ++ ++ return 0; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect-faddv.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/fcvt.x +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt.x (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt.x (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,55 @@ ++extern GPF SUFFIX(trunc) (GPF); ++extern GPF SUFFIX(ceil) (GPF); ++extern GPF SUFFIX(floor) (GPF); ++extern GPF SUFFIX(round) (GPF); ++ ++GPI test1a (GPF x) { ++ return SUFFIX(__builtin_trunc)(x); ++} ++ ++GPI test1b (GPF x) ++{ ++ return SUFFIX(trunc)(x); ++} ++ ++GPI test2a (GPF x) ++{ ++ return SUFFIX(__builtin_lceil)(x); ++} ++ ++GPI test2b (GPF x) ++{ ++ return SUFFIX(ceil)(x); ++} ++ ++GPI test2c (GPF x) ++{ ++ return SUFFIX(__builtin_ceil)(x); ++} ++ ++GPI test3a (GPF x) ++{ ++ return SUFFIX(__builtin_lfloor)(x); ++} ++ ++GPI test3b (GPF x) ++{ ++ return SUFFIX(floor)(x); ++} ++ ++GPI test3c (GPF x) ++{ ++ return SUFFIX(__builtin_floor)(x); ++} ++ ++GPI test4a (GPF x) ++{ ++ return SUFFIX(__builtin_round)(x); ++} ++ ++GPI test4b (GPF x) ++{ ++ return SUFFIX(round)(x); ++} ++ ++ +Index: gcc/testsuite/gcc.target/aarch64/clz.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/clz.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/clz.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int functest (unsigned int x) ++{ ++ return __builtin_clz (x); ++} ++ ++/* { dg-final { scan-assembler "clz\tw" } } */ +Index: gcc/testsuite/gcc.target/aarch64/fcvt_float_ulong.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_ulong.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_ulong.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++#define GPI unsigned long ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtpu\tx\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtmu\tx\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtau\tx\[0-9\]+, *s\[0-9\]" 2 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/fcvt_float_ulong.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/csneg-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/csneg-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/csneg-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,50 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int ++test_csneg32_condasn1(int w0, ++ int w1, ++ int w2, ++ int w3) { ++ int w4; ++ ++ /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*ne" } } */ ++ w4 = (w0 == w1) ? -w3 : w2; ++ return w4; ++} ++ ++int ++test_csneg32_condasn2(int w0, ++ int w1, ++ int w2, ++ int w3) { ++ int w4; ++ ++ /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*eq" } } */ ++ w4 = (w0 == w1) ? w3 : -w2; ++ return w4; ++} ++ ++long long ++test_csneg64_condasn1(long long x0, ++ long long x1, ++ long long x2, ++ long long x3) { ++ long long x4; ++ ++ /* { dg-final { scan-assembler "csneg\tx\[0-9\]*.*ne" } } */ ++ x4 = (x0 == x1) ? -x3 : x2; ++ return x4; ++} ++ ++long long ++test_csneg64_condasn2(long long x0, ++ long long x1, ++ long long x2, ++ long long x3) { ++ long long x4; ++ ++ /* { dg-final { scan-assembler "csneg\tx\[0-9\]*.*eq" } } */ ++ x4 = (x0 == x1) ? x3 : -x2; ++ return x4; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/csneg-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/fnmadd-fastmath.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/fnmadd-fastmath.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/fnmadd-fastmath.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,19 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -ffast-math" } */ ++ ++extern double fma (double, double, double); ++extern float fmaf (float, float, float); ++ ++double test_fma1 (double x, double y, double z) ++{ ++ return - fma (x, y, z); ++} ++ ++float test_fma2 (float x, float y, float z) ++{ ++ return - fmaf (x, y, z); ++} ++ ++/* { dg-final { scan-assembler-times "fnmadd\td\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fnmadd\ts\[0-9\]" 1 } } */ ++ +Index: gcc/testsuite/gcc.target/aarch64/ctz.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/ctz.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/ctz.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,11 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int functest (unsigned int x) ++{ ++ return __builtin_ctz (x); ++} ++ ++/* { dg-final { scan-assembler "rbit\tw" } } */ ++/* { dg-final { scan-assembler "clz\tw" } } */ ++ +Index: gcc/testsuite/gcc.target/aarch64/aarch64.exp +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aarch64.exp (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aarch64.exp (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,45 @@ ++# Specific regression driver for AArch64. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . */ ++ ++# GCC testsuite that uses the `dg.exp' driver. ++ ++# Exit immediately if this isn't an AArch64 target. ++if {![istarget aarch64*-*-*] } then { ++ return ++} ++ ++# Load support procs. ++load_lib gcc-dg.exp ++ ++# If a testcase doesn't have special options, use these. ++global DEFAULT_CFLAGS ++if ![info exists DEFAULT_CFLAGS] then { ++ set DEFAULT_CFLAGS " -ansi -pedantic-errors" ++} ++ ++# Initialize `dg'. ++dg-init ++ ++# Main loop. ++dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \ ++ "" $DEFAULT_CFLAGS ++ ++# All done. ++dg-finish +Index: gcc/testsuite/gcc.target/aarch64/frint_float.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/frint_float.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/frint_float.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,14 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++ ++#include "frint.x" ++ ++/* { dg-final { scan-assembler-times "frintz\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintp\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintm\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frinti\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frinta\ts\[0-9\]" 2 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/frint_float.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vector_intrinsics.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vector_intrinsics.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vector_intrinsics.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,803 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#include "../../../config/aarch64/arm_neon.h" ++ ++ ++/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++float32x2_t ++test_vmax_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return vmax_f32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */ ++ ++int8x8_t ++test_vmax_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return vmax_s8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */ ++ ++uint8x8_t ++test_vmax_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return vmax_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */ ++ ++int16x4_t ++test_vmax_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return vmax_s16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */ ++ ++uint16x4_t ++test_vmax_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return vmax_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++int32x2_t ++test_vmax_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vmax_s32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++uint32x2_t ++test_vmax_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return vmax_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++float32x4_t ++test_vmaxq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return vmaxq_f32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.2d, v\[0-9\].2d, v\[0-9\].2d" 1 } } */ ++ ++float64x2_t ++test_vmaxq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return vmaxq_f64(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */ ++ ++int8x16_t ++test_vmaxq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return vmaxq_s8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */ ++ ++uint8x16_t ++test_vmaxq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return vmaxq_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */ ++ ++int16x8_t ++test_vmaxq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return vmaxq_s16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */ ++ ++uint16x8_t ++test_vmaxq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return vmaxq_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++int32x4_t ++test_vmaxq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vmaxq_s32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++uint32x4_t ++test_vmaxq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return vmaxq_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++float32x2_t ++test_vmin_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return vmin_f32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */ ++ ++int8x8_t ++test_vmin_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return vmin_s8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */ ++ ++uint8x8_t ++test_vmin_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return vmin_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */ ++ ++int16x4_t ++test_vmin_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return vmin_s16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */ ++ ++uint16x4_t ++test_vmin_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return vmin_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++int32x2_t ++test_vmin_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vmin_s32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++uint32x2_t ++test_vmin_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return vmin_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++float32x4_t ++test_vminq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return vminq_f32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.2d, v\[0-9\].2d, v\[0-9\].2d" 1 } } */ ++ ++float64x2_t ++test_vminq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return vminq_f64(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */ ++ ++int8x16_t ++test_vminq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return vminq_s8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */ ++ ++uint8x16_t ++test_vminq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return vminq_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */ ++ ++int16x8_t ++test_vminq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return vminq_s16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */ ++ ++uint16x8_t ++test_vminq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return vminq_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++int32x4_t ++test_vminq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vminq_s32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++uint32x4_t ++test_vminq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return vminq_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 2 } } */ ++ ++int8x8_t ++test_vpadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return vpadd_s8(__a, __b); ++} ++ ++uint8x8_t ++test_vpadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return vpadd_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 2 } } */ ++ ++int16x4_t ++test_vpadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return vpadd_s16(__a, __b); ++} ++ ++uint16x4_t ++test_vpadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return vpadd_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 2 } } */ ++ ++int32x2_t ++test_vpadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vpadd_s32(__a, __b); ++} ++ ++uint32x2_t ++test_vpadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return vpadd_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */ ++ ++int32x4_t ++test_vqdmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c) ++{ ++ return vqdmlal_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */ ++ ++int32x4_t ++test_vqdmlal_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return vqdmlal_high_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmlal_high_lane_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ return vqdmlal_high_lane_s16 (a, b, c, 3); ++} ++ ++int32x4_t ++test_vqdmlal_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ return vqdmlal_high_laneq_s16 (a, b, c, 6); ++} ++ ++int32x4_t ++test_vqdmlal_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c) ++{ ++ return vqdmlal_high_n_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmlal_lane_s16 (int32x4_t a, int16x4_t b, int16x8_t c) ++{ ++ return vqdmlal_lane_s16 (a, b, c, 3); ++} ++ ++int32x4_t ++test_vqdmlal_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t c) ++{ ++ return vqdmlal_laneq_s16 (a, b, c, 6); ++} ++ ++int32x4_t ++test_vqdmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c) ++{ ++ return vqdmlal_n_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */ ++ ++int64x2_t ++test_vqdmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return vqdmlal_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */ ++ ++int64x2_t ++test_vqdmlal_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlal_high_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmlal_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlal_high_lane_s32 (__a, __b, __c, 1); ++} ++ ++int64x2_t ++test_vqdmlal_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlal_high_laneq_s32 (__a, __b, __c, 3); ++} ++ ++int64x2_t ++test_vqdmlal_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c) ++{ ++ return vqdmlal_high_n_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c) ++{ ++ return vqdmlal_lane_s32 (__a, __b, __c, 1); ++} ++ ++int64x2_t ++test_vqdmlal_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c) ++{ ++ return vqdmlal_laneq_s32 (__a, __b, __c, 3); ++} ++ ++int64x2_t ++test_vqdmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c) ++{ ++ return vqdmlal_n_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */ ++ ++int32x4_t ++test_vqdmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c) ++{ ++ return vqdmlsl_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */ ++ ++int32x4_t ++test_vqdmlsl_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return vqdmlsl_high_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmlsl_high_lane_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ return vqdmlsl_high_lane_s16 (a, b, c, 3); ++} ++ ++int32x4_t ++test_vqdmlsl_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ return vqdmlsl_high_laneq_s16 (a, b, c, 6); ++} ++ ++int32x4_t ++test_vqdmlsl_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c) ++{ ++ return vqdmlsl_high_n_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmlsl_lane_s16 (int32x4_t a, int16x4_t b, int16x8_t c) ++{ ++ return vqdmlsl_lane_s16 (a, b, c, 3); ++} ++ ++int32x4_t ++test_vqdmlsl_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t c) ++{ ++ return vqdmlsl_laneq_s16 (a, b, c, 6); ++} ++ ++int32x4_t ++test_vqdmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c) ++{ ++ return vqdmlsl_n_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */ ++ ++int64x2_t ++test_vqdmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return vqdmlsl_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */ ++ ++int64x2_t ++test_vqdmlsl_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_high_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmlsl_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_high_lane_s32 (__a, __b, __c, 1); ++} ++ ++int64x2_t ++test_vqdmlsl_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_high_laneq_s32 (__a, __b, __c, 3); ++} ++ ++int64x2_t ++test_vqdmlsl_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c) ++{ ++ return vqdmlsl_high_n_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_lane_s32 (__a, __b, __c, 1); ++} ++ ++int64x2_t ++test_vqdmlsl_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_laneq_s32 (__a, __b, __c, 3); ++} ++ ++int64x2_t ++test_vqdmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c) ++{ ++ return vqdmlsl_n_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */ ++ ++int32x4_t ++test_vqdmull_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return vqdmull_s16 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */ ++ ++int32x4_t ++test_vqdmull_high_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return vqdmull_high_s16 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmull_high_lane_s16 (int16x8_t a, int16x8_t b) ++{ ++ return vqdmull_high_lane_s16 (a, b, 3); ++} ++ ++int32x4_t ++test_vqdmull_high_laneq_s16 (int16x8_t a, int16x8_t b) ++{ ++ return vqdmull_high_laneq_s16 (a, b, 6); ++} ++ ++int32x4_t ++test_vqdmull_high_n_s16 (int16x8_t __a, int16_t __b) ++{ ++ return vqdmull_high_n_s16 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmull_lane_s16 (int16x4_t a, int16x8_t b) ++{ ++ return vqdmull_lane_s16 (a, b, 3); ++} ++ ++int32x4_t ++test_vqdmull_laneq_s16 (int16x4_t a, int16x8_t b) ++{ ++ return vqdmull_laneq_s16 (a, b, 6); ++} ++ ++int32x4_t ++test_vqdmull_n_s16 (int16x4_t __a, int16_t __b) ++{ ++ return vqdmull_n_s16 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */ ++ ++int64x2_t ++test_vqdmull_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vqdmull_s32 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */ ++ ++int64x2_t ++test_vqdmull_high_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vqdmull_high_s32 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmull_high_lane_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vqdmull_high_lane_s32 (__a, __b, 1); ++} ++ ++int64x2_t ++test_vqdmull_high_laneq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vqdmull_high_laneq_s32 (__a, __b, 3); ++} ++ ++int64x2_t ++test_vqdmull_high_n_s32 (int32x4_t __a, int32_t __b) ++{ ++ return vqdmull_high_n_s32 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmull_lane_s32 (int32x2_t __a, int32x4_t __b) ++{ ++ return vqdmull_lane_s32 (__a, __b, 1); ++} ++ ++int64x2_t ++test_vqdmull_laneq_s32 (int32x2_t __a, int32x4_t __b) ++{ ++ return vqdmull_laneq_s32 (__a, __b, 1); ++} ++ ++int64x2_t ++test_vqdmull_n_s32 (int32x2_t __a, int32_t __b) ++{ ++ return vqdmull_n_s32 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.2d" 1 } } */ ++ ++int64x2_t ++test_vshll_n_s32 (int32x2_t __a) ++{ ++ return vshll_n_s32 (__a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.2d" 1 } } */ ++ ++uint64x2_t ++test_vshll_n_u32 (uint32x2_t __a) ++{ ++ return vshll_n_u32 (__a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.2d" 2 } } */ ++ ++int64x2_t ++test_vshll_n_s32_2 (int32x2_t __a) ++{ ++ return vshll_n_s32 (__a, 32); ++} ++ ++uint64x2_t ++test_vshll_n_u32_2 (uint32x2_t __a) ++{ ++ return vshll_n_u32 (__a, 32); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.4s" 1 } } */ ++ ++int32x4_t ++test_vshll_n_s16 (int16x4_t __a) ++{ ++ return vshll_n_s16 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.4s" 1 } } */ ++ ++uint32x4_t ++test_vshll_n_u16 (uint16x4_t __a) ++{ ++ return vshll_n_u16 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.4s" 2 } } */ ++ ++int32x4_t ++test_vshll_n_s16_2 (int16x4_t __a) ++{ ++ return vshll_n_s16 (__a, 16); ++} ++ ++uint32x4_t ++test_vshll_n_u16_2 (uint16x4_t __a) ++{ ++ return vshll_n_u16 (__a, 16); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.8h" 1 } } */ ++ ++int16x8_t ++test_vshll_n_s8 (int8x8_t __a) ++{ ++ return vshll_n_s8 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.8h" 1 } } */ ++ ++uint16x8_t ++test_vshll_n_u8 (uint8x8_t __a) ++{ ++ return vshll_n_u8 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.8h" 2 } } */ ++ ++int16x8_t ++test_vshll_n_s8_2 (int8x8_t __a) ++{ ++ return vshll_n_s8 (__a, 8); ++} ++ ++uint16x8_t ++test_vshll_n_u8_2 (uint8x8_t __a) ++{ ++ return vshll_n_u8 (__a, 8); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.2d" 1 } } */ ++ ++int64x2_t ++test_vshll_high_n_s32 (int32x4_t __a) ++{ ++ return vshll_high_n_s32 (__a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.2d" 1 } } */ ++ ++uint64x2_t ++test_vshll_high_n_u32 (uint32x4_t __a) ++{ ++ return vshll_high_n_u32 (__a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.2d" 2 } } */ ++ ++int64x2_t ++test_vshll_high_n_s32_2 (int32x4_t __a) ++{ ++ return vshll_high_n_s32 (__a, 32); ++} ++ ++uint64x2_t ++test_vshll_high_n_u32_2 (uint32x4_t __a) ++{ ++ return vshll_high_n_u32 (__a, 32); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.4s" 1 } } */ ++ ++int32x4_t ++test_vshll_high_n_s16 (int16x8_t __a) ++{ ++ return vshll_high_n_s16 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.4s" 1 } } */ ++ ++uint32x4_t ++test_vshll_high_n_u16 (uint16x8_t __a) ++{ ++ return vshll_high_n_u16 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.4s" 2 } } */ ++ ++int32x4_t ++test_vshll_high_n_s16_2 (int16x8_t __a) ++{ ++ return vshll_high_n_s16 (__a, 16); ++} ++ ++uint32x4_t ++test_vshll_high_n_u16_2 (uint16x8_t __a) ++{ ++ return vshll_high_n_u16 (__a, 16); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.8h" 1 } } */ ++ ++int16x8_t ++test_vshll_high_n_s8 (int8x16_t __a) ++{ ++ return vshll_high_n_s8 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.8h" 1 } } */ ++ ++uint16x8_t ++test_vshll_high_n_u8 (uint8x16_t __a) ++{ ++ return vshll_high_n_u8 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.8h" 2 } } */ ++ ++int16x8_t ++test_vshll_high_n_s8_2 (int8x16_t __a) ++{ ++ return vshll_high_n_s8 (__a, 8); ++} ++ ++uint16x8_t ++test_vshll_high_n_u8_2 (uint8x16_t __a) ++{ ++ return vshll_high_n_u8 (__a, 8); ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/vector_intrinsics.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-faddv.x +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-faddv.x (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-faddv.x (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,23 @@ ++ ++typedef float *__restrict__ pRF32; ++typedef double *__restrict__ pRF64; ++ ++float addv_f32 (pRF32 a) ++{ ++ int i; ++ float s = 0.0; ++ for (i=0; i<16; i++) ++ s += a[i]; ++ ++ return s; ++} ++ ++double addv_f64 (pRF64 a) ++{ ++ int i; ++ double s = 0.0; ++ for (i=0; i<16; i++) ++ s += a[i]; ++ ++ return s; ++} +Index: gcc/testsuite/gcc.target/aarch64/table-intrinsics.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/table-intrinsics.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/table-intrinsics.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,439 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++ ++int8x8_t ++tbl_tests8_ (int8x8_t tab, int8x8_t idx) ++{ ++ return vtbl1_s8 (tab, idx); ++} ++ ++uint8x8_t ++tbl_testu8_ (uint8x8_t tab, uint8x8_t idx) ++{ ++ return vtbl1_u8 (tab, idx); ++} ++ ++poly8x8_t ++tbl_testp8_ (poly8x8_t tab, uint8x8_t idx) ++{ ++ return vtbl1_p8 (tab, idx); ++} ++ ++int8x8_t ++tbl_tests8_2 (int8x8x2_t tab, int8x8_t idx) ++{ ++ return vtbl2_s8 (tab, idx); ++} ++ ++uint8x8_t ++tbl_testu8_2 (uint8x8x2_t tab, uint8x8_t idx) ++{ ++ return vtbl2_u8 (tab, idx); ++} ++ ++poly8x8_t ++tbl_testp8_2 (poly8x8x2_t tab, uint8x8_t idx) ++{ ++ return vtbl2_p8 (tab, idx); ++} ++ ++int8x8_t ++tbl_tests8_3 (int8x8x3_t tab, int8x8_t idx) ++{ ++ return vtbl3_s8 (tab, idx); ++} ++ ++uint8x8_t ++tbl_testu8_3 (uint8x8x3_t tab, uint8x8_t idx) ++{ ++ return vtbl3_u8 (tab, idx); ++} ++ ++poly8x8_t ++tbl_testp8_3 (poly8x8x3_t tab, uint8x8_t idx) ++{ ++ return vtbl3_p8 (tab, idx); ++} ++ ++int8x8_t ++tbl_tests8_4 (int8x8x4_t tab, int8x8_t idx) ++{ ++ return vtbl4_s8 (tab, idx); ++} ++ ++uint8x8_t ++tbl_testu8_4 (uint8x8x4_t tab, uint8x8_t idx) ++{ ++ return vtbl4_u8 (tab, idx); ++} ++ ++poly8x8_t ++tbl_testp8_4 (poly8x8x4_t tab, uint8x8_t idx) ++{ ++ return vtbl4_p8 (tab, idx); ++} ++ ++int8x8_t ++tb_tests8_ (int8x8_t r, int8x8_t tab, int8x8_t idx) ++{ ++ return vtbx1_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++tb_testu8_ (uint8x8_t r, uint8x8_t tab, uint8x8_t idx) ++{ ++ return vtbx1_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++tb_testp8_ (poly8x8_t r, poly8x8_t tab, uint8x8_t idx) ++{ ++ return vtbx1_p8 (r, tab, idx); ++} ++ ++int8x8_t ++tb_tests8_2 (int8x8_t r, int8x8x2_t tab, int8x8_t idx) ++{ ++ return vtbx2_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++tb_testu8_2 (uint8x8_t r, uint8x8x2_t tab, uint8x8_t idx) ++{ ++ return vtbx2_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++tb_testp8_2 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx) ++{ ++ return vtbx2_p8 (r, tab, idx); ++} ++ ++int8x8_t ++tb_tests8_3 (int8x8_t r, int8x8x3_t tab, int8x8_t idx) ++{ ++ return vtbx3_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++tb_testu8_3 (uint8x8_t r, uint8x8x3_t tab, uint8x8_t idx) ++{ ++ return vtbx3_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++tb_testp8_3 (poly8x8_t r, poly8x8x3_t tab, uint8x8_t idx) ++{ ++ return vtbx3_p8 (r, tab, idx); ++} ++ ++int8x8_t ++tb_tests8_4 (int8x8_t r, int8x8x4_t tab, int8x8_t idx) ++{ ++ return vtbx4_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++tb_testu8_4 (uint8x8_t r, uint8x8x4_t tab, uint8x8_t idx) ++{ ++ return vtbx4_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++tb_testp8_4 (poly8x8_t r, poly8x8x4_t tab, uint8x8_t idx) ++{ ++ return vtbx4_p8 (r, tab, idx); ++} ++ ++int8x8_t ++qtbl_tests8_ (int8x16_t tab, int8x8_t idx) ++{ ++ return vqtbl1_s8 (tab, idx); ++} ++ ++uint8x8_t ++qtbl_testu8_ (uint8x16_t tab, uint8x8_t idx) ++{ ++ return vqtbl1_u8 (tab, idx); ++} ++ ++poly8x8_t ++qtbl_testp8_ (poly8x16_t tab, uint8x8_t idx) ++{ ++ return vqtbl1_p8 (tab, idx); ++} ++ ++int8x8_t ++qtbl_tests8_2 (int8x16x2_t tab, int8x8_t idx) ++{ ++ return vqtbl2_s8 (tab, idx); ++} ++ ++uint8x8_t ++qtbl_testu8_2 (uint8x16x2_t tab, uint8x8_t idx) ++{ ++ return vqtbl2_u8 (tab, idx); ++} ++ ++poly8x8_t ++qtbl_testp8_2 (poly8x16x2_t tab, uint8x8_t idx) ++{ ++ return vqtbl2_p8 (tab, idx); ++} ++ ++int8x8_t ++qtbl_tests8_3 (int8x16x3_t tab, int8x8_t idx) ++{ ++ return vqtbl3_s8 (tab, idx); ++} ++ ++uint8x8_t ++qtbl_testu8_3 (uint8x16x3_t tab, uint8x8_t idx) ++{ ++ return vqtbl3_u8 (tab, idx); ++} ++ ++poly8x8_t ++qtbl_testp8_3 (poly8x16x3_t tab, uint8x8_t idx) ++{ ++ return vqtbl3_p8 (tab, idx); ++} ++ ++int8x8_t ++qtbl_tests8_4 (int8x16x4_t tab, int8x8_t idx) ++{ ++ return vqtbl4_s8 (tab, idx); ++} ++ ++uint8x8_t ++qtbl_testu8_4 (uint8x16x4_t tab, uint8x8_t idx) ++{ ++ return vqtbl4_u8 (tab, idx); ++} ++ ++poly8x8_t ++qtbl_testp8_4 (poly8x16x4_t tab, uint8x8_t idx) ++{ ++ return vqtbl4_p8 (tab, idx); ++} ++ ++int8x8_t ++qtb_tests8_ (int8x8_t r, int8x16_t tab, int8x8_t idx) ++{ ++ return vqtbx1_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++qtb_testu8_ (uint8x8_t r, uint8x16_t tab, uint8x8_t idx) ++{ ++ return vqtbx1_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++qtb_testp8_ (poly8x8_t r, poly8x16_t tab, uint8x8_t idx) ++{ ++ return vqtbx1_p8 (r, tab, idx); ++} ++ ++int8x8_t ++qtb_tests8_2 (int8x8_t r, int8x16x2_t tab, int8x8_t idx) ++{ ++ return vqtbx2_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++qtb_testu8_2 (uint8x8_t r, uint8x16x2_t tab, uint8x8_t idx) ++{ ++ return vqtbx2_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++qtb_testp8_2 (poly8x8_t r, poly8x16x2_t tab, uint8x8_t idx) ++{ ++ return vqtbx2_p8 (r, tab, idx); ++} ++ ++int8x8_t ++qtb_tests8_3 (int8x8_t r, int8x16x3_t tab, int8x8_t idx) ++{ ++ return vqtbx3_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++qtb_testu8_3 (uint8x8_t r, uint8x16x3_t tab, uint8x8_t idx) ++{ ++ return vqtbx3_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++qtb_testp8_3 (poly8x8_t r, poly8x16x3_t tab, uint8x8_t idx) ++{ ++ return vqtbx3_p8 (r, tab, idx); ++} ++ ++int8x8_t ++qtb_tests8_4 (int8x8_t r, int8x16x4_t tab, int8x8_t idx) ++{ ++ return vqtbx4_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++qtb_testu8_4 (uint8x8_t r, uint8x16x4_t tab, uint8x8_t idx) ++{ ++ return vqtbx4_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++qtb_testp8_4 (poly8x8_t r, poly8x16x4_t tab, uint8x8_t idx) ++{ ++ return vqtbx4_p8 (r, tab, idx); ++} ++ ++int8x16_t ++qtblq_tests8_ (int8x16_t tab, int8x16_t idx) ++{ ++ return vqtbl1q_s8 (tab, idx); ++} ++ ++uint8x16_t ++qtblq_testu8_ (uint8x16_t tab, uint8x16_t idx) ++{ ++ return vqtbl1q_u8 (tab, idx); ++} ++ ++poly8x16_t ++qtblq_testp8_ (poly8x16_t tab, uint8x16_t idx) ++{ ++ return vqtbl1q_p8 (tab, idx); ++} ++ ++int8x16_t ++qtblq_tests8_2 (int8x16x2_t tab, int8x16_t idx) ++{ ++ return vqtbl2q_s8 (tab, idx); ++} ++ ++uint8x16_t ++qtblq_testu8_2 (uint8x16x2_t tab, uint8x16_t idx) ++{ ++ return vqtbl2q_u8 (tab, idx); ++} ++ ++poly8x16_t ++qtblq_testp8_2 (poly8x16x2_t tab, uint8x16_t idx) ++{ ++ return vqtbl2q_p8 (tab, idx); ++} ++ ++int8x16_t ++qtblq_tests8_3 (int8x16x3_t tab, int8x16_t idx) ++{ ++ return vqtbl3q_s8 (tab, idx); ++} ++ ++uint8x16_t ++qtblq_testu8_3 (uint8x16x3_t tab, uint8x16_t idx) ++{ ++ return vqtbl3q_u8 (tab, idx); ++} ++ ++poly8x16_t ++qtblq_testp8_3 (poly8x16x3_t tab, uint8x16_t idx) ++{ ++ return vqtbl3q_p8 (tab, idx); ++} ++ ++int8x16_t ++qtblq_tests8_4 (int8x16x4_t tab, int8x16_t idx) ++{ ++ return vqtbl4q_s8 (tab, idx); ++} ++ ++uint8x16_t ++qtblq_testu8_4 (uint8x16x4_t tab, uint8x16_t idx) ++{ ++ return vqtbl4q_u8 (tab, idx); ++} ++ ++poly8x16_t ++qtblq_testp8_4 (poly8x16x4_t tab, uint8x16_t idx) ++{ ++ return vqtbl4q_p8 (tab, idx); ++} ++ ++int8x16_t ++qtbxq_tests8_ (int8x16_t r, int8x16_t tab, int8x16_t idx) ++{ ++ return vqtbx1q_s8 (r, tab, idx); ++} ++ ++uint8x16_t ++qtbxq_testu8_ (uint8x16_t r, uint8x16_t tab, uint8x16_t idx) ++{ ++ return vqtbx1q_u8 (r, tab, idx); ++} ++ ++poly8x16_t ++qtbxq_testp8_ (poly8x16_t r, poly8x16_t tab, uint8x16_t idx) ++{ ++ return vqtbx1q_p8 (r, tab, idx); ++} ++ ++int8x16_t ++qtbxq_tests8_2 (int8x16_t r, int8x16x2_t tab, int8x16_t idx) ++{ ++ return vqtbx2q_s8 (r, tab, idx); ++} ++ ++uint8x16_t ++qtbxq_testu8_2 (uint8x16_t r, uint8x16x2_t tab, uint8x16_t idx) ++{ ++ return vqtbx2q_u8 (r, tab, idx); ++} ++ ++poly8x16_t ++qtbxq_testp8_2 (poly8x16_t r, poly8x16x2_t tab, uint8x16_t idx) ++{ ++ return vqtbx2q_p8 (r, tab, idx); ++} ++ ++int8x16_t ++qtbxq_tests8_3 (int8x16_t r, int8x16x3_t tab, int8x16_t idx) ++{ ++ return vqtbx3q_s8 (r, tab, idx); ++} ++ ++uint8x16_t ++qtbxq_testu8_3 (uint8x16_t r, uint8x16x3_t tab, uint8x16_t idx) ++{ ++ return vqtbx3q_u8 (r, tab, idx); ++} ++ ++poly8x16_t ++qtbxq_testp8_3 (poly8x16_t r, poly8x16x3_t tab, uint8x16_t idx) ++{ ++ return vqtbx3q_p8 (r, tab, idx); ++} ++ ++int8x16_t ++qtbxq_tests8_4 (int8x16_t r, int8x16x4_t tab, int8x16_t idx) ++{ ++ return vqtbx4q_s8 (r, tab, idx); ++} ++ ++uint8x16_t ++qtbxq_testu8_4 (uint8x16_t r, uint8x16x4_t tab, uint8x16_t idx) ++{ ++ return vqtbx4q_u8 (r, tab, idx); ++} ++ ++poly8x16_t ++qtbxq_testp8_4 (poly8x16_t r, poly8x16x4_t tab, uint8x16_t idx) ++{ ++ return vqtbx4q_p8 (r, tab, idx); ++} ++ ++/* { dg-final { scan-assembler-times "tbl v" 42} } */ ++/* { dg-final { scan-assembler-times "tbx v" 30} } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/table-intrinsics.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,66 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -mcmodel=large -fno-builtin" } */ ++/* { dg-skip-if "-mcmodel=large -fPIC not currently supported" { aarch64-*-* } { "-fPIC" } { "" } } */ ++ ++typedef long unsigned int size_t; ++typedef unsigned short int sa_family_t; ++ ++struct sockaddr ++{ ++ sa_family_t sa_family; ++ char sa_data[14]; ++}; ++struct arpreq ++{ ++ int arp_flags; ++ struct sockaddr arp_netmask; ++}; ++typedef struct _IO_FILE FILE; ++extern char *fgets (char *__restrict __s, int __n, FILE *__restrict __stream); ++extern struct _IO_FILE *stderr; ++extern int optind; ++struct aftype { ++ int (*input) (int type, char *bufp, struct sockaddr *); ++}; ++struct aftype *ap; ++static int arp_set(char **args) ++{ ++ char host[128]; ++ struct arpreq req; ++ struct sockaddr sa; ++ memset((char *) &req, 0, sizeof(req)); ++ if (*args == ((void *)0)) { ++ fprintf(stderr, ("arp: need host name\n")); ++ } ++ safe_strncpy(host, *args++, (sizeof host)); ++ if (ap->input(0, host, &sa) < 0) { ++ } ++ while (*args != ((void *)0)) { ++ if (!__extension__ ({ size_t __s1_len, __s2_len; (__builtin_constant_p (*args) && __builtin_constant_p ("netmask") && (__s1_len = strlen (*args), __s2_len = strlen ("netmask"), (!((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) || __s1_len >= 4) && (!((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) || __s2_len >= 4)) ? __builtin_strcmp (*args, "netmask") : (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) && (__s1_len = strlen (*args), __s1_len < 4) ? (__builtin_constant_p ("netmask") && ((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) ? __builtin_strcmp (*args, "netmask") : (__extension__ ({ __const unsigned char *__s2 = (__const unsigned char *) (__const char *) ("netmask"); register int __result = (((__const unsigned char *) (__const char *) (*args))[0] - __s2[0]); if (__s1_len > 0 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[1] - __s2[1]); if (__s1_len > 1 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[2] - __s2[2]); if (__s1_len > 2 && __result == 0) __result = (((__const unsigned char *) (__const char *) (*args))[3] - __s2[3]); } } __result; }))) : (__builtin_constant_p ("netmask") && ((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) && (__s2_len = strlen ("netmask"), __s2_len < 4) ? (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) ? __builtin_strcmp (*args, "netmask") : (__extension__ ({ __const unsigned char *__s1 = (__const unsigned char *) (__const char *) (*args); register int __result = __s1[0] - ((__const unsigned char *) (__const char *) ("netmask"))[0]; if (__s2_len > 0 && __result == 0) { __result = (__s1[1] - ((__const unsigned char *) (__const char *) ("netmask"))[1]); if (__s2_len > 1 && __result == 0) { __result = (__s1[2] - ((__const unsigned char *) (__const char *) ("netmask"))[2]); if (__s2_len > 2 && __result == 0) __result = (__s1[3] - ((__const unsigned char *) (__const char *) ("netmask"))[3]); } } __result; }))) : __builtin_strcmp (*args, "netmask")))); })) { ++ if (__extension__ ({ size_t __s1_len, __s2_len; (__builtin_constant_p (*args) && __builtin_constant_p ("255.255.255.255") && (__s1_len = strlen (*args), __s2_len = strlen ("255.255.255.255"), (!((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) || __s1_len >= 4) && (!((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) || __s2_len >= 4)) ? __builtin_strcmp (*args, "255.255.255.255") : (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) && (__s1_len = strlen (*args), __s1_len < 4) ? (__builtin_constant_p ("255.255.255.255") && ((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) ? __builtin_strcmp (*args, "255.255.255.255") : (__extension__ ({ __const unsigned char *__s2 = (__const unsigned char *) (__const char *) ("255.255.255.255"); register int __result = (((__const unsigned char *) (__const char *) (*args))[0] - __s2[0]); if (__s1_len > 0 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[1] - __s2[1]); if (__s1_len > 1 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[2] - __s2[2]); if (__s1_len > 2 && __result == 0) __result = (((__const unsigned char *) (__const char *) (*args))[3] - __s2[3]); } } __result; }))) : (__builtin_constant_p ("255.255.255.255") && ((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) && (__s2_len = strlen ("255.255.255.255"), __s2_len < 4) ? (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) ? __builtin_strcmp (*args, "255.255.255.255") : (__extension__ ({ __const unsigned char *__s1 = (__const unsigned char *) (__const char *) (*args); register int __result = __s1[0] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[0]; if (__s2_len > 0 && __result == 0) { __result = (__s1[1] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[1]); if (__s2_len > 1 && __result == 0) { __result = (__s1[2] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[2]); if (__s2_len > 2 && __result == 0) __result = (__s1[3] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[3]); } } __result; }))) : __builtin_strcmp (*args, "255.255.255.255")))); }) != 0) { ++ memcpy((char *) &req.arp_netmask, (char *) &sa, ++ sizeof(struct sockaddr)); ++ } ++ } ++ } ++} ++static int arp_file(char *name) ++{ ++ char buff[1024]; ++ char *sp, *args[32]; ++ int linenr, argc; ++ FILE *fp; ++ while (fgets(buff, sizeof(buff), fp) != (char *) ((void *)0)) { ++ if (arp_set(args) != 0) ++ fprintf(stderr, ("arp: cannot set entry on line %u on line %u of etherfile %s !\n"), ++ linenr, name); ++ } ++} ++int main(int argc, char **argv) ++{ ++ int i, lop, what; ++ switch (what) { ++ case 0: ++ what = arp_file(argv[optind] ? argv[optind] : "/etc/ethers"); ++ } ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/asm-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/asm-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/asm-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,15 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++typedef struct ++{ ++ int i; ++ int y; ++} __attribute__ ((aligned (16))) struct64_t; ++ ++void foo () ++{ ++ struct64_t tmp; ++ asm volatile ("ldr q0, %[value]" : : [value]"m"(tmp)); ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/asm-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vsqrt.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vsqrt.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vsqrt.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,66 @@ ++ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++#include "stdio.h" ++ ++extern void abort (void); ++ ++void ++test_square_root_v2sf () ++{ ++ float32x2_t val = {4.0f, 9.0f}; ++ float32x2_t res; ++ ++ res = vsqrt_f32 (val); ++ ++ if (vget_lane_f32 (res, 0) != 2.0f) ++ abort (); ++ if (vget_lane_f32 (res, 1) != 3.0f) ++ abort (); ++} ++ ++void ++test_square_root_v4sf () ++{ ++ float32x4_t val = {4.0f, 9.0f, 16.0f, 25.0f}; ++ float32x4_t res; ++ ++ res = vsqrtq_f32 (val); ++ ++ if (vgetq_lane_f32 (res, 0) != 2.0f) ++ abort (); ++ if (vgetq_lane_f32 (res, 1) != 3.0f) ++ abort (); ++ if (vgetq_lane_f32 (res, 2) != 4.0f) ++ abort (); ++ if (vgetq_lane_f32 (res, 3) != 5.0f) ++ abort (); ++} ++ ++void ++test_square_root_v2df () ++{ ++ float64x2_t val = {4.0, 9.0}; ++ float64x2_t res; ++ ++ res = vsqrtq_f64 (val); ++ ++ if (vgetq_lane_f64 (res, 0) != 2.0) ++ abort (); ++ ++ if (vgetq_lane_f64 (res, 1) != 3.0) ++ abort (); ++} ++ ++int ++main (void) ++{ ++ test_square_root_v2sf (); ++ test_square_root_v4sf (); ++ test_square_root_v2df (); ++ ++ return 0; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/vsqrt.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/volatile-bitfields-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++typedef struct { ++ volatile unsigned long a:8; ++ volatile unsigned long b:8; ++ volatile unsigned long c:16; ++} BitStruct; ++ ++BitStruct bits; ++ ++unsigned long foo () ++{ ++ return bits.b; ++} ++ ++/* { dg-final { scan-assembler "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/volatile-bitfields-2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,128 @@ ++/* { dg-options "-O2 -mcmodel=small -fPIC -fno-builtin" } */ ++/* { dg-do compile } */ ++ ++typedef long unsigned int size_t; ++enum ++{ ++ __LC_TIME = 2, ++}; ++enum ++{ ++ ABDAY_1 = (((__LC_TIME) << 16) | (0)), ++ DAY_1, ++ ABMON_1, ++ MON_1, ++ D_T_FMT, ++}; ++typedef struct __locale_struct ++{ ++ struct locale_data *__locales[13]; ++} *__locale_t; ++struct tm ++{ ++ int tm_sec; ++ int tm_min; ++ int tm_hour; ++}; ++struct locale_data ++{ ++ const char *name; ++ struct ++ { ++ const char *string; ++ } ++ values []; ++}; ++extern const struct locale_data _nl_C_LC_TIME __attribute__ ((visibility ("hidden"))); ++char * ++__strptime_internal (rp, fmt, tmp, statep , locale) ++ const char *rp; ++ const char *fmt; ++ __locale_t locale; ++ void *statep; ++{ ++ struct locale_data *const current = locale->__locales[__LC_TIME]; ++ const char *rp_backup; ++ const char *rp_longest; ++ int cnt; ++ size_t val; ++ enum ptime_locale_status { not, loc, raw } decided_longest; ++ struct __strptime_state ++ { ++ enum ptime_locale_status decided : 2; ++ } s; ++ struct tm tmb; ++ struct tm *tm; ++ if (statep == ((void *)0)) ++ { ++ memset (&s, 0, sizeof (s)); ++ } ++ { ++ tm = &tmb; ++ } ++ while (*fmt != '\0') ++ { ++ if (*fmt != '%') ++ { ++ if (*fmt++ != *rp++) return ((void *)0); ++ continue; ++ } ++ if (statep != ((void *)0)) ++ { ++ ++fmt; ++ } ++ rp_backup = rp; ++ switch (*fmt++) ++ { ++ case '%': ++ for (cnt = 0; cnt < 7; ++cnt) ++ { ++ const char *trp; ++ if (s.decided !=raw) ++ { ++ if (({ size_t len = strlen ((current->values[((int) (DAY_1 + cnt) & 0xffff)].string)); int result = __strncasecmp_l (((current->values[((int) (DAY_1 + cnt) & 0xffff)].string)), (trp), len, locale) == 0; if (result) (trp) += len; result; }) ++ && trp > rp_longest) ++ { ++ } ++ if (({ size_t len = strlen ((current->values[((int) (ABDAY_1 + cnt) & 0xffff)].string)); int result = __strncasecmp_l (((current->values[((int) (ABDAY_1 + cnt) & 0xffff)].string)), (trp), len, locale) == 0; if (result) (trp) += len; result; }) ++ && trp > rp_longest) ++ { ++ } ++ } ++ if (s.decided != loc ++ && (((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (DAY_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (DAY_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; })) ++ && trp > rp_longest) ++ || ((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (ABDAY_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (ABDAY_1) & 0xffff)].string)[cnt]), (rp), len, locale) == 0; if (result) (rp) += len; result; })) ++ && trp > rp_longest))) ++ { ++ } ++ } ++ { ++ const char *trp; ++ if (s.decided != loc ++ && (((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (MON_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (MON_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; })) ++ && trp > rp_longest) ++ || ((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (ABMON_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (ABMON_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; })) ++ && trp > rp_longest))) ++ { ++ } ++ } ++ case 'c': ++ { ++ if (!(*((current->values[((int) (D_T_FMT) & 0xffff)].string)) != '\0' && (rp = __strptime_internal (rp, ((current->values[((int) (D_T_FMT) & 0xffff)].string)), tm, &s , locale)) != ((void *)0))) ++ { ++ rp = rp_backup; ++ } ++ } ++ case 'C': ++ do { int __n = 2; val = 0; while (*rp == ' ') ++rp; if (*rp < '0' || *rp > '9') return ((void *)0); do { val *= 10; val += *rp++ - '0'; } while (--__n > 0 && val * 10 <= 99 && *rp >= '0' && *rp <= '9'); if (val < 0 || val > 99) return ((void *)0); } while (0); ++ case 'F': ++ if (!(*("%Y-%m-%d") != '\0' && (rp = __strptime_internal (rp, ("%Y-%m-%d"), tm, &s , locale)) != ((void *)0))) ++ tm->tm_hour = val % 12; ++ } ++ } ++} ++char * ++__strptime_l (buf, format, tm , locale) ++{ ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/adc-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/adc-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/adc-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++volatile unsigned int w0, w1, w2, w3, w4; ++volatile int result; ++ ++void test_si() { ++ /* { dg-final { scan-assembler "adc\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ w0 = w1 + w2 + (w3 >= w4); ++} ++ ++volatile unsigned long long int x0, x1, x2, x3, x4; ++ ++void test_di() { ++ /* { dg-final { scan-assembler "adc\tx\[0-9\]*, x\[0-9\]*, x\[0-9\]*\n" } } */ ++ x0 = x1 + x2 + (x3 >= x4); ++} ++ + +Property changes on: gcc/testsuite/gcc.target/aarch64/adc-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/mneg-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/mneg-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/mneg-2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int r; ++ ++void test (int a, int b) ++{ ++ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = a * (-b); ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/mneg-2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-compile.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-compile.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-compile.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,20 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "vect.x" ++ ++/* { dg-final { scan-assembler "orn\\tv" } } */ ++/* { dg-final { scan-assembler "bic\\tv" } } */ ++/* { dg-final { scan-assembler "mla\\tv" } } */ ++/* { dg-final { scan-assembler "mls\\tv" } } */ ++/* { dg-final { scan-assembler "smax\\tv" } } */ ++/* { dg-final { scan-assembler "smin\\tv" } } */ ++/* { dg-final { scan-assembler "umax\\tv" } } */ ++/* { dg-final { scan-assembler "umin\\tv" } } */ ++/* { dg-final { scan-assembler "umaxv" } } */ ++/* { dg-final { scan-assembler "uminv" } } */ ++/* { dg-final { scan-assembler "smaxv" } } */ ++/* { dg-final { scan-assembler "sminv" } } */ ++/* { dg-final { scan-assembler-times "addv" 2} } */ ++/* { dg-final { scan-assembler-times "addp" 2} } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect-compile.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,7 @@ ++/* { dg-error "unknown" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -mcpu=dummy" } */ ++ ++void f () ++{ ++ return; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-abs-compile.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-abs-compile.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-abs-compile.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,12 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#define N 16 ++ ++#include "vect-abs.x" ++ ++/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.16b" } } */ ++/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.8h" } } */ ++/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.2d" } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect-abs-compile.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,13 @@ ++ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "vect-fp.x" ++ ++/* { dg-final { scan-assembler "fadd\\tv" } } */ ++/* { dg-final { scan-assembler "fsub\\tv" } } */ ++/* { dg-final { scan-assembler "fmul\\tv" } } */ ++/* { dg-final { scan-assembler "fdiv\\tv" } } */ ++/* { dg-final { scan-assembler "fneg\\tv" } } */ ++/* { dg-final { scan-assembler "fabs\\tv" } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,7 @@ ++/* { dg-error "unknown" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -mcpu=example-1+dummy" } */ ++ ++void f () ++{ ++ return; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,16 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#define N 16 ++ ++#include "vect-mull.x" ++ ++DEF_MULL2 (DEF_MULLB) ++DEF_MULL2 (DEF_MULLH) ++DEF_MULL2 (DEF_MULLS) ++ ++/* { dg-final { scan-assembler-times "smull v" 3 } } */ ++/* { dg-final { scan-assembler-times "smull2 v" 3 } } */ ++/* { dg-final { scan-assembler-times "umull v" 3 } } */ ++/* { dg-final { scan-assembler-times "umull2 v" 3 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/fcvt_double_ulong.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_ulong.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_ulong.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF double ++#define SUFFIX(x) x ++#define GPI unsigned long ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtpu\tx\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtmu\tx\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtau\tx\[0-9\]+, *d\[0-9\]" 2 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/fcvt_double_ulong.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/mnegl-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/mnegl-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/mnegl-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,16 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++long long r; ++ ++void test_signed (int a, int b) ++{ ++ /* { dg-final { scan-assembler "smnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = (-((long long) a)) * ((long long) b); ++} ++ ++void test_unsigned (unsigned int a, unsigned int b) ++{ ++ /* { dg-final { scan-assembler "umnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = (-((long long) a)) * ((long long) b); ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/mnegl-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/clrsb.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/clrsb.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/clrsb.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int functest (unsigned int x) ++{ ++ return __builtin_clrsb (x); ++} ++ ++/* { dg-final { scan-assembler "cls\tw" } } */ +Index: gcc/testsuite/gcc.target/aarch64/index.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/index.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/index.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,111 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++/* { dg-final { scan-assembler-not "\[us\]xtw\t" } } */ ++/* { dg-final { scan-assembler-not "\[us\]bfiz\t" } } */ ++/* { dg-final { scan-assembler-not "lsl\t" } } */ ++ ++int ++load_scaled_sxtw (int *arr, int i) ++{ ++ return arr[arr[i]]; ++} ++ ++unsigned int ++load_scaled_uxtw (unsigned int *arr, unsigned int i) ++{ ++ return arr[arr[i]]; ++} ++ ++void ++store_scaled_sxtw (int *arr, int i) ++{ ++ arr[arr[i]] = 0; ++} ++ ++void ++store_scaled_uxtw (unsigned int *arr, unsigned int i) ++{ ++ arr[arr[i]] = 0; ++} ++ ++int ++load_unscaled_sxtw (signed char *arr, int i) ++{ ++ return arr[arr[i]]; ++} ++ ++unsigned int ++load_unscaled_uxtw (unsigned char *arr, unsigned int i) ++{ ++ return arr[arr[i]]; ++} ++ ++void ++store_unscaled_sxtw (signed char *arr, int i) ++{ ++ arr[arr[i]] = 0; ++} ++ ++void ++store_unscaled_uxtw (unsigned char *arr, unsigned int i) ++{ ++ arr[arr[i]] = 0; ++} ++ ++ ++ ++int ++load_scaled_tmp_sxtw (int *arr, int i) ++{ ++ int j = arr[i]; ++ return arr[j]; ++} ++ ++unsigned int ++load_scaled_tmp_uxtw (unsigned int *arr, unsigned int i) ++{ ++ unsigned int j = arr[i]; ++ return arr[j]; ++} ++ ++void ++store_scaled_tmp_sxtw (int *arr, int i) ++{ ++ int j = arr[i]; ++ arr[j] = 0; ++} ++ ++void ++store_scaled_tmp_uxtw (unsigned int *arr, unsigned int i) ++{ ++ unsigned int j = arr[i]; ++ arr[j] = 0; ++} ++ ++int ++load_unscaled_tmp_sxtw (signed char *arr, int i) ++{ ++ signed char j = arr[i]; ++ return arr[j]; ++} ++ ++unsigned int ++load_unscaled_tmp_uxtw (unsigned char *arr, unsigned int i) ++{ ++ unsigned char j = arr[i]; ++ return arr[j]; ++} ++ ++void ++store_unscaled_tmp_sxtw (signed char *arr, int i) ++{ ++ signed char j = arr[i]; ++ arr[j] = 0; ++} ++ ++void ++store_unscaled_tmp_uxtw (unsigned char *arr, unsigned int i) ++{ ++ unsigned char j = arr[i]; ++ arr[j] = 0; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/index.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin-compile.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin-compile.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin-compile.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,7 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O3 -ffast-math" } */ ++ ++#include "vect-fmax-fmin.x" ++ ++/* { dg-final { scan-assembler "fmaxnm\\tv" } } */ ++/* { dg-final { scan-assembler "fminnm\\tv" } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin-compile.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/arch-diagnostics-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/arch-diagnostics-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/arch-diagnostics-2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,7 @@ ++/* { dg-error "missing" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -march=+dummy" } */ ++ ++void f () ++{ ++ return; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/arch-diagnostics-2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv-compile.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv-compile.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv-compile.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,10 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3 -ffast-math" } */ ++ ++#include "vect-fmaxv-fminv.x" ++ ++/* { dg-final { scan-assembler "fminnmv" } } */ ++/* { dg-final { scan-assembler "fmaxnmv" } } */ ++/* { dg-final { scan-assembler "fminnmp" } } */ ++/* { dg-final { scan-assembler "fmaxnmp" } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv-compile.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vfp-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vfp-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vfp-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,109 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++extern float fabsf (float); ++extern float sqrtf (float); ++extern double fabs (double); ++extern double sqrt (double); ++ ++volatile float f1, f2, f3; ++volatile int cond1, cond2; ++ ++void test_sf() { ++ /* abssf2 */ ++ /* { dg-final { scan-assembler "fabs\ts\[0-9\]*" } } */ ++ f1 = fabsf (f1); ++ /* negsf2 */ ++ /* { dg-final { scan-assembler "fneg\ts\[0-9\]*" } } */ ++ f1 = -f1; ++ /* addsf3 */ ++ /* { dg-final { scan-assembler "fadd\ts\[0-9\]*" } } */ ++ f1 = f2 + f3; ++ /* subsf3 */ ++ /* { dg-final { scan-assembler "fsub\ts\[0-9\]*" } } */ ++ f1 = f2 - f3; ++ /* divsf3 */ ++ /* { dg-final { scan-assembler "fdiv\ts\[0-9\]*" } } */ ++ f1 = f2 / f3; ++ /* mulsf3 */ ++ /* { dg-final { scan-assembler "fmul\ts\[0-9\]*" } } */ ++ f1 = f2 * f3; ++ /* sqrtsf2 */ ++ /* { dg-final { scan-assembler "fsqrt\ts\[0-9\]*" } } */ ++ f1 = sqrtf (f1); ++ /* cmpsf */ ++ /* { dg-final { scan-assembler "fcmp\ts\[0-9\]*" } } */ ++ if (f1 < f2) ++ cond1 = 1; ++ else ++ cond2 = 1; ++} ++ ++volatile double d1, d2, d3; ++ ++void test_df() { ++ /* absdf2 */ ++ /* { dg-final { scan-assembler "fabs\td\[0-9\]*" } } */ ++ d1 = fabs (d1); ++ /* negdf2 */ ++ /* { dg-final { scan-assembler "fneg\td\[0-9\]*" } } */ ++ d1 = -d1; ++ /* adddf3 */ ++ /* { dg-final { scan-assembler "fadd\td\[0-9\]*" } } */ ++ d1 = d2 + d3; ++ /* subdf3 */ ++ /* { dg-final { scan-assembler "fsub\td\[0-9\]*" } } */ ++ d1 = d2 - d3; ++ /* divdf3 */ ++ /* { dg-final { scan-assembler "fdiv\td\[0-9\]*" } } */ ++ d1 = d2 / d3; ++ /* muldf3 */ ++ /* { dg-final { scan-assembler "fmul\td\[0-9\]*" } } */ ++ d1 = d2 * d3; ++ /* sqrtdf2 */ ++ /* { dg-final { scan-assembler "fsqrt\td\[0-9\]*" } } */ ++ d1 = sqrt (d1); ++ /* cmpdf */ ++ /* { dg-final { scan-assembler "fcmp\td\[0-9\]*" } } */ ++ if (d1 < d2) ++ cond1 = 1; ++ else ++ cond2 = 1; ++} ++ ++volatile int i1; ++volatile unsigned int u1; ++ ++void test_convert () { ++ /* extendsfdf2 */ ++ /* { dg-final { scan-assembler "fcvt\td\[0-9\]*" } } */ ++ d1 = f1; ++ /* truncdfsf2 */ ++ /* { dg-final { scan-assembler "fcvt\ts\[0-9\]*" } } */ ++ f1 = d1; ++ /* fixsfsi2 */ ++ /* { dg-final { scan-assembler "fcvtzs\tw\[0-9\], s\[0-9\]*" } } */ ++ i1 = f1; ++ /* fixdfsi2 */ ++ /* { dg-final { scan-assembler "fcvtzs\tw\[0-9\], d\[0-9\]*" } } */ ++ i1 = d1; ++ /* fixunsfsi2 */ ++ /* { dg-final { scan-assembler "fcvtzu\tw\[0-9\], s\[0-9\]*" } } */ ++ u1 = f1; ++ /* fixunsdfsi2 */ ++ /* { dg-final { scan-assembler "fcvtzu\tw\[0-9\], d\[0-9\]*" } } */ ++ u1 = d1; ++ /* floatsisf2 */ ++ /* { dg-final { scan-assembler "scvtf\ts\[0-9\]*" } } */ ++ f1 = i1; ++ /* floatsidf2 */ ++ /* { dg-final { scan-assembler "scvtf\td\[0-9\]*" } } */ ++ d1 = i1; ++ /* floatunssisf2 */ ++ /* { dg-final { scan-assembler "ucvtf\ts\[0-9\]*" } } */ ++ f1 = u1; ++ /* floatunssidf2 */ ++ /* { dg-final { scan-assembler "ucvtf\td\[0-9\]*" } } */ ++ d1 = u1; ++} ++ + +Property changes on: gcc/testsuite/gcc.target/aarch64/vfp-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/arg-type-diagnostics-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/arg-type-diagnostics-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/arg-type-diagnostics-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,15 @@ ++/* { dg-do compile { target { aarch64*-*-* } } } */ ++/* { dg-options "-O2" } */ ++ ++#include "arm_neon.h" ++ ++void foo () ++{ ++ int a; ++ int32x2_t arg1; ++ int32x2_t arg2; ++ int32x2_t result; ++ arg1 = vcreate_s32 (UINT64_C (0x0000ffffffffffff)); ++ arg2 = vcreate_s32 (UINT64_C (0x16497fffffffffff)); ++ result = __builtin_aarch64_srsra_nv2si (arg1, arg2, a); /* { dg-error "incompatible type for argument" } */ ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/arg-type-diagnostics-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,93 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "vect.x" ++ ++extern void abort (void); ++ ++void set_vector (int *a, int n) ++{ ++ int i; ++ for (i=0; i<16; i++) ++ a[i] = n; ++} ++ ++void check_vector (pRINT c, pRINT result, char *str) ++{ ++ int i; ++ for (i=0; i<16 ; i++) ++ if (c[i] != result[i]) ++ abort (); ++} ++ ++#define TEST(func, sign) set_vector (sign##c, 0); \ ++ func (sign##a, sign##b, sign##c); \ ++ check_vector (sign##c, func##_vector, #func); ++ ++ ++#define TESTV(func, sign) \ ++ if (func (sign##a) != func##_value) \ ++ abort (); ++ ++#define TESTVLL(func, sign) \ ++ if (func (ll##sign##a) != func##_value) \ ++ abort (); ++ ++int main (void) ++{ ++ int sa[16]; ++ int sb[16]; ++ int sc[16]; ++ unsigned int ua[16]; ++ unsigned int ub[16]; ++ unsigned int uc[16]; ++ long long llsa[16]; ++ unsigned long long llua[16]; ++ int i; ++ ++ /* Table of standard values to compare against. */ ++ unsigned int test_bic_vector[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; ++ unsigned int test_orn_vector[] = {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}; ++ int mla_vector[] = {0, 1, 4, 9, 16, 25, 36, 49, 64, 81, 100, 121, 144, 169, 196, 225}; ++ int mls_vector[] = {0, -1, -4, -9, -16, -25, -36, -49, -64, -81, -100, -121, -144, -169, -196, -225}; ++ int smax_vector[] = {0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15}; ++ int smin_vector[] = {0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15}; ++ unsigned int umax_vector[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; ++ unsigned int umin_vector[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; ++ int reduce_smax_value = 0; ++ int reduce_smin_value = -15; ++ unsigned int reduce_umax_value = 15; ++ unsigned int reduce_umin_value = 0; ++ unsigned int reduce_add_u32_value = 120; ++ int reduce_add_s32_value = -120; ++ long long reduce_add_s64_value = -120; ++ unsigned long long reduce_add_u64_value = 120; ++ ++ /* Set up input vectors. */ ++ for (i=0; i < 16; i++) ++ { ++ sa[i] = sb[i] = -i; ++ llsa[i] = (long long)-i; ++ ua[i] = ub[i] = i; ++ llua[i] = (unsigned long long)i; ++ } ++ ++ TEST (test_bic, s); ++ TEST (test_orn, s); ++ TEST (mla, s); ++ TEST (mls, s); ++ TEST (smax, s); ++ TEST (smin, s); ++ TEST (umax, u); ++ TEST (umin, u); ++ TESTV (reduce_smax, s); ++ TESTV (reduce_smin, s); ++ TESTV (reduce_umax, u); ++ TESTV (reduce_umin, u); ++ TESTV (reduce_add_u32, u); ++ TESTV (reduce_add_s32, s); ++ TESTVLL (reduce_add_u64, u); ++ TESTVLL (reduce_add_s64, s); ++ return 0; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-abs.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-abs.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-abs.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,131 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "limits.h" ++ ++extern void abort (void); ++ ++#define N 16 ++ ++#include "vect-abs.x" ++ ++#define SET_VEC(size, type) void set_vector_##size (pRINT##size a) \ ++ { \ ++ int i; \ ++ for (i=0; i> (32 - size)) - i); \ ++ c[i] = (type)((INT_MAX >> (32 - size)) - i * 2); \ ++ } \ ++ } ++ ++#define CHECK_VEC(size, sign) void check_vector_##sign##size (pR##sign##INT##size a, \ ++ pR##sign##INT##size b) \ ++ { \ ++ int i; \ ++ for (i=0; i. */ ++ ++#ifndef VALIDATE_MEMORY_H ++#define VALIDATE_MEMORY_H ++ ++enum structure_type ++{ ++ flat = 0, ++ i32in128, ++ f32in64, ++ i8in64, ++ i16in64, ++ i32in64, ++}; ++ ++/* Some explicit declarations as I can't include files outside the testsuite. ++ */ ++typedef long unsigned int size_t; ++int memcmp (void *, void *, size_t); ++ ++/* These two arrays contain element size and block size data for the enumeration ++ above. */ ++const int element_size[] = { 1, 4, 4, 1, 2, 4 }; ++const int block_reverse_size[] = { 1, 16, 8, 8, 8, 8 }; ++ ++int ++validate_memory (void *mem1, char *mem2, size_t size, enum structure_type type) ++{ ++ /* In big-endian mode, the data in mem2 will have been byte-reversed in ++ register sized groups, while the data in mem1 will have been byte-reversed ++ according to the true structure of the data. To compare them, we need to ++ compare chunks of data in reverse order. ++ ++ This is only implemented for homogeneous data layouts at the moment. For ++ hetrogeneous structures a custom compare case will need to be written. */ ++ ++ unsigned int i; ++ char *cmem1 = (char *) mem1; ++ switch (type) ++ { ++#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ++ case i8in64: ++ case i16in64: ++ case i32in64: ++ case f32in64: ++ case i32in128: ++ for (i = 0; i < size; i += element_size[type]) ++ { ++ if (memcmp (cmem1 + i, ++ mem2 + block_reverse_size[type] - i - element_size[type], ++ element_size[type])) ++ return 1; ++ } ++ return 0; ++ break; ++#endif ++ default: ++ break; ++ } ++ return memcmp (mem1, mem2, size); ++} ++ ++#endif /* VALIDATE_MEMORY_H. */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/validate_memory.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_17.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_17.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_17.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,37 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_17.c" ++ ++__complex__ x = 1.0+2.0i; ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++float f1 = 25.0; ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(double, 11.0, D0) ++ DOTS ++ ANON(struct z, a, D1) ++ ANON(struct z, b, STACK) ++ ANON(int , 5, W0) ++ ANON(double, f1, STACK+32) ++ LAST_ANON(double, 0.5, STACK+40) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_17.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,126 @@ ++/* Test AAPCS64 layout. ++ ++ Test the comformance to the alignment and padding requirements. ++ ++ B.4 If the argument type is a Composite Type then the size of the ++ argument is rounded up to the nearest multiple of 8 bytes. ++ C.4 If the argument is an HFA, a Quad-precision Floating-point or Short ++ Vector Type then the NSAA is rounded up to the larger of 8 or the ++ Natural Alignment of the argument's type. ++ C.12 The NSAA is rounded up to the larger of 8 or the Natural Alignment ++ of the argument's type. ++ C.14 If the size of the argument is less than 8 bytes then the size of ++ the argument is set ot 8 bytes. The effect is as if the argument ++ was copied to the least significant bits of a 64-bit register and ++ the remaining bits filled with unspecified values. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_align-1.c" ++#include "type-def.h" ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++}; ++ ++struct y v1 = { 1, 2, 3, 4 }; ++struct y v2 = { 5, 6, 7, 8 }; ++struct y v3 = { 9, 10, 11, 12 }; ++struct y v4 = { 13, 14, 15, 16 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++vf4_t c = { 13.f, 14.f, 15.f, 16.f }; ++ ++struct x ++{ ++ vf4_t v; ++} w; ++ ++char ch='a'; ++short sh=13; ++int i=14; ++long long ll=15; ++ ++struct s1 ++{ ++ short sh[3]; ++} s1; ++ ++struct s2 ++{ ++ int i[2]; ++ char c; ++} s2; ++ ++struct ldx2_t ++{ ++ long double ld[2]; ++} ldx2 = { 12345.67890L, 23456.78901L }; ++ ++union u_t ++{ ++ long double ld; ++ double d[2]; ++} u; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ w.v = (vf4_t){ 17.f, 18.f, 19.f, 20.f }; ++ s1.sh[0] = 16; ++ s1.sh[1] = 17; ++ s1.sh[2] = 18; ++ s2.i[0] = 19; ++ s2.i[1] = 20; ++ s2.c = 21; ++ u.ld = 34567.89012L; ++} ++ ++#include "abitest.h" ++#else ++ ++ ARG(struct y, v1, X0) ++ ARG(struct y, v2, X2) ++ ARG(struct y, v3, X4) ++ ARG(struct y, v4, X6) ++ ARG(struct z, a, D0) ++ ARG(struct z, b, D4) ++ ARG(double, 12.5, STACK) ++ ARG(vf4_t, c, STACK+16) /* [C.4] 16-byte aligned short vector */ ++ ARG(double, 17.0, STACK+32) ++ ARG(struct x, w, STACK+48) /* [C.12] 16-byte aligned small struct */ ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ ARG(char, ch, STACK+64) /* [C.14] char padded to the size of 8 bytes */ ++ ARG(short, sh, STACK+72) /* [C.14] short padded to the size of 8 bytes */ ++ ARG(int, i, STACK+80) /* [C.14] int padded to the size of 8 bytes */ ++#else ++ ARG(char, ch, STACK+71) ++ ARG(short, sh, STACK+78) ++ ARG(int, i, STACK+84) ++#endif ++ ARG(long long, ll, STACK+88) ++ ARG(struct s1, s1, STACK+96) /* [B.4] small struct padded to the size of 8 bytes */ ++ ARG(double, 18.0, STACK+104) ++ ARG(struct s2, s2, STACK+112) /* [B.4] small struct padded to the size of 16 bytes */ ++ ARG(double, 19.0, STACK+128) ++ ARG(long double, 30.0L, STACK+144) /* [C.4] 16-byte aligned quad-precision */ ++ ARG(double, 31.0, STACK+160) ++ ARG(struct ldx2_t, ldx2, STACK+176) /* [C.4] 16-byte aligned HFA */ ++ ARG(double, 32.0, STACK+208) ++ ARG(__int128, 33, STACK+224) /* [C.12] 16-byte aligned 128-bit integer */ ++ ARG(double, 34.0, STACK+240) ++ ARG(union u_t, u, STACK+256) /* [C.12] 16-byte aligned small composite (union in this case) */ ++ LAST_ARG_NONFLAT (int, 35.0, STACK+272, i32in64) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_18.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_18.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_18.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,34 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++ ++#define TESTFILE "test_18.c" ++ ++ ++struct y ++{ ++ long p; ++ long q; ++ long r; ++ long s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ PTR(struct y, v, X1) ++ ARG(struct z, a, D0) ++ ARG(double, 1.0, D4) ++ ARG(struct z, b, STACK) ++ LAST_ARG(double, 0.5, STACK+32) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_18.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,42 @@ ++/* Test AAPCS64 layout. ++ ++ C.8 If the argument has an alignment of 16 then the NGRN is rounded up ++ the next even number. ++ ++ The case of a small struture containing only one 16-byte aligned ++ quad-word integer is covered in this test. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_align-2.c" ++#include "type-def.h" ++ ++struct y ++{ ++ union int128_t v; ++} w; ++ ++struct x ++{ ++ long long p; ++ int q; ++} s = {0xDEADBEEFCAFEBABELL, 0xFEEBDAED}; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init signed quad-word integer. */ ++ w.v.l64 = 0xfdb9753102468aceLL; ++ w.v.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest.h" ++#else ++ ARG(int, 0xAB, W0) ++ ARG(struct y, w, X2) ++ ARG(int, 0xCD, W4) ++ ARG(struct x, s, X5) ++ LAST_ARG(int, 0xFF00FF00, W7) ++ ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_19.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_19.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_19.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,35 @@ ++/* Test AAPCS64 layout. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_19.c" ++ ++struct y ++{ ++ int p1; ++ int p2; ++ float q; ++ int r1; ++ int r2; ++ char x; ++} v = { -1, 1, 2.0f, 3, 18, 19, 20}; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ DOTS ++ ANON(double, 4.0, D0) ++ ANON(struct z, a, D1) ++ ANON(struct z, b, STACK) ++ PTR_ANON(struct y, v, X1) ++ LAST_ANON(int, 10, W2) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_19.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-3.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-3.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,46 @@ ++/* Test AAPCS64 layout. ++ ++ C.8 If the argument has an alignment of 16 then the NGRN is rounded up ++ the next even number. ++ C.9 If the argument is an Integral Type, the size of the argument is ++ equal to 16 and the NGRN is less than 7, the argument is copied ++ to x[NGRN] and x[NGRN+1]. x[NGRN] shall contain the lower addressed ++ double-word of the memory representation of the argument. The ++ NGRN is incremented by two. The argument has now been allocated. ++ ++ The case of passing a 128-bit integer in two general registers is covered ++ in this test. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_align-3.c" ++#include "type-def.h" ++ ++union int128_t qword; ++ ++int gInt[4]; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Initialize the quadword integer via the union. */ ++ qword.l64 = 0xDEADBEEFCAFEBABELL; ++ qword.h64 = 0x123456789ABCDEF0LL; ++ ++ gInt[0] = 12345; ++ gInt[1] = 23456; ++ gInt[2] = 34567; ++ gInt[3] = 45678; ++} ++ ++ ++#include "abitest.h" ++#else ++ ARG(int, gInt[0], W0) ++ ARG(int, gInt[1], W1) ++ ARG(int, gInt[2], W2) ++ ARG(__int128, qword.i, X4) ++ LAST_ARG(int, gInt[3], W6) ++ ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-3.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-4.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-4.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-4.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,42 @@ ++/* Test AAPCS64 layout. ++ ++ C.3 If the argument is an HFA then the NSRN is set to 8 and the size ++ of the argument is rounded up to the nearest multiple of 8 bytes. ++ ++ TODO: add the check of an HFA containing half-precision floating-point ++ when __f16 is supported in A64 GCC. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_align-4.c" ++ ++struct z1 ++{ ++ double x[4]; ++}; ++ ++struct z1 a = { 5.0, 6.0, 7.0, 8.0 }; ++ ++struct z2 ++{ ++ float x[3]; ++}; ++ ++struct z2 b = { 13.f, 14.f, 15.f }; ++struct z2 c = { 16.f, 17.f, 18.f }; ++ ++#include "abitest.h" ++#else ++ ++ ARG(struct z1, a, D0) ++ ARG(double, 9.0, D4) ++ ARG(double, 10.0, D5) ++ ARG(struct z2, b, STACK) /* [C.3] on stack and size padded to 16 bytes */ ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ ARG(float, 15.5f, STACK+16) /* [C.3] NSRN has been set to 8 */ ++#else ++ ARG(float, 15.5f, STACK+20) ++#endif ++ LAST_ARG(struct z2, c, STACK+24) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-4.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,50 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers fundamental data types as specified in AAPCS64 \S 4.1. ++ It is focus on unnamed parameter passed in registers. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-1.c" ++#include "type-def.h" ++ ++vf2_t vf2 = (vf2_t){ 17.f, 18.f }; ++vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead }; ++union int128_t qword; ++signed char sc = 0xed; ++signed int sc_promoted = 0xffffffed; ++signed short ss = 0xcba9; ++signed int ss_promoted = 0xffffcba9; ++float fp = 65432.12345f; ++double fp_promoted = (double)65432.12345f; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init signed quad-word integer. */ ++ qword.l64 = 0xfdb9753102468aceLL; ++ qword.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest.h" ++#else ++ ARG ( int , 0xff , X0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON_PROMOTED(unsigned char , 0xfe , unsigned int, 0xfe , X1, 1) ++ ANON_PROMOTED( signed char , sc , signed int, sc_promoted, X2, 2) ++ ANON_PROMOTED(unsigned short , 0xdcba, unsigned int, 0xdcba , X3, 3) ++ ANON_PROMOTED( signed short , ss , signed int, ss_promoted, X4, 4) ++ ANON (unsigned int , 0xdeadbeef, X5, 5) ++ ANON ( signed int , 0xcafebabe, X6, 6) ++ ANON (unsigned long long, 0xba98765432101234ULL, X7, 7) ++ ANON ( signed long long, 0xa987654321012345LL , STACK, 8) ++ ANON ( __int128, qword.i , STACK+16, 9) ++ ANON_PROMOTED( float , fp , double, fp_promoted, D0, 10) ++ ANON ( double , 9876543.212345, D1, 11) ++ ANON ( long double , 98765432123456789.987654321L, Q2, 12) ++ ANON ( vf2_t, vf2 , D3, 13) ++ ANON ( vi4_t, vi4 , Q4, 14) ++ LAST_ANON ( int , 0xeeee, STACK+32,15) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,59 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers fundamental data types as specified in AAPCS64 \S 4.1. ++ It is focus on unnamed parameter passed on stack. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-2.c" ++#include "type-def.h" ++ ++vf2_t vf2 = (vf2_t){ 17.f, 18.f }; ++vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead }; ++union int128_t qword; ++signed char sc = 0xed; ++signed int sc_promoted = 0xffffffed; ++signed short ss = 0xcba9; ++signed int ss_promoted = 0xffffcba9; ++float fp = 65432.12345f; ++double fp_promoted = (double)65432.12345f; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init signed quad-word integer. */ ++ qword.l64 = 0xfdb9753102468aceLL; ++ qword.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest.h" ++#else ++ ARG ( int , 0xff , X0, 0) ++ ARG ( float , 1.0f , S0, 1) ++ ARG ( float , 1.0f , S1, 2) ++ ARG ( float , 1.0f , S2, 3) ++ ARG ( float , 1.0f , S3, 4) ++ ARG ( float , 1.0f , S4, 5) ++ ARG ( float , 1.0f , S5, 6) ++ ARG ( float , 1.0f , S6, 7) ++ ARG ( float , 1.0f , S7, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON ( __int128, qword.i , X2, 8) ++ ANON ( signed long long, 0xa987654321012345LL , X4, 9) ++ ANON ( __int128, qword.i , X6, 10) ++ ANON_PROMOTED(unsigned char , 0xfe , unsigned int, 0xfe , STACK, 11) ++ ANON_PROMOTED( signed char , sc , signed int, sc_promoted, STACK+8, 12) ++ ANON_PROMOTED(unsigned short , 0xdcba, unsigned int, 0xdcba , STACK+16, 13) ++ ANON_PROMOTED( signed short , ss , signed int, ss_promoted, STACK+24, 14) ++ ANON (unsigned int , 0xdeadbeef, STACK+32, 15) ++ ANON ( signed int , 0xcafebabe, STACK+40, 16) ++ ANON (unsigned long long, 0xba98765432101234ULL, STACK+48, 17) ++ ANON_PROMOTED( float , fp , double, fp_promoted, STACK+56, 18) ++ ANON ( double , 9876543.212345, STACK+64, 19) ++ ANON ( long double , 98765432123456789.987654321L, STACK+80, 20) ++ ANON ( vf2_t, vf2 , STACK+96, 21) ++ ANON ( vi4_t, vi4 , STACK+112,22) ++ LAST_ANON ( int , 0xeeee, STACK+128,23) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-3.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-3.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,86 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers most composite types as described in AAPCS64 \S 4.3. ++ Homogeneous floating-point aggregate types are covered in other tests. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-3.c" ++#include "type-def.h" ++ ++struct x0 ++{ ++ char ch; ++ int i; ++} y0 = { 'a', 12345 }; ++ ++struct x1 ++{ ++ int a; ++ int b; ++ int c; ++ int d; ++} y1 = { 0xdeadbeef, 0xcafebabe, 0x87654321, 0xabcedf975 }; ++ ++struct x2 ++{ ++ long long a; ++ long long b; ++ char ch; ++} y2 = { 0x12, 0x34, 0x56 }; ++ ++union x3 ++{ ++ char ch; ++ int i; ++ long long ll; ++} y3; ++ ++union x4 ++{ ++ int i; ++ struct x2 y2; ++} y4; ++ ++struct x5 ++{ ++ union int128_t qword; ++} y5; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init small union. */ ++ y3.ll = 0xfedcba98LL; ++ ++ /* Init big union. */ ++ y4.y2.a = 0x78; ++ y4.y2.b = 0x89; ++ y4.y2.ch= 0x9a; ++ ++ /* Init signed quad-word integer. */ ++ y5.qword.l64 = 0xfdb9753102468aceLL; ++ y5.qword.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest.h" ++#else ++ ARG (float ,1.0f, S0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON (struct x0, y0, X0, 1) ++ ANON (struct x1, y1, X1, 2) ++ PTR_ANON (struct x2, y2, X3, 3) ++ ANON (union x3, y3, X4, 4) ++ PTR_ANON (union x4, y4, X5, 5) ++ ANON (struct x5, y5, X6, 6) ++ ANON (struct x0, y0, STACK, 7) ++ ANON (struct x1, y1, STACK+8, 8) ++ PTR_ANON (struct x2, y2, STACK+24, 9) ++ ANON (union x3, y3, STACK+32, 10) ++ PTR_ANON (union x4, y4, STACK+40, 11) ++ ANON (int , 1, STACK+48, 12) ++ ANON (struct x5, y5, STACK+64, 13) ++ LAST_ANON(int , 2, STACK+80, 14) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-3.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,31 @@ ++/* Test AAPCS64 layout */ ++ ++/* C.7 If the argument is an Integral Type, the size of the argument is ++ less than or equal to 8 bytes and the NGRN is less than 8, the ++ argument is copied to the least significant bits in x[NGRN]. The ++ NGRN is incremented by one. The argument has now been allocated. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_1.c" ++/* TODO: review if we need this */ ++#define RUNTIME_ENDIANNESS_CHECK ++#include "abitest.h" ++#else ++ ARG(int, 4, W0) ++ ARG(double, 4.0, D0) ++ ARG(int, 3, W1) ++ /* TODO: review the way of memcpy char, short, etc. */ ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ ARG(char, 0xEF, X2) ++ ARG(short, 0xBEEF, X3) ++ ARG(int, 0xDEADBEEF, X4) ++#else ++ /* TODO: need the model/qemu to be big-endian as well */ ++ ARG(char, 0xEF, X2+7) ++ ARG(short, 0xBEEF, X3+6) ++ ARG(int, 0xDEADBEEF, X4+4) ++#endif ++ LAST_ARG(long long, 0xDEADBEEFCAFEBABELL, X5) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,101 @@ ++/* This header file should be included for the purpose of function return ++ value testing. */ ++ ++#include "abitest-common.h" ++#include "validate_memory.h" ++ ++void (*testfunc_ptr)(char* stack); ++ ++/* Helper macros to generate function name. Example of the function name: ++ func_return_val_1. */ ++#define FUNC_BASE_NAME func_return_val_ ++#define FUNC_NAME_COMBINE(base,suffix) base ## suffix ++#define FUNC_NAME_1(base,suffix) FUNC_NAME_COMBINE(base,suffix) ++#define FUNC_NAME(suffix) FUNC_NAME_1(FUNC_BASE_NAME,suffix) ++#define TEST_FUNC_BASE_NAME testfunc_ ++#define TEST_FUNC_NAME(suffix) FUNC_NAME_1(TEST_FUNC_BASE_NAME,suffix) ++ ++#undef DUMP_STATUS ++#ifdef DUMP_ENABLED ++#define DUMP_STATUS(type,val) printf ("### Checking "#type" "#val"\n"); ++#else ++#define DUMP_STATUS(type,val) ++#endif ++ ++/* Generate code to do memcmp to check if the returned value is in the ++ correct location and has the expected value. ++ Note that for value that is returned in the caller-allocated memory ++ block, we get the address from the saved x8 register. x8 is saved ++ just after the callee is returned; we assume that x8 has not been ++ clobbered at then, although there is no requirement for the callee ++ preserve the value stored in x8. Luckily, all test cases here are ++ simple enough that x8 doesn't normally get clobbered (although not ++ guaranteed). */ ++#undef FUNC_VAL_CHECK ++#define FUNC_VAL_CHECK(id, type, val, offset, layout) \ ++void TEST_FUNC_NAME(id)(char* stack) \ ++{ \ ++ type __x = val; \ ++ char* addr; \ ++ DUMP_STATUS(type,val) \ ++ if (offset != X8) \ ++ addr = stack + offset; \ ++ else \ ++ addr = *(char **)(stack + X8); \ ++ if (validate_memory (&__x, addr, sizeof (type), layout) != 0) \ ++ abort(); \ ++} ++ ++/* Composite larger than 16 bytes is replaced by a pointer to a copy prepared ++ by the caller, so here we extrat the pointer, deref it and compare the ++ content with that of the original one. */ ++#define PTR(type, val, offset, ...) { \ ++ type * ptr; \ ++ DUMP_ARG(type,val) \ ++ ptr = *(type **)(stack + offset); \ ++ if (memcmp (ptr, &val, sizeof (type)) != 0) abort (); \ ++} ++ ++#include TESTFILE ++ ++MYFUNCTYPE myfunc () PCSATTR; ++ ++/* Define the function to return VAL of type TYPE. I and D in the ++ parameter list are two dummy parameters to help improve the detection ++ of bugs like a short vector being returned in X0 after copied from V0. */ ++#undef FUNC_VAL_CHECK ++#define FUNC_VAL_CHECK(id, type, var, offset, layout) \ ++__attribute__ ((noinline)) type FUNC_NAME (id) (int i, double d, type t) \ ++ { \ ++ asm (""::"r" (i),"r" (d)); /* asm prevents function from getting \ ++ optimized away. Using i and d prevents \ ++ warnings about unused parameters. \ ++ */ \ ++ return t; \ ++ } ++#include TESTFILE ++ ++ ++/* Call the function to return value and call the checking function ++ to validate. See the comment above for the reason of having 0 and 0.0 ++ in the function argument list. */ ++#undef FUNC_VAL_CHECK ++#define FUNC_VAL_CHECK(id, type, var, offset, layout) \ ++ { \ ++ testfunc_ptr = TEST_FUNC_NAME(id); \ ++ FUNC_NAME(id) (0, 0.0, var); \ ++ myfunc (); \ ++ } ++ ++int main() ++{ ++ which_kind_of_test = TK_RETURN; ++ ++#ifdef HAS_DATA_INIT_FUNC ++ init_data (); ++#endif ++ ++#include TESTFILE ++ ++ return 0; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.h +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.h (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,159 @@ ++/* This header file should be included for the purpose of parameter passing ++ testing and va_arg code gen testing. ++ ++ To test va_arg code gen, #define AAPCS64_TEST_STDARG in the test case. ++ ++ The parameter passing test is done by passing variables/constants to ++ 'myfunc', which pushes its incoming arguments to a memory block on the ++ stack and then passes the memory block address to 'testfunc'. It is inside ++ 'testfunc' that the real parameter passing check is carried out. ++ ++ The function body of 'myfunc' is in abitest.S. The declaration of 'myfunc' ++ is constructed during the pre-processing stage. ++ ++ The va_arg code gen test has a similar workflow, apart from an extra set-up ++ step before calling 'myfunc'. All arguments are passed to 'stdarg_func' ++ first, which assigned these arguments to its local variables via either ++ direct assignment or va_arg macro, depending on whether an argument is named ++ or not. Afterwards, 'stdarg_func' calls 'myfunc' with the aforementioned ++ local variables as the arguments to finish the remaining steps. */ ++ ++#include "abitest-common.h" ++#include "validate_memory.h" ++ ++#ifdef AAPCS64_TEST_STDARG ++/* Generate va_start (ap, last_named_arg). Note that this requires ++ LAST_NAMED_ARG_ID to be defined/used correctly in the test file. */ ++#ifndef LAST_NAMED_ARG_ID ++#define LAST_NAMED_ARG_ID 65535 ++#endif ++#ifndef VA_START ++#undef VA_START_1 ++#define VA_START_1(ap, id) va_start (ap, _f##id); ++#define VA_START(ap, id) VA_START_1 (ap, id); ++#endif ++#endif /* AAPCS64_TEST_STDARG */ ++ ++/* Some debugging facility. */ ++#undef DUMP_ARG ++#ifdef DUMP_ENABLED ++#define DUMP_ARG(type,val) printf ("### Checking ARG "#type" "#val"\n") ++#else ++#define DUMP_ARG(type,val) ++#endif ++ ++ ++/* Function called from myfunc (defined in abitest.S) to check the arguments ++ passed to myfunc. myfunc has pushed all the arguments into the memory ++ block pointed by STACK. */ ++void testfunc(char* stack) ++{ ++#define AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++ return; ++} ++ ++ ++#ifndef AAPCS64_TEST_STDARG ++/* Test parameter passing. */ ++ ++/* Function declaration of myfunc. */ ++MYFUNCTYPE myfunc( ++#define AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++) PCSATTR; ++ ++#else /* AAPCS64_TEST_STDARG */ ++/* Test stdarg macros, e.g. va_arg. */ ++#include ++ ++/* Dummy function to help reset parameter passing registers, i.e. X0-X7 ++ and V0-V7 (by being passed 0 in W0-W7 and 0.f in S0-S7). */ ++__attribute__ ((noinline)) void ++dummy_func (int w0, int w1, int w2, int w3, int w4, int w5, int w6, int w7, ++ float s0, float s1, float s2, float s3, float s4, float s5, ++ float s6, float s7) ++{ ++ asm (""); /* Prevent function from getting optimized away */ ++ return; ++} ++ ++/* Function declaration of myfunc. */ ++MYFUNCTYPE myfunc( ++#define AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++) PCSATTR; ++ ++/* Function definition of stdarg_func. ++ stdarg_func is a variadic function; it retrieves all of its arguments, ++ both named and unnamed, and passes them to myfunc in the identical ++ order. myfunc will carry out the check on the passed values. Remember ++ that myfunc is not a variadic function. */ ++MYFUNCTYPE stdarg_func( ++#define AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++) PCSATTR ++{ ++ /* Start of the function body of stdarg_func. */ ++ va_list ap; ++ ++ VA_START (ap, LAST_NAMED_ARG_ID) ++ /* Zeroize the content of X0-X7 and V0-V7 to make sure that any va_arg ++ failure will not be hidden by the old data being in these registers. */ ++ dummy_func (0, 0, 0, 0, 0, 0, 0, 0, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f); ++ /* A full memory barrier to ensure that compiler won't optimize away ++ va_arg code gen. */ ++ __sync_synchronize (); ++ { ++ /* Assign all the function incoming arguments to local variables. */ ++#define AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++ ++ /* Call myfunc and pass in the local variables prepared above. */ ++ myfunc ( ++#define AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++); ++ } ++ va_end (ap); ++} ++ ++#endif /* AAPCS64_TEST_STDARG */ ++ ++ ++int main() ++{ ++#ifdef RUNTIME_ENDIANNESS_CHECK ++ rt_endian_check(); ++#endif ++#ifdef HAS_DATA_INIT_FUNC ++ init_data (); ++#endif ++ ++#ifndef AAPCS64_TEST_STDARG ++ which_kind_of_test = TK_PARAM; ++ myfunc( ++#else ++ which_kind_of_test = TK_VA_ARG; ++ stdarg_func( ++#endif ++#define AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++); ++ return 0; ++} ++ + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,16 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_2.c" ++#include "abitest.h" ++ ++#else ++ ARG(float, 1.0f, S0) ++ ARG(double, 4.0, D1) ++ ARG(float, 2.0f, S2) ++ ARG(double, 5.0, D3) ++ LAST_ARG(int, 3, W0) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,93 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers homogeneous floating-point aggregate types and homogeneous ++ short-vector aggregate types as described in AAPCS64 \S 4.3.5. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-4.c" ++#include "type-def.h" ++ ++struct hfa_fx1_t hfa_fx1 = {12.345f}; ++struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f}; ++struct hfa_dx2_t hfa_dx2 = {234.567, 345.678}; ++struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456}; ++struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012}; ++struct non_hfa_fx5_t non_hfa_fx5 = {456.789f, 567.890f, 678.901f, 789.012f, 890.123f}; ++struct hfa_ffs_t hfa_ffs; ++struct non_hfa_ffs_t non_hfa_ffs; ++struct non_hfa_ffs_2_t non_hfa_ffs_2; ++struct hva_vf2x1_t hva_vf2x1; ++struct hva_vf2x2_t hva_vf2x2; ++struct hva_vi4x1_t hva_vi4x1; ++struct non_hfa_ffd_t non_hfa_ffd = {23.f, 24.f, 25.0}; ++struct non_hfa_ii_t non_hfa_ii = {26, 27}; ++struct non_hfa_c_t non_hfa_c = {28}; ++struct non_hfa_ffvf2_t non_hfa_ffvf2; ++struct non_hfa_fffd_t non_hfa_fffd = {33.f, 34.f, 35.f, 36.0}; ++union hfa_union_t hfa_union; ++union non_hfa_union_t non_hfa_union; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ hva_vf2x1.a = (vf2_t){17.f, 18.f}; ++ hva_vf2x2.a = (vf2_t){19.f, 20.f}; ++ hva_vf2x2.b = (vf2_t){21.f, 22.f}; ++ hva_vi4x1.a = (vi4_t){19, 20, 21, 22}; ++ ++ non_hfa_ffvf2.a = 29.f; ++ non_hfa_ffvf2.b = 30.f; ++ non_hfa_ffvf2.c = (vf2_t){31.f, 32.f}; ++ ++ hfa_union.s.a = 37.f; ++ hfa_union.s.b = 38.f; ++ hfa_union.c = 39.f; ++ ++ non_hfa_union.a = 40.0; ++ non_hfa_union.b = 41.f; ++ ++ hfa_ffs.a = 42.f; ++ hfa_ffs.b = 43.f; ++ hfa_ffs.c.a = 44.f; ++ hfa_ffs.c.b = 45.f; ++ ++ non_hfa_ffs.a = 46.f; ++ non_hfa_ffs.b = 47.f; ++ non_hfa_ffs.c.a = 48.0; ++ non_hfa_ffs.c.b = 49.0; ++ ++ non_hfa_ffs_2.s.a = 50; ++ non_hfa_ffs_2.s.b = 51; ++ non_hfa_ffs_2.c = 52.f; ++ non_hfa_ffs_2.d = 53.f; ++} ++ ++#include "abitest.h" ++#else ++ ARG (int , 1, X0, LAST_NAMED_ARG_ID) ++ DOTS ++ /* HFA or HVA passed in fp/simd registers or on stack. */ ++ ANON (struct hfa_fx1_t , hfa_fx1 , S0 , 0) ++ ANON (struct hfa_fx2_t , hfa_fx2 , S1 , 1) ++ ANON (struct hfa_dx2_t , hfa_dx2 , D3 , 2) ++ ANON (struct hva_vf2x1_t, hva_vf2x1, D5 , 11) ++ ANON (struct hva_vi4x1_t, hva_vi4x1, Q6 , 12) ++ ANON (struct hfa_dx4_t , hfa_dx4 , STACK , 3) ++ ANON (struct hfa_ffs_t , hfa_ffs , STACK+32, 4) ++ ANON (union hfa_union_t, hfa_union, STACK+48, 5) ++ ANON (struct hfa_ldx3_t , hfa_ldx3 , STACK+64, 6) ++ /* Non-H[FV]A passed in general registers or on stack or via reference. */ ++ PTR_ANON (struct non_hfa_fx5_t , non_hfa_fx5 , X1 , 10) ++ ANON (struct non_hfa_ffd_t , non_hfa_ffd , X2 , 13) ++ ANON (struct non_hfa_ii_t , non_hfa_ii , X4 , 14) ++ ANON (struct non_hfa_c_t , non_hfa_c , X5 , 15) ++ ANON (struct non_hfa_ffvf2_t, non_hfa_ffvf2, X6 , 16) ++ PTR_ANON (struct non_hfa_fffd_t , non_hfa_fffd , STACK+112, 17) ++ PTR_ANON (struct non_hfa_ffs_t , non_hfa_ffs , STACK+120, 18) ++ ANON (struct non_hfa_ffs_2_t, non_hfa_ffs_2, STACK+128, 19) ++ ANON (union non_hfa_union_t, non_hfa_union, STACK+144, 20) ++ LAST_ANON(int , 2 , STACK+152, 30) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_3.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_3.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,18 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_3.c" ++ ++__complex__ x = 1.0+2.0i; ++ ++#include "abitest.h" ++#else ++ARG (float, 1.0f, S0) ++ARG (__complex__ double, x, D1) ++ARG (float, 2.0f, S3) ++ARG (double, 5.0, D4) ++LAST_ARG_NONFLAT (int, 3, X0, i32in64) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_3.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,47 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test is focus on certain unnamed homogeneous floating-point aggregate ++ types passed in fp/simd registers. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-5.c" ++#include "type-def.h" ++ ++struct hfa_fx1_t hfa_fx1 = {12.345f}; ++struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f}; ++struct hfa_dx2_t hfa_dx2 = {234.567, 345.678}; ++struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456}; ++struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012}; ++struct hfa_ffs_t hfa_ffs; ++union hfa_union_t hfa_union; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ hfa_union.s.a = 37.f; ++ hfa_union.s.b = 38.f; ++ hfa_union.c = 39.f; ++ ++ hfa_ffs.a = 42.f; ++ hfa_ffs.b = 43.f; ++ hfa_ffs.c.a = 44.f; ++ hfa_ffs.c.b = 45.f; ++} ++ ++#include "abitest.h" ++#else ++ ARG (int, 1, X0, LAST_NAMED_ARG_ID) ++ DOTS ++ /* HFA passed in fp/simd registers or on stack. */ ++ ANON (struct hfa_dx4_t , hfa_dx4 , D0 , 0) ++ ANON (struct hfa_ldx3_t , hfa_ldx3 , Q4 , 1) ++ ANON (struct hfa_ffs_t , hfa_ffs , STACK , 2) ++ ANON (union hfa_union_t, hfa_union, STACK+16, 3) ++ ANON (struct hfa_fx1_t , hfa_fx1 , STACK+24, 4) ++ ANON (struct hfa_fx2_t , hfa_fx2 , STACK+32, 5) ++ ANON (struct hfa_dx2_t , hfa_dx2 , STACK+40, 6) ++ LAST_ANON(double , 1.0 , STACK+56, 7) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/macro-def.h +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/macro-def.h (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/macro-def.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,286 @@ ++/* This header file defines a set of macros to be used in the construction ++ of parameter passing and/or va_arg code gen tests during the ++ pre-processing stage. It is included inside abitest.h. ++ ++ The following macros are defined here: ++ ++ LAST_ARG ++ ARG ++ DOTS ++ ANON ++ LAST_ANON ++ PTR ++ PTR_ANON ++ LAST_ANONPTR ++ ++ These macros are given different definitions depending on which one of ++ the following macros is defined. ++ ++ AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++ AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++ AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++ AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++ AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++ ++ Do not define more than one of the above macros. */ ++ ++ ++/* AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++ Define macros to check the incoming arguments. */ ++ ++#ifdef AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate memcmp to check if the incoming args have the expected values. */ ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) \ ++{ \ ++ type __x = val; \ ++ DUMP_ARG(type,val); \ ++ if (validate_memory (&__x, stack + offset, sizeof (type), layout) != 0) \ ++ abort(); \ ++} ++#define LAST_ARG(type,val,offset,...) LAST_ARG_NONFLAT (type, val, offset, \ ++ flat,__VA_ARGS__) ++#define ARG_NONFLAT(type,val,offset,layout,...) LAST_ARG_NONFLAT (type, val, \ ++ offset, \ ++ layout, \ ++ __VA_ARGS__) ++#define ARG(type,val,offset,...) LAST_ARG_NONFLAT(type, val, offset, \ ++ flat, __VA_ARGS__) ++#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ ANON(type_promoted, val_promoted, offset, __VA_ARGS__) ++/* Composite larger than 16 bytes is replaced by a pointer to a copy prepared ++ by the caller, so here we extrat the pointer, deref it and compare the ++ content with that of the original one. */ ++#define PTR(type, val, offset, ...) { \ ++ type * ptr; \ ++ DUMP_ARG(type,val); \ ++ ptr = *(type **)(stack + offset); \ ++ if (memcmp (ptr, &val, sizeof (type)) != 0) abort (); \ ++} ++#define PTR_ANON(type, val, offset, ...) PTR(type, val, offset, __VA_ARGS__) ++#define LAST_ANONPTR(type, val, offset, ...) PTR(type, val, offset, __VA_ARGS__) ++#define DOTS ++ ++#endif /* AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS */ ++ ++ ++/* AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ Define macros to generate parameter type list. */ ++ ++#ifdef AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++ ++/* Generate parameter type list (without identifiers). */ ++#define LAST_ARG(type,val,offset) type ++#define LAST_ARG_NONFLAT(type, val, offset, layout) type ++#define ARG(type,val,offset) LAST_ARG(type, val, offset), ++#define ARG_NONFLAT(type, val, offset, layout) LAST_ARG (type, val, offset), ++#define DOTS ... ++#define ANON(type,val, offset) ++#define LAST_ANON(type,val, offset) ++#define PTR(type, val, offset) LAST_ARG(type, val, offset), ++#define PTR_ANON(type, val, offset) ++#define LAST_ANONPTR(type, val, offset) ++ ++#endif /* AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST */ ++ ++ ++/* AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++ Define macros to generate argument list. */ ++ ++#ifdef AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate the argument list; use VAL as the argument name. */ ++#define LAST_ARG(type,val,offset,...) val ++#define LAST_ARG_NONFLAT(type,val,offset,layout,...) val ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define ARG_NONFLAT(type, val, offset, layout,...) LAST_ARG (type, val, \ ++ offset, \ ++ __VA_ARGS__), ++#define DOTS ++#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR_ANON(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ LAST_ARG(type, val, offset, __VA_ARGS__), ++ ++#endif /* AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST */ ++ ++ ++/* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ Define variadic macros to generate parameter type list. */ ++ ++#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate parameter type list (without identifiers). */ ++#define LAST_ARG(type,val,offset,...) type ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) type ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define ARG_NONFLAT(type, val, offset, layout, ...) LAST_ARG (type, val, \ ++ offset, \ ++ __VA_ARGS__), ++#define DOTS ++#define ANON(type,val, offset,...) ARG(type,val,offset, __VA_ARGS__) ++#define LAST_ANON(type,val, offset,...) LAST_ARG(type,val, offset, __VA_ARGS__) ++#define PTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR_ANON(type, val, offset,...) PTR(type, val, offset, __VA_ARGS__) ++#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ LAST_ARG(type_promoted, val_promoted, offset, __VA_ARGS__), ++ ++#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST */ ++ ++ ++/* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++ Define variadic macros to generate parameter type list with ++ identifiers. */ ++ ++#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate parameter type list (with identifiers). ++ The identifiers are named with prefix _f and suffix of the value of ++ __VA_ARGS__. */ ++#define LAST_ARG(type,val,offset,...) type _f##__VA_ARGS__ ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) type _f##__VA_ARGS__ ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define ARG_NONFLAT(type, val, offset, layout, ...) LAST_ARG (type, val, \ ++ offset, \ ++ __VA_ARGS__), ++#define DOTS ... ++#define ANON(type,val, offset,...) ++#define LAST_ANON(type,val, offset,...) ++#define PTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR_ANON(type, val, offset,...) ++#define LAST_ANONPTR(type, val, offset,...) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) ++ ++#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT */ ++ ++ ++/* AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++ Define variadic macros to generate assignment from the function ++ incoming arguments to local variables. */ ++ ++#ifdef AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate assignment statements. For named args, direct assignment from ++ the formal parameter is generated; for unnamed args, va_arg is used. ++ The names of the local variables start with _x and end with the value of ++ __VA_ARGS__. */ ++#define LAST_ARG(type,val,offset,...) type _x##__VA_ARGS__ = _f##__VA_ARGS__; ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) \ ++ type _x##__VA_ARGS__ = _f##__VA_ARGS__; ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ARG_NONFLAT(type,val,offset,layout,...) \ ++ LAST_ARG (type, val, offset, __VA_ARGS__) ++#define ANON(type,val,offset,...) type _x##__VA_ARGS__ = va_arg (ap, type); ++#define LAST_ANON(type,val,offset,...) ANON(type, val, offset, __VA_ARGS__) ++#define PTR(type, val,offset,...) ARG(type, val, offset, __VA_ARGS__) ++#define PTR_ANON(type, val, offset,...) ANON(type, val,offset, __VA_ARGS__) ++#define LAST_ANONPTR(type, val, offset,...) ANON(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ ANON(type_promoted, val_promoted, offset, __VA_ARGS__) ++ ++#define DOTS ++ ++#endif /* AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS */ ++ ++ ++/* AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++ Define variadic macros to generate argument list using the variables ++ generated during AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS. */ ++ ++#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate the argument list; the names start with _x and end with the value of ++ __VA_ARGS__. All arguments (named or unnamed) in stdarg_func are passed to ++ myfunc as named arguments. */ ++#define LAST_ARG(type,val,offset,...) _x##__VA_ARGS__ ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) _x##__VA_ARGS__ ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define ARG_NONFLAT(type, val, offset, layout, ...) \ ++ LAST_ARG_NONFLAT (type, val, offset, layout, __VA_ARGS__), ++#define DOTS ++#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR_ANON(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ ANON(type_promoted, val_promoted, offset, __VA_ARGS__) ++ ++#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/macro-def.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_4.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_4.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_4.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,20 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target arm*-*-eabi* } } */ ++/* { dg-require-effective-target arm_hard_vfp_ok } */ ++/* { dg-require-effective-target arm32 } */ ++/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_4.c" ++ ++__complex__ float x = 1.0f + 2.0fi; ++#include "abitest.h" ++#else ++ARG (float, 1.0f, S0) ++ARG (__complex__ float, x, S1) ++ARG (float, 2.0f, S3) ++ARG (double, 5.0, D4) ++LAST_ARG_NONFLAT (int, 3, X0, i32in64) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_4.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-6.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-6.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-6.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,40 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test is focus on certain unnamed homogeneous floating-point aggregate ++ types passed in fp/simd registers. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-6.c" ++#include "type-def.h" ++ ++struct hfa_fx1_t hfa_fx1 = {12.345f}; ++struct hfa_dx2_t hfa_dx2 = {234.567, 345.678}; ++struct hfa_ffs_t hfa_ffs; ++union hfa_union_t hfa_union; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ hfa_union.s.a = 37.f; ++ hfa_union.s.b = 38.f; ++ hfa_union.c = 39.f; ++ ++ hfa_ffs.a = 42.f; ++ hfa_ffs.b = 43.f; ++ hfa_ffs.c.a = 44.f; ++ hfa_ffs.c.b = 45.f; ++} ++ ++#include "abitest.h" ++#else ++ ARG (int, 1, X0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON (struct hfa_ffs_t , hfa_ffs , S0 , 0) ++ ANON (union hfa_union_t, hfa_union, S4 , 1) ++ ANON (struct hfa_dx2_t , hfa_dx2 , D6 , 2) ++ ANON (struct hfa_fx1_t , hfa_fx1 , STACK , 3) ++ LAST_ANON(double , 1.0 , STACK+8, 4) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-6.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_5.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_5.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_5.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,24 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_5.c" ++ ++__complex__ float x = 1.0+2.0i; ++ ++struct y ++{ ++ long p; ++ long q; ++} v = { 1, 2}; ++ ++#include "abitest.h" ++#else ++ ARG(float, 1.0f, S0) ++ ARG(__complex__ float, x, S1) ++ ARG(float, 2.0f, S3) ++ ARG(double, 5.0, D4) ++ LAST_ARG(struct y, v, X0) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_5.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-7.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-7.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-7.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,31 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers complex types. Complex floating-point types are treated ++ as homogeneous floating-point aggregates, while complex integral types ++ are treated as general composite types. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-7.c" ++#include "type-def.h" ++ ++_Complex __int128 complex_qword = 567890 + 678901i; ++ ++#include "abitest.h" ++#else ++ ARG (int, 1, X0, LAST_NAMED_ARG_ID) ++ DOTS ++ /* Complex floating-point types are passed in fp/simd registers. */ ++ ANON (_Complex float , 12.3f + 23.4fi , S0, 0) ++ ANON (_Complex double , 34.56 + 45.67i , D2, 1) ++ ANON (_Complex long double, 56789.01234L + 67890.12345Li, Q4, 2) ++ ++ /* Complex integral types are passed in general registers or via reference. */ ++ ANON (_Complex short , (short)12345 + (short)23456i, X1, 10) ++ ANON (_Complex int , 34567 + 45678i , X2, 11) ++ PTR_ANON (_Complex __int128 , complex_qword , X3, 12) ++ ++ LAST_ANON(int , 1 , X4, 20) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-7.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_6.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_6.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_6.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,26 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_6.c" ++ ++__complex__ double x = 1.0+2.0i; ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++#include "abitest.h" ++#else ++ ARG(struct y, v, X0) ++ ARG(float, 1.0f, S0) ++ ARG(__complex__ double, x, D1) ++ ARG(float, 2.0f, S3) ++ ARG(double, 5.0, D4) ++ LAST_ARG(int, 3, W2) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_6.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-8.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-8.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-8.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,25 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ Miscellaneous test: HFA anonymous parameter passed in SIMD/FP regs. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-8.c" ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 0xdeadbeef, W0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON(double, 4.0, D0, 1) ++ LAST_ANON(struct z, a, D1, 2) ++ ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-8.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_7.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_7.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_7.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,30 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_7.c" ++ ++__complex__ float x = 1.0f + 2.0i; ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }, v1 = {5, 6, 7, 8}, v2 = {9, 10, 11, 12}; ++ ++#include "abitest.h" ++#else ++ARG (struct y, v, X0) ++ARG (struct y, v1, X2) ++ARG (struct y, v2, X4) ++ARG (int, 4, W6) ++ARG (float, 1.0f, S0) ++ARG (__complex__ float, x, S1) ++ARG (float, 2.0f, S3) ++ARG (double, 5.0, D4) ++ARG (int, 3, W7) ++LAST_ARG_NONFLAT (int, 5, STACK, i32in64) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_7.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-9.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-9.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-9.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,31 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ Miscellaneous test: HFA anonymous parameter passed in SIMD/FP regs. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-9.c" ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++double d1 = 25.0; ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(double, 11.0, D0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON(int, 8, W0, 1) ++ ANON(struct z, a, D1, 2) ++ ANON(struct z, b, STACK, 3) ++ ANON(int, 5, W1, 4) ++ ANON(double, d1, STACK+32, 5) ++ LAST_ANON(double, 0.5, STACK+40, 6) ++ ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-9.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_8.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_8.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_8.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,24 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_8.c" ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(struct z, a, D0) ++ ARG(struct z, b, D4) ++ ARG(double, 0.5, STACK) ++ ARG(int, 7, W0) ++ LAST_ARG(int, 8, W1) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_8.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_complex.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_complex.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_complex.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,18 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_complex.c" ++ ++__complex__ float x = 1.0+2.0i; ++__complex__ int y = 5 + 6i; ++__complex__ double z = 2.0 + 3.0i; ++ ++#include "abitest.h" ++#else ++ ARG(__complex__ float, x, S0) ++ ARG(__complex__ int, y, X0) ++ ARG(__complex__ double, z, D2) ++ LAST_ARG (int, 5, W1) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_complex.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_9.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_9.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_9.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,32 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_9.c" ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ ARG(struct y, v, X1) ++ ARG(struct z, a, D0) ++ ARG(struct z, b, D4) ++ LAST_ARG(double, 0.5, STACK) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_9.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,67 @@ ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . */ ++ ++load_lib c-torture.exp ++load_lib target-supports.exp ++load_lib torture-options.exp ++ ++if { ![istarget aarch64*-*-*] } then { ++ return ++} ++ ++torture-init ++set-torture-options $C_TORTURE_OPTIONS ++set additional_flags "-W -Wall -Wno-abi" ++ ++# Test parameter passing. ++foreach src [lsort [glob -nocomplain $srcdir/$subdir/test_*.c]] { ++ if {[runtest_file_p $runtests $src]} { ++ c-torture-execute [list $src \ ++ $srcdir/$subdir/abitest.S] \ ++ $additional_flags ++ } ++} ++ ++# Test unnamed argument retrieval via the va_arg macro. ++foreach src [lsort [glob -nocomplain $srcdir/$subdir/va_arg-*.c]] { ++ if {[runtest_file_p $runtests $src]} { ++ c-torture-execute [list $src \ ++ $srcdir/$subdir/abitest.S] \ ++ $additional_flags ++ } ++} ++ ++# Test function return value. ++foreach src [lsort [glob -nocomplain $srcdir/$subdir/func-ret-*.c]] { ++ if {[runtest_file_p $runtests $src]} { ++ c-torture-execute [list $src \ ++ $srcdir/$subdir/abitest.S] \ ++ $additional_flags ++ } ++} ++ ++# Test no internal compiler errors. ++foreach src [lsort [glob -nocomplain $srcdir/$subdir/ice_*.c]] { ++ if {[runtest_file_p $runtests $src]} { ++ c-torture [list $src] \ ++ $additional_flags ++ } ++} ++ ++torture-finish +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_20.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_20.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_20.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,22 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_20.c" ++ ++#include "abitest.h" ++ ++#else ++ ARG(int, 8, W0) ++ ARG(double, 1.0, D0) ++ ARG(double, 2.0, D1) ++ ARG(double, 3.0, D2) ++ ARG(double, 4.0, D3) ++ ARG(double, 5.0, D4) ++ ARG(double, 6.0, D5) ++ ARG(double, 7.0, D6) ++ DOTS ++ ANON(_Complex double, 1234.0 + 567.0i, STACK) ++ LAST_ANON(double, -987.0, STACK+16) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_20.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_21.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_21.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_21.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,21 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_21.c" ++ ++#include "abitest.h" ++ ++#else ++ ARG(int, 8, W0) ++ ARG(double, 1.0, D0) ++ ARG(double, 2.0, D1) ++ ARG(double, 3.0, D2) ++ ARG(double, 4.0, D3) ++ ARG(double, 5.0, D4) ++ ARG(double, 6.0, D5) ++ ARG(double, 7.0, D6) ++ ARG(_Complex double, 1234.0 + 567.0i, STACK) ++ LAST_ARG(double, -987.0, STACK+16) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_21.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,44 @@ ++/* Test AAPCS64 function result return. ++ ++ This test covers most fundamental data types as specified in ++ AAPCS64 \S 4.1. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-additional-sources "abitest.S" } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "func-ret-1.c" ++#include "type-def.h" ++ ++vf2_t vf2 = (vf2_t){ 17.f, 18.f }; ++vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead }; ++union int128_t qword; ++ ++int *int_ptr = (int *)0xabcdef0123456789ULL; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init signed quad-word integer. */ ++ qword.l64 = 0xfdb9753102468aceLL; ++ qword.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest-2.h" ++#else ++FUNC_VAL_CHECK (0, unsigned char , 0xfe , X0, i8in64) ++FUNC_VAL_CHECK (1, signed char , 0xed , X0, i8in64) ++FUNC_VAL_CHECK (2, unsigned short, 0xdcba , X0, i16in64) ++FUNC_VAL_CHECK (3, signed short, 0xcba9 , X0, i16in64) ++FUNC_VAL_CHECK (4, unsigned int , 0xdeadbeef, X0, i32in64) ++FUNC_VAL_CHECK (5, signed int , 0xcafebabe, X0, i32in64) ++FUNC_VAL_CHECK (6, unsigned long long, 0xba98765432101234ULL, X0, flat) ++FUNC_VAL_CHECK (7, signed long long, 0xa987654321012345LL, X0, flat) ++FUNC_VAL_CHECK (8, __int128, qword.i, X0, flat) ++FUNC_VAL_CHECK (9, float, 65432.12345f, S0, flat) ++FUNC_VAL_CHECK (10, double, 9876543.212345, D0, flat) ++FUNC_VAL_CHECK (11, long double, 98765432123456789.987654321L, Q0, flat) ++FUNC_VAL_CHECK (12, vf2_t, vf2, D0, f32in64) ++FUNC_VAL_CHECK (13, vi4_t, vi4, Q0, i32in128) ++FUNC_VAL_CHECK (14, int *, int_ptr, X0, flat) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_22.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_22.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_22.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,19 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_22.c" ++ ++struct y ++{ ++ float p; ++ float q; ++} v = { 345.0f, 678.0f }; ++ ++#include "abitest.h" ++#else ++ ARG(float, 123.0f, S0) ++ ARG(struct y, v, S1) ++ LAST_ARG(float, 901.0f, S3) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_22.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,71 @@ ++/* Test AAPCS64 function result return. ++ ++ This test covers most composite types as described in AAPCS64 \S 4.3. ++ Homogeneous floating-point aggregate types are covered in func-ret-3.c. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-additional-sources "abitest.S" } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "func-ret-2.c" ++ ++struct x0 ++{ ++ char ch; ++ int i; ++} ys0 = { 'a', 12345 }; ++ ++struct x1 ++{ ++ int a; ++ unsigned int b; ++ unsigned int c; ++ unsigned int d; ++} ys1 = { 0xdeadbeef, 0xcafebabe, 0x87654321, 0xbcedf975 }; ++ ++struct x2 ++{ ++ long long a; ++ long long b; ++ char ch; ++} y2 = { 0x12, 0x34, 0x56 }; ++ ++union x3 ++{ ++ char ch; ++ int i; ++ long long ll; ++} y3; ++ ++union x4 ++{ ++ int i; ++ struct x2 y2; ++} y4; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init small union. */ ++ y3.ll = 0xfedcba98LL; ++ ++ /* Init big union. */ ++ y4.y2.a = 0x78; ++ y4.y2.b = 0x89; ++ y4.y2.ch= 0x9a; ++} ++ ++ ++#include "abitest-2.h" ++#else ++ /* Composite smaller than or equal to 16 bytes returned in X0 and X1. */ ++FUNC_VAL_CHECK ( 0, struct x0, ys0, X0, flat) ++FUNC_VAL_CHECK ( 1, struct x1, ys1, X0, flat) ++FUNC_VAL_CHECK ( 2, union x3, y3, X0, flat) ++ ++ /* Composite larger than 16 bytes returned in the caller-reserved memory ++ block of which the address is passed as an additional argument to the ++ function in X8. */ ++FUNC_VAL_CHECK (10, struct x2, y2, X8, flat) ++FUNC_VAL_CHECK (11, union x4, y4, X8, flat) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,157 @@ ++/* This header file defines some types that are used in the AAPCS64 tests. */ ++ ++ ++/* 64-bit vector of 2 floats. */ ++typedef float vf2_t __attribute__((vector_size (8))); ++ ++/* 128-bit vector of 4 floats. */ ++typedef float vf4_t __attribute__((vector_size (16))); ++ ++/* 128-bit vector of 4 ints. */ ++typedef int vi4_t __attribute__((vector_size (16))); ++ ++/* signed quad-word (in an union for the convenience of initialization). */ ++union int128_t ++{ ++ __int128 i; ++ struct ++ { ++ signed long long l64; ++ signed long long h64; ++ }; ++}; ++ ++/* Homogeneous floating-point composite types. */ ++ ++struct hfa_fx1_t ++{ ++ float a; ++}; ++ ++struct hfa_fx2_t ++{ ++ float a; ++ float b; ++}; ++ ++struct hfa_dx2_t ++{ ++ double a; ++ double b; ++}; ++ ++struct hfa_dx4_t ++{ ++ double a; ++ double b; ++ double c; ++ double d; ++}; ++ ++struct hfa_ldx3_t ++{ ++ long double a; ++ long double b; ++ long double c; ++}; ++ ++struct hfa_ffs_t ++{ ++ float a; ++ float b; ++ struct hfa_fx2_t c; ++}; ++ ++union hfa_union_t ++{ ++ struct ++ { ++ float a; ++ float b; ++ } s; ++ float c; ++}; ++ ++/* Non homogeneous floating-point-composite types. */ ++ ++struct non_hfa_fx5_t ++{ ++ float a; ++ float b; ++ float c; ++ float d; ++ float e; ++}; ++ ++struct non_hfa_ffs_t ++{ ++ float a; ++ float b; ++ struct hfa_dx2_t c; ++}; ++ ++struct non_hfa_ffs_2_t ++{ ++ struct ++ { ++ int a; ++ int b; ++ } s; ++ float c; ++ float d; ++}; ++ ++struct hva_vf2x1_t ++{ ++ vf2_t a; ++}; ++ ++struct hva_vf2x2_t ++{ ++ vf2_t a; ++ vf2_t b; ++}; ++ ++struct hva_vi4x1_t ++{ ++ vi4_t a; ++}; ++ ++struct non_hfa_ffd_t ++{ ++ float a; ++ float b; ++ double c; ++}; ++ ++struct non_hfa_ii_t ++{ ++ int a; ++ int b; ++}; ++ ++struct non_hfa_c_t ++{ ++ char a; ++}; ++ ++struct non_hfa_ffvf2_t ++{ ++ float a; ++ float b; ++ vf2_t c; ++}; ++ ++struct non_hfa_fffd_t ++{ ++ float a; ++ float b; ++ float c; ++ double d; ++}; ++ ++union non_hfa_union_t ++{ ++ double a; ++ float b; ++}; + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_23.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_23.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_23.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,42 @@ ++/* Test AAPCS64 layout. ++ ++ Larger than machine-supported vector size. The behaviour is unspecified by ++ the AAPCS64 document; the implementation opts for pass by reference. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_23.c" ++ ++typedef char A __attribute__ ((vector_size (64))); ++ ++struct y ++{ ++ double df[8]; ++}; ++ ++union u ++{ ++ struct y x; ++ A a; ++} u; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ u.x.df[0] = 1.0; ++ u.x.df[1] = 2.0; ++ u.x.df[2] = 3.0; ++ u.x.df[3] = 4.0; ++ u.x.df[4] = 5.0; ++ u.x.df[5] = 6.0; ++ u.x.df[6] = 7.0; ++ u.x.df[7] = 8.0; ++} ++ ++#include "abitest.h" ++#else ++ARG (float, 123.0f, S0) ++PTR (A, u.a, X0) ++LAST_ARG_NONFLAT (int, 0xdeadbeef, X1, i32in64) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_23.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,93 @@ ++/* Test AAPCS64 function result return. ++ ++ This test covers homogeneous floating-point aggregate types as described ++ in AAPCS64 \S 4.3.5. */ ++ ++/* { dg-do run { target aarch64-*-* } } */ ++/* { dg-additional-sources "abitest.S" } */ ++/* { dg-require-effective-target aarch64_big_endian } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "func-ret-3.c" ++#include "type-def.h" ++ ++struct hfa_fx1_t hfa_fx1 = {12.345f}; ++struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f}; ++struct hfa_dx2_t hfa_dx2 = {234.567, 345.678}; ++struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456}; ++struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012}; ++struct non_hfa_fx5_t non_hfa_fx5 = {456.789f, 567.890f, 678.901f, 789.012f, 890.123f}; ++struct hfa_ffs_t hfa_ffs; ++struct non_hfa_ffs_t non_hfa_ffs; ++struct non_hfa_ffs_2_t non_hfa_ffs_2; ++struct hva_vf2x1_t hva_vf2x1; ++struct hva_vi4x1_t hva_vi4x1; ++struct non_hfa_ffd_t non_hfa_ffd = {23.f, 24.f, 25.0}; ++struct non_hfa_ii_t non_hfa_ii = {26, 27}; ++struct non_hfa_c_t non_hfa_c = {28}; ++struct non_hfa_ffvf2_t non_hfa_ffvf2; ++struct non_hfa_fffd_t non_hfa_fffd = {33.f, 34.f, 35.f, 36.0}; ++union hfa_union_t hfa_union; ++union non_hfa_union_t non_hfa_union; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ hva_vf2x1.a = (vf2_t){17.f, 18.f}; ++ hva_vi4x1.a = (vi4_t){19, 20, 21, 22}; ++ ++ non_hfa_ffvf2.a = 29.f; ++ non_hfa_ffvf2.b = 30.f; ++ non_hfa_ffvf2.c = (vf2_t){31.f, 32.f}; ++ ++ hfa_union.s.a = 37.f; ++ hfa_union.s.b = 38.f; ++ hfa_union.c = 39.f; ++ ++ non_hfa_union.a = 40.0; ++ non_hfa_union.b = 41.f; ++ ++ hfa_ffs.a = 42.f; ++ hfa_ffs.b = 43.f; ++ hfa_ffs.c.a = 44.f; ++ hfa_ffs.c.b = 45.f; ++ ++ non_hfa_ffs.a = 46.f; ++ non_hfa_ffs.b = 47.f; ++ non_hfa_ffs.c.a = 48.0; ++ non_hfa_ffs.c.b = 49.0; ++ ++ non_hfa_ffs_2.s.a = 50; ++ non_hfa_ffs_2.s.b = 51; ++ non_hfa_ffs_2.c = 52.f; ++ non_hfa_ffs_2.d = 53.f; ++} ++ ++#include "abitest-2.h" ++#else ++ /* HFA returned in fp/simd registers. */ ++ ++FUNC_VAL_CHECK ( 0, struct hfa_fx1_t , hfa_fx1 , S0, flat) ++FUNC_VAL_CHECK ( 1, struct hfa_fx2_t , hfa_fx2 , S0, flat) ++FUNC_VAL_CHECK ( 2, struct hfa_dx2_t , hfa_dx2 , D0, flat) ++ ++FUNC_VAL_CHECK ( 3, struct hfa_dx4_t , hfa_dx4 , D0, flat) ++FUNC_VAL_CHECK ( 4, struct hfa_ldx3_t, hfa_ldx3 , Q0, flat) ++FUNC_VAL_CHECK ( 5, struct hfa_ffs_t , hfa_ffs , S0, flat) ++FUNC_VAL_CHECK ( 6, union hfa_union_t, hfa_union, S0, flat) ++ ++FUNC_VAL_CHECK ( 7, struct hva_vf2x1_t, hva_vf2x1, D0, flat) ++FUNC_VAL_CHECK ( 8, struct hva_vi4x1_t, hva_vi4x1, Q0, flat) ++ ++ /* Non-HFA returned in general registers or via a pointer in X8. */ ++FUNC_VAL_CHECK (10, struct non_hfa_fx5_t , non_hfa_fx5 , X8, flat) ++FUNC_VAL_CHECK (13, struct non_hfa_ffd_t , non_hfa_ffd , X0, flat) ++FUNC_VAL_CHECK (14, struct non_hfa_ii_t , non_hfa_ii , X0, flat) ++FUNC_VAL_CHECK (15, struct non_hfa_c_t , non_hfa_c , X0, flat) ++FUNC_VAL_CHECK (16, struct non_hfa_ffvf2_t, non_hfa_ffvf2, X0, flat) ++FUNC_VAL_CHECK (17, struct non_hfa_fffd_t , non_hfa_fffd , X8, flat) ++FUNC_VAL_CHECK (18, struct non_hfa_ffs_t , non_hfa_ffs , X8, flat) ++FUNC_VAL_CHECK (19, struct non_hfa_ffs_2_t, non_hfa_ffs_2, X0, flat) ++FUNC_VAL_CHECK (20, union non_hfa_union_t, non_hfa_union, X0, flat) ++ ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_quad_double.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_quad_double.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_quad_double.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,26 @@ ++/* Test AAPCS64 layout. ++ ++ Test parameter passing of floating-point quad precision types. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_quad_double.c" ++ ++typedef long double TFtype; ++typedef _Complex long double CTFtype; ++ ++TFtype x = 1.0; ++TFtype y = 2.0; ++ ++CTFtype cx = 3.0 + 4.0i; ++CTFtype cy = 5.0 + 6.0i; ++ ++#include "abitest.h" ++#else ++ ARG ( TFtype, x, Q0) ++ ARG (CTFtype, cx, Q1) ++ DOTS ++ ANON (CTFtype, cy, Q3) ++ LAST_ANON ( TFtype, y, Q5) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_quad_double.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_24.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_24.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_24.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,22 @@ ++/* Test AAPCS64 layout. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_24.c" ++ ++typedef long double TFtype; ++ ++#include "abitest.h" ++#else ++ ARG(TFtype, 1.0, Q0) ++ ARG(TFtype, 2.0, Q1) ++ ARG(TFtype, 3.0, Q2) ++ ARG(TFtype, 4.0, Q3) ++ ARG(TFtype, 5.0, Q4) ++ ARG(TFtype, 6.0, Q5) ++ ARG(TFtype, 7.0, Q6) ++ ARG(TFtype, 8.0, Q7) ++ ARG(double, 9.0, STACK) ++ LAST_ARG(TFtype, 10.0, STACK+16) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_24.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,27 @@ ++/* Test AAPCS64 function result return. ++ ++ This test covers complex types. Complex floating-point types are treated ++ as homogeneous floating-point aggregates, while complex integral types ++ are treated as general composite types. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-additional-sources "abitest.S" } */ ++/* { dg-require-effective-target aarch64_big_endian } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "func-ret-4.c" ++ ++#include "abitest-2.h" ++#else ++ /* Complex floating-point types are passed in fp/simd registers. */ ++FUNC_VAL_CHECK ( 0, _Complex float , 12.3f + 23.4fi, S0, flat) ++FUNC_VAL_CHECK ( 1, _Complex double, 34.56 + 45.67i, D0, flat) ++FUNC_VAL_CHECK ( 2, _Complex long double, 56789.01234 + 67890.12345i, Q0, flat) ++ ++ /* Complex integral types are passed in general registers or via a pointer in ++ X8. */ ++FUNC_VAL_CHECK (10, _Complex short , 12345 + 23456i, X0, flat) ++FUNC_VAL_CHECK (11, _Complex int , 34567 + 45678i, X0, flat) ++FUNC_VAL_CHECK (12, _Complex __int128, 567890 + 678901i, X8, flat) ++ ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_25.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_25.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_25.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,61 @@ ++/* Test AAPCS64 layout ++ ++ Test homogeneous floating-point aggregates and homogeneous short-vector ++ aggregates, which should be passed in SIMD/FP registers or via the ++ stack. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_25.c" ++ ++typedef float vf2_t __attribute__((vector_size (8))); ++struct x0 ++{ ++ vf2_t v; ++} s0; ++struct x3 ++{ ++ vf2_t v[2]; ++} s3; ++struct x4 ++{ ++ vf2_t v[3]; ++} s4; ++ ++typedef float vf4_t __attribute__((vector_size(16))); ++struct x1 ++{ ++ vf4_t v; ++} s1; ++ ++struct x2 ++{ ++ double df[3]; ++} s2; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ s0.v = (vf2_t){ 17.f, 18.f }; ++ s1.v = (vf4_t){ 567.890f, 678.901f, 789.012f, 890.123f }; ++ s2.df[0] = 123.456; ++ s2.df[1] = 234.567; ++ s2.df[2] = 345.678; ++ s3.v[0] = (vf2_t){ 19.f, 20.f, 21.f, 22.f }; ++ s3.v[1] = (vf2_t){ 23.f, 24.f, 25.f, 26.f }; ++ s4.v[0] = (vf2_t){ 27.f, 28.f, 29.f, 30.f }; ++ s4.v[1] = (vf2_t){ 31.f, 32.f, 33.f, 34.f }; ++ s4.v[2] = (vf2_t){ 35.f, 36.f, 37.f, 38.f }; ++} ++ ++#include "abitest.h" ++#else ++ARG_NONFLAT (struct x0, s0, Q0, f32in64) ++ARG (struct x2, s2, D1) ++ARG (struct x1, s1, Q4) ++ARG (struct x3, s3, D5) ++ARG (struct x4, s4, STACK) ++ARG_NONFLAT (int, 0xdeadbeef, X0, i32in64) ++LAST_ARG (double, 456.789, STACK+24) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_25.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,139 @@ ++#undef __AAPCS64_BIG_ENDIAN__ ++#ifdef __GNUC__ ++#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ++#define __AAPCS64_BIG_ENDIAN__ ++#endif ++#else ++#error unknown compiler ++#endif ++ ++#define IN_FRAMEWORK ++ ++#define D0 0 ++#define D1 8 ++#define D2 16 ++#define D3 24 ++#define D4 32 ++#define D5 40 ++#define D6 48 ++#define D7 56 ++ ++#define S0 64 ++#define S1 68 ++#define S2 72 ++#define S3 76 ++#define S4 80 ++#define S5 84 ++#define S6 88 ++#define S7 92 ++ ++#define W0 96 ++#define W1 100 ++#define W2 104 ++#define W3 108 ++#define W4 112 ++#define W5 116 ++#define W6 120 ++#define W7 124 ++ ++#define X0 128 ++#define X1 136 ++#define X2 144 ++#define X3 152 ++#define X4 160 ++#define X5 168 ++#define X6 176 ++#define X7 184 ++ ++#define Q0 192 ++#define Q1 208 ++#define Q2 224 ++#define Q3 240 ++#define Q4 256 ++#define Q5 272 ++#define Q6 288 ++#define Q7 304 ++ ++#define X8 320 ++#define X9 328 ++ ++#define STACK 336 ++ ++/* The type of test. 'myfunc' in abitest.S needs to know which kind of ++ test it is running to decide what to do at the runtime. Keep the ++ related code in abitest.S synchronized if anything is changed here. */ ++enum aapcs64_test_kind ++{ ++ TK_PARAM = 0, /* Test parameter passing. */ ++ TK_VA_ARG, /* Test va_arg code generation. */ ++ TK_RETURN /* Test function return value. */ ++}; ++ ++int which_kind_of_test; ++ ++extern int printf (const char*, ...); ++extern void abort (void); ++extern void dumpregs () __asm("myfunc"); ++ ++#ifndef MYFUNCTYPE ++#define MYFUNCTYPE void ++#endif ++ ++#ifndef PCSATTR ++#define PCSATTR ++#endif ++ ++ ++#ifdef RUNTIME_ENDIANNESS_CHECK ++#ifndef RUNTIME_ENDIANNESS_CHECK_FUNCTION_DEFINED ++/* This helper funtion defined to detect whether there is any incompatibility ++ issue on endianness between compilation time and run-time environments. ++ TODO: review the implementation when the work of big-endian support in A64 ++ GCC starts. ++ */ ++static void rt_endian_check () ++{ ++ const char* msg_endian[2] = {"little-endian", "big-endian"}; ++ const char* msg_env[2] = {"compile-time", "run-time"}; ++ union ++ { ++ unsigned int ui; ++ unsigned char ch[4]; ++ } u; ++ int flag = -1; ++ ++ u.ui = 0xCAFEBABE; ++ ++ printf ("u.ui=0x%X, u.ch[0]=0x%X\n", u.ui, u.ch[0]); ++ ++ if (u.ch[0] == 0xBE) ++ { ++ /* Little-Endian at run-time */ ++#ifdef __AAPCS64_BIG_ENDIAN__ ++ /* Big-Endian at compile-time */ ++ flag = 1; ++#endif ++ } ++ else ++ { ++ /* Big-Endian at run-time */ ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ /* Little-Endian at compile-time */ ++ flag = 0; ++#endif ++ } ++ ++ if (flag != -1) ++ { ++ /* Endianness conflict exists */ ++ printf ("Error: endianness conflicts between %s and %s:\n\ ++\t%s: %s\n\t%s: %s\n", msg_env[0], msg_env[1], msg_env[0], msg_endian[flag], ++ msg_env[1], msg_endian[1-flag]); ++ abort (); ++ } ++ ++ return; ++} ++#endif ++#define RUNTIME_ENDIANNESS_CHECK_FUNCTION_DEFINED ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_26.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_26.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_26.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,54 @@ ++/* Test AAPCS64 layout. ++ ++ Test some small structures that should be passed in GPRs. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_26.c" ++ ++struct y0 ++{ ++ char ch; ++} c0 = { 'A' }; ++ ++struct y2 ++{ ++ long long ll[2]; ++} c2 = { 0xDEADBEEF, 0xCAFEBABE }; ++ ++struct y3 ++{ ++ int i[3]; ++} c3 = { 56789, 67890, 78901 }; ++ ++typedef float vf2_t __attribute__((vector_size (8))); ++struct x0 ++{ ++ vf2_t v; ++} s0; ++ ++typedef short vh4_t __attribute__((vector_size (8))); ++ ++struct x1 ++{ ++ vh4_t v[2]; ++} s1; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ s0.v = (vf2_t){ 17.f, 18.f }; ++ s1.v[0] = (vh4_t){ 345, 456, 567, 678 }; ++ s1.v[1] = (vh4_t){ 789, 890, 901, 123 }; ++} ++ ++#include "abitest.h" ++#else ++ARG (struct y0, c0, X0) ++ARG (struct y2, c2, X1) ++ARG (struct y3, c3, X3) ++ARG_NONFLAT (struct x0, s0, D0, f32in64) ++ARG (struct x1, s1, D1) ++LAST_ARG_NONFLAT (int, 89012, X5, i32in64) ++#endif + +Property changes on: gcc/testsuite/gcc.target/aarch64/aapcs64/test_26.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,105 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 -ffast-math" } */ ++ ++extern void abort (void); ++ ++#include "vect-fmax-fmin.x" ++ ++#include "vect-fmaxv-fminv.x" ++ ++#define DEFN_SETV(type) \ ++ set_vector_##type (pR##type a, type n) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ a[i] = n; \ ++ } ++ ++#define DEFN_CHECKV(type) \ ++ void check_vector_##type (pR##type a, pR##type vec) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ if (a[i] != vec[i]) \ ++ abort (); \ ++ } ++ ++#define TEST2(fname, type) \ ++ set_vector_##type (c##type, 0.0); \ ++ fname##_##type (a##type, b##type); \ ++ check_vector_##type (c##type, fname##_##type##_vector); ++ ++#define TEST3(fname, type) \ ++ set_vector_##type (c##type, 0.0); \ ++ fname##_##type (a##type, b##type, c##type); \ ++ check_vector_##type (c##type, fname##_##type##_vector); ++ ++#define TEST(fname, N) \ ++ TEST##N (fname, F32); \ ++ TEST##N (fname, F64); ++ ++typedef float F32; ++typedef double F64; ++ ++DEFN_SETV (F32) ++DEFN_SETV (F64) ++ ++DEFN_CHECKV (F32) ++DEFN_CHECKV (F64) ++ ++int main (void) ++{ ++ ++ F32 aF32[16]; ++ F32 bF32[16]; ++ F32 cF32[16]; ++ ++ F64 aF64[16]; ++ F64 bF64[16]; ++ F64 cF64[16]; ++ int i; ++ ++ /* Golden vectors. */ ++ F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, ++ 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0 }; ++ ++ F64 max_F64_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, ++ 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0 }; ++ ++ F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, ++ 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0 }; ++ ++ F64 min_F64_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, ++ 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0 }; ++ ++ F32 minv_F32_value = 0.0f; ++ F32 maxv_F32_value = 15.0f; ++ ++ F64 minv_F64_value = 0.0; ++ F64 maxv_F64_value = 15.0; ++ ++ /* Setup input vectors. */ ++ for (i=0; i<16; i++) ++ { ++ aF32[i] = (float)(15-i); ++ bF32[i] = (float)i; ++ aF64[i] = (double)(15-i); ++ bF64[i] = (double)i; ++ } ++ ++ TEST (max, 3); ++ TEST (min, 3); ++ ++ /* Test across lanes ops. */ ++ if (maxv_f32 (max_F32_vector) != maxv_F32_value) ++ abort (); ++ if (minv_f32 (min_F32_vector) != minv_F32_value) ++ abort (); ++ ++ if (maxv_f64 (max_F64_vector) != maxv_F64_value) ++ abort (); ++ if (minv_f64 (min_F64_vector) != minv_F64_value) ++ abort (); ++ ++ return 0; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/volatile-bitfields-3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-3.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-3.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++typedef struct { ++ volatile unsigned long a:8; ++ volatile unsigned long b:8; ++ volatile unsigned long c:16; ++} BitStruct; ++ ++BitStruct bits; ++ ++unsigned long foo () ++{ ++ return bits.c; ++} ++ ++/* { dg-final { scan-assembler "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/volatile-bitfields-3.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/mneg-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/mneg-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/mneg-1.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int r; ++ ++void test (int a, int b) ++{ ++ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = (-a) * b; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/mneg-1.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/fcvt_float_uint.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_uint.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_uint.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++#define GPI unsigned int ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtpu\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtmu\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtau\tw\[0-9\]+, *s\[0-9\]" 2 } } */ + +Property changes on: gcc/testsuite/gcc.target/aarch64/fcvt_float_uint.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/adc-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/adc-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/adc-2.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,277 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2" } */ ++ ++extern void abort (void); ++ ++/* This series of tests looks for the optimization: ++ x = (a >= b) + c + d ++ => ++ cmp a, b ++ adc x, c, d ++ */ ++ ++unsigned long ++ltu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a < b) + c + d; ++} ++ ++unsigned long ++gtu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a > b) + c + d; ++} ++ ++unsigned long ++leu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a <= b) + c + d; ++} ++ ++unsigned long ++geu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a >= b) + c + d; ++} ++ ++unsigned long ++equ_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a == b) + c + d; ++} ++ ++unsigned long ++neu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a != b) + c + d; ++} ++ ++long ++lt_add ( long a, long b, long c, long d) ++{ ++ return (a < b) + c + d; ++} ++ ++long ++gt_add ( long a, long b, long c, long d) ++{ ++ return (a > b) + c + d; ++} ++ ++long ++le_add ( long a, long b, long c, long d) ++{ ++ return (a <= b) + c + d; ++} ++ ++long ++ge_add ( long a, long b, long c, long d) ++{ ++ return (a >= b) + c + d; ++} ++ ++long ++eq_add ( long a, long b, long c, long d) ++{ ++ return (a == b) + c + d; ++} ++ ++long ++ne_add ( long a, long b, long c, long d) ++{ ++ return (a != b) + c + d; ++} ++ ++ ++int ++main () ++{ ++ if (ltu_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (ltu_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (ltu_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (gtu_add(2,1,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (gtu_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (gtu_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (leu_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (leu_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (leu_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (leu_add(2,1,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (geu_add(2,1,3,4) != 8) ++ { ++ abort(); ++ } ++ if (geu_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (geu_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (equ_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (equ_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (equ_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (neu_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (neu_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (neu_add(3,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (lt_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (lt_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (lt_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (gt_add(2,1,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (gt_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (gt_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (le_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (le_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (le_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (le_add(2,1,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (ge_add(2,1,3,4) != 8) ++ { ++ abort(); ++ } ++ if (ge_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (ge_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (eq_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (eq_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (eq_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (ne_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (ne_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (ne_add(3,2,3,4) != 8) ++ { ++ abort(); ++ } ++ return 0; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/adc-2.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/mneg-3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/mneg-3.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/mneg-3.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int r; ++ ++void test (int a, int b) ++{ ++ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = - (a * b); ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/mneg-3.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect.x +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect.x (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect.x (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,140 @@ ++typedef int *__restrict__ pRINT; ++typedef unsigned int *__restrict__ pRUINT; ++typedef long long *__restrict__ pRINT64; ++typedef unsigned long long *__restrict__ pRUINT64; ++ ++void test_orn (pRUINT a, pRUINT b, pRUINT c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ c[i] = a[i] | (~b[i]); ++} ++ ++void test_bic (pRUINT a, pRUINT b, pRUINT c) ++{ ++ int i; ++ for (i = 0; i < 16; i++) ++ c[i] = a[i] & (~b[i]); ++} ++ ++void mla (pRINT a, pRINT b, pRINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] += a[i] * b[i]; ++} ++ ++void mls (pRINT a, pRINT b, pRINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] -= a[i] * b[i]; ++} ++ ++void smax (pRINT a, pRINT b, pRINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] > b[i] ? a[i] : b[i]); ++} ++ ++void smin (pRINT a, pRINT b, pRINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] < b[i] ? a[i] : b[i]); ++} ++ ++void umax (pRUINT a, pRUINT b, pRUINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] > b[i] ? a[i] : b[i]); ++} ++ ++void umin (pRUINT a, pRUINT b, pRUINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] < b[i] ? a[i] : b[i]); ++} ++ ++unsigned int reduce_umax (pRUINT a) ++{ ++ int i; ++ unsigned int s = a[0]; ++ for (i = 1; i < 16; i++) ++ s = (s > a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++unsigned int reduce_umin (pRUINT a) ++{ ++ int i; ++ unsigned int s = a[0]; ++ for (i = 1; i < 16; i++) ++ s = (s < a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++int reduce_smax (pRINT a) ++{ ++ int i; ++ int s = a[0]; ++ for (i = 1; i < 16; i++) ++ s = (s > a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++int reduce_smin (pRINT a) ++{ ++ int i; ++ int s = a[0]; ++ for (i = 1; i < 16; i++) ++ s = (s < a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++unsigned int reduce_add_u32 (pRINT a) ++{ ++ int i; ++ unsigned int s = 0; ++ for (i = 0; i < 16; i++) ++ s += a[i]; ++ ++ return s; ++} ++ ++int reduce_add_s32 (pRINT a) ++{ ++ int i; ++ int s = 0; ++ for (i = 0; i < 16; i++) ++ s += a[i]; ++ ++ return s; ++} ++ ++unsigned long long reduce_add_u64 (pRUINT64 a) ++{ ++ int i; ++ unsigned long long s = 0; ++ for (i = 0; i < 16; i++) ++ s += a[i]; ++ ++ return s; ++} ++ ++long long reduce_add_s64 (pRINT64 a) ++{ ++ int i; ++ long long s = 0; ++ for (i = 0; i < 16; i++) ++ s += a[i]; ++ ++ return s; ++} +Index: gcc/testsuite/gcc.target/aarch64/extend.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/extend.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/extend.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,170 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int ++ldr_uxtw (int *arr, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*uxtw #?2]" } } */ ++ return arr[i]; ++} ++ ++int ++ldr_uxtw0 (char *arr, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*uxtw]" } } */ ++ return arr[i]; ++} ++ ++int ++ldr_sxtw (int *arr, int i) ++{ ++ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*sxtw #?2]" } } */ ++ return arr[i]; ++} ++ ++int ++ldr_sxtw0 (char *arr, int i) ++{ ++ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*sxtw]" } } */ ++ return arr[i]; ++} ++ ++unsigned long long ++adddi_uxtw (unsigned long long a, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*uxtw #?3" } } */ ++ return a + ((unsigned long long)i << 3); ++} ++ ++unsigned long long ++adddi_uxtw0 (unsigned long long a, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*uxtw\n" } } */ ++ return a + i; ++} ++ ++long long ++adddi_sxtw (long long a, int i) ++{ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*sxtw #?3" } } */ ++ return a + ((long long)i << 3); ++} ++ ++long long ++adddi_sxtw0 (long long a, int i) ++{ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*sxtw\n" } } */ ++ return a + i; ++} ++ ++unsigned long long ++subdi_uxtw (unsigned long long a, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxtw #?3" } } */ ++ return a - ((unsigned long long)i << 3); ++} ++ ++unsigned long long ++subdi_uxtw0 (unsigned long long a, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxtw\n" } } */ ++ return a - i; ++} ++ ++long long ++subdi_sxtw (long long a, int i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxtw #?3" } } */ ++ return a - ((long long)i << 3); ++} ++ ++long long ++subdi_sxtw0 (long long a, int i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxtw\n" } } */ ++ return a - (long long)i; ++} ++ ++unsigned long long ++subdi_uxth (unsigned long long a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxth #?1" } } */ ++ return a - ((unsigned long long)i << 1); ++} ++ ++unsigned long long ++subdi_uxth0 (unsigned long long a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxth\n" } } */ ++ return a - i; ++} ++ ++long long ++subdi_sxth (long long a, short i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxth #?1" } } */ ++ return a - ((long long)i << 1); ++} ++ ++long long ++subdi_sxth0 (long long a, short i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxth\n" } } */ ++ return a - (long long)i; ++} ++ ++unsigned int ++subsi_uxth (unsigned int a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*uxth #?1" } } */ ++ return a - ((unsigned int)i << 1); ++} ++ ++unsigned int ++subsi_uxth0 (unsigned int a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*uxth\n" } } */ ++ return a - i; ++} ++ ++int ++subsi_sxth (int a, short i) ++{ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*sxth #?1" } } */ ++ return a - ((int)i << 1); ++} ++ ++int ++subsi_sxth0 (int a, short i) ++{ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*sxth\n" } } */ ++ return a - (int)i; ++} ++ ++unsigned int ++addsi_uxth (unsigned int a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*uxth #?1" } } */ ++ return a + ((unsigned int)i << 1); ++} ++ ++unsigned int ++addsi_uxth0 (unsigned int a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*uxth\n" } } */ ++ return a + i; ++} ++ ++int ++addsi_sxth (int a, short i) ++{ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*sxth #?1" } } */ ++ return a + ((int)i << 1); ++} ++ ++int ++addsi_sxth0 (int a, short i) ++{ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*sxth\n" } } */ ++ return a + (int)i; ++} + +Property changes on: gcc/testsuite/gcc.target/aarch64/extend.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.target/aarch64/vect-fp.x +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fp.x (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fp.x (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,44 @@ ++ ++typedef float F32; ++typedef double F64; ++typedef float *__restrict__ pRF32; ++typedef double *__restrict__ pRF64; ++ ++extern float fabsf (float); ++extern double fabs (double); ++ ++#define DEF3(fname, type, op) \ ++ void fname##_##type (pR##type a, \ ++ pR##type b, \ ++ pR##type c) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ a[i] = b[i] op c[i]; \ ++ } ++ ++#define DEF2(fname, type, op) \ ++ void fname##_##type (pR##type a, \ ++ pR##type b) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ a[i] = op(b[i]); \ ++ } ++ ++ ++#define DEFN3(fname, op) \ ++ DEF3 (fname, F32, op) \ ++ DEF3 (fname, F64, op) ++ ++#define DEFN2(fname, op) \ ++ DEF2 (fname, F32, op) \ ++ DEF2 (fname, F64, op) ++ ++DEFN3 (add, +) ++DEFN3 (sub, -) ++DEFN3 (mul, *) ++DEFN3 (div, /) ++DEFN2 (neg, -) ++DEF2 (abs, F32, fabsf) ++DEF2 (abs, F64, fabs) +Index: gcc/testsuite/gcc.target/aarch64/vect-abs.x +=================================================================== +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-abs.x (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-abs.x (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,36 @@ ++ ++extern int abs (int); ++extern long labs (long); ++ ++typedef signed char *__restrict__ pRINT8; ++typedef short *__restrict__ pRINT16; ++typedef int *__restrict__ pRINT32; ++typedef long *__restrict__ pRLONG; ++typedef long long *__restrict__ pRINT64; ++ ++#define DEF_ABS(size) void absolute_s##size (pRINT##size a, pRINT##size b) \ ++ { \ ++ int i; \ ++ for (i=0; i 0 ? b[i] : -b[i]); \ ++ } ++ ++DEF_ABS (8); ++DEF_ABS (16); ++DEF_ABS (32); ++DEF_ABS (64); ++ ++/* Test abs () vectorization. */ ++void absolute_s32_lib (pRINT32 a, pRINT32 b) ++{ ++ int i; ++ for (i=0; i= 2 && N <= 4 } { ++ if { ([istarget arm*-*-*] ++ || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } { + set et_vect_stridedN_saved 1 + } + } +@@ -3859,6 +3888,7 @@ + if { [istarget ia64-*-*] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] ++ || [istarget aarch64*-*-*] + || [istarget alpha*-*-*] + || [istarget arm*-*-linux-gnueabi] + || [istarget bfin*-*linux*] +@@ -3886,7 +3916,8 @@ + set et_sync_char_short_saved 0 + # This is intentionally powerpc but not rs6000, rs6000 doesn't have the + # load-reserved/store-conditional instructions. +- if { [istarget ia64-*-*] ++ if { [istarget aarch64*-*-*] ++ || [istarget ia64-*-*] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget alpha*-*-*] +@@ -4606,6 +4637,8 @@ + } else { + set dg-do-what-default compile + } ++ } elseif [istarget "aarch64*-*-*"] { ++ set dg-do-what-default run + } else { + return 0 + } +Index: gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f (.../ARM/aarch64-4.7-branch) +@@ -1,6 +1,6 @@ + C Test program for common block debugging. G. Helffrich 11 July 2004. + C { dg-do compile } +-C { dg-skip-if "No stabs" { mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } } ++C { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } } + C { dg-skip-if "No stabs" {*-*-* } { "*" } { "-gstabs" } } + common i,j + common /label/l,m +Index: gcc/testsuite/gcc.c-torture/execute/20101011-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.c-torture/execute/20101011-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.c-torture/execute/20101011-1.c (.../ARM/aarch64-4.7-branch) +@@ -12,6 +12,10 @@ + #elif defined (__sh__) + /* On SH division by zero does not trap. */ + # define DO_TEST 0 ++#elif defined (__aarch64__) && !defined(__linux__) ++ /* AArch64 divisions do trap by default, but libgloss targets do not ++ intercept the trap and raise a SIGFPE. So restrict the test to ++ AArch64 systems that use the Linux kernel. */ + #elif defined (__TMS320C6X__) + /* On TI C6X division by zero does not trap. */ + # define DO_TEST 0 +Index: gcc/testsuite/gcc.dg/20040813-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/20040813-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.dg/20040813-1.c (.../ARM/aarch64-4.7-branch) +@@ -2,7 +2,7 @@ + /* Contributed by Devang Patel */ + + /* { dg-do compile } */ +-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */ ++/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */ + /* { dg-options "-gstabs" } */ + + int +Index: gcc/testsuite/gcc.dg/stack-usage-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/stack-usage-1.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.dg/stack-usage-1.c (.../ARM/aarch64-4.7-branch) +@@ -7,7 +7,9 @@ + function FOO is reported as 256 or 264 in the stack usage (.su) file. + Then check that this is the actual stack usage in the assembly file. */ + +-#if defined(__i386__) ++#if defined(__aarch64__) ++# define SIZE 256 /* No frame pointer for leaf functions (default) */ ++#elif defined(__i386__) + # define SIZE 248 + #elif defined(__x86_64__) + # ifndef _WIN64 +Index: gcc/testsuite/gcc.dg/torture/pr51106-2.s +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr51106-2.s (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr51106-2.s (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,2 @@ ++ .cpu generic ++ .file "pr51106-2.c" + +Property changes on: gcc/testsuite/gcc.dg/torture/pr51106-2.s +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/gcc.dg/20020312-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/20020312-2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.dg/20020312-2.c (.../ARM/aarch64-4.7-branch) +@@ -92,6 +92,8 @@ + # else + # define PIC_REG "gr17" + #endif ++#elif defined (__aarch64__) ++/* No pic register -- yet. */ + #else + # error "Modify the test for your target." + #endif +Index: gcc/testsuite/gcc.dg/builtin-apply2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/builtin-apply2.c (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/gcc.dg/builtin-apply2.c (.../ARM/aarch64-4.7-branch) +@@ -1,5 +1,5 @@ + /* { dg-do run } */ +-/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-*" } { "*" } { "" } } */ ++/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */ + /* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */ + + /* PR target/12503 */ +Index: gcc/testsuite/g++.dg/abi/aarch64_guard1.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/abi/aarch64_guard1.C (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/g++.dg/abi/aarch64_guard1.C (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,17 @@ ++// Check that the initialization guard variable is an 8-byte aligned, ++// 8-byte doubleword and that only the least significant bit is used ++// for initialization guard variables. ++// { dg-do compile { target aarch64*-*-* } } ++// { dg-options "-O -fdump-tree-original" } ++ ++int bar(); ++ ++int *foo () ++{ ++ static int x = bar (); ++ return &x; ++} ++ ++// { dg-final { scan-assembler _ZGVZ3foovE1x,8,8 } } ++// { dg-final { scan-tree-dump "_ZGVZ3foovE1x & 1" "original" } } ++// { dg-final { cleanup-tree-dump "original" } } + +Property changes on: gcc/testsuite/g++.dg/abi/aarch64_guard1.C +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/testsuite/g++.dg/other/pr23205-2.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/other/pr23205-2.C (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/g++.dg/other/pr23205-2.C (.../ARM/aarch64-4.7-branch) +@@ -1,5 +1,5 @@ + /* { dg-do compile } */ +-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */ ++/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */ + /* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types -ftoplevel-reorder" } */ + + const int foobar = 4; +Index: gcc/testsuite/g++.dg/other/PR23205.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/other/PR23205.C (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/g++.dg/other/PR23205.C (.../ARM/aarch64-4.7-branch) +@@ -1,5 +1,5 @@ + /* { dg-do compile } */ +-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */ ++/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */ + /* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types" } */ + + const int foobar = 4; +Index: gcc/testsuite/ChangeLog.aarch64 +=================================================================== +--- a/src/gcc/testsuite/ChangeLog.aarch64 (.../gcc-4_7-branch) ++++ b/src/gcc/testsuite/ChangeLog.aarch64 (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,184 @@ ++2012-09-25 Tejas Belagod ++ ++ * testsuite/lib/target-supports.exp ++ (check_effective_target_vect_stridedN): Enable support for strided ++ load and stores for aarch64. ++ ++2012-09-18 Ian Bolton ++ ++ * gcc.target/aarch64/clrsb.c: New test. ++ * gcc.target/aarch64/clz.c: New test. ++ * gcc.target/aarch64/ctz.c: New test. ++ ++2012-09-17 Ian Bolton ++ ++ * gcc.target/aarch64/ffs.c: New test. ++ ++2012-09-17 Ian Bolton ++ ++ * gcc.target/aarch64/fmadd.c: Added extra tests. ++ * gcc.target/aarch64/fnmadd-fastmath.c: New test. ++ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * gcc.target/aarch64/aapcs/aapcs64.exp: New file. ++ * gcc.target/aarch64/aapcs/abitest-2.h: New file. ++ * gcc.target/aarch64/aapcs/abitest-common.h: New file. ++ * gcc.target/aarch64/aapcs/abitest.S: New file. ++ * gcc.target/aarch64/aapcs/abitest.h: New file. ++ * gcc.target/aarch64/aapcs/func-ret-1.c: New file. ++ * gcc.target/aarch64/aapcs/func-ret-2.c: New file. ++ * gcc.target/aarch64/aapcs/func-ret-3.c: New file. ++ * gcc.target/aarch64/aapcs/func-ret-3.x: New file. ++ * gcc.target/aarch64/aapcs/func-ret-4.c: New file. ++ * gcc.target/aarch64/aapcs/func-ret-4.x: New file. ++ * gcc.target/aarch64/aapcs/ice_1.c: New file. ++ * gcc.target/aarch64/aapcs/ice_2.c: New file. ++ * gcc.target/aarch64/aapcs/ice_3.c: New file. ++ * gcc.target/aarch64/aapcs/ice_4.c: New file. ++ * gcc.target/aarch64/aapcs/ice_5.c: New file. ++ * gcc.target/aarch64/aapcs/macro-def.h: New file. ++ * gcc.target/aarch64/aapcs/test_1.c: New file. ++ * gcc.target/aarch64/aapcs/test_10.c: New file. ++ * gcc.target/aarch64/aapcs/test_11.c: New file. ++ * gcc.target/aarch64/aapcs/test_12.c: New file. ++ * gcc.target/aarch64/aapcs/test_13.c: New file. ++ * gcc.target/aarch64/aapcs/test_14.c: New file. ++ * gcc.target/aarch64/aapcs/test_15.c: New file. ++ * gcc.target/aarch64/aapcs/test_16.c: New file. ++ * gcc.target/aarch64/aapcs/test_17.c: New file. ++ * gcc.target/aarch64/aapcs/test_18.c: New file. ++ * gcc.target/aarch64/aapcs/test_19.c: New file. ++ * gcc.target/aarch64/aapcs/test_2.c: New file. ++ * gcc.target/aarch64/aapcs/test_20.c: New file. ++ * gcc.target/aarch64/aapcs/test_21.c: New file. ++ * gcc.target/aarch64/aapcs/test_22.c: New file. ++ * gcc.target/aarch64/aapcs/test_23.c: New file. ++ * gcc.target/aarch64/aapcs/test_24.c: New file. ++ * gcc.target/aarch64/aapcs/test_25.c: New file. ++ * gcc.target/aarch64/aapcs/test_26.c: New file. ++ * gcc.target/aarch64/aapcs/test_3.c: New file. ++ * gcc.target/aarch64/aapcs/test_4.c: New file. ++ * gcc.target/aarch64/aapcs/test_5.c: New file. ++ * gcc.target/aarch64/aapcs/test_6.c: New file. ++ * gcc.target/aarch64/aapcs/test_7.c: New file. ++ * gcc.target/aarch64/aapcs/test_8.c: New file. ++ * gcc.target/aarch64/aapcs/test_9.c: New file. ++ * gcc.target/aarch64/aapcs/test_align-1.c: New file. ++ * gcc.target/aarch64/aapcs/test_align-2.c: New file. ++ * gcc.target/aarch64/aapcs/test_align-3.c: New file. ++ * gcc.target/aarch64/aapcs/test_align-4.c: New file. ++ * gcc.target/aarch64/aapcs/test_complex.c: New file. ++ * gcc.target/aarch64/aapcs/test_int128.c: New file. ++ * gcc.target/aarch64/aapcs/test_quad_double.c: New file. ++ * gcc.target/aarch64/aapcs/type-def.h: New file. ++ * gcc.target/aarch64/aapcs/va_arg-1.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-10.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-11.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-12.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-2.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-3.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-4.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-5.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-6.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-7.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-8.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-9.c: New file. ++ * gcc.target/aarch64/aapcs/validate_memory.h: New file. ++ * gcc.target/aarch64/aarch64.exp: New file. ++ * gcc.target/aarch64/adc-1.c: New file. ++ * gcc.target/aarch64/adc-2.c: New file. ++ * gcc.target/aarch64/asm-1.c: New file. ++ * gcc.target/aarch64/csinc-1.c: New file. ++ * gcc.target/aarch64/csinv-1.c: New file. ++ * gcc.target/aarch64/csneg-1.c: New file. ++ * gcc.target/aarch64/extend.c: New file. ++ * gcc.target/aarch64/fcvt.x: New file. ++ * gcc.target/aarch64/fcvt_double_int.c: New file. ++ * gcc.target/aarch64/fcvt_double_long.c: New file. ++ * gcc.target/aarch64/fcvt_double_uint.c: New file. ++ * gcc.target/aarch64/fcvt_double_ulong.c: New file. ++ * gcc.target/aarch64/fcvt_float_int.c: New file. ++ * gcc.target/aarch64/fcvt_float_long.c: New file. ++ * gcc.target/aarch64/fcvt_float_uint.c: New file. ++ * gcc.target/aarch64/fcvt_float_ulong.c: New file. ++ * gcc.target/aarch64/fmadd.c: New file. ++ * gcc.target/aarch64/frint.x: New file. ++ * gcc.target/aarch64/frint_double.c: New file. ++ * gcc.target/aarch64/frint_float.c: New file. ++ * gcc.target/aarch64/index.c: New file. ++ * gcc.target/aarch64/mneg-1.c: New file. ++ * gcc.target/aarch64/mneg-2.c: New file. ++ * gcc.target/aarch64/mneg-3.c: New file. ++ * gcc.target/aarch64/mnegl-1.c: New file. ++ * gcc.target/aarch64/mnegl-2.c: New file. ++ * gcc.target/aarch64/narrow_high-intrinsics.c: New file. ++ * gcc.target/aarch64/pic-constantpool1.c: New file. ++ * gcc.target/aarch64/pic-symrefplus.c: New file. ++ * gcc.target/aarch64/reload-valid-spoff.c: New file. ++ * gcc.target/aarch64/scalar_intrinsics.c: New file. ++ * gcc.target/aarch64/table-intrinsics.c: New file. ++ * gcc.target/aarch64/tst-1.c: New file. ++ * gcc.target/aarch64/vect-abs-compile.c: New file. ++ * gcc.target/aarch64/vect-abs.c: New file. ++ * gcc.target/aarch64/vect-abs.x: New file. ++ * gcc.target/aarch64/vect-compile.c: New file. ++ * gcc.target/aarch64/vect-faddv-compile.c: New file. ++ * gcc.target/aarch64/vect-faddv.c: New file. ++ * gcc.target/aarch64/vect-faddv.x: New file. ++ * gcc.target/aarch64/vect-fmax-fmin-compile.c: New file. ++ * gcc.target/aarch64/vect-fmax-fmin.c: New file. ++ * gcc.target/aarch64/vect-fmax-fmin.x: New file. ++ * gcc.target/aarch64/vect-fmaxv-fminv-compile.c: New file. ++ * gcc.target/aarch64/vect-fmaxv-fminv.x: New file. ++ * gcc.target/aarch64/vect-fp-compile.c: New file. ++ * gcc.target/aarch64/vect-fp.c: New file. ++ * gcc.target/aarch64/vect-fp.x: New file. ++ * gcc.target/aarch64/vect-mull-compile.c: New file. ++ * gcc.target/aarch64/vect-mull.c: New file. ++ * gcc.target/aarch64/vect-mull.x: New file. ++ * gcc.target/aarch64/vect.c: New file. ++ * gcc.target/aarch64/vect.x: New file. ++ * gcc.target/aarch64/vector_intrinsics.c: New file. ++ * gcc.target/aarch64/vfp-1.c: New file. ++ * gcc.target/aarch64/volatile-bitfields-1.c: New file. ++ * gcc.target/aarch64/volatile-bitfields-2.c: New file. ++ * gcc.target/aarch64/volatile-bitfields-3.c: New file. ++ * lib/target-supports.exp ++ (check_profiling_available): Add AArch64. ++ (check_effective_target_vect_int): Likewise. ++ (check_effective_target_vect_shift): Likewise. ++ (check_effective_target_vect_float): Likewise. ++ (check_effective_target_vect_double): Likewise. ++ (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. ++ (check_effective_target_vect_widen_mult_hi_to_si): Likewise. ++ (check_effective_target_vect_pack_trunc): Likewise. ++ (check_effective_target_vect_unpack): Likewise. ++ (check_effective_target_vect_hw_misalign): Likewise. ++ (check_effective_target_vect_short_mult): Likewise. ++ (check_effective_target_vect_int_mult): Likewise. ++ (check_effective_target_sync_int_long): Likewise. ++ (check_effective_target_sync_char_short): Likewise. ++ (check_vect_support_and_set_flags): Likewise. ++ * g++.dg/abi/aarch64_guard1.C: New file. ++ * g++.dg/other/PR23205.C: Enable aarch64. ++ * g++.dg/other/pr23205-2.C: Likewise. ++ * g++.old-deja/g++.abi/ptrmem.C: Likewise. ++ * gcc.c-torture/execute/20101011-1.c: Likewise. ++ * gcc.dg/torture/fp-int-convert-float128-timode.c: Likewise. ++ * gcc.dg/torture/fp-int-convert-float128.c: Likewise. ++ * gcc.dg/20020312-2.c: Likewise. ++ * gcc.dg/20040813-1.c: Likewise. ++ * gcc.dg/builtin-apply2.c: Likewise. ++ * gcc.dg/const-float128-ped.c: Likewise. ++ * gcc.dg/const-float128.c: Likewise. ++ * gcc.dg/stack-usage-1.c: Likewise. +Index: gcc/common/config/aarch64/aarch64-common.c +=================================================================== +--- a/src/gcc/common/config/aarch64/aarch64-common.c (.../gcc-4_7-branch) ++++ b/src/gcc/common/config/aarch64/aarch64-common.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,77 @@ ++/* Common hooks for AArch64. ++ Copyright (C) 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "tm.h" ++#include "tm_p.h" ++#include "common/common-target.h" ++#include "common/common-target-def.h" ++#include "opts.h" ++#include "flags.h" ++ ++#ifdef TARGET_BIG_ENDIAN_DEFAULT ++#undef TARGET_DEFAULT_TARGET_FLAGS ++#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_END) ++#endif ++ ++#undef TARGET_HANDLE_OPTION ++#define TARGET_HANDLE_OPTION aarch64_handle_option ++ ++/* Implement TARGET_HANDLE_OPTION. ++ This function handles the target specific options for CPU/target selection. ++ ++ march wins over mcpu, so when march is defined, mcpu takes the same value, ++ otherwise march remains undefined. mtune can be used with either march or ++ mcpu. If march and mcpu are used together, the rightmost option wins. ++ mtune can be used with either march or mcpu. */ ++ ++static bool ++aarch64_handle_option (struct gcc_options *opts, ++ struct gcc_options *opts_set ATTRIBUTE_UNUSED, ++ const struct cl_decoded_option *decoded, ++ location_t loc ATTRIBUTE_UNUSED) ++{ ++ size_t code = decoded->opt_index; ++ const char *arg = decoded->arg; ++ ++ switch (code) ++ { ++ case OPT_march_: ++ opts->x_aarch64_arch_string = arg; ++ opts->x_aarch64_cpu_string = arg; ++ return true; ++ ++ case OPT_mcpu_: ++ opts->x_aarch64_cpu_string = arg; ++ opts->x_aarch64_arch_string = NULL; ++ return true; ++ ++ case OPT_mtune_: ++ opts->x_aarch64_tune_string = arg; ++ return true; ++ ++ default: ++ return true; ++ } ++} ++ ++struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; + +Property changes on: gcc/common/config/aarch64/aarch64-common.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/configure.ac +=================================================================== +--- a/src/gcc/configure.ac (.../gcc-4_7-branch) ++++ b/src/gcc/configure.ac (.../ARM/aarch64-4.7-branch) +@@ -2982,6 +2982,19 @@ + tls_first_minor=19 + tls_as_opt='--fatal-warnings' + ;; ++ aarch64*-*-*) ++ conftest_s=' ++ .section ".tdata","awT",%progbits ++foo: .long 25 ++ .text ++ adrp x0, :tlsgd:x ++ add x0, x0, #:tlsgd_lo12:x ++ bl __tls_get_addr ++ nop' ++ tls_first_major=2 ++ tls_first_minor=20 ++ tls_as_opt='--fatal-warnings' ++ ;; + powerpc-*-*) + conftest_s=' + .section ".tdata","awT",@progbits +Index: gcc/read-rtl.c +=================================================================== +--- a/src/gcc/read-rtl.c (.../gcc-4_7-branch) ++++ b/src/gcc/read-rtl.c (.../ARM/aarch64-4.7-branch) +@@ -94,6 +94,26 @@ + #define BELLWETHER_CODE(CODE) \ + ((CODE) < NUM_RTX_CODE ? CODE : bellwether_codes[CODE - NUM_RTX_CODE]) + ++/* One element in the (rtx, opno) pair list. */ ++struct rtx_list { ++ /* rtx. */ ++ rtx x; ++ /* Position of the operand to replace. */ ++ int opno; ++}; ++ ++/* A structure to track which rtx uses which int iterator. */ ++struct int_iterator_mapping { ++ /* Iterator. */ ++ struct mapping *iterator; ++ /* list of rtx using ITERATOR. */ ++ struct rtx_list *rtxs; ++ int num_rtx; ++}; ++ ++static struct int_iterator_mapping *int_iterator_data; ++static int num_int_iterator_data; ++ + static int find_mode (const char *); + static bool uses_mode_iterator_p (rtx, int); + static void apply_mode_iterator (rtx, int); +@@ -121,8 +141,8 @@ + static rtx read_nested_rtx (struct map_value **); + static rtx read_rtx_variadic (struct map_value **, rtx); + +-/* The mode and code iterator structures. */ +-static struct iterator_group modes, codes; ++/* The mode, code and int iterator structures. */ ++static struct iterator_group modes, codes, ints; + + /* Index I is the value of BELLWETHER_CODE (I + NUM_RTX_CODE). */ + static enum rtx_code *bellwether_codes; +@@ -179,6 +199,59 @@ + PUT_CODE (x, (enum rtx_code) code); + } + ++/* Since GCC does not construct a table of valid constants, ++ we have to accept any int as valid. No cross-checking can ++ be done. */ ++static int ++find_int (const char *name) ++{ ++ char *endptr; ++ int ret; ++ ++ if (ISDIGIT (*name)) ++ { ++ ret = strtol (name, &endptr, 0); ++ gcc_assert (*endptr == '\0'); ++ return ret; ++ } ++ else ++ fatal_with_file_and_line ("unknown int `%s'", name); ++} ++ ++static bool ++dummy_uses_int_iterator (rtx x ATTRIBUTE_UNUSED, int index ATTRIBUTE_UNUSED) ++{ ++ return false; ++} ++ ++static void ++dummy_apply_int_iterator (rtx x ATTRIBUTE_UNUSED, int code ATTRIBUTE_UNUSED) ++{ ++ /* Do nothing. */ ++} ++ ++/* Stand-alone int iterator usage-checking function. */ ++static bool ++uses_int_iterator_p (rtx x, struct mapping *iterator, int opno) ++{ ++ int i; ++ for (i=0; i < num_int_iterator_data; i++) ++ if (int_iterator_data[i].iterator->group == iterator->group && ++ int_iterator_data[i].iterator->index == iterator->index) ++ { ++ /* Found an existing entry. Check if X is in its list. */ ++ struct int_iterator_mapping it = int_iterator_data[i]; ++ int j; ++ ++ for (j=0; j < it.num_rtx; j++) ++ { ++ if (it.rtxs[j].x == x && it.rtxs[j].opno == opno) ++ return true; ++ } ++ } ++ return false; ++} ++ + /* Map a code or mode attribute string P to the underlying string for + ITERATOR and VALUE. */ + +@@ -341,7 +414,9 @@ + x = rtx_alloc (bellwether_code); + memcpy (x, original, RTX_CODE_SIZE (bellwether_code)); + +- /* Change the mode or code itself. */ ++ /* Change the mode or code itself. ++ For int iterators, apply_iterator () does nothing. This is ++ because we want to apply int iterators to operands below. */ + group = iterator->group; + if (group->uses_iterator_p (x, iterator->index + group->num_builtins)) + group->apply_iterator (x, value); +@@ -379,6 +454,10 @@ + unknown_mode_attr); + } + break; ++ case 'i': ++ if (uses_int_iterator_p (original, iterator, i)) ++ XINT (x, i) = value; ++ break; + + default: + break; +@@ -419,6 +498,10 @@ + return true; + break; + ++ case 'i': ++ if (uses_int_iterator_p (x, iterator, i)) ++ return true; ++ + default: + break; + } +@@ -480,6 +563,7 @@ + + iterator = (struct mapping *) *slot; + for (elem = mtd->queue; elem != 0; elem = XEXP (elem, 1)) ++ { + if (uses_iterator_p (XEXP (elem, 0), iterator)) + { + /* For each iterator we expand, we set UNKNOWN_MODE_ATTR to NULL. +@@ -509,6 +593,7 @@ + XEXP (elem, 0) = x; + } + } ++ } + return 1; + } + +@@ -553,7 +638,7 @@ + return &value->next; + } + +-/* Do one-time initialization of the mode and code attributes. */ ++/* Do one-time initialization of the mode, code and int attributes. */ + + static void + initialize_iterators (void) +@@ -579,6 +664,15 @@ + codes.uses_iterator_p = uses_code_iterator_p; + codes.apply_iterator = apply_code_iterator; + ++ ints.attrs = htab_create (13, leading_string_hash, leading_string_eq_p, 0); ++ ints.iterators = htab_create (13, leading_string_hash, ++ leading_string_eq_p, 0); ++ ints.num_builtins = 0; ++ ints.find_builtin = find_int; ++ ints.uses_iterator_p = dummy_uses_int_iterator; ++ ints.apply_iterator = dummy_apply_int_iterator; ++ num_int_iterator_data = 0; ++ + lower = add_mapping (&modes, modes.attrs, "mode"); + upper = add_mapping (&modes, modes.attrs, "MODE"); + lower_ptr = &lower->values; +@@ -728,6 +822,61 @@ + return group->find_builtin (name); + } + ++/* We cannot use the same design as code and mode iterators as ints ++ can be any arbitrary number and there is no way to represent each ++ int iterator's placeholder with a unique numeric identifier. Therefore ++ we create a (rtx *, op, iterator *) triplet database. */ ++ ++static struct mapping * ++find_int_iterator (struct iterator_group *group, const char *name) ++{ ++ struct mapping *m; ++ ++ m = (struct mapping *) htab_find (group->iterators, &name); ++ if (m == 0) ++ fatal_with_file_and_line ("invalid iterator \"%s\"\n", name); ++ return m; ++} ++ ++/* Add to triplet-database for int iterators. */ ++static void ++add_int_iterator (struct mapping *iterator, rtx x, int opno) ++{ ++ ++ /* Find iterator in int_iterator_data. If already present, ++ add this R to its list of rtxs. If not present, create ++ a new entry for INT_ITERATOR_DATA and add the R to its ++ rtx list. */ ++ int i; ++ for (i=0; i < num_int_iterator_data; i++) ++ if (int_iterator_data[i].iterator->index == iterator->index) ++ { ++ /* Found an existing entry. Add rtx to this iterator's list. */ ++ int_iterator_data[i].rtxs = ++ XRESIZEVEC (struct rtx_list, ++ int_iterator_data[i].rtxs, ++ int_iterator_data[i].num_rtx + 1); ++ int_iterator_data[i].rtxs[int_iterator_data[i].num_rtx].x = x; ++ int_iterator_data[i].rtxs[int_iterator_data[i].num_rtx].opno = opno; ++ int_iterator_data[i].num_rtx++; ++ return; ++ } ++ ++ /* New INT_ITERATOR_DATA entry. */ ++ if (num_int_iterator_data == 0) ++ int_iterator_data = XNEWVEC (struct int_iterator_mapping, 1); ++ else ++ int_iterator_data = XRESIZEVEC (struct int_iterator_mapping, ++ int_iterator_data, ++ num_int_iterator_data + 1); ++ int_iterator_data[num_int_iterator_data].iterator = iterator; ++ int_iterator_data[num_int_iterator_data].rtxs = XNEWVEC (struct rtx_list, 1); ++ int_iterator_data[num_int_iterator_data].rtxs[0].x = x; ++ int_iterator_data[num_int_iterator_data].rtxs[0].opno = opno; ++ int_iterator_data[num_int_iterator_data].num_rtx = 1; ++ num_int_iterator_data++; ++} ++ + /* Finish reading a declaration of the form: + + (define... [ ... ]) +@@ -817,6 +966,7 @@ + static rtx queue_head; + struct map_value *mode_maps; + struct iterator_traverse_data mtd; ++ int i; + + /* Do one-time initialization. */ + if (queue_head == 0) +@@ -852,7 +1002,18 @@ + check_code_iterator (read_mapping (&codes, codes.iterators)); + return false; + } ++ if (strcmp (rtx_name, "define_int_attr") == 0) ++ { ++ read_mapping (&ints, ints.attrs); ++ return false; ++ } ++ if (strcmp (rtx_name, "define_int_iterator") == 0) ++ { ++ read_mapping (&ints, ints.iterators); ++ return false; ++ } + ++ + mode_maps = 0; + XEXP (queue_head, 0) = read_rtx_code (rtx_name, &mode_maps); + XEXP (queue_head, 1) = 0; +@@ -860,6 +1021,15 @@ + mtd.queue = queue_head; + mtd.mode_maps = mode_maps; + mtd.unknown_mode_attr = mode_maps ? mode_maps->string : NULL; ++ htab_traverse (ints.iterators, apply_iterator_traverse, &mtd); ++ /* Free used memory from recording int iterator usage. */ ++ for (i=0; i < num_int_iterator_data; i++) ++ if (int_iterator_data[i].num_rtx > 0) ++ XDELETEVEC (int_iterator_data[i].rtxs); ++ if (num_int_iterator_data > 0) ++ XDELETEVEC (int_iterator_data); ++ num_int_iterator_data = 0; ++ + htab_traverse (modes.iterators, apply_iterator_traverse, &mtd); + htab_traverse (codes.iterators, apply_iterator_traverse, &mtd); + if (mtd.unknown_mode_attr) +@@ -1057,14 +1227,30 @@ + XWINT (return_rtx, i) = tmp_wide; + break; + +- case 'i': + case 'n': +- read_name (&name); + validate_const_int (name.string); + tmp_int = atoi (name.string); + XINT (return_rtx, i) = tmp_int; + break; +- ++ case 'i': ++ /* Can be an iterator or an integer constant. */ ++ read_name (&name); ++ if (!ISDIGIT (name.string[0])) ++ { ++ struct mapping *iterator; ++ /* An iterator. */ ++ iterator = find_int_iterator (&ints, name.string); ++ /* Build (iterator, rtx, op) triplet-database. */ ++ add_int_iterator (iterator, return_rtx, i); ++ } ++ else ++ { ++ /* A numeric constant. */ ++ validate_const_int (name.string); ++ tmp_int = atoi (name.string); ++ XINT (return_rtx, i) = tmp_int; ++ } ++ break; + default: + gcc_unreachable (); + } +Index: gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc (.../gcc-4_7-branch) ++++ b/src/gcc/config.gcc (.../ARM/aarch64-4.7-branch) +@@ -317,6 +317,13 @@ + tmake_file=m32c/t-m32c + target_has_targetm_common=no + ;; ++aarch64*-*-*) ++ cpu_type=aarch64 ++ need_64bit_hwint=yes ++ extra_headers="arm_neon.h" ++ extra_objs="aarch64-builtins.o" ++ target_has_targetm_common=yes ++ ;; + alpha*-*-*) + cpu_type=alpha + need_64bit_hwint=yes +@@ -775,6 +782,27 @@ + esac + + case ${target} in ++aarch64*-*-elf) ++ tm_file="${tm_file} dbxelf.h elfos.h newlib-stdint.h" ++ tm_file="${tm_file} aarch64/aarch64-elf.h aarch64/aarch64-elf-raw.h" ++ tmake_file="${tmake_file} aarch64/t-aarch64" ++ use_gcc_stdint=wrap ++ case $target in ++ aarch64_be-*) ++ tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" ++ ;; ++ esac ++ ;; ++aarch64*-*-linux*) ++ tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h" ++ tm_file="${tm_file} aarch64/aarch64-elf.h aarch64/aarch64-linux.h" ++ tmake_file="${tmake_file} aarch64/t-aarch64 aarch64/t-aarch64-linux" ++ case $target in ++ aarch64_be-*) ++ tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" ++ ;; ++ esac ++ ;; + alpha*-*-linux*) + tm_file="${tm_file} alpha/elf.h alpha/linux.h alpha/linux-elf.h glibc-stdint.h" + extra_options="${extra_options} alpha/elf.opt" +@@ -3029,6 +3057,92 @@ + + supported_defaults= + case "${target}" in ++ aarch64*-*-*) ++ supported_defaults="cpu arch" ++ for which in cpu arch; do ++ ++ eval "val=\$with_$which" ++ base_val=`echo $val | sed -e 's/\+.*//'` ++ ext_val=`echo $val | sed -e 's/[a-z0-9\-]\+//'` ++ ++ if [ $which = arch ]; then ++ def=aarch64-arches.def ++ pattern=AARCH64_ARCH ++ else ++ def=aarch64-cores.def ++ pattern=AARCH64_CORE ++ fi ++ ++ ext_mask=AARCH64_CPU_DEFAULT_FLAGS ++ ++ # Find the base CPU or ARCH id in aarch64-cores.def or ++ # aarch64-arches.def ++ if [ x"$base_val" = x ] \ ++ || grep "^$pattern(\"$base_val\"," \ ++ ${srcdir}/config/aarch64/$def \ ++ > /dev/null; then ++ ++ if [ $which = arch ]; then ++ base_id=`grep "^$pattern(\"$base_val\"," \ ++ ${srcdir}/config/aarch64/$def | \ ++ sed -e 's/^[^,]*,[ ]*//' | \ ++ sed -e 's/,.*$//'` ++ else ++ base_id=`grep "^$pattern(\"$base_val\"," \ ++ ${srcdir}/config/aarch64/$def | \ ++ sed -e 's/^[^,]*,[ ]*//' | \ ++ sed -e 's/,.*$//'` ++ fi ++ ++ while [ x"$ext_val" != x ] ++ do ++ ext_val=`echo $ext_val | sed -e 's/\+//'` ++ ext=`echo $ext_val | sed -e 's/\+.*//'` ++ base_ext=`echo $ext | sed -e 's/^no//'` ++ ++ if [ x"$base_ext" = x ] \ ++ || grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \ ++ ${srcdir}/config/aarch64/aarch64-option-extensions.def \ ++ > /dev/null; then ++ ++ ext_on=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \ ++ ${srcdir}/config/aarch64/aarch64-option-extensions.def | \ ++ sed -e 's/^[^,]*,[ ]*//' | \ ++ sed -e 's/,.*$//'` ++ ext_off=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \ ++ ${srcdir}/config/aarch64/aarch64-option-extensions.def | \ ++ sed -e 's/^[^,]*,[ ]*[^,]*,[ ]*//' | \ ++ sed -e 's/,.*$//' | \ ++ sed -e 's/).*$//'` ++ ++ if [ $ext = $base_ext ]; then ++ # Adding extension ++ ext_mask="("$ext_mask") | ("$ext_on")" ++ else ++ # Removing extension ++ ext_mask="("$ext_mask") & ~("$ext_off")" ++ fi ++ ++ true ++ else ++ echo "Unknown extension used in --with-$which=$val" 1>&2 ++ exit 1 ++ fi ++ ext_val=`echo $ext_val | sed -e 's/[a-z0-9]\+//'` ++ done ++ ++ ext_mask="(("$ext_mask") << 6)" ++ if [ x"$base_id" != x ]; then ++ target_cpu_cname="TARGET_CPU_$base_id | $ext_mask" ++ fi ++ true ++ else ++ echo "Unknown $which used in --with-$which=$val" 1>&2 ++ exit 1 ++ fi ++ done ++ ;; ++ + alpha*-*-*) + supported_defaults="cpu tune" + for which in cpu tune; do +@@ -3517,6 +3631,15 @@ + # Set some miscellaneous flags for particular targets. + target_cpu_default2= + case ${target} in ++ aarch64*-*-*) ++ if test x$target_cpu_cname = x ++ then ++ target_cpu_default2=TARGET_CPU_generic ++ else ++ target_cpu_default2=$target_cpu_cname ++ fi ++ ;; ++ + alpha*-*-*) + if test x$gas = xyes + then +Index: gcc/config/aarch64/aarch64-simd.md +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-simd.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-simd.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,3264 @@ ++;; Machine description for AArch64 AdvSIMD architecture. ++;; Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++ ++; Main data types used by the insntructions ++ ++(define_attr "simd_mode" "unknown,none,V8QI,V16QI,V4HI,V8HI,V2SI,V4SI,V2DI,V2SF,V4SF,V2DF,OI,CI,XI,DI,DF,SI,HI,QI" ++ (const_string "unknown")) ++ ++ ++; Classification of AdvSIMD instructions for scheduling purposes. ++; Do not set this attribute and the "v8type" attribute together in ++; any instruction pattern. ++ ++; simd_abd integer absolute difference and accumulate. ++; simd_abdl integer absolute difference and accumulate (long). ++; simd_adal integer add and accumulate (long). ++; simd_add integer addition/subtraction. ++; simd_addl integer addition/subtraction (long). ++; simd_addlv across lanes integer sum (long). ++; simd_addn integer addition/subtraction (narrow). ++; simd_addn2 integer addition/subtraction (narrow, high). ++; simd_addv across lanes integer sum. ++; simd_cls count leading sign/zero bits. ++; simd_cmp compare / create mask. ++; simd_cnt population count. ++; simd_dup duplicate element. ++; simd_dupgp duplicate general purpose register. ++; simd_ext bitwise extract from pair. ++; simd_fadd floating point add/sub. ++; simd_fcmp floating point compare. ++; simd_fcvti floating point convert to integer. ++; simd_fcvtl floating-point convert upsize. ++; simd_fcvtn floating-point convert downsize (narrow). ++; simd_fcvtn2 floating-point convert downsize (narrow, high). ++; simd_fdiv floating point division. ++; simd_fminmax floating point min/max. ++; simd_fminmaxv across lanes floating point min/max. ++; simd_fmla floating point multiply-add. ++; simd_fmla_elt floating point multiply-add (by element). ++; simd_fmul floating point multiply. ++; simd_fmul_elt floating point multiply (by element). ++; simd_fnegabs floating point neg/abs. ++; simd_frcpe floating point reciprocal estimate. ++; simd_frcps floating point reciprocal step. ++; simd_frecx floating point reciprocal exponent. ++; simd_frint floating point round to integer. ++; simd_fsqrt floating point square root. ++; simd_icvtf integer convert to floating point. ++; simd_ins insert element. ++; simd_insgp insert general purpose register. ++; simd_load1 load multiple structures to one register (LD1). ++; simd_load1r load single structure to all lanes of one register (LD1R). ++; simd_load1s load single structure to one lane of one register (LD1 [index]). ++; simd_load2 load multiple structures to two registers (LD1, LD2). ++; simd_load2r load single structure to all lanes of two registers (LD1R, LD2R). ++; simd_load2s load single structure to one lane of two registers (LD2 [index]). ++; simd_load3 load multiple structures to three registers (LD1, LD3). ++; simd_load3r load single structure to all lanes of three registers (LD3R). ++; simd_load3s load single structure to one lane of three registers (LD3 [index]). ++; simd_load4 load multiple structures to four registers (LD1, LD2, LD4). ++; simd_load4r load single structure to all lanes of four registers (LD4R). ++; simd_load4s load single structure to one lane of four registers (LD4 [index]). ++; simd_logic logical operation. ++; simd_logic_imm logcial operation (immediate). ++; simd_minmax integer min/max. ++; simd_minmaxv across lanes integer min/max, ++; simd_mla integer multiply-accumulate. ++; simd_mla_elt integer multiply-accumulate (by element). ++; simd_mlal integer multiply-accumulate (long). ++; simd_mlal_elt integer multiply-accumulate (by element, long). ++; simd_move move register. ++; simd_move_imm move immediate. ++; simd_movgp move element to general purpose register. ++; simd_mul integer multiply. ++; simd_mul_elt integer multiply (by element). ++; simd_mull integer multiply (long). ++; simd_mull_elt integer multiply (by element, long). ++; simd_negabs integer negate/absolute. ++; simd_rbit bitwise reverse. ++; simd_rcpe integer reciprocal estimate. ++; simd_rcps integer reciprocal square root. ++; simd_rev element reverse. ++; simd_sat_add integer saturating addition/subtraction. ++; simd_sat_mlal integer saturating multiply-accumulate (long). ++; simd_sat_mlal_elt integer saturating multiply-accumulate (by element, long). ++; simd_sat_mul integer saturating multiply. ++; simd_sat_mul_elt integer saturating multiply (by element). ++; simd_sat_mull integer saturating multiply (long). ++; simd_sat_mull_elt integer saturating multiply (by element, long). ++; simd_sat_negabs integer saturating negate/absolute. ++; simd_sat_shift integer saturating shift. ++; simd_sat_shift_imm integer saturating shift (immediate). ++; simd_sat_shiftn_imm integer saturating shift (narrow, immediate). ++; simd_sat_shiftn2_imm integer saturating shift (narrow, high, immediate). ++; simd_shift shift register/vector. ++; simd_shift_acc shift accumulate. ++; simd_shift_imm shift immediate. ++; simd_shift_imm_acc shift immediate and accumualte. ++; simd_shiftl shift register/vector (long). ++; simd_shiftl_imm shift register/vector (long, immediate). ++; simd_shiftn_imm shift register/vector (narrow, immediate). ++; simd_shiftn2_imm shift register/vector (narrow, high, immediate). ++; simd_store1 store multiple structures from one register (ST1). ++; simd_store1s store single structure from one lane of one register (ST1 [index]). ++; simd_store2 store multiple structures from two registers (ST1, ST2). ++; simd_store2s store single structure from one lane of two registers (ST2 [index]). ++; simd_store3 store multiple structures from three registers (ST1, ST3). ++; simd_store3s store single structure from one lane of three register (ST3 [index]). ++; simd_store4 store multiple structures from four registers (ST1, ST2, ST4). ++; simd_store4s store single structure from one lane for four registers (ST4 [index]). ++; simd_tbl table lookup. ++; simd_trn transpose. ++; simd_zip zip/unzip. ++ ++(define_attr "simd_type" ++ "simd_abd,\ ++ simd_abdl,\ ++ simd_adal,\ ++ simd_add,\ ++ simd_addl,\ ++ simd_addlv,\ ++ simd_addn,\ ++ simd_addn2,\ ++ simd_addv,\ ++ simd_cls,\ ++ simd_cmp,\ ++ simd_cnt,\ ++ simd_dup,\ ++ simd_dupgp,\ ++ simd_ext,\ ++ simd_fadd,\ ++ simd_fcmp,\ ++ simd_fcvti,\ ++ simd_fcvtl,\ ++ simd_fcvtn,\ ++ simd_fcvtn2,\ ++ simd_fdiv,\ ++ simd_fminmax,\ ++ simd_fminmaxv,\ ++ simd_fmla,\ ++ simd_fmla_elt,\ ++ simd_fmul,\ ++ simd_fmul_elt,\ ++ simd_fnegabs,\ ++ simd_frcpe,\ ++ simd_frcps,\ ++ simd_frecx,\ ++ simd_frint,\ ++ simd_fsqrt,\ ++ simd_icvtf,\ ++ simd_ins,\ ++ simd_insgp,\ ++ simd_load1,\ ++ simd_load1r,\ ++ simd_load1s,\ ++ simd_load2,\ ++ simd_load2r,\ ++ simd_load2s,\ ++ simd_load3,\ ++ simd_load3r,\ ++ simd_load3s,\ ++ simd_load4,\ ++ simd_load4r,\ ++ simd_load4s,\ ++ simd_logic,\ ++ simd_logic_imm,\ ++ simd_minmax,\ ++ simd_minmaxv,\ ++ simd_mla,\ ++ simd_mla_elt,\ ++ simd_mlal,\ ++ simd_mlal_elt,\ ++ simd_movgp,\ ++ simd_move,\ ++ simd_move_imm,\ ++ simd_mul,\ ++ simd_mul_elt,\ ++ simd_mull,\ ++ simd_mull_elt,\ ++ simd_negabs,\ ++ simd_rbit,\ ++ simd_rcpe,\ ++ simd_rcps,\ ++ simd_rev,\ ++ simd_sat_add,\ ++ simd_sat_mlal,\ ++ simd_sat_mlal_elt,\ ++ simd_sat_mul,\ ++ simd_sat_mul_elt,\ ++ simd_sat_mull,\ ++ simd_sat_mull_elt,\ ++ simd_sat_negabs,\ ++ simd_sat_shift,\ ++ simd_sat_shift_imm,\ ++ simd_sat_shiftn_imm,\ ++ simd_sat_shiftn2_imm,\ ++ simd_shift,\ ++ simd_shift_acc,\ ++ simd_shift_imm,\ ++ simd_shift_imm_acc,\ ++ simd_shiftl,\ ++ simd_shiftl_imm,\ ++ simd_shiftn_imm,\ ++ simd_shiftn2_imm,\ ++ simd_store1,\ ++ simd_store1s,\ ++ simd_store2,\ ++ simd_store2s,\ ++ simd_store3,\ ++ simd_store3s,\ ++ simd_store4,\ ++ simd_store4s,\ ++ simd_tbl,\ ++ simd_trn,\ ++ simd_zip,\ ++ none" ++ (const_string "none")) ++ ++ ++; The "neon_type" attribute is used by the AArch32 backend. Below is a mapping ++; from "simd_type" to "neon_type". ++ ++(define_attr "neon_type" ++ "neon_int_1,neon_int_2,neon_int_3,neon_int_4,neon_int_5,neon_vqneg_vqabs, ++ neon_vmov,neon_vaba,neon_vsma,neon_vaba_qqq, ++ neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,neon_mul_qqq_8_16_32_ddd_32, ++ neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar, ++ neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,neon_mla_qqq_8_16, ++ neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long, ++ neon_mla_qqq_32_qqd_32_scalar,neon_mul_ddd_16_scalar_32_16_long_scalar, ++ neon_mul_qqd_32_scalar,neon_mla_ddd_16_scalar_qdd_32_16_long_scalar, ++ neon_shift_1,neon_shift_2,neon_shift_3,neon_vshl_ddd, ++ neon_vqshl_vrshl_vqrshl_qqq,neon_vsra_vrsra,neon_fp_vadd_ddd_vabs_dd, ++ neon_fp_vadd_qqq_vabs_qq,neon_fp_vsum,neon_fp_vmul_ddd,neon_fp_vmul_qqd, ++ neon_fp_vmla_ddd,neon_fp_vmla_qqq,neon_fp_vmla_ddd_scalar, ++ neon_fp_vmla_qqq_scalar,neon_fp_vrecps_vrsqrts_ddd, ++ neon_fp_vrecps_vrsqrts_qqq,neon_bp_simple,neon_bp_2cycle,neon_bp_3cycle, ++ neon_ldr,neon_str,neon_vld1_1_2_regs,neon_vld1_3_4_regs, ++ neon_vld2_2_regs_vld1_vld2_all_lanes,neon_vld2_4_regs,neon_vld3_vld4, ++ neon_vst1_1_2_regs_vst2_2_regs,neon_vst1_3_4_regs, ++ neon_vst2_4_regs_vst3_vst4,neon_vst3_vst4,neon_vld1_vld2_lane, ++ neon_vld3_vld4_lane,neon_vst1_vst2_lane,neon_vst3_vst4_lane, ++ neon_vld3_vld4_all_lanes,neon_mcr,neon_mcr_2_mcrr,neon_mrc,neon_mrrc, ++ neon_ldm_2,neon_stm_2,none,unknown" ++ (cond [ ++ (eq_attr "simd_type" "simd_dup") (const_string "neon_bp_simple") ++ (eq_attr "simd_type" "simd_movgp") (const_string "neon_bp_simple") ++ (eq_attr "simd_type" "simd_add,simd_logic,simd_logic_imm") (const_string "neon_int_1") ++ (eq_attr "simd_type" "simd_negabs,simd_addlv") (const_string "neon_int_3") ++ (eq_attr "simd_type" "simd_addn,simd_addn2,simd_addl,simd_sat_add,simd_sat_negabs") (const_string "neon_int_4") ++ (eq_attr "simd_type" "simd_move") (const_string "neon_vmov") ++ (eq_attr "simd_type" "simd_ins") (const_string "neon_mcr") ++ (and (eq_attr "simd_type" "simd_mul,simd_sat_mul") (eq_attr "simd_mode" "V8QI,V4HI")) (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") ++ (and (eq_attr "simd_type" "simd_mul,simd_sat_mul") (eq_attr "simd_mode" "V2SI,V8QI,V16QI,V2SI")) (const_string "neon_mul_qqq_8_16_32_ddd_32") ++ (and (eq_attr "simd_type" "simd_mull,simd_sat_mull") (eq_attr "simd_mode" "V8QI,V16QI,V4HI,V8HI")) (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") ++ (and (eq_attr "simd_type" "simd_mull,simd_sat_mull") (eq_attr "simd_mode" "V2SI,V4SI,V2DI")) (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar") ++ (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V8QI,V4HI")) (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") ++ (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V2SI")) (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") ++ (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V16QI,V8HI")) (const_string "neon_mla_qqq_8_16") ++ (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V4SI")) (const_string "neon_mla_qqq_32_qqd_32_scalar") ++ (and (eq_attr "simd_type" "simd_mlal") (eq_attr "simd_mode" "V8QI,V16QI,V4HI,V8HI")) (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") ++ (and (eq_attr "simd_type" "simd_mlal") (eq_attr "simd_mode" "V2SI,V4SI,V2DI")) (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") ++ (and (eq_attr "simd_type" "simd_fmla") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmla_ddd") ++ (and (eq_attr "simd_type" "simd_fmla") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmla_qqq") ++ (and (eq_attr "simd_type" "simd_fmla_elt") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmla_ddd_scalar") ++ (and (eq_attr "simd_type" "simd_fmla_elt") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmla_qqq_scalar") ++ (and (eq_attr "simd_type" "simd_fmul,simd_fmul_elt,simd_fdiv,simd_fsqrt") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmul_ddd") ++ (and (eq_attr "simd_type" "simd_fmul,simd_fmul_elt,simd_fdiv,simd_fsqrt") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmul_qqd") ++ (and (eq_attr "simd_type" "simd_fadd") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vadd_ddd_vabs_dd") ++ (and (eq_attr "simd_type" "simd_fadd") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vadd_qqq_vabs_qq") ++ (and (eq_attr "simd_type" "simd_fnegabs,simd_fminmax,simd_fminmaxv") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vadd_ddd_vabs_dd") ++ (and (eq_attr "simd_type" "simd_fnegabs,simd_fminmax,simd_fminmaxv") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vadd_qqq_vabs_qq") ++ (and (eq_attr "simd_type" "simd_shift,simd_shift_acc") (eq_attr "simd_mode" "V8QI,V4HI,V2SI")) (const_string "neon_vshl_ddd") ++ (and (eq_attr "simd_type" "simd_shift,simd_shift_acc") (eq_attr "simd_mode" "V16QI,V8HI,V4SI,V2DI")) (const_string "neon_shift_3") ++ (eq_attr "simd_type" "simd_minmax,simd_minmaxv") (const_string "neon_int_5") ++ (eq_attr "simd_type" "simd_shiftn_imm,simd_shiftn2_imm,simd_shiftl_imm,") (const_string "neon_shift_1") ++ (eq_attr "simd_type" "simd_load1,simd_load2") (const_string "neon_vld1_1_2_regs") ++ (eq_attr "simd_type" "simd_load3,simd_load3") (const_string "neon_vld1_3_4_regs") ++ (eq_attr "simd_type" "simd_load1r,simd_load2r,simd_load3r,simd_load4r") (const_string "neon_vld2_2_regs_vld1_vld2_all_lanes") ++ (eq_attr "simd_type" "simd_load1s,simd_load2s") (const_string "neon_vld1_vld2_lane") ++ (eq_attr "simd_type" "simd_load3s,simd_load4s") (const_string "neon_vld3_vld4_lane") ++ (eq_attr "simd_type" "simd_store1,simd_store2") (const_string "neon_vst1_1_2_regs_vst2_2_regs") ++ (eq_attr "simd_type" "simd_store3,simd_store4") (const_string "neon_vst1_3_4_regs") ++ (eq_attr "simd_type" "simd_store1s,simd_store2s") (const_string "neon_vst1_vst2_lane") ++ (eq_attr "simd_type" "simd_store3s,simd_store4s") (const_string "neon_vst3_vst4_lane") ++ (and (eq_attr "simd_type" "simd_frcpe,simd_frcps") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vrecps_vrsqrts_ddd") ++ (and (eq_attr "simd_type" "simd_frcpe,simd_frcps") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vrecps_vrsqrts_qqq") ++ (eq_attr "simd_type" "none") (const_string "none") ++ ] ++ (const_string "unknown"))) ++ ++ ++(define_expand "mov" ++ [(set (match_operand:VALL 0 "aarch64_simd_nonimmediate_operand" "") ++ (match_operand:VALL 1 "aarch64_simd_general_operand" ""))] ++ "TARGET_SIMD" ++ " ++ if (GET_CODE (operands[0]) == MEM) ++ operands[1] = force_reg (mode, operands[1]); ++ " ++) ++ ++(define_expand "movmisalign" ++ [(set (match_operand:VALL 0 "aarch64_simd_nonimmediate_operand" "") ++ (match_operand:VALL 1 "aarch64_simd_general_operand" ""))] ++ "TARGET_SIMD" ++{ ++ /* This pattern is not permitted to fail during expansion: if both arguments ++ are non-registers (e.g. memory := constant, which can be created by the ++ auto-vectorizer), force operand 1 into a register. */ ++ if (!register_operand (operands[0], mode) ++ && !register_operand (operands[1], mode)) ++ operands[1] = force_reg (mode, operands[1]); ++}) ++ ++(define_insn "aarch64_simd_dup" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (vec_duplicate:VDQ (match_operand: 1 "register_operand" "r")))] ++ "TARGET_SIMD" ++ "dup\\t%0., %1" ++ [(set_attr "simd_type" "simd_dupgp") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_dup_lane" ++ [(set (match_operand:VDQ_I 0 "register_operand" "=w") ++ (vec_duplicate:VDQ_I ++ (vec_select: ++ (match_operand: 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]) ++ )))] ++ "TARGET_SIMD" ++ "dup\\t%0, %1.[%2]" ++ [(set_attr "simd_type" "simd_dup") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_dup_lane" ++ [(set (match_operand:SDQ_I 0 "register_operand" "=w") ++ (vec_select: ++ (match_operand: 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]) ++ ))] ++ "TARGET_SIMD" ++ "dup\\t%0, %1.[%2]" ++ [(set_attr "simd_type" "simd_dup") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_dup" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (vec_duplicate:VDQF (match_operand: 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "dup\\t%0., %1.[0]" ++ [(set_attr "simd_type" "simd_dup") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "*aarch64_simd_mov" ++ [(set (match_operand:VD 0 "aarch64_simd_nonimmediate_operand" ++ "=w, Utv, w, ?r, ?w, ?r, w") ++ (match_operand:VD 1 "aarch64_simd_general_operand" ++ "Utv, w, w, w, r, r, Dn"))] ++ "TARGET_SIMD ++ && (register_operand (operands[0], mode) ++ || register_operand (operands[1], mode))" ++{ ++ switch (which_alternative) ++ { ++ case 0: return "ld1\t{%0.}, %1"; ++ case 1: return "st1\t{%1.}, %0"; ++ case 2: return "orr\t%0., %1., %1."; ++ case 3: return "umov\t%0, %1.d[0]"; ++ case 4: return "ins\t%0.d[0], %1"; ++ case 5: return "mov\t%0, %1"; ++ case 6: ++ { ++ int is_valid; ++ unsigned char widthc; ++ int width; ++ static char templ[40]; ++ int shift = 0, mvn = 0; ++ const char *mnemonic; ++ int length = 0; ++ ++ is_valid = ++ aarch64_simd_immediate_valid_for_move (operands[1], mode, ++ &operands[1], &width, &widthc, ++ &mvn, &shift); ++ gcc_assert (is_valid != 0); ++ ++ mnemonic = mvn ? "mvni" : "movi"; ++ if (widthc != 'd') ++ length += snprintf (templ, sizeof (templ), ++ "%s\t%%0.%d%c, %%1", ++ mnemonic, 64 / width, widthc); ++ else ++ length += snprintf (templ, sizeof (templ), "%s\t%%d0, %%1", mnemonic); ++ ++ if (shift != 0) ++ length += snprintf (templ + length, sizeof (templ) - length, ++ ", lsl %d", shift); ++ return templ; ++ } ++ default: gcc_unreachable (); ++ } ++} ++ [(set_attr "simd_type" "simd_load1,simd_store1,simd_move,simd_movgp,simd_insgp,simd_move,simd_move_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "*aarch64_simd_mov" ++ [(set (match_operand:VQ 0 "aarch64_simd_nonimmediate_operand" ++ "=w, Utv, w, ?r, ?w, ?r, w") ++ (match_operand:VQ 1 "aarch64_simd_general_operand" ++ "Utv, w, w, w, r, r, Dn"))] ++ "TARGET_SIMD ++ && (register_operand (operands[0], mode) ++ || register_operand (operands[1], mode))" ++{ ++ switch (which_alternative) ++ { ++ case 0: return "ld1\t{%0.}, %1"; ++ case 1: return "st1\t{%1.}, %0"; ++ case 2: return "orr\t%0., %1., %1."; ++ case 3: return "umov\t%0, %1.d[0]\;umov\t%H0, %1.d[1]"; ++ case 4: return "ins\t%0.d[0], %1\;ins\t%0.d[1], %H1"; ++ case 5: return "#"; ++ case 6: ++ { ++ int is_valid; ++ unsigned char widthc; ++ int width; ++ static char templ[40]; ++ int shift = 0, mvn = 0; ++ ++ is_valid = ++ aarch64_simd_immediate_valid_for_move (operands[1], mode, ++ &operands[1], &width, &widthc, ++ &mvn, &shift); ++ gcc_assert (is_valid != 0); ++ if (shift) ++ snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, %%1, lsl %d", ++ mvn ? "mvni" : "movi", ++ 128 / width, widthc, shift); ++ else ++ snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, %%1", ++ mvn ? "mvni" : "movi", ++ 128 / width, widthc); ++ return templ; ++ } ++ default: gcc_unreachable (); ++ } ++} ++ [(set_attr "simd_type" "simd_load1,simd_store1,simd_move,simd_movgp,simd_insgp,simd_move,simd_move_imm") ++ (set_attr "simd_mode" "") ++ (set_attr "length" "4,4,4,8,8,8,4")] ++) ++ ++(define_split ++ [(set (match_operand:VQ 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed ++ && GP_REGNUM_P (REGNO (operands[0])) ++ && GP_REGNUM_P (REGNO (operands[1]))" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) (match_dup 3))] ++{ ++ int rdest = REGNO (operands[0]); ++ int rsrc = REGNO (operands[1]); ++ rtx dest[2], src[2]; ++ ++ dest[0] = gen_rtx_REG (DImode, rdest); ++ src[0] = gen_rtx_REG (DImode, rsrc); ++ dest[1] = gen_rtx_REG (DImode, rdest + 1); ++ src[1] = gen_rtx_REG (DImode, rsrc + 1); ++ ++ aarch64_simd_disambiguate_copy (operands, dest, src, 2); ++}) ++ ++(define_insn "orn3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ior:VDQ (not:VDQ (match_operand:VDQ 1 "register_operand" "w")) ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "orn\t%0., %2., %1." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "bic3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (and:VDQ (not:VDQ (match_operand:VDQ 1 "register_operand" "w")) ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "bic\t%0., %2., %1." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "add3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (plus:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "add\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "sub3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (minus:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "sub\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "mul3" ++ [(set (match_operand:VDQM 0 "register_operand" "=w") ++ (mult:VDQM (match_operand:VDQM 1 "register_operand" "w") ++ (match_operand:VDQM 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "mul\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "neg2" ++ [(set (match_operand:VDQM 0 "register_operand" "=w") ++ (neg:VDQM (match_operand:VDQM 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "neg\t%0., %1." ++ [(set_attr "simd_type" "simd_negabs") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "abs2" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (abs:VDQ (match_operand:VDQ 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "abs\t%0., %1." ++ [(set_attr "simd_type" "simd_negabs") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "and3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (and:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "and\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "ior3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ior:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "orr\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "xor3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (xor:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "eor\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "one_cmpl2" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (not:VDQ (match_operand:VDQ 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "not\t%0., %1." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_vec_set" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (vec_merge:VQ_S ++ (vec_duplicate:VQ_S ++ (match_operand: 1 "register_operand" "r")) ++ (match_operand:VQ_S 3 "register_operand" "0") ++ (match_operand:SI 2 "immediate_operand" "i")))] ++ "TARGET_SIMD" ++ "ins\t%0.[%p2], %w1"; ++ [(set_attr "simd_type" "simd_insgp") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_lshr" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (lshiftrt:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "aarch64_simd_rshift_imm" "Dr")))] ++ "TARGET_SIMD" ++ "ushr\t%0., %1., %2" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_ashr" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ashiftrt:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "aarch64_simd_rshift_imm" "Dr")))] ++ "TARGET_SIMD" ++ "sshr\t%0., %1., %2" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_imm_shl" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ashift:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "aarch64_simd_lshift_imm" "Dl")))] ++ "TARGET_SIMD" ++ "shl\t%0., %1., %2" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_reg_sshl" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ashift:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "sshl\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_reg_shl_unsigned" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (unspec:VDQ [(match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")] ++ UNSPEC_ASHIFT_UNSIGNED))] ++ "TARGET_SIMD" ++ "ushl\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_reg_shl_signed" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (unspec:VDQ [(match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")] ++ UNSPEC_ASHIFT_SIGNED))] ++ "TARGET_SIMD" ++ "sshl\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "ashl3" ++ [(match_operand:VDQ 0 "register_operand" "") ++ (match_operand:VDQ 1 "register_operand" "") ++ (match_operand:SI 2 "general_operand" "")] ++ "TARGET_SIMD" ++{ ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ int shift_amount; ++ ++ if (CONST_INT_P (operands[2])) ++ { ++ shift_amount = INTVAL (operands[2]); ++ if (shift_amount >= 0 && shift_amount < bit_width) ++ { ++ rtx tmp = aarch64_simd_gen_const_vector_dup (mode, ++ shift_amount); ++ emit_insn (gen_aarch64_simd_imm_shl (operands[0], ++ operands[1], ++ tmp)); ++ DONE; ++ } ++ else ++ { ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ } ++ else if (MEM_P (operands[2])) ++ { ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ ++ if (REG_P (operands[2])) ++ { ++ rtx tmp = gen_reg_rtx (mode); ++ emit_insn (gen_aarch64_simd_dup (tmp, ++ convert_to_mode (mode, ++ operands[2], ++ 0))); ++ emit_insn (gen_aarch64_simd_reg_sshl (operands[0], operands[1], ++ tmp)); ++ DONE; ++ } ++ else ++ FAIL; ++} ++) ++ ++(define_expand "lshr3" ++ [(match_operand:VDQ 0 "register_operand" "") ++ (match_operand:VDQ 1 "register_operand" "") ++ (match_operand:SI 2 "general_operand" "")] ++ "TARGET_SIMD" ++{ ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ int shift_amount; ++ ++ if (CONST_INT_P (operands[2])) ++ { ++ shift_amount = INTVAL (operands[2]); ++ if (shift_amount > 0 && shift_amount <= bit_width) ++ { ++ rtx tmp = aarch64_simd_gen_const_vector_dup (mode, ++ shift_amount); ++ emit_insn (gen_aarch64_simd_lshr (operands[0], ++ operands[1], ++ tmp)); ++ DONE; ++ } ++ else ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ else if (MEM_P (operands[2])) ++ { ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ ++ if (REG_P (operands[2])) ++ { ++ rtx tmp = gen_reg_rtx (SImode); ++ rtx tmp1 = gen_reg_rtx (mode); ++ emit_insn (gen_negsi2 (tmp, operands[2])); ++ emit_insn (gen_aarch64_simd_dup (tmp1, ++ convert_to_mode (mode, ++ tmp, 0))); ++ emit_insn (gen_aarch64_simd_reg_shl_unsigned (operands[0], ++ operands[1], ++ tmp1)); ++ DONE; ++ } ++ else ++ FAIL; ++} ++) ++ ++(define_expand "ashr3" ++ [(match_operand:VDQ 0 "register_operand" "") ++ (match_operand:VDQ 1 "register_operand" "") ++ (match_operand:SI 2 "general_operand" "")] ++ "TARGET_SIMD" ++{ ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ int shift_amount; ++ ++ if (CONST_INT_P (operands[2])) ++ { ++ shift_amount = INTVAL (operands[2]); ++ if (shift_amount > 0 && shift_amount <= bit_width) ++ { ++ rtx tmp = aarch64_simd_gen_const_vector_dup (mode, ++ shift_amount); ++ emit_insn (gen_aarch64_simd_ashr (operands[0], ++ operands[1], ++ tmp)); ++ DONE; ++ } ++ else ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ else if (MEM_P (operands[2])) ++ { ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ ++ if (REG_P (operands[2])) ++ { ++ rtx tmp = gen_reg_rtx (SImode); ++ rtx tmp1 = gen_reg_rtx (mode); ++ emit_insn (gen_negsi2 (tmp, operands[2])); ++ emit_insn (gen_aarch64_simd_dup (tmp1, ++ convert_to_mode (mode, ++ tmp, 0))); ++ emit_insn (gen_aarch64_simd_reg_shl_signed (operands[0], ++ operands[1], ++ tmp1)); ++ DONE; ++ } ++ else ++ FAIL; ++} ++) ++ ++(define_expand "vashl3" ++ [(match_operand:VDQ 0 "register_operand" "") ++ (match_operand:VDQ 1 "register_operand" "") ++ (match_operand:VDQ 2 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_aarch64_simd_reg_sshl (operands[0], operands[1], ++ operands[2])); ++ DONE; ++}) ++ ++;; Using mode VQ_S as there is no V2DImode neg! ++;; Negating individual lanes most certainly offsets the ++;; gain from vectorization. ++(define_expand "vashr3" ++ [(match_operand:VQ_S 0 "register_operand" "") ++ (match_operand:VQ_S 1 "register_operand" "") ++ (match_operand:VQ_S 2 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx neg = gen_reg_rtx (mode); ++ emit (gen_neg2 (neg, operands[2])); ++ emit_insn (gen_aarch64_simd_reg_shl_signed (operands[0], operands[1], ++ neg)); ++ DONE; ++}) ++ ++(define_expand "vlshr3" ++ [(match_operand:VQ_S 0 "register_operand" "") ++ (match_operand:VQ_S 1 "register_operand" "") ++ (match_operand:VQ_S 2 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx neg = gen_reg_rtx (mode); ++ emit (gen_neg2 (neg, operands[2])); ++ emit_insn (gen_aarch64_simd_reg_shl_unsigned (operands[0], operands[1], ++ neg)); ++ DONE; ++}) ++ ++(define_expand "vec_set" ++ [(match_operand:VQ_S 0 "register_operand" "+w") ++ (match_operand: 1 "register_operand" "r") ++ (match_operand:SI 2 "immediate_operand" "")] ++ "TARGET_SIMD" ++ { ++ HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]); ++ emit_insn (gen_aarch64_simd_vec_set (operands[0], operands[1], ++ GEN_INT (elem), operands[0])); ++ DONE; ++ } ++) ++ ++(define_insn "aarch64_simd_vec_setv2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (vec_merge:V2DI ++ (vec_duplicate:V2DI ++ (match_operand:DI 1 "register_operand" "r")) ++ (match_operand:V2DI 3 "register_operand" "0") ++ (match_operand:SI 2 "immediate_operand" "i")))] ++ "TARGET_SIMD" ++ "ins\t%0.d[%p2], %1"; ++ [(set_attr "simd_type" "simd_insgp") ++ (set_attr "simd_mode" "V2DI")] ++) ++ ++(define_expand "vec_setv2di" ++ [(match_operand:V2DI 0 "register_operand" "+w") ++ (match_operand:DI 1 "register_operand" "r") ++ (match_operand:SI 2 "immediate_operand" "")] ++ "TARGET_SIMD" ++ { ++ HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]); ++ emit_insn (gen_aarch64_simd_vec_setv2di (operands[0], operands[1], ++ GEN_INT (elem), operands[0])); ++ DONE; ++ } ++) ++ ++(define_insn "aarch64_simd_vec_set" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (vec_merge:VDQF ++ (vec_duplicate:VDQF ++ (match_operand: 1 "register_operand" "w")) ++ (match_operand:VDQF 3 "register_operand" "0") ++ (match_operand:SI 2 "immediate_operand" "i")))] ++ "TARGET_SIMD" ++ "ins\t%0.[%p2], %1.[0]"; ++ [(set_attr "simd_type" "simd_ins") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_set" ++ [(match_operand:VDQF 0 "register_operand" "+w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "")] ++ "TARGET_SIMD" ++ { ++ HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]); ++ emit_insn (gen_aarch64_simd_vec_set (operands[0], operands[1], ++ GEN_INT (elem), operands[0])); ++ DONE; ++ } ++) ++ ++ ++(define_insn "aarch64_mla" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (plus:VQ_S (mult:VQ_S (match_operand:VQ_S 2 "register_operand" "w") ++ (match_operand:VQ_S 3 "register_operand" "w")) ++ (match_operand:VQ_S 1 "register_operand" "0")))] ++ "TARGET_SIMD" ++ "mla\t%0., %2., %3." ++ [(set_attr "simd_type" "simd_mla") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_mls" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (minus:VQ_S (match_operand:VQ_S 1 "register_operand" "0") ++ (mult:VQ_S (match_operand:VQ_S 2 "register_operand" "w") ++ (match_operand:VQ_S 3 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "mls\t%0., %2., %3." ++ [(set_attr "simd_type" "simd_mla") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Max/Min operations. ++(define_insn "3" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (MAXMIN:VQ_S (match_operand:VQ_S 1 "register_operand" "w") ++ (match_operand:VQ_S 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_minmax") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Move into low-half clearing high half to 0. ++ ++(define_insn "move_lo_quad_" ++ [(set (match_operand:VQ 0 "register_operand" "=w") ++ (vec_concat:VQ ++ (match_operand: 1 "register_operand" "w") ++ (vec_duplicate: (const_int 0))))] ++ "TARGET_SIMD" ++ "mov\\t%d0, %d1"; ++ [(set_attr "simd_type" "simd_dup") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Move into high-half. ++ ++(define_insn "aarch64_simd_move_hi_quad_" ++ [(set (match_operand:VQ 0 "register_operand" "+w") ++ (vec_concat:VQ ++ (vec_select: ++ (match_dup 0) ++ (match_operand:VQ 2 "vect_par_cnst_lo_half" "")) ++ (match_operand: 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "ins\\t%0.d[1], %1.d[0]"; ++ [(set_attr "simd_type" "simd_ins") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "move_hi_quad_" ++ [(match_operand:VQ 0 "register_operand" "") ++ (match_operand: 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, false); ++ emit_insn (gen_aarch64_simd_move_hi_quad_ (operands[0], ++ operands[1], p)); ++ DONE; ++}) ++ ++;; Narrowing operations. ++ ++;; For doubles. ++(define_insn "aarch64_simd_vec_pack_trunc_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (truncate: (match_operand:VQN 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "xtn\\t%0., %1." ++ [(set_attr "simd_type" "simd_shiftn_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_pack_trunc_" ++ [(match_operand: 0 "register_operand" "") ++ (match_operand:VDN 1 "register_operand" "") ++ (match_operand:VDN 2 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx tempreg = gen_reg_rtx (mode); ++ ++ emit_insn (gen_move_lo_quad_ (tempreg, operands[1])); ++ emit_insn (gen_move_hi_quad_ (tempreg, operands[2])); ++ emit_insn (gen_aarch64_simd_vec_pack_trunc_ (operands[0], tempreg)); ++ DONE; ++}) ++ ++;; For quads. ++ ++(define_insn "vec_pack_trunc_" ++ [(set (match_operand: 0 "register_operand" "+&w") ++ (vec_concat: ++ (truncate: (match_operand:VQN 1 "register_operand" "w")) ++ (truncate: (match_operand:VQN 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "xtn\\t%0., %1.\;xtn2\\t%0., %2." ++ [(set_attr "simd_type" "simd_shiftn2_imm") ++ (set_attr "simd_mode" "") ++ (set_attr "length" "8")] ++) ++ ++;; Widening operations. ++ ++(define_insn "aarch64_simd_vec_unpack_lo_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "vect_par_cnst_lo_half" "") ++ )))] ++ "TARGET_SIMD" ++ "shll %0., %1., 0" ++ [(set_attr "simd_type" "simd_shiftl_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_vec_unpack_hi_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "vect_par_cnst_hi_half" "") ++ )))] ++ "TARGET_SIMD" ++ "shll2 %0., %1., 0" ++ [(set_attr "simd_type" "simd_shiftl_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_unpack_hi_" ++ [(match_operand: 0 "register_operand" "") ++ (ANY_EXTEND: (match_operand:VQW 1 "register_operand"))] ++ "TARGET_SIMD" ++ { ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_simd_vec_unpack_hi_ (operands[0], ++ operands[1], p)); ++ DONE; ++ } ++) ++ ++(define_expand "vec_unpack_lo_" ++ [(match_operand: 0 "register_operand" "") ++ (ANY_EXTEND: (match_operand:VQW 1 "register_operand" ""))] ++ "TARGET_SIMD" ++ { ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, false); ++ emit_insn (gen_aarch64_simd_vec_unpack_lo_ (operands[0], ++ operands[1], p)); ++ DONE; ++ } ++) ++ ++;; Widening arithmetic. ++ ++(define_insn "aarch64_simd_vec_mult_lo_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (mult: (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_lo_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_dup 3)))))] ++ "TARGET_SIMD" ++ "mull %0., %1., %2." ++ [(set_attr "simd_type" "simd_mull") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_widen_mult_lo_" ++ [(match_operand: 0 "register_operand" "") ++ (ANY_EXTEND: (match_operand:VQW 1 "register_operand" "")) ++ (ANY_EXTEND: (match_operand:VQW 2 "register_operand" ""))] ++ "TARGET_SIMD" ++ { ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, false); ++ emit_insn (gen_aarch64_simd_vec_mult_lo_ (operands[0], ++ operands[1], ++ operands[2], p)); ++ DONE; ++ } ++) ++ ++(define_insn "aarch64_simd_vec_mult_hi_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (mult: (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_hi_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_dup 3)))))] ++ "TARGET_SIMD" ++ "mull2 %0., %1., %2." ++ [(set_attr "simd_type" "simd_mull") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_widen_mult_hi_" ++ [(match_operand: 0 "register_operand" "") ++ (ANY_EXTEND: (match_operand:VQW 1 "register_operand" "")) ++ (ANY_EXTEND: (match_operand:VQW 2 "register_operand" ""))] ++ "TARGET_SIMD" ++ { ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_simd_vec_mult_hi_ (operands[0], ++ operands[1], ++ operands[2], p)); ++ DONE; ++ ++ } ++) ++ ++;; FP vector operations. ++;; AArch64 AdvSIMD supports single-precision (32-bit) and ++;; double-precision (64-bit) floating-point data types and arithmetic as ++;; defined by the IEEE 754-2008 standard. This makes them vectorizable ++;; without the need for -ffast-math or -funsafe-math-optimizations. ++;; ++;; Floating-point operations can raise an exception. Vectorizing such ++;; operations are safe because of reasons explained below. ++;; ++;; ARMv8 permits an extension to enable trapped floating-point ++;; exception handling, however this is an optional feature. In the ++;; event of a floating-point exception being raised by vectorised ++;; code then: ++;; 1. If trapped floating-point exceptions are available, then a trap ++;; will be taken when any lane raises an enabled exception. A trap ++;; handler may determine which lane raised the exception. ++;; 2. Alternatively a sticky exception flag is set in the ++;; floating-point status register (FPSR). Software may explicitly ++;; test the exception flags, in which case the tests will either ++;; prevent vectorisation, allowing precise identification of the ++;; failing operation, or if tested outside of vectorisable regions ++;; then the specific operation and lane are not of interest. ++ ++;; FP arithmetic operations. ++ ++(define_insn "add3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (plus:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fadd\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fadd") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "sub3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (minus:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fsub\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fadd") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "mul3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (mult:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fmul\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fmul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "div3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (div:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fdiv\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fdiv") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "neg2" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (neg:VDQF (match_operand:VDQF 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fneg\\t%0., %1." ++ [(set_attr "simd_type" "simd_fnegabs") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "abs2" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (abs:VDQF (match_operand:VDQF 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fabs\\t%0., %1." ++ [(set_attr "simd_type" "simd_fnegabs") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "fma4" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (fma:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w") ++ (match_operand:VDQF 3 "register_operand" "0")))] ++ "TARGET_SIMD" ++ "fmla\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fmla") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_vmls" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (minus:VDQF (match_operand:VDQF 1 "register_operand" "0") ++ (mult:VDQF (match_operand:VDQF 2 "register_operand" "w") ++ (match_operand:VDQF 3 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "fmls\\t%0., %2., %3." ++ [(set_attr "simd_type" "simd_fmla") ++ (set_attr "simd_mode" "")] ++) ++ ++;; FP Max/Min ++;; Max/Min are introduced by idiom recognition by GCC's mid-end. An ++;; expression like: ++;; a = (b < c) ? b : c; ++;; is idiom-matched as MIN_EXPR only if -ffinite-math-only is enabled ++;; either explicitly or indirectly via -ffast-math. ++;; ++;; MIN_EXPR and MAX_EXPR eventually map to 'smin' and 'smax' in RTL. ++;; The 'smax' and 'smin' RTL standard pattern names do not specify which ++;; operand will be returned when both operands are zero (i.e. they may not ++;; honour signed zeroes), or when either operand is NaN. Therefore GCC ++;; only introduces MIN_EXPR/MAX_EXPR in fast math mode or when not honouring ++;; NaNs. ++ ++(define_insn "smax3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (smax:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fmaxnm\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fminmax") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "smin3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (smin:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fminnm\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fminmax") ++ (set_attr "simd_mode" "")] ++) ++ ++;; FP 'across lanes' max and min ops. ++ ++(define_insn "reduc_s_v4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "w")] ++ FMAXMINV))] ++ "TARGET_SIMD" ++ "fnmv\\t%s0, %1.4s"; ++ [(set_attr "simd_type" "simd_fminmaxv") ++ (set_attr "simd_mode" "V4SF")] ++) ++ ++(define_insn "reduc_s_" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ FMAXMINV))] ++ "TARGET_SIMD" ++ "fnmp\\t%0., %1., %1."; ++ [(set_attr "simd_type" "simd_fminmax") ++ (set_attr "simd_mode" "")] ++) ++ ++;; FP 'across lanes' add. ++ ++(define_insn "aarch64_addvv4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "w")] ++ UNSPEC_FADDV))] ++ "TARGET_SIMD" ++ "faddp\\t%0.4s, %1.4s, %1.4s" ++ [(set_attr "simd_type" "simd_fadd") ++ (set_attr "simd_mode" "V4SF")] ++) ++ ++(define_expand "reduc_uplus_v4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (match_operand:V4SF 1 "register_operand" "w"))] ++ "TARGET_SIMD" ++{ ++ rtx tmp = gen_reg_rtx (V4SFmode); ++ emit_insn (gen_aarch64_addvv4sf (tmp, operands[1])); ++ emit_insn (gen_aarch64_addvv4sf (operands[0], tmp)); ++ DONE; ++}) ++ ++(define_expand "reduc_splus_v4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (match_operand:V4SF 1 "register_operand" "w"))] ++ "TARGET_SIMD" ++{ ++ rtx tmp = gen_reg_rtx (V4SFmode); ++ emit_insn (gen_aarch64_addvv4sf (tmp, operands[1])); ++ emit_insn (gen_aarch64_addvv4sf (operands[0], tmp)); ++ DONE; ++}) ++ ++(define_insn "aarch64_addv" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ UNSPEC_FADDV))] ++ "TARGET_SIMD" ++ "faddp\\t%0, %1." ++ [(set_attr "simd_type" "simd_fadd") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "reduc_uplus_" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ UNSPEC_FADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_expand "reduc_splus_" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ UNSPEC_FADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++;; Reduction across lanes. ++ ++(define_insn "aarch64_addv" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "addv\\t%0, %1." ++ [(set_attr "simd_type" "simd_addv") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "reduc_splus_" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_expand "reduc_uplus_" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_insn "aarch64_addvv2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "addp\\t%d0, %1.2d" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "V2DI")] ++) ++ ++(define_expand "reduc_uplus_v2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_expand "reduc_splus_v2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_insn "aarch64_addvv2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "addp\\t%0.2s, %1.2s, %1.2s" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "V2SI")] ++) ++ ++(define_expand "reduc_uplus_v2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_expand "reduc_splus_v2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_insn "reduc__" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ MAXMINV))] ++ "TARGET_SIMD" ++ "v\\t%0, %1." ++ [(set_attr "simd_type" "simd_minmaxv") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "reduc__v2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ MAXMINV))] ++ "TARGET_SIMD" ++ "p\\t%0.2s, %1.2s, %1.2s" ++ [(set_attr "simd_type" "simd_minmax") ++ (set_attr "simd_mode" "V2SI")] ++) ++ ++;; Patterns for AArch64 SIMD Intrinsics. ++ ++(define_expand "aarch64_create" ++ [(match_operand:VD_RE 0 "register_operand" "") ++ (match_operand:DI 1 "general_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx src = gen_lowpart (mode, operands[1]); ++ emit_move_insn (operands[0], src); ++ DONE; ++}) ++ ++(define_insn "aarch64_get_lane_signed" ++ [(set (match_operand: 0 "register_operand" "=r") ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_S 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))] ++ "TARGET_SIMD" ++ "smov\\t%0, %1.[%2]" ++ [(set_attr "simd_type" "simd_movgp") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_get_lane_unsigned" ++ [(set (match_operand: 0 "register_operand" "=r") ++ (zero_extend: ++ (vec_select: ++ (match_operand:VDQ 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))] ++ "TARGET_SIMD" ++ "umov\\t%0, %1.[%2]" ++ [(set_attr "simd_type" "simd_movgp") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_get_lane" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (vec_select: ++ (match_operand:VDQF 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")])))] ++ "TARGET_SIMD" ++ "mov\\t%0.[0], %1.[%2]" ++ [(set_attr "simd_type" "simd_ins") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_get_lanedi" ++ [(match_operand:DI 0 "register_operand" "=r") ++ (match_operand:DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[2], 0, 1); ++ emit_move_insn (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv8qi" ++ [(match_operand:V8QI 0 "register_operand" "") ++ (match_operand:VDC 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv4hi" ++ [(match_operand:V4HI 0 "register_operand" "") ++ (match_operand:VDC 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv2si" ++ [(match_operand:V2SI 0 "register_operand" "") ++ (match_operand:VDC 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv2sf" ++ [(match_operand:V2SF 0 "register_operand" "") ++ (match_operand:VDC 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretdi" ++ [(match_operand:DI 0 "register_operand" "") ++ (match_operand:VD_RE 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv16qi" ++ [(match_operand:V16QI 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv8hi" ++ [(match_operand:V8HI 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv4si" ++ [(match_operand:V4SI 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv4sf" ++ [(match_operand:V4SF 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv2di" ++ [(match_operand:V2DI 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv2df" ++ [(match_operand:V2DF 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++;; In this insn, operand 1 should be low, and operand 2 the high part of the ++;; dest vector. ++ ++(define_insn "*aarch64_combinez" ++ [(set (match_operand: 0 "register_operand" "=&w") ++ (vec_concat: ++ (match_operand:VDIC 1 "register_operand" "w") ++ (match_operand:VDIC 2 "aarch64_simd_imm_zero" "Dz")))] ++ "TARGET_SIMD" ++ "mov\\t%0.8b, %1.8b" ++ [(set_attr "simd_type" "simd_move") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_combine" ++ [(set (match_operand: 0 "register_operand" "=&w") ++ (vec_concat: (match_operand:VDC 1 "register_operand" "w") ++ (match_operand:VDC 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "mov\\t%0.d[0], %1.d[0]\;ins\\t%0.d[1], %2.d[0]" ++ [(set_attr "simd_type" "simd_ins") ++ (set_attr "simd_mode" "")] ++) ++ ++;; l. ++ ++(define_insn "aarch64_l2_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ADDSUB: (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_hi_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_dup 3)))))] ++ "TARGET_SIMD" ++ "l2 %0., %1., %2." ++ [(set_attr "simd_type" "simd_addl") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_saddl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_saddl2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_uaddl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_uaddl2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_ssubl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_ssubl2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_usubl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_usubl2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_insn "aarch64_l" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ADDSUB: (ANY_EXTEND: ++ (match_operand:VDW 1 "register_operand" "w")) ++ (ANY_EXTEND: ++ (match_operand:VDW 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "l %0., %1., %2." ++ [(set_attr "simd_type" "simd_addl") ++ (set_attr "simd_mode" "")] ++) ++ ++;; w. ++ ++(define_insn "aarch64_w" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ADDSUB: (match_operand: 1 "register_operand" "w") ++ (ANY_EXTEND: ++ (match_operand:VDW 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "w\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_addl") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_w2_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ADDSUB: (match_operand: 1 "register_operand" "w") ++ (ANY_EXTEND: ++ (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_hi_half" "")))))] ++ "TARGET_SIMD" ++ "w2\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_addl") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_saddw2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_saddw2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_uaddw2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_uaddw2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++ ++(define_expand "aarch64_ssubw2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_ssubw2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_usubw2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_usubw2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++;; h. ++ ++(define_insn "aarch64_h" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (unspec:VQ_S [(match_operand:VQ_S 1 "register_operand" "w") ++ (match_operand:VQ_S 2 "register_operand" "w")] ++ HADDSUB))] ++ "TARGET_SIMD" ++ "h\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++;; hn. ++ ++(define_insn "aarch64_hn" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VQN 1 "register_operand" "w") ++ (match_operand:VQN 2 "register_operand" "w")] ++ ADDSUBHN))] ++ "TARGET_SIMD" ++ "hn\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_addn") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_hn2" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand: 1 "register_operand" "0") ++ (match_operand:VQN 2 "register_operand" "w") ++ (match_operand:VQN 3 "register_operand" "w")] ++ ADDSUBHN2))] ++ "TARGET_SIMD" ++ "hn2\\t%0., %2., %3." ++ [(set_attr "simd_type" "simd_addn2") ++ (set_attr "simd_mode" "")] ++) ++ ++;; pmul. ++ ++(define_insn "aarch64_pmul" ++ [(set (match_operand:VB 0 "register_operand" "=w") ++ (unspec:VB [(match_operand:VB 1 "register_operand" "w") ++ (match_operand:VB 2 "register_operand" "w")] ++ UNSPEC_PMUL))] ++ "TARGET_SIMD" ++ "pmul\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; q ++ ++(define_insn "aarch64_" ++ [(set (match_operand:VSDQ_I 0 "register_operand" "=w") ++ (BINQOPS:VSDQ_I (match_operand:VSDQ_I 1 "register_operand" "w") ++ (match_operand:VSDQ_I 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "\\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++;; suqadd and usqadd ++ ++(define_insn "aarch64_qadd" ++ [(set (match_operand:VSDQ_I 0 "register_operand" "=w") ++ (unspec:VSDQ_I [(match_operand:VSDQ_I 1 "register_operand" "0") ++ (match_operand:VSDQ_I 2 "register_operand" "w")] ++ USSUQADD))] ++ "TARGET_SIMD" ++ "qadd\\t%0, %2" ++ [(set_attr "simd_type" "simd_sat_add") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqmovun ++ ++(define_insn "aarch64_sqmovun" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VSQN_HSDI 1 "register_operand" "w")] ++ UNSPEC_SQXTUN))] ++ "TARGET_SIMD" ++ "sqxtun\\t%0, %1" ++ [(set_attr "simd_type" "simd_sat_shiftn_imm") ++ (set_attr "simd_mode" "")] ++ ) ++ ++;; sqmovn and uqmovn ++ ++(define_insn "aarch64_qmovn" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VSQN_HSDI 1 "register_operand" "w")] ++ SUQMOVN))] ++ "TARGET_SIMD" ++ "qxtn\\t%0, %1" ++ [(set_attr "simd_type" "simd_sat_shiftn_imm") ++ (set_attr "simd_mode" "")] ++ ) ++ ++;; q ++ ++(define_insn "aarch64_s" ++ [(set (match_operand:VSDQ_I_BHSI 0 "register_operand" "=w") ++ (UNQOPS:VSDQ_I_BHSI ++ (match_operand:VSDQ_I_BHSI 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "s\\t%0, %1" ++ [(set_attr "simd_type" "simd_sat_negabs") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqdmulh. ++ ++(define_insn "aarch64_sqdmulh" ++ [(set (match_operand:VSDQ_HSI 0 "register_operand" "=w") ++ (unspec:VSDQ_HSI ++ [(match_operand:VSDQ_HSI 1 "register_operand" "w") ++ (match_operand:VSDQ_HSI 2 "register_operand" "w")] ++ VQDMULH))] ++ "TARGET_SIMD" ++ "sqdmulh\\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqdmulh_lane ++ ++(define_insn "aarch64_sqdmulh_lane" ++ [(set (match_operand:VSDQ_HSI 0 "register_operand" "=w") ++ (unspec:VSDQ_HSI ++ [(match_operand:VSDQ_HSI 1 "register_operand" "w") ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")]))] ++ VQDMULH))] ++ "TARGET_SIMD" ++ "* ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); ++ return \"sqdmulh\\t%0, %1, %2.[%3]\";" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqdml[sa]l ++ ++(define_insn "aarch64_sqdmll" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VSD_HSI 2 "register_operand" "w")) ++ (sign_extend: ++ (match_operand:VSD_HSI 3 "register_operand" "w"))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll\\t%0, %2, %3" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqdml[sa]l_lane ++ ++(define_insn "aarch64_sqdmll_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VD_HSI 2 "register_operand" "w")) ++ (sign_extend: ++ (vec_duplicate:VD_HSI ++ (vec_select: ++ (match_operand: 3 "register_operand" "") ++ (parallel [(match_operand:SI 4 "immediate_operand" "i")]))) ++ )) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll\\t%0, %2, %3.[%4]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_sqdmll_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:SD_HSI 2 "register_operand" "w")) ++ (sign_extend: ++ (vec_select: ++ (match_operand: 3 "register_operand" "") ++ (parallel [(match_operand:SI 4 "immediate_operand" "i")]))) ++ ) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll\\t%0, %2, %3.[%4]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmlal_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "0") ++ (match_operand:VSD_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmlal_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4])); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlal_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "0") ++ (match_operand:VSD_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmlal_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4])); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "0") ++ (match_operand:VSD_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmlsl_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4])); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "0") ++ (match_operand:VSD_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmlsl_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4])); ++ DONE; ++}) ++ ++;; vqdml[sa]l_n ++ ++(define_insn "aarch64_sqdmll_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VD_HSI 2 "register_operand" "w")) ++ (sign_extend: ++ (vec_duplicate:VD_HSI ++ (match_operand: 3 "register_operand" "w")))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll\\t%0, %2, %3.[0]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqdml[as]l2 ++ ++(define_insn "aarch64_sqdmll2_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 4 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 3 "register_operand" "w") ++ (match_dup 4)))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll2\\t%0, %2, %3" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmlal2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 3 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmlal2_internal (operands[0], operands[1], ++ operands[2], operands[3], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 3 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmlsl2_internal (operands[0], operands[1], ++ operands[2], operands[3], p)); ++ DONE; ++}) ++ ++;; vqdml[sa]l2_lane ++ ++(define_insn "aarch64_sqdmll2_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 5 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_duplicate: ++ (vec_select: ++ (match_operand: 3 "register_operand" "") ++ (parallel [(match_operand:SI 4 "immediate_operand" "i")]) ++ )))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll2\\t%0, %2, %3.[%4]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmlal2_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmlal2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlal2_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmlal2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl2_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmlsl2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl2_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmlsl2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], p)); ++ DONE; ++}) ++ ++(define_insn "aarch64_sqdmll2_n_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 4 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_duplicate: ++ (match_operand: 3 "register_operand" "w")))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll2\\t%0, %2, %3.[0]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmlal2_n" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmlal2_n_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl2_n" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmlsl2_n_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ p)); ++ DONE; ++}) ++ ++;; vqdmull ++ ++(define_insn "aarch64_sqdmull" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VSD_HSI 1 "register_operand" "w")) ++ (sign_extend: ++ (match_operand:VSD_HSI 2 "register_operand" "w"))) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull\\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqdmull_lane ++ ++(define_insn "aarch64_sqdmull_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VD_HSI 1 "register_operand" "w")) ++ (sign_extend: ++ (vec_duplicate:VD_HSI ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")]))) ++ )) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull\\t%0, %1, %2.[%3]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_sqdmull_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:SD_HSI 1 "register_operand" "w")) ++ (sign_extend: ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")])) ++ )) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull\\t%0, %1, %2.[%3]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmull_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VSD_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmull_lane_internal (operands[0], operands[1], ++ operands[2], operands[3])); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmull_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VD_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmull_lane_internal ++ (operands[0], operands[1], operands[2], operands[3])); ++ DONE; ++}) ++ ++;; vqdmull_n ++ ++(define_insn "aarch64_sqdmull_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VD_HSI 1 "register_operand" "w")) ++ (sign_extend: ++ (vec_duplicate:VD_HSI ++ (match_operand: 2 "register_operand" "w"))) ++ ) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull\\t%0, %1, %2.[0]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqdmull2 ++ ++ ++ ++(define_insn "aarch64_sqdmull2_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand:VQ_HSI 3 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_dup 3))) ++ ) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull2\\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmull2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmull2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++;; vqdmull2_lane ++ ++(define_insn "aarch64_sqdmull2_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand:VQ_HSI 4 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_duplicate: ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")]))) ++ )) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull2\\t%0, %1, %2.[%3]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmull2_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmull2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmull2_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmull2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ p)); ++ DONE; ++}) ++ ++;; vqdmull2_n ++ ++(define_insn "aarch64_sqdmull2_n_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand:VQ_HSI 3 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_duplicate: ++ (match_operand: 2 "register_operand" "w"))) ++ ) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull2\\t%0, %1, %2.[0]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmull2_n" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmull2_n_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++;; vshl ++ ++(define_insn "aarch64_shl" ++ [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (unspec:VSDQ_I_DI ++ [(match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:VSDQ_I_DI 2 "register_operand" "w")] ++ VSHL))] ++ "TARGET_SIMD" ++ "shl\\t%0, %1, %2"; ++ [(set_attr "simd_type" "simd_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++ ++;; vqshl ++ ++(define_insn "aarch64_qshl" ++ [(set (match_operand:VSDQ_I 0 "register_operand" "=w") ++ (unspec:VSDQ_I ++ [(match_operand:VSDQ_I 1 "register_operand" "w") ++ (match_operand:VSDQ_I 2 "register_operand" "w")] ++ VQSHL))] ++ "TARGET_SIMD" ++ "qshl\\t%0, %1, %2"; ++ [(set_attr "simd_type" "simd_sat_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vshl_n ++ ++(define_expand "aarch64_sshl_n" ++ [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_ashl3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++(define_expand "aarch64_ushl_n" ++ [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_ashl3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++;; vshll_n ++ ++(define_insn "aarch64_shll_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VDW 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VSHLL))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 0, bit_width + 1); ++ if (INTVAL (operands[2]) == bit_width) ++ { ++ return \"shll\\t%0., %1., %2\"; ++ } ++ else { ++ return \"shll\\t%0., %1., %2\"; ++ }" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vshll_high_n ++ ++(define_insn "aarch64_shll2_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VQW 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VSHLL))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 0, bit_width + 1); ++ if (INTVAL (operands[2]) == bit_width) ++ { ++ return \"shll2\\t%0., %1., %2\"; ++ } ++ else { ++ return \"shll2\\t%0., %1., %2\"; ++ }" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vshr_n ++ ++(define_expand "aarch64_sshr_n" ++ [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_ashr3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++(define_expand "aarch64_ushr_n" ++ [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_lshr3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++;; vrshr_n ++ ++(define_insn "aarch64_shr_n" ++ [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (unspec:VSDQ_I_DI [(match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VRSHR_N))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 1, bit_width + 1); ++ return \"shr\\t%0, %1, %2\";" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++;; v(r)sra_n ++ ++(define_insn "aarch64_sra_n" ++ [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (unspec:VSDQ_I_DI [(match_operand:VSDQ_I_DI 1 "register_operand" "0") ++ (match_operand:VSDQ_I_DI 2 "register_operand" "w") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ VSRA))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[3], 1, bit_width + 1); ++ return \"sra\\t%0, %2, %3\";" ++ [(set_attr "simd_type" "simd_shift_imm_acc") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vsi_n ++ ++(define_insn "aarch64_si_n" ++ [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (unspec:VSDQ_I_DI [(match_operand:VSDQ_I_DI 1 "register_operand" "0") ++ (match_operand:VSDQ_I_DI 2 "register_operand" "w") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ VSLRI))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[3], 1 - , ++ bit_width - + 1); ++ return \"si\\t%0, %2, %3\";" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqshl(u) ++ ++(define_insn "aarch64_qshl_n" ++ [(set (match_operand:VSDQ_I 0 "register_operand" "=w") ++ (unspec:VSDQ_I [(match_operand:VSDQ_I 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VQSHL_N))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 0, bit_width); ++ return \"qshl\\t%0, %1, %2\";" ++ [(set_attr "simd_type" "simd_sat_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++ ++;; vq(r)shr(u)n_n ++ ++(define_insn "aarch64_qshrn_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VSQN_HSDI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VQSHRN_N))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 1, bit_width + 1); ++ return \"qshrn\\t%0, %1, %2\";" ++ [(set_attr "simd_type" "simd_sat_shiftn_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++ ++;; cm(eq|ge|le|lt|gt) ++ ++(define_insn "aarch64_cm" ++ [(set (match_operand: 0 "register_operand" "=w,w") ++ (unspec: ++ [(match_operand:VSDQ_I_DI 1 "register_operand" "w,w") ++ (match_operand:VSDQ_I_DI 2 "aarch64_simd_reg_or_zero" "w,Z")] ++ VCMP_S))] ++ "TARGET_SIMD" ++ "@ ++ cm\t%0, %1, %2 ++ cm\t%0, %1, #0" ++ [(set_attr "simd_type" "simd_cmp") ++ (set_attr "simd_mode" "")] ++) ++ ++;; cm(hs|hi|tst) ++ ++(define_insn "aarch64_cm" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: ++ [(match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:VSDQ_I_DI 2 "register_operand" "w")] ++ VCMP_U))] ++ "TARGET_SIMD" ++ "cm\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_cmp") ++ (set_attr "simd_mode" "")] ++) ++ ++;; addp ++ ++(define_insn "aarch64_addp" ++ [(set (match_operand:VD_BHSI 0 "register_operand" "=w") ++ (unspec:VD_BHSI ++ [(match_operand:VD_BHSI 1 "register_operand" "w") ++ (match_operand:VD_BHSI 2 "register_operand" "w")] ++ UNSPEC_ADDP))] ++ "TARGET_SIMD" ++ "addp\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_addpdi" ++ [(set (match_operand:DI 0 "register_operand" "=w") ++ (unspec:DI ++ [(match_operand:V2DI 1 "register_operand" "w")] ++ UNSPEC_ADDP))] ++ "TARGET_SIMD" ++ "addp\t%d0, %1.2d" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "DI")] ++) ++ ++;; v(max|min) ++ ++(define_expand "aarch64_" ++ [(set (match_operand:VDQ_BHSI 0 "register_operand" "=w") ++ (MAXMIN:VDQ_BHSI (match_operand:VDQ_BHSI 1 "register_operand" "w") ++ (match_operand:VDQ_BHSI 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++ ++(define_insn "aarch64_" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")] ++ FMAXMIN))] ++ "TARGET_SIMD" ++ "\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fminmax") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqrt ++ ++(define_insn "sqrt2" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (sqrt:VDQF (match_operand:VDQF 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fsqrt\\t%0., %1." ++ [(set_attr "simd_type" "simd_fsqrt") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqrt" ++ [(match_operand:VDQF 0 "register_operand" "=w") ++ (match_operand:VDQF 1 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_sqrt2 (operands[0], operands[1])); ++ DONE; ++}) ++ ++ ++;; Patterns for vector struct loads and stores. ++ ++(define_insn "vec_load_lanesoi" ++ [(set (match_operand:OI 0 "register_operand" "=w") ++ (unspec:OI [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_LD2))] ++ "TARGET_SIMD" ++ "ld2\\t{%S0. - %T0.}, %1" ++ [(set_attr "simd_type" "simd_load2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_store_lanesoi" ++ [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:OI [(match_operand:OI 1 "register_operand" "w") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST2))] ++ "TARGET_SIMD" ++ "st2\\t{%S1. - %T1.}, %0" ++ [(set_attr "simd_type" "simd_store2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_load_lanesci" ++ [(set (match_operand:CI 0 "register_operand" "=w") ++ (unspec:CI [(match_operand:CI 1 "aarch64_simd_struct_operand" "Utv") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_LD3))] ++ "TARGET_SIMD" ++ "ld3\\t{%S0. - %U0.}, %1" ++ [(set_attr "simd_type" "simd_load3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_store_lanesci" ++ [(set (match_operand:CI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:CI [(match_operand:CI 1 "register_operand" "w") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST3))] ++ "TARGET_SIMD" ++ "st3\\t{%S1. - %U1.}, %0" ++ [(set_attr "simd_type" "simd_store3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_load_lanesxi" ++ [(set (match_operand:XI 0 "register_operand" "=w") ++ (unspec:XI [(match_operand:XI 1 "aarch64_simd_struct_operand" "Utv") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_LD4))] ++ "TARGET_SIMD" ++ "ld4\\t{%S0. - %V0.}, %1" ++ [(set_attr "simd_type" "simd_load4") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_store_lanesxi" ++ [(set (match_operand:XI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:XI [(match_operand:XI 1 "register_operand" "w") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST4))] ++ "TARGET_SIMD" ++ "st4\\t{%S1. - %V1.}, %0" ++ [(set_attr "simd_type" "simd_store4") ++ (set_attr "simd_mode" "")]) ++ ++;; Reload patterns for AdvSIMD register list operands. ++ ++(define_expand "mov" ++ [(set (match_operand:VSTRUCT 0 "aarch64_simd_nonimmediate_operand" "") ++ (match_operand:VSTRUCT 1 "aarch64_simd_general_operand" ""))] ++ "TARGET_SIMD" ++{ ++ if (can_create_pseudo_p ()) ++ { ++ if (GET_CODE (operands[0]) != REG) ++ operands[1] = force_reg (mode, operands[1]); ++ } ++}) ++ ++(define_insn "*aarch64_mov" ++ [(set (match_operand:VSTRUCT 0 "aarch64_simd_nonimmediate_operand" "=w,Utv,w") ++ (match_operand:VSTRUCT 1 "aarch64_simd_general_operand" " w,w,Utv"))] ++ "TARGET_SIMD ++ && (register_operand (operands[0], mode) ++ || register_operand (operands[1], mode))" ++ ++{ ++ switch (which_alternative) ++ { ++ case 0: return "#"; ++ case 1: return "st1\\t{%S1.16b - %1.16b}, %0"; ++ case 2: return "ld1\\t{%S0.16b - %0.16b}, %1"; ++ default: gcc_unreachable (); ++ } ++} ++ [(set_attr "simd_type" "simd_move,simd_store,simd_load") ++ (set (attr "length") (symbol_ref "aarch64_simd_attr_length_move (insn)")) ++ (set_attr "simd_mode" "")]) ++ ++(define_split ++ [(set (match_operand:OI 0 "register_operand" "") ++ (match_operand:OI 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) (match_dup 3))] ++{ ++ int rdest = REGNO (operands[0]); ++ int rsrc = REGNO (operands[1]); ++ rtx dest[2], src[2]; ++ ++ dest[0] = gen_rtx_REG (TFmode, rdest); ++ src[0] = gen_rtx_REG (TFmode, rsrc); ++ dest[1] = gen_rtx_REG (TFmode, rdest + 1); ++ src[1] = gen_rtx_REG (TFmode, rsrc + 1); ++ ++ aarch64_simd_disambiguate_copy (operands, dest, src, 2); ++}) ++ ++(define_split ++ [(set (match_operand:CI 0 "register_operand" "") ++ (match_operand:CI 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) (match_dup 3)) ++ (set (match_dup 4) (match_dup 5))] ++{ ++ int rdest = REGNO (operands[0]); ++ int rsrc = REGNO (operands[1]); ++ rtx dest[3], src[3]; ++ ++ dest[0] = gen_rtx_REG (TFmode, rdest); ++ src[0] = gen_rtx_REG (TFmode, rsrc); ++ dest[1] = gen_rtx_REG (TFmode, rdest + 1); ++ src[1] = gen_rtx_REG (TFmode, rsrc + 1); ++ dest[2] = gen_rtx_REG (TFmode, rdest + 2); ++ src[2] = gen_rtx_REG (TFmode, rsrc + 2); ++ ++ aarch64_simd_disambiguate_copy (operands, dest, src, 3); ++}) ++ ++(define_split ++ [(set (match_operand:XI 0 "register_operand" "") ++ (match_operand:XI 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) (match_dup 3)) ++ (set (match_dup 4) (match_dup 5)) ++ (set (match_dup 6) (match_dup 7))] ++{ ++ int rdest = REGNO (operands[0]); ++ int rsrc = REGNO (operands[1]); ++ rtx dest[4], src[4]; ++ ++ dest[0] = gen_rtx_REG (TFmode, rdest); ++ src[0] = gen_rtx_REG (TFmode, rsrc); ++ dest[1] = gen_rtx_REG (TFmode, rdest + 1); ++ src[1] = gen_rtx_REG (TFmode, rsrc + 1); ++ dest[2] = gen_rtx_REG (TFmode, rdest + 2); ++ src[2] = gen_rtx_REG (TFmode, rsrc + 2); ++ dest[3] = gen_rtx_REG (TFmode, rdest + 3); ++ src[3] = gen_rtx_REG (TFmode, rsrc + 3); ++ ++ aarch64_simd_disambiguate_copy (operands, dest, src, 4); ++}) ++ ++(define_insn "aarch64_ld2_dreg" ++ [(set (match_operand:OI 0 "register_operand" "=w") ++ (subreg:OI ++ (vec_concat: ++ (vec_concat: ++ (unspec:VD [(match_operand:TI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD2) ++ (vec_duplicate:VD (const_int 0))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD2) ++ (vec_duplicate:VD (const_int 0)))) 0))] ++ "TARGET_SIMD" ++ "ld2\\t{%S0. - %T0.}, %1" ++ [(set_attr "simd_type" "simd_load2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld2_dreg" ++ [(set (match_operand:OI 0 "register_operand" "=w") ++ (subreg:OI ++ (vec_concat: ++ (vec_concat: ++ (unspec:DX [(match_operand:TI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD2) ++ (const_int 0)) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD2) ++ (const_int 0))) 0))] ++ "TARGET_SIMD" ++ "ld1\\t{%S0.1d - %T0.1d}, %1" ++ [(set_attr "simd_type" "simd_load2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld3_dreg" ++ [(set (match_operand:CI 0 "register_operand" "=w") ++ (subreg:CI ++ (vec_concat: ++ (vec_concat: ++ (vec_concat: ++ (unspec:VD [(match_operand:EI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD3) ++ (vec_duplicate:VD (const_int 0))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD3) ++ (vec_duplicate:VD (const_int 0)))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD3) ++ (vec_duplicate:VD (const_int 0)))) 0))] ++ "TARGET_SIMD" ++ "ld3\\t{%S0. - %U0.}, %1" ++ [(set_attr "simd_type" "simd_load3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld3_dreg" ++ [(set (match_operand:CI 0 "register_operand" "=w") ++ (subreg:CI ++ (vec_concat: ++ (vec_concat: ++ (vec_concat: ++ (unspec:DX [(match_operand:EI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD3) ++ (const_int 0)) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD3) ++ (const_int 0))) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD3) ++ (const_int 0))) 0))] ++ "TARGET_SIMD" ++ "ld1\\t{%S0.1d - %U0.1d}, %1" ++ [(set_attr "simd_type" "simd_load3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld4_dreg" ++ [(set (match_operand:XI 0 "register_operand" "=w") ++ (subreg:XI ++ (vec_concat: ++ (vec_concat: ++ (vec_concat: ++ (unspec:VD [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD4) ++ (vec_duplicate:VD (const_int 0))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD4) ++ (vec_duplicate:VD (const_int 0)))) ++ (vec_concat: ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD4) ++ (vec_duplicate:VD (const_int 0))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD4) ++ (vec_duplicate:VD (const_int 0))))) 0))] ++ "TARGET_SIMD" ++ "ld4\\t{%S0. - %V0.}, %1" ++ [(set_attr "simd_type" "simd_load4") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld4_dreg" ++ [(set (match_operand:XI 0 "register_operand" "=w") ++ (subreg:XI ++ (vec_concat: ++ (vec_concat: ++ (vec_concat: ++ (unspec:DX [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD4) ++ (const_int 0)) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD4) ++ (const_int 0))) ++ (vec_concat: ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD4) ++ (const_int 0)) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD4) ++ (const_int 0)))) 0))] ++ "TARGET_SIMD" ++ "ld1\\t{%S0.1d - %V0.1d}, %1" ++ [(set_attr "simd_type" "simd_load4") ++ (set_attr "simd_mode" "")]) ++ ++(define_expand "aarch64_ld" ++ [(match_operand:VSTRUCT 0 "register_operand" "=w") ++ (match_operand:DI 1 "register_operand" "r") ++ (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ "TARGET_SIMD" ++{ ++ enum machine_mode mode = mode; ++ rtx mem = gen_rtx_MEM (mode, operands[1]); ++ ++ emit_insn (gen_aarch64_ld_dreg (operands[0], mem)); ++ DONE; ++}) ++ ++(define_expand "aarch64_ld" ++ [(match_operand:VSTRUCT 0 "register_operand" "=w") ++ (match_operand:DI 1 "register_operand" "r") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ "TARGET_SIMD" ++{ ++ enum machine_mode mode = mode; ++ rtx mem = gen_rtx_MEM (mode, operands[1]); ++ ++ emit_insn (gen_vec_load_lanes (operands[0], mem)); ++ DONE; ++}) ++ ++;; Expanders for builtins to extract vector registers from large ++;; opaque integer modes. ++ ++;; D-register list. ++ ++(define_expand "aarch64_get_dreg" ++ [(match_operand:VDC 0 "register_operand" "=w") ++ (match_operand:VSTRUCT 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ int part = INTVAL (operands[2]); ++ rtx temp = gen_reg_rtx (mode); ++ int offset = part * 16; ++ ++ emit_move_insn (temp, gen_rtx_SUBREG (mode, operands[1], offset)); ++ emit_move_insn (operands[0], gen_lowpart (mode, temp)); ++ DONE; ++}) ++ ++;; Q-register list. ++ ++(define_expand "aarch64_get_qreg" ++ [(match_operand:VQ 0 "register_operand" "=w") ++ (match_operand:VSTRUCT 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ int part = INTVAL (operands[2]); ++ int offset = part * 16; ++ ++ emit_move_insn (operands[0], ++ gen_rtx_SUBREG (mode, operands[1], offset)); ++ DONE; ++}) ++ ++;; Permuted-store expanders for neon intrinsics. ++ ++(define_insn "aarch64_st2_dreg" ++ [(set (match_operand:TI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:TI [(match_operand:OI 1 "register_operand" "w") ++ (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST2))] ++ "TARGET_SIMD" ++ "st2\\t{%S1. - %T1.}, %0" ++ [(set_attr "simd_type" "simd_store2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st2_dreg" ++ [(set (match_operand:TI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:TI [(match_operand:OI 1 "register_operand" "w") ++ (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST2))] ++ "TARGET_SIMD" ++ "st1\\t{%S1.1d - %T1.1d}, %0" ++ [(set_attr "simd_type" "simd_store2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st3_dreg" ++ [(set (match_operand:EI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:EI [(match_operand:CI 1 "register_operand" "w") ++ (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST3))] ++ "TARGET_SIMD" ++ "st3\\t{%S1. - %U1.}, %0" ++ [(set_attr "simd_type" "simd_store3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st3_dreg" ++ [(set (match_operand:EI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:EI [(match_operand:CI 1 "register_operand" "w") ++ (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST3))] ++ "TARGET_SIMD" ++ "st1\\t{%S1.1d - %U1.1d}, %0" ++ [(set_attr "simd_type" "simd_store3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st4_dreg" ++ [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:OI [(match_operand:XI 1 "register_operand" "w") ++ (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST4))] ++ "TARGET_SIMD" ++ "st4\\t{%S1. - %V1.}, %0" ++ [(set_attr "simd_type" "simd_store4") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st4_dreg" ++ [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:OI [(match_operand:XI 1 "register_operand" "w") ++ (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST4))] ++ "TARGET_SIMD" ++ "st1\\t{%S1.1d - %V1.1d}, %0" ++ [(set_attr "simd_type" "simd_store4") ++ (set_attr "simd_mode" "")]) ++ ++(define_expand "aarch64_st" ++ [(match_operand:DI 0 "register_operand" "r") ++ (match_operand:VSTRUCT 1 "register_operand" "w") ++ (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ "TARGET_SIMD" ++{ ++ enum machine_mode mode = mode; ++ rtx mem = gen_rtx_MEM (mode, operands[0]); ++ ++ emit_insn (gen_aarch64_st_dreg (mem, operands[1])); ++ DONE; ++}) ++ ++(define_expand "aarch64_st" ++ [(match_operand:DI 0 "register_operand" "r") ++ (match_operand:VSTRUCT 1 "register_operand" "w") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ "TARGET_SIMD" ++{ ++ enum machine_mode mode = mode; ++ rtx mem = gen_rtx_MEM (mode, operands[0]); ++ ++ emit_insn (gen_vec_store_lanes (mem, operands[1])); ++ DONE; ++}) ++ ++;; Expander for builtins to insert vector registers into large ++;; opaque integer modes. ++ ++;; Q-register list. We don't need a D-reg inserter as we zero ++;; extend them in arm_neon.h and insert the resulting Q-regs. ++ ++(define_expand "aarch64_set_qreg" ++ [(match_operand:VSTRUCT 0 "register_operand" "+w") ++ (match_operand:VSTRUCT 1 "register_operand" "0") ++ (match_operand:VQ 2 "register_operand" "w") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ int part = INTVAL (operands[3]); ++ int offset = part * 16; ++ ++ emit_move_insn (operands[0], operands[1]); ++ emit_move_insn (gen_rtx_SUBREG (mode, operands[0], offset), ++ operands[2]); ++ DONE; ++}) ++ +Index: gcc/config/aarch64/predicates.md +=================================================================== +--- a/src/gcc/config/aarch64/predicates.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/predicates.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,297 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_special_predicate "cc_register" ++ (and (match_code "reg") ++ (and (match_test "REGNO (op) == CC_REGNUM") ++ (ior (match_test "mode == GET_MODE (op)") ++ (match_test "mode == VOIDmode ++ && GET_MODE_CLASS (GET_MODE (op)) == MODE_CC")))) ++) ++ ++(define_predicate "aarch64_reg_or_zero" ++ (and (match_code "reg,subreg,const_int") ++ (ior (match_operand 0 "register_operand") ++ (match_test "op == const0_rtx")))) ++ ++(define_predicate "aarch64_reg_zero_or_m1" ++ (and (match_code "reg,subreg,const_int") ++ (ior (match_operand 0 "register_operand") ++ (ior (match_test "op == const0_rtx") ++ (match_test "op == constm1_rtx"))))) ++ ++(define_predicate "aarch64_fp_compare_operand" ++ (ior (match_operand 0 "register_operand") ++ (and (match_code "const_double") ++ (match_test "aarch64_const_double_zero_rtx_p (op)")))) ++ ++(define_predicate "aarch64_plus_immediate" ++ (and (match_code "const_int") ++ (ior (match_test "aarch64_uimm12_shift (INTVAL (op))") ++ (match_test "aarch64_uimm12_shift (-INTVAL (op))")))) ++ ++(define_predicate "aarch64_plus_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_plus_immediate"))) ++ ++(define_predicate "aarch64_pluslong_immediate" ++ (and (match_code "const_int") ++ (match_test "(INTVAL (op) < 0xffffff && INTVAL (op) > -0xffffff)"))) ++ ++(define_predicate "aarch64_pluslong_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_pluslong_immediate"))) ++ ++(define_predicate "aarch64_logical_immediate" ++ (and (match_code "const_int") ++ (match_test "aarch64_bitmask_imm (INTVAL (op), mode)"))) ++ ++(define_predicate "aarch64_logical_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_logical_immediate"))) ++ ++(define_predicate "aarch64_shift_imm_si" ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 32"))) ++ ++(define_predicate "aarch64_shift_imm_di" ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 64"))) ++ ++(define_predicate "aarch64_reg_or_shift_imm_si" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_shift_imm_si"))) ++ ++(define_predicate "aarch64_reg_or_shift_imm_di" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_shift_imm_di"))) ++ ++;; The imm3 field is a 3-bit field that only accepts immediates in the ++;; range 0..4. ++(define_predicate "aarch64_imm3" ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) <= 4"))) ++ ++(define_predicate "aarch64_pwr_imm3" ++ (and (match_code "const_int") ++ (match_test "INTVAL (op) != 0 ++ && (unsigned) exact_log2 (INTVAL (op)) <= 4"))) ++ ++(define_predicate "aarch64_pwr_2_si" ++ (and (match_code "const_int") ++ (match_test "INTVAL (op) != 0 ++ && (unsigned) exact_log2 (INTVAL (op)) < 32"))) ++ ++(define_predicate "aarch64_pwr_2_di" ++ (and (match_code "const_int") ++ (match_test "INTVAL (op) != 0 ++ && (unsigned) exact_log2 (INTVAL (op)) < 64"))) ++ ++(define_predicate "aarch64_mem_pair_operand" ++ (and (match_code "mem") ++ (match_test "aarch64_legitimate_address_p (mode, XEXP (op, 0), PARALLEL, ++ 0)"))) ++ ++(define_predicate "aarch64_const_address" ++ (and (match_code "symbol_ref") ++ (match_test "mode == DImode && CONSTANT_ADDRESS_P (op)"))) ++ ++(define_predicate "aarch64_valid_symref" ++ (match_code "const, symbol_ref, label_ref") ++{ ++ enum aarch64_symbol_type symbol_type; ++ return (aarch64_symbolic_constant_p (op, SYMBOL_CONTEXT_ADR, &symbol_type) ++ && symbol_type != SYMBOL_FORCE_TO_MEM); ++}) ++ ++(define_predicate "aarch64_tls_ie_symref" ++ (match_code "const, symbol_ref, label_ref") ++{ ++ switch (GET_CODE (op)) ++ { ++ case CONST: ++ op = XEXP (op, 0); ++ if (GET_CODE (op) != PLUS ++ || GET_CODE (XEXP (op, 0)) != SYMBOL_REF ++ || GET_CODE (XEXP (op, 1)) != CONST_INT) ++ return false; ++ op = XEXP (op, 0); ++ ++ case SYMBOL_REF: ++ return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC; ++ ++ default: ++ gcc_unreachable (); ++ } ++}) ++ ++(define_predicate "aarch64_tls_le_symref" ++ (match_code "const, symbol_ref, label_ref") ++{ ++ switch (GET_CODE (op)) ++ { ++ case CONST: ++ op = XEXP (op, 0); ++ if (GET_CODE (op) != PLUS ++ || GET_CODE (XEXP (op, 0)) != SYMBOL_REF ++ || GET_CODE (XEXP (op, 1)) != CONST_INT) ++ return false; ++ op = XEXP (op, 0); ++ ++ case SYMBOL_REF: ++ return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC; ++ ++ default: ++ gcc_unreachable (); ++ } ++}) ++ ++(define_predicate "aarch64_mov_operand" ++ (and (match_code "reg,subreg,mem,const_int,symbol_ref,high") ++ (ior (match_operand 0 "register_operand") ++ (ior (match_operand 0 "memory_operand") ++ (ior (match_test "GET_CODE (op) == HIGH ++ && aarch64_valid_symref (XEXP (op, 0), ++ GET_MODE (XEXP (op, 0)))") ++ (ior (match_test "CONST_INT_P (op) ++ && aarch64_move_imm (INTVAL (op), mode)") ++ (match_test "aarch64_const_address (op, mode)"))))))) ++ ++(define_predicate "aarch64_movti_operand" ++ (and (match_code "reg,subreg,mem,const_int") ++ (ior (match_operand 0 "register_operand") ++ (ior (match_operand 0 "memory_operand") ++ (match_operand 0 "const_int_operand"))))) ++ ++(define_predicate "aarch64_reg_or_imm" ++ (and (match_code "reg,subreg,const_int") ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "const_int_operand")))) ++ ++;; True for integer comparisons and for FP comparisons other than LTGT or UNEQ. ++(define_special_predicate "aarch64_comparison_operator" ++ (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt")) ++ ++;; True if the operand is memory reference suitable for a load/store exclusive. ++(define_predicate "aarch64_sync_memory_operand" ++ (and (match_operand 0 "memory_operand") ++ (match_code "reg" "0"))) ++ ++;; Predicates for parallel expanders based on mode. ++(define_special_predicate "vect_par_cnst_hi_half" ++ (match_code "parallel") ++{ ++ HOST_WIDE_INT count = XVECLEN (op, 0); ++ int nunits = GET_MODE_NUNITS (mode); ++ int i; ++ ++ if (count < 1 ++ || count != nunits / 2) ++ return false; ++ ++ if (!VECTOR_MODE_P (mode)) ++ return false; ++ ++ for (i = 0; i < count; i++) ++ { ++ rtx elt = XVECEXP (op, 0, i); ++ int val; ++ ++ if (GET_CODE (elt) != CONST_INT) ++ return false; ++ ++ val = INTVAL (elt); ++ if (val != (nunits / 2) + i) ++ return false; ++ } ++ return true; ++}) ++ ++(define_special_predicate "vect_par_cnst_lo_half" ++ (match_code "parallel") ++{ ++ HOST_WIDE_INT count = XVECLEN (op, 0); ++ int nunits = GET_MODE_NUNITS (mode); ++ int i; ++ ++ if (count < 1 ++ || count != nunits / 2) ++ return false; ++ ++ if (!VECTOR_MODE_P (mode)) ++ return false; ++ ++ for (i = 0; i < count; i++) ++ { ++ rtx elt = XVECEXP (op, 0, i); ++ int val; ++ ++ if (GET_CODE (elt) != CONST_INT) ++ return false; ++ ++ val = INTVAL (elt); ++ if (val != i) ++ return false; ++ } ++ return true; ++}) ++ ++ ++(define_special_predicate "aarch64_simd_lshift_imm" ++ (match_code "const_vector") ++{ ++ return aarch64_simd_shift_imm_p (op, mode, true); ++}) ++ ++(define_special_predicate "aarch64_simd_rshift_imm" ++ (match_code "const_vector") ++{ ++ return aarch64_simd_shift_imm_p (op, mode, false); ++}) ++ ++(define_predicate "aarch64_simd_reg_or_zero" ++ (and (match_code "reg,subreg,const_int,const_vector") ++ (ior (match_operand 0 "register_operand") ++ (ior (match_test "op == const0_rtx") ++ (match_test "aarch64_simd_imm_zero_p (op, mode)"))))) ++ ++(define_predicate "aarch64_simd_struct_operand" ++ (and (match_code "mem") ++ (match_test "TARGET_SIMD && aarch64_simd_mem_operand_p (op)"))) ++ ++;; Like general_operand but allow only valid SIMD addressing modes. ++(define_predicate "aarch64_simd_general_operand" ++ (and (match_operand 0 "general_operand") ++ (match_test "!MEM_P (op) ++ || GET_CODE (XEXP (op, 0)) == POST_INC ++ || GET_CODE (XEXP (op, 0)) == REG"))) ++ ++;; Like nonimmediate_operand but allow only valid SIMD addressing modes. ++(define_predicate "aarch64_simd_nonimmediate_operand" ++ (and (match_operand 0 "nonimmediate_operand") ++ (match_test "!MEM_P (op) ++ || GET_CODE (XEXP (op, 0)) == POST_INC ++ || GET_CODE (XEXP (op, 0)) == REG"))) ++ ++(define_special_predicate "aarch64_simd_imm_zero" ++ (match_code "const_vector") ++{ ++ return aarch64_simd_imm_zero_p (op, mode); ++}) +Index: gcc/config/aarch64/aarch64-elf.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-elf.h (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-elf.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,123 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#ifndef GCC_AARCH64_ELF_H ++#define GCC_AARCH64_ELF_H ++ ++ ++#define ASM_OUTPUT_LABELREF(FILE, NAME) \ ++ aarch64_asm_output_labelref (FILE, NAME) ++ ++#define TEXT_SECTION_ASM_OP "\t.text" ++#define DATA_SECTION_ASM_OP "\t.data" ++#define BSS_SECTION_ASM_OP "\t.bss" ++ ++#define CTORS_SECTION_ASM_OP "\t.section\t.init_array,\"aw\",%init_array" ++#define DTORS_SECTION_ASM_OP "\t.section\t.fini_array,\"aw\",%fini_array" ++ ++#undef INIT_SECTION_ASM_OP ++#undef FINI_SECTION_ASM_OP ++#define INIT_ARRAY_SECTION_ASM_OP CTORS_SECTION_ASM_OP ++#define FINI_ARRAY_SECTION_ASM_OP DTORS_SECTION_ASM_OP ++ ++/* Since we use .init_array/.fini_array we don't need the markers at ++ the start and end of the ctors/dtors arrays. */ ++#define CTOR_LIST_BEGIN asm (CTORS_SECTION_ASM_OP) ++#define CTOR_LIST_END /* empty */ ++#define DTOR_LIST_BEGIN asm (DTORS_SECTION_ASM_OP) ++#define DTOR_LIST_END /* empty */ ++ ++#undef TARGET_ASM_CONSTRUCTOR ++#define TARGET_ASM_CONSTRUCTOR aarch64_elf_asm_constructor ++ ++#undef TARGET_ASM_DESTRUCTOR ++#define TARGET_ASM_DESTRUCTOR aarch64_elf_asm_destructor ++ ++#ifdef HAVE_GAS_MAX_SKIP_P2ALIGN ++/* Support for -falign-* switches. Use .p2align to ensure that code ++ sections are padded with NOP instructions, rather than zeros. */ ++#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE, LOG, MAX_SKIP) \ ++ do \ ++ { \ ++ if ((LOG) != 0) \ ++ { \ ++ if ((MAX_SKIP) == 0) \ ++ fprintf ((FILE), "\t.p2align %d\n", (int) (LOG)); \ ++ else \ ++ fprintf ((FILE), "\t.p2align %d,,%d\n", \ ++ (int) (LOG), (int) (MAX_SKIP)); \ ++ } \ ++ } while (0) ++ ++#endif /* HAVE_GAS_MAX_SKIP_P2ALIGN */ ++ ++#define JUMP_TABLES_IN_TEXT_SECTION 0 ++ ++#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ ++ do { \ ++ switch (GET_MODE (BODY)) \ ++ { \ ++ case QImode: \ ++ asm_fprintf (STREAM, "\t.byte\t(%LL%d - %LLrtx%d) / 4\n", \ ++ VALUE, REL); \ ++ break; \ ++ case HImode: \ ++ asm_fprintf (STREAM, "\t.2byte\t(%LL%d - %LLrtx%d) / 4\n", \ ++ VALUE, REL); \ ++ break; \ ++ case SImode: \ ++ case DImode: /* See comment in aarch64_output_casesi. */ \ ++ asm_fprintf (STREAM, "\t.word\t(%LL%d - %LLrtx%d) / 4\n", \ ++ VALUE, REL); \ ++ break; \ ++ default: \ ++ gcc_unreachable (); \ ++ } \ ++ } while (0) ++ ++#define ASM_OUTPUT_ALIGN(STREAM, POWER) \ ++ fprintf(STREAM, "\t.align\t%d\n", (int)POWER) ++ ++#define ASM_COMMENT_START "//" ++ ++#define REGISTER_PREFIX "" ++#define LOCAL_LABEL_PREFIX "." ++#define USER_LABEL_PREFIX "" ++ ++#define GLOBAL_ASM_OP "\t.global\t" ++ ++#ifndef ASM_SPEC ++#define ASM_SPEC "\ ++%{mbig-endian:-EB} \ ++%{mlittle-endian:-EL} \ ++%{mcpu=*:-mcpu=%*} \ ++%{march=*:-march=%*}" ++#endif ++ ++#undef TYPE_OPERAND_FMT ++#define TYPE_OPERAND_FMT "%%%s" ++ ++#undef TARGET_ASM_NAMED_SECTION ++#define TARGET_ASM_NAMED_SECTION aarch64_elf_asm_named_section ++ ++/* Stabs debug not required. */ ++#undef DBX_DEBUGGING_INFO ++ ++#endif /* GCC_AARCH64_ELF_H */ + +Property changes on: gcc/config/aarch64/aarch64-elf.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/arm_neon.h +=================================================================== +--- a/src/gcc/config/aarch64/arm_neon.h (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/arm_neon.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,25529 @@ ++/* ARM NEON intrinsics include file. ++ ++ Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ . */ ++ ++#ifndef _AARCH64_NEON_H_ ++#define _AARCH64_NEON_H_ ++ ++#include ++ ++typedef __builtin_aarch64_simd_qi int8x8_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_hi int16x4_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_si int32x2_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_di int64x1_t; ++typedef __builtin_aarch64_simd_si int32x1_t; ++typedef __builtin_aarch64_simd_hi int16x1_t; ++typedef __builtin_aarch64_simd_qi int8x1_t; ++typedef __builtin_aarch64_simd_df float64x1_t; ++typedef __builtin_aarch64_simd_sf float32x2_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_poly8 poly8x8_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_poly16 poly16x4_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_uqi uint8x8_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_uhi uint16x4_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_usi uint32x2_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_udi uint64x1_t; ++typedef __builtin_aarch64_simd_usi uint32x1_t; ++typedef __builtin_aarch64_simd_uhi uint16x1_t; ++typedef __builtin_aarch64_simd_uqi uint8x1_t; ++typedef __builtin_aarch64_simd_qi int8x16_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_hi int16x8_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_si int32x4_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_di int64x2_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_sf float32x4_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_df float64x2_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_poly8 poly8x16_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_poly16 poly16x8_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_uqi uint8x16_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_uhi uint16x8_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_usi uint32x4_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_udi uint64x2_t ++ __attribute__ ((__vector_size__ (16))); ++ ++typedef float float32_t; ++typedef double float64_t; ++typedef __builtin_aarch64_simd_poly8 poly8_t; ++typedef __builtin_aarch64_simd_poly16 poly16_t; ++ ++typedef struct int8x8x2_t ++{ ++ int8x8_t val[2]; ++} int8x8x2_t; ++ ++typedef struct int8x16x2_t ++{ ++ int8x16_t val[2]; ++} int8x16x2_t; ++ ++typedef struct int16x4x2_t ++{ ++ int16x4_t val[2]; ++} int16x4x2_t; ++ ++typedef struct int16x8x2_t ++{ ++ int16x8_t val[2]; ++} int16x8x2_t; ++ ++typedef struct int32x2x2_t ++{ ++ int32x2_t val[2]; ++} int32x2x2_t; ++ ++typedef struct int32x4x2_t ++{ ++ int32x4_t val[2]; ++} int32x4x2_t; ++ ++typedef struct int64x1x2_t ++{ ++ int64x1_t val[2]; ++} int64x1x2_t; ++ ++typedef struct int64x2x2_t ++{ ++ int64x2_t val[2]; ++} int64x2x2_t; ++ ++typedef struct uint8x8x2_t ++{ ++ uint8x8_t val[2]; ++} uint8x8x2_t; ++ ++typedef struct uint8x16x2_t ++{ ++ uint8x16_t val[2]; ++} uint8x16x2_t; ++ ++typedef struct uint16x4x2_t ++{ ++ uint16x4_t val[2]; ++} uint16x4x2_t; ++ ++typedef struct uint16x8x2_t ++{ ++ uint16x8_t val[2]; ++} uint16x8x2_t; ++ ++typedef struct uint32x2x2_t ++{ ++ uint32x2_t val[2]; ++} uint32x2x2_t; ++ ++typedef struct uint32x4x2_t ++{ ++ uint32x4_t val[2]; ++} uint32x4x2_t; ++ ++typedef struct uint64x1x2_t ++{ ++ uint64x1_t val[2]; ++} uint64x1x2_t; ++ ++typedef struct uint64x2x2_t ++{ ++ uint64x2_t val[2]; ++} uint64x2x2_t; ++ ++typedef struct float32x2x2_t ++{ ++ float32x2_t val[2]; ++} float32x2x2_t; ++ ++typedef struct float32x4x2_t ++{ ++ float32x4_t val[2]; ++} float32x4x2_t; ++ ++typedef struct float64x2x2_t ++{ ++ float64x2_t val[2]; ++} float64x2x2_t; ++ ++typedef struct float64x1x2_t ++{ ++ float64x1_t val[2]; ++} float64x1x2_t; ++ ++typedef struct poly8x8x2_t ++{ ++ poly8x8_t val[2]; ++} poly8x8x2_t; ++ ++typedef struct poly8x16x2_t ++{ ++ poly8x16_t val[2]; ++} poly8x16x2_t; ++ ++typedef struct poly16x4x2_t ++{ ++ poly16x4_t val[2]; ++} poly16x4x2_t; ++ ++typedef struct poly16x8x2_t ++{ ++ poly16x8_t val[2]; ++} poly16x8x2_t; ++ ++typedef struct int8x8x3_t ++{ ++ int8x8_t val[3]; ++} int8x8x3_t; ++ ++typedef struct int8x16x3_t ++{ ++ int8x16_t val[3]; ++} int8x16x3_t; ++ ++typedef struct int16x4x3_t ++{ ++ int16x4_t val[3]; ++} int16x4x3_t; ++ ++typedef struct int16x8x3_t ++{ ++ int16x8_t val[3]; ++} int16x8x3_t; ++ ++typedef struct int32x2x3_t ++{ ++ int32x2_t val[3]; ++} int32x2x3_t; ++ ++typedef struct int32x4x3_t ++{ ++ int32x4_t val[3]; ++} int32x4x3_t; ++ ++typedef struct int64x1x3_t ++{ ++ int64x1_t val[3]; ++} int64x1x3_t; ++ ++typedef struct int64x2x3_t ++{ ++ int64x2_t val[3]; ++} int64x2x3_t; ++ ++typedef struct uint8x8x3_t ++{ ++ uint8x8_t val[3]; ++} uint8x8x3_t; ++ ++typedef struct uint8x16x3_t ++{ ++ uint8x16_t val[3]; ++} uint8x16x3_t; ++ ++typedef struct uint16x4x3_t ++{ ++ uint16x4_t val[3]; ++} uint16x4x3_t; ++ ++typedef struct uint16x8x3_t ++{ ++ uint16x8_t val[3]; ++} uint16x8x3_t; ++ ++typedef struct uint32x2x3_t ++{ ++ uint32x2_t val[3]; ++} uint32x2x3_t; ++ ++typedef struct uint32x4x3_t ++{ ++ uint32x4_t val[3]; ++} uint32x4x3_t; ++ ++typedef struct uint64x1x3_t ++{ ++ uint64x1_t val[3]; ++} uint64x1x3_t; ++ ++typedef struct uint64x2x3_t ++{ ++ uint64x2_t val[3]; ++} uint64x2x3_t; ++ ++typedef struct float32x2x3_t ++{ ++ float32x2_t val[3]; ++} float32x2x3_t; ++ ++typedef struct float32x4x3_t ++{ ++ float32x4_t val[3]; ++} float32x4x3_t; ++ ++typedef struct float64x2x3_t ++{ ++ float64x2_t val[3]; ++} float64x2x3_t; ++ ++typedef struct float64x1x3_t ++{ ++ float64x1_t val[3]; ++} float64x1x3_t; ++ ++typedef struct poly8x8x3_t ++{ ++ poly8x8_t val[3]; ++} poly8x8x3_t; ++ ++typedef struct poly8x16x3_t ++{ ++ poly8x16_t val[3]; ++} poly8x16x3_t; ++ ++typedef struct poly16x4x3_t ++{ ++ poly16x4_t val[3]; ++} poly16x4x3_t; ++ ++typedef struct poly16x8x3_t ++{ ++ poly16x8_t val[3]; ++} poly16x8x3_t; ++ ++typedef struct int8x8x4_t ++{ ++ int8x8_t val[4]; ++} int8x8x4_t; ++ ++typedef struct int8x16x4_t ++{ ++ int8x16_t val[4]; ++} int8x16x4_t; ++ ++typedef struct int16x4x4_t ++{ ++ int16x4_t val[4]; ++} int16x4x4_t; ++ ++typedef struct int16x8x4_t ++{ ++ int16x8_t val[4]; ++} int16x8x4_t; ++ ++typedef struct int32x2x4_t ++{ ++ int32x2_t val[4]; ++} int32x2x4_t; ++ ++typedef struct int32x4x4_t ++{ ++ int32x4_t val[4]; ++} int32x4x4_t; ++ ++typedef struct int64x1x4_t ++{ ++ int64x1_t val[4]; ++} int64x1x4_t; ++ ++typedef struct int64x2x4_t ++{ ++ int64x2_t val[4]; ++} int64x2x4_t; ++ ++typedef struct uint8x8x4_t ++{ ++ uint8x8_t val[4]; ++} uint8x8x4_t; ++ ++typedef struct uint8x16x4_t ++{ ++ uint8x16_t val[4]; ++} uint8x16x4_t; ++ ++typedef struct uint16x4x4_t ++{ ++ uint16x4_t val[4]; ++} uint16x4x4_t; ++ ++typedef struct uint16x8x4_t ++{ ++ uint16x8_t val[4]; ++} uint16x8x4_t; ++ ++typedef struct uint32x2x4_t ++{ ++ uint32x2_t val[4]; ++} uint32x2x4_t; ++ ++typedef struct uint32x4x4_t ++{ ++ uint32x4_t val[4]; ++} uint32x4x4_t; ++ ++typedef struct uint64x1x4_t ++{ ++ uint64x1_t val[4]; ++} uint64x1x4_t; ++ ++typedef struct uint64x2x4_t ++{ ++ uint64x2_t val[4]; ++} uint64x2x4_t; ++ ++typedef struct float32x2x4_t ++{ ++ float32x2_t val[4]; ++} float32x2x4_t; ++ ++typedef struct float32x4x4_t ++{ ++ float32x4_t val[4]; ++} float32x4x4_t; ++ ++typedef struct float64x2x4_t ++{ ++ float64x2_t val[4]; ++} float64x2x4_t; ++ ++typedef struct float64x1x4_t ++{ ++ float64x1_t val[4]; ++} float64x1x4_t; ++ ++typedef struct poly8x8x4_t ++{ ++ poly8x8_t val[4]; ++} poly8x8x4_t; ++ ++typedef struct poly8x16x4_t ++{ ++ poly8x16_t val[4]; ++} poly8x16x4_t; ++ ++typedef struct poly16x4x4_t ++{ ++ poly16x4_t val[4]; ++} poly16x4x4_t; ++ ++typedef struct poly16x8x4_t ++{ ++ poly16x8_t val[4]; ++} poly16x8x4_t; ++ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vadd_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vadd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vadd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vaddq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vaddq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vaddq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaddq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_saddlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_saddlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_saddlv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddl_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uaddlv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddl_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uaddlv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddl_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uaddlv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddl_high_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_saddl2v16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddl_high_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_saddl2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddl_high_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_saddl2v4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddl_high_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uaddl2v16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddl_high_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uaddl2v8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddl_high_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uaddl2v4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddw_s8 (int16x8_t __a, int8x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_saddwv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddw_s16 (int32x4_t __a, int16x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_saddwv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddw_s32 (int64x2_t __a, int32x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_saddwv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddw_u8 (uint16x8_t __a, uint8x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uaddwv8qi ((int16x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddw_u16 (uint32x4_t __a, uint16x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uaddwv4hi ((int32x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddw_u32 (uint64x2_t __a, uint32x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uaddwv2si ((int64x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddw_high_s8 (int16x8_t __a, int8x16_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_saddw2v16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddw_high_s16 (int32x4_t __a, int16x8_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_saddw2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddw_high_s32 (int64x2_t __a, int32x4_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_saddw2v4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddw_high_u8 (uint16x8_t __a, uint8x16_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uaddw2v16qi ((int16x8_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddw_high_u16 (uint32x4_t __a, uint16x8_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uaddw2v8hi ((int32x4_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddw_high_u32 (uint64x2_t __a, uint32x4_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uaddw2v4si ((int64x2_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vhadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_shaddv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vhadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_shaddv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vhadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_shaddv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vhadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uhaddv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vhadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uhaddv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vhadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uhaddv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vhaddq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_shaddv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vhaddq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_shaddv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vhaddq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_shaddv4si (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vhaddq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uhaddv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vhaddq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uhaddv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vhaddq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uhaddv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrhadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_srhaddv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrhadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_srhaddv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrhadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_srhaddv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrhadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_urhaddv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrhadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_urhaddv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrhadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_urhaddv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrhaddq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_srhaddv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrhaddq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_srhaddv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrhaddq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_srhaddv4si (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrhaddq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_urhaddv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrhaddq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_urhaddv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrhaddq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_urhaddv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vaddhn_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_addhnv8hi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vaddhn_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_addhnv4si (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vaddhn_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_addhnv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vaddhn_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_addhnv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vaddhn_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_addhnv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vaddhn_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_addhnv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vraddhn_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_raddhnv8hi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vraddhn_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_raddhnv4si (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vraddhn_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_raddhnv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vraddhn_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_raddhnv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vraddhn_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_raddhnv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vraddhn_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_raddhnv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vaddhn_high_s16 (int8x8_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return (int8x16_t) __builtin_aarch64_addhn2v8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddhn_high_s32 (int16x4_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return (int16x8_t) __builtin_aarch64_addhn2v4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddhn_high_s64 (int32x2_t __a, int64x2_t __b, int64x2_t __c) ++{ ++ return (int32x4_t) __builtin_aarch64_addhn2v2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaddhn_high_u16 (uint8x8_t __a, uint16x8_t __b, uint16x8_t __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_addhn2v8hi ((int8x8_t) __a, ++ (int16x8_t) __b, ++ (int16x8_t) __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddhn_high_u32 (uint16x4_t __a, uint32x4_t __b, uint32x4_t __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_addhn2v4si ((int16x4_t) __a, ++ (int32x4_t) __b, ++ (int32x4_t) __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddhn_high_u64 (uint32x2_t __a, uint64x2_t __b, uint64x2_t __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_addhn2v2di ((int32x2_t) __a, ++ (int64x2_t) __b, ++ (int64x2_t) __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vraddhn_high_s16 (int8x8_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return (int8x16_t) __builtin_aarch64_raddhn2v8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vraddhn_high_s32 (int16x4_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return (int16x8_t) __builtin_aarch64_raddhn2v4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vraddhn_high_s64 (int32x2_t __a, int64x2_t __b, int64x2_t __c) ++{ ++ return (int32x4_t) __builtin_aarch64_raddhn2v2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vraddhn_high_u16 (uint8x8_t __a, uint16x8_t __b, uint16x8_t __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_raddhn2v8hi ((int8x8_t) __a, ++ (int16x8_t) __b, ++ (int16x8_t) __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vraddhn_high_u32 (uint16x4_t __a, uint32x4_t __b, uint32x4_t __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_raddhn2v4si ((int16x4_t) __a, ++ (int32x4_t) __b, ++ (int32x4_t) __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vraddhn_high_u64 (uint32x2_t __a, uint64x2_t __b, uint64x2_t __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_raddhn2v2di ((int32x2_t) __a, ++ (int64x2_t) __b, ++ (int64x2_t) __c); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vdiv_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __a / __b; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vdivq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __a / __b; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vdivq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __a / __b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmul_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmul_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmul_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmul_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmul_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmul_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmul_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vmul_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (poly8x8_t) __builtin_aarch64_pmulv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmulq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmulq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmulq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmulq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmulq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmulq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmulq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmulq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vmulq_p8 (poly8x16_t __a, poly8x16_t __b) ++{ ++ return (poly8x16_t) __builtin_aarch64_pmulv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vand_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vand_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vand_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vand_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vand_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vand_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vand_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vand_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vandq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vandq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vandq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vandq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vandq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vandq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vandq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vandq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vorr_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vorr_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vorr_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vorr_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vorr_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vorr_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vorr_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vorr_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vorrq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vorrq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vorrq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vorrq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vorrq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vorrq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vorrq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vorrq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++veor_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++veor_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++veor_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++veor_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++veor_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++veor_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++veor_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++veor_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++veorq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++veorq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++veorq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++veorq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++veorq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++veorq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++veorq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++veorq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vbic_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vbic_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vbic_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vbic_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vbic_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vbic_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vbic_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vbic_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vbicq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vbicq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vbicq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vbicq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vbicq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vbicq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vbicq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vbicq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vorn_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vorn_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vorn_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vorn_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vorn_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vorn_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vorn_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vorn_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vornq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vornq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vornq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vornq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vornq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vornq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vornq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vornq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsub_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsub_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsub_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vsub_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsub_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsub_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsub_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsub_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsub_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsubq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vsubq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vsubq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsubq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_ssublv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_ssublv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_ssublv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubl_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usublv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubl_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usublv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubl_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usublv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubl_high_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_ssubl2v16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubl_high_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_ssubl2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubl_high_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_ssubl2v4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubl_high_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usubl2v16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubl_high_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usubl2v8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubl_high_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usubl2v4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubw_s8 (int16x8_t __a, int8x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_ssubwv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubw_s16 (int32x4_t __a, int16x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_ssubwv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubw_s32 (int64x2_t __a, int32x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_ssubwv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubw_u8 (uint16x8_t __a, uint8x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usubwv8qi ((int16x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubw_u16 (uint32x4_t __a, uint16x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usubwv4hi ((int32x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubw_u32 (uint64x2_t __a, uint32x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usubwv2si ((int64x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubw_high_s8 (int16x8_t __a, int8x16_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_ssubw2v16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubw_high_s16 (int32x4_t __a, int16x8_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_ssubw2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubw_high_s32 (int64x2_t __a, int32x4_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_ssubw2v4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubw_high_u8 (uint16x8_t __a, uint8x16_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usubw2v16qi ((int16x8_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubw_high_u16 (uint32x4_t __a, uint16x8_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usubw2v8hi ((int32x4_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubw_high_u32 (uint64x2_t __a, uint32x4_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usubw2v4si ((int64x2_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqaddv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqaddv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqaddv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqadd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqadddi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqaddv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqaddv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqaddv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqadd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqadddi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqaddq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sqaddv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqaddq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqaddv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqaddq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqaddv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqaddq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sqaddv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqaddq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqaddv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqaddq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqaddv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqaddq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqaddv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqaddq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqaddv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqsub_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqsubv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqsub_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqsubv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqsub_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqsubv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqsub_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqsubdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqsub_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqsubv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqsub_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqsubv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqsub_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqsubv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqsub_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqsubdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqsubq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sqsubv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqsubq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqsubv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqsubq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqsubv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqsubq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sqsubv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqsubq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqsubv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqsubq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqsubv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqsubq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqsubv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqsubq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqsubv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqneg_s8 (int8x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_sqnegv8qi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqneg_s16 (int16x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_sqnegv4hi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqneg_s32 (int32x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_sqnegv2si (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqnegq_s8 (int8x16_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_sqnegv16qi (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqnegq_s16 (int16x8_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_sqnegv8hi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqnegq_s32 (int32x4_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_sqnegv4si (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqabs_s8 (int8x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_sqabsv8qi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqabs_s16 (int16x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_sqabsv4hi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqabs_s32 (int32x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_sqabsv2si (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqabsq_s8 (int8x16_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_sqabsv16qi (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqabsq_s16 (int16x8_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_sqabsv8hi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqabsq_s32 (int32x4_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_sqabsv4si (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqdmulh_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqdmulhv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqdmulh_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqdmulhv2si (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqdmulhq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqdmulhv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmulhq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqdmulhv4si (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrdmulh_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqrdmulhv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrdmulh_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqrdmulhv2si (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrdmulhq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqrdmulhv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrdmulhq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqrdmulhv4si (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vcreate_s8 (uint64_t __a) ++{ ++ return (int8x8_t) __a; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vcreate_s16 (uint64_t __a) ++{ ++ return (int16x4_t) __a; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcreate_s32 (uint64_t __a) ++{ ++ return (int32x2_t) __a; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vcreate_s64 (uint64_t __a) ++{ ++ return (int64x1_t) __a; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcreate_f32 (uint64_t __a) ++{ ++ return (float32x2_t) __a; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcreate_u8 (uint64_t __a) ++{ ++ return (uint8x8_t) __a; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcreate_u16 (uint64_t __a) ++{ ++ return (uint16x4_t) __a; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcreate_u32 (uint64_t __a) ++{ ++ return (uint32x2_t) __a; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcreate_u64 (uint64_t __a) ++{ ++ return (uint64x1_t) __a; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vcreate_f64 (uint64_t __a) ++{ ++ return (float64x1_t) __builtin_aarch64_createdf (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vcreate_p8 (uint64_t __a) ++{ ++ return (poly8x8_t) __a; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vcreate_p16 (uint64_t __a) ++{ ++ return (poly16x4_t) __a; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vget_lane_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8_t) __builtin_aarch64_get_lane_signedv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vget_lane_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16_t) __builtin_aarch64_get_lane_signedv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vget_lane_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32_t) __builtin_aarch64_get_lane_signedv2si (__a, __b); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vget_lane_f32 (float32x2_t __a, const int __b) ++{ ++ return (float32_t) __builtin_aarch64_get_lanev2sf (__a, __b); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vget_lane_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8_t) __builtin_aarch64_get_lane_unsignedv8qi ((int8x8_t) __a, ++ __b); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vget_lane_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16_t) __builtin_aarch64_get_lane_unsignedv4hi ((int16x4_t) __a, ++ __b); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vget_lane_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32_t) __builtin_aarch64_get_lane_unsignedv2si ((int32x2_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly8_t __attribute__ ((__always_inline__)) ++vget_lane_p8 (poly8x8_t __a, const int __b) ++{ ++ return (poly8_t) __builtin_aarch64_get_lane_unsignedv8qi ((int8x8_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly16_t __attribute__ ((__always_inline__)) ++vget_lane_p16 (poly16x4_t __a, const int __b) ++{ ++ return (poly16_t) __builtin_aarch64_get_lane_unsignedv4hi ((int16x4_t) __a, ++ __b); ++} ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vget_lane_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64_t) __builtin_aarch64_get_lanedi (__a, __b); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vget_lane_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64_t) __builtin_aarch64_get_lanedi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vgetq_lane_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8_t) __builtin_aarch64_get_lane_signedv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vgetq_lane_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16_t) __builtin_aarch64_get_lane_signedv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vgetq_lane_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32_t) __builtin_aarch64_get_lane_signedv4si (__a, __b); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vgetq_lane_f32 (float32x4_t __a, const int __b) ++{ ++ return (float32_t) __builtin_aarch64_get_lanev4sf (__a, __b); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vgetq_lane_f64 (float64x2_t __a, const int __b) ++{ ++ return (float64_t) __builtin_aarch64_get_lanev2df (__a, __b); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vgetq_lane_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8_t) __builtin_aarch64_get_lane_unsignedv16qi ((int8x16_t) __a, ++ __b); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vgetq_lane_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16_t) __builtin_aarch64_get_lane_unsignedv8hi ((int16x8_t) __a, ++ __b); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vgetq_lane_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32_t) __builtin_aarch64_get_lane_unsignedv4si ((int32x4_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly8_t __attribute__ ((__always_inline__)) ++vgetq_lane_p8 (poly8x16_t __a, const int __b) ++{ ++ return (poly8_t) __builtin_aarch64_get_lane_unsignedv16qi ((int8x16_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly16_t __attribute__ ((__always_inline__)) ++vgetq_lane_p16 (poly16x8_t __a, const int __b) ++{ ++ return (poly16_t) __builtin_aarch64_get_lane_unsignedv8hi ((int16x8_t) __a, ++ __b); ++} ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vgetq_lane_s64 (int64x2_t __a, const int __b) ++{ ++ return __builtin_aarch64_get_lane_unsignedv2di (__a, __b); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vgetq_lane_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64_t) __builtin_aarch64_get_lane_unsignedv2di ((int64x2_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_s8 (int8x8_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv8qi (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_s16 (int16x4_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv4hi (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_s32 (int32x2_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv2si (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_s64 (int64x1_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qidi (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_f32 (float32x2_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv2sf (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u8 (uint8x8_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u16 (uint16x4_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u32 (uint32x2_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u64 (uint64x1_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_p16 (poly16x4_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s8 (int8x16_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv16qi (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s16 (int16x8_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv8hi (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s32 (int32x4_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv4si (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s64 (int64x2_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv2di (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_f32 (float32x4_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv4sf (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u8 (uint8x16_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u16 (uint16x8_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u32 (uint32x4_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv4si ((int32x4_t) ++ __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u64 (uint64x2_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv2di ((int64x2_t) ++ __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_p16 (poly16x8_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s8 (int8x8_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv8qi (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s16 (int16x4_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv4hi (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s32 (int32x2_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv2si (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s64 (int64x1_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hidi (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_f32 (float32x2_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv2sf (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u8 (uint8x8_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u16 (uint16x4_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u32 (uint32x2_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u64 (uint64x1_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_p8 (poly8x8_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s8 (int8x16_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv16qi (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s16 (int16x8_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv8hi (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s32 (int32x4_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv4si (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s64 (int64x2_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv2di (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_f32 (float32x4_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv4sf (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u8 (uint8x16_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u16 (uint16x8_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u32 (uint32x4_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u64 (uint64x2_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_p8 (poly8x16_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s8 (int8x8_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv8qi (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s16 (int16x4_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv4hi (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s32 (int32x2_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv2si (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s64 (int64x1_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfdi (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u8 (uint8x8_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u16 (uint16x4_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv4hi ((int16x4_t) ++ __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u32 (uint32x2_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv2si ((int32x2_t) ++ __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u64 (uint64x1_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfdi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_p8 (poly8x8_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_p16 (poly16x4_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv4hi ((int16x4_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s8 (int8x16_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv16qi (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s16 (int16x8_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv8hi (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s32 (int32x4_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv4si (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s64 (int64x2_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv2di (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u8 (uint8x16_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u16 (uint16x8_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u32 (uint32x4_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv4si ((int32x4_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u64 (uint64x2_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv2di ((int64x2_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_p8 (poly8x16_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_p16 (poly16x8_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_s8 (int8x8_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv8qi (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_s16 (int16x4_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv4hi (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_s32 (int32x2_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv2si (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_f32 (float32x2_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv2sf (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u8 (uint8x8_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u16 (uint16x4_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u32 (uint32x2_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u64 (uint64x1_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_p8 (poly8x8_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_p16 (poly16x4_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s8 (int8x16_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div16qi (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s16 (int16x8_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div8hi (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s32 (int32x4_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_f32 (float32x4_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div4sf (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u8 (uint8x16_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u16 (uint16x8_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u32 (uint32x4_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u64 (uint64x2_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_p8 (poly8x16_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_p16 (poly16x8_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s8 (int8x8_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv8qi (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s16 (int16x4_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv4hi (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s32 (int32x2_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv2si (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdidi (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_f32 (float32x2_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv2sf (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u8 (uint8x8_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u16 (uint16x4_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u32 (uint32x2_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_p8 (poly8x8_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_p16 (poly16x4_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s8 (int8x16_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div16qi (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s16 (int16x8_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div8hi (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s32 (int32x4_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div4si (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s64 (int64x2_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div2di (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_f32 (float32x4_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div4sf (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u8 (uint8x16_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u16 (uint16x8_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u32 (uint32x4_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_p8 (poly8x16_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_p16 (poly16x8_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s16 (int16x4_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv4hi (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s32 (int32x2_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv2si (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s64 (int64x1_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qidi (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_f32 (float32x2_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv2sf (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u8 (uint8x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u16 (uint16x4_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u32 (uint32x2_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u64 (uint64x1_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_p8 (poly8x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_p16 (poly16x4_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s16 (int16x8_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv8hi (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s32 (int32x4_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv4si (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s64 (int64x2_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv2di (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_f32 (float32x4_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv4sf (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u8 (uint8x16_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u16 (uint16x8_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u32 (uint32x4_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u64 (uint64x2_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_p8 (poly8x16_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_p16 (poly16x8_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s8 (int8x8_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv8qi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s32 (int32x2_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv2si (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s64 (int64x1_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hidi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_f32 (float32x2_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv2sf (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u8 (uint8x8_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u16 (uint16x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u32 (uint32x2_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u64 (uint64x1_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_p8 (poly8x8_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_p16 (poly16x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s8 (int8x16_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv16qi (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s32 (int32x4_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv4si (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s64 (int64x2_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv2di (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_f32 (float32x4_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv4sf (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u8 (uint8x16_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u16 (uint16x8_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u32 (uint32x4_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u64 (uint64x2_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_p8 (poly8x16_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_p16 (poly16x8_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s8 (int8x8_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv8qi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s16 (int16x4_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv4hi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s64 (int64x1_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2sidi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_f32 (float32x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv2sf (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u8 (uint8x8_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u16 (uint16x4_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u32 (uint32x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u64 (uint64x1_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2sidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_p8 (poly8x8_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_p16 (poly16x4_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s8 (int8x16_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv16qi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s16 (int16x8_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv8hi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s64 (int64x2_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv2di (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_f32 (float32x4_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv4sf (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u8 (uint8x16_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u16 (uint16x8_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u32 (uint32x4_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u64 (uint64x2_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_p8 (poly8x16_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_p16 (poly16x8_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s8 (int8x8_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv8qi (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s16 (int16x4_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv4hi (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s32 (int32x2_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv2si (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s64 (int64x1_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qidi (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_f32 (float32x2_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv2sf (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u16 (uint16x4_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u32 (uint32x2_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u64 (uint64x1_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_p8 (poly8x8_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_p16 (poly16x4_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s8 (int8x16_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv16qi (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s16 (int16x8_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv8hi (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s32 (int32x4_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv4si (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s64 (int64x2_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv2di (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_f32 (float32x4_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv4sf (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_u16 (uint16x8_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_u32 (uint32x4_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv4si ((int32x4_t) ++ __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_u64 (uint64x2_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv2di ((int64x2_t) ++ __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_p8 (poly8x16_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_p16 (poly16x8_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s8 (int8x8_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv8qi (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s16 (int16x4_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv4hi (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s32 (int32x2_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv2si (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s64 (int64x1_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hidi (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_f32 (float32x2_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv2sf (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u8 (uint8x8_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u32 (uint32x2_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u64 (uint64x1_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_p8 (poly8x8_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_p16 (poly16x4_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s8 (int8x16_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv16qi (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s16 (int16x8_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv8hi (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s32 (int32x4_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv4si (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s64 (int64x2_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv2di (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_f32 (float32x4_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv4sf (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_u8 (uint8x16_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_u32 (uint32x4_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_u64 (uint64x2_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_p8 (poly8x16_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_p16 (poly16x8_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s8 (int8x8_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv8qi (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s16 (int16x4_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv4hi (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s32 (int32x2_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv2si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s64 (int64x1_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2sidi (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_f32 (float32x2_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv2sf (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u8 (uint8x8_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u16 (uint16x4_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u64 (uint64x1_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2sidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_p8 (poly8x8_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_p16 (poly16x4_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s8 (int8x16_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv16qi (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s16 (int16x8_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv8hi (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s32 (int32x4_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv4si (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s64 (int64x2_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv2di (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_f32 (float32x4_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv4sf (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u8 (uint8x16_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u16 (uint16x8_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u64 (uint64x2_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_p8 (poly8x16_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_p16 (poly16x8_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vcombine_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_combinev8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vcombine_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_combinev4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcombine_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_combinev2si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcombine_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_combinedi (__a, __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcombine_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return (float32x4_t) __builtin_aarch64_combinev2sf (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcombine_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_combinev8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcombine_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_combinev4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcombine_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_combinev2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcombine_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_combinedi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcombine_f64 (float64x1_t __a, float64x1_t __b) ++{ ++ return (float64x2_t) __builtin_aarch64_combinedf (__a, __b); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vcombine_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (poly8x16_t) __builtin_aarch64_combinev8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vcombine_p16 (poly16x4_t __a, poly16x4_t __b) ++{ ++ return (poly16x8_t) __builtin_aarch64_combinev4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++/* Start of temporary inline asm implementations. */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vaba_s8 (int8x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int8x8_t result; ++ __asm__ ("saba %0.8b,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vaba_s16 (int16x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int16x4_t result; ++ __asm__ ("saba %0.4h,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vaba_s32 (int32x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int32x2_t result; ++ __asm__ ("saba %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vaba_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint8x8_t result; ++ __asm__ ("uaba %0.8b,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vaba_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("uaba %0.4h,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vaba_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("uaba %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabal_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("sabal2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ int32x4_t result; ++ __asm__ ("sabal2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) ++{ ++ int64x2_t result; ++ __asm__ ("sabal2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabal_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("uabal2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabal_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("uabal2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vabal_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("uabal2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabal_s8 (int16x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("sabal %0.8h,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabal_s16 (int32x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("sabal %0.4s,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabal_s32 (int64x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int64x2_t result; ++ __asm__ ("sabal %0.2d,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabal_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("uabal %0.8h,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabal_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("uabal %0.4s,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vabal_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("uabal %0.2d,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vabaq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) ++{ ++ int8x16_t result; ++ __asm__ ("saba %0.16b,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabaq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("saba %0.8h,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabaq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("saba %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vabaq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint8x16_t result; ++ __asm__ ("uaba %0.16b,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabaq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("uaba %0.8h,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("uaba %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vabd_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fabd %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vabd_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("sabd %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vabd_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sabd %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vabd_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sabd %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vabd_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uabd %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vabd_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uabd %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vabd_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uabd %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vabdd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("fabd %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabdl_high_s8 (int8x16_t a, int8x16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sabdl2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabdl_high_s16 (int16x8_t a, int16x8_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sabdl2 %0.4s,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabdl_high_s32 (int32x4_t a, int32x4_t b) ++{ ++ int64x2_t result; ++ __asm__ ("sabdl2 %0.2d,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabdl_high_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uabdl2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabdl_high_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uabdl2 %0.4s,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vabdl_high_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uabdl2 %0.2d,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabdl_s8 (int8x8_t a, int8x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sabdl %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabdl_s16 (int16x4_t a, int16x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sabdl %0.4s, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabdl_s32 (int32x2_t a, int32x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("sabdl %0.2d, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabdl_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uabdl %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabdl_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uabdl %0.4s, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vabdl_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uabdl %0.2d, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vabdq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fabd %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vabdq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fabd %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vabdq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("sabd %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabdq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sabd %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabdq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sabd %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vabdq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uabd %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabdq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uabd %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabdq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uabd %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vabds_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("fabd %s0, %s1, %s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vabs_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("fabs %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vabs_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("abs %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vabs_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("abs %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vabs_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("abs %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vabsq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("fabs %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vabsq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("fabs %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vabsq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("abs %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabsq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("abs %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabsq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("abs %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabsq_s64 (int64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("abs %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vacged_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("facge %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vacges_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("facge %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vacgtd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("facgt %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vacgts_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("facgt %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddlv_s8 (int8x8_t a) ++{ ++ int16_t result; ++ __asm__ ("saddlv %h0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddlv_s16 (int16x4_t a) ++{ ++ int32_t result; ++ __asm__ ("saddlv %s0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddlv_u8 (uint8x8_t a) ++{ ++ uint16_t result; ++ __asm__ ("uaddlv %h0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddlv_u16 (uint16x4_t a) ++{ ++ uint32_t result; ++ __asm__ ("uaddlv %s0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddlvq_s8 (int8x16_t a) ++{ ++ int16_t result; ++ __asm__ ("saddlv %h0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddlvq_s16 (int16x8_t a) ++{ ++ int32_t result; ++ __asm__ ("saddlv %s0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vaddlvq_s32 (int32x4_t a) ++{ ++ int64_t result; ++ __asm__ ("saddlv %d0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddlvq_u8 (uint8x16_t a) ++{ ++ uint16_t result; ++ __asm__ ("uaddlv %h0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddlvq_u16 (uint16x8_t a) ++{ ++ uint32_t result; ++ __asm__ ("uaddlv %s0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vaddlvq_u32 (uint32x4_t a) ++{ ++ uint64_t result; ++ __asm__ ("uaddlv %d0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vaddv_s8 (int8x8_t a) ++{ ++ int8_t result; ++ __asm__ ("addv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddv_s16 (int16x4_t a) ++{ ++ int16_t result; ++ __asm__ ("addv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vaddv_u8 (uint8x8_t a) ++{ ++ uint8_t result; ++ __asm__ ("addv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddv_u16 (uint16x4_t a) ++{ ++ uint16_t result; ++ __asm__ ("addv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vaddvq_s8 (int8x16_t a) ++{ ++ int8_t result; ++ __asm__ ("addv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddvq_s16 (int16x8_t a) ++{ ++ int16_t result; ++ __asm__ ("addv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddvq_s32 (int32x4_t a) ++{ ++ int32_t result; ++ __asm__ ("addv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vaddvq_u8 (uint8x16_t a) ++{ ++ uint8_t result; ++ __asm__ ("addv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddvq_u16 (uint16x8_t a) ++{ ++ uint16_t result; ++ __asm__ ("addv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddvq_u32 (uint32x4_t a) ++{ ++ uint32_t result; ++ __asm__ ("addv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vbsl_f32 (uint32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ float32x2_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vbsl_p8 (uint8x8_t a, poly8x8_t b, poly8x8_t c) ++{ ++ poly8x8_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vbsl_p16 (uint16x4_t a, poly16x4_t b, poly16x4_t c) ++{ ++ poly16x4_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vbsl_s8 (uint8x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int8x8_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vbsl_s16 (uint16x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int16x4_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vbsl_s32 (uint32x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int32x2_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vbsl_s64 (uint64x1_t a, int64x1_t b, int64x1_t c) ++{ ++ int64x1_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vbsl_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint8x8_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vbsl_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vbsl_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vbsl_u64 (uint64x1_t a, uint64x1_t b, uint64x1_t c) ++{ ++ uint64x1_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vbslq_f32 (uint32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ float32x4_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vbslq_f64 (uint64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ float64x2_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vbslq_p8 (uint8x16_t a, poly8x16_t b, poly8x16_t c) ++{ ++ poly8x16_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vbslq_p16 (uint16x8_t a, poly16x8_t b, poly16x8_t c) ++{ ++ poly16x8_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vbslq_s8 (uint8x16_t a, int8x16_t b, int8x16_t c) ++{ ++ int8x16_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vbslq_s16 (uint16x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vbslq_s32 (uint32x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vbslq_s64 (uint64x2_t a, int64x2_t b, int64x2_t c) ++{ ++ int64x2_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vbslq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint8x16_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vbslq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vbslq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vbslq_u64 (uint64x2_t a, uint64x2_t b, uint64x2_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcage_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("facge %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcageq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("facge %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcageq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("facge %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcagt_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("facgt %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcagtq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("facgt %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcagtq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("facgt %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcale_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("facge %0.2s, %2.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcaleq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("facge %0.4s, %2.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcaleq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("facge %0.2d, %2.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcalt_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("facgt %0.2s, %2.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcaltq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("facgt %0.4s, %2.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcaltq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("facgt %0.2d, %2.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceq_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmeq %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmeq %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vceqd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("fcmeq %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmeq %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmeq %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vceqs_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("fcmeq %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vceqzd_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcmeq %d0,%d1,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vceqzs_f32 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcmeq %s0,%s1,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcge_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmge %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcge_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmge %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgeq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmge %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgeq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmge %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgt_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmgt %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgt_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmgt %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmgt %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmgt %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcle_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmge %0.2s, %2.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcle_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmge %d0, %d2, %d1" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcleq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmge %0.4s, %2.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcleq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmge %0.2d, %2.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vcls_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("cls %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vcls_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("cls %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcls_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("cls %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vclsq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("cls %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vclsq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("cls %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vclsq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("cls %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclt_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmgt %0.2s, %2.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclt_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmgt %d0, %d2, %d1" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmgt %0.4s, %2.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmgt %0.2d, %2.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vclz_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("clz %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vclz_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("clz %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vclz_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("clz %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclz_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("clz %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vclz_u16 (uint16x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("clz %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclz_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("clz %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vclzq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("clz %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vclzq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("clz %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vclzq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("clz %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vclzq_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("clz %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vclzq_u16 (uint16x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("clz %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vclzq_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("clz %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vcnt_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("cnt %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vcnt_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("cnt %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcnt_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("cnt %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vcntq_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("cnt %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vcntq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("cnt %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcntq_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("cnt %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcopyq_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ins %0.s[%2], %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_f64(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t c_ = (c); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ins %0.d[%2], %3.d[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_p8(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t c_ = (c); \ ++ poly8x16_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("ins %0.b[%2], %3.b[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_p16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t c_ = (c); \ ++ poly16x8_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("ins %0.h[%2], %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_s8(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t c_ = (c); \ ++ int8x16_t a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("ins %0.b[%2], %3.b[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("ins %0.h[%2], %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("ins %0.s[%2], %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_s64(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t c_ = (c); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("ins %0.d[%2], %3.d[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_u8(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t c_ = (c); \ ++ uint8x16_t a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("ins %0.b[%2], %3.b[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("ins %0.h[%2], %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("ins %0.s[%2], %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_u64(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t c_ = (c); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("ins %0.d[%2], %3.d[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++/* vcvt_f16_f32 not supported */ ++ ++/* vcvt_f32_f16 not supported */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_f64 (float64x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("fcvtn %0.2s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_s32 (int32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("scvtf %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_u32 (uint32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("ucvtf %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvt_f64_f32 (float32x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("fcvtl %0.2d,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vcvt_f64_s64 (uint64x1_t a) ++{ ++ float64x1_t result; ++ __asm__ ("scvtf %d0, %d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vcvt_f64_u64 (uint64x1_t a) ++{ ++ float64x1_t result; ++ __asm__ ("ucvtf %d0, %d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++/* vcvt_high_f16_f32 not supported */ ++ ++/* vcvt_high_f32_f16 not supported */ ++ ++static float32x2_t vdup_n_f32 (float32_t); ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvt_high_f32_f64 (float32x2_t a, float64x2_t b) ++{ ++ float32x4_t result = vcombine_f32 (a, vdup_n_f32 (0.0f)); ++ __asm__ ("fcvtn2 %0.4s,%2.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvt_high_f64_f32 (float32x4_t a) ++{ ++ float64x2_t result; ++ __asm__ ("fcvtl2 %0.2d,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcvt_n_f32_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("scvtf %0.2s, %1.2s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvt_n_f32_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("ucvtf %0.2s, %1.2s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvt_n_s32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("fcvtzs %0.2s, %1.2s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvt_n_u32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("fcvtzu %0.2s, %1.2s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvt_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtzs %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvt_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtzu %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvta_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtas %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvta_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtau %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtad_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtas %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtad_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtau %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtaq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtas %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtaq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtas %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtaq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtau %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtaq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtau %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtas_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtas %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtas_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtau %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vcvtd_f64_s64 (int64_t a) ++{ ++ int64_t result; ++ __asm__ ("scvtf %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcvtd_f64_u64 (uint64_t a) ++{ ++ uint64_t result; ++ __asm__ ("ucvtf %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcvtd_n_f64_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64_t a_ = (a); \ ++ int64_t result; \ ++ __asm__ ("scvtf %d0,%d1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtd_n_f64_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64_t a_ = (a); \ ++ uint64_t result; \ ++ __asm__ ("ucvtf %d0,%d1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtd_n_s64_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fcvtzs %d0,%d1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtd_n_u64_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fcvtzu %d0,%d1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtd_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtzs %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtd_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtzu %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtm_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtms %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtm_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtmu %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtmd_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtms %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtmd_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtmu %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtmq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtms %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtmq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtms %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtmq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtmu %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtmq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtmu %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtms_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtms %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtms_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtmu %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtn_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtns %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtn_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtnu %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtnd_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtns %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtnd_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtnu %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtnq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtns %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtnq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtns %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtnq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtnu %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtnq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtnu %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtns_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtns %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtns_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtnu %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtp_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtps %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtp_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtpu %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtpd_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtps %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtpd_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtpu %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtpq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtps %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtpq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtps %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtpq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtpu %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtpq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtpu %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtps_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtps %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtps_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtpu %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvtq_f32_s32 (int32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("scvtf %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvtq_f32_u32 (uint32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("ucvtf %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvtq_f64_s64 (int64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("scvtf %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvtq_f64_u64 (uint64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("ucvtf %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcvtq_n_f32_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("scvtf %0.4s, %1.4s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_f32_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ucvtf %0.4s, %1.4s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_f64_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("scvtf %0.2d, %1.2d, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_f64_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ucvtf %0.2d, %1.2d, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_s32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("fcvtzs %0.4s, %1.4s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_s64_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("fcvtzs %0.2d, %1.2d, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_u32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("fcvtzu %0.4s, %1.4s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_u64_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("fcvtzu %0.2d, %1.2d, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtzs %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtzs %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtzu %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtzu %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vcvts_f64_s32 (int32_t a) ++{ ++ int32_t result; ++ __asm__ ("scvtf %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcvts_f64_u32 (uint32_t a) ++{ ++ uint32_t result; ++ __asm__ ("ucvtf %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcvts_n_f32_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32_t a_ = (a); \ ++ int32_t result; \ ++ __asm__ ("scvtf %s0,%s1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvts_n_f32_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32_t a_ = (a); \ ++ uint32_t result; \ ++ __asm__ ("ucvtf %s0,%s1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvts_n_s32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fcvtzs %s0,%s1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvts_n_u32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fcvtzu %s0,%s1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvts_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtzs %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvts_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtzu %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvtx_f32_f64 (float64x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("fcvtxn %0.2s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvtx_high_f32_f64 (float64x2_t a) ++{ ++ float32x4_t result; ++ __asm__ ("fcvtxn2 %0.4s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtxd_f32_f64 (float64_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtxn %s0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vdup_lane_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("dup %0.2s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_p8(a, b) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("dup %0.8b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_p16(a, b) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("dup %0.4h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_s8(a, b) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("dup %0.8b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_s16(a, b) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("dup %0.4h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("dup %0.2s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t a_ = (a); \ ++ int64x1_t result; \ ++ __asm__ ("ins %0.d[0],%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_u8(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("dup %0.8b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_u16(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("dup %0.4h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("dup %0.2s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t a_ = (a); \ ++ uint64x1_t result; \ ++ __asm__ ("ins %0.d[0],%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vdup_n_f32 (float32_t a) ++{ ++ float32x2_t result; ++ __asm__ ("dup %0.2s, %w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vdup_n_p8 (uint32_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vdup_n_p16 (uint32_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vdup_n_s8 (int32_t a) ++{ ++ int8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vdup_n_s16 (int32_t a) ++{ ++ int16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vdup_n_s32 (int32_t a) ++{ ++ int32x2_t result; ++ __asm__ ("dup %0.2s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vdup_n_s64 (int64_t a) ++{ ++ int64x1_t result; ++ __asm__ ("ins %0.d[0],%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vdup_n_u8 (uint32_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vdup_n_u16 (uint32_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vdup_n_u32 (uint32_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("dup %0.2s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vdup_n_u64 (uint64_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("ins %0.d[0],%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vdupd_lane_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("dup %d0, %1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("dup %0.4s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("dup %0.2d,%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_p8(a, b) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("dup %0.16b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_p16(a, b) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("dup %0.8h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_s8(a, b) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("dup %0.16b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_s16(a, b) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("dup %0.8h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("dup %0.4s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("dup %0.2d,%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_u8(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("dup %0.16b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_u16(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("dup %0.8h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("dup %0.4s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("dup %0.2d,%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vdupq_n_f32 (float32_t a) ++{ ++ float32x4_t result; ++ __asm__ ("dup %0.4s, %w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vdupq_n_f64 (float64_t a) ++{ ++ float64x2_t result; ++ __asm__ ("dup %0.2d, %x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vdupq_n_p8 (uint32_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vdupq_n_p16 (uint32_t a) ++{ ++ poly16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vdupq_n_s8 (int32_t a) ++{ ++ int8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vdupq_n_s16 (int32_t a) ++{ ++ int16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vdupq_n_s32 (int32_t a) ++{ ++ int32x4_t result; ++ __asm__ ("dup %0.4s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vdupq_n_s64 (int64_t a) ++{ ++ int64x2_t result; ++ __asm__ ("dup %0.2d,%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vdupq_n_u8 (uint32_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vdupq_n_u16 (uint32_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vdupq_n_u32 (uint32_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("dup %0.4s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vdupq_n_u64 (uint64_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("dup %0.2d,%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vdups_lane_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("dup %s0, %1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ float64x1_t a_ = (a); \ ++ float64x1_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8x8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("ext %0.8b,%1.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16x4_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("ext %0.8b,%1.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t b_ = (b); \ ++ int64x1_t a_ = (a); \ ++ int64x1_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("ext %0.8b,%1.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t b_ = (b); \ ++ uint64x1_t a_ = (a); \ ++ uint64x1_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8x16_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16x8_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t b_ = (b); \ ++ int8x16_t a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t b_ = (b); \ ++ uint8x16_t a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vfma_f32 (float32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ float32x2_t result; ++ __asm__ ("fmla %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vfma_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t c_ = (c); \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("fmla %0.2s,%2.2s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vfmad_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fmla %d0,%d1,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vfmaq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ float32x4_t result; ++ __asm__ ("fmla %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vfmaq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ float64x2_t result; ++ __asm__ ("fmla %0.2d,%2.2d,%3.2d" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vfmaq_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("fmla %0.4s,%2.4s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vfmaq_lane_f64(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t c_ = (c); \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("fmla %0.2d,%2.2d,%3.d[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vfmas_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fmla %s0,%s1,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vfma_n_f32 (float32x2_t a, float32x2_t b, float32_t c) ++{ ++ float32x2_t result; ++ __asm__ ("fmla %0.2s, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vfmaq_n_f32 (float32x4_t a, float32x4_t b, float32_t c) ++{ ++ float32x4_t result; ++ __asm__ ("fmla %0.4s, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vfmaq_n_f64 (float64x2_t a, float64x2_t b, float64_t c) ++{ ++ float64x2_t result; ++ __asm__ ("fmla %0.2d, %2.2d, %3.d[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vfms_f32 (float32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ float32x2_t result; ++ __asm__ ("fmls %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vfmsd_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fmls %d0,%d1,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vfmsq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ float32x4_t result; ++ __asm__ ("fmls %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vfmsq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ float64x2_t result; ++ __asm__ ("fmls %0.2d,%2.2d,%3.2d" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vfmss_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fmls %s0,%s1,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vget_high_f32 (float32x4_t a) ++{ ++ float32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vget_high_f64 (float64x2_t a) ++{ ++ float64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vget_high_p8 (poly8x16_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vget_high_p16 (poly16x8_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vget_high_s8 (int8x16_t a) ++{ ++ int8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vget_high_s16 (int16x8_t a) ++{ ++ int16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vget_high_s32 (int32x4_t a) ++{ ++ int32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vget_high_s64 (int64x2_t a) ++{ ++ int64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vget_high_u8 (uint8x16_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vget_high_u16 (uint16x8_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vget_high_u32 (uint32x4_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vget_high_u64 (uint64x2_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vget_lane_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("umov %x0, %1.d[%2]" \ ++ : "=r"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vget_low_f32 (float32x4_t a) ++{ ++ float32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vget_low_f64 (float64x2_t a) ++{ ++ float64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vget_low_p8 (poly8x16_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vget_low_p16 (poly16x8_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vget_low_s8 (int8x16_t a) ++{ ++ int8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vget_low_s16 (int16x8_t a) ++{ ++ int16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vget_low_s32 (int32x4_t a) ++{ ++ int32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vget_low_s64 (int64x2_t a) ++{ ++ int64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vget_low_u8 (uint8x16_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vget_low_u16 (uint16x8_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vget_low_u32 (uint32x4_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vget_low_u64 (uint64x2_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vhsub_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("shsub %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vhsub_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("shsub %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vhsub_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("shsub %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vhsub_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uhsub %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vhsub_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uhsub %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vhsub_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uhsub %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vhsubq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("shsub %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vhsubq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("shsub %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vhsubq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("shsub %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vhsubq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uhsub %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vhsubq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uhsub %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vhsubq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uhsub %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vld1_dup_f32 (float32_t * a) ++{ ++ float32x2_t result; ++ __asm__ ("ld1r {%0.2s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vld1_dup_f64 (float64_t * a) ++{ ++ float64x1_t result; ++ __asm__ ("ld1 {%0.1d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vld1_dup_p8 (poly8_t * a) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1r {%0.8b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vld1_dup_p16 (poly16_t * a) ++{ ++ poly16x4_t result; ++ __asm__ ("ld1r {%0.4h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vld1_dup_s8 (int8_t * a) ++{ ++ int8x8_t result; ++ __asm__ ("ld1r {%0.8b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vld1_dup_s16 (int16_t * a) ++{ ++ int16x4_t result; ++ __asm__ ("ld1r {%0.4h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vld1_dup_s32 (int32_t * a) ++{ ++ int32x2_t result; ++ __asm__ ("ld1r {%0.2s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vld1_dup_s64 (int64_t * a) ++{ ++ int64x1_t result; ++ __asm__ ("ld1 {%0.1d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vld1_dup_u8 (uint8_t * a) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1r {%0.8b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vld1_dup_u16 (uint16_t * a) ++{ ++ uint16x4_t result; ++ __asm__ ("ld1r {%0.4h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vld1_dup_u32 (uint32_t * a) ++{ ++ uint32x2_t result; ++ __asm__ ("ld1r {%0.2s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vld1_dup_u64 (uint64_t * a) ++{ ++ uint64x1_t result; ++ __asm__ ("ld1 {%0.1d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vld1_f32 (float32_t * a) ++{ ++ float32x2_t result; ++ __asm__ ("ld1 {%0.2s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vld1_f64 (float64_t * a) ++{ ++ float64x1_t result; ++ __asm__ ("ld1 {%0.1d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++#define vld1_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32_t * a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("ld1 {%0.s}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ float64_t * a_ = (a); \ ++ float64x1_t result; \ ++ __asm__ ("ld1 {%0.d}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8_t * a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("ld1 {%0.b}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16_t * a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("ld1 {%0.h}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t b_ = (b); \ ++ int8_t * a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("ld1 {%0.b}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16_t * a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("ld1 {%0.h}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32_t * a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("ld1 {%0.s}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t b_ = (b); \ ++ int64_t * a_ = (a); \ ++ int64x1_t result; \ ++ __asm__ ("ld1 {%0.d}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t b_ = (b); \ ++ uint8_t * a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("ld1 {%0.b}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16_t * a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("ld1 {%0.h}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32_t * a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("ld1 {%0.s}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t b_ = (b); \ ++ uint64_t * a_ = (a); \ ++ uint64x1_t result; \ ++ __asm__ ("ld1 {%0.d}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vld1_p8 (poly8_t * a) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1 {%0.8b}, [%1]" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vld1_p16 (poly16_t * a) ++{ ++ poly16x4_t result; ++ __asm__ ("ld1 {%0.4h}, [%1]" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vld1_s8 (int8_t * a) ++{ ++ int8x8_t result; ++ __asm__ ("ld1 {%0.8b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vld1_s16 (int16_t * a) ++{ ++ int16x4_t result; ++ __asm__ ("ld1 {%0.4h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vld1_s32 (int32_t * a) ++{ ++ int32x2_t result; ++ __asm__ ("ld1 {%0.2s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vld1_s64 (int64_t * a) ++{ ++ int64x1_t result; ++ __asm__ ("ld1 {%0.1d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vld1_u8 (uint8_t * a) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1 {%0.8b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vld1_u16 (uint16_t * a) ++{ ++ uint16x4_t result; ++ __asm__ ("ld1 {%0.4h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vld1_u32 (uint32_t * a) ++{ ++ uint32x2_t result; ++ __asm__ ("ld1 {%0.2s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vld1_u64 (uint64_t * a) ++{ ++ uint64x1_t result; ++ __asm__ ("ld1 {%0.1d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vld1q_dup_f32 (float32_t * a) ++{ ++ float32x4_t result; ++ __asm__ ("ld1r {%0.4s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vld1q_dup_f64 (float64_t * a) ++{ ++ float64x2_t result; ++ __asm__ ("ld1r {%0.2d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vld1q_dup_p8 (poly8_t * a) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1r {%0.16b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vld1q_dup_p16 (poly16_t * a) ++{ ++ poly16x8_t result; ++ __asm__ ("ld1r {%0.8h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vld1q_dup_s8 (int8_t * a) ++{ ++ int8x16_t result; ++ __asm__ ("ld1r {%0.16b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vld1q_dup_s16 (int16_t * a) ++{ ++ int16x8_t result; ++ __asm__ ("ld1r {%0.8h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vld1q_dup_s32 (int32_t * a) ++{ ++ int32x4_t result; ++ __asm__ ("ld1r {%0.4s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vld1q_dup_s64 (int64_t * a) ++{ ++ int64x2_t result; ++ __asm__ ("ld1r {%0.2d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vld1q_dup_u8 (uint8_t * a) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1r {%0.16b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vld1q_dup_u16 (uint16_t * a) ++{ ++ uint16x8_t result; ++ __asm__ ("ld1r {%0.8h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vld1q_dup_u32 (uint32_t * a) ++{ ++ uint32x4_t result; ++ __asm__ ("ld1r {%0.4s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vld1q_dup_u64 (uint64_t * a) ++{ ++ uint64x2_t result; ++ __asm__ ("ld1r {%0.2d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vld1q_f32 (float32_t * a) ++{ ++ float32x4_t result; ++ __asm__ ("ld1 {%0.4s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vld1q_f64 (float64_t * a) ++{ ++ float64x2_t result; ++ __asm__ ("ld1 {%0.2d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++#define vld1q_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t * a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ld1 {%0.s}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t * a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ld1 {%0.d}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8_t * a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("ld1 {%0.b}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16_t * a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("ld1 {%0.h}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t b_ = (b); \ ++ int8_t * a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("ld1 {%0.b}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16_t * a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("ld1 {%0.h}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32_t * a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("ld1 {%0.s}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int64_t * a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("ld1 {%0.d}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t b_ = (b); \ ++ uint8_t * a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("ld1 {%0.b}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16_t * a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("ld1 {%0.h}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32_t * a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("ld1 {%0.s}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint64_t * a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("ld1 {%0.d}[%3],[%1]" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vld1q_p8 (poly8_t * a) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1 {%0.16b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vld1q_p16 (poly16_t * a) ++{ ++ poly16x8_t result; ++ __asm__ ("ld1 {%0.8h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vld1q_s8 (int8_t * a) ++{ ++ int8x16_t result; ++ __asm__ ("ld1 {%0.16b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vld1q_s16 (int16_t * a) ++{ ++ int16x8_t result; ++ __asm__ ("ld1 {%0.8h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vld1q_s32 (int32_t * a) ++{ ++ int32x4_t result; ++ __asm__ ("ld1 {%0.4s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vld1q_s64 (int64_t * a) ++{ ++ int64x2_t result; ++ __asm__ ("ld1 {%0.2d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vld1q_u8 (uint8_t * a) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1 {%0.16b},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vld1q_u16 (uint16_t * a) ++{ ++ uint16x8_t result; ++ __asm__ ("ld1 {%0.8h},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vld1q_u32 (uint32_t * a) ++{ ++ uint32x4_t result; ++ __asm__ ("ld1 {%0.4s},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vld1q_u64 (uint64_t * a) ++{ ++ uint64x2_t result; ++ __asm__ ("ld1 {%0.2d},[%1]" ++ : "=w"(result) ++ : "r"(a) ++ : "memory"); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmaxnm_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmaxnm %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmaxnmq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmaxnm %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmaxnmq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmaxnm %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxnmvq_f32 (float32x4_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxnmv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vmaxv_s8 (int8x8_t a) ++{ ++ int8_t result; ++ __asm__ ("smaxv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vmaxv_s16 (int16x4_t a) ++{ ++ int16_t result; ++ __asm__ ("smaxv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vmaxv_u8 (uint8x8_t a) ++{ ++ uint8_t result; ++ __asm__ ("umaxv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vmaxv_u16 (uint16x4_t a) ++{ ++ uint16_t result; ++ __asm__ ("umaxv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxvq_f32 (float32x4_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vmaxvq_s8 (int8x16_t a) ++{ ++ int8_t result; ++ __asm__ ("smaxv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vmaxvq_s16 (int16x8_t a) ++{ ++ int16_t result; ++ __asm__ ("smaxv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vmaxvq_s32 (int32x4_t a) ++{ ++ int32_t result; ++ __asm__ ("smaxv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vmaxvq_u8 (uint8x16_t a) ++{ ++ uint8_t result; ++ __asm__ ("umaxv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vmaxvq_u16 (uint16x8_t a) ++{ ++ uint16_t result; ++ __asm__ ("umaxv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vmaxvq_u32 (uint32x4_t a) ++{ ++ uint32_t result; ++ __asm__ ("umaxv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminnmvq_f32 (float32x4_t a) ++{ ++ float32_t result; ++ __asm__ ("fminnmv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vminv_s8 (int8x8_t a) ++{ ++ int8_t result; ++ __asm__ ("sminv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vminv_s16 (int16x4_t a) ++{ ++ int16_t result; ++ __asm__ ("sminv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vminv_u8 (uint8x8_t a) ++{ ++ uint8_t result; ++ __asm__ ("uminv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vminv_u16 (uint16x4_t a) ++{ ++ uint16_t result; ++ __asm__ ("uminv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminvq_f32 (float32x4_t a) ++{ ++ float32_t result; ++ __asm__ ("fminv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vminvq_s8 (int8x16_t a) ++{ ++ int8_t result; ++ __asm__ ("sminv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vminvq_s16 (int16x8_t a) ++{ ++ int16_t result; ++ __asm__ ("sminv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vminvq_s32 (int32x4_t a) ++{ ++ int32_t result; ++ __asm__ ("sminv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vminvq_u8 (uint8x16_t a) ++{ ++ uint8_t result; ++ __asm__ ("uminv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vminvq_u16 (uint16x8_t a) ++{ ++ uint16_t result; ++ __asm__ ("uminv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vminvq_u32 (uint32x4_t a) ++{ ++ uint32_t result; ++ __asm__ ("uminv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmla_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ float32x2_t t1; \ ++ __asm__ ("fmul %1.2s, %3.2s, %4.s[%5]; fadd %0.2s, %0.2s, %1.2s" \ ++ : "=w"(result), "=w"(t1) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mla %0.4h, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mla %0.2s, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mla %0.4h, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mla %0.2s, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mla %0.4h, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mla %0.2s, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mla %0.4h, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mla %0.2s, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmla_n_f32 (float32x2_t a, float32x2_t b, float32_t c) ++{ ++ float32x2_t result; ++ float32x2_t t1; ++ __asm__ ("fmul %1.2s, %3.2s, %4.s[0]; fadd %0.2s, %0.2s, %1.2s" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmla_n_s16 (int16x4_t a, int16x4_t b, int16_t c) ++{ ++ int16x4_t result; ++ __asm__ ("mla %0.4h,%2.4h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmla_n_s32 (int32x2_t a, int32x2_t b, int32_t c) ++{ ++ int32x2_t result; ++ __asm__ ("mla %0.2s,%2.2s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmla_n_u16 (uint16x4_t a, uint16x4_t b, uint16_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("mla %0.4h,%2.4h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmla_n_u32 (uint32x2_t a, uint32x2_t b, uint32_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("mla %0.2s,%2.2s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmla_s8 (int8x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int8x8_t result; ++ __asm__ ("mla %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmla_s16 (int16x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int16x4_t result; ++ __asm__ ("mla %0.4h, %2.4h, %3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmla_s32 (int32x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int32x2_t result; ++ __asm__ ("mla %0.2s, %2.2s, %3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmla_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint8x8_t result; ++ __asm__ ("mla %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmla_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("mla %0.4h, %2.4h, %3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmla_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("mla %0.2s, %2.2s, %3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlal_high_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlal2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlal2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlal2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlal2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlal2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlal2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlal2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlal2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlal_high_n_s16 (int32x4_t a, int16x8_t b, int16_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlal2 %0.4s,%2.8h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlal_high_n_s32 (int64x2_t a, int32x4_t b, int32_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlal2 %0.2d,%2.4s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlal_high_n_u16 (uint32x4_t a, uint16x8_t b, uint16_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlal2 %0.4s,%2.8h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlal_high_n_u32 (uint64x2_t a, uint32x4_t b, uint32_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlal2 %0.2d,%2.4s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlal_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("smlal2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlal2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlal2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlal_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("umlal2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlal_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlal2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlal_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlal2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlal_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlal %0.4s,%2.4h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlal %0.2d,%2.2s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlal %0.4s,%2.4h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlal %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlal %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlal %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlal %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlal %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlal_n_s16 (int32x4_t a, int16x4_t b, int16_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlal %0.4s,%2.4h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlal_n_s32 (int64x2_t a, int32x2_t b, int32_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlal %0.2d,%2.2s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlal_n_u16 (uint32x4_t a, uint16x4_t b, uint16_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlal %0.4s,%2.4h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlal_n_u32 (uint64x2_t a, uint32x2_t b, uint32_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlal %0.2d,%2.2s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlal_s8 (int16x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("smlal %0.8h,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlal_s16 (int32x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlal %0.4s,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlal_s32 (int64x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlal %0.2d,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlal_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("umlal %0.8h,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlal_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlal %0.4s,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlal_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlal %0.2d,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlaq_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ float32x4_t t1; \ ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[%5]; fadd %0.4s, %0.4s, %1.4s" \ ++ : "=w"(result), "=w"(t1) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mla %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mla %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mla %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mla %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mla %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mla %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mla %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mla %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmlaq_n_f32 (float32x4_t a, float32x4_t b, float32_t c) ++{ ++ float32x4_t result; ++ float32x4_t t1; ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[0]; fadd %0.4s, %0.4s, %1.4s" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmlaq_n_f64 (float64x2_t a, float64x2_t b, float64_t c) ++{ ++ float64x2_t result; ++ float64x2_t t1; ++ __asm__ ("fmul %1.2d, %3.2d, %4.d[0]; fadd %0.2d, %0.2d, %1.2d" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlaq_n_s16 (int16x8_t a, int16x8_t b, int16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("mla %0.8h,%2.8h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlaq_n_s32 (int32x4_t a, int32x4_t b, int32_t c) ++{ ++ int32x4_t result; ++ __asm__ ("mla %0.4s,%2.4s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlaq_n_u16 (uint16x8_t a, uint16x8_t b, uint16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("mla %0.8h,%2.8h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlaq_n_u32 (uint32x4_t a, uint32x4_t b, uint32_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("mla %0.4s,%2.4s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmlaq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) ++{ ++ int8x16_t result; ++ __asm__ ("mla %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlaq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("mla %0.8h, %2.8h, %3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlaq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("mla %0.4s, %2.4s, %3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmlaq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint8x16_t result; ++ __asm__ ("mla %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlaq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("mla %0.8h, %2.8h, %3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("mla %0.4s, %2.4s, %3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmls_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ float32x2_t t1; \ ++ __asm__ ("fmul %1.2s, %3.2s, %4.s[%5]; fsub %0.2s, %0.2s, %1.2s" \ ++ : "=w"(result), "=w"(t1) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmls_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mls %0.4h,%2.4h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmls_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mls %0.2s,%2.2s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmls_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mls %0.4h,%2.4h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmls_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mls %0.2s,%2.2s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmls_n_f32 (float32x2_t a, float32x2_t b, float32_t c) ++{ ++ float32x2_t result; ++ float32x2_t t1; ++ __asm__ ("fmul %1.2s, %3.2s, %4.s[0]; fsub %0.2s, %0.2s, %1.2s" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmls_n_s16 (int16x4_t a, int16x4_t b, int16_t c) ++{ ++ int16x4_t result; ++ __asm__ ("mls %0.4h, %2.4h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmls_n_s32 (int32x2_t a, int32x2_t b, int32_t c) ++{ ++ int32x2_t result; ++ __asm__ ("mls %0.2s, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmls_n_u16 (uint16x4_t a, uint16x4_t b, uint16_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("mls %0.4h, %2.4h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmls_n_u32 (uint32x2_t a, uint32x2_t b, uint32_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("mls %0.2s, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmls_s8 (int8x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int8x8_t result; ++ __asm__ ("mls %0.8b,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmls_s16 (int16x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int16x4_t result; ++ __asm__ ("mls %0.4h,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmls_s32 (int32x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int32x2_t result; ++ __asm__ ("mls %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmls_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint8x8_t result; ++ __asm__ ("mls %0.8b,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmls_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("mls %0.4h,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmls_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("mls %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlsl_high_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlsl2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlsl2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlsl2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlsl2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlsl2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlsl2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlsl2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlsl2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsl_high_n_s16 (int32x4_t a, int16x8_t b, int16_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlsl2 %0.4s, %2.8h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlsl_high_n_s32 (int64x2_t a, int32x4_t b, int32_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlsl2 %0.2d, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsl_high_n_u16 (uint32x4_t a, uint16x8_t b, uint16_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlsl2 %0.4s, %2.8h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlsl_high_n_u32 (uint64x2_t a, uint32x4_t b, uint32_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlsl2 %0.2d, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlsl_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("smlsl2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsl_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlsl2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlsl_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlsl2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlsl_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("umlsl2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsl_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlsl2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlsl_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlsl2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlsl_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlsl %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlsl %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlsl %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlsl %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlsl %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlsl %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlsl %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlsl %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsl_n_s16 (int32x4_t a, int16x4_t b, int16_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlsl %0.4s, %2.4h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlsl_n_s32 (int64x2_t a, int32x2_t b, int32_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlsl %0.2d, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsl_n_u16 (uint32x4_t a, uint16x4_t b, uint16_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlsl %0.4s, %2.4h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlsl_n_u32 (uint64x2_t a, uint32x2_t b, uint32_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlsl %0.2d, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlsl_s8 (int16x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("smlsl %0.8h, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsl_s16 (int32x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlsl %0.4s, %2.4h, %3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlsl_s32 (int64x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlsl %0.2d, %2.2s, %3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlsl_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("umlsl %0.8h, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsl_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlsl %0.4s, %2.4h, %3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlsl_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlsl %0.2d, %2.2s, %3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlsq_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ float32x4_t t1; \ ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[%5]; fsub %0.4s, %0.4s, %1.4s" \ ++ : "=w"(result), "=w"(t1) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mls %0.8h,%2.8h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mls %0.4s,%2.4s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mls %0.8h,%2.8h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mls %0.4s,%2.4s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_laneq_f32(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t __c_ = (__c); \ ++ float32x4_t __b_ = (__b); \ ++ float32x4_t __a_ = (__a); \ ++ float32x4_t __result; \ ++ float32x4_t __t1; \ ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[%5]; fsub %0.4s, %0.4s, %1.4s" \ ++ : "=w"(__result), "=w"(__t1) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++#define vmlsq_laneq_s16(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t __c_ = (__c); \ ++ int16x8_t __b_ = (__b); \ ++ int16x8_t __a_ = (__a); \ ++ int16x8_t __result; \ ++ __asm__ ("mls %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(__result) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++#define vmlsq_laneq_s32(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t __c_ = (__c); \ ++ int32x4_t __b_ = (__b); \ ++ int32x4_t __a_ = (__a); \ ++ int32x4_t __result; \ ++ __asm__ ("mls %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(__result) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++#define vmlsq_laneq_u16(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t __c_ = (__c); \ ++ uint16x8_t __b_ = (__b); \ ++ uint16x8_t __a_ = (__a); \ ++ uint16x8_t __result; \ ++ __asm__ ("mls %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(__result) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++#define vmlsq_laneq_u32(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t __c_ = (__c); \ ++ uint32x4_t __b_ = (__b); \ ++ uint32x4_t __a_ = (__a); \ ++ uint32x4_t __result; \ ++ __asm__ ("mls %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(__result) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmlsq_n_f32 (float32x4_t a, float32x4_t b, float32_t c) ++{ ++ float32x4_t result; ++ float32x4_t t1; ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[0]; fsub %0.4s, %0.4s, %1.4s" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmlsq_n_f64 (float64x2_t a, float64x2_t b, float64_t c) ++{ ++ float64x2_t result; ++ float64x2_t t1; ++ __asm__ ("fmul %1.2d, %3.2d, %4.d[0]; fsub %0.2d, %0.2d, %1.2d" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlsq_n_s16 (int16x8_t a, int16x8_t b, int16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("mls %0.8h, %2.8h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsq_n_s32 (int32x4_t a, int32x4_t b, int32_t c) ++{ ++ int32x4_t result; ++ __asm__ ("mls %0.4s, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlsq_n_u16 (uint16x8_t a, uint16x8_t b, uint16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("mls %0.8h, %2.8h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsq_n_u32 (uint32x4_t a, uint32x4_t b, uint32_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("mls %0.4s, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmlsq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) ++{ ++ int8x16_t result; ++ __asm__ ("mls %0.16b,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlsq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("mls %0.8h,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("mls %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmlsq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint8x16_t result; ++ __asm__ ("mls %0.16b,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlsq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("mls %0.8h,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("mls %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmov_n_f32 (float32_t a) ++{ ++ float32x2_t result; ++ __asm__ ("dup %0.2s, %w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vmov_n_p8 (uint32_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vmov_n_p16 (uint32_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmov_n_s8 (int32_t a) ++{ ++ int8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmov_n_s16 (int32_t a) ++{ ++ int16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmov_n_s32 (int32_t a) ++{ ++ int32x2_t result; ++ __asm__ ("dup %0.2s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vmov_n_s64 (int64_t a) ++{ ++ int64x1_t result; ++ __asm__ ("ins %0.d[0],%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmov_n_u8 (uint32_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmov_n_u16 (uint32_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmov_n_u32 (uint32_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("dup %0.2s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vmov_n_u64 (uint64_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("ins %0.d[0],%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmovl_high_s8 (int8x16_t a) ++{ ++ int16x8_t result; ++ __asm__ ("sshll2 %0.8h,%1.16b,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmovl_high_s16 (int16x8_t a) ++{ ++ int32x4_t result; ++ __asm__ ("sshll2 %0.4s,%1.8h,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmovl_high_s32 (int32x4_t a) ++{ ++ int64x2_t result; ++ __asm__ ("sshll2 %0.2d,%1.4s,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmovl_high_u8 (uint8x16_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("ushll2 %0.8h,%1.16b,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmovl_high_u16 (uint16x8_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("ushll2 %0.4s,%1.8h,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmovl_high_u32 (uint32x4_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("ushll2 %0.2d,%1.4s,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmovl_s8 (int8x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("sshll %0.8h,%1.8b,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmovl_s16 (int16x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("sshll %0.4s,%1.4h,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmovl_s32 (int32x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("sshll %0.2d,%1.2s,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmovl_u8 (uint8x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("ushll %0.8h,%1.8b,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmovl_u16 (uint16x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("ushll %0.4s,%1.4h,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmovl_u32 (uint32x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("ushll %0.2d,%1.2s,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmovn_high_s16 (int8x8_t a, int16x8_t b) ++{ ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.16b,%2.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmovn_high_s32 (int16x4_t a, int32x4_t b) ++{ ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.8h,%2.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmovn_high_s64 (int32x2_t a, int64x2_t b) ++{ ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.4s,%2.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmovn_high_u16 (uint8x8_t a, uint16x8_t b) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.16b,%2.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmovn_high_u32 (uint16x4_t a, uint32x4_t b) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.8h,%2.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmovn_high_u64 (uint32x2_t a, uint64x2_t b) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.4s,%2.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmovn_s16 (int16x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("xtn %0.8b,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmovn_s32 (int32x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("xtn %0.4h,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmovn_s64 (int64x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("xtn %0.2s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmovn_u16 (uint16x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("xtn %0.8b,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmovn_u32 (uint32x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("xtn %0.4h,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmovn_u64 (uint64x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("xtn %0.2s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmovq_n_f32 (float32_t a) ++{ ++ float32x4_t result; ++ __asm__ ("dup %0.4s, %w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmovq_n_f64 (float64_t a) ++{ ++ return (float64x2_t) {a, a}; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vmovq_n_p8 (uint32_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vmovq_n_p16 (uint32_t a) ++{ ++ poly16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmovq_n_s8 (int32_t a) ++{ ++ int8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmovq_n_s16 (int32_t a) ++{ ++ int16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmovq_n_s32 (int32_t a) ++{ ++ int32x4_t result; ++ __asm__ ("dup %0.4s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmovq_n_s64 (int64_t a) ++{ ++ int64x2_t result; ++ __asm__ ("dup %0.2d,%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmovq_n_u8 (uint32_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmovq_n_u16 (uint32_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmovq_n_u32 (uint32_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("dup %0.4s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmovq_n_u64 (uint64_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("dup %0.2d,%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmul_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("fmul %0.2s,%1.2s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mul %0.4h,%1.4h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mul %0.2s,%1.2s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mul %0.4h,%1.4h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mul %0.2s, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("fmul %0.2s, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mul %0.4h, %1.4h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mul %0.2s, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mul %0.4h, %1.4h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mul %0.2s, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmul_n_f32 (float32x2_t a, float32_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmul %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmul_n_s16 (int16x4_t a, int16_t b) ++{ ++ int16x4_t result; ++ __asm__ ("mul %0.4h,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmul_n_s32 (int32x2_t a, int32_t b) ++{ ++ int32x2_t result; ++ __asm__ ("mul %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmul_n_u16 (uint16x4_t a, uint16_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("mul %0.4h,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmul_n_u32 (uint32x2_t a, uint32_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("mul %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmuld_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fmul %d0,%d1,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smull2 %0.4s, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smull2 %0.2d, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umull2 %0.4s, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umull2 %0.2d, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_laneq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smull2 %0.4s, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_laneq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smull2 %0.2d, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_laneq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umull2 %0.4s, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_laneq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umull2 %0.2d, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmull_high_n_s16 (int16x8_t a, int16_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smull2 %0.4s,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmull_high_n_s32 (int32x4_t a, int32_t b) ++{ ++ int64x2_t result; ++ __asm__ ("smull2 %0.2d,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmull_high_n_u16 (uint16x8_t a, uint16_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umull2 %0.4s,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmull_high_n_u32 (uint32x4_t a, uint32_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("umull2 %0.2d,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vmull_high_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("pmull2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmull_high_s8 (int8x16_t a, int8x16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("smull2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmull_high_s16 (int16x8_t a, int16x8_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smull2 %0.4s,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmull_high_s32 (int32x4_t a, int32x4_t b) ++{ ++ int64x2_t result; ++ __asm__ ("smull2 %0.2d,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmull_high_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("umull2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmull_high_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umull2 %0.4s,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmull_high_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("umull2 %0.2d,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmull_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smull %0.4s,%1.4h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smull %0.2d,%1.2s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umull %0.4s,%1.4h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umull %0.2d, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_laneq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smull %0.4s, %1.4h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_laneq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smull %0.2d, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_laneq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umull %0.4s, %1.4h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_laneq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umull %0.2d, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmull_n_s16 (int16x4_t a, int16_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smull %0.4s,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmull_n_s32 (int32x2_t a, int32_t b) ++{ ++ int64x2_t result; ++ __asm__ ("smull %0.2d,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmull_n_u16 (uint16x4_t a, uint16_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umull %0.4s,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmull_n_u32 (uint32x2_t a, uint32_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("umull %0.2d,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vmull_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("pmull %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmull_s8 (int8x8_t a, int8x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("smull %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmull_s16 (int16x4_t a, int16x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smull %0.4s, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmull_s32 (int32x2_t a, int32x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("smull %0.2d, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmull_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("umull %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmull_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umull %0.4s, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmull_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("umull %0.2d, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmulq_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("fmul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("fmul %0.2d,%1.2d,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mul %0.8h,%1.8h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mul %0.4s,%1.4s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mul %0.8h,%1.8h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("fmul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("fmul %0.2d,%1.2d,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mul %0.8h, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mul %0.8h, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmulq_n_f32 (float32x4_t a, float32_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmul %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmulq_n_f64 (float64x2_t a, float64_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmul %0.2d,%1.2d,%2.d[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmulq_n_s16 (int16x8_t a, int16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("mul %0.8h,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmulq_n_s32 (int32x4_t a, int32_t b) ++{ ++ int32x4_t result; ++ __asm__ ("mul %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmulq_n_u16 (uint16x8_t a, uint16_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("mul %0.8h,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmulq_n_u32 (uint32x4_t a, uint32_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("mul %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmuls_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fmul %s0,%s1,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmulx_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmulx %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmulx_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("fmulx %0.2s,%1.2s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vmulxd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("fmulx %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmulxq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmulx %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmulxq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmulx %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmulxq_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("fmulx %0.4s,%1.4s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulxq_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("fmulx %0.2d,%1.2d,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmulxs_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("fmulx %s0, %s1, %s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vmvn_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmvn_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmvn_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmvn_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmvn_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmvn_u16 (uint16x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmvn_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vmvnq_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmvnq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmvnq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmvnq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmvnq_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmvnq_u16 (uint16x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmvnq_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vneg_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("fneg %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vneg_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("neg %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vneg_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("neg %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vneg_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("neg %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vnegq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("fneg %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vnegq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("fneg %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vnegq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("neg %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vnegq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("neg %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vnegq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("neg %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vnegq_s64 (int64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("neg %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpadal_s8 (int16x4_t a, int8x8_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sadalp %0.4h,%2.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpadal_s16 (int32x2_t a, int16x4_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sadalp %0.2s,%2.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vpadal_s32 (int64x1_t a, int32x2_t b) ++{ ++ int64x1_t result; ++ __asm__ ("sadalp %0.1d,%2.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpadal_u8 (uint16x4_t a, uint8x8_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uadalp %0.4h,%2.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpadal_u16 (uint32x2_t a, uint16x4_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uadalp %0.2s,%2.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vpadal_u32 (uint64x1_t a, uint32x2_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("uadalp %0.1d,%2.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpadalq_s8 (int16x8_t a, int8x16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sadalp %0.8h,%2.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpadalq_s16 (int32x4_t a, int16x8_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sadalp %0.4s,%2.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vpadalq_s32 (int64x2_t a, int32x4_t b) ++{ ++ int64x2_t result; ++ __asm__ ("sadalp %0.2d,%2.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpadalq_u8 (uint16x8_t a, uint8x16_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uadalp %0.8h,%2.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpadalq_u16 (uint32x4_t a, uint16x8_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uadalp %0.4s,%2.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vpadalq_u32 (uint64x2_t a, uint32x4_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uadalp %0.2d,%2.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpadd_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("faddp %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vpadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_addpv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_addpv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_addpv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vpadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_addpv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_addpv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_addpv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpaddd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("faddp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpaddl_s8 (int8x8_t a) ++{ ++ int16x4_t result; ++ __asm__ ("saddlp %0.4h,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpaddl_s16 (int16x4_t a) ++{ ++ int32x2_t result; ++ __asm__ ("saddlp %0.2s,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vpaddl_s32 (int32x2_t a) ++{ ++ int64x1_t result; ++ __asm__ ("saddlp %0.1d,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpaddl_u8 (uint8x8_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("uaddlp %0.4h,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpaddl_u16 (uint16x4_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("uaddlp %0.2s,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vpaddl_u32 (uint32x2_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("uaddlp %0.1d,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpaddlq_s8 (int8x16_t a) ++{ ++ int16x8_t result; ++ __asm__ ("saddlp %0.8h,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpaddlq_s16 (int16x8_t a) ++{ ++ int32x4_t result; ++ __asm__ ("saddlp %0.4s,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vpaddlq_s32 (int32x4_t a) ++{ ++ int64x2_t result; ++ __asm__ ("saddlp %0.2d,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpaddlq_u8 (uint8x16_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("uaddlp %0.8h,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpaddlq_u16 (uint16x8_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("uaddlp %0.4s,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vpaddlq_u32 (uint32x4_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("uaddlp %0.2d,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpaddq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("faddp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpaddq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("faddp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vpaddq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("addp %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpaddq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("addp %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpaddq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("addp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vpaddq_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("addp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vpaddq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("addp %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpaddq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("addp %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpaddq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("addp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vpaddq_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("addp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpadds_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("faddp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpmax_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmaxp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vpmax_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("smaxp %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpmax_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("smaxp %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpmax_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("smaxp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vpmax_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("umaxp %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpmax_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("umaxp %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpmax_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("umaxp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpmaxnm_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmaxnmp %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpmaxnmq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmaxnmp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpmaxnmq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmaxnmp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpmaxnmqd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fmaxnmp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpmaxnms_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxnmp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpmaxq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmaxp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpmaxq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmaxp %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vpmaxq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("smaxp %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpmaxq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("smaxp %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpmaxq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smaxp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vpmaxq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("umaxp %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpmaxq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("umaxp %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpmaxq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umaxp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpmaxqd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fmaxp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpmaxs_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpmin_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fminp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vpmin_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("sminp %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpmin_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sminp %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpmin_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sminp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vpmin_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uminp %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpmin_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uminp %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpmin_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uminp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpminnm_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fminnmp %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpminnmq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fminnmp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpminnmq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fminnmp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpminnmqd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fminnmp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpminnms_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fminnmp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpminq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fminp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpminq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fminp %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vpminq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("sminp %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpminq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sminp %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpminq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sminp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vpminq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uminp %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpminq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uminp %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpminq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uminp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpminqd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fminp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpmins_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fminp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqdmulh_n_s16 (int16x4_t a, int16_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sqdmulh %0.4h,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqdmulh_n_s32 (int32x2_t a, int32_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sqdmulh %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqdmulhq_n_s16 (int16x8_t a, int16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sqdmulh %0.8h,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmulhq_n_s32 (int32x4_t a, int32_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sqdmulh %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqmovn_high_s16 (int8x8_t a, int16x8_t b) ++{ ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("sqxtn2 %0.16b, %2.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqmovn_high_s32 (int16x4_t a, int32x4_t b) ++{ ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ __asm__ ("sqxtn2 %0.8h, %2.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqmovn_high_s64 (int32x2_t a, int64x2_t b) ++{ ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ __asm__ ("sqxtn2 %0.4s, %2.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqmovn_high_u16 (uint8x8_t a, uint16x8_t b) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("uqxtn2 %0.16b, %2.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqmovn_high_u32 (uint16x4_t a, uint32x4_t b) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("uqxtn2 %0.8h, %2.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqmovn_high_u64 (uint32x2_t a, uint64x2_t b) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("uqxtn2 %0.4s, %2.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqmovun_high_s16 (uint8x8_t a, int16x8_t b) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("sqxtun2 %0.16b, %2.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqmovun_high_s32 (uint16x4_t a, int32x4_t b) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("sqxtun2 %0.8h, %2.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqmovun_high_s64 (uint32x2_t a, int64x2_t b) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("sqxtun2 %0.4s, %2.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrdmulh_n_s16 (int16x4_t a, int16_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sqrdmulh %0.4h,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrdmulh_n_s32 (int32x2_t a, int32_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sqrdmulh %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrdmulhq_n_s16 (int16x8_t a, int16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sqrdmulh %0.8h,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrdmulhq_n_s32 (int32x4_t a, int32_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sqrdmulh %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vqrshrn_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result = vcombine_s8 \ ++ (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrn2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result = vcombine_s16 \ ++ (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrn2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result = vcombine_s32 \ ++ (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrn2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("uqrshrn2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("uqrshrn2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("uqrshrn2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrun_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrun2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrun_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrun2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrun_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrun2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result = vcombine_s8 \ ++ (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrn2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result = vcombine_s16 \ ++ (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrn2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result = vcombine_s32 \ ++ (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrn2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("uqshrn2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("uqshrn2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("uqshrn2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrun_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrun2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrun_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrun2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrun_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrun2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrbit_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("rbit %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrbit_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("rbit %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrbitq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("rbit %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrbitq_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("rbit %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrecpe_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frecpe %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrecpe_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("urecpe %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecped_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("frecpe %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrecpeq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frecpe %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrecpeq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frecpe %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrecpeq_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("urecpe %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpes_f32 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("frecpe %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrecps_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("frecps %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecpsd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("frecps %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrecpsq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("frecps %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrecpsq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("frecps %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpss_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("frecps %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecpxd_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("frecpe %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpxs_f32 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("frecpe %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vrev16_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("rev16 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrev16_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("rev16 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrev16_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("rev16 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vrev16q_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("rev16 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrev16q_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("rev16 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrev16q_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("rev16 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vrev32_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("rev32 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vrev32_p16 (poly16x4_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("rev32 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrev32_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("rev32 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrev32_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("rev32 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrev32_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("rev32 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrev32_u16 (uint16x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("rev32 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vrev32q_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("rev32 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vrev32q_p16 (poly16x8_t a) ++{ ++ poly16x8_t result; ++ __asm__ ("rev32 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrev32q_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("rev32 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrev32q_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("rev32 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrev32q_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("rev32 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrev32q_u16 (uint16x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("rev32 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrev64_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("rev64 %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vrev64_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("rev64 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vrev64_p16 (poly16x4_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("rev64 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrev64_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("rev64 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrev64_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("rev64 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrev64_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("rev64 %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrev64_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("rev64 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrev64_u16 (uint16x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("rev64 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrev64_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("rev64 %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrev64q_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("rev64 %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vrev64q_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("rev64 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vrev64q_p16 (poly16x8_t a) ++{ ++ poly16x8_t result; ++ __asm__ ("rev64 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrev64q_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("rev64 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrev64q_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("rev64 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrev64q_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("rev64 %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrev64q_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("rev64 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrev64q_u16 (uint16x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("rev64 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrev64q_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("rev64 %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrnd_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frintz %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrnda_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frinta %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndm_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frintm %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndn_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frintn %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndp_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frintp %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frintz %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frintz %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndqa_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frinta %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndqa_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frinta %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndqm_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frintm %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndqm_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frintm %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndqn_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frintn %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndqn_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frintn %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndqp_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frintp %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndqp_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frintp %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vrshrn_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result = vcombine_s8 \ ++ (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.16b,%1.8h,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result = vcombine_s16 \ ++ (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.8h,%1.4s,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result = vcombine_s32 \ ++ (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.4s,%1.2d,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.16b,%1.8h,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.8h,%1.4s,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.4s,%1.2d,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_s16(a, b) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("rshrn %0.8b,%1.8h,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("rshrn %0.4h,%1.4s,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("rshrn %0.2s,%1.2d,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_u16(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("rshrn %0.8b,%1.8h,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("rshrn %0.4h,%1.4s,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("rshrn %0.2s,%1.2d,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrsqrte_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frsqrte %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrsqrte_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frsqrte %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrsqrte_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("ursqrte %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrsqrted_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("frsqrte %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrsqrteq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frsqrte %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrsqrteq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frsqrte %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrsqrteq_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("ursqrte %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrsqrtes_f32 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("frsqrte %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrsqrts_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("frsqrts %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrsqrtsd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("frsqrts %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrsqrtsq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("frsqrts %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrsqrtsq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("frsqrts %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrsqrtss_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("frsqrts %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrsrtsq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("frsqrts %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrsubhn_high_s16 (int8x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.16b, %1.8h, %2.8h" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrsubhn_high_s32 (int16x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.8h, %1.4s, %2.4s" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrsubhn_high_s64 (int32x2_t a, int64x2_t b, int64x2_t c) ++{ ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.4s, %1.2d, %2.2d" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrsubhn_high_u16 (uint8x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.16b, %1.8h, %2.8h" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrsubhn_high_u32 (uint16x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.8h, %1.4s, %2.4s" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrsubhn_high_u64 (uint32x2_t a, uint64x2_t b, uint64x2_t c) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.4s, %1.2d, %2.2d" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrsubhn_s16 (int16x8_t a, int16x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("rsubhn %0.8b, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrsubhn_s32 (int32x4_t a, int32x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("rsubhn %0.4h, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrsubhn_s64 (int64x2_t a, int64x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("rsubhn %0.2s, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrsubhn_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("rsubhn %0.8b, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrsubhn_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("rsubhn %0.4h, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrsubhn_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("rsubhn %0.2s, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vset_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64x1_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t b_ = (b); \ ++ int8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t b_ = (b); \ ++ int64_t a_ = (a); \ ++ int64x1_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t b_ = (b); \ ++ uint8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t b_ = (b); \ ++ uint64_t a_ = (a); \ ++ uint64x1_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t b_ = (b); \ ++ int8_t a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int64_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t b_ = (b); \ ++ uint8_t a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint64_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result = vcombine_s8 \ ++ (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.16b,%1.8h,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result = vcombine_s16 \ ++ (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.8h,%1.4s,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result = vcombine_s32 \ ++ (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.4s,%1.2d,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.16b,%1.8h,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.8h,%1.4s,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.4s,%1.2d,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_s16(a, b) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("shrn %0.8b,%1.8h,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("shrn %0.4h,%1.4s,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("shrn %0.2s,%1.2d,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_u16(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("shrn %0.8b,%1.8h,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("shrn %0.4h,%1.4s,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("shrn %0.2s,%1.2d,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsli_n_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8x8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("sli %0.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsli_n_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16x4_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("sli %0.4h,%2.4h,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsliq_n_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8x16_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("sli %0.16b,%2.16b,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsliq_n_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16x8_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("sli %0.8h,%2.8h,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsri_n_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8x8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("sri %0.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsri_n_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16x4_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("sri %0.4h,%2.4h,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsriq_n_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8x16_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("sri %0.16b,%2.16b,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsriq_n_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16x8_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("sri %0.8h,%2.8h,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_f32 (float32_t * a, float32x2_t b) ++{ ++ __asm__ ("st1 {%1.2s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_f64 (float64_t * a, float64x1_t b) ++{ ++ __asm__ ("st1 {%1.1d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++#define vst1_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ float64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t b_ = (b); \ ++ int8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t b_ = (b); \ ++ int64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t b_ = (b); \ ++ uint8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t b_ = (b); \ ++ uint64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_p8 (poly8_t * a, poly8x8_t b) ++{ ++ __asm__ ("st1 {%1.8b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_p16 (poly16_t * a, poly16x4_t b) ++{ ++ __asm__ ("st1 {%1.4h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_s8 (int8_t * a, int8x8_t b) ++{ ++ __asm__ ("st1 {%1.8b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_s16 (int16_t * a, int16x4_t b) ++{ ++ __asm__ ("st1 {%1.4h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_s32 (int32_t * a, int32x2_t b) ++{ ++ __asm__ ("st1 {%1.2s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_s64 (int64_t * a, int64x1_t b) ++{ ++ __asm__ ("st1 {%1.1d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_u8 (uint8_t * a, uint8x8_t b) ++{ ++ __asm__ ("st1 {%1.8b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_u16 (uint16_t * a, uint16x4_t b) ++{ ++ __asm__ ("st1 {%1.4h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_u32 (uint32_t * a, uint32x2_t b) ++{ ++ __asm__ ("st1 {%1.2s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_u64 (uint64_t * a, uint64x1_t b) ++{ ++ __asm__ ("st1 {%1.1d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_f32 (float32_t * a, float32x4_t b) ++{ ++ __asm__ ("st1 {%1.4s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_f64 (float64_t * a, float64x2_t b) ++{ ++ __asm__ ("st1 {%1.2d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++#define vst1q_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t b_ = (b); \ ++ int8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t b_ = (b); \ ++ uint8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_p8 (poly8_t * a, poly8x16_t b) ++{ ++ __asm__ ("st1 {%1.16b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_p16 (poly16_t * a, poly16x8_t b) ++{ ++ __asm__ ("st1 {%1.8h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_s8 (int8_t * a, int8x16_t b) ++{ ++ __asm__ ("st1 {%1.16b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_s16 (int16_t * a, int16x8_t b) ++{ ++ __asm__ ("st1 {%1.8h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_s32 (int32_t * a, int32x4_t b) ++{ ++ __asm__ ("st1 {%1.4s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_s64 (int64_t * a, int64x2_t b) ++{ ++ __asm__ ("st1 {%1.2d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_u8 (uint8_t * a, uint8x16_t b) ++{ ++ __asm__ ("st1 {%1.16b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_u16 (uint16_t * a, uint16x8_t b) ++{ ++ __asm__ ("st1 {%1.8h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_u32 (uint32_t * a, uint32x4_t b) ++{ ++ __asm__ ("st1 {%1.4s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_u64 (uint64_t * a, uint64x2_t b) ++{ ++ __asm__ ("st1 {%1.2d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsubhn_high_s16 (int8x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.16b, %1.8h, %2.8h" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubhn_high_s32 (int16x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.8h, %1.4s, %2.4s" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubhn_high_s64 (int32x2_t a, int64x2_t b, int64x2_t c) ++{ ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.4s, %1.2d, %2.2d" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsubhn_high_u16 (uint8x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.16b, %1.8h, %2.8h" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubhn_high_u32 (uint16x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.8h, %1.4s, %2.4s" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubhn_high_u64 (uint32x2_t a, uint64x2_t b, uint64x2_t c) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.4s, %1.2d, %2.2d" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsubhn_s16 (int16x8_t a, int16x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("subhn %0.8b, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsubhn_s32 (int32x4_t a, int32x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("subhn %0.4h, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsubhn_s64 (int64x2_t a, int64x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("subhn %0.2s, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsubhn_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("subhn %0.8b, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsubhn_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("subhn %0.4h, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsubhn_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("subhn %0.2s, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vtrn1_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("trn1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtrn1_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("trn1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vtrn1_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("trn1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtrn1_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("trn1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vtrn1_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("trn1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vtrn1_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("trn1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtrn1_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("trn1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtrn1_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("trn1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vtrn1_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("trn1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vtrn1q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("trn1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vtrn1q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("trn1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vtrn1q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("trn1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vtrn1q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("trn1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vtrn1q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("trn1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vtrn1q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("trn1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vtrn1q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("trn1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vtrn1q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("trn1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtrn1q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("trn1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtrn1q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("trn1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vtrn1q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("trn1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vtrn1q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("trn1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vtrn2_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("trn2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtrn2_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("trn2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vtrn2_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("trn2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtrn2_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("trn2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vtrn2_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("trn2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vtrn2_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("trn2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtrn2_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("trn2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtrn2_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("trn2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vtrn2_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("trn2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vtrn2q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("trn2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vtrn2q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("trn2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vtrn2q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("trn2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vtrn2q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("trn2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vtrn2q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("trn2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vtrn2q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("trn2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vtrn2q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("trn2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vtrn2q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("trn2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtrn2q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("trn2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtrn2q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("trn2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vtrn2q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("trn2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vtrn2q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("trn2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtst_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("cmtst %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtst_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("cmtst %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtstq_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("cmtst %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtstq_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("cmtst %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vuzp1_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("uzp1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vuzp1_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("uzp1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vuzp1_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("uzp1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vuzp1_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("uzp1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vuzp1_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("uzp1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vuzp1_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("uzp1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vuzp1_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uzp1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vuzp1_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uzp1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vuzp1_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uzp1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vuzp1q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("uzp1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vuzp1q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("uzp1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vuzp1q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("uzp1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vuzp1q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("uzp1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vuzp1q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("uzp1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vuzp1q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("uzp1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vuzp1q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("uzp1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vuzp1q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("uzp1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vuzp1q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uzp1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vuzp1q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uzp1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vuzp1q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uzp1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vuzp1q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uzp1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vuzp2_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("uzp2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vuzp2_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("uzp2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vuzp2_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("uzp2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vuzp2_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("uzp2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vuzp2_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("uzp2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vuzp2_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("uzp2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vuzp2_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uzp2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vuzp2_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uzp2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vuzp2_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uzp2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vuzp2q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("uzp2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vuzp2q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("uzp2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vuzp2q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("uzp2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vuzp2q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("uzp2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vuzp2q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("uzp2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vuzp2q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("uzp2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vuzp2q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("uzp2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vuzp2q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("uzp2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vuzp2q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uzp2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vuzp2q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uzp2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vuzp2q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uzp2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vuzp2q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uzp2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vzip1_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("zip1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vzip1_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("zip1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vzip1_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("zip1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vzip1_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("zip1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vzip1_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("zip1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vzip1_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("zip1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vzip1_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("zip1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vzip1_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("zip1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vzip1_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("zip1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vzip1q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("zip1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vzip1q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("zip1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vzip1q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("zip1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vzip1q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("zip1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vzip1q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("zip1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vzip1q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("zip1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vzip1q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("zip1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vzip1q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("zip1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vzip1q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("zip1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vzip1q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("zip1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vzip1q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("zip1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vzip1q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("zip1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vzip2_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("zip2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vzip2_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("zip2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vzip2_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("zip2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vzip2_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("zip2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vzip2_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("zip2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vzip2_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("zip2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vzip2_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("zip2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vzip2_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("zip2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vzip2_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("zip2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vzip2q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("zip2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vzip2q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("zip2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vzip2q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("zip2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vzip2q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("zip2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vzip2q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("zip2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vzip2q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("zip2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vzip2q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("zip2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vzip2q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("zip2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vzip2q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("zip2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vzip2q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("zip2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vzip2q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("zip2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vzip2q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("zip2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++/* End of temporary inline asm implementations. */ ++ ++/* Start of temporary inline asm for vldn, vstn and friends. */ ++ ++/* Create struct element types for duplicating loads. ++ ++ Create 2 element structures of: ++ ++ +------+----+----+----+----+ ++ | | 8 | 16 | 32 | 64 | ++ +------+----+----+----+----+ ++ |int | Y | Y | N | N | ++ +------+----+----+----+----+ ++ |uint | Y | Y | N | N | ++ +------+----+----+----+----+ ++ |float | - | - | N | N | ++ +------+----+----+----+----+ ++ |poly | Y | Y | - | - | ++ +------+----+----+----+----+ ++ ++ Create 3 element structures of: ++ ++ +------+----+----+----+----+ ++ | | 8 | 16 | 32 | 64 | ++ +------+----+----+----+----+ ++ |int | Y | Y | Y | Y | ++ +------+----+----+----+----+ ++ |uint | Y | Y | Y | Y | ++ +------+----+----+----+----+ ++ |float | - | - | Y | Y | ++ +------+----+----+----+----+ ++ |poly | Y | Y | - | - | ++ +------+----+----+----+----+ ++ ++ Create 4 element structures of: ++ ++ +------+----+----+----+----+ ++ | | 8 | 16 | 32 | 64 | ++ +------+----+----+----+----+ ++ |int | Y | N | N | Y | ++ +------+----+----+----+----+ ++ |uint | Y | N | N | Y | ++ +------+----+----+----+----+ ++ |float | - | - | N | Y | ++ +------+----+----+----+----+ ++ |poly | Y | N | - | - | ++ +------+----+----+----+----+ ++ ++ This is required for casting memory reference. */ ++#define __STRUCTN(t, sz, nelem) \ ++ typedef struct t ## sz ## x ## nelem ## _t { \ ++ t ## sz ## _t val[nelem]; \ ++ } t ## sz ## x ## nelem ## _t; ++ ++/* 2-element structs. */ ++__STRUCTN (int, 8, 2) ++__STRUCTN (int, 16, 2) ++__STRUCTN (uint, 8, 2) ++__STRUCTN (uint, 16, 2) ++__STRUCTN (poly, 8, 2) ++__STRUCTN (poly, 16, 2) ++/* 3-element structs. */ ++__STRUCTN (int, 8, 3) ++__STRUCTN (int, 16, 3) ++__STRUCTN (int, 32, 3) ++__STRUCTN (int, 64, 3) ++__STRUCTN (uint, 8, 3) ++__STRUCTN (uint, 16, 3) ++__STRUCTN (uint, 32, 3) ++__STRUCTN (uint, 64, 3) ++__STRUCTN (float, 32, 3) ++__STRUCTN (float, 64, 3) ++__STRUCTN (poly, 8, 3) ++__STRUCTN (poly, 16, 3) ++/* 4-element structs. */ ++__STRUCTN (int, 8, 4) ++__STRUCTN (int, 64, 4) ++__STRUCTN (uint, 8, 4) ++__STRUCTN (uint, 64, 4) ++__STRUCTN (poly, 8, 4) ++__STRUCTN (float, 64, 4) ++#undef __STRUCTN ++ ++#define __LD2R_FUNC(rettype, structtype, ptrtype, \ ++ regsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld2 ## Q ## _dup_ ## funcsuffix (const ptrtype *ptr) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld2r {v16." #regsuffix ", v17." #regsuffix "}, %1\n\t" \ ++ "st1 {v16." #regsuffix ", v17." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(*(const structtype *)ptr) \ ++ : "memory", "v16", "v17"); \ ++ return result; \ ++ } ++ ++__LD2R_FUNC (float32x2x2_t, float32x2_t, float32_t, 2s, f32,) ++__LD2R_FUNC (float64x1x2_t, float64x2_t, float64_t, 1d, f64,) ++__LD2R_FUNC (poly8x8x2_t, poly8x2_t, poly8_t, 8b, p8,) ++__LD2R_FUNC (poly16x4x2_t, poly16x2_t, poly16_t, 4h, p16,) ++__LD2R_FUNC (int8x8x2_t, int8x2_t, int8_t, 8b, s8,) ++__LD2R_FUNC (int16x4x2_t, int16x2_t, int16_t, 4h, s16,) ++__LD2R_FUNC (int32x2x2_t, int32x2_t, int32_t, 2s, s32,) ++__LD2R_FUNC (int64x1x2_t, int64x2_t, int64_t, 1d, s64,) ++__LD2R_FUNC (uint8x8x2_t, uint8x2_t, uint8_t, 8b, u8,) ++__LD2R_FUNC (uint16x4x2_t, uint16x2_t, uint16_t, 4h, u16,) ++__LD2R_FUNC (uint32x2x2_t, uint32x2_t, uint32_t, 2s, u32,) ++__LD2R_FUNC (uint64x1x2_t, uint64x2_t, uint64_t, 1d, u64,) ++__LD2R_FUNC (float32x4x2_t, float32x2_t, float32_t, 4s, f32, q) ++__LD2R_FUNC (float64x2x2_t, float64x2_t, float64_t, 2d, f64, q) ++__LD2R_FUNC (poly8x16x2_t, poly8x2_t, poly8_t, 16b, p8, q) ++__LD2R_FUNC (poly16x8x2_t, poly16x2_t, poly16_t, 8h, p16, q) ++__LD2R_FUNC (int8x16x2_t, int8x2_t, int8_t, 16b, s8, q) ++__LD2R_FUNC (int16x8x2_t, int16x2_t, int16_t, 8h, s16, q) ++__LD2R_FUNC (int32x4x2_t, int32x2_t, int32_t, 4s, s32, q) ++__LD2R_FUNC (int64x2x2_t, int64x2_t, int64_t, 2d, s64, q) ++__LD2R_FUNC (uint8x16x2_t, uint8x2_t, uint8_t, 16b, u8, q) ++__LD2R_FUNC (uint16x8x2_t, uint16x2_t, uint16_t, 8h, u16, q) ++__LD2R_FUNC (uint32x4x2_t, uint32x2_t, uint32_t, 4s, u32, q) ++__LD2R_FUNC (uint64x2x2_t, uint64x2_t, uint64_t, 2d, u64, q) ++ ++#define __LD2_LANE_FUNC(rettype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld2 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ rettype b, const int c) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld1 {v16." #regsuffix ", v17." #regsuffix "}, %1\n\t" \ ++ "ld2 {v16." #lnsuffix ", v17." #lnsuffix "}[%3], %2\n\t" \ ++ "st1 {v16." #regsuffix ", v17." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(b), "Q"(*(const rettype *)ptr), "i"(c) \ ++ : "memory", "v16", "v17"); \ ++ return result; \ ++ } ++ ++__LD2_LANE_FUNC (int8x8x2_t, uint8_t, 8b, b, s8,) ++__LD2_LANE_FUNC (float32x2x2_t, float32_t, 2s, s, f32,) ++__LD2_LANE_FUNC (float64x1x2_t, float64_t, 1d, d, f64,) ++__LD2_LANE_FUNC (poly8x8x2_t, poly8_t, 8b, b, p8,) ++__LD2_LANE_FUNC (poly16x4x2_t, poly16_t, 4h, h, p16,) ++__LD2_LANE_FUNC (int16x4x2_t, int16_t, 4h, h, s16,) ++__LD2_LANE_FUNC (int32x2x2_t, int32_t, 2s, s, s32,) ++__LD2_LANE_FUNC (int64x1x2_t, int64_t, 1d, d, s64,) ++__LD2_LANE_FUNC (uint8x8x2_t, uint8_t, 8b, b, u8,) ++__LD2_LANE_FUNC (uint16x4x2_t, uint16_t, 4h, h, u16,) ++__LD2_LANE_FUNC (uint32x2x2_t, uint32_t, 2s, s, u32,) ++__LD2_LANE_FUNC (uint64x1x2_t, uint64_t, 1d, d, u64,) ++__LD2_LANE_FUNC (float32x4x2_t, float32_t, 4s, s, f32, q) ++__LD2_LANE_FUNC (float64x2x2_t, float64_t, 2d, d, f64, q) ++__LD2_LANE_FUNC (poly8x16x2_t, poly8_t, 16b, b, p8, q) ++__LD2_LANE_FUNC (poly16x8x2_t, poly16_t, 8h, h, p16, q) ++__LD2_LANE_FUNC (int8x16x2_t, int8_t, 16b, b, s8, q) ++__LD2_LANE_FUNC (int16x8x2_t, int16_t, 8h, h, s16, q) ++__LD2_LANE_FUNC (int32x4x2_t, int32_t, 4s, s, s32, q) ++__LD2_LANE_FUNC (int64x2x2_t, int64_t, 2d, d, s64, q) ++__LD2_LANE_FUNC (uint8x16x2_t, uint8_t, 16b, b, u8, q) ++__LD2_LANE_FUNC (uint16x8x2_t, uint16_t, 8h, h, u16, q) ++__LD2_LANE_FUNC (uint32x4x2_t, uint32_t, 4s, s, u32, q) ++__LD2_LANE_FUNC (uint64x2x2_t, uint64_t, 2d, d, u64, q) ++ ++#define __LD3R_FUNC(rettype, structtype, ptrtype, \ ++ regsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld3 ## Q ## _dup_ ## funcsuffix (const ptrtype *ptr) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld3r {v16." #regsuffix " - v18." #regsuffix "}, %1\n\t" \ ++ "st1 {v16." #regsuffix " - v18." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(*(const structtype *)ptr) \ ++ : "memory", "v16", "v17", "v18"); \ ++ return result; \ ++ } ++ ++__LD3R_FUNC (float32x2x3_t, float32x3_t, float32_t, 2s, f32,) ++__LD3R_FUNC (float64x1x3_t, float64x3_t, float64_t, 1d, f64,) ++__LD3R_FUNC (poly8x8x3_t, poly8x3_t, poly8_t, 8b, p8,) ++__LD3R_FUNC (poly16x4x3_t, poly16x3_t, poly16_t, 4h, p16,) ++__LD3R_FUNC (int8x8x3_t, int8x3_t, int8_t, 8b, s8,) ++__LD3R_FUNC (int16x4x3_t, int16x3_t, int16_t, 4h, s16,) ++__LD3R_FUNC (int32x2x3_t, int32x3_t, int32_t, 2s, s32,) ++__LD3R_FUNC (int64x1x3_t, int64x3_t, int64_t, 1d, s64,) ++__LD3R_FUNC (uint8x8x3_t, uint8x3_t, uint8_t, 8b, u8,) ++__LD3R_FUNC (uint16x4x3_t, uint16x3_t, uint16_t, 4h, u16,) ++__LD3R_FUNC (uint32x2x3_t, uint32x3_t, uint32_t, 2s, u32,) ++__LD3R_FUNC (uint64x1x3_t, uint64x3_t, uint64_t, 1d, u64,) ++__LD3R_FUNC (float32x4x3_t, float32x3_t, float32_t, 4s, f32, q) ++__LD3R_FUNC (float64x2x3_t, float64x3_t, float64_t, 2d, f64, q) ++__LD3R_FUNC (poly8x16x3_t, poly8x3_t, poly8_t, 16b, p8, q) ++__LD3R_FUNC (poly16x8x3_t, poly16x3_t, poly16_t, 8h, p16, q) ++__LD3R_FUNC (int8x16x3_t, int8x3_t, int8_t, 16b, s8, q) ++__LD3R_FUNC (int16x8x3_t, int16x3_t, int16_t, 8h, s16, q) ++__LD3R_FUNC (int32x4x3_t, int32x3_t, int32_t, 4s, s32, q) ++__LD3R_FUNC (int64x2x3_t, int64x3_t, int64_t, 2d, s64, q) ++__LD3R_FUNC (uint8x16x3_t, uint8x3_t, uint8_t, 16b, u8, q) ++__LD3R_FUNC (uint16x8x3_t, uint16x3_t, uint16_t, 8h, u16, q) ++__LD3R_FUNC (uint32x4x3_t, uint32x3_t, uint32_t, 4s, u32, q) ++__LD3R_FUNC (uint64x2x3_t, uint64x3_t, uint64_t, 2d, u64, q) ++ ++#define __LD3_LANE_FUNC(rettype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld3 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ rettype b, const int c) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld1 {v16." #regsuffix " - v18." #regsuffix "}, %1\n\t" \ ++ "ld3 {v16." #lnsuffix " - v18." #lnsuffix "}[%3], %2\n\t" \ ++ "st1 {v16." #regsuffix " - v18." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(b), "Q"(*(const rettype *)ptr), "i"(c) \ ++ : "memory", "v16", "v17", "v18"); \ ++ return result; \ ++ } ++ ++__LD3_LANE_FUNC (int8x8x3_t, uint8_t, 8b, b, s8,) ++__LD3_LANE_FUNC (float32x2x3_t, float32_t, 2s, s, f32,) ++__LD3_LANE_FUNC (float64x1x3_t, float64_t, 1d, d, f64,) ++__LD3_LANE_FUNC (poly8x8x3_t, poly8_t, 8b, b, p8,) ++__LD3_LANE_FUNC (poly16x4x3_t, poly16_t, 4h, h, p16,) ++__LD3_LANE_FUNC (int16x4x3_t, int16_t, 4h, h, s16,) ++__LD3_LANE_FUNC (int32x2x3_t, int32_t, 2s, s, s32,) ++__LD3_LANE_FUNC (int64x1x3_t, int64_t, 1d, d, s64,) ++__LD3_LANE_FUNC (uint8x8x3_t, uint8_t, 8b, b, u8,) ++__LD3_LANE_FUNC (uint16x4x3_t, uint16_t, 4h, h, u16,) ++__LD3_LANE_FUNC (uint32x2x3_t, uint32_t, 2s, s, u32,) ++__LD3_LANE_FUNC (uint64x1x3_t, uint64_t, 1d, d, u64,) ++__LD3_LANE_FUNC (float32x4x3_t, float32_t, 4s, s, f32, q) ++__LD3_LANE_FUNC (float64x2x3_t, float64_t, 2d, d, f64, q) ++__LD3_LANE_FUNC (poly8x16x3_t, poly8_t, 16b, b, p8, q) ++__LD3_LANE_FUNC (poly16x8x3_t, poly16_t, 8h, h, p16, q) ++__LD3_LANE_FUNC (int8x16x3_t, int8_t, 16b, b, s8, q) ++__LD3_LANE_FUNC (int16x8x3_t, int16_t, 8h, h, s16, q) ++__LD3_LANE_FUNC (int32x4x3_t, int32_t, 4s, s, s32, q) ++__LD3_LANE_FUNC (int64x2x3_t, int64_t, 2d, d, s64, q) ++__LD3_LANE_FUNC (uint8x16x3_t, uint8_t, 16b, b, u8, q) ++__LD3_LANE_FUNC (uint16x8x3_t, uint16_t, 8h, h, u16, q) ++__LD3_LANE_FUNC (uint32x4x3_t, uint32_t, 4s, s, u32, q) ++__LD3_LANE_FUNC (uint64x2x3_t, uint64_t, 2d, d, u64, q) ++ ++#define __LD4R_FUNC(rettype, structtype, ptrtype, \ ++ regsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld4 ## Q ## _dup_ ## funcsuffix (const ptrtype *ptr) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld4r {v16." #regsuffix " - v19." #regsuffix "}, %1\n\t" \ ++ "st1 {v16." #regsuffix " - v19." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(*(const structtype *)ptr) \ ++ : "memory", "v16", "v17", "v18", "v19"); \ ++ return result; \ ++ } ++ ++__LD4R_FUNC (float32x2x4_t, float32x4_t, float32_t, 2s, f32,) ++__LD4R_FUNC (float64x1x4_t, float64x4_t, float64_t, 1d, f64,) ++__LD4R_FUNC (poly8x8x4_t, poly8x4_t, poly8_t, 8b, p8,) ++__LD4R_FUNC (poly16x4x4_t, poly16x4_t, poly16_t, 4h, p16,) ++__LD4R_FUNC (int8x8x4_t, int8x4_t, int8_t, 8b, s8,) ++__LD4R_FUNC (int16x4x4_t, int16x4_t, int16_t, 4h, s16,) ++__LD4R_FUNC (int32x2x4_t, int32x4_t, int32_t, 2s, s32,) ++__LD4R_FUNC (int64x1x4_t, int64x4_t, int64_t, 1d, s64,) ++__LD4R_FUNC (uint8x8x4_t, uint8x4_t, uint8_t, 8b, u8,) ++__LD4R_FUNC (uint16x4x4_t, uint16x4_t, uint16_t, 4h, u16,) ++__LD4R_FUNC (uint32x2x4_t, uint32x4_t, uint32_t, 2s, u32,) ++__LD4R_FUNC (uint64x1x4_t, uint64x4_t, uint64_t, 1d, u64,) ++__LD4R_FUNC (float32x4x4_t, float32x4_t, float32_t, 4s, f32, q) ++__LD4R_FUNC (float64x2x4_t, float64x4_t, float64_t, 2d, f64, q) ++__LD4R_FUNC (poly8x16x4_t, poly8x4_t, poly8_t, 16b, p8, q) ++__LD4R_FUNC (poly16x8x4_t, poly16x4_t, poly16_t, 8h, p16, q) ++__LD4R_FUNC (int8x16x4_t, int8x4_t, int8_t, 16b, s8, q) ++__LD4R_FUNC (int16x8x4_t, int16x4_t, int16_t, 8h, s16, q) ++__LD4R_FUNC (int32x4x4_t, int32x4_t, int32_t, 4s, s32, q) ++__LD4R_FUNC (int64x2x4_t, int64x4_t, int64_t, 2d, s64, q) ++__LD4R_FUNC (uint8x16x4_t, uint8x4_t, uint8_t, 16b, u8, q) ++__LD4R_FUNC (uint16x8x4_t, uint16x4_t, uint16_t, 8h, u16, q) ++__LD4R_FUNC (uint32x4x4_t, uint32x4_t, uint32_t, 4s, u32, q) ++__LD4R_FUNC (uint64x2x4_t, uint64x4_t, uint64_t, 2d, u64, q) ++ ++#define __LD4_LANE_FUNC(rettype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld4 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ rettype b, const int c) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld1 {v16." #regsuffix " - v19." #regsuffix "}, %1\n\t" \ ++ "ld4 {v16." #lnsuffix " - v19." #lnsuffix "}[%3], %2\n\t" \ ++ "st1 {v16." #regsuffix " - v19." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(b), "Q"(*(const rettype *)ptr), "i"(c) \ ++ : "memory", "v16", "v17", "v18", "v19"); \ ++ return result; \ ++ } ++ ++__LD4_LANE_FUNC (int8x8x4_t, uint8_t, 8b, b, s8,) ++__LD4_LANE_FUNC (float32x2x4_t, float32_t, 2s, s, f32,) ++__LD4_LANE_FUNC (float64x1x4_t, float64_t, 1d, d, f64,) ++__LD4_LANE_FUNC (poly8x8x4_t, poly8_t, 8b, b, p8,) ++__LD4_LANE_FUNC (poly16x4x4_t, poly16_t, 4h, h, p16,) ++__LD4_LANE_FUNC (int16x4x4_t, int16_t, 4h, h, s16,) ++__LD4_LANE_FUNC (int32x2x4_t, int32_t, 2s, s, s32,) ++__LD4_LANE_FUNC (int64x1x4_t, int64_t, 1d, d, s64,) ++__LD4_LANE_FUNC (uint8x8x4_t, uint8_t, 8b, b, u8,) ++__LD4_LANE_FUNC (uint16x4x4_t, uint16_t, 4h, h, u16,) ++__LD4_LANE_FUNC (uint32x2x4_t, uint32_t, 2s, s, u32,) ++__LD4_LANE_FUNC (uint64x1x4_t, uint64_t, 1d, d, u64,) ++__LD4_LANE_FUNC (float32x4x4_t, float32_t, 4s, s, f32, q) ++__LD4_LANE_FUNC (float64x2x4_t, float64_t, 2d, d, f64, q) ++__LD4_LANE_FUNC (poly8x16x4_t, poly8_t, 16b, b, p8, q) ++__LD4_LANE_FUNC (poly16x8x4_t, poly16_t, 8h, h, p16, q) ++__LD4_LANE_FUNC (int8x16x4_t, int8_t, 16b, b, s8, q) ++__LD4_LANE_FUNC (int16x8x4_t, int16_t, 8h, h, s16, q) ++__LD4_LANE_FUNC (int32x4x4_t, int32_t, 4s, s, s32, q) ++__LD4_LANE_FUNC (int64x2x4_t, int64_t, 2d, d, s64, q) ++__LD4_LANE_FUNC (uint8x16x4_t, uint8_t, 16b, b, u8, q) ++__LD4_LANE_FUNC (uint16x8x4_t, uint16_t, 8h, h, u16, q) ++__LD4_LANE_FUNC (uint32x4x4_t, uint32_t, 4s, s, u32, q) ++__LD4_LANE_FUNC (uint64x2x4_t, uint64_t, 2d, d, u64, q) ++ ++#define __ST2_LANE_FUNC(intype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline void \ ++ __attribute__ ((__always_inline__)) \ ++ vst2 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ intype b, const int c) \ ++ { \ ++ __asm__ ("ld1 {v16." #regsuffix ", v17." #regsuffix "}, %1\n\t" \ ++ "st2 {v16." #lnsuffix ", v17." #lnsuffix "}[%2], %0\n\t" \ ++ : "=Q"(*(intype *) ptr) \ ++ : "Q"(b), "i"(c) \ ++ : "memory", "v16", "v17"); \ ++ } ++ ++__ST2_LANE_FUNC (int8x8x2_t, int8_t, 8b, b, s8,) ++__ST2_LANE_FUNC (float32x2x2_t, float32_t, 2s, s, f32,) ++__ST2_LANE_FUNC (float64x1x2_t, float64_t, 1d, d, f64,) ++__ST2_LANE_FUNC (poly8x8x2_t, poly8_t, 8b, b, p8,) ++__ST2_LANE_FUNC (poly16x4x2_t, poly16_t, 4h, h, p16,) ++__ST2_LANE_FUNC (int16x4x2_t, int16_t, 4h, h, s16,) ++__ST2_LANE_FUNC (int32x2x2_t, int32_t, 2s, s, s32,) ++__ST2_LANE_FUNC (int64x1x2_t, int64_t, 1d, d, s64,) ++__ST2_LANE_FUNC (uint8x8x2_t, uint8_t, 8b, b, u8,) ++__ST2_LANE_FUNC (uint16x4x2_t, uint16_t, 4h, h, u16,) ++__ST2_LANE_FUNC (uint32x2x2_t, uint32_t, 2s, s, u32,) ++__ST2_LANE_FUNC (uint64x1x2_t, uint64_t, 1d, d, u64,) ++__ST2_LANE_FUNC (float32x4x2_t, float32_t, 4s, s, f32, q) ++__ST2_LANE_FUNC (float64x2x2_t, float64_t, 2d, d, f64, q) ++__ST2_LANE_FUNC (poly8x16x2_t, poly8_t, 16b, b, p8, q) ++__ST2_LANE_FUNC (poly16x8x2_t, poly16_t, 8h, h, p16, q) ++__ST2_LANE_FUNC (int8x16x2_t, int8_t, 16b, b, s8, q) ++__ST2_LANE_FUNC (int16x8x2_t, int16_t, 8h, h, s16, q) ++__ST2_LANE_FUNC (int32x4x2_t, int32_t, 4s, s, s32, q) ++__ST2_LANE_FUNC (int64x2x2_t, int64_t, 2d, d, s64, q) ++__ST2_LANE_FUNC (uint8x16x2_t, uint8_t, 16b, b, u8, q) ++__ST2_LANE_FUNC (uint16x8x2_t, uint16_t, 8h, h, u16, q) ++__ST2_LANE_FUNC (uint32x4x2_t, uint32_t, 4s, s, u32, q) ++__ST2_LANE_FUNC (uint64x2x2_t, uint64_t, 2d, d, u64, q) ++ ++#define __ST3_LANE_FUNC(intype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline void \ ++ __attribute__ ((__always_inline__)) \ ++ vst3 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ intype b, const int c) \ ++ { \ ++ __asm__ ("ld1 {v16." #regsuffix " - v18." #regsuffix "}, %1\n\t" \ ++ "st3 {v16." #lnsuffix " - v18." #lnsuffix "}[%2], %0\n\t" \ ++ : "=Q"(*(intype *) ptr) \ ++ : "Q"(b), "i"(c) \ ++ : "memory", "v16", "v17", "v18"); \ ++ } ++ ++__ST3_LANE_FUNC (int8x8x3_t, int8_t, 8b, b, s8,) ++__ST3_LANE_FUNC (float32x2x3_t, float32_t, 2s, s, f32,) ++__ST3_LANE_FUNC (float64x1x3_t, float64_t, 1d, d, f64,) ++__ST3_LANE_FUNC (poly8x8x3_t, poly8_t, 8b, b, p8,) ++__ST3_LANE_FUNC (poly16x4x3_t, poly16_t, 4h, h, p16,) ++__ST3_LANE_FUNC (int16x4x3_t, int16_t, 4h, h, s16,) ++__ST3_LANE_FUNC (int32x2x3_t, int32_t, 2s, s, s32,) ++__ST3_LANE_FUNC (int64x1x3_t, int64_t, 1d, d, s64,) ++__ST3_LANE_FUNC (uint8x8x3_t, uint8_t, 8b, b, u8,) ++__ST3_LANE_FUNC (uint16x4x3_t, uint16_t, 4h, h, u16,) ++__ST3_LANE_FUNC (uint32x2x3_t, uint32_t, 2s, s, u32,) ++__ST3_LANE_FUNC (uint64x1x3_t, uint64_t, 1d, d, u64,) ++__ST3_LANE_FUNC (float32x4x3_t, float32_t, 4s, s, f32, q) ++__ST3_LANE_FUNC (float64x2x3_t, float64_t, 2d, d, f64, q) ++__ST3_LANE_FUNC (poly8x16x3_t, poly8_t, 16b, b, p8, q) ++__ST3_LANE_FUNC (poly16x8x3_t, poly16_t, 8h, h, p16, q) ++__ST3_LANE_FUNC (int8x16x3_t, int8_t, 16b, b, s8, q) ++__ST3_LANE_FUNC (int16x8x3_t, int16_t, 8h, h, s16, q) ++__ST3_LANE_FUNC (int32x4x3_t, int32_t, 4s, s, s32, q) ++__ST3_LANE_FUNC (int64x2x3_t, int64_t, 2d, d, s64, q) ++__ST3_LANE_FUNC (uint8x16x3_t, uint8_t, 16b, b, u8, q) ++__ST3_LANE_FUNC (uint16x8x3_t, uint16_t, 8h, h, u16, q) ++__ST3_LANE_FUNC (uint32x4x3_t, uint32_t, 4s, s, u32, q) ++__ST3_LANE_FUNC (uint64x2x3_t, uint64_t, 2d, d, u64, q) ++ ++#define __ST4_LANE_FUNC(intype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline void \ ++ __attribute__ ((__always_inline__)) \ ++ vst4 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ intype b, const int c) \ ++ { \ ++ __asm__ ("ld1 {v16." #regsuffix " - v19." #regsuffix "}, %1\n\t" \ ++ "st4 {v16." #lnsuffix " - v19." #lnsuffix "}[%2], %0\n\t" \ ++ : "=Q"(*(intype *) ptr) \ ++ : "Q"(b), "i"(c) \ ++ : "memory", "v16", "v17", "v18", "v19"); \ ++ } ++ ++__ST4_LANE_FUNC (int8x8x4_t, int8_t, 8b, b, s8,) ++__ST4_LANE_FUNC (float32x2x4_t, float32_t, 2s, s, f32,) ++__ST4_LANE_FUNC (float64x1x4_t, float64_t, 1d, d, f64,) ++__ST4_LANE_FUNC (poly8x8x4_t, poly8_t, 8b, b, p8,) ++__ST4_LANE_FUNC (poly16x4x4_t, poly16_t, 4h, h, p16,) ++__ST4_LANE_FUNC (int16x4x4_t, int16_t, 4h, h, s16,) ++__ST4_LANE_FUNC (int32x2x4_t, int32_t, 2s, s, s32,) ++__ST4_LANE_FUNC (int64x1x4_t, int64_t, 1d, d, s64,) ++__ST4_LANE_FUNC (uint8x8x4_t, uint8_t, 8b, b, u8,) ++__ST4_LANE_FUNC (uint16x4x4_t, uint16_t, 4h, h, u16,) ++__ST4_LANE_FUNC (uint32x2x4_t, uint32_t, 2s, s, u32,) ++__ST4_LANE_FUNC (uint64x1x4_t, uint64_t, 1d, d, u64,) ++__ST4_LANE_FUNC (float32x4x4_t, float32_t, 4s, s, f32, q) ++__ST4_LANE_FUNC (float64x2x4_t, float64_t, 2d, d, f64, q) ++__ST4_LANE_FUNC (poly8x16x4_t, poly8_t, 16b, b, p8, q) ++__ST4_LANE_FUNC (poly16x8x4_t, poly16_t, 8h, h, p16, q) ++__ST4_LANE_FUNC (int8x16x4_t, int8_t, 16b, b, s8, q) ++__ST4_LANE_FUNC (int16x8x4_t, int16_t, 8h, h, s16, q) ++__ST4_LANE_FUNC (int32x4x4_t, int32_t, 4s, s, s32, q) ++__ST4_LANE_FUNC (int64x2x4_t, int64_t, 2d, d, s64, q) ++__ST4_LANE_FUNC (uint8x16x4_t, uint8_t, 16b, b, u8, q) ++__ST4_LANE_FUNC (uint16x8x4_t, uint16_t, 8h, h, u16, q) ++__ST4_LANE_FUNC (uint32x4x4_t, uint32_t, 4s, s, u32, q) ++__ST4_LANE_FUNC (uint64x2x4_t, uint64_t, 2d, d, u64, q) ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vaddlv_s32 (int32x2_t a) ++{ ++ int64_t result; ++ __asm__ ("saddlp %0.1d, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vaddlv_u32 (uint32x2_t a) ++{ ++ uint64_t result; ++ __asm__ ("uaddlp %0.1d, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddv_s32 (int32x2_t a) ++{ ++ int32_t result; ++ __asm__ ("addp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddv_u32 (uint32x2_t a) ++{ ++ uint32_t result; ++ __asm__ ("addp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxnmv_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxnmp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminnmv_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fminnmp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vmaxnmvq_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fmaxnmp %0.2d, %1.2d, %1.2d" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vmaxv_s32 (int32x2_t a) ++{ ++ int32_t result; ++ __asm__ ("smaxp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vmaxv_u32 (uint32x2_t a) ++{ ++ uint32_t result; ++ __asm__ ("umaxp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vminnmvq_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fminnmp %0.2d, %1.2d, %1.2d" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vminv_s32 (int32x2_t a) ++{ ++ int32_t result; ++ __asm__ ("sminp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vminv_u32 (uint32x2_t a) ++{ ++ uint32_t result; ++ __asm__ ("uminp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vpaddd_s64 (int64x2_t __a) ++{ ++ return __builtin_aarch64_addpdi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqdmulh_laneq_s16 (int16x4_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqdmulh_laneq_s32 (int32x2_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqdmulhq_laneq_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmulhq_laneq_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrdmulh_laneq_s16 (int16x4_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrdmulh_laneq_s32 (int32x2_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrdmulhq_laneq_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrdmulhq_laneq_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev4si (__a, __b, __c); ++} ++ ++/* Table intrinsics. */ ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbl1_p8 (poly8x16_t a, uint8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbl1_s8 (int8x16_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbl1_u8 (uint8x16_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbl1q_p8 (poly8x16_t a, uint8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("tbl %0.16b, {%1.16b}, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbl1q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("tbl %0.16b, {%1.16b}, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbl1q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("tbl %0.16b, {%1.16b}, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbl2_s8 (int8x16x2_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbl2_u8 (uint8x16x2_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbl2_p8 (poly8x16x2_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbl2q_s8 (int8x16x2_t tab, int8x16_t idx) ++{ ++ int8x16_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbl2q_u8 (uint8x16x2_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbl2q_p8 (poly8x16x2_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbl3_s8 (int8x16x3_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbl3_u8 (uint8x16x3_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbl3_p8 (poly8x16x3_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbl3q_s8 (int8x16x3_t tab, int8x16_t idx) ++{ ++ int8x16_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbl3q_u8 (uint8x16x3_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbl3q_p8 (poly8x16x3_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbl4_s8 (int8x16x4_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbl4_u8 (uint8x16x4_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbl4_p8 (poly8x16x4_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbl4q_s8 (int8x16x4_t tab, int8x16_t idx) ++{ ++ int8x16_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbl4q_u8 (uint8x16x4_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbl4q_p8 (poly8x16x4_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbx1_s8 (int8x8_t r, int8x16_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ __asm__ ("tbx %0.8b,{%1.16b},%2.8b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbx1_u8 (uint8x8_t r, uint8x16_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ __asm__ ("tbx %0.8b,{%1.16b},%2.8b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbx1_p8 (poly8x8_t r, poly8x16_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ __asm__ ("tbx %0.8b,{%1.16b},%2.8b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbx1q_s8 (int8x16_t r, int8x16_t tab, int8x16_t idx) ++{ ++ int8x16_t result = r; ++ __asm__ ("tbx %0.16b,{%1.16b},%2.16b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbx1q_u8 (uint8x16_t r, uint8x16_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result = r; ++ __asm__ ("tbx %0.16b,{%1.16b},%2.16b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbx1q_p8 (poly8x16_t r, poly8x16_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result = r; ++ __asm__ ("tbx %0.16b,{%1.16b},%2.16b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbx2_s8 (int8x8_t r, int8x16x2_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbx2_u8 (uint8x8_t r, uint8x16x2_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbx2_p8 (poly8x8_t r, poly8x16x2_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbx2q_s8 (int8x16_t r, int8x16x2_t tab, int8x16_t idx) ++{ ++ int8x16_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbx2q_u8 (uint8x16_t r, uint8x16x2_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbx2q_p8 (poly8x16_t r, poly8x16x2_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbx3_s8 (int8x8_t r, int8x16x3_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbx3_u8 (uint8x8_t r, uint8x16x3_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbx3_p8 (poly8x8_t r, poly8x16x3_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbx3q_s8 (int8x16_t r, int8x16x3_t tab, int8x16_t idx) ++{ ++ int8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbx3q_u8 (uint8x16_t r, uint8x16x3_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbx3q_p8 (poly8x16_t r, poly8x16x3_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbx4_s8 (int8x8_t r, int8x16x4_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbx4_u8 (uint8x8_t r, uint8x16x4_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbx4_p8 (poly8x8_t r, poly8x16x4_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbx4q_s8 (int8x16_t r, int8x16x4_t tab, int8x16_t idx) ++{ ++ int8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbx4q_u8 (uint8x16_t r, uint8x16x4_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbx4q_p8 (poly8x16_t r, poly8x16x4_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++/* V7 legacy table intrinsics. */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbl1_s8 (int8x8_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbl1_u8 (uint8x8_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbl1_p8 (poly8x8_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (UINT64_C (0x0))); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbl2_s8 (int8x8x2_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x16_t temp = vcombine_s8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbl2_u8 (uint8x8x2_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x16_t temp = vcombine_u8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbl2_p8 (poly8x8x2_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x16_t temp = vcombine_p8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbl3_s8 (int8x8x3_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbl3_u8 (uint8x8x3_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbl3_p8 (poly8x8x3_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbl4_s8 (int8x8x4_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_s8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbl4_u8 (uint8x8x4_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_u8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbl4_p8 (poly8x8x4_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_p8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbx1_s8 (int8x8_t r, int8x8_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x8_t tmp1; ++ int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("movi %0.8b, 8\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {%2.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "w"(temp), "w"(idx), "w"(r) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbx1_u8 (uint8x8_t r, uint8x8_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x8_t tmp1; ++ uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("movi %0.8b, 8\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {%2.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "w"(temp), "w"(idx), "w"(r) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbx1_p8 (poly8x8_t r, poly8x8_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x8_t tmp1; ++ poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (UINT64_C (0x0))); ++ __asm__ ("movi %0.8b, 8\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {%2.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "w"(temp), "w"(idx), "w"(r) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbx2_s8 (int8x8_t r, int8x8x2_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ int8x16_t temp = vcombine_s8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbx %0.8b, {%1.16b}, %2.8b" ++ : "+w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbx2_u8 (uint8x8_t r, uint8x8x2_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ uint8x16_t temp = vcombine_u8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbx %0.8b, {%1.16b}, %2.8b" ++ : "+w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbx2_p8 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ poly8x16_t temp = vcombine_p8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbx %0.8b, {%1.16b}, %2.8b" ++ : "+w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbx3_s8 (int8x8_t r, int8x8x3_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x8_t tmp1; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" ++ "movi %0.8b, 24\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {v16.16b - v17.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "Q"(temp), "w"(idx), "w"(r) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbx3_u8 (uint8x8_t r, uint8x8x3_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x8_t tmp1; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" ++ "movi %0.8b, 24\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {v16.16b - v17.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "Q"(temp), "w"(idx), "w"(r) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbx3_p8 (poly8x8_t r, poly8x8x3_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x8_t tmp1; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" ++ "movi %0.8b, 24\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {v16.16b - v17.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "Q"(temp), "w"(idx), "w"(r) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbx4_s8 (int8x8_t r, int8x8x4_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_s8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "+w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbx4_u8 (uint8x8_t r, uint8x8x4_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_u8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "+w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbx4_p8 (poly8x8_t r, poly8x8x4_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_p8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "+w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++/* End of temporary inline asm. */ ++ ++/* Start of optimal implementations in approved order. */ ++ ++/* vadd */ ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vaddd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vaddd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a + __b; ++} ++ ++/* vceq */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceq_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceq_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vceq_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmeqv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceq_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmeqv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceq_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vceq_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmeqv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceq_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmeqv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqq_p8 (poly8x16_t __a, poly8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vceqq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmeqv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmeqv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmeqv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vceqq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmeqv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmeqv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmeqv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqzd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, 0); ++} ++ ++/* vcge */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcge_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgev8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcge_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmgev4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcge_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgev2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcge_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcge_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmhsv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcge_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmhsv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcge_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmhsv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcge_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgeq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgev16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgeq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmgev8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgeq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgev4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgeq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgev2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgeq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmhsv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgeq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmhsv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgeq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmhsv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgeq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmhsv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcged_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcged_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgezd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__a, 0); ++} ++ ++/* vcgt */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgt_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgtv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcgt_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmgtv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgt_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgtv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgt_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgt_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmhiv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcgt_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmhiv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgt_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmhiv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgt_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgtq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgtv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgtq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmgtv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgtv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgtv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgtq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmhiv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgtq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmhiv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmhiv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmhiv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtzd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, 0); ++} ++ ++/* vcle */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcle_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgev8qi (__b, __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcle_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmgev4hi (__b, __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcle_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgev2si (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcle_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__b, __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcle_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmhsv8qi ((int8x8_t) __b, ++ (int8x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcle_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmhsv4hi ((int16x4_t) __b, ++ (int16x4_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcle_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmhsv2si ((int32x2_t) __b, ++ (int32x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcle_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __b, ++ (int64x1_t) __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcleq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgev16qi (__b, __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcleq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmgev8hi (__b, __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcleq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgev4si (__b, __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcleq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgev2di (__b, __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcleq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmhsv16qi ((int8x16_t) __b, ++ (int8x16_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcleq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmhsv8hi ((int16x8_t) __b, ++ (int16x8_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcleq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmhsv4si ((int32x4_t) __b, ++ (int32x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcleq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmhsv2di ((int64x2_t) __b, ++ (int64x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcled_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclezd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmledi (__a, 0); ++} ++ ++/* vclt */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclt_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgtv8qi (__b, __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vclt_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmgtv4hi (__b, __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclt_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgtv2si (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclt_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__b, __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclt_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmhiv8qi ((int8x8_t) __b, ++ (int8x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vclt_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmhiv4hi ((int16x4_t) __b, ++ (int16x4_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclt_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmhiv2si ((int32x2_t) __b, ++ (int32x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclt_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __b, ++ (int64x1_t) __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcltq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgtv16qi (__b, __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcltq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmgtv8hi (__b, __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgtv4si (__b, __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgtv2di (__b, __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcltq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmhiv16qi ((int8x16_t) __b, ++ (int8x16_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcltq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmhiv8hi ((int16x8_t) __b, ++ (int16x8_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmhiv4si ((int32x4_t) __b, ++ (int32x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmhiv2di ((int64x2_t) __b, ++ (int64x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcltd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcltzd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmltdi (__a, 0); ++} ++ ++/* vdup */ ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vdupb_lane_s8 (int8x16_t a, int const b) ++{ ++ return __builtin_aarch64_dup_laneqi (a, b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vdupb_lane_u8 (uint8x16_t a, int const b) ++{ ++ return (uint8x1_t) __builtin_aarch64_dup_laneqi ((int8x16_t) a, b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vduph_lane_s16 (int16x8_t a, int const b) ++{ ++ return __builtin_aarch64_dup_lanehi (a, b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vduph_lane_u16 (uint16x8_t a, int const b) ++{ ++ return (uint16x1_t) __builtin_aarch64_dup_lanehi ((int16x8_t) a, b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vdups_lane_s32 (int32x4_t a, int const b) ++{ ++ return __builtin_aarch64_dup_lanesi (a, b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vdups_lane_u32 (uint32x4_t a, int const b) ++{ ++ return (uint32x1_t) __builtin_aarch64_dup_lanesi ((int32x4_t) a, b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vdupd_lane_s64 (int64x2_t a, int const b) ++{ ++ return __builtin_aarch64_dup_lanedi (a, b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vdupd_lane_u64 (uint64x2_t a, int const b) ++{ ++ return (uint64x1_t) __builtin_aarch64_dup_lanedi ((int64x2_t) a, b); ++} ++ ++/* vldn */ ++ ++__extension__ static __inline int64x1x2_t __attribute__ ((__always_inline__)) ++vld2_s64 (const int64_t * __a) ++{ ++ int64x1x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x1_t) __builtin_aarch64_get_dregoidi (__o, 0); ++ ret.val[1] = (int64x1_t) __builtin_aarch64_get_dregoidi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint64x1x2_t __attribute__ ((__always_inline__)) ++vld2_u64 (const uint64_t * __a) ++{ ++ uint64x1x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x1_t) __builtin_aarch64_get_dregoidi (__o, 0); ++ ret.val[1] = (uint64x1_t) __builtin_aarch64_get_dregoidi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline float64x1x2_t __attribute__ ((__always_inline__)) ++vld2_f64 (const float64_t * __a) ++{ ++ float64x1x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x1_t) __builtin_aarch64_get_dregoidf (__o, 0); ++ ret.val[1] = (float64x1_t) __builtin_aarch64_get_dregoidf (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__)) ++vld2_s8 (const int8_t * __a) ++{ ++ int8x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 0); ++ ret.val[1] = (int8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__)) ++vld2_p8 (const poly8_t * __a) ++{ ++ poly8x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 0); ++ ret.val[1] = (poly8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__)) ++vld2_s16 (const int16_t * __a) ++{ ++ int16x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 0); ++ ret.val[1] = (int16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__)) ++vld2_p16 (const poly16_t * __a) ++{ ++ poly16x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 0); ++ ret.val[1] = (poly16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__)) ++vld2_s32 (const int32_t * __a) ++{ ++ int32x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x2_t) __builtin_aarch64_get_dregoiv2si (__o, 0); ++ ret.val[1] = (int32x2_t) __builtin_aarch64_get_dregoiv2si (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__)) ++vld2_u8 (const uint8_t * __a) ++{ ++ uint8x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 0); ++ ret.val[1] = (uint8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__)) ++vld2_u16 (const uint16_t * __a) ++{ ++ uint16x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 0); ++ ret.val[1] = (uint16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__)) ++vld2_u32 (const uint32_t * __a) ++{ ++ uint32x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x2_t) __builtin_aarch64_get_dregoiv2si (__o, 0); ++ ret.val[1] = (uint32x2_t) __builtin_aarch64_get_dregoiv2si (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__)) ++vld2_f32 (const float32_t * __a) ++{ ++ float32x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x2_t) __builtin_aarch64_get_dregoiv2sf (__o, 0); ++ ret.val[1] = (float32x2_t) __builtin_aarch64_get_dregoiv2sf (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__)) ++vld2q_s8 (const int8_t * __a) ++{ ++ int8x16x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 0); ++ ret.val[1] = (int8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__)) ++vld2q_p8 (const poly8_t * __a) ++{ ++ poly8x16x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 0); ++ ret.val[1] = (poly8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__)) ++vld2q_s16 (const int16_t * __a) ++{ ++ int16x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 0); ++ ret.val[1] = (int16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__)) ++vld2q_p16 (const poly16_t * __a) ++{ ++ poly16x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 0); ++ ret.val[1] = (poly16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__)) ++vld2q_s32 (const int32_t * __a) ++{ ++ int32x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x4_t) __builtin_aarch64_get_qregoiv4si (__o, 0); ++ ret.val[1] = (int32x4_t) __builtin_aarch64_get_qregoiv4si (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int64x2x2_t __attribute__ ((__always_inline__)) ++vld2q_s64 (const int64_t * __a) ++{ ++ int64x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x2_t) __builtin_aarch64_get_qregoiv2di (__o, 0); ++ ret.val[1] = (int64x2_t) __builtin_aarch64_get_qregoiv2di (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__)) ++vld2q_u8 (const uint8_t * __a) ++{ ++ uint8x16x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 0); ++ ret.val[1] = (uint8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__)) ++vld2q_u16 (const uint16_t * __a) ++{ ++ uint16x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 0); ++ ret.val[1] = (uint16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__)) ++vld2q_u32 (const uint32_t * __a) ++{ ++ uint32x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x4_t) __builtin_aarch64_get_qregoiv4si (__o, 0); ++ ret.val[1] = (uint32x4_t) __builtin_aarch64_get_qregoiv4si (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint64x2x2_t __attribute__ ((__always_inline__)) ++vld2q_u64 (const uint64_t * __a) ++{ ++ uint64x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x2_t) __builtin_aarch64_get_qregoiv2di (__o, 0); ++ ret.val[1] = (uint64x2_t) __builtin_aarch64_get_qregoiv2di (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__)) ++vld2q_f32 (const float32_t * __a) ++{ ++ float32x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x4_t) __builtin_aarch64_get_qregoiv4sf (__o, 0); ++ ret.val[1] = (float32x4_t) __builtin_aarch64_get_qregoiv4sf (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline float64x2x2_t __attribute__ ((__always_inline__)) ++vld2q_f64 (const float64_t * __a) ++{ ++ float64x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x2_t) __builtin_aarch64_get_qregoiv2df (__o, 0); ++ ret.val[1] = (float64x2_t) __builtin_aarch64_get_qregoiv2df (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int64x1x3_t __attribute__ ((__always_inline__)) ++vld3_s64 (const int64_t * __a) ++{ ++ int64x1x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x1_t) __builtin_aarch64_get_dregcidi (__o, 0); ++ ret.val[1] = (int64x1_t) __builtin_aarch64_get_dregcidi (__o, 1); ++ ret.val[2] = (int64x1_t) __builtin_aarch64_get_dregcidi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint64x1x3_t __attribute__ ((__always_inline__)) ++vld3_u64 (const uint64_t * __a) ++{ ++ uint64x1x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x1_t) __builtin_aarch64_get_dregcidi (__o, 0); ++ ret.val[1] = (uint64x1_t) __builtin_aarch64_get_dregcidi (__o, 1); ++ ret.val[2] = (uint64x1_t) __builtin_aarch64_get_dregcidi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline float64x1x3_t __attribute__ ((__always_inline__)) ++vld3_f64 (const float64_t * __a) ++{ ++ float64x1x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x1_t) __builtin_aarch64_get_dregcidf (__o, 0); ++ ret.val[1] = (float64x1_t) __builtin_aarch64_get_dregcidf (__o, 1); ++ ret.val[2] = (float64x1_t) __builtin_aarch64_get_dregcidf (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int8x8x3_t __attribute__ ((__always_inline__)) ++vld3_s8 (const int8_t * __a) ++{ ++ int8x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 0); ++ ret.val[1] = (int8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 1); ++ ret.val[2] = (int8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline poly8x8x3_t __attribute__ ((__always_inline__)) ++vld3_p8 (const poly8_t * __a) ++{ ++ poly8x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 0); ++ ret.val[1] = (poly8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 1); ++ ret.val[2] = (poly8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int16x4x3_t __attribute__ ((__always_inline__)) ++vld3_s16 (const int16_t * __a) ++{ ++ int16x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 0); ++ ret.val[1] = (int16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 1); ++ ret.val[2] = (int16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline poly16x4x3_t __attribute__ ((__always_inline__)) ++vld3_p16 (const poly16_t * __a) ++{ ++ poly16x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 0); ++ ret.val[1] = (poly16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 1); ++ ret.val[2] = (poly16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int32x2x3_t __attribute__ ((__always_inline__)) ++vld3_s32 (const int32_t * __a) ++{ ++ int32x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x2_t) __builtin_aarch64_get_dregciv2si (__o, 0); ++ ret.val[1] = (int32x2_t) __builtin_aarch64_get_dregciv2si (__o, 1); ++ ret.val[2] = (int32x2_t) __builtin_aarch64_get_dregciv2si (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint8x8x3_t __attribute__ ((__always_inline__)) ++vld3_u8 (const uint8_t * __a) ++{ ++ uint8x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 0); ++ ret.val[1] = (uint8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 1); ++ ret.val[2] = (uint8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint16x4x3_t __attribute__ ((__always_inline__)) ++vld3_u16 (const uint16_t * __a) ++{ ++ uint16x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 0); ++ ret.val[1] = (uint16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 1); ++ ret.val[2] = (uint16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint32x2x3_t __attribute__ ((__always_inline__)) ++vld3_u32 (const uint32_t * __a) ++{ ++ uint32x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x2_t) __builtin_aarch64_get_dregciv2si (__o, 0); ++ ret.val[1] = (uint32x2_t) __builtin_aarch64_get_dregciv2si (__o, 1); ++ ret.val[2] = (uint32x2_t) __builtin_aarch64_get_dregciv2si (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__)) ++vld3_f32 (const float32_t * __a) ++{ ++ float32x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x2_t) __builtin_aarch64_get_dregciv2sf (__o, 0); ++ ret.val[1] = (float32x2_t) __builtin_aarch64_get_dregciv2sf (__o, 1); ++ ret.val[2] = (float32x2_t) __builtin_aarch64_get_dregciv2sf (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int8x16x3_t __attribute__ ((__always_inline__)) ++vld3q_s8 (const int8_t * __a) ++{ ++ int8x16x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 0); ++ ret.val[1] = (int8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 1); ++ ret.val[2] = (int8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline poly8x16x3_t __attribute__ ((__always_inline__)) ++vld3q_p8 (const poly8_t * __a) ++{ ++ poly8x16x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 0); ++ ret.val[1] = (poly8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 1); ++ ret.val[2] = (poly8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int16x8x3_t __attribute__ ((__always_inline__)) ++vld3q_s16 (const int16_t * __a) ++{ ++ int16x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 0); ++ ret.val[1] = (int16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 1); ++ ret.val[2] = (int16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline poly16x8x3_t __attribute__ ((__always_inline__)) ++vld3q_p16 (const poly16_t * __a) ++{ ++ poly16x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 0); ++ ret.val[1] = (poly16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 1); ++ ret.val[2] = (poly16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int32x4x3_t __attribute__ ((__always_inline__)) ++vld3q_s32 (const int32_t * __a) ++{ ++ int32x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x4_t) __builtin_aarch64_get_qregciv4si (__o, 0); ++ ret.val[1] = (int32x4_t) __builtin_aarch64_get_qregciv4si (__o, 1); ++ ret.val[2] = (int32x4_t) __builtin_aarch64_get_qregciv4si (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int64x2x3_t __attribute__ ((__always_inline__)) ++vld3q_s64 (const int64_t * __a) ++{ ++ int64x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x2_t) __builtin_aarch64_get_qregciv2di (__o, 0); ++ ret.val[1] = (int64x2_t) __builtin_aarch64_get_qregciv2di (__o, 1); ++ ret.val[2] = (int64x2_t) __builtin_aarch64_get_qregciv2di (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint8x16x3_t __attribute__ ((__always_inline__)) ++vld3q_u8 (const uint8_t * __a) ++{ ++ uint8x16x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 0); ++ ret.val[1] = (uint8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 1); ++ ret.val[2] = (uint8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint16x8x3_t __attribute__ ((__always_inline__)) ++vld3q_u16 (const uint16_t * __a) ++{ ++ uint16x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 0); ++ ret.val[1] = (uint16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 1); ++ ret.val[2] = (uint16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint32x4x3_t __attribute__ ((__always_inline__)) ++vld3q_u32 (const uint32_t * __a) ++{ ++ uint32x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x4_t) __builtin_aarch64_get_qregciv4si (__o, 0); ++ ret.val[1] = (uint32x4_t) __builtin_aarch64_get_qregciv4si (__o, 1); ++ ret.val[2] = (uint32x4_t) __builtin_aarch64_get_qregciv4si (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint64x2x3_t __attribute__ ((__always_inline__)) ++vld3q_u64 (const uint64_t * __a) ++{ ++ uint64x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x2_t) __builtin_aarch64_get_qregciv2di (__o, 0); ++ ret.val[1] = (uint64x2_t) __builtin_aarch64_get_qregciv2di (__o, 1); ++ ret.val[2] = (uint64x2_t) __builtin_aarch64_get_qregciv2di (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__)) ++vld3q_f32 (const float32_t * __a) ++{ ++ float32x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x4_t) __builtin_aarch64_get_qregciv4sf (__o, 0); ++ ret.val[1] = (float32x4_t) __builtin_aarch64_get_qregciv4sf (__o, 1); ++ ret.val[2] = (float32x4_t) __builtin_aarch64_get_qregciv4sf (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline float64x2x3_t __attribute__ ((__always_inline__)) ++vld3q_f64 (const float64_t * __a) ++{ ++ float64x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x2_t) __builtin_aarch64_get_qregciv2df (__o, 0); ++ ret.val[1] = (float64x2_t) __builtin_aarch64_get_qregciv2df (__o, 1); ++ ret.val[2] = (float64x2_t) __builtin_aarch64_get_qregciv2df (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int64x1x4_t __attribute__ ((__always_inline__)) ++vld4_s64 (const int64_t * __a) ++{ ++ int64x1x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x1_t) __builtin_aarch64_get_dregxidi (__o, 0); ++ ret.val[1] = (int64x1_t) __builtin_aarch64_get_dregxidi (__o, 1); ++ ret.val[2] = (int64x1_t) __builtin_aarch64_get_dregxidi (__o, 2); ++ ret.val[3] = (int64x1_t) __builtin_aarch64_get_dregxidi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint64x1x4_t __attribute__ ((__always_inline__)) ++vld4_u64 (const uint64_t * __a) ++{ ++ uint64x1x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x1_t) __builtin_aarch64_get_dregxidi (__o, 0); ++ ret.val[1] = (uint64x1_t) __builtin_aarch64_get_dregxidi (__o, 1); ++ ret.val[2] = (uint64x1_t) __builtin_aarch64_get_dregxidi (__o, 2); ++ ret.val[3] = (uint64x1_t) __builtin_aarch64_get_dregxidi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline float64x1x4_t __attribute__ ((__always_inline__)) ++vld4_f64 (const float64_t * __a) ++{ ++ float64x1x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x1_t) __builtin_aarch64_get_dregxidf (__o, 0); ++ ret.val[1] = (float64x1_t) __builtin_aarch64_get_dregxidf (__o, 1); ++ ret.val[2] = (float64x1_t) __builtin_aarch64_get_dregxidf (__o, 2); ++ ret.val[3] = (float64x1_t) __builtin_aarch64_get_dregxidf (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int8x8x4_t __attribute__ ((__always_inline__)) ++vld4_s8 (const int8_t * __a) ++{ ++ int8x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 0); ++ ret.val[1] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 1); ++ ret.val[2] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 2); ++ ret.val[3] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline poly8x8x4_t __attribute__ ((__always_inline__)) ++vld4_p8 (const poly8_t * __a) ++{ ++ poly8x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 0); ++ ret.val[1] = (poly8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 1); ++ ret.val[2] = (poly8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 2); ++ ret.val[3] = (poly8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int16x4x4_t __attribute__ ((__always_inline__)) ++vld4_s16 (const int16_t * __a) ++{ ++ int16x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 0); ++ ret.val[1] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 1); ++ ret.val[2] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 2); ++ ret.val[3] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline poly16x4x4_t __attribute__ ((__always_inline__)) ++vld4_p16 (const poly16_t * __a) ++{ ++ poly16x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 0); ++ ret.val[1] = (poly16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 1); ++ ret.val[2] = (poly16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 2); ++ ret.val[3] = (poly16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int32x2x4_t __attribute__ ((__always_inline__)) ++vld4_s32 (const int32_t * __a) ++{ ++ int32x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 0); ++ ret.val[1] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 1); ++ ret.val[2] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 2); ++ ret.val[3] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__)) ++vld4_u8 (const uint8_t * __a) ++{ ++ uint8x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 0); ++ ret.val[1] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 1); ++ ret.val[2] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 2); ++ ret.val[3] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint16x4x4_t __attribute__ ((__always_inline__)) ++vld4_u16 (const uint16_t * __a) ++{ ++ uint16x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 0); ++ ret.val[1] = (uint16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 1); ++ ret.val[2] = (uint16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 2); ++ ret.val[3] = (uint16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint32x2x4_t __attribute__ ((__always_inline__)) ++vld4_u32 (const uint32_t * __a) ++{ ++ uint32x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 0); ++ ret.val[1] = (uint32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 1); ++ ret.val[2] = (uint32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 2); ++ ret.val[3] = (uint32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__)) ++vld4_f32 (const float32_t * __a) ++{ ++ float32x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x2_t) __builtin_aarch64_get_dregxiv2sf (__o, 0); ++ ret.val[1] = (float32x2_t) __builtin_aarch64_get_dregxiv2sf (__o, 1); ++ ret.val[2] = (float32x2_t) __builtin_aarch64_get_dregxiv2sf (__o, 2); ++ ret.val[3] = (float32x2_t) __builtin_aarch64_get_dregxiv2sf (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int8x16x4_t __attribute__ ((__always_inline__)) ++vld4q_s8 (const int8_t * __a) ++{ ++ int8x16x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 0); ++ ret.val[1] = (int8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 1); ++ ret.val[2] = (int8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 2); ++ ret.val[3] = (int8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline poly8x16x4_t __attribute__ ((__always_inline__)) ++vld4q_p8 (const poly8_t * __a) ++{ ++ poly8x16x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 0); ++ ret.val[1] = (poly8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 1); ++ ret.val[2] = (poly8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 2); ++ ret.val[3] = (poly8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int16x8x4_t __attribute__ ((__always_inline__)) ++vld4q_s16 (const int16_t * __a) ++{ ++ int16x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 0); ++ ret.val[1] = (int16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 1); ++ ret.val[2] = (int16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 2); ++ ret.val[3] = (int16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline poly16x8x4_t __attribute__ ((__always_inline__)) ++vld4q_p16 (const poly16_t * __a) ++{ ++ poly16x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 0); ++ ret.val[1] = (poly16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 1); ++ ret.val[2] = (poly16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 2); ++ ret.val[3] = (poly16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int32x4x4_t __attribute__ ((__always_inline__)) ++vld4q_s32 (const int32_t * __a) ++{ ++ int32x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 0); ++ ret.val[1] = (int32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 1); ++ ret.val[2] = (int32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 2); ++ ret.val[3] = (int32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int64x2x4_t __attribute__ ((__always_inline__)) ++vld4q_s64 (const int64_t * __a) ++{ ++ int64x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 0); ++ ret.val[1] = (int64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 1); ++ ret.val[2] = (int64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 2); ++ ret.val[3] = (int64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint8x16x4_t __attribute__ ((__always_inline__)) ++vld4q_u8 (const uint8_t * __a) ++{ ++ uint8x16x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 0); ++ ret.val[1] = (uint8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 1); ++ ret.val[2] = (uint8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 2); ++ ret.val[3] = (uint8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint16x8x4_t __attribute__ ((__always_inline__)) ++vld4q_u16 (const uint16_t * __a) ++{ ++ uint16x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 0); ++ ret.val[1] = (uint16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 1); ++ ret.val[2] = (uint16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 2); ++ ret.val[3] = (uint16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint32x4x4_t __attribute__ ((__always_inline__)) ++vld4q_u32 (const uint32_t * __a) ++{ ++ uint32x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 0); ++ ret.val[1] = (uint32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 1); ++ ret.val[2] = (uint32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 2); ++ ret.val[3] = (uint32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint64x2x4_t __attribute__ ((__always_inline__)) ++vld4q_u64 (const uint64_t * __a) ++{ ++ uint64x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 0); ++ ret.val[1] = (uint64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 1); ++ ret.val[2] = (uint64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 2); ++ ret.val[3] = (uint64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__)) ++vld4q_f32 (const float32_t * __a) ++{ ++ float32x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x4_t) __builtin_aarch64_get_qregxiv4sf (__o, 0); ++ ret.val[1] = (float32x4_t) __builtin_aarch64_get_qregxiv4sf (__o, 1); ++ ret.val[2] = (float32x4_t) __builtin_aarch64_get_qregxiv4sf (__o, 2); ++ ret.val[3] = (float32x4_t) __builtin_aarch64_get_qregxiv4sf (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline float64x2x4_t __attribute__ ((__always_inline__)) ++vld4q_f64 (const float64_t * __a) ++{ ++ float64x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x2_t) __builtin_aarch64_get_qregxiv2df (__o, 0); ++ ret.val[1] = (float64x2_t) __builtin_aarch64_get_qregxiv2df (__o, 1); ++ ret.val[2] = (float64x2_t) __builtin_aarch64_get_qregxiv2df (__o, 2); ++ ret.val[3] = (float64x2_t) __builtin_aarch64_get_qregxiv2df (__o, 3); ++ return ret; ++} ++ ++/* vmax */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmax_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __builtin_aarch64_fmaxv2sf (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmax_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_smaxv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmax_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_smaxv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmax_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_smaxv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmax_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_umaxv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmax_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_umaxv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmax_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_umaxv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmaxq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __builtin_aarch64_fmaxv4sf (__a, __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmaxq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __builtin_aarch64_fmaxv2df (__a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmaxq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __builtin_aarch64_smaxv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmaxq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_smaxv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmaxq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_smaxv4si (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmaxq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_umaxv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmaxq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_umaxv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmaxq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_umaxv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++/* vmin */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmin_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __builtin_aarch64_fminv2sf (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmin_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_sminv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmin_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_sminv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmin_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_sminv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmin_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uminv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmin_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uminv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmin_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uminv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vminq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __builtin_aarch64_fminv4sf (__a, __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vminq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __builtin_aarch64_fminv2df (__a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vminq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __builtin_aarch64_sminv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vminq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_sminv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vminq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_sminv4si (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vminq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uminv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vminq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uminv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vminq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uminv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++/* vmla */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmla_f32 (float32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ return a + b * c; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmlaq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ return a + b * c; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmlaq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ return a + b * c; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmls_f32 (float32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ return a - b * c; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmlsq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ return a - b * c; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmlsq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ return a - b * c; ++} ++ ++/* vqabs */ ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqabsq_s64 (int64x2_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_sqabsv2di (__a); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqabsb_s8 (int8x1_t __a) ++{ ++ return (int8x1_t) __builtin_aarch64_sqabsqi (__a); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqabsh_s16 (int16x1_t __a) ++{ ++ return (int16x1_t) __builtin_aarch64_sqabshi (__a); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqabss_s32 (int32x1_t __a) ++{ ++ return (int32x1_t) __builtin_aarch64_sqabssi (__a); ++} ++ ++/* vqadd */ ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqaddb_s8 (int8x1_t __a, int8x1_t __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqaddqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqaddh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqaddhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqadds_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqaddsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqaddd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqadddi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqaddb_u8 (uint8x1_t __a, uint8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqaddqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqaddh_u16 (uint16x1_t __a, uint16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqaddhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqadds_u32 (uint32x1_t __a, uint32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqaddsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqaddd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqadddi (__a, __b); ++} ++ ++/* vqdmlal */ ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c) ++{ ++ return __builtin_aarch64_sqdmlalv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return __builtin_aarch64_sqdmlal2v8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_high_lane_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlal2_lanev8hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_high_laneq_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlal2_laneqv8hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c) ++{ ++ return __builtin_aarch64_sqdmlal2_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_lane_s16 (int32x4_t __a, int16x4_t __b, int16x8_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlal_lanev4hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_laneq_s16 (int32x4_t __a, int16x4_t __b, int16x8_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlal_laneqv4hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c) ++{ ++ return __builtin_aarch64_sqdmlal_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return __builtin_aarch64_sqdmlalv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return __builtin_aarch64_sqdmlal2v4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlal2_lanev4si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlal2_laneqv4si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c) ++{ ++ return __builtin_aarch64_sqdmlal2_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlal_lanev2si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlal_laneqv2si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c) ++{ ++ return __builtin_aarch64_sqdmlal_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmlalh_s16 (int32x1_t __a, int16x1_t __b, int16x1_t __c) ++{ ++ return __builtin_aarch64_sqdmlalhi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmlalh_lane_s16 (int32x1_t __a, int16x1_t __b, int16x8_t __c, const int __d) ++{ ++ return __builtin_aarch64_sqdmlal_lanehi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmlals_s32 (int64x1_t __a, int32x1_t __b, int32x1_t __c) ++{ ++ return __builtin_aarch64_sqdmlalsi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmlals_lane_s32 (int64x1_t __a, int32x1_t __b, int32x4_t __c, const int __d) ++{ ++ return __builtin_aarch64_sqdmlal_lanesi (__a, __b, __c, __d); ++} ++ ++/* vqdmlsl */ ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c) ++{ ++ return __builtin_aarch64_sqdmlslv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl2v8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_lane_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl2_lanev8hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_laneq_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl2_laneqv8hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl2_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_lane_s16 (int32x4_t __a, int16x4_t __b, int16x8_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl_lanev4hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_laneq_s16 (int32x4_t __a, int16x4_t __b, int16x8_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl_laneqv4hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return __builtin_aarch64_sqdmlslv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl2v4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl2_lanev4si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl2_laneqv4si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl2_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl_lanev2si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl_laneqv2si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmlslh_s16 (int32x1_t __a, int16x1_t __b, int16x1_t __c) ++{ ++ return __builtin_aarch64_sqdmlslhi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmlslh_lane_s16 (int32x1_t __a, int16x1_t __b, int16x8_t __c, const int __d) ++{ ++ return __builtin_aarch64_sqdmlsl_lanehi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmlsls_s32 (int64x1_t __a, int32x1_t __b, int32x1_t __c) ++{ ++ return __builtin_aarch64_sqdmlslsi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmlsls_lane_s32 (int64x1_t __a, int32x1_t __b, int32x4_t __c, const int __d) ++{ ++ return __builtin_aarch64_sqdmlsl_lanesi (__a, __b, __c, __d); ++} ++ ++/* vqdmulh */ ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqdmulh_lane_s16 (int16x4_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqdmulh_lane_s32 (int32x2_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqdmulhq_lane_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmulhq_lane_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqdmulhh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqdmulhhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqdmulhh_lane_s16 (int16x1_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanehi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmulhs_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqdmulhsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmulhs_lane_s32 (int32x1_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanesi (__a, __b, __c); ++} ++ ++/* vqdmull */ ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_sqdmullv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_high_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_sqdmull2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_high_lane_s16 (int16x8_t __a, int16x8_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull2_lanev8hi (__a, __b,__c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_high_laneq_s16 (int16x8_t __a, int16x8_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull2_laneqv8hi (__a, __b,__c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_high_n_s16 (int16x8_t __a, int16_t __b) ++{ ++ return __builtin_aarch64_sqdmull2_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_lane_s16 (int16x4_t __a, int16x8_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull_lanev4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_laneq_s16 (int16x4_t __a, int16x8_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull_laneqv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_n_s16 (int16x4_t __a, int16_t __b) ++{ ++ return __builtin_aarch64_sqdmull_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_sqdmullv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_high_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_sqdmull2v4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_high_lane_s32 (int32x4_t __a, int32x4_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull2_lanev4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_high_laneq_s32 (int32x4_t __a, int32x4_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull2_laneqv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_high_n_s32 (int32x4_t __a, int32_t __b) ++{ ++ return __builtin_aarch64_sqdmull2_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_lane_s32 (int32x2_t __a, int32x4_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull_lanev2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_laneq_s32 (int32x2_t __a, int32x4_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull_laneqv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_n_s32 (int32x2_t __a, int32_t __b) ++{ ++ return __builtin_aarch64_sqdmull_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmullh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqdmullhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmullh_lane_s16 (int16x1_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmull_lanehi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmulls_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqdmullsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmulls_lane_s32 (int32x1_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmull_lanesi (__a, __b, __c); ++} ++ ++/* vqmovn */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqmovn_s16 (int16x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_sqmovnv8hi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqmovn_s32 (int32x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_sqmovnv4si (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqmovn_s64 (int64x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_sqmovnv2di (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqmovn_u16 (uint16x8_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqmovnv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqmovn_u32 (uint32x4_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqmovnv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqmovn_u64 (uint64x2_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqmovnv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqmovnh_s16 (int16x1_t __a) ++{ ++ return (int8x1_t) __builtin_aarch64_sqmovnhi (__a); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqmovns_s32 (int32x1_t __a) ++{ ++ return (int16x1_t) __builtin_aarch64_sqmovnsi (__a); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqmovnd_s64 (int64x1_t __a) ++{ ++ return (int32x1_t) __builtin_aarch64_sqmovndi (__a); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqmovnh_u16 (uint16x1_t __a) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqmovnhi (__a); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqmovns_u32 (uint32x1_t __a) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqmovnsi (__a); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqmovnd_u64 (uint64x1_t __a) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqmovndi (__a); ++} ++ ++/* vqmovun */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqmovun_s16 (int16x8_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_sqmovunv8hi (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqmovun_s32 (int32x4_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_sqmovunv4si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqmovun_s64 (int64x2_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_sqmovunv2di (__a); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqmovunh_s16 (int16x1_t __a) ++{ ++ return (int8x1_t) __builtin_aarch64_sqmovunhi (__a); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqmovuns_s32 (int32x1_t __a) ++{ ++ return (int16x1_t) __builtin_aarch64_sqmovunsi (__a); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqmovund_s64 (int64x1_t __a) ++{ ++ return (int32x1_t) __builtin_aarch64_sqmovundi (__a); ++} ++ ++/* vqneg */ ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqnegq_s64 (int64x2_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_sqnegv2di (__a); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqnegb_s8 (int8x1_t __a) ++{ ++ return (int8x1_t) __builtin_aarch64_sqnegqi (__a); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqnegh_s16 (int16x1_t __a) ++{ ++ return (int16x1_t) __builtin_aarch64_sqneghi (__a); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqnegs_s32 (int32x1_t __a) ++{ ++ return (int32x1_t) __builtin_aarch64_sqnegsi (__a); ++} ++ ++/* vqrdmulh */ ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrdmulh_lane_s16 (int16x4_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrdmulh_lane_s32 (int32x2_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrdmulhq_lane_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrdmulhq_lane_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrdmulhh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqrdmulhhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrdmulhh_lane_s16 (int16x1_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanehi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrdmulhs_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqrdmulhsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrdmulhs_lane_s32 (int32x1_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanesi (__a, __b, __c); ++} ++ ++/* vqrshl */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqrshl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_sqrshlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrshl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_sqrshlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrshl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_sqrshlv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqrshl_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __builtin_aarch64_sqrshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqrshl_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqrshlv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqrshl_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqrshlv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqrshl_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqrshlv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqrshl_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqrshldi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqrshlq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __builtin_aarch64_sqrshlv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrshlq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_sqrshlv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrshlq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_sqrshlv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqrshlq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __builtin_aarch64_sqrshlv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqrshlq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqrshlv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqrshlq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqrshlv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqrshlq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqrshlv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqrshlq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqrshlv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqrshlb_s8 (int8x1_t __a, int8x1_t __b) ++{ ++ return __builtin_aarch64_sqrshlqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrshlh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return __builtin_aarch64_sqrshlhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrshls_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return __builtin_aarch64_sqrshlsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqrshld_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __builtin_aarch64_sqrshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqrshlb_u8 (uint8x1_t __a, uint8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqrshlqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqrshlh_u16 (uint16x1_t __a, uint16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqrshlhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqrshls_u32 (uint32x1_t __a, uint32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqrshlsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqrshld_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqrshldi (__a, __b); ++} ++ ++/* vqrshrn */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqrshrn_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqrshrn_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrshrn_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqrshrn_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrshrn_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqrshrn_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqrshrn_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqrshrn_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqrshrn_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqrshrn_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqrshrn_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqrshrn_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqrshrnh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqrshrn_nhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrshrns_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqrshrn_nsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrshrnd_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqrshrn_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqrshrnh_n_u16 (uint16x1_t __a, const int __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqrshrn_nhi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqrshrns_n_u32 (uint32x1_t __a, const int __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqrshrn_nsi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqrshrnd_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqrshrn_ndi (__a, __b); ++} ++ ++/* vqrshrun */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqrshrun_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_sqrshrun_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqrshrun_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_sqrshrun_nv4si (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqrshrun_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_sqrshrun_nv2di (__a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqrshrunh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqrshrun_nhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrshruns_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqrshrun_nsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrshrund_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqrshrun_ndi (__a, __b); ++} ++ ++/* vqshl */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqshl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_sqshlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqshl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_sqshlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqshl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_sqshlv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshl_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __builtin_aarch64_sqshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshl_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqshlv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshl_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqshlv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshl_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqshlv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshl_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqshldi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqshlq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __builtin_aarch64_sqshlv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqshlq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_sqshlv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqshlq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_sqshlv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqshlq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __builtin_aarch64_sqshlv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqshlq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqshlv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqshlq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqshlv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqshlq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqshlv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqshlq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqshlv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshlb_s8 (int8x1_t __a, int8x1_t __b) ++{ ++ return __builtin_aarch64_sqshlqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshlh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return __builtin_aarch64_sqshlhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshls_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return __builtin_aarch64_sqshlsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshld_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __builtin_aarch64_sqshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqshlb_u8 (uint8x1_t __a, uint8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqshlqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqshlh_u16 (uint16x1_t __a, uint16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqshlhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqshls_u32 (uint32x1_t __a, uint32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqshlsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshld_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqshldi (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqshl_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqshl_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqshl_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqshl_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqshl_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqshl_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshl_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqshl_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshl_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqshl_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshl_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqshl_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshl_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqshl_nv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshl_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqshl_ndi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqshlq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sqshl_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqshlq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqshl_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqshlq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqshl_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqshlq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sqshl_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqshlq_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqshl_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqshlq_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqshl_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqshlq_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqshl_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqshlq_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqshl_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshlb_n_s8 (int8x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqshl_nqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshlh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqshl_nhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshls_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqshl_nsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshld_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqshl_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqshlb_n_u8 (uint8x1_t __a, const int __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqshl_nqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqshlh_n_u16 (uint16x1_t __a, const int __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqshl_nhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqshls_n_u32 (uint32x1_t __a, const int __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqshl_nsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshld_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqshl_ndi (__a, __b); ++} ++ ++/* vqshlu */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshlu_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_sqshlu_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshlu_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_sqshlu_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshlu_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_sqshlu_nv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshlu_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_sqshlu_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqshluq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_sqshlu_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqshluq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_sqshlu_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqshluq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_sqshlu_nv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqshluq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_sqshlu_nv2di (__a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshlub_n_s8 (int8x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqshlu_nqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshluh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqshlu_nhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshlus_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqshlu_nsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshlud_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqshlu_ndi (__a, __b); ++} ++ ++/* vqshrn */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqshrn_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqshrn_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqshrn_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqshrn_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqshrn_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqshrn_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshrn_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqshrn_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshrn_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqshrn_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshrn_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqshrn_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshrnh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqshrn_nhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshrns_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqshrn_nsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshrnd_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqshrn_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqshrnh_n_u16 (uint16x1_t __a, const int __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqshrn_nhi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqshrns_n_u32 (uint32x1_t __a, const int __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqshrn_nsi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqshrnd_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqshrn_ndi (__a, __b); ++} ++ ++/* vqshrun */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshrun_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_sqshrun_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshrun_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_sqshrun_nv4si (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshrun_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_sqshrun_nv2di (__a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshrunh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqshrun_nhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshruns_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqshrun_nsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshrund_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqshrun_ndi (__a, __b); ++} ++ ++/* vqsub */ ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqsubb_s8 (int8x1_t __a, int8x1_t __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqsubqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqsubh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqsubhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqsubs_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqsubsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqsubd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqsubdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqsubb_u8 (uint8x1_t __a, uint8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqsubqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqsubh_u16 (uint16x1_t __a, uint16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqsubhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqsubs_u32 (uint32x1_t __a, uint32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqsubsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqsubd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqsubdi (__a, __b); ++} ++ ++/* vrshl */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrshl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_srshlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrshl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_srshlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrshl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_srshlv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrshl_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_srshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrshl_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_urshlv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrshl_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_urshlv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrshl_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_urshlv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrshl_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_urshldi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrshlq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_srshlv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrshlq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_srshlv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrshlq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_srshlv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vrshlq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_srshlv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrshlq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_urshlv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrshlq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_urshlv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrshlq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_urshlv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vrshlq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_urshlv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrshld_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_srshldi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrshld_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_urshldi (__a, __b); ++} ++ ++/* vrshr */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrshr_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_srshr_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrshr_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_srshr_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrshr_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_srshr_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrshr_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_srshr_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrshr_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_urshr_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrshr_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_urshr_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrshr_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_urshr_nv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrshr_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_urshr_ndi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrshrq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8x16_t) __builtin_aarch64_srshr_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrshrq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16x8_t) __builtin_aarch64_srshr_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrshrq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32x4_t) __builtin_aarch64_srshr_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vrshrq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int64x2_t) __builtin_aarch64_srshr_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrshrq_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_urshr_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrshrq_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_urshr_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrshrq_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_urshr_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vrshrq_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_urshr_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrshrd_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_srshr_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrshrd_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_urshr_ndi (__a, __b); ++} ++ ++/* vrsra */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrsra_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) ++{ ++ return (int8x8_t) __builtin_aarch64_srsra_nv8qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrsra_n_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return (int16x4_t) __builtin_aarch64_srsra_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrsra_n_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return (int32x2_t) __builtin_aarch64_srsra_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrsra_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_srsra_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrsra_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c) ++{ ++ return (uint8x8_t) __builtin_aarch64_ursra_nv8qi ((int8x8_t) __a, ++ (int8x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrsra_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c) ++{ ++ return (uint16x4_t) __builtin_aarch64_ursra_nv4hi ((int16x4_t) __a, ++ (int16x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrsra_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c) ++{ ++ return (uint32x2_t) __builtin_aarch64_ursra_nv2si ((int32x2_t) __a, ++ (int32x2_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrsra_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_ursra_ndi ((int64x1_t) __a, ++ (int64x1_t) __b, __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrsraq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) ++{ ++ return (int8x16_t) __builtin_aarch64_srsra_nv16qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrsraq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return (int16x8_t) __builtin_aarch64_srsra_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrsraq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return (int32x4_t) __builtin_aarch64_srsra_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vrsraq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c) ++{ ++ return (int64x2_t) __builtin_aarch64_srsra_nv2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrsraq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_ursra_nv16qi ((int8x16_t) __a, ++ (int8x16_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrsraq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_ursra_nv8hi ((int16x8_t) __a, ++ (int16x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrsraq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_ursra_nv4si ((int32x4_t) __a, ++ (int32x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vrsraq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c) ++{ ++ return (uint64x2_t) __builtin_aarch64_ursra_nv2di ((int64x2_t) __a, ++ (int64x2_t) __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrsrad_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_srsra_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrsrad_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_ursra_ndi (__a, __b, __c); ++} ++ ++/* vshl */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vshl_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sshl_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vshl_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sshl_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vshl_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sshl_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshl_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshl_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vshl_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_ushl_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vshl_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_ushl_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vshl_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_ushl_nv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshl_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushl_ndi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vshlq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sshl_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshlq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sshl_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshlq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sshl_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshlq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sshl_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vshlq_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_ushl_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshlq_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushl_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshlq_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushl_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshlq_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushl_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshld_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshl_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshld_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushl_ndi (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vshl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sshlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vshl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sshlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vshl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sshlv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshl_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vshl_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_ushlv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vshl_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_ushlv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vshl_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_ushlv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshl_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushldi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vshlq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sshlv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshlq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sshlv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshlq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sshlv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshlq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sshlv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vshlq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_ushlv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshlq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushlv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshlq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushlv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshlq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushlv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshld_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshldi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshld_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushldi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshll_high_n_s8 (int8x16_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll2_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshll_high_n_s16 (int16x8_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll2_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshll_high_n_s32 (int32x4_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll2_nv4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshll_high_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushll2_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshll_high_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushll2_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshll_high_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushll2_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshll_n_s8 (int8x8_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshll_n_s16 (int16x4_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshll_n_s32 (int32x2_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll_nv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshll_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushll_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshll_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushll_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshll_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushll_nv2si ((int32x2_t) __a, __b); ++} ++ ++/* vshr */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vshr_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sshr_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vshr_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sshr_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vshr_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sshr_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshr_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshr_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vshr_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_ushr_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vshr_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_ushr_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vshr_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_ushr_nv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshr_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushr_ndi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vshrq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sshr_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshrq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sshr_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshrq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sshr_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshrq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sshr_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vshrq_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_ushr_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshrq_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushr_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshrq_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushr_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshrq_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushr_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshrd_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshr_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshrd_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushr_ndi (__a, __b); ++} ++ ++/* vsli */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsli_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) ++{ ++ return (int8x8_t) __builtin_aarch64_ssli_nv8qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsli_n_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return (int16x4_t) __builtin_aarch64_ssli_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsli_n_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return (int32x2_t) __builtin_aarch64_ssli_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsli_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssli_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsli_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c) ++{ ++ return (uint8x8_t) __builtin_aarch64_usli_nv8qi ((int8x8_t) __a, ++ (int8x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsli_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c) ++{ ++ return (uint16x4_t) __builtin_aarch64_usli_nv4hi ((int16x4_t) __a, ++ (int16x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsli_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c) ++{ ++ return (uint32x2_t) __builtin_aarch64_usli_nv2si ((int32x2_t) __a, ++ (int32x2_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsli_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usli_ndi ((int64x1_t) __a, ++ (int64x1_t) __b, __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsliq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) ++{ ++ return (int8x16_t) __builtin_aarch64_ssli_nv16qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsliq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return (int16x8_t) __builtin_aarch64_ssli_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsliq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return (int32x4_t) __builtin_aarch64_ssli_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsliq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c) ++{ ++ return (int64x2_t) __builtin_aarch64_ssli_nv2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsliq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_usli_nv16qi ((int8x16_t) __a, ++ (int8x16_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsliq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_usli_nv8hi ((int16x8_t) __a, ++ (int16x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsliq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_usli_nv4si ((int32x4_t) __a, ++ (int32x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsliq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c) ++{ ++ return (uint64x2_t) __builtin_aarch64_usli_nv2di ((int64x2_t) __a, ++ (int64x2_t) __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vslid_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssli_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vslid_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usli_ndi (__a, __b, __c); ++} ++ ++/* vsqadd */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsqadd_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_usqaddv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsqadd_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_usqaddv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsqadd_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_usqaddv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsqadd_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_usqadddi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsqaddq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_usqaddv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsqaddq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usqaddv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsqaddq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usqaddv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsqaddq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usqaddv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vsqaddb_u8 (uint8x1_t __a, int8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_usqaddqi ((int8x1_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vsqaddh_u16 (uint16x1_t __a, int16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_usqaddhi ((int16x1_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vsqadds_u32 (uint32x1_t __a, int32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_usqaddsi ((int32x1_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsqaddd_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_usqadddi ((int64x1_t) __a, __b); ++} ++ ++/* vsqrt */ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vsqrt_f32 (float32x2_t a) ++{ ++ return __builtin_aarch64_sqrtv2sf (a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vsqrtq_f32 (float32x4_t a) ++{ ++ return __builtin_aarch64_sqrtv4sf (a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vsqrtq_f64 (float64x2_t a) ++{ ++ return __builtin_aarch64_sqrtv2df (a); ++} ++ ++/* vsra */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsra_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) ++{ ++ return (int8x8_t) __builtin_aarch64_ssra_nv8qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsra_n_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return (int16x4_t) __builtin_aarch64_ssra_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsra_n_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return (int32x2_t) __builtin_aarch64_ssra_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsra_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssra_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsra_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c) ++{ ++ return (uint8x8_t) __builtin_aarch64_usra_nv8qi ((int8x8_t) __a, ++ (int8x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsra_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c) ++{ ++ return (uint16x4_t) __builtin_aarch64_usra_nv4hi ((int16x4_t) __a, ++ (int16x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsra_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c) ++{ ++ return (uint32x2_t) __builtin_aarch64_usra_nv2si ((int32x2_t) __a, ++ (int32x2_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsra_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usra_ndi ((int64x1_t) __a, ++ (int64x1_t) __b, __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsraq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) ++{ ++ return (int8x16_t) __builtin_aarch64_ssra_nv16qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsraq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return (int16x8_t) __builtin_aarch64_ssra_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsraq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return (int32x4_t) __builtin_aarch64_ssra_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsraq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c) ++{ ++ return (int64x2_t) __builtin_aarch64_ssra_nv2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsraq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_usra_nv16qi ((int8x16_t) __a, ++ (int8x16_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsraq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_usra_nv8hi ((int16x8_t) __a, ++ (int16x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsraq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_usra_nv4si ((int32x4_t) __a, ++ (int32x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsraq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c) ++{ ++ return (uint64x2_t) __builtin_aarch64_usra_nv2di ((int64x2_t) __a, ++ (int64x2_t) __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsrad_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssra_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsrad_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usra_ndi (__a, __b, __c); ++} ++ ++/* vsri */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsri_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) ++{ ++ return (int8x8_t) __builtin_aarch64_ssri_nv8qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsri_n_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return (int16x4_t) __builtin_aarch64_ssri_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsri_n_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return (int32x2_t) __builtin_aarch64_ssri_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsri_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssri_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsri_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c) ++{ ++ return (uint8x8_t) __builtin_aarch64_usri_nv8qi ((int8x8_t) __a, ++ (int8x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsri_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c) ++{ ++ return (uint16x4_t) __builtin_aarch64_usri_nv4hi ((int16x4_t) __a, ++ (int16x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsri_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c) ++{ ++ return (uint32x2_t) __builtin_aarch64_usri_nv2si ((int32x2_t) __a, ++ (int32x2_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsri_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usri_ndi ((int64x1_t) __a, ++ (int64x1_t) __b, __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsriq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) ++{ ++ return (int8x16_t) __builtin_aarch64_ssri_nv16qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsriq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return (int16x8_t) __builtin_aarch64_ssri_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsriq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return (int32x4_t) __builtin_aarch64_ssri_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsriq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c) ++{ ++ return (int64x2_t) __builtin_aarch64_ssri_nv2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsriq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_usri_nv16qi ((int8x16_t) __a, ++ (int8x16_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsriq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_usri_nv8hi ((int16x8_t) __a, ++ (int16x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsriq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_usri_nv4si ((int32x4_t) __a, ++ (int32x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsriq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c) ++{ ++ return (uint64x2_t) __builtin_aarch64_usri_nv2di ((int64x2_t) __a, ++ (int64x2_t) __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsrid_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssri_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsrid_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usri_ndi (__a, __b, __c); ++} ++ ++/* vstn */ ++ ++__extension__ static __inline void ++vst2_s64 (int64_t * __a, int64x1x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ int64x2x2_t temp; ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1); ++ __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst2_u64 (uint64_t * __a, uint64x1x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ uint64x2x2_t temp; ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1); ++ __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst2_f64 (float64_t * __a, float64x1x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ float64x2x2_t temp; ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[1], 1); ++ __builtin_aarch64_st2df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst2_s8 (int8_t * __a, int8x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_p8 (poly8_t * __a, poly8x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_s16 (int16_t * __a, int16x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ int16x8x2_t temp; ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_p16 (poly16_t * __a, poly16x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ poly16x8x2_t temp; ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_s32 (int32_t * __a, int32x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ int32x4x2_t temp; ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1); ++ __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_u8 (uint8_t * __a, uint8x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_u16 (uint16_t * __a, uint16x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ uint16x8x2_t temp; ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_u32 (uint32_t * __a, uint32x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ uint32x4x2_t temp; ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1); ++ __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_f32 (float32_t * __a, float32x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ float32x4x2_t temp; ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[1], 1); ++ __builtin_aarch64_st2v2sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_s8 (int8_t * __a, int8x16x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_p8 (poly8_t * __a, poly8x16x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_s16 (int16_t * __a, int16x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_p16 (poly16_t * __a, poly16x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_s32 (int32_t * __a, int32x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[1], 1); ++ __builtin_aarch64_st2v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_s64 (int64_t * __a, int64x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[1], 1); ++ __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_u8 (uint8_t * __a, uint8x16x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_u16 (uint16_t * __a, uint16x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_u32 (uint32_t * __a, uint32x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[1], 1); ++ __builtin_aarch64_st2v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_u64 (uint64_t * __a, uint64x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[1], 1); ++ __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_f32 (float32_t * __a, float32x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) val.val[1], 1); ++ __builtin_aarch64_st2v4sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_f64 (float64_t * __a, float64x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) val.val[1], 1); ++ __builtin_aarch64_st2v2df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst3_s64 (int64_t * __a, int64x1x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ int64x2x3_t temp; ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); ++ temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2); ++ __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst3_u64 (uint64_t * __a, uint64x1x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ uint64x2x3_t temp; ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); ++ temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2); ++ __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst3_f64 (float64_t * __a, float64x1x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ float64x2x3_t temp; ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); ++ temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[2], 2); ++ __builtin_aarch64_st3df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst3_s8 (int8_t * __a, int8x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ int8x16x3_t temp; ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); ++ temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_p8 (poly8_t * __a, poly8x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ poly8x16x3_t temp; ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); ++ temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_s16 (int16_t * __a, int16x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ int16x8x3_t temp; ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); ++ temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_p16 (poly16_t * __a, poly16x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ poly16x8x3_t temp; ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); ++ temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_s32 (int32_t * __a, int32x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ int32x4x3_t temp; ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); ++ temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2); ++ __builtin_aarch64_st3v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_u8 (uint8_t * __a, uint8x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ uint8x16x3_t temp; ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); ++ temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_u16 (uint16_t * __a, uint16x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ uint16x8x3_t temp; ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); ++ temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_u32 (uint32_t * __a, uint32x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ uint32x4x3_t temp; ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); ++ temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2); ++ __builtin_aarch64_st3v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_f32 (float32_t * __a, float32x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ float32x4x3_t temp; ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); ++ temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[2], 2); ++ __builtin_aarch64_st3v2sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_s8 (int8_t * __a, int8x16x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2); ++ __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_p8 (poly8_t * __a, poly8x16x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2); ++ __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_s16 (int16_t * __a, int16x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2); ++ __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_p16 (poly16_t * __a, poly16x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2); ++ __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_s32 (int32_t * __a, int32x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[2], 2); ++ __builtin_aarch64_st3v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_s64 (int64_t * __a, int64x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[2], 2); ++ __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_u8 (uint8_t * __a, uint8x16x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2); ++ __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_u16 (uint16_t * __a, uint16x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2); ++ __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_u32 (uint32_t * __a, uint32x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[2], 2); ++ __builtin_aarch64_st3v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_u64 (uint64_t * __a, uint64x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[2], 2); ++ __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_f32 (float32_t * __a, float32x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[2], 2); ++ __builtin_aarch64_st3v4sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_f64 (float64_t * __a, float64x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[2], 2); ++ __builtin_aarch64_st3v2df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst4_s64 (int64_t * __a, int64x1x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ int64x2x4_t temp; ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); ++ temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (INT64_C (0))); ++ temp.val[3] = vcombine_s64 (val.val[3], vcreate_s64 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[3], 3); ++ __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst4_u64 (uint64_t * __a, uint64x1x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ uint64x2x4_t temp; ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); ++ temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (UINT64_C (0))); ++ temp.val[3] = vcombine_u64 (val.val[3], vcreate_u64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[3], 3); ++ __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst4_f64 (float64_t * __a, float64x1x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ float64x2x4_t temp; ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); ++ temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (UINT64_C (0))); ++ temp.val[3] = vcombine_f64 (val.val[3], vcreate_f64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[3], 3); ++ __builtin_aarch64_st4df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst4_s8 (int8_t * __a, int8x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ int8x16x4_t temp; ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); ++ temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (INT64_C (0))); ++ temp.val[3] = vcombine_s8 (val.val[3], vcreate_s8 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3); ++ __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_p8 (poly8_t * __a, poly8x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ poly8x16x4_t temp; ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); ++ temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (UINT64_C (0))); ++ temp.val[3] = vcombine_p8 (val.val[3], vcreate_p8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3); ++ __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_s16 (int16_t * __a, int16x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ int16x8x4_t temp; ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); ++ temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (INT64_C (0))); ++ temp.val[3] = vcombine_s16 (val.val[3], vcreate_s16 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3); ++ __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_p16 (poly16_t * __a, poly16x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ poly16x8x4_t temp; ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); ++ temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (UINT64_C (0))); ++ temp.val[3] = vcombine_p16 (val.val[3], vcreate_p16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3); ++ __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_s32 (int32_t * __a, int32x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ int32x4x4_t temp; ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); ++ temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (INT64_C (0))); ++ temp.val[3] = vcombine_s32 (val.val[3], vcreate_s32 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[3], 3); ++ __builtin_aarch64_st4v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_u8 (uint8_t * __a, uint8x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ uint8x16x4_t temp; ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); ++ temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (UINT64_C (0))); ++ temp.val[3] = vcombine_u8 (val.val[3], vcreate_u8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3); ++ __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_u16 (uint16_t * __a, uint16x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ uint16x8x4_t temp; ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); ++ temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (UINT64_C (0))); ++ temp.val[3] = vcombine_u16 (val.val[3], vcreate_u16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3); ++ __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_u32 (uint32_t * __a, uint32x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ uint32x4x4_t temp; ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); ++ temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (UINT64_C (0))); ++ temp.val[3] = vcombine_u32 (val.val[3], vcreate_u32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[3], 3); ++ __builtin_aarch64_st4v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_f32 (float32_t * __a, float32x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ float32x4x4_t temp; ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); ++ temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (UINT64_C (0))); ++ temp.val[3] = vcombine_f32 (val.val[3], vcreate_f32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[3], 3); ++ __builtin_aarch64_st4v2sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_s8 (int8_t * __a, int8x16x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3); ++ __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_p8 (poly8_t * __a, poly8x16x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3); ++ __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_s16 (int16_t * __a, int16x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3); ++ __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_p16 (poly16_t * __a, poly16x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3); ++ __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_s32 (int32_t * __a, int32x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[3], 3); ++ __builtin_aarch64_st4v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_s64 (int64_t * __a, int64x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[3], 3); ++ __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_u8 (uint8_t * __a, uint8x16x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3); ++ __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_u16 (uint16_t * __a, uint16x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3); ++ __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_u32 (uint32_t * __a, uint32x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[3], 3); ++ __builtin_aarch64_st4v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_u64 (uint64_t * __a, uint64x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[3], 3); ++ __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_f32 (float32_t * __a, float32x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[3], 3); ++ __builtin_aarch64_st4v4sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_f64 (float64_t * __a, float64x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[3], 3); ++ __builtin_aarch64_st4v2df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++/* vsub */ ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsubd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsubd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a - __b; ++} ++ ++/* vtrn */ ++ ++__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__)) ++vtrn_f32 (float32x2_t a, float32x2_t b) ++{ ++ return (float32x2x2_t) {vtrn1_f32 (a, b), vtrn2_f32 (a, b)}; ++} ++ ++__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__)) ++vtrn_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ return (poly8x8x2_t) {vtrn1_p8 (a, b), vtrn2_p8 (a, b)}; ++} ++ ++__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__)) ++vtrn_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ return (poly16x4x2_t) {vtrn1_p16 (a, b), vtrn2_p16 (a, b)}; ++} ++ ++__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__)) ++vtrn_s8 (int8x8_t a, int8x8_t b) ++{ ++ return (int8x8x2_t) {vtrn1_s8 (a, b), vtrn2_s8 (a, b)}; ++} ++ ++__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__)) ++vtrn_s16 (int16x4_t a, int16x4_t b) ++{ ++ return (int16x4x2_t) {vtrn1_s16 (a, b), vtrn2_s16 (a, b)}; ++} ++ ++__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__)) ++vtrn_s32 (int32x2_t a, int32x2_t b) ++{ ++ return (int32x2x2_t) {vtrn1_s32 (a, b), vtrn2_s32 (a, b)}; ++} ++ ++__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__)) ++vtrn_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ return (uint8x8x2_t) {vtrn1_u8 (a, b), vtrn2_u8 (a, b)}; ++} ++ ++__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__)) ++vtrn_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ return (uint16x4x2_t) {vtrn1_u16 (a, b), vtrn2_u16 (a, b)}; ++} ++ ++__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__)) ++vtrn_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ return (uint32x2x2_t) {vtrn1_u32 (a, b), vtrn2_u32 (a, b)}; ++} ++ ++__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__)) ++vtrnq_f32 (float32x4_t a, float32x4_t b) ++{ ++ return (float32x4x2_t) {vtrn1q_f32 (a, b), vtrn2q_f32 (a, b)}; ++} ++ ++__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__)) ++vtrnq_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ return (poly8x16x2_t) {vtrn1q_p8 (a, b), vtrn2q_p8 (a, b)}; ++} ++ ++__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__)) ++vtrnq_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ return (poly16x8x2_t) {vtrn1q_p16 (a, b), vtrn2q_p16 (a, b)}; ++} ++ ++__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__)) ++vtrnq_s8 (int8x16_t a, int8x16_t b) ++{ ++ return (int8x16x2_t) {vtrn1q_s8 (a, b), vtrn2q_s8 (a, b)}; ++} ++ ++__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__)) ++vtrnq_s16 (int16x8_t a, int16x8_t b) ++{ ++ return (int16x8x2_t) {vtrn1q_s16 (a, b), vtrn2q_s16 (a, b)}; ++} ++ ++__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__)) ++vtrnq_s32 (int32x4_t a, int32x4_t b) ++{ ++ return (int32x4x2_t) {vtrn1q_s32 (a, b), vtrn2q_s32 (a, b)}; ++} ++ ++__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__)) ++vtrnq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ return (uint8x16x2_t) {vtrn1q_u8 (a, b), vtrn2q_u8 (a, b)}; ++} ++ ++__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__)) ++vtrnq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ return (uint16x8x2_t) {vtrn1q_u16 (a, b), vtrn2q_u16 (a, b)}; ++} ++ ++__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__)) ++vtrnq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ return (uint32x4x2_t) {vtrn1q_u32 (a, b), vtrn2q_u32 (a, b)}; ++} ++ ++/* vtst */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtst_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmtstv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtst_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmtstv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vtst_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmtstv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtst_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmtstdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtst_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmtstv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtst_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmtstv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vtst_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmtstv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtst_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmtstdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtstq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmtstv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtstq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmtstv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vtstq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmtstv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vtstq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmtstv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtstq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmtstv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtstq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmtstv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vtstq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmtstv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vtstq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmtstv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtstd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmtstdi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtstd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmtstdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++/* vuqadd */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vuqadd_s8 (int8x8_t __a, uint8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_suqaddv8qi (__a, (int8x8_t) __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vuqadd_s16 (int16x4_t __a, uint16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_suqaddv4hi (__a, (int16x4_t) __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vuqadd_s32 (int32x2_t __a, uint32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_suqaddv2si (__a, (int32x2_t) __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vuqadd_s64 (int64x1_t __a, uint64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_suqadddi (__a, (int64x1_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vuqaddq_s8 (int8x16_t __a, uint8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_suqaddv16qi (__a, (int8x16_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vuqaddq_s16 (int16x8_t __a, uint16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_suqaddv8hi (__a, (int16x8_t) __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vuqaddq_s32 (int32x4_t __a, uint32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_suqaddv4si (__a, (int32x4_t) __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vuqaddq_s64 (int64x2_t __a, uint64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_suqaddv2di (__a, (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vuqaddb_s8 (int8x1_t __a, uint8x1_t __b) ++{ ++ return (int8x1_t) __builtin_aarch64_suqaddqi (__a, (int8x1_t) __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vuqaddh_s16 (int16x1_t __a, uint16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_suqaddhi (__a, (int16x1_t) __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vuqadds_s32 (int32x1_t __a, uint32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_suqaddsi (__a, (int32x1_t) __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vuqaddd_s64 (int64x1_t __a, uint64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_suqadddi (__a, (int64x1_t) __b); ++} ++ ++#define __DEFINTERLEAVE(op, rettype, intype, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ v ## op ## Q ## _ ## funcsuffix (intype a, intype b) \ ++ { \ ++ return (rettype) {v ## op ## 1 ## Q ## _ ## funcsuffix (a, b), \ ++ v ## op ## 2 ## Q ## _ ## funcsuffix (a, b)}; \ ++ } ++ ++#define __INTERLEAVE_LIST(op) \ ++ __DEFINTERLEAVE (op, float32x2x2_t, float32x2_t, f32,) \ ++ __DEFINTERLEAVE (op, poly8x8x2_t, poly8x8_t, p8,) \ ++ __DEFINTERLEAVE (op, poly16x4x2_t, poly16x4_t, p16,) \ ++ __DEFINTERLEAVE (op, int8x8x2_t, int8x8_t, s8,) \ ++ __DEFINTERLEAVE (op, int16x4x2_t, int16x4_t, s16,) \ ++ __DEFINTERLEAVE (op, int32x2x2_t, int32x2_t, s32,) \ ++ __DEFINTERLEAVE (op, uint8x8x2_t, uint8x8_t, u8,) \ ++ __DEFINTERLEAVE (op, uint16x4x2_t, uint16x4_t, u16,) \ ++ __DEFINTERLEAVE (op, uint32x2x2_t, uint32x2_t, u32,) \ ++ __DEFINTERLEAVE (op, float32x4x2_t, float32x4_t, f32, q) \ ++ __DEFINTERLEAVE (op, poly8x16x2_t, poly8x16_t, p8, q) \ ++ __DEFINTERLEAVE (op, poly16x8x2_t, poly16x8_t, p16, q) \ ++ __DEFINTERLEAVE (op, int8x16x2_t, int8x16_t, s8, q) \ ++ __DEFINTERLEAVE (op, int16x8x2_t, int16x8_t, s16, q) \ ++ __DEFINTERLEAVE (op, int32x4x2_t, int32x4_t, s32, q) \ ++ __DEFINTERLEAVE (op, uint8x16x2_t, uint8x16_t, u8, q) \ ++ __DEFINTERLEAVE (op, uint16x8x2_t, uint16x8_t, u16, q) \ ++ __DEFINTERLEAVE (op, uint32x4x2_t, uint32x4_t, u32, q) ++ ++/* vuzp */ ++ ++__INTERLEAVE_LIST (uzp) ++ ++/* vzip */ ++ ++__INTERLEAVE_LIST (zip) ++ ++#undef __INTERLEAVE_LIST ++#undef __DEFINTERLEAVE ++ ++/* End of optimal implementations in approved order. */ ++ ++#endif + +Property changes on: gcc/config/aarch64/arm_neon.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/t-aarch64-linux +=================================================================== +--- a/src/gcc/config/aarch64/t-aarch64-linux (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/t-aarch64-linux (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,22 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++LIB1ASMSRC = aarch64/lib1funcs.asm ++LIB1ASMFUNCS = _aarch64_sync_cache_range +Index: gcc/config/aarch64/aarch64.md +=================================================================== +--- a/src/gcc/config/aarch64/aarch64.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,2921 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; Register numbers ++(define_constants ++ [ ++ (R0_REGNUM 0) ++ (R1_REGNUM 1) ++ (R2_REGNUM 2) ++ (R3_REGNUM 3) ++ (R4_REGNUM 4) ++ (R5_REGNUM 5) ++ (R6_REGNUM 6) ++ (R7_REGNUM 7) ++ (R8_REGNUM 8) ++ (R9_REGNUM 9) ++ (R10_REGNUM 10) ++ (R11_REGNUM 11) ++ (R12_REGNUM 12) ++ (R13_REGNUM 13) ++ (R14_REGNUM 14) ++ (R15_REGNUM 15) ++ (R16_REGNUM 16) ++ (IP0_REGNUM 16) ++ (R17_REGNUM 17) ++ (IP1_REGNUM 17) ++ (R18_REGNUM 18) ++ (R19_REGNUM 19) ++ (R20_REGNUM 20) ++ (R21_REGNUM 21) ++ (R22_REGNUM 22) ++ (R23_REGNUM 23) ++ (R24_REGNUM 24) ++ (R25_REGNUM 25) ++ (R26_REGNUM 26) ++ (R27_REGNUM 27) ++ (R28_REGNUM 28) ++ (R29_REGNUM 29) ++ (R30_REGNUM 30) ++ (LR_REGNUM 30) ++ (SP_REGNUM 31) ++ (V0_REGNUM 32) ++ (V15_REGNUM 47) ++ (V31_REGNUM 63) ++ (SFP_REGNUM 64) ++ (AP_REGNUM 65) ++ (CC_REGNUM 66) ++ ] ++) ++ ++(define_c_enum "unspec" [ ++ UNSPEC_CASESI ++ UNSPEC_CLS ++ UNSPEC_FRINTA ++ UNSPEC_FRINTI ++ UNSPEC_FRINTM ++ UNSPEC_FRINTP ++ UNSPEC_FRINTX ++ UNSPEC_FRINTZ ++ UNSPEC_GOTSMALLPIC ++ UNSPEC_GOTSMALLTLS ++ UNSPEC_LD2 ++ UNSPEC_LD3 ++ UNSPEC_LD4 ++ UNSPEC_MB ++ UNSPEC_NOP ++ UNSPEC_PRLG_STK ++ UNSPEC_RBIT ++ UNSPEC_ST2 ++ UNSPEC_ST3 ++ UNSPEC_ST4 ++ UNSPEC_TLS ++ UNSPEC_TLSDESC ++ UNSPEC_VSTRUCTDUMMY ++]) ++ ++(define_c_enum "unspecv" [ ++ UNSPECV_EH_RETURN ; Represent EH_RETURN ++ ] ++) ++ ++;; If further include files are added the defintion of MD_INCLUDES ++;; must be updated. ++ ++(include "constraints.md") ++(include "predicates.md") ++(include "iterators.md") ++ ++;; ------------------------------------------------------------------- ++;; Synchronization Builtins ++;; ------------------------------------------------------------------- ++ ++;; The following sync_* attributes are applied to sychronization ++;; instruction patterns to control the way in which the ++;; synchronization loop is expanded. ++;; All instruction patterns that call aarch64_output_sync_insn () ++;; should define these attributes. Refer to the comment above ++;; aarch64.c:aarch64_output_sync_loop () for more detail on the use of ++;; these attributes. ++ ++;; Attribute specifies the operand number which contains the ++;; result of a synchronization operation. The result is the old value ++;; loaded from SYNC_MEMORY. ++(define_attr "sync_result" "none,0,1,2,3,4,5" (const_string "none")) ++ ++;; Attribute specifies the operand number which contains the memory ++;; address to which the synchronization operation is being applied. ++(define_attr "sync_memory" "none,0,1,2,3,4,5" (const_string "none")) ++ ++;; Attribute specifies the operand number which contains the required ++;; old value expected in the memory location. This attribute may be ++;; none if no required value test should be performed in the expanded ++;; code. ++(define_attr "sync_required_value" "none,0,1,2,3,4,5" (const_string "none")) ++ ++;; Attribute specifies the operand number of the new value to be stored ++;; into the memory location identitifed by the sync_memory attribute. ++(define_attr "sync_new_value" "none,0,1,2,3,4,5" (const_string "none")) ++ ++;; Attribute specifies the operand number of a temporary register ++;; which can be clobbered by the synchronization instruction sequence. ++;; The register provided byn SYNC_T1 may be the same as SYNC_RESULT is ++;; which case the result value will be clobbered and not available ++;; after the synchronization loop exits. ++(define_attr "sync_t1" "none,0,1,2,3,4,5" (const_string "none")) ++ ++;; Attribute specifies the operand number of a temporary register ++;; which can be clobbered by the synchronization instruction sequence. ++;; This register is used to collect the result of a store exclusive ++;; instruction. ++(define_attr "sync_t2" "none,0,1,2,3,4,5" (const_string "none")) ++ ++;; Attribute that specifies whether or not the emitted synchronization ++;; loop must contain a release barrier. ++(define_attr "sync_release_barrier" "yes,no" (const_string "yes")) ++ ++;; Attribute that specifies the operation that the synchronization ++;; loop should apply to the old and new values to generate the value ++;; written back to memory. ++(define_attr "sync_op" "none,add,sub,ior,xor,and,nand" ++ (const_string "none")) ++ ++;; ------------------------------------------------------------------- ++;; Instruction types and attributes ++;; ------------------------------------------------------------------- ++ ++;; Main data types used by the insntructions ++ ++(define_attr "mode" "unknown,none,QI,HI,SI,DI,TI,SF,DF,TF" ++ (const_string "unknown")) ++ ++(define_attr "mode2" "unknown,none,QI,HI,SI,DI,TI,SF,DF,TF" ++ (const_string "unknown")) ++ ++; The "v8type" attribute is used to for fine grained classification of ++; AArch64 instructions. This table briefly explains the meaning of each type. ++ ++; adc add/subtract with carry. ++; adcs add/subtract with carry (setting condition flags). ++; adr calculate address. ++; alu simple alu instruction (no memory or fp regs access). ++; alu_ext simple alu instruction (sign/zero-extended register). ++; alu_shift simple alu instruction, with a source operand shifted by a constant. ++; alus simple alu instruction (setting condition flags). ++; alus_ext simple alu instruction (sign/zero-extended register, setting condition flags). ++; alus_shift simple alu instruction, with a source operand shifted by a constant (setting condition flags). ++; bfm bitfield move operation. ++; branch branch. ++; call subroutine call. ++; ccmp conditional compare. ++; clz count leading zeros/sign bits. ++; csel conditional select. ++; dmb data memory barrier. ++; extend sign/zero-extend (specialised bitfield move). ++; extr extract register-sized bitfield encoding. ++; fpsimd_load load single floating point / simd scalar register from memory. ++; fpsimd_load2 load pair of floating point / simd scalar registers from memory. ++; fpsimd_store store single floating point / simd scalar register to memory. ++; fpsimd_store2 store pair floating point / simd scalar registers to memory. ++; fadd floating point add/sub. ++; fccmp floating point conditional compare. ++; fcmp floating point comparison. ++; fconst floating point load immediate. ++; fcsel floating point conditional select. ++; fcvt floating point convert (float to float). ++; fcvtf2i floating point convert (float to integer). ++; fcvti2f floating point convert (integer to float). ++; fdiv floating point division operation. ++; ffarith floating point abs, neg or cpy. ++; fmadd floating point multiply-add/sub. ++; fminmax floating point min/max. ++; fmov floating point move (float to float). ++; fmovf2i floating point move (float to integer). ++; fmovi2f floating point move (integer to float). ++; fmul floating point multiply. ++; frint floating point round to integral. ++; fsqrt floating point square root. ++; load_acq load-acquire. ++; load load single general register from memory ++; load2 load pair of general registers from memory ++; logic logical operation (register). ++; logic_imm and/or/xor operation (immediate). ++; logic_shift logical operation with shift. ++; logics logical operation (register, setting condition flags). ++; logics_imm and/or/xor operation (immediate, setting condition flags). ++; logics_shift logical operation with shift (setting condition flags). ++; madd integer multiply-add/sub. ++; maddl widening integer multiply-add/sub. ++; misc miscellaneous - any type that doesn't fit into the rest. ++; move integer move operation. ++; move2 double integer move operation. ++; movk move 16-bit immediate with keep. ++; movz move 16-bit immmediate with zero/one. ++; mrs system/special register move. ++; mulh 64x64 to 128-bit multiply (high part). ++; mull widening multiply. ++; mult integer multiply instruction. ++; prefetch memory prefetch. ++; rbit reverse bits. ++; rev reverse bytes. ++; sdiv integer division operation (signed). ++; shift variable shift operation. ++; shift_imm immediate shift operation (specialised bitfield move). ++; store_rel store-release. ++; store store single general register to memory. ++; store2 store pair of general registers to memory. ++; udiv integer division operation (unsigned). ++ ++(define_attr "v8type" ++ "adc,\ ++ adcs,\ ++ adr,\ ++ alu,\ ++ alu_ext,\ ++ alu_shift,\ ++ alus,\ ++ alus_ext,\ ++ alus_shift,\ ++ bfm,\ ++ branch,\ ++ call,\ ++ ccmp,\ ++ clz,\ ++ csel,\ ++ dmb,\ ++ div,\ ++ div64,\ ++ extend,\ ++ extr,\ ++ fpsimd_load,\ ++ fpsimd_load2,\ ++ fpsimd_store2,\ ++ fpsimd_store,\ ++ fadd,\ ++ fccmp,\ ++ fcvt,\ ++ fcvtf2i,\ ++ fcvti2f,\ ++ fcmp,\ ++ fconst,\ ++ fcsel,\ ++ fdiv,\ ++ ffarith,\ ++ fmadd,\ ++ fminmax,\ ++ fmov,\ ++ fmovf2i,\ ++ fmovi2f,\ ++ fmul,\ ++ frint,\ ++ fsqrt,\ ++ load_acq,\ ++ load1,\ ++ load2,\ ++ logic,\ ++ logic_imm,\ ++ logic_shift,\ ++ logics,\ ++ logics_imm,\ ++ logics_shift,\ ++ madd,\ ++ maddl,\ ++ misc,\ ++ move,\ ++ move2,\ ++ movk,\ ++ movz,\ ++ mrs,\ ++ mulh,\ ++ mull,\ ++ mult,\ ++ prefetch,\ ++ rbit,\ ++ rev,\ ++ sdiv,\ ++ shift,\ ++ shift_imm,\ ++ store_rel,\ ++ store1,\ ++ store2,\ ++ udiv" ++ (const_string "alu")) ++ ++ ++; The "type" attribute is used by the AArch32 backend. Below is a mapping ++; from "v8type" to "type". ++ ++(define_attr "type" ++ "alu,alu_shift,block,branch,call,f_2_r,f_cvt,f_flag,f_loads, ++ f_loadd,f_stored,f_stores,faddd,fadds,fcmpd,fcmps,fconstd,fconsts, ++ fcpys,fdivd,fdivs,ffarithd,ffariths,fmacd,fmacs,fmuld,fmuls,load_byte, ++ load1,load2,mult,r_2_f,store1,store2" ++ (cond [ ++ (eq_attr "v8type" "alu_shift,alus_shift,logic_shift,logics_shift") (const_string "alu_shift") ++ (eq_attr "v8type" "branch") (const_string "branch") ++ (eq_attr "v8type" "call") (const_string "call") ++ (eq_attr "v8type" "fmovf2i") (const_string "f_2_r") ++ (eq_attr "v8type" "fcvt,fcvtf2i,fcvti2f") (const_string "f_cvt") ++ (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "SF")) (const_string "f_loads") ++ (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "DF")) (const_string "f_loadd") ++ (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "SF")) (const_string "f_stores") ++ (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "DF")) (const_string "f_stored") ++ (and (eq_attr "v8type" "fadd,fminmax") (eq_attr "mode" "DF")) (const_string "faddd") ++ (and (eq_attr "v8type" "fadd,fminmax") (eq_attr "mode" "SF")) (const_string "fadds") ++ (and (eq_attr "v8type" "fcmp,fccmp") (eq_attr "mode" "DF")) (const_string "fcmpd") ++ (and (eq_attr "v8type" "fcmp,fccmp") (eq_attr "mode" "SF")) (const_string "fcmps") ++ (and (eq_attr "v8type" "fconst") (eq_attr "mode" "DF")) (const_string "fconstd") ++ (and (eq_attr "v8type" "fconst") (eq_attr "mode" "SF")) (const_string "fconsts") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF")) (const_string "fdivd") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF")) (const_string "fdivs") ++ (and (eq_attr "v8type" "ffarith") (eq_attr "mode" "DF")) (const_string "ffarithd") ++ (and (eq_attr "v8type" "ffarith") (eq_attr "mode" "SF")) (const_string "ffariths") ++ (and (eq_attr "v8type" "fmadd") (eq_attr "mode" "DF")) (const_string "fmacd") ++ (and (eq_attr "v8type" "fmadd") (eq_attr "mode" "SF")) (const_string "fmacs") ++ (and (eq_attr "v8type" "fmul") (eq_attr "mode" "DF")) (const_string "fmuld") ++ (and (eq_attr "v8type" "fmul") (eq_attr "mode" "SF")) (const_string "fmuls") ++ (and (eq_attr "v8type" "load1") (eq_attr "mode" "QI,HI")) (const_string "load_byte") ++ (and (eq_attr "v8type" "load1") (eq_attr "mode" "SI,DI,TI")) (const_string "load1") ++ (eq_attr "v8type" "load2") (const_string "load2") ++ (and (eq_attr "v8type" "mulh,mult,mull,madd,sdiv,udiv") (eq_attr "mode" "SI")) (const_string "mult") ++ (eq_attr "v8type" "fmovi2f") (const_string "r_2_f") ++ (eq_attr "v8type" "store1") (const_string "store1") ++ (eq_attr "v8type" "store2") (const_string "store2") ++ ] ++ (const_string "alu"))) ++ ++;; Attribute that specifies whether or not the instruction touches fp ++;; registers. ++(define_attr "fp" "no,yes" (const_string "no")) ++ ++;; Attribute that specifies whether or not the instruction touches simd ++;; registers. ++(define_attr "simd" "no,yes" (const_string "no")) ++ ++(define_attr "length" "" ++ (cond [(not (eq_attr "sync_memory" "none")) ++ (symbol_ref "aarch64_sync_loop_insns (insn, operands) * 4") ++ ] (const_int 4))) ++ ++;; Attribute that controls whether an alternative is enabled or not. ++;; Currently it is only used to disable alternatives which touch fp or simd ++;; registers when -mgeneral-regs-only is specified. ++(define_attr "enabled" "no,yes" ++ (cond [(ior ++ (and (eq_attr "fp" "yes") ++ (eq (symbol_ref "TARGET_FLOAT") (const_int 0))) ++ (and (eq_attr "simd" "yes") ++ (eq (symbol_ref "TARGET_SIMD") (const_int 0)))) ++ (const_string "no") ++ ] (const_string "yes"))) ++ ++;; ------------------------------------------------------------------- ++;; Pipeline descriptions and scheduling ++;; ------------------------------------------------------------------- ++ ++;; Processor types. ++(include "aarch64-tune.md") ++ ++;; Scheduling ++(include "aarch64-generic.md") ++(include "large.md") ++(include "small.md") ++ ++;; ------------------------------------------------------------------- ++;; Jumps and other miscellaneous insns ++;; ------------------------------------------------------------------- ++ ++(define_insn "indirect_jump" ++ [(set (pc) (match_operand:DI 0 "register_operand" "r"))] ++ "" ++ "br\\t%0" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_insn "jump" ++ [(set (pc) (label_ref (match_operand 0 "" "")))] ++ "" ++ "b\\t%l0" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_expand "cbranch4" ++ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator" ++ [(match_operand:GPI 1 "register_operand" "") ++ (match_operand:GPI 2 "aarch64_plus_operand" "")]) ++ (label_ref (match_operand 3 "" "")) ++ (pc)))] ++ "" ++ " ++ operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1], ++ operands[2]); ++ operands[2] = const0_rtx; ++ " ++) ++ ++(define_expand "cbranch4" ++ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator" ++ [(match_operand:GPF 1 "register_operand" "") ++ (match_operand:GPF 2 "aarch64_reg_or_zero" "")]) ++ (label_ref (match_operand 3 "" "")) ++ (pc)))] ++ "" ++ " ++ operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1], ++ operands[2]); ++ operands[2] = const0_rtx; ++ " ++) ++ ++(define_insn "*condjump" ++ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator" ++ [(match_operand 1 "cc_register" "") (const_int 0)]) ++ (label_ref (match_operand 2 "" "")) ++ (pc)))] ++ "" ++ "b%m0\\t%l2" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_expand "casesi" ++ [(match_operand:SI 0 "register_operand" "") ; Index ++ (match_operand:SI 1 "const_int_operand" "") ; Lower bound ++ (match_operand:SI 2 "const_int_operand" "") ; Total range ++ (match_operand:DI 3 "" "") ; Table label ++ (match_operand:DI 4 "" "")] ; Out of range label ++ "" ++ { ++ if (operands[1] != const0_rtx) ++ { ++ rtx reg = gen_reg_rtx (SImode); ++ ++ /* Canonical RTL says that if you have: ++ ++ (minus (X) (CONST)) ++ ++ then this should be emitted as: ++ ++ (plus (X) (-CONST)) ++ ++ The use of trunc_int_for_mode ensures that the resulting ++ constant can be represented in SImode, this is important ++ for the corner case where operand[1] is INT_MIN. */ ++ ++ operands[1] = GEN_INT (trunc_int_for_mode (-INTVAL (operands[1]), SImode)); ++ ++ if (!(*insn_data[CODE_FOR_addsi3].operand[2].predicate) ++ (operands[1], SImode)) ++ operands[1] = force_reg (SImode, operands[1]); ++ emit_insn (gen_addsi3 (reg, operands[0], operands[1])); ++ operands[0] = reg; ++ } ++ ++ if (!aarch64_plus_operand (operands[2], SImode)) ++ operands[2] = force_reg (SImode, operands[2]); ++ emit_jump_insn (gen_cbranchsi4 (gen_rtx_GTU (SImode, const0_rtx, ++ const0_rtx), ++ operands[0], operands[2], operands[4])); ++ ++ operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (VOIDmode, operands[3])); ++ emit_jump_insn (gen_casesi_dispatch (operands[2], operands[0], ++ operands[3])); ++ DONE; ++ } ++) ++ ++(define_insn "casesi_dispatch" ++ [(parallel ++ [(set (pc) ++ (mem:DI (unspec [(match_operand:DI 0 "register_operand" "r") ++ (match_operand:SI 1 "register_operand" "r")] ++ UNSPEC_CASESI))) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:DI 3 "=r")) ++ (clobber (match_scratch:DI 4 "=r")) ++ (use (label_ref (match_operand 2 "" "")))])] ++ "" ++ "* ++ return aarch64_output_casesi (operands); ++ " ++ [(set_attr "length" "16") ++ (set_attr "v8type" "branch")] ++) ++ ++(define_insn "nop" ++ [(unspec[(const_int 0)] UNSPEC_NOP)] ++ "" ++ "nop" ++ [(set_attr "v8type" "misc")] ++) ++ ++(define_expand "prologue" ++ [(clobber (const_int 0))] ++ "" ++ " ++ aarch64_expand_prologue (); ++ DONE; ++ " ++) ++ ++(define_expand "epilogue" ++ [(clobber (const_int 0))] ++ "" ++ " ++ aarch64_expand_epilogue (false); ++ DONE; ++ " ++) ++ ++(define_expand "sibcall_epilogue" ++ [(clobber (const_int 0))] ++ "" ++ " ++ aarch64_expand_epilogue (true); ++ DONE; ++ " ++) ++ ++(define_insn "*do_return" ++ [(return)] ++ "" ++ "ret" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_insn "eh_return" ++ [(unspec_volatile [(match_operand:DI 0 "register_operand" "r")] ++ UNSPECV_EH_RETURN)] ++ "" ++ "#" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_split ++ [(unspec_volatile [(match_operand:DI 0 "register_operand" "")] ++ UNSPECV_EH_RETURN)] ++ "reload_completed" ++ [(set (match_dup 1) (match_dup 0))] ++ { ++ operands[1] = aarch64_final_eh_return_addr (); ++ } ++) ++ ++(define_insn "*cb1" ++ [(set (pc) (if_then_else (EQL (match_operand:GPI 0 "register_operand" "r") ++ (const_int 0)) ++ (label_ref (match_operand 1 "" "")) ++ (pc)))] ++ "" ++ "\\t%0, %l1" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_insn "*tb1" ++ [(set (pc) (if_then_else ++ (EQL (zero_extract:DI (match_operand:GPI 0 "register_operand" "r") ++ (const_int 1) ++ (match_operand 1 "const_int_operand" "n")) ++ (const_int 0)) ++ (label_ref (match_operand 2 "" "")) ++ (pc))) ++ (clobber (match_scratch:DI 3 "=r"))] ++ "" ++ "* ++ if (get_attr_length (insn) == 8) ++ return \"ubfx\\t%3, %0, %1, #1\;\\t%3, %l2\"; ++ return \"\\t%0, %1, %l2\"; ++ " ++ [(set_attr "v8type" "branch") ++ (set_attr "mode" "") ++ (set (attr "length") ++ (if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -32768)) ++ (lt (minus (match_dup 2) (pc)) (const_int 32764))) ++ (const_int 4) ++ (const_int 8)))] ++) ++ ++(define_insn "*cb1" ++ [(set (pc) (if_then_else (LTGE (match_operand:ALLI 0 "register_operand" "r") ++ (const_int 0)) ++ (label_ref (match_operand 1 "" "")) ++ (pc))) ++ (clobber (match_scratch:DI 2 "=r"))] ++ "" ++ "* ++ if (get_attr_length (insn) == 8) ++ return \"ubfx\\t%2, %0, , #1\;\\t%2, %l1\"; ++ return \"\\t%0, , %l1\"; ++ " ++ [(set_attr "v8type" "branch") ++ (set_attr "mode" "") ++ (set (attr "length") ++ (if_then_else (and (ge (minus (match_dup 1) (pc)) (const_int -32768)) ++ (lt (minus (match_dup 1) (pc)) (const_int 32764))) ++ (const_int 4) ++ (const_int 8)))] ++) ++ ++;; ------------------------------------------------------------------- ++;; Subroutine calls and sibcalls ++;; ------------------------------------------------------------------- ++ ++(define_expand "call" ++ [(parallel [(call (match_operand 0 "memory_operand" "") ++ (match_operand 1 "general_operand" "")) ++ (use (match_operand 2 "" "")) ++ (clobber (reg:DI LR_REGNUM))])] ++ "" ++ " ++ { ++ rtx callee; ++ ++ /* In an untyped call, we can get NULL for operand 2. */ ++ if (operands[2] == NULL) ++ operands[2] = const0_rtx; ++ ++ /* Decide if we should generate indirect calls by loading the ++ 64-bit address of the callee into a register before performing ++ the branch-and-link. */ ++ callee = XEXP (operands[0], 0); ++ if (GET_CODE (callee) == SYMBOL_REF ++ ? aarch64_is_long_call_p (callee) ++ : !REG_P (callee)) ++ XEXP (operands[0], 0) = force_reg (Pmode, callee); ++ }" ++) ++ ++(define_insn "*call_reg" ++ [(call (mem:DI (match_operand:DI 0 "register_operand" "r")) ++ (match_operand 1 "" "")) ++ (use (match_operand 2 "" "")) ++ (clobber (reg:DI LR_REGNUM))] ++ "" ++ "blr\\t%0" ++ [(set_attr "v8type" "call")] ++) ++ ++(define_insn "*call_symbol" ++ [(call (mem:DI (match_operand:DI 0 "" "")) ++ (match_operand 1 "" "")) ++ (use (match_operand 2 "" "")) ++ (clobber (reg:DI LR_REGNUM))] ++ "GET_CODE (operands[0]) == SYMBOL_REF ++ && !aarch64_is_long_call_p (operands[0])" ++ "bl\\t%a0" ++ [(set_attr "v8type" "call")] ++) ++ ++(define_expand "call_value" ++ [(parallel [(set (match_operand 0 "" "") ++ (call (match_operand 1 "memory_operand" "") ++ (match_operand 2 "general_operand" ""))) ++ (use (match_operand 3 "" "")) ++ (clobber (reg:DI LR_REGNUM))])] ++ "" ++ " ++ { ++ rtx callee; ++ ++ /* In an untyped call, we can get NULL for operand 3. */ ++ if (operands[3] == NULL) ++ operands[3] = const0_rtx; ++ ++ /* Decide if we should generate indirect calls by loading the ++ 64-bit address of the callee into a register before performing ++ the branch-and-link. */ ++ callee = XEXP (operands[1], 0); ++ if (GET_CODE (callee) == SYMBOL_REF ++ ? aarch64_is_long_call_p (callee) ++ : !REG_P (callee)) ++ XEXP (operands[1], 0) = force_reg (Pmode, callee); ++ }" ++) ++ ++(define_insn "*call_value_reg" ++ [(set (match_operand 0 "" "") ++ (call (mem:DI (match_operand:DI 1 "register_operand" "r")) ++ (match_operand 2 "" ""))) ++ (use (match_operand 3 "" "")) ++ (clobber (reg:DI LR_REGNUM))] ++ "" ++ "blr\\t%1" ++ [(set_attr "v8type" "call")] ++) ++ ++(define_insn "*call_value_symbol" ++ [(set (match_operand 0 "" "") ++ (call (mem:DI (match_operand:DI 1 "" "")) ++ (match_operand 2 "" ""))) ++ (use (match_operand 3 "" "")) ++ (clobber (reg:DI LR_REGNUM))] ++ "GET_CODE (operands[1]) == SYMBOL_REF ++ && !aarch64_is_long_call_p (operands[1])" ++ "bl\\t%a1" ++ [(set_attr "v8type" "call")] ++) ++ ++(define_expand "sibcall" ++ [(parallel [(call (match_operand 0 "memory_operand" "") ++ (match_operand 1 "general_operand" "")) ++ (return) ++ (use (match_operand 2 "" ""))])] ++ "" ++ { ++ if (operands[2] == NULL_RTX) ++ operands[2] = const0_rtx; ++ } ++) ++ ++(define_expand "sibcall_value" ++ [(parallel [(set (match_operand 0 "" "") ++ (call (match_operand 1 "memory_operand" "") ++ (match_operand 2 "general_operand" ""))) ++ (return) ++ (use (match_operand 3 "" ""))])] ++ "" ++ { ++ if (operands[3] == NULL_RTX) ++ operands[3] = const0_rtx; ++ } ++) ++ ++(define_insn "*sibcall_insn" ++ [(call (mem:DI (match_operand:DI 0 "" "X")) ++ (match_operand 1 "" "")) ++ (return) ++ (use (match_operand 2 "" ""))] ++ "GET_CODE (operands[0]) == SYMBOL_REF" ++ "b\\t%a0" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_insn "*sibcall_value_insn" ++ [(set (match_operand 0 "" "") ++ (call (mem:DI (match_operand 1 "" "X")) ++ (match_operand 2 "" ""))) ++ (return) ++ (use (match_operand 3 "" ""))] ++ "GET_CODE (operands[1]) == SYMBOL_REF" ++ "b\\t%a1" ++ [(set_attr "v8type" "branch")] ++) ++ ++;; Call subroutine returning any type. ++ ++(define_expand "untyped_call" ++ [(parallel [(call (match_operand 0 "") ++ (const_int 0)) ++ (match_operand 1 "") ++ (match_operand 2 "")])] ++ "" ++{ ++ int i; ++ ++ emit_call_insn (GEN_CALL (operands[0], const0_rtx, NULL, const0_rtx)); ++ ++ for (i = 0; i < XVECLEN (operands[2], 0); i++) ++ { ++ rtx set = XVECEXP (operands[2], 0, i); ++ emit_move_insn (SET_DEST (set), SET_SRC (set)); ++ } ++ ++ /* The optimizer does not know that the call sets the function value ++ registers we stored in the result block. We avoid problems by ++ claiming that all hard registers are used and clobbered at this ++ point. */ ++ emit_insn (gen_blockage ()); ++ DONE; ++}) ++ ++;; ------------------------------------------------------------------- ++;; Moves ++;; ------------------------------------------------------------------- ++ ++(define_expand "mov" ++ [(set (match_operand:SHORT 0 "nonimmediate_operand" "") ++ (match_operand:SHORT 1 "general_operand" ""))] ++ "" ++ " ++ if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx) ++ operands[1] = force_reg (mode, operands[1]); ++ " ++) ++ ++(define_insn "*mov_aarch64" ++ [(set (match_operand:SHORT 0 "nonimmediate_operand" "=r,r,r,m, r,*w") ++ (match_operand:SHORT 1 "general_operand" " r,M,m,rZ,*w,r"))] ++ "(register_operand (operands[0], mode) ++ || aarch64_reg_or_zero (operands[1], mode))" ++ "@ ++ mov\\t%w0, %w1 ++ mov\\t%w0, %1 ++ ldr\\t%w0, %1 ++ str\\t%w1, %0 ++ umov\\t%w0, %1.[0] ++ dup\\t%0., %w1" ++ [(set_attr "v8type" "move,alu,load1,store1,*,*") ++ (set_attr "simd_type" "*,*,*,*,simd_movgp,simd_dupgp") ++ (set_attr "mode" "") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "mov" ++ [(set (match_operand:GPI 0 "nonimmediate_operand" "") ++ (match_operand:GPI 1 "general_operand" ""))] ++ "" ++ " ++ if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx) ++ operands[1] = force_reg (mode, operands[1]); ++ ++ if (CONSTANT_P (operands[1])) ++ { ++ aarch64_expand_mov_immediate (operands[0], operands[1]); ++ DONE; ++ } ++ " ++) ++ ++(define_insn "*movsi_aarch64" ++ [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m, *w, r,*w") ++ (match_operand:SI 1 "aarch64_mov_operand" " r,M,m,rZ,rZ,*w,*w"))] ++ "(register_operand (operands[0], SImode) ++ || aarch64_reg_or_zero (operands[1], SImode))" ++ "@ ++ mov\\t%w0, %w1 ++ mov\\t%w0, %1 ++ ldr\\t%w0, %1 ++ str\\t%w1, %0 ++ fmov\\t%s0, %w1 ++ fmov\\t%w0, %s1 ++ fmov\\t%s0, %s1" ++ [(set_attr "v8type" "move,alu,load1,store1,fmov,fmov,fmov") ++ (set_attr "mode" "SI") ++ (set_attr "fp" "*,*,*,*,yes,yes,yes")] ++) ++ ++(define_insn "*movdi_aarch64" ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,m, r, r, *w, r,*w,w") ++ (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,m,rZ,Usa,Ush,rZ,*w,*w,Dd"))] ++ "(register_operand (operands[0], DImode) ++ || aarch64_reg_or_zero (operands[1], DImode))" ++ "@ ++ mov\\t%x0, %x1 ++ mov\\t%0, %x1 ++ mov\\t%x0, %1 ++ mov\\t%x0, %1 ++ ldr\\t%x0, %1 ++ str\\t%x1, %0 ++ adr\\t%x0, %a1 ++ adrp\\t%x0, %A1 ++ fmov\\t%d0, %x1 ++ fmov\\t%x0, %d1 ++ fmov\\t%d0, %d1 ++ movi\\t%d0, %1" ++ [(set_attr "v8type" "move,move,move,alu,load1,store1,adr,adr,fmov,fmov,fmov,fmov") ++ (set_attr "mode" "DI") ++ (set_attr "fp" "*,*,*,*,*,*,*,*,yes,yes,yes,yes")] ++) ++ ++(define_insn "insv_imm" ++ [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r") ++ (const_int 16) ++ (match_operand 1 "const_int_operand" "n")) ++ (match_operand 2 "const_int_operand" "n"))] ++ "INTVAL (operands[1]) < GET_MODE_BITSIZE (mode) ++ && INTVAL (operands[1]) % 16 == 0 ++ && INTVAL (operands[2]) <= 0xffff" ++ "movk\\t%0, %2, lsl %1" ++ [(set_attr "v8type" "movk") ++ (set_attr "mode" "")] ++) ++ ++(define_expand "movti" ++ [(set (match_operand:TI 0 "nonimmediate_operand" "") ++ (match_operand:TI 1 "general_operand" ""))] ++ "" ++ " ++ if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx) ++ operands[1] = force_reg (TImode, operands[1]); ++ " ++) ++ ++(define_insn "*movti_aarch64" ++ [(set (match_operand:TI 0 ++ "nonimmediate_operand" "=r, *w,r ,*w,r ,Ump,Ump,*w,m") ++ (match_operand:TI 1 ++ "aarch64_movti_operand" " rn,r ,*w,*w,Ump,r ,Z , m,*w"))] ++ "(register_operand (operands[0], TImode) ++ || aarch64_reg_or_zero (operands[1], TImode))" ++ "@ ++ # ++ # ++ # ++ orr\\t%0.16b, %1.16b, %1.16b ++ ldp\\t%0, %H0, %1 ++ stp\\t%1, %H1, %0 ++ stp\\txzr, xzr, %0 ++ ldr\\t%q0, %1 ++ str\\t%q1, %0" ++ [(set_attr "v8type" "move2,fmovi2f,fmovf2i,*, \ ++ load2,store2,store2,fpsimd_load,fpsimd_store") ++ (set_attr "simd_type" "*,*,*,simd_move,*,*,*,*,*") ++ (set_attr "mode" "DI,DI,DI,TI,DI,DI,DI,TI,TI") ++ (set_attr "length" "8,8,8,4,4,4,4,4,4") ++ (set_attr "fp" "*,*,*,*,*,*,*,yes,yes") ++ (set_attr "simd" "*,*,*,yes,*,*,*,*,*")]) ++ ++;; Split a TImode register-register or register-immediate move into ++;; its component DImode pieces, taking care to handle overlapping ++;; source and dest registers. ++(define_split ++ [(set (match_operand:TI 0 "register_operand" "") ++ (match_operand:TI 1 "aarch64_reg_or_imm" ""))] ++ "reload_completed" ++ [(const_int 0)] ++{ ++ aarch64_split_doubleword_move (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "mov" ++ [(set (match_operand:GPF 0 "nonimmediate_operand" "") ++ (match_operand:GPF 1 "general_operand" ""))] ++ "" ++ " ++ if (!TARGET_FLOAT) ++ { ++ sorry (\"%qs and floating point code\", \"-mgeneral-regs-only\"); ++ FAIL; ++ } ++ ++ if (GET_CODE (operands[0]) == MEM) ++ operands[1] = force_reg (mode, operands[1]); ++ " ++) ++ ++(define_insn "*movsf_aarch64" ++ [(set (match_operand:SF 0 "nonimmediate_operand" "= w,?r,w,w,m,r,m ,r") ++ (match_operand:SF 1 "general_operand" "?rY, w,w,m,w,m,rY,r"))] ++ "TARGET_FLOAT && (register_operand (operands[0], SFmode) ++ || register_operand (operands[1], SFmode))" ++ "@ ++ fmov\\t%s0, %w1 ++ fmov\\t%w0, %s1 ++ fmov\\t%s0, %s1 ++ ldr\\t%s0, %1 ++ str\\t%s1, %0 ++ ldr\\t%w0, %1 ++ str\\t%w1, %0 ++ mov\\t%w0, %w1" ++ [(set_attr "v8type" "fmovi2f,fmovf2i,fmov,fpsimd_load,fpsimd_store,fpsimd_load,fpsimd_store,fmov") ++ (set_attr "mode" "SF")] ++) ++ ++(define_insn "*movdf_aarch64" ++ [(set (match_operand:DF 0 "nonimmediate_operand" "= w,?r,w,w,m,r,m ,r") ++ (match_operand:DF 1 "general_operand" "?rY, w,w,m,w,m,rY,r"))] ++ "TARGET_FLOAT && (register_operand (operands[0], DFmode) ++ || register_operand (operands[1], DFmode))" ++ "@ ++ fmov\\t%d0, %x1 ++ fmov\\t%x0, %d1 ++ fmov\\t%d0, %d1 ++ ldr\\t%d0, %1 ++ str\\t%d1, %0 ++ ldr\\t%x0, %1 ++ str\\t%x1, %0 ++ mov\\t%x0, %x1" ++ [(set_attr "v8type" "fmovi2f,fmovf2i,fmov,fpsimd_load,fpsimd_store,fpsimd_load,fpsimd_store,move") ++ (set_attr "mode" "DF")] ++) ++ ++(define_expand "movtf" ++ [(set (match_operand:TF 0 "nonimmediate_operand" "") ++ (match_operand:TF 1 "general_operand" ""))] ++ "" ++ " ++ if (!TARGET_FLOAT) ++ { ++ sorry (\"%qs and floating point code\", \"-mgeneral-regs-only\"); ++ FAIL; ++ } ++ ++ if (GET_CODE (operands[0]) == MEM) ++ operands[1] = force_reg (TFmode, operands[1]); ++ " ++) ++ ++(define_insn "*movtf_aarch64" ++ [(set (match_operand:TF 0 ++ "nonimmediate_operand" "=w,?&r,w ,?r,w,?w,w,m,?r ,Ump") ++ (match_operand:TF 1 ++ "general_operand" " w,?r, ?r,w ,Y,Y ,m,w,Ump,?rY"))] ++ "TARGET_FLOAT && (register_operand (operands[0], TFmode) ++ || register_operand (operands[1], TFmode))" ++ "@ ++ orr\\t%0.16b, %1.16b, %1.16b ++ mov\\t%0, %1\;mov\\t%H0, %H1 ++ fmov\\t%d0, %Q1\;fmov\\t%0.d[1], %R1 ++ fmov\\t%Q0, %d1\;fmov\\t%R0, %1.d[1] ++ movi\\t%0.2d, #0 ++ fmov\\t%s0, wzr ++ ldr\\t%q0, %1 ++ str\\t%q1, %0 ++ ldp\\t%0, %H0, %1 ++ stp\\t%1, %H1, %0" ++ [(set_attr "v8type" "logic,move2,fmovi2f,fmovf2i,fconst,fconst,fpsimd_load,fpsimd_store,fpsimd_load2,fpsimd_store2") ++ (set_attr "mode" "DF,DF,DF,DF,DF,DF,TF,TF,DF,DF") ++ (set_attr "length" "4,8,8,8,4,4,4,4,4,4") ++ (set_attr "fp" "*,*,yes,yes,*,yes,yes,yes,*,*") ++ (set_attr "simd" "yes,*,*,*,yes,*,*,*,*,*")] ++) ++ ++ ++;; Operands 1 and 3 are tied together by the final condition; so we allow ++;; fairly lax checking on the second memory operation. ++(define_insn "load_pair" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (match_operand:GPI 1 "aarch64_mem_pair_operand" "Ump")) ++ (set (match_operand:GPI 2 "register_operand" "=r") ++ (match_operand:GPI 3 "memory_operand" "m"))] ++ "rtx_equal_p (XEXP (operands[3], 0), ++ plus_constant (XEXP (operands[1], 0), ++ GET_MODE_SIZE (mode)))" ++ "ldp\\t%0, %2, %1" ++ [(set_attr "v8type" "load2") ++ (set_attr "mode" "")] ++) ++ ++;; Operands 0 and 2 are tied together by the final condition; so we allow ++;; fairly lax checking on the second memory operation. ++(define_insn "store_pair" ++ [(set (match_operand:GPI 0 "aarch64_mem_pair_operand" "=Ump") ++ (match_operand:GPI 1 "register_operand" "r")) ++ (set (match_operand:GPI 2 "memory_operand" "=m") ++ (match_operand:GPI 3 "register_operand" "r"))] ++ "rtx_equal_p (XEXP (operands[2], 0), ++ plus_constant (XEXP (operands[0], 0), ++ GET_MODE_SIZE (mode)))" ++ "stp\\t%1, %3, %0" ++ [(set_attr "v8type" "store2") ++ (set_attr "mode" "")] ++) ++ ++;; Operands 1 and 3 are tied together by the final condition; so we allow ++;; fairly lax checking on the second memory operation. ++(define_insn "load_pair" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (match_operand:GPF 1 "aarch64_mem_pair_operand" "Ump")) ++ (set (match_operand:GPF 2 "register_operand" "=w") ++ (match_operand:GPF 3 "memory_operand" "m"))] ++ "rtx_equal_p (XEXP (operands[3], 0), ++ plus_constant (XEXP (operands[1], 0), ++ GET_MODE_SIZE (mode)))" ++ "ldp\\t%0, %2, %1" ++ [(set_attr "v8type" "fpsimd_load2") ++ (set_attr "mode" "")] ++) ++ ++;; Operands 0 and 2 are tied together by the final condition; so we allow ++;; fairly lax checking on the second memory operation. ++(define_insn "store_pair" ++ [(set (match_operand:GPF 0 "aarch64_mem_pair_operand" "=Ump") ++ (match_operand:GPF 1 "register_operand" "w")) ++ (set (match_operand:GPF 2 "memory_operand" "=m") ++ (match_operand:GPF 3 "register_operand" "w"))] ++ "rtx_equal_p (XEXP (operands[2], 0), ++ plus_constant (XEXP (operands[0], 0), ++ GET_MODE_SIZE (mode)))" ++ "stp\\t%1, %3, %0" ++ [(set_attr "v8type" "fpsimd_load2") ++ (set_attr "mode" "")] ++) ++ ++;; Load pair with writeback. This is primarily used in function epilogues ++;; when restoring [fp,lr] ++(define_insn "loadwb_pair_" ++ [(parallel ++ [(set (match_operand:PTR 0 "register_operand" "=k") ++ (plus:PTR (match_operand:PTR 1 "register_operand" "0") ++ (match_operand:PTR 4 "const_int_operand" "n"))) ++ (set (match_operand:GPI 2 "register_operand" "=r") ++ (mem:GPI (plus:PTR (match_dup 1) ++ (match_dup 4)))) ++ (set (match_operand:GPI 3 "register_operand" "=r") ++ (mem:GPI (plus:PTR (match_dup 1) ++ (match_operand:PTR 5 "const_int_operand" "n"))))])] ++ "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (mode)" ++ "ldp\\t%2, %3, [%1], %4" ++ [(set_attr "v8type" "load2") ++ (set_attr "mode" "")] ++) ++ ++;; Store pair with writeback. This is primarily used in function prologues ++;; when saving [fp,lr] ++(define_insn "storewb_pair_" ++ [(parallel ++ [(set (match_operand:PTR 0 "register_operand" "=&k") ++ (plus:PTR (match_operand:PTR 1 "register_operand" "0") ++ (match_operand:PTR 4 "const_int_operand" "n"))) ++ (set (mem:GPI (plus:PTR (match_dup 0) ++ (match_dup 4))) ++ (match_operand:GPI 2 "register_operand" "r")) ++ (set (mem:GPI (plus:PTR (match_dup 0) ++ (match_operand:PTR 5 "const_int_operand" "n"))) ++ (match_operand:GPI 3 "register_operand" "r"))])] ++ "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (mode)" ++ "stp\\t%2, %3, [%0, %4]!" ++ [(set_attr "v8type" "store2") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Sign/Zero extension ++;; ------------------------------------------------------------------- ++ ++(define_expand "sidi2" ++ [(set (match_operand:DI 0 "register_operand") ++ (ANY_EXTEND:DI (match_operand:SI 1 "nonimmediate_operand")))] ++ "" ++) ++ ++(define_insn "*extendsidi2_aarch64" ++ [(set (match_operand:DI 0 "register_operand" "=r,r") ++ (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ sxtw\t%0, %w1 ++ ldrsw\t%0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "*zero_extendsidi2_aarch64" ++ [(set (match_operand:DI 0 "register_operand" "=r,r") ++ (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ uxtw\t%0, %w1 ++ ldr\t%w0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "DI")] ++) ++ ++(define_expand "2" ++ [(set (match_operand:GPI 0 "register_operand") ++ (ANY_EXTEND:GPI (match_operand:SHORT 1 "nonimmediate_operand")))] ++ "" ++) ++ ++(define_insn "*extend2_aarch64" ++ [(set (match_operand:GPI 0 "register_operand" "=r,r") ++ (sign_extend:GPI (match_operand:SHORT 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ sxt\t%0, %w1 ++ ldrs\t%0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*zero_extend2_aarch64" ++ [(set (match_operand:GPI 0 "register_operand" "=r,r") ++ (zero_extend:GPI (match_operand:SHORT 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ uxt\t%0, %w1 ++ ldr\t%w0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "")] ++) ++ ++(define_expand "qihi2" ++ [(set (match_operand:HI 0 "register_operand") ++ (ANY_EXTEND:HI (match_operand:QI 1 "nonimmediate_operand")))] ++ "" ++) ++ ++(define_insn "*qihi2_aarch64" ++ [(set (match_operand:HI 0 "register_operand" "=r,r") ++ (ANY_EXTEND:HI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ xtb\t%w0, %w1 ++ b\t%w0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "HI")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Simple arithmetic ++;; ------------------------------------------------------------------- ++ ++(define_expand "add3" ++ [(set ++ (match_operand:GPI 0 "register_operand" "") ++ (plus:GPI (match_operand:GPI 1 "register_operand" "") ++ (match_operand:GPI 2 "aarch64_pluslong_operand" "")))] ++ "" ++ " ++ if (! aarch64_plus_operand (operands[2], VOIDmode)) ++ { ++ rtx subtarget = ((optimize && can_create_pseudo_p ()) ++ ? gen_reg_rtx (mode) : operands[0]); ++ HOST_WIDE_INT imm = INTVAL (operands[2]); ++ ++ if (imm < 0) ++ imm = -(-imm & ~0xfff); ++ else ++ imm &= ~0xfff; ++ ++ emit_insn (gen_add3 (subtarget, operands[1], GEN_INT (imm))); ++ operands[1] = subtarget; ++ operands[2] = GEN_INT (INTVAL (operands[2]) - imm); ++ } ++ " ++) ++ ++(define_insn "*addsi3_aarch64" ++ [(set ++ (match_operand:SI 0 "register_operand" "=rk,rk,rk") ++ (plus:SI ++ (match_operand:SI 1 "register_operand" "%rk,rk,rk") ++ (match_operand:SI 2 "aarch64_plus_operand" "I,r,J")))] ++ "" ++ "@ ++ add\\t%w0, %w1, %2 ++ add\\t%w0, %w1, %w2 ++ sub\\t%w0, %w1, #%n2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*adddi3_aarch64" ++ [(set ++ (match_operand:DI 0 "register_operand" "=rk,rk,rk,!w") ++ (plus:DI ++ (match_operand:DI 1 "register_operand" "%rk,rk,rk,!w") ++ (match_operand:DI 2 "aarch64_plus_operand" "I,r,J,!w")))] ++ "" ++ "@ ++ add\\t%x0, %x1, %2 ++ add\\t%x0, %x1, %x2 ++ sub\\t%x0, %x1, #%n2 ++ add\\t%d0, %d1, %d2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "DI") ++ (set_attr "simd" "*,*,*,yes")] ++) ++ ++(define_insn "*add3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (plus:GPI (match_operand:GPI 1 "register_operand" "%r,r") ++ (match_operand:GPI 2 "aarch64_plus_operand" "rI,J")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r,r") ++ (plus:GPI (match_dup 1) (match_dup 2)))] ++ "" ++ "@ ++ adds\\t%0, %1, %2 ++ subs\\t%0, %1, #%n2" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add3nr_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (plus:GPI (match_operand:GPI 0 "register_operand" "%r,r") ++ (match_operand:GPI 1 "aarch64_plus_operand" "rI,J")) ++ (const_int 0)))] ++ "" ++ "@ ++ cmn\\t%0, %1 ++ cmp\\t%0, #%n1" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add__" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (ASHIFT:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "add\\t%0, %3, %1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add_mul_imm_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_" "n")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "add\\t%0, %3, %1, lsl %p2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add__" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (ANY_EXTEND:GPI (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "add\\t%0, %2, %1, xt" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add__shft_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (ashift:GPI (ANY_EXTEND:GPI ++ (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand 2 "aarch64_imm3" "Ui3")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "add\\t%0, %3, %1, xt %2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add__mult_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (mult:GPI (ANY_EXTEND:GPI ++ (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "add\\t%0, %3, %1, xt %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add__multp2" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (ANY_EXTRACT:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n") ++ (const_int 0)) ++ (match_operand:GPI 4 "register_operand" "r")))] ++ "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" ++ "add\\t%0, %4, %1, xt%e3 %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add3_carryin" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (geu:GPI (reg:CC CC_REGNUM) (const_int 0)) ++ (plus:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r"))))] ++ "" ++ "adc\\t%0, %1, %2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add3_carryin_alt1" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (plus:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")) ++ (geu:GPI (reg:CC CC_REGNUM) (const_int 0))))] ++ "" ++ "adc\\t%0, %1, %2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add3_carryin_alt2" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (plus:GPI ++ (geu:GPI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_operand:GPI 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "adc\\t%0, %1, %2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add3_carryin_alt3" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (plus:GPI ++ (geu:GPI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_operand:GPI 2 "register_operand" "r")) ++ (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "adc\\t%0, %1, %2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add_uxt_multp2" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (and:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n")) ++ (match_operand:GPI 4 "register_operand" "r")))] ++ "aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), INTVAL (operands[3])) != 0" ++ "* ++ operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), ++ INTVAL (operands[3]))); ++ return \"add\t%0, %4, %1, uxt%e3 %p2\";" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "subsi3" ++ [(set (match_operand:SI 0 "register_operand" "=rk") ++ (minus:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r")))] ++ "" ++ "sub\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "subdi3" ++ [(set (match_operand:DI 0 "register_operand" "=rk,!w") ++ (minus:DI (match_operand:DI 1 "register_operand" "r,!w") ++ (match_operand:DI 2 "register_operand" "r,!w")))] ++ "" ++ "@ ++ sub\\t%x0, %x1, %x2 ++ sub\\t%d0, %d1, %d2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "DI") ++ (set_attr "simd" "*,yes")] ++) ++ ++ ++(define_insn "*sub3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ (minus:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (match_dup 1) (match_dup 2)))] ++ "" ++ "subs\\t%0, %1, %2" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*sub__" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 3 "register_operand" "r") ++ (ASHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] ++ "" ++ "sub\\t%0, %3, %1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*sub_mul_imm_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 3 "register_operand" "r") ++ (mult:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_" "n"))))] ++ "" ++ "sub\\t%0, %3, %1, lsl %p2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*sub__" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 1 "register_operand" "r") ++ (ANY_EXTEND:GPI ++ (match_operand:ALLX 2 "register_operand" "r"))))] ++ "" ++ "sub\\t%0, %1, %2, xt" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*sub__shft_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 1 "register_operand" "r") ++ (ashift:GPI (ANY_EXTEND:GPI ++ (match_operand:ALLX 2 "register_operand" "r")) ++ (match_operand 3 "aarch64_imm3" "Ui3"))))] ++ "" ++ "sub\\t%0, %1, %2, xt %3" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*sub__multp2" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 4 "register_operand" "r") ++ (ANY_EXTRACT:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n") ++ (const_int 0))))] ++ "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" ++ "sub\\t%0, %4, %1, xt%e3 %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*sub_uxt_multp2" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 4 "register_operand" "r") ++ (and:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n"))))] ++ "aarch64_uxt_size (exact_log2 (INTVAL (operands[2])),INTVAL (operands[3])) != 0" ++ "* ++ operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), ++ INTVAL (operands[3]))); ++ return \"sub\t%0, %4, %1, uxt%e3 %p2\";" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "neg2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "neg\\t%0, %1" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*neg2_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ (neg:GPI (match_operand:GPI 1 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (match_dup 1)))] ++ "" ++ "negs\\t%0, %1" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*neg__2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (ASHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] ++ "" ++ "neg\\t%0, %1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*neg_mul_imm_2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (mult:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_" "n"))))] ++ "" ++ "neg\\t%0, %1, lsl %p2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "mul3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "mul\\t%0, %1, %2" ++ [(set_attr "v8type" "mult") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*madd" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "madd\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "madd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*msub" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (match_operand:GPI 3 "register_operand" "r") ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r"))))] ++ ++ "" ++ "msub\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "madd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*mul_neg" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (mult:GPI (neg:GPI (match_operand:GPI 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ ++ "" ++ "mneg\\t%0, %1, %2" ++ [(set_attr "v8type" "mult") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "mulsidi3" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (mult:DI (ANY_EXTEND:DI (match_operand:SI 1 "register_operand" "r")) ++ (ANY_EXTEND:DI (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "mull\\t%0, %w1, %w2" ++ [(set_attr "v8type" "mull") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "maddsidi4" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (plus:DI (mult:DI ++ (ANY_EXTEND:DI (match_operand:SI 1 "register_operand" "r")) ++ (ANY_EXTEND:DI (match_operand:SI 2 "register_operand" "r"))) ++ (match_operand:DI 3 "register_operand" "r")))] ++ "" ++ "maddl\\t%0, %w1, %w2, %3" ++ [(set_attr "v8type" "maddl") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "msubsidi4" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (minus:DI ++ (match_operand:DI 3 "register_operand" "r") ++ (mult:DI (ANY_EXTEND:DI (match_operand:SI 1 "register_operand" "r")) ++ (ANY_EXTEND:DI ++ (match_operand:SI 2 "register_operand" "r")))))] ++ "" ++ "msubl\\t%0, %w1, %w2, %3" ++ [(set_attr "v8type" "maddl") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "*mulsidi_neg" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (mult:DI (neg:DI ++ (ANY_EXTEND:DI (match_operand:SI 1 "register_operand" "r"))) ++ (ANY_EXTEND:DI (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "mnegl\\t%0, %w1, %w2" ++ [(set_attr "v8type" "mull") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "muldi3_highpart" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (truncate:DI ++ (lshiftrt:TI ++ (mult:TI ++ (ANY_EXTEND:TI (match_operand:DI 1 "register_operand" "r")) ++ (ANY_EXTEND:TI (match_operand:DI 2 "register_operand" "r"))) ++ (const_int 64))))] ++ "" ++ "mulh\\t%0, %1, %2" ++ [(set_attr "v8type" "mulh") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "div3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ANY_DIV:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "div\\t%0, %1, %2" ++ [(set_attr "v8type" "div") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Comparison insns ++;; ------------------------------------------------------------------- ++ ++(define_insn "*cmp" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_operand:GPI 0 "register_operand" "r,r") ++ (match_operand:GPI 1 "aarch64_plus_operand" "rI,J")))] ++ "" ++ "@ ++ cmp\\t%0, %1 ++ cmn\\t%0, #%n1" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmp" ++ [(set (reg:CCFP CC_REGNUM) ++ (compare:CCFP (match_operand:GPF 0 "register_operand" "w,w") ++ (match_operand:GPF 1 "aarch64_fp_compare_operand" "Y,w")))] ++ "TARGET_FLOAT" ++ "@ ++ fcmp\\t%0, #0.0 ++ fcmp\\t%0, %1" ++ [(set_attr "v8type" "fcmp") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmpe" ++ [(set (reg:CCFPE CC_REGNUM) ++ (compare:CCFPE (match_operand:GPF 0 "register_operand" "w,w") ++ (match_operand:GPF 1 "aarch64_fp_compare_operand" "Y,w")))] ++ "TARGET_FLOAT" ++ "@ ++ fcmpe\\t%0, #0.0 ++ fcmpe\\t%0, %1" ++ [(set_attr "v8type" "fcmp") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmp_swp__reg" ++ [(set (reg:CC_SWP CC_REGNUM) ++ (compare:CC_SWP (ASHIFT:GPI ++ (match_operand:GPI 0 "register_operand" "r") ++ (match_operand:QI 1 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")))] ++ "" ++ "cmp\\t%2, %0, %1" ++ [(set_attr "v8type" "alus_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmp_swp__reg" ++ [(set (reg:CC_SWP CC_REGNUM) ++ (compare:CC_SWP (ANY_EXTEND:GPI ++ (match_operand:ALLX 0 "register_operand" "r")) ++ (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "cmp\\t%1, %0, xt" ++ [(set_attr "v8type" "alus_ext") ++ (set_attr "mode" "")] ++) ++ ++ ++;; ------------------------------------------------------------------- ++;; Store-flag and conditional select insns ++;; ------------------------------------------------------------------- ++ ++(define_expand "cstore4" ++ [(set (match_operand:SI 0 "register_operand" "") ++ (match_operator:SI 1 "aarch64_comparison_operator" ++ [(match_operand:GPI 2 "register_operand" "") ++ (match_operand:GPI 3 "aarch64_plus_operand" "")]))] ++ "" ++ " ++ operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2], ++ operands[3]); ++ operands[3] = const0_rtx; ++ " ++) ++ ++(define_expand "cstore4" ++ [(set (match_operand:SI 0 "register_operand" "") ++ (match_operator:SI 1 "aarch64_comparison_operator" ++ [(match_operand:GPF 2 "register_operand" "") ++ (match_operand:GPF 3 "register_operand" "")]))] ++ "" ++ " ++ operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2], ++ operands[3]); ++ operands[3] = const0_rtx; ++ " ++) ++ ++(define_insn "*cstore_insn" ++ [(set (match_operand:ALLI 0 "register_operand" "=r") ++ (match_operator:ALLI 1 "aarch64_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]))] ++ "" ++ "cset\\t%0, %m1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cstore_neg" ++ [(set (match_operand:ALLI 0 "register_operand" "=r") ++ (neg:ALLI (match_operator:ALLI 1 "aarch64_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)])))] ++ "" ++ "csetm\\t%0, %m1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")] ++) ++ ++(define_expand "cmov6" ++ [(set (match_operand:GPI 0 "register_operand" "") ++ (if_then_else:GPI ++ (match_operator 1 "aarch64_comparison_operator" ++ [(match_operand:GPI 2 "register_operand" "") ++ (match_operand:GPI 3 "aarch64_plus_operand" "")]) ++ (match_operand:GPI 4 "register_operand" "") ++ (match_operand:GPI 5 "register_operand" "")))] ++ "" ++ " ++ operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2], ++ operands[3]); ++ operands[3] = const0_rtx; ++ " ++) ++ ++(define_expand "cmov6" ++ [(set (match_operand:GPF 0 "register_operand" "") ++ (if_then_else:GPF ++ (match_operator 1 "aarch64_comparison_operator" ++ [(match_operand:GPF 2 "register_operand" "") ++ (match_operand:GPF 3 "register_operand" "")]) ++ (match_operand:GPF 4 "register_operand" "") ++ (match_operand:GPF 5 "register_operand" "")))] ++ "" ++ " ++ operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2], ++ operands[3]); ++ operands[3] = const0_rtx; ++ " ++) ++ ++(define_insn "*cmov_insn" ++ [(set (match_operand:ALLI 0 "register_operand" "=r,r,r,r") ++ (if_then_else:ALLI ++ (match_operator 1 "aarch64_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:ALLI 3 "aarch64_reg_zero_or_m1" "rZ,rZ,UsM,UsM") ++ (match_operand:ALLI 4 "aarch64_reg_zero_or_m1" "rZ,UsM,rZ,UsM")))] ++ "" ++ ;; Final alternative should be unreachable, but included for completeness ++ "@ ++ csel\\t%0, %3, %4, %m1 ++ csinv\\t%0, %3, zr, %m1 ++ csinv\\t%0, %4, zr, %M1 ++ mov\\t%0, -1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmov_insn" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (if_then_else:GPF ++ (match_operator 1 "aarch64_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:GPF 3 "register_operand" "w") ++ (match_operand:GPF 4 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcsel\\t%0, %3, %4, %m1" ++ [(set_attr "v8type" "fcsel") ++ (set_attr "mode" "")] ++) ++ ++(define_expand "movcc" ++ [(set (match_operand:ALLI 0 "register_operand" "") ++ (if_then_else:ALLI (match_operand 1 "aarch64_comparison_operator" "") ++ (match_operand:ALLI 2 "register_operand" "") ++ (match_operand:ALLI 3 "register_operand" "")))] ++ "" ++ { ++ rtx ccreg; ++ enum rtx_code code = GET_CODE (operands[1]); ++ ++ if (code == UNEQ || code == LTGT) ++ FAIL; ++ ++ ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0), ++ XEXP (operands[1], 1)); ++ operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); ++ } ++) ++ ++(define_expand "movcc" ++ [(set (match_operand:GPI 0 "register_operand" "") ++ (if_then_else:GPI (match_operand 1 "aarch64_comparison_operator" "") ++ (match_operand:GPF 2 "register_operand" "") ++ (match_operand:GPF 3 "register_operand" "")))] ++ "" ++ { ++ rtx ccreg; ++ enum rtx_code code = GET_CODE (operands[1]); ++ ++ if (code == UNEQ || code == LTGT) ++ FAIL; ++ ++ ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0), ++ XEXP (operands[1], 1)); ++ operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); ++ } ++) ++ ++(define_insn "*csinc2_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (match_operator:GPI 2 "aarch64_comparison_operator" ++ [(match_operand:CC 3 "cc_register" "") (const_int 0)]) ++ (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "csinc\\t%0, %1, %1, %M2" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")]) ++ ++(define_insn "csinc3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (if_then_else:GPI ++ (match_operator:GPI 1 "aarch64_comparison_operator" ++ [(match_operand:CC 2 "cc_register" "") (const_int 0)]) ++ (plus:GPI (match_operand:GPI 3 "register_operand" "r") ++ (const_int 1)) ++ (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] ++ "" ++ "csinc\\t%0, %4, %3, %M1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*csinv3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (if_then_else:GPI ++ (match_operator:GPI 1 "aarch64_comparison_operator" ++ [(match_operand:CC 2 "cc_register" "") (const_int 0)]) ++ (not:GPI (match_operand:GPI 3 "register_operand" "r")) ++ (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] ++ "" ++ "csinv\\t%0, %4, %3, %M1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")]) ++ ++(define_insn "*csneg3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (if_then_else:GPI ++ (match_operator:GPI 1 "aarch64_comparison_operator" ++ [(match_operand:CC 2 "cc_register" "") (const_int 0)]) ++ (neg:GPI (match_operand:GPI 3 "register_operand" "r")) ++ (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] ++ "" ++ "csneg\\t%0, %4, %3, %M1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")]) ++ ++;; ------------------------------------------------------------------- ++;; Logical operations ++;; ------------------------------------------------------------------- ++ ++(define_insn "3" ++ [(set (match_operand:GPI 0 "register_operand" "=r,r") ++ (LOGICAL:GPI (match_operand:GPI 1 "register_operand" "%r,r") ++ (match_operand:GPI 2 "aarch64_logical_operand" "r,")))] ++ "" ++ "\\t%0, %1, %2" ++ [(set_attr "v8type" "logic") ++ (set_attr "mode" "")]) ++ ++(define_insn "*_3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (LOGICAL:GPI (SHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "\\t%0, %3, %1, %2" ++ [(set_attr "v8type" "logic_shift") ++ (set_attr "mode" "")]) ++ ++(define_insn "one_cmpl2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (not:GPI (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "mvn\\t%0, %1" ++ [(set_attr "v8type" "logic") ++ (set_attr "mode" "")]) ++ ++(define_insn "*one_cmpl_2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (not:GPI (SHIFT:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] ++ "" ++ "mvn\\t%0, %1, %2" ++ [(set_attr "v8type" "logic_shift") ++ (set_attr "mode" "")]) ++ ++(define_insn "*_one_cmpl3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (LOGICAL:GPI (not:GPI ++ (match_operand:GPI 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "\\t%0, %2, %1" ++ [(set_attr "v8type" "logic") ++ (set_attr "mode" "")]) ++ ++(define_insn "*_one_cmpl_3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (LOGICAL:GPI (not:GPI ++ (SHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "\\t%0, %3, %1, %2" ++ [(set_attr "v8type" "logic_shift") ++ (set_attr "mode" "")]) ++ ++(define_insn "clz2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (clz:GPI (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "clz\\t%0, %1" ++ [(set_attr "v8type" "clz") ++ (set_attr "mode" "")]) ++ ++(define_expand "ffs2" ++ [(match_operand:GPI 0 "register_operand") ++ (match_operand:GPI 1 "register_operand")] ++ "" ++ { ++ rtx ccreg = aarch64_gen_compare_reg (EQ, operands[1], const0_rtx); ++ rtx x = gen_rtx_NE (VOIDmode, ccreg, const0_rtx); ++ ++ emit_insn (gen_rbit2 (operands[0], operands[1])); ++ emit_insn (gen_clz2 (operands[0], operands[0])); ++ emit_insn (gen_csinc3_insn (operands[0], x, ccreg, operands[0], const0_rtx)); ++ DONE; ++ } ++) ++ ++(define_insn "clrsb2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_CLS))] ++ "" ++ "cls\\t%0, %1" ++ [(set_attr "v8type" "clz") ++ (set_attr "mode" "")]) ++ ++(define_insn "rbit2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_RBIT))] ++ "" ++ "rbit\\t%0, %1" ++ [(set_attr "v8type" "rbit") ++ (set_attr "mode" "")]) ++ ++(define_expand "ctz2" ++ [(match_operand:GPI 0 "register_operand") ++ (match_operand:GPI 1 "register_operand")] ++ "" ++ { ++ emit_insn (gen_rbit2 (operands[0], operands[1])); ++ emit_insn (gen_clz2 (operands[0], operands[0])); ++ DONE; ++ } ++) ++ ++(define_insn "*and3nr_compare0" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC ++ (and:GPI (match_operand:GPI 0 "register_operand" "%r,r") ++ (match_operand:GPI 1 "aarch64_logical_operand" "r,")) ++ (const_int 0)))] ++ "" ++ "tst\\t%0, %1" ++ [(set_attr "v8type" "logics") ++ (set_attr "mode" "")]) ++ ++(define_insn "*and_3nr_compare0" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC ++ (and:GPI (SHIFT:GPI ++ (match_operand:GPI 0 "register_operand" "r") ++ (match_operand:QI 1 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 2 "register_operand" "r")) ++ (const_int 0)))] ++ "" ++ "tst\\t%2, %0, %1" ++ [(set_attr "v8type" "logics_shift") ++ (set_attr "mode" "")]) ++ ++;; ------------------------------------------------------------------- ++;; Shifts ++;; ------------------------------------------------------------------- ++ ++(define_expand "3" ++ [(set (match_operand:GPI 0 "register_operand") ++ (ASHIFT:GPI (match_operand:GPI 1 "register_operand") ++ (match_operand:QI 2 "nonmemory_operand")))] ++ "" ++ { ++ if (CONST_INT_P (operands[2])) ++ { ++ operands[2] = GEN_INT (INTVAL (operands[2]) ++ & (GET_MODE_BITSIZE (mode) - 1)); ++ ++ if (operands[2] == const0_rtx) ++ { ++ emit_insn (gen_mov (operands[0], operands[1])); ++ DONE; ++ } ++ } ++ } ++) ++ ++(define_expand "ashl3" ++ [(set (match_operand:SHORT 0 "register_operand") ++ (ashift:SHORT (match_operand:SHORT 1 "register_operand") ++ (match_operand:QI 2 "nonmemory_operand")))] ++ "" ++ { ++ if (CONST_INT_P (operands[2])) ++ { ++ operands[2] = GEN_INT (INTVAL (operands[2]) ++ & (GET_MODE_BITSIZE (mode) - 1)); ++ ++ if (operands[2] == const0_rtx) ++ { ++ emit_insn (gen_mov (operands[0], operands[1])); ++ DONE; ++ } ++ } ++ } ++) ++ ++(define_expand "rotr3" ++ [(set (match_operand:GPI 0 "register_operand") ++ (rotatert:GPI (match_operand:GPI 1 "register_operand") ++ (match_operand:QI 2 "nonmemory_operand")))] ++ "" ++ { ++ if (CONST_INT_P (operands[2])) ++ { ++ operands[2] = GEN_INT (INTVAL (operands[2]) ++ & (GET_MODE_BITSIZE (mode) - 1)); ++ ++ if (operands[2] == const0_rtx) ++ { ++ emit_insn (gen_mov (operands[0], operands[1])); ++ DONE; ++ } ++ } ++ } ++) ++ ++(define_expand "rotl3" ++ [(set (match_operand:GPI 0 "register_operand") ++ (rotatert:GPI (match_operand:GPI 1 "register_operand") ++ (match_operand:QI 2 "nonmemory_operand")))] ++ "" ++ { ++ /* (SZ - cnt) % SZ == -cnt % SZ */ ++ if (CONST_INT_P (operands[2])) ++ { ++ operands[2] = GEN_INT ((-INTVAL (operands[2])) ++ & (GET_MODE_BITSIZE (mode) - 1)); ++ if (operands[2] == const0_rtx) ++ { ++ emit_insn (gen_mov (operands[0], operands[1])); ++ DONE; ++ } ++ } ++ else ++ operands[2] = expand_simple_unop (QImode, NEG, operands[2], ++ NULL_RTX, 1); ++ } ++) ++ ++(define_insn "*3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (SHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_reg_or_shift_imm_" "rUs")))] ++ "" ++ "\\t%0, %1, %2" ++ [(set_attr "v8type" "shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*ashl3_insn" ++ [(set (match_operand:SHORT 0 "register_operand" "=r") ++ (ashift:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss")))] ++ "" ++ "lsl\\t%0, %1, %2" ++ [(set_attr "v8type" "shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*3_insn" ++ [(set (match_operand:SHORT 0 "register_operand" "=r") ++ (ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n")))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "\t%w0, %w1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*_ashl" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ANY_EXTEND:GPI ++ (ashift:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n"))))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "bfiz\t%0, %1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*zero_extend_lshr" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (zero_extend:GPI ++ (lshiftrt:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n"))))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "ubfx\t%0, %1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*extend_ashr" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (sign_extend:GPI ++ (ashiftrt:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n"))))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "sbfx\\t%0, %1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Bitfields ++;; ------------------------------------------------------------------- ++ ++(define_expand "" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (ANY_EXTRACT:DI (match_operand:DI 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n") ++ (match_operand 3 "const_int_operand" "n")))] ++ "" ++ "" ++) ++ ++(define_insn "*" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ANY_EXTRACT:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n") ++ (match_operand 3 "const_int_operand" "n")))] ++ "" ++ "bfx\\t%0, %1, %3, %2" ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*_shft_" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ashift:GPI (ANY_EXTEND:GPI ++ (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand 2 "const_int_operand" "n")))] ++ "" ++ "bfiz\\t%0, %1, %2, #" ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++;; XXX We should match (any_extend (ashift)) here, like (and (ashift)) below ++ ++(define_insn "*andim_ashift_bfiz" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (and:GPI (ashift:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n")) ++ (match_operand 3 "const_int_operand" "n")))] ++ "exact_log2 ((INTVAL (operands[3]) >> INTVAL (operands[2])) + 1) >= 0 ++ && (INTVAL (operands[3]) & ((1 << INTVAL (operands[2])) - 1)) == 0" ++ "ubfiz\\t%0, %1, %2, %P3" ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "bswap2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (bswap:GPI (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "rev\\t%0, %1" ++ [(set_attr "v8type" "rev") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Floating-point intrinsics ++;; ------------------------------------------------------------------- ++ ++;; trunc - nothrow ++ ++(define_insn "btrunc2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTZ))] ++ "TARGET_FLOAT" ++ "frintz\\t%0, %1" ++ [(set_attr "v8type" "frint") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*lbtrunc2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (FIXUORS:GPI (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTZ)))] ++ "TARGET_FLOAT" ++ "fcvtz\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++;; ceil - nothrow ++ ++(define_insn "ceil2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTP))] ++ "TARGET_FLOAT" ++ "frintp\\t%0, %1" ++ [(set_attr "v8type" "frint") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "lceil2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (FIXUORS:GPI (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTP)))] ++ "TARGET_FLOAT" ++ "fcvtp\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++;; floor - nothrow ++ ++(define_insn "floor2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTM))] ++ "TARGET_FLOAT" ++ "frintm\\t%0, %1" ++ [(set_attr "v8type" "frint") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "lfloor2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (FIXUORS:GPI (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTM)))] ++ "TARGET_FLOAT" ++ "fcvtm\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++;; nearbyint - nothrow ++ ++(define_insn "nearbyint2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTI))] ++ "TARGET_FLOAT" ++ "frinti\\t%0, %1" ++ [(set_attr "v8type" "frint") ++ (set_attr "mode" "")] ++) ++ ++;; rint ++ ++(define_insn "rint2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTX))] ++ "TARGET_FLOAT" ++ "frintx\\t%0, %1" ++ [(set_attr "v8type" "frint") ++ (set_attr "mode" "")] ++) ++ ++;; round - nothrow ++ ++(define_insn "round2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTA))] ++ "TARGET_FLOAT" ++ "frinta\\t%0, %1" ++ [(set_attr "v8type" "frint") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "lround2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (FIXUORS:GPI (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ UNSPEC_FRINTA)))] ++ "TARGET_FLOAT" ++ "fcvta\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++;; fma - no throw ++ ++(define_insn "fma4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (fma:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w") ++ (match_operand:GPF 3 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fmadd\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "fnma4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (fma:GPF (neg:GPF (match_operand:GPF 1 "register_operand" "w")) ++ (match_operand:GPF 2 "register_operand" "w") ++ (match_operand:GPF 3 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fmsub\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "fms4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (fma:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w") ++ (neg:GPF (match_operand:GPF 3 "register_operand" "w"))))] ++ "TARGET_FLOAT" ++ "fnmsub\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "fnms4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (fma:GPF (neg:GPF (match_operand:GPF 1 "register_operand" "w")) ++ (match_operand:GPF 2 "register_operand" "w") ++ (neg:GPF (match_operand:GPF 3 "register_operand" "w"))))] ++ "TARGET_FLOAT" ++ "fnmadd\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++;; If signed zeros are ignored, -(a * b + c) = -a * b - c. ++(define_insn "*fnmadd4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (neg:GPF (fma:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w") ++ (match_operand:GPF 3 "register_operand" "w"))))] ++ "!HONOR_SIGNED_ZEROS (mode) && TARGET_FLOAT" ++ "fnmadd\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Floating-point conversions ++;; ------------------------------------------------------------------- ++ ++(define_insn "extendsfdf2" ++ [(set (match_operand:DF 0 "register_operand" "=w") ++ (float_extend:DF (match_operand:SF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcvt\\t%d0, %s1" ++ [(set_attr "v8type" "fcvt") ++ (set_attr "mode" "DF") ++ (set_attr "mode2" "SF")] ++) ++ ++(define_insn "truncdfsf2" ++ [(set (match_operand:SF 0 "register_operand" "=w") ++ (float_truncate:SF (match_operand:DF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcvt\\t%s0, %d1" ++ [(set_attr "v8type" "fcvt") ++ (set_attr "mode" "SF") ++ (set_attr "mode2" "DF")] ++) ++ ++(define_insn "fix_trunc2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (fix:GPI (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcvtzs\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++(define_insn "fixuns_trunc2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (unsigned_fix:GPI (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcvtzu\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++(define_insn "float2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (float:GPF (match_operand:GPI 1 "register_operand" "r")))] ++ "TARGET_FLOAT" ++ "scvtf\\t%0, %1" ++ [(set_attr "v8type" "fcvti2f") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++(define_insn "floatuns2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unsigned_float:GPF (match_operand:GPI 1 "register_operand" "r")))] ++ "TARGET_FLOAT" ++ "ucvtf\\t%0, %1" ++ [(set_attr "v8type" "fcvt") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Floating-point arithmetic ++;; ------------------------------------------------------------------- ++ ++(define_insn "add3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (plus:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fadd\\t%0, %1, %2" ++ [(set_attr "v8type" "fadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "sub3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (minus:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fsub\\t%0, %1, %2" ++ [(set_attr "v8type" "fadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "mul3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (mult:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fmul\\t%0, %1, %2" ++ [(set_attr "v8type" "fmul") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*fnmul3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (mult:GPF ++ (neg:GPF (match_operand:GPF 1 "register_operand" "w")) ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fnmul\\t%0, %1, %2" ++ [(set_attr "v8type" "fmul") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "div3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (div:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fdiv\\t%0, %1, %2" ++ [(set_attr "v8type" "fdiv") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "neg2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (neg:GPF (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fneg\\t%0, %1" ++ [(set_attr "v8type" "ffarith") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "sqrt2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (sqrt:GPF (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fsqrt\\t%0, %1" ++ [(set_attr "v8type" "fsqrt") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "abs2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (abs:GPF (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fabs\\t%0, %1" ++ [(set_attr "v8type" "ffarith") ++ (set_attr "mode" "")] ++) ++ ++;; Given that smax/smin do not specify the result when either input is NaN, ++;; we could use either FMAXNM or FMAX for smax, and either FMINNM or FMIN ++;; for smin. ++ ++(define_insn "smax3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (smax:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fmaxnm\\t%0, %1, %2" ++ [(set_attr "v8type" "fminmax") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "smin3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (smin:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fminnm\\t%0, %1, %2" ++ [(set_attr "v8type" "fminmax") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Reload support ++;; ------------------------------------------------------------------- ++ ++;; Reload SP+imm where imm cannot be handled by a single ADD instruction. ++;; Must load imm into a scratch register and copy SP to the dest reg before ++;; adding, since SP cannot be used as a source register in an ADD ++;; instruction. ++(define_expand "reload_sp_immediate" ++ [(parallel [(set (match_operand:DI 0 "register_operand" "=r") ++ (match_operand:DI 1 "" "")) ++ (clobber (match_operand:TI 2 "register_operand" "=&r"))])] ++ "" ++ { ++ rtx sp = XEXP (operands[1], 0); ++ rtx val = XEXP (operands[1], 1); ++ unsigned regno = REGNO (operands[2]); ++ rtx scratch = operands[1]; ++ gcc_assert (GET_CODE (operands[1]) == PLUS); ++ gcc_assert (sp == stack_pointer_rtx); ++ gcc_assert (CONST_INT_P (val)); ++ ++ /* It is possible that one of the registers we got for operands[2] ++ might coincide with that of operands[0] (which is why we made ++ it TImode). Pick the other one to use as our scratch. */ ++ if (regno == REGNO (operands[0])) ++ regno++; ++ scratch = gen_rtx_REG (DImode, regno); ++ ++ emit_move_insn (scratch, val); ++ emit_move_insn (operands[0], sp); ++ emit_insn (gen_adddi3 (operands[0], operands[0], scratch)); ++ DONE; ++ } ++) ++ ++(define_expand "aarch64_reload_mov" ++ [(set (match_operand:TX 0 "register_operand" "=w") ++ (match_operand:TX 1 "register_operand" "w")) ++ (clobber (match_operand:DI 2 "register_operand" "=&r")) ++ ] ++ "" ++ { ++ rtx op0 = simplify_gen_subreg (TImode, operands[0], mode, 0); ++ rtx op1 = simplify_gen_subreg (TImode, operands[1], mode, 0); ++ gen_aarch64_movtilow_tilow (op0, op1); ++ gen_aarch64_movdi_tihigh (operands[2], op1); ++ gen_aarch64_movtihigh_di (op0, operands[2]); ++ DONE; ++ } ++) ++ ++;; The following secondary reload helpers patterns are invoked ++;; after or during reload as we don't want these patterns to start ++;; kicking in during the combiner. ++ ++(define_insn "aarch64_movdi_tilow" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (truncate:DI (match_operand:TI 1 "register_operand" "w")))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%x0, %d1" ++ [(set_attr "v8type" "fmovf2i") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_movdi_tihigh" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (truncate:DI ++ (lshiftrt:TI (match_operand:TI 1 "register_operand" "w") ++ (const_int 64))))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%x0, %1.d[1]" ++ [(set_attr "v8type" "fmovf2i") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_movtihigh_di" ++ [(set (zero_extract:TI (match_operand:TI 0 "register_operand" "+w") ++ (const_int 64) (const_int 64)) ++ (zero_extend:TI (match_operand:DI 1 "register_operand" "r")))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%0.d[1], %x1" ++ ++ [(set_attr "v8type" "fmovi2f") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_movtilow_di" ++ [(set (match_operand:TI 0 "register_operand" "=w") ++ (zero_extend:TI (match_operand:DI 1 "register_operand" "r")))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%d0, %x1" ++ ++ [(set_attr "v8type" "fmovi2f") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_movtilow_tilow" ++ [(set (match_operand:TI 0 "register_operand" "=w") ++ (zero_extend:TI ++ (truncate:DI (match_operand:TI 1 "register_operand" "w"))))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%d0, %d1" ++ ++ [(set_attr "v8type" "fmovi2f") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++;; There is a deliberate reason why the parameters of high and lo_sum's ++;; don't have modes for ADRP and ADD instructions. This is to allow high ++;; and lo_sum's to be used with the labels defining the jump tables in ++;; rodata section. ++ ++(define_insn "add_losym" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (lo_sum:DI (match_operand:DI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_valid_symref" "S")))] ++ "" ++ "add\\t%0, %1, :lo12:%a2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "DI")] ++ ++) ++ ++(define_insn "ldr_got_small" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(mem:DI (lo_sum:DI ++ (match_operand:DI 1 "register_operand" "r") ++ (match_operand:DI 2 "aarch64_valid_symref" "S")))] ++ UNSPEC_GOTSMALLPIC))] ++ "" ++ "ldr\\t%0, [%1, #:got_lo12:%a2]" ++ [(set_attr "v8type" "load1") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "aarch64_load_tp_hard" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(const_int 0)] UNSPEC_TLS))] ++ "" ++ "mrs\\t%0, tpidr_el0" ++ [(set_attr "v8type" "mrs") ++ (set_attr "mode" "DI")] ++) ++ ++;; The TLS ABI specifically requires that the compiler does not schedule ++;; instructions in the TLS stubs, in order to enable linker relaxation. ++;; Therefore we treat the stubs as an atomic sequence. ++(define_expand "tlsgd_small" ++ [(parallel [(set (match_operand 0 "register_operand" "") ++ (call (mem:DI (match_dup 2)) (const_int 1))) ++ (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS) ++ (clobber (reg:DI LR_REGNUM))])] ++ "" ++{ ++ operands[2] = aarch64_tls_get_addr (); ++}) ++ ++(define_insn "*tlsgd_small" ++ [(set (match_operand 0 "register_operand" "") ++ (call (mem:DI (match_operand:DI 2 "" "")) (const_int 1))) ++ (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS) ++ (clobber (reg:DI LR_REGNUM)) ++ ] ++ "" ++ "adrp\\tx0, %A1\;add\\tx0, x0, %L1\;bl\\t%2\;nop" ++ [(set_attr "v8type" "call") ++ (set_attr "length" "16")]) ++ ++(define_insn "tlsie_small" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(match_operand:DI 1 "aarch64_tls_ie_symref" "S")] ++ UNSPEC_GOTSMALLTLS))] ++ "" ++ "adrp\\t%0, %A1\;ldr\\t%0, [%0, #%L1]" ++ [(set_attr "v8type" "load1") ++ (set_attr "mode" "DI") ++ (set_attr "length" "8")] ++) ++ ++(define_insn "tlsle_small" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(match_operand:DI 1 "register_operand" "r") ++ (match_operand:DI 2 "aarch64_tls_le_symref" "S")] ++ UNSPEC_GOTSMALLTLS))] ++ "" ++ "add\\t%0, %1, #%G2\;add\\t%0, %0, #%L2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "DI") ++ (set_attr "length" "8")] ++) ++ ++(define_insn "tlsdesc_small" ++ [(set (reg:DI R0_REGNUM) ++ (unspec:DI [(match_operand:DI 0 "aarch64_valid_symref" "S")] ++ UNSPEC_TLSDESC)) ++ (clobber (reg:DI LR_REGNUM)) ++ (clobber (match_scratch:DI 1 "=r"))] ++ "TARGET_TLS_DESC" ++ "adrp\\tx0, %A0\;ldr\\t%1, [x0, #%L0]\;add\\tx0, x0, %L0\;.tlsdesccall\\t%0\;blr\\t%1" ++ [(set_attr "v8type" "call") ++ (set_attr "length" "16")]) ++ ++(define_insn "stack_tie" ++ [(set (mem:BLK (scratch)) ++ (unspec:BLK [(match_operand:DI 0 "register_operand" "rk") ++ (match_operand:DI 1 "register_operand" "rk")] ++ UNSPEC_PRLG_STK))] ++ "" ++ "" ++ [(set_attr "length" "0")] ++) ++ ++;; AdvSIMD Stuff ++(include "aarch64-simd.md") ++ ++;; Synchronization Builtins ++(include "sync.md") +Index: gcc/config/aarch64/aarch64-arches.def +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-arches.def (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-arches.def (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,29 @@ ++/* Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* Before using #include to read this file, define a macro: ++ ++ AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) ++ ++ The NAME is the name of the architecture, represented as a string ++ constant. The CORE is the identifier for a core representative of ++ this architecture. ARCH is the architecture revision. FLAGS are ++ the flags implied by the architecture. */ ++ ++AARCH64_ARCH("armv8-a", generic, 8, AARCH64_FL_FOR_ARCH8) +Index: gcc/config/aarch64/aarch64-option-extensions.def +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-option-extensions.def (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-option-extensions.def (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,37 @@ ++/* Copyright (C) 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* This is a list of ISA extentsions in AArch64. ++ ++ Before using #include to read this file, define a macro: ++ ++ AARCH64_OPT_EXTENSION(EXT_NAME, FLAGS_ON, FLAGS_OFF) ++ ++ EXT_NAME is the name of the extension, represented as a string constant. ++ FLAGS_ON are the bitwise-or of the features that the extension adds. ++ FLAGS_OFF are the bitwise-or of the features that the extension removes. */ ++ ++/* V8 Architecture Extensions. ++ This list currently contains example extensions for CPUs that implement ++ AArch64, and therefore serves as a template for adding more CPUs in the ++ future. */ ++ ++AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, AARCH64_FL_FPSIMD | AARCH64_FL_CRYPTO) ++AARCH64_OPT_EXTENSION("simd", AARCH64_FL_FPSIMD, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO) ++AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO | AARCH64_FL_FPSIMD, AARCH64_FL_CRYPTO) +Index: gcc/config/aarch64/t-aarch64 +=================================================================== +--- a/src/gcc/config/aarch64/t-aarch64 (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/t-aarch64 (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,32 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++$(srcdir)/config/aarch64/aarch64-tune.md: $(srcdir)/config/aarch64/gentune.sh \ ++ $(srcdir)/config/aarch64/aarch64-cores.def ++ $(SHELL) $(srcdir)/config/aarch64/gentune.sh \ ++ $(srcdir)/config/aarch64/aarch64-cores.def > \ ++ $(srcdir)/config/aarch64/aarch64-tune.md ++ ++aarch64-builtins.o: $(srcdir)/config/aarch64/aarch64-builtins.c $(CONFIG_H) \ ++ $(SYSTEM_H) coretypes.h $(TM_H) \ ++ $(RTL_H) $(TREE_H) expr.h $(TM_P_H) $(RECOG_H) langhooks.h \ ++ $(DIAGNOSTIC_CORE_H) $(OPTABS_H) ++ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ ++ $(srcdir)/config/aarch64/aarch64-builtins.c +Index: gcc/config/aarch64/large.md +=================================================================== +--- a/src/gcc/config/aarch64/large.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/large.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,312 @@ ++;; Copyright (C) 2012 Free Software Foundation, Inc. ++;; ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; In the absence of any ARMv8-A implementations, two examples derived ++;; from ARM's most recent ARMv7-A cores (Cortex-A7 and Cortex-A15) are ++;; included by way of example. This is a temporary measure. ++ ++;; Example pipeline description for an example 'large' core ++;; implementing AArch64 ++ ++;;------------------------------------------------------- ++;; General Description ++;;------------------------------------------------------- ++ ++(define_automaton "large_cpu") ++ ++;; The core is modelled as a triple issue pipeline that has ++;; the following dispatch units. ++;; 1. Two pipelines for simple integer operations: int1, int2 ++;; 2. Two pipelines for SIMD and FP data-processing operations: fpsimd1, fpsimd2 ++;; 3. One pipeline for branch operations: br ++;; 4. One pipeline for integer multiply and divide operations: multdiv ++;; 5. Two pipelines for load and store operations: ls1, ls2 ++;; ++;; We can issue into three pipelines per-cycle. ++;; ++;; We assume that where we have unit pairs xxx1 is always filled before xxx2. ++ ++;;------------------------------------------------------- ++;; CPU Units and Reservations ++;;------------------------------------------------------- ++ ++;; The three issue units ++(define_cpu_unit "large_cpu_unit_i1, large_cpu_unit_i2, large_cpu_unit_i3" "large_cpu") ++ ++(define_reservation "large_cpu_resv_i1" ++ "(large_cpu_unit_i1 | large_cpu_unit_i2 | large_cpu_unit_i3)") ++ ++(define_reservation "large_cpu_resv_i2" ++ "((large_cpu_unit_i1 + large_cpu_unit_i2) | (large_cpu_unit_i2 + large_cpu_unit_i3))") ++ ++(define_reservation "large_cpu_resv_i3" ++ "(large_cpu_unit_i1 + large_cpu_unit_i2 + large_cpu_unit_i3)") ++ ++(final_presence_set "large_cpu_unit_i2" "large_cpu_unit_i1") ++(final_presence_set "large_cpu_unit_i3" "large_cpu_unit_i2") ++ ++;; The main dispatch units ++(define_cpu_unit "large_cpu_unit_int1, large_cpu_unit_int2" "large_cpu") ++(define_cpu_unit "large_cpu_unit_fpsimd1, large_cpu_unit_fpsimd2" "large_cpu") ++(define_cpu_unit "large_cpu_unit_ls1, large_cpu_unit_ls2" "large_cpu") ++(define_cpu_unit "large_cpu_unit_br" "large_cpu") ++(define_cpu_unit "large_cpu_unit_multdiv" "large_cpu") ++ ++(define_reservation "large_cpu_resv_ls" "(large_cpu_unit_ls1 | large_cpu_unit_ls2)") ++ ++;; The extended load-store pipeline ++(define_cpu_unit "large_cpu_unit_load, large_cpu_unit_store" "large_cpu") ++ ++;; The extended ALU pipeline ++(define_cpu_unit "large_cpu_unit_int1_alu, large_cpu_unit_int2_alu" "large_cpu") ++(define_cpu_unit "large_cpu_unit_int1_shf, large_cpu_unit_int2_shf" "large_cpu") ++(define_cpu_unit "large_cpu_unit_int1_sat, large_cpu_unit_int2_sat" "large_cpu") ++ ++ ++;;------------------------------------------------------- ++;; Simple ALU Instructions ++;;------------------------------------------------------- ++ ++;; Simple ALU operations without shift ++(define_insn_reservation "large_cpu_alu" 2 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "adc,alu,alu_ext")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ ++ (large_cpu_unit_int2, large_cpu_unit_int2_alu)") ++ ++(define_insn_reservation "large_cpu_logic" 2 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "logic,logic_imm")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ ++ (large_cpu_unit_int2, large_cpu_unit_int2_alu)") ++ ++(define_insn_reservation "large_cpu_shift" 2 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "shift,shift_imm")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, large_cpu_unit_int1_shf) |\ ++ (large_cpu_unit_int2, large_cpu_unit_int2_shf)") ++ ++;; Simple ALU operations with immediate shift ++(define_insn_reservation "large_cpu_alu_shift" 3 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "alu_shift")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, ++ large_cpu_unit_int1 + large_cpu_unit_int1_shf, large_cpu_unit_int1_alu) | \ ++ (large_cpu_unit_int2, ++ large_cpu_unit_int2 + large_cpu_unit_int2_shf, large_cpu_unit_int2_alu)") ++ ++(define_insn_reservation "large_cpu_logic_shift" 3 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "logic_shift")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ ++ (large_cpu_unit_int2, large_cpu_unit_int2_alu)") ++ ++ ++;;------------------------------------------------------- ++;; Multiplication/Division ++;;------------------------------------------------------- ++ ++;; Simple multiplication ++(define_insn_reservation "large_cpu_mult_single" 3 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "SI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++(define_insn_reservation "large_cpu_mult_double" 4 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "DI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++;; 64-bit multiplication ++(define_insn_reservation "large_cpu_mull" 4 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "mull,mulh,maddl")) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv * 2") ++ ++;; Division ++(define_insn_reservation "large_cpu_udiv_single" 9 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "udiv") (eq_attr "mode" "SI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++(define_insn_reservation "large_cpu_udiv_double" 18 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "udiv") (eq_attr "mode" "DI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++(define_insn_reservation "large_cpu_sdiv_single" 10 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "SI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++(define_insn_reservation "large_cpu_sdiv_double" 20 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "DI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++ ++;;------------------------------------------------------- ++;; Branches ++;;------------------------------------------------------- ++ ++;; Branches take one issue slot. ++;; No latency as there is no result ++(define_insn_reservation "large_cpu_branch" 0 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "branch")) ++ "large_cpu_resv_i1, large_cpu_unit_br") ++ ++ ++;; Calls take up all issue slots, and form a block in the ++;; pipeline. The result however is available the next cycle. ++;; Addition of new units requires this to be updated. ++(define_insn_reservation "large_cpu_call" 1 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "call")) ++ "large_cpu_resv_i3 | large_cpu_resv_i2, \ ++ large_cpu_unit_int1 + large_cpu_unit_int2 + large_cpu_unit_br + \ ++ large_cpu_unit_multdiv + large_cpu_unit_fpsimd1 + large_cpu_unit_fpsimd2 + \ ++ large_cpu_unit_ls1 + large_cpu_unit_ls2,\ ++ large_cpu_unit_int1_alu + large_cpu_unit_int1_shf + large_cpu_unit_int1_sat + \ ++ large_cpu_unit_int2_alu + large_cpu_unit_int2_shf + \ ++ large_cpu_unit_int2_sat + large_cpu_unit_load + large_cpu_unit_store") ++ ++ ++;;------------------------------------------------------- ++;; Load/Store Instructions ++;;------------------------------------------------------- ++ ++;; Loads of up to two words. ++(define_insn_reservation "large_cpu_load1" 4 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "load_acq,load1,load2")) ++ "large_cpu_resv_i1, large_cpu_resv_ls, large_cpu_unit_load, nothing") ++ ++;; Stores of up to two words. ++(define_insn_reservation "large_cpu_store1" 0 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "store_rel,store1,store2")) ++ "large_cpu_resv_i1, large_cpu_resv_ls, large_cpu_unit_store") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point arithmetic. ++;;------------------------------------------------------- ++ ++(define_insn_reservation "large_cpu_fpalu" 4 ++ (and (eq_attr "tune" "large") ++ (eq_attr "v8type" "ffarith,fadd,fccmp,fcvt,fcmp")) ++ "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") ++ ++(define_insn_reservation "large_cpu_fconst" 3 ++ (and (eq_attr "tune" "large") ++ (eq_attr "v8type" "fconst")) ++ "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") ++ ++(define_insn_reservation "large_cpu_fpmuls" 4 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fmul,fmadd") (eq_attr "mode" "SF"))) ++ "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") ++ ++(define_insn_reservation "large_cpu_fpmuld" 7 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fmul,fmadd") (eq_attr "mode" "DF"))) ++ "large_cpu_resv_i1 + large_cpu_unit_fpsimd1, large_cpu_unit_fpsimd1 * 2,\ ++ large_cpu_resv_i1 + large_cpu_unit_fpsimd1") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Division ++;;------------------------------------------------------- ++ ++;; Single-precision divide takes 14 cycles to complete, and this ++;; includes the time taken for the special instruction used to collect the ++;; result to travel down the multiply pipeline. ++ ++(define_insn_reservation "large_cpu_fdivs" 14 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF"))) ++ "large_cpu_resv_i1, large_cpu_unit_fpsimd1 * 13") ++ ++(define_insn_reservation "large_cpu_fdivd" 29 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF"))) ++ "large_cpu_resv_i1, large_cpu_unit_fpsimd1 * 28") ++ ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Transfers ++;;------------------------------------------------------- ++ ++(define_insn_reservation "large_cpu_i2f" 4 ++ (and (eq_attr "tune" "large") ++ (eq_attr "v8type" "fmovi2f")) ++ "large_cpu_resv_i1") ++ ++(define_insn_reservation "large_cpu_f2i" 2 ++ (and (eq_attr "tune" "large") ++ (eq_attr "v8type" "fmovf2i")) ++ "large_cpu_resv_i1") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Load/Store ++;;------------------------------------------------------- ++ ++(define_insn_reservation "large_cpu_floads" 4 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fpsimd_load,fpsimd_load2") (eq_attr "mode" "SF"))) ++ "large_cpu_resv_i1") ++ ++(define_insn_reservation "large_cpu_floadd" 5 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fpsimd_load,fpsimd_load2") (eq_attr "mode" "DF"))) ++ "large_cpu_resv_i1 + large_cpu_unit_br, large_cpu_resv_i1") ++ ++(define_insn_reservation "large_cpu_fstores" 0 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fpsimd_store,fpsimd_store2") (eq_attr "mode" "SF"))) ++ "large_cpu_resv_i1") ++ ++(define_insn_reservation "large_cpu_fstored" 0 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fpsimd_store,fpsimd_store2") (eq_attr "mode" "DF"))) ++ "large_cpu_resv_i1 + large_cpu_unit_br, large_cpu_resv_i1") ++ ++ ++;;------------------------------------------------------- ++;; Bypasses ++;;------------------------------------------------------- ++ ++(define_bypass 1 "large_cpu_alu, large_cpu_logic, large_cpu_shift" ++ "large_cpu_alu, large_cpu_alu_shift, large_cpu_logic, large_cpu_logic_shift, large_cpu_shift") ++ ++(define_bypass 2 "large_cpu_alu_shift, large_cpu_logic_shift" ++ "large_cpu_alu, large_cpu_alu_shift, large_cpu_logic, large_cpu_logic_shift, large_cpu_shift") ++ ++(define_bypass 1 "large_cpu_alu, large_cpu_logic, large_cpu_shift" "large_cpu_load1") ++ ++(define_bypass 2 "large_cpu_alu_shift, large_cpu_logic_shift" "large_cpu_load1") ++ ++(define_bypass 2 "large_cpu_floads" ++ "large_cpu_fpalu, large_cpu_fpmuld,\ ++ large_cpu_fdivs, large_cpu_fdivd,\ ++ large_cpu_f2i") ++ ++(define_bypass 3 "large_cpu_floadd" ++ "large_cpu_fpalu, large_cpu_fpmuld,\ ++ large_cpu_fdivs, large_cpu_fdivd,\ ++ large_cpu_f2i") +Index: gcc/config/aarch64/aarch64.opt +=================================================================== +--- a/src/gcc/config/aarch64/aarch64.opt (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64.opt (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,100 @@ ++; Machine description for AArch64 architecture. ++; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++; Contributed by ARM Ltd. ++; ++; This file is part of GCC. ++; ++; GCC is free software; you can redistribute it and/or modify it ++; under the terms of the GNU General Public License as published by ++; the Free Software Foundation; either version 3, or (at your option) ++; any later version. ++; ++; GCC is distributed in the hope that it will be useful, but ++; WITHOUT ANY WARRANTY; without even the implied warranty of ++; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++; General Public License for more details. ++; ++; You should have received a copy of the GNU General Public License ++; along with GCC; see the file COPYING3. If not see ++; . ++ ++HeaderInclude ++config/aarch64/aarch64-opts.h ++ ++; The cpu/arch option names to use in cpu/arch selection. ++ ++Variable ++const char *aarch64_arch_string ++ ++Variable ++const char *aarch64_cpu_string ++ ++Variable ++const char *aarch64_tune_string ++ ++; The TLS dialect names to use with -mtls-dialect. ++ ++Enum ++Name(tls_type) Type(enum aarch64_tls_type) ++The possible TLS dialects: ++ ++EnumValue ++Enum(tls_type) String(trad) Value(TLS_TRADITIONAL) ++ ++EnumValue ++Enum(tls_type) String(desc) Value(TLS_DESCRIPTORS) ++ ++; The code model option names for -mcmodel. ++ ++Enum ++Name(cmodel) Type(enum aarch64_code_model) ++The code model option names for -mcmodel: ++ ++EnumValue ++Enum(cmodel) String(tiny) Value(AARCH64_CMODEL_TINY) ++ ++EnumValue ++Enum(cmodel) String(small) Value(AARCH64_CMODEL_SMALL) ++ ++EnumValue ++Enum(cmodel) String(large) Value(AARCH64_CMODEL_LARGE) ++ ++mbig-endian ++Target Report RejectNegative Mask(BIG_END) ++Assume target CPU is configured as big endian ++ ++mgeneral-regs-only ++Target Report RejectNegative Mask(GENERAL_REGS_ONLY) ++Generate code which uses only the general registers ++ ++mlittle-endian ++Target Report RejectNegative InverseMask(BIG_END) ++Assume target CPU is configured as little endian ++ ++mcmodel= ++Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) ++Specify the code model ++ ++mstrict-align ++Target Report RejectNegative Mask(STRICT_ALIGN) ++Don't assume that unaligned accesses are handled by the system ++ ++momit-leaf-frame-pointer ++Target Report Save Var(flag_omit_leaf_frame_pointer) Init(1) ++Omit the frame pointer in leaf functions ++ ++mtls-dialect= ++Target RejectNegative Joined Enum(tls_type) Var(aarch64_tls_dialect) Init(TLS_DESCRIPTORS) ++Specify TLS dialect ++ ++march= ++Target RejectNegative Joined Var(aarch64_arch_string) ++-march=ARCH Use features of architecture ARCH ++ ++mcpu= ++Target RejectNegative Joined Var(aarch64_cpu_string) ++-mcpu=CPU Use features of and optimize for CPU ++ ++mtune= ++Target RejectNegative Joined Var(aarch64_tune_string) ++-mtune=CPU Optimize for CPU +Index: gcc/config/aarch64/aarch64-modes.def +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-modes.def (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-modes.def (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,54 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++CC_MODE (CCFP); ++CC_MODE (CCFPE); ++CC_MODE (CC_SWP); ++CC_MODE (CC_ZESWP); /* zero-extend LHS (but swap to make it RHS). */ ++CC_MODE (CC_SESWP); /* sign-extend LHS (but swap to make it RHS). */ ++CC_MODE (CC_NZ); /* Only N and Z bits of condition flags are valid. */ ++ ++/* Vector modes. */ ++VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI. */ ++VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI. */ ++VECTOR_MODES (FLOAT, 8); /* V2SF. */ ++VECTOR_MODES (FLOAT, 16); /* V4SF V2DF. */ ++ ++/* Oct Int: 256-bit integer mode needed for 32-byte vector arguments. */ ++INT_MODE (OI, 32); ++ ++/* Opaque integer modes for 3, 6 or 8 Neon double registers (2 is ++ TImode). */ ++INT_MODE (EI, 24); ++INT_MODE (CI, 48); ++INT_MODE (XI, 64); ++ ++/* Vector modes for register lists. */ ++VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI. */ ++VECTOR_MODES (FLOAT, 32); /* V8SF V4DF. */ ++ ++VECTOR_MODES (INT, 48); /* V32QI V16HI V8SI V4DI. */ ++VECTOR_MODES (FLOAT, 48); /* V8SF V4DF. */ ++ ++VECTOR_MODES (INT, 64); /* V32QI V16HI V8SI V4DI. */ ++VECTOR_MODES (FLOAT, 64); /* V8SF V4DF. */ ++ ++/* Quad float: 128-bit floating mode for long doubles. */ ++FLOAT_MODE (TF, 16, ieee_quad_format); +Index: gcc/config/aarch64/aarch64-cores.def +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-cores.def (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-cores.def (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,38 @@ ++/* Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* This is a list of cores that implement AArch64. ++ ++ Before using #include to read this file, define a macro: ++ ++ AARCH64_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS) ++ ++ The CORE_NAME is the name of the core, represented as a string constant. ++ The CORE_IDENT is the name of the core, represented as an identifier. ++ ARCH is the architecture revision implemented by the chip. ++ FLAGS are the bitwise-or of the traits that apply to that core. ++ This need not include flags implied by the architecture. ++ COSTS is the name of the rtx_costs routine to use. */ ++ ++/* V8 Architecture Processors. ++ This list currently contains example CPUs that implement AArch64, and ++ therefore serves as a template for adding more CPUs in the future. */ ++ ++AARCH64_CORE("example-1", large, 8, AARCH64_FL_FPSIMD, generic) ++AARCH64_CORE("example-2", small, 8, AARCH64_FL_FPSIMD, generic) +Index: gcc/config/aarch64/aarch64-builtins.c +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-builtins.c (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-builtins.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,1320 @@ ++/* Builtins' description for AArch64 SIMD architecture. ++ Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "tm.h" ++#include "rtl.h" ++#include "tree.h" ++#include "expr.h" ++#include "tm_p.h" ++#include "recog.h" ++#include "langhooks.h" ++#include "diagnostic-core.h" ++#include "optabs.h" ++ ++enum aarch64_simd_builtin_type_bits ++{ ++ T_V8QI = 0x0001, ++ T_V4HI = 0x0002, ++ T_V2SI = 0x0004, ++ T_V2SF = 0x0008, ++ T_DI = 0x0010, ++ T_DF = 0x0020, ++ T_V16QI = 0x0040, ++ T_V8HI = 0x0080, ++ T_V4SI = 0x0100, ++ T_V4SF = 0x0200, ++ T_V2DI = 0x0400, ++ T_V2DF = 0x0800, ++ T_TI = 0x1000, ++ T_EI = 0x2000, ++ T_OI = 0x4000, ++ T_XI = 0x8000, ++ T_SI = 0x10000, ++ T_HI = 0x20000, ++ T_QI = 0x40000 ++}; ++ ++#define v8qi_UP T_V8QI ++#define v4hi_UP T_V4HI ++#define v2si_UP T_V2SI ++#define v2sf_UP T_V2SF ++#define di_UP T_DI ++#define df_UP T_DF ++#define v16qi_UP T_V16QI ++#define v8hi_UP T_V8HI ++#define v4si_UP T_V4SI ++#define v4sf_UP T_V4SF ++#define v2di_UP T_V2DI ++#define v2df_UP T_V2DF ++#define ti_UP T_TI ++#define ei_UP T_EI ++#define oi_UP T_OI ++#define xi_UP T_XI ++#define si_UP T_SI ++#define hi_UP T_HI ++#define qi_UP T_QI ++ ++#define UP(X) X##_UP ++ ++#define T_MAX 19 ++ ++typedef enum ++{ ++ AARCH64_SIMD_BINOP, ++ AARCH64_SIMD_TERNOP, ++ AARCH64_SIMD_QUADOP, ++ AARCH64_SIMD_UNOP, ++ AARCH64_SIMD_GETLANE, ++ AARCH64_SIMD_SETLANE, ++ AARCH64_SIMD_CREATE, ++ AARCH64_SIMD_DUP, ++ AARCH64_SIMD_DUPLANE, ++ AARCH64_SIMD_COMBINE, ++ AARCH64_SIMD_SPLIT, ++ AARCH64_SIMD_LANEMUL, ++ AARCH64_SIMD_LANEMULL, ++ AARCH64_SIMD_LANEMULH, ++ AARCH64_SIMD_LANEMAC, ++ AARCH64_SIMD_SCALARMUL, ++ AARCH64_SIMD_SCALARMULL, ++ AARCH64_SIMD_SCALARMULH, ++ AARCH64_SIMD_SCALARMAC, ++ AARCH64_SIMD_CONVERT, ++ AARCH64_SIMD_FIXCONV, ++ AARCH64_SIMD_SELECT, ++ AARCH64_SIMD_RESULTPAIR, ++ AARCH64_SIMD_REINTERP, ++ AARCH64_SIMD_VTBL, ++ AARCH64_SIMD_VTBX, ++ AARCH64_SIMD_LOAD1, ++ AARCH64_SIMD_LOAD1LANE, ++ AARCH64_SIMD_STORE1, ++ AARCH64_SIMD_STORE1LANE, ++ AARCH64_SIMD_LOADSTRUCT, ++ AARCH64_SIMD_LOADSTRUCTLANE, ++ AARCH64_SIMD_STORESTRUCT, ++ AARCH64_SIMD_STORESTRUCTLANE, ++ AARCH64_SIMD_LOGICBINOP, ++ AARCH64_SIMD_SHIFTINSERT, ++ AARCH64_SIMD_SHIFTIMM, ++ AARCH64_SIMD_SHIFTACC ++} aarch64_simd_itype; ++ ++typedef struct ++{ ++ const char *name; ++ const aarch64_simd_itype itype; ++ const int bits; ++ const enum insn_code codes[T_MAX]; ++ const unsigned int num_vars; ++ unsigned int base_fcode; ++} aarch64_simd_builtin_datum; ++ ++#define CF(N, X) CODE_FOR_aarch64_##N##X ++ ++#define VAR1(T, N, A) \ ++ #N, AARCH64_SIMD_##T, UP (A), { CF (N, A) }, 1, 0 ++#define VAR2(T, N, A, B) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B), { CF (N, A), CF (N, B) }, 2, 0 ++#define VAR3(T, N, A, B, C) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C), \ ++ { CF (N, A), CF (N, B), CF (N, C) }, 3, 0 ++#define VAR4(T, N, A, B, C, D) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D) }, 4, 0 ++#define VAR5(T, N, A, B, C, D, E) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D) | UP (E), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E) }, 5, 0 ++#define VAR6(T, N, A, B, C, D, E, F) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D) | UP (E) | UP (F), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F) }, 6, 0 ++#define VAR7(T, N, A, B, C, D, E, F, G) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D) \ ++ | UP (E) | UP (F) | UP (G), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ ++ CF (N, G) }, 7, 0 ++#define VAR8(T, N, A, B, C, D, E, F, G, H) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D) \ ++ | UP (E) | UP (F) | UP (G) \ ++ | UP (H), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ ++ CF (N, G), CF (N, H) }, 8, 0 ++#define VAR9(T, N, A, B, C, D, E, F, G, H, I) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D) \ ++ | UP (E) | UP (F) | UP (G) \ ++ | UP (H) | UP (I), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ ++ CF (N, G), CF (N, H), CF (N, I) }, 9, 0 ++#define VAR10(T, N, A, B, C, D, E, F, G, H, I, J) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D) \ ++ | UP (E) | UP (F) | UP (G) \ ++ | UP (H) | UP (I) | UP (J), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ ++ CF (N, G), CF (N, H), CF (N, I), CF (N, J) }, 10, 0 ++ ++#define VAR11(T, N, A, B, C, D, E, F, G, H, I, J, K) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D) \ ++ | UP (E) | UP (F) | UP (G) \ ++ | UP (H) | UP (I) | UP (J) | UP (K), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ ++ CF (N, G), CF (N, H), CF (N, I), CF (N, J), CF (N, K) }, 11, 0 ++ ++#define VAR12(T, N, A, B, C, D, E, F, G, H, I, J, K, L) \ ++ #N, AARCH64_SIMD_##T, UP (A) | UP (B) | UP (C) | UP (D) \ ++ | UP (E) | UP (F) | UP (G) \ ++ | UP (H) | UP (I) | UP (J) | UP (K) | UP (L), \ ++ { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ ++ CF (N, G), CF (N, H), CF (N, I), CF (N, J), CF (N, K), CF (N, L) }, 12, 0 ++ ++ ++/* The mode entries in the following table correspond to the "key" type of the ++ instruction variant, i.e. equivalent to that which would be specified after ++ the assembler mnemonic, which usually refers to the last vector operand. ++ (Signed/unsigned/polynomial types are not differentiated between though, and ++ are all mapped onto the same mode for a given element size.) The modes ++ listed per instruction should be the same as those defined for that ++ instruction's pattern in aarch64_simd.md. ++ WARNING: Variants should be listed in the same increasing order as ++ aarch64_simd_builtin_type_bits. */ ++ ++static aarch64_simd_builtin_datum aarch64_simd_builtin_data[] = { ++ {VAR6 (CREATE, create, v8qi, v4hi, v2si, v2sf, di, df)}, ++ {VAR6 (GETLANE, get_lane_signed, ++ v8qi, v4hi, v2si, v16qi, v8hi, v4si)}, ++ {VAR7 (GETLANE, get_lane_unsigned, ++ v8qi, v4hi, v2si, v16qi, v8hi, v4si, v2di)}, ++ {VAR4 (GETLANE, get_lane, v2sf, di, v4sf, v2df)}, ++ {VAR6 (GETLANE, get_dregoi, v8qi, v4hi, v2si, v2sf, di, df)}, ++ {VAR6 (GETLANE, get_qregoi, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (GETLANE, get_dregci, v8qi, v4hi, v2si, v2sf, di, df)}, ++ {VAR6 (GETLANE, get_qregci, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (GETLANE, get_dregxi, v8qi, v4hi, v2si, v2sf, di, df)}, ++ {VAR6 (GETLANE, get_qregxi, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (SETLANE, set_qregoi, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (SETLANE, set_qregci, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (SETLANE, set_qregxi, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ ++ {VAR5 (REINTERP, reinterpretv8qi, v8qi, v4hi, v2si, v2sf, di)}, ++ {VAR5 (REINTERP, reinterpretv4hi, v8qi, v4hi, v2si, v2sf, di)}, ++ {VAR5 (REINTERP, reinterpretv2si, v8qi, v4hi, v2si, v2sf, di)}, ++ {VAR5 (REINTERP, reinterpretv2sf, v8qi, v4hi, v2si, v2sf, di)}, ++ {VAR5 (REINTERP, reinterpretdi, v8qi, v4hi, v2si, v2sf, di)}, ++ {VAR6 (REINTERP, reinterpretv16qi, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (REINTERP, reinterpretv8hi, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (REINTERP, reinterpretv4si, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (REINTERP, reinterpretv4sf, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (REINTERP, reinterpretv2di, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR6 (COMBINE, combine, v8qi, v4hi, v2si, v2sf, di, df)}, ++ ++ {VAR3 (BINOP, saddl, v8qi, v4hi, v2si)}, ++ {VAR3 (BINOP, uaddl, v8qi, v4hi, v2si)}, ++ {VAR3 (BINOP, saddl2, v16qi, v8hi, v4si)}, ++ {VAR3 (BINOP, uaddl2, v16qi, v8hi, v4si)}, ++ {VAR3 (BINOP, saddw, v8qi, v4hi, v2si)}, ++ {VAR3 (BINOP, uaddw, v8qi, v4hi, v2si)}, ++ {VAR3 (BINOP, saddw2, v16qi, v8hi, v4si)}, ++ {VAR3 (BINOP, uaddw2, v16qi, v8hi, v4si)}, ++ {VAR6 (BINOP, shadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si)}, ++ {VAR6 (BINOP, uhadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si)}, ++ {VAR6 (BINOP, srhadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si)}, ++ {VAR6 (BINOP, urhadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si)}, ++ {VAR3 (BINOP, addhn, v8hi, v4si, v2di)}, ++ {VAR3 (BINOP, raddhn, v8hi, v4si, v2di)}, ++ {VAR3 (TERNOP, addhn2, v8hi, v4si, v2di)}, ++ {VAR3 (TERNOP, raddhn2, v8hi, v4si, v2di)}, ++ {VAR3 (BINOP, ssubl, v8qi, v4hi, v2si)}, ++ {VAR3 (BINOP, usubl, v8qi, v4hi, v2si)}, ++ {VAR3 (BINOP, ssubl2, v16qi, v8hi, v4si) }, ++ {VAR3 (BINOP, usubl2, v16qi, v8hi, v4si) }, ++ {VAR3 (BINOP, ssubw, v8qi, v4hi, v2si) }, ++ {VAR3 (BINOP, usubw, v8qi, v4hi, v2si) }, ++ {VAR3 (BINOP, ssubw2, v16qi, v8hi, v4si) }, ++ {VAR3 (BINOP, usubw2, v16qi, v8hi, v4si) }, ++ {VAR11 (BINOP, sqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi)}, ++ {VAR11 (BINOP, uqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi)}, ++ {VAR11 (BINOP, sqsub, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi)}, ++ {VAR11 (BINOP, uqsub, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi)}, ++ {VAR11 (BINOP, suqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi)}, ++ {VAR11 (BINOP, usqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi)}, ++ {VAR6 (UNOP, sqmovun, di, v8hi, v4si, v2di, si, hi)}, ++ {VAR6 (UNOP, sqmovn, di, v8hi, v4si, v2di, si, hi)}, ++ {VAR6 (UNOP, uqmovn, di, v8hi, v4si, v2di, si, hi)}, ++ {VAR10 (UNOP, sqabs, v8qi, v4hi, v2si, v16qi, v8hi, v4si, v2di, si, hi, qi)}, ++ {VAR10 (UNOP, sqneg, v8qi, v4hi, v2si, v16qi, v8hi, v4si, v2di, si, hi, qi)}, ++ {VAR2 (BINOP, pmul, v8qi, v16qi)}, ++ {VAR4 (TERNOP, sqdmlal, v4hi, v2si, si, hi)}, ++ {VAR4 (QUADOP, sqdmlal_lane, v4hi, v2si, si, hi) }, ++ {VAR2 (QUADOP, sqdmlal_laneq, v4hi, v2si) }, ++ {VAR2 (TERNOP, sqdmlal_n, v4hi, v2si) }, ++ {VAR2 (TERNOP, sqdmlal2, v8hi, v4si)}, ++ {VAR2 (QUADOP, sqdmlal2_lane, v8hi, v4si) }, ++ {VAR2 (QUADOP, sqdmlal2_laneq, v8hi, v4si) }, ++ {VAR2 (TERNOP, sqdmlal2_n, v8hi, v4si) }, ++ {VAR4 (TERNOP, sqdmlsl, v4hi, v2si, si, hi)}, ++ {VAR4 (QUADOP, sqdmlsl_lane, v4hi, v2si, si, hi) }, ++ {VAR2 (QUADOP, sqdmlsl_laneq, v4hi, v2si) }, ++ {VAR2 (TERNOP, sqdmlsl_n, v4hi, v2si) }, ++ {VAR2 (TERNOP, sqdmlsl2, v8hi, v4si)}, ++ {VAR2 (QUADOP, sqdmlsl2_lane, v8hi, v4si) }, ++ {VAR2 (QUADOP, sqdmlsl2_laneq, v8hi, v4si) }, ++ {VAR2 (TERNOP, sqdmlsl2_n, v8hi, v4si) }, ++ {VAR4 (BINOP, sqdmull, v4hi, v2si, si, hi)}, ++ {VAR4 (TERNOP, sqdmull_lane, v4hi, v2si, si, hi) }, ++ {VAR2 (TERNOP, sqdmull_laneq, v4hi, v2si) }, ++ {VAR2 (BINOP, sqdmull_n, v4hi, v2si) }, ++ {VAR2 (BINOP, sqdmull2, v8hi, v4si) }, ++ {VAR2 (TERNOP, sqdmull2_lane, v8hi, v4si) }, ++ {VAR2 (TERNOP, sqdmull2_laneq, v8hi, v4si) }, ++ {VAR2 (BINOP, sqdmull2_n, v8hi, v4si) }, ++ {VAR6 (BINOP, sqdmulh, v4hi, v2si, v8hi, v4si, si, hi)}, ++ {VAR6 (BINOP, sqrdmulh, v4hi, v2si, v8hi, v4si, si, hi)}, ++ {VAR8 (BINOP, sshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR3 (SHIFTIMM, sshll_n, v8qi, v4hi, v2si) }, ++ {VAR3 (SHIFTIMM, ushll_n, v8qi, v4hi, v2si) }, ++ {VAR3 (SHIFTIMM, sshll2_n, v16qi, v8hi, v4si) }, ++ {VAR3 (SHIFTIMM, ushll2_n, v16qi, v8hi, v4si) }, ++ {VAR8 (BINOP, ushl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (BINOP, sshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (BINOP, ushl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR11 (BINOP, sqshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi) }, ++ {VAR11 (BINOP, uqshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi) }, ++ {VAR8 (BINOP, srshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (BINOP, urshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR11 (BINOP, sqrshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi) }, ++ {VAR11 (BINOP, uqrshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi) }, ++ {VAR8 (SHIFTIMM, sshr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTIMM, ushr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTIMM, srshr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTIMM, urshr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTACC, ssra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTACC, usra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTACC, srsra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTACC, ursra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTINSERT, ssri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTINSERT, usri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTINSERT, ssli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR8 (SHIFTINSERT, usli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ {VAR11 (SHIFTIMM, sqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi) }, ++ {VAR11 (SHIFTIMM, sqshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi) }, ++ {VAR11 (SHIFTIMM, uqshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi) }, ++ { VAR6 (SHIFTIMM, sqshrun_n, di, v8hi, v4si, v2di, si, hi) }, ++ { VAR6 (SHIFTIMM, sqrshrun_n, di, v8hi, v4si, v2di, si, hi) }, ++ { VAR6 (SHIFTIMM, sqshrn_n, di, v8hi, v4si, v2di, si, hi) }, ++ { VAR6 (SHIFTIMM, uqshrn_n, di, v8hi, v4si, v2di, si, hi) }, ++ { VAR6 (SHIFTIMM, sqrshrn_n, di, v8hi, v4si, v2di, si, hi) }, ++ { VAR6 (SHIFTIMM, uqrshrn_n, di, v8hi, v4si, v2di, si, hi) }, ++ { VAR8 (BINOP, cmeq, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ { VAR8 (BINOP, cmge, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ { VAR8 (BINOP, cmgt, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ { VAR8 (BINOP, cmle, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ { VAR8 (BINOP, cmlt, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ { VAR8 (BINOP, cmhs, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ { VAR8 (BINOP, cmhi, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ { VAR8 (BINOP, cmtst, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, ++ { VAR6 (TERNOP, sqdmulh_lane, v4hi, v2si, v8hi, v4si, si, hi) }, ++ { VAR6 (TERNOP, sqrdmulh_lane, v4hi, v2si, v8hi, v4si, si, hi) }, ++ { VAR3 (BINOP, addp, v8qi, v4hi, v2si) }, ++ { VAR1 (UNOP, addp, di) }, ++ { VAR11 (BINOP, dup_lane, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di, ++ si, hi, qi) }, ++ { VAR3 (BINOP, fmax, v2sf, v4sf, v2df) }, ++ { VAR3 (BINOP, fmin, v2sf, v4sf, v2df) }, ++ { VAR6 (BINOP, smax, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, ++ { VAR6 (BINOP, smin, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, ++ { VAR6 (BINOP, umax, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, ++ { VAR6 (BINOP, umin, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, ++ { VAR3 (UNOP, sqrt, v2sf, v4sf, v2df) }, ++ {VAR12 (LOADSTRUCT, ld2, ++ v8qi, v4hi, v2si, v2sf, di, df, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR12 (LOADSTRUCT, ld3, ++ v8qi, v4hi, v2si, v2sf, di, df, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR12 (LOADSTRUCT, ld4, ++ v8qi, v4hi, v2si, v2sf, di, df, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR12 (STORESTRUCT, st2, ++ v8qi, v4hi, v2si, v2sf, di, df, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR12 (STORESTRUCT, st3, ++ v8qi, v4hi, v2si, v2sf, di, df, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++ {VAR12 (STORESTRUCT, st4, ++ v8qi, v4hi, v2si, v2sf, di, df, v16qi, v8hi, v4si, v4sf, v2di, v2df)}, ++}; ++ ++#undef CF ++#undef VAR1 ++#undef VAR2 ++#undef VAR3 ++#undef VAR4 ++#undef VAR5 ++#undef VAR6 ++#undef VAR7 ++#undef VAR8 ++#undef VAR9 ++#undef VAR10 ++#undef VAR11 ++ ++#define NUM_DREG_TYPES 6 ++#define NUM_QREG_TYPES 6 ++ ++void ++init_aarch64_simd_builtins (void) ++{ ++ unsigned int i, fcode = AARCH64_SIMD_BUILTIN_BASE; ++ ++ /* Scalar type nodes. */ ++ tree aarch64_simd_intQI_type_node; ++ tree aarch64_simd_intHI_type_node; ++ tree aarch64_simd_polyQI_type_node; ++ tree aarch64_simd_polyHI_type_node; ++ tree aarch64_simd_intSI_type_node; ++ tree aarch64_simd_intDI_type_node; ++ tree aarch64_simd_float_type_node; ++ tree aarch64_simd_double_type_node; ++ ++ /* Pointer to scalar type nodes. */ ++ tree intQI_pointer_node; ++ tree intHI_pointer_node; ++ tree intSI_pointer_node; ++ tree intDI_pointer_node; ++ tree float_pointer_node; ++ tree double_pointer_node; ++ ++ /* Const scalar type nodes. */ ++ tree const_intQI_node; ++ tree const_intHI_node; ++ tree const_intSI_node; ++ tree const_intDI_node; ++ tree const_float_node; ++ tree const_double_node; ++ ++ /* Pointer to const scalar type nodes. */ ++ tree const_intQI_pointer_node; ++ tree const_intHI_pointer_node; ++ tree const_intSI_pointer_node; ++ tree const_intDI_pointer_node; ++ tree const_float_pointer_node; ++ tree const_double_pointer_node; ++ ++ /* Vector type nodes. */ ++ tree V8QI_type_node; ++ tree V4HI_type_node; ++ tree V2SI_type_node; ++ tree V2SF_type_node; ++ tree V16QI_type_node; ++ tree V8HI_type_node; ++ tree V4SI_type_node; ++ tree V4SF_type_node; ++ tree V2DI_type_node; ++ tree V2DF_type_node; ++ ++ /* Scalar unsigned type nodes. */ ++ tree intUQI_type_node; ++ tree intUHI_type_node; ++ tree intUSI_type_node; ++ tree intUDI_type_node; ++ ++ /* Opaque integer types for structures of vectors. */ ++ tree intEI_type_node; ++ tree intOI_type_node; ++ tree intCI_type_node; ++ tree intXI_type_node; ++ ++ /* Pointer to vector type nodes. */ ++ tree V8QI_pointer_node; ++ tree V4HI_pointer_node; ++ tree V2SI_pointer_node; ++ tree V2SF_pointer_node; ++ tree V16QI_pointer_node; ++ tree V8HI_pointer_node; ++ tree V4SI_pointer_node; ++ tree V4SF_pointer_node; ++ tree V2DI_pointer_node; ++ tree V2DF_pointer_node; ++ ++ /* Operations which return results as pairs. */ ++ tree void_ftype_pv8qi_v8qi_v8qi; ++ tree void_ftype_pv4hi_v4hi_v4hi; ++ tree void_ftype_pv2si_v2si_v2si; ++ tree void_ftype_pv2sf_v2sf_v2sf; ++ tree void_ftype_pdi_di_di; ++ tree void_ftype_pv16qi_v16qi_v16qi; ++ tree void_ftype_pv8hi_v8hi_v8hi; ++ tree void_ftype_pv4si_v4si_v4si; ++ tree void_ftype_pv4sf_v4sf_v4sf; ++ tree void_ftype_pv2di_v2di_v2di; ++ tree void_ftype_pv2df_v2df_v2df; ++ ++ tree reinterp_ftype_dreg[NUM_DREG_TYPES][NUM_DREG_TYPES]; ++ tree reinterp_ftype_qreg[NUM_QREG_TYPES][NUM_QREG_TYPES]; ++ tree dreg_types[NUM_DREG_TYPES], qreg_types[NUM_QREG_TYPES]; ++ ++ /* Create distinguished type nodes for AARCH64_SIMD vector element types, ++ and pointers to values of such types, so we can detect them later. */ ++ aarch64_simd_intQI_type_node = ++ make_signed_type (GET_MODE_PRECISION (QImode)); ++ aarch64_simd_intHI_type_node = ++ make_signed_type (GET_MODE_PRECISION (HImode)); ++ aarch64_simd_polyQI_type_node = ++ make_signed_type (GET_MODE_PRECISION (QImode)); ++ aarch64_simd_polyHI_type_node = ++ make_signed_type (GET_MODE_PRECISION (HImode)); ++ aarch64_simd_intSI_type_node = ++ make_signed_type (GET_MODE_PRECISION (SImode)); ++ aarch64_simd_intDI_type_node = ++ make_signed_type (GET_MODE_PRECISION (DImode)); ++ aarch64_simd_float_type_node = make_node (REAL_TYPE); ++ aarch64_simd_double_type_node = make_node (REAL_TYPE); ++ TYPE_PRECISION (aarch64_simd_float_type_node) = FLOAT_TYPE_SIZE; ++ TYPE_PRECISION (aarch64_simd_double_type_node) = DOUBLE_TYPE_SIZE; ++ layout_type (aarch64_simd_float_type_node); ++ layout_type (aarch64_simd_double_type_node); ++ ++ /* Define typedefs which exactly correspond to the modes we are basing vector ++ types on. If you change these names you'll need to change ++ the table used by aarch64_mangle_type too. */ ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intQI_type_node, ++ "__builtin_aarch64_simd_qi"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intHI_type_node, ++ "__builtin_aarch64_simd_hi"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intSI_type_node, ++ "__builtin_aarch64_simd_si"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_float_type_node, ++ "__builtin_aarch64_simd_sf"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intDI_type_node, ++ "__builtin_aarch64_simd_di"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_double_type_node, ++ "__builtin_aarch64_simd_df"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_polyQI_type_node, ++ "__builtin_aarch64_simd_poly8"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_polyHI_type_node, ++ "__builtin_aarch64_simd_poly16"); ++ ++ intQI_pointer_node = build_pointer_type (aarch64_simd_intQI_type_node); ++ intHI_pointer_node = build_pointer_type (aarch64_simd_intHI_type_node); ++ intSI_pointer_node = build_pointer_type (aarch64_simd_intSI_type_node); ++ intDI_pointer_node = build_pointer_type (aarch64_simd_intDI_type_node); ++ float_pointer_node = build_pointer_type (aarch64_simd_float_type_node); ++ double_pointer_node = build_pointer_type (aarch64_simd_double_type_node); ++ ++ /* Next create constant-qualified versions of the above types. */ ++ const_intQI_node = build_qualified_type (aarch64_simd_intQI_type_node, ++ TYPE_QUAL_CONST); ++ const_intHI_node = build_qualified_type (aarch64_simd_intHI_type_node, ++ TYPE_QUAL_CONST); ++ const_intSI_node = build_qualified_type (aarch64_simd_intSI_type_node, ++ TYPE_QUAL_CONST); ++ const_intDI_node = build_qualified_type (aarch64_simd_intDI_type_node, ++ TYPE_QUAL_CONST); ++ const_float_node = build_qualified_type (aarch64_simd_float_type_node, ++ TYPE_QUAL_CONST); ++ const_double_node = build_qualified_type (aarch64_simd_double_type_node, ++ TYPE_QUAL_CONST); ++ ++ const_intQI_pointer_node = build_pointer_type (const_intQI_node); ++ const_intHI_pointer_node = build_pointer_type (const_intHI_node); ++ const_intSI_pointer_node = build_pointer_type (const_intSI_node); ++ const_intDI_pointer_node = build_pointer_type (const_intDI_node); ++ const_float_pointer_node = build_pointer_type (const_float_node); ++ const_double_pointer_node = build_pointer_type (const_double_node); ++ ++ /* Now create vector types based on our AARCH64 SIMD element types. */ ++ /* 64-bit vectors. */ ++ V8QI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intQI_type_node, V8QImode); ++ V4HI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intHI_type_node, V4HImode); ++ V2SI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intSI_type_node, V2SImode); ++ V2SF_type_node = ++ build_vector_type_for_mode (aarch64_simd_float_type_node, V2SFmode); ++ /* 128-bit vectors. */ ++ V16QI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intQI_type_node, V16QImode); ++ V8HI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intHI_type_node, V8HImode); ++ V4SI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intSI_type_node, V4SImode); ++ V4SF_type_node = ++ build_vector_type_for_mode (aarch64_simd_float_type_node, V4SFmode); ++ V2DI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intDI_type_node, V2DImode); ++ V2DF_type_node = ++ build_vector_type_for_mode (aarch64_simd_double_type_node, V2DFmode); ++ ++ /* Unsigned integer types for various mode sizes. */ ++ intUQI_type_node = make_unsigned_type (GET_MODE_PRECISION (QImode)); ++ intUHI_type_node = make_unsigned_type (GET_MODE_PRECISION (HImode)); ++ intUSI_type_node = make_unsigned_type (GET_MODE_PRECISION (SImode)); ++ intUDI_type_node = make_unsigned_type (GET_MODE_PRECISION (DImode)); ++ ++ (*lang_hooks.types.register_builtin_type) (intUQI_type_node, ++ "__builtin_aarch64_simd_uqi"); ++ (*lang_hooks.types.register_builtin_type) (intUHI_type_node, ++ "__builtin_aarch64_simd_uhi"); ++ (*lang_hooks.types.register_builtin_type) (intUSI_type_node, ++ "__builtin_aarch64_simd_usi"); ++ (*lang_hooks.types.register_builtin_type) (intUDI_type_node, ++ "__builtin_aarch64_simd_udi"); ++ ++ /* Opaque integer types for structures of vectors. */ ++ intEI_type_node = make_signed_type (GET_MODE_PRECISION (EImode)); ++ intOI_type_node = make_signed_type (GET_MODE_PRECISION (OImode)); ++ intCI_type_node = make_signed_type (GET_MODE_PRECISION (CImode)); ++ intXI_type_node = make_signed_type (GET_MODE_PRECISION (XImode)); ++ ++ (*lang_hooks.types.register_builtin_type) (intTI_type_node, ++ "__builtin_aarch64_simd_ti"); ++ (*lang_hooks.types.register_builtin_type) (intEI_type_node, ++ "__builtin_aarch64_simd_ei"); ++ (*lang_hooks.types.register_builtin_type) (intOI_type_node, ++ "__builtin_aarch64_simd_oi"); ++ (*lang_hooks.types.register_builtin_type) (intCI_type_node, ++ "__builtin_aarch64_simd_ci"); ++ (*lang_hooks.types.register_builtin_type) (intXI_type_node, ++ "__builtin_aarch64_simd_xi"); ++ ++ /* Pointers to vector types. */ ++ V8QI_pointer_node = build_pointer_type (V8QI_type_node); ++ V4HI_pointer_node = build_pointer_type (V4HI_type_node); ++ V2SI_pointer_node = build_pointer_type (V2SI_type_node); ++ V2SF_pointer_node = build_pointer_type (V2SF_type_node); ++ V16QI_pointer_node = build_pointer_type (V16QI_type_node); ++ V8HI_pointer_node = build_pointer_type (V8HI_type_node); ++ V4SI_pointer_node = build_pointer_type (V4SI_type_node); ++ V4SF_pointer_node = build_pointer_type (V4SF_type_node); ++ V2DI_pointer_node = build_pointer_type (V2DI_type_node); ++ V2DF_pointer_node = build_pointer_type (V2DF_type_node); ++ ++ /* Operations which return results as pairs. */ ++ void_ftype_pv8qi_v8qi_v8qi = ++ build_function_type_list (void_type_node, V8QI_pointer_node, ++ V8QI_type_node, V8QI_type_node, NULL); ++ void_ftype_pv4hi_v4hi_v4hi = ++ build_function_type_list (void_type_node, V4HI_pointer_node, ++ V4HI_type_node, V4HI_type_node, NULL); ++ void_ftype_pv2si_v2si_v2si = ++ build_function_type_list (void_type_node, V2SI_pointer_node, ++ V2SI_type_node, V2SI_type_node, NULL); ++ void_ftype_pv2sf_v2sf_v2sf = ++ build_function_type_list (void_type_node, V2SF_pointer_node, ++ V2SF_type_node, V2SF_type_node, NULL); ++ void_ftype_pdi_di_di = ++ build_function_type_list (void_type_node, intDI_pointer_node, ++ aarch64_simd_intDI_type_node, ++ aarch64_simd_intDI_type_node, NULL); ++ void_ftype_pv16qi_v16qi_v16qi = ++ build_function_type_list (void_type_node, V16QI_pointer_node, ++ V16QI_type_node, V16QI_type_node, NULL); ++ void_ftype_pv8hi_v8hi_v8hi = ++ build_function_type_list (void_type_node, V8HI_pointer_node, ++ V8HI_type_node, V8HI_type_node, NULL); ++ void_ftype_pv4si_v4si_v4si = ++ build_function_type_list (void_type_node, V4SI_pointer_node, ++ V4SI_type_node, V4SI_type_node, NULL); ++ void_ftype_pv4sf_v4sf_v4sf = ++ build_function_type_list (void_type_node, V4SF_pointer_node, ++ V4SF_type_node, V4SF_type_node, NULL); ++ void_ftype_pv2di_v2di_v2di = ++ build_function_type_list (void_type_node, V2DI_pointer_node, ++ V2DI_type_node, V2DI_type_node, NULL); ++ void_ftype_pv2df_v2df_v2df = ++ build_function_type_list (void_type_node, V2DF_pointer_node, ++ V2DF_type_node, V2DF_type_node, NULL); ++ ++ dreg_types[0] = V8QI_type_node; ++ dreg_types[1] = V4HI_type_node; ++ dreg_types[2] = V2SI_type_node; ++ dreg_types[3] = V2SF_type_node; ++ dreg_types[4] = aarch64_simd_intDI_type_node; ++ dreg_types[5] = aarch64_simd_double_type_node; ++ ++ qreg_types[0] = V16QI_type_node; ++ qreg_types[1] = V8HI_type_node; ++ qreg_types[2] = V4SI_type_node; ++ qreg_types[3] = V4SF_type_node; ++ qreg_types[4] = V2DI_type_node; ++ qreg_types[5] = V2DF_type_node; ++ ++ /* If NUM_DREG_TYPES != NUM_QREG_TYPES, we will need separate nested loops ++ for qreg and dreg reinterp inits. */ ++ for (i = 0; i < NUM_DREG_TYPES; i++) ++ { ++ int j; ++ for (j = 0; j < NUM_DREG_TYPES; j++) ++ { ++ reinterp_ftype_dreg[i][j] ++ = build_function_type_list (dreg_types[i], dreg_types[j], NULL); ++ reinterp_ftype_qreg[i][j] ++ = build_function_type_list (qreg_types[i], qreg_types[j], NULL); ++ } ++ } ++ ++ for (i = 0; i < ARRAY_SIZE (aarch64_simd_builtin_data); i++) ++ { ++ aarch64_simd_builtin_datum *d = &aarch64_simd_builtin_data[i]; ++ unsigned int j, codeidx = 0; ++ ++ d->base_fcode = fcode; ++ ++ for (j = 0; j < T_MAX; j++) ++ { ++ const char *const modenames[] = { ++ "v8qi", "v4hi", "v2si", "v2sf", "di", "df", ++ "v16qi", "v8hi", "v4si", "v4sf", "v2di", "v2df", ++ "ti", "ei", "oi", "xi", "si", "hi", "qi" ++ }; ++ char namebuf[60]; ++ tree ftype = NULL; ++ enum insn_code icode; ++ int is_load = 0; ++ int is_store = 0; ++ ++ /* Skip if particular mode not supported. */ ++ if ((d->bits & (1 << j)) == 0) ++ continue; ++ ++ icode = d->codes[codeidx++]; ++ ++ switch (d->itype) ++ { ++ case AARCH64_SIMD_LOAD1: ++ case AARCH64_SIMD_LOAD1LANE: ++ case AARCH64_SIMD_LOADSTRUCTLANE: ++ case AARCH64_SIMD_LOADSTRUCT: ++ is_load = 1; ++ /* Fall through. */ ++ case AARCH64_SIMD_STORE1: ++ case AARCH64_SIMD_STORE1LANE: ++ case AARCH64_SIMD_STORESTRUCTLANE: ++ case AARCH64_SIMD_STORESTRUCT: ++ if (!is_load) ++ is_store = 1; ++ /* Fall through. */ ++ case AARCH64_SIMD_UNOP: ++ case AARCH64_SIMD_BINOP: ++ case AARCH64_SIMD_LOGICBINOP: ++ case AARCH64_SIMD_SHIFTINSERT: ++ case AARCH64_SIMD_TERNOP: ++ case AARCH64_SIMD_QUADOP: ++ case AARCH64_SIMD_GETLANE: ++ case AARCH64_SIMD_SETLANE: ++ case AARCH64_SIMD_CREATE: ++ case AARCH64_SIMD_DUP: ++ case AARCH64_SIMD_DUPLANE: ++ case AARCH64_SIMD_SHIFTIMM: ++ case AARCH64_SIMD_SHIFTACC: ++ case AARCH64_SIMD_COMBINE: ++ case AARCH64_SIMD_SPLIT: ++ case AARCH64_SIMD_CONVERT: ++ case AARCH64_SIMD_FIXCONV: ++ case AARCH64_SIMD_LANEMUL: ++ case AARCH64_SIMD_LANEMULL: ++ case AARCH64_SIMD_LANEMULH: ++ case AARCH64_SIMD_LANEMAC: ++ case AARCH64_SIMD_SCALARMUL: ++ case AARCH64_SIMD_SCALARMULL: ++ case AARCH64_SIMD_SCALARMULH: ++ case AARCH64_SIMD_SCALARMAC: ++ case AARCH64_SIMD_SELECT: ++ case AARCH64_SIMD_VTBL: ++ case AARCH64_SIMD_VTBX: ++ { ++ int k; ++ tree return_type = void_type_node, args = void_list_node; ++ ++ /* Build a function type directly from the insn_data for this ++ builtin. The build_function_type() function takes care of ++ removing duplicates for us. */ ++ for (k = insn_data[icode].n_operands - 1; k >= 0; k--) ++ { ++ tree eltype; ++ ++ /* Skip an internal operand for vget_{low, high}. */ ++ if (k == 2 && d->itype == AARCH64_SIMD_SPLIT) ++ continue; ++ ++ if (is_load && k == 1) ++ { ++ /* AdvSIMD load patterns always have the memory operand ++ (a DImode pointer) in the operand 1 position. We ++ want a const pointer to the element type in that ++ position. */ ++ gcc_assert (insn_data[icode].operand[k].mode == ++ DImode); ++ ++ switch (1 << j) ++ { ++ case T_V8QI: ++ case T_V16QI: ++ eltype = const_intQI_pointer_node; ++ break; ++ ++ case T_V4HI: ++ case T_V8HI: ++ eltype = const_intHI_pointer_node; ++ break; ++ ++ case T_V2SI: ++ case T_V4SI: ++ eltype = const_intSI_pointer_node; ++ break; ++ ++ case T_V2SF: ++ case T_V4SF: ++ eltype = const_float_pointer_node; ++ break; ++ ++ case T_DI: ++ case T_V2DI: ++ eltype = const_intDI_pointer_node; ++ break; ++ ++ case T_DF: ++ case T_V2DF: ++ eltype = const_double_pointer_node; ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ else if (is_store && k == 0) ++ { ++ /* Similarly, AdvSIMD store patterns use operand 0 as ++ the memory location to store to (a DImode pointer). ++ Use a pointer to the element type of the store in ++ that position. */ ++ gcc_assert (insn_data[icode].operand[k].mode == ++ DImode); ++ ++ switch (1 << j) ++ { ++ case T_V8QI: ++ case T_V16QI: ++ eltype = intQI_pointer_node; ++ break; ++ ++ case T_V4HI: ++ case T_V8HI: ++ eltype = intHI_pointer_node; ++ break; ++ ++ case T_V2SI: ++ case T_V4SI: ++ eltype = intSI_pointer_node; ++ break; ++ ++ case T_V2SF: ++ case T_V4SF: ++ eltype = float_pointer_node; ++ break; ++ ++ case T_DI: ++ case T_V2DI: ++ eltype = intDI_pointer_node; ++ break; ++ ++ case T_DF: ++ case T_V2DF: ++ eltype = double_pointer_node; ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ else ++ { ++ switch (insn_data[icode].operand[k].mode) ++ { ++ case VOIDmode: ++ eltype = void_type_node; ++ break; ++ /* Scalars. */ ++ case QImode: ++ eltype = aarch64_simd_intQI_type_node; ++ break; ++ case HImode: ++ eltype = aarch64_simd_intHI_type_node; ++ break; ++ case SImode: ++ eltype = aarch64_simd_intSI_type_node; ++ break; ++ case SFmode: ++ eltype = aarch64_simd_float_type_node; ++ break; ++ case DFmode: ++ eltype = aarch64_simd_double_type_node; ++ break; ++ case DImode: ++ eltype = aarch64_simd_intDI_type_node; ++ break; ++ case TImode: ++ eltype = intTI_type_node; ++ break; ++ case EImode: ++ eltype = intEI_type_node; ++ break; ++ case OImode: ++ eltype = intOI_type_node; ++ break; ++ case CImode: ++ eltype = intCI_type_node; ++ break; ++ case XImode: ++ eltype = intXI_type_node; ++ break; ++ /* 64-bit vectors. */ ++ case V8QImode: ++ eltype = V8QI_type_node; ++ break; ++ case V4HImode: ++ eltype = V4HI_type_node; ++ break; ++ case V2SImode: ++ eltype = V2SI_type_node; ++ break; ++ case V2SFmode: ++ eltype = V2SF_type_node; ++ break; ++ /* 128-bit vectors. */ ++ case V16QImode: ++ eltype = V16QI_type_node; ++ break; ++ case V8HImode: ++ eltype = V8HI_type_node; ++ break; ++ case V4SImode: ++ eltype = V4SI_type_node; ++ break; ++ case V4SFmode: ++ eltype = V4SF_type_node; ++ break; ++ case V2DImode: ++ eltype = V2DI_type_node; ++ break; ++ case V2DFmode: ++ eltype = V2DF_type_node; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ } ++ ++ if (k == 0 && !is_store) ++ return_type = eltype; ++ else ++ args = tree_cons (NULL_TREE, eltype, args); ++ } ++ ++ ftype = build_function_type (return_type, args); ++ } ++ break; ++ ++ case AARCH64_SIMD_RESULTPAIR: ++ { ++ switch (insn_data[icode].operand[1].mode) ++ { ++ case V8QImode: ++ ftype = void_ftype_pv8qi_v8qi_v8qi; ++ break; ++ case V4HImode: ++ ftype = void_ftype_pv4hi_v4hi_v4hi; ++ break; ++ case V2SImode: ++ ftype = void_ftype_pv2si_v2si_v2si; ++ break; ++ case V2SFmode: ++ ftype = void_ftype_pv2sf_v2sf_v2sf; ++ break; ++ case DImode: ++ ftype = void_ftype_pdi_di_di; ++ break; ++ case V16QImode: ++ ftype = void_ftype_pv16qi_v16qi_v16qi; ++ break; ++ case V8HImode: ++ ftype = void_ftype_pv8hi_v8hi_v8hi; ++ break; ++ case V4SImode: ++ ftype = void_ftype_pv4si_v4si_v4si; ++ break; ++ case V4SFmode: ++ ftype = void_ftype_pv4sf_v4sf_v4sf; ++ break; ++ case V2DImode: ++ ftype = void_ftype_pv2di_v2di_v2di; ++ break; ++ case V2DFmode: ++ ftype = void_ftype_pv2df_v2df_v2df; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ } ++ break; ++ ++ case AARCH64_SIMD_REINTERP: ++ { ++ /* We iterate over 6 doubleword types, then 6 quadword ++ types. */ ++ int rhs_d = j % NUM_DREG_TYPES; ++ int rhs_q = (j - NUM_DREG_TYPES) % NUM_QREG_TYPES; ++ switch (insn_data[icode].operand[0].mode) ++ { ++ case V8QImode: ++ ftype = reinterp_ftype_dreg[0][rhs_d]; ++ break; ++ case V4HImode: ++ ftype = reinterp_ftype_dreg[1][rhs_d]; ++ break; ++ case V2SImode: ++ ftype = reinterp_ftype_dreg[2][rhs_d]; ++ break; ++ case V2SFmode: ++ ftype = reinterp_ftype_dreg[3][rhs_d]; ++ break; ++ case DImode: ++ ftype = reinterp_ftype_dreg[4][rhs_d]; ++ break; ++ case DFmode: ++ ftype = reinterp_ftype_dreg[5][rhs_d]; ++ break; ++ case V16QImode: ++ ftype = reinterp_ftype_qreg[0][rhs_q]; ++ break; ++ case V8HImode: ++ ftype = reinterp_ftype_qreg[1][rhs_q]; ++ break; ++ case V4SImode: ++ ftype = reinterp_ftype_qreg[2][rhs_q]; ++ break; ++ case V4SFmode: ++ ftype = reinterp_ftype_qreg[3][rhs_q]; ++ break; ++ case V2DImode: ++ ftype = reinterp_ftype_qreg[4][rhs_q]; ++ break; ++ case V2DFmode: ++ ftype = reinterp_ftype_qreg[5][rhs_q]; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ } ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ ++ gcc_assert (ftype != NULL); ++ ++ snprintf (namebuf, sizeof (namebuf), "__builtin_aarch64_%s%s", ++ d->name, modenames[j]); ++ ++ add_builtin_function (namebuf, ftype, fcode++, BUILT_IN_MD, NULL, ++ NULL_TREE); ++ } ++ } ++} ++ ++static int ++aarch64_simd_builtin_compare (const void *a, const void *b) ++{ ++ const aarch64_simd_builtin_datum *const key = ++ (const aarch64_simd_builtin_datum *) a; ++ const aarch64_simd_builtin_datum *const memb = ++ (const aarch64_simd_builtin_datum *) b; ++ unsigned int soughtcode = key->base_fcode; ++ ++ if (soughtcode >= memb->base_fcode ++ && soughtcode < memb->base_fcode + memb->num_vars) ++ return 0; ++ else if (soughtcode < memb->base_fcode) ++ return -1; ++ else ++ return 1; ++} ++ ++ ++static enum insn_code ++locate_simd_builtin_icode (int fcode, aarch64_simd_itype * itype) ++{ ++ aarch64_simd_builtin_datum key ++ = { NULL, (aarch64_simd_itype) 0, 0, {CODE_FOR_nothing}, 0, 0}; ++ aarch64_simd_builtin_datum *found; ++ int idx; ++ ++ key.base_fcode = fcode; ++ found = (aarch64_simd_builtin_datum *) ++ bsearch (&key, &aarch64_simd_builtin_data[0], ++ ARRAY_SIZE (aarch64_simd_builtin_data), ++ sizeof (aarch64_simd_builtin_data[0]), ++ aarch64_simd_builtin_compare); ++ gcc_assert (found); ++ idx = fcode - (int) found->base_fcode; ++ gcc_assert (idx >= 0 && idx < T_MAX && idx < (int) found->num_vars); ++ ++ if (itype) ++ *itype = found->itype; ++ ++ return found->codes[idx]; ++} ++ ++typedef enum ++{ ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP ++} builtin_simd_arg; ++ ++#define SIMD_MAX_BUILTIN_ARGS 5 ++ ++static rtx ++aarch64_simd_expand_args (rtx target, int icode, int have_retval, ++ tree exp, ...) ++{ ++ va_list ap; ++ rtx pat; ++ tree arg[SIMD_MAX_BUILTIN_ARGS]; ++ rtx op[SIMD_MAX_BUILTIN_ARGS]; ++ enum machine_mode tmode = insn_data[icode].operand[0].mode; ++ enum machine_mode mode[SIMD_MAX_BUILTIN_ARGS]; ++ int argc = 0; ++ ++ if (have_retval ++ && (!target ++ || GET_MODE (target) != tmode ++ || !(*insn_data[icode].operand[0].predicate) (target, tmode))) ++ target = gen_reg_rtx (tmode); ++ ++ va_start (ap, exp); ++ ++ for (;;) ++ { ++ builtin_simd_arg thisarg = (builtin_simd_arg) va_arg (ap, int); ++ ++ if (thisarg == SIMD_ARG_STOP) ++ break; ++ else ++ { ++ arg[argc] = CALL_EXPR_ARG (exp, argc); ++ op[argc] = expand_normal (arg[argc]); ++ mode[argc] = insn_data[icode].operand[argc + have_retval].mode; ++ ++ switch (thisarg) ++ { ++ case SIMD_ARG_COPY_TO_REG: ++ /*gcc_assert (GET_MODE (op[argc]) == mode[argc]); */ ++ if (!(*insn_data[icode].operand[argc + have_retval].predicate) ++ (op[argc], mode[argc])) ++ op[argc] = copy_to_mode_reg (mode[argc], op[argc]); ++ break; ++ ++ case SIMD_ARG_CONSTANT: ++ if (!(*insn_data[icode].operand[argc + have_retval].predicate) ++ (op[argc], mode[argc])) ++ error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, " ++ "expected %", argc + 1); ++ break; ++ ++ case SIMD_ARG_STOP: ++ gcc_unreachable (); ++ } ++ ++ argc++; ++ } ++ } ++ ++ va_end (ap); ++ ++ if (have_retval) ++ switch (argc) ++ { ++ case 1: ++ pat = GEN_FCN (icode) (target, op[0]); ++ break; ++ ++ case 2: ++ pat = GEN_FCN (icode) (target, op[0], op[1]); ++ break; ++ ++ case 3: ++ pat = GEN_FCN (icode) (target, op[0], op[1], op[2]); ++ break; ++ ++ case 4: ++ pat = GEN_FCN (icode) (target, op[0], op[1], op[2], op[3]); ++ break; ++ ++ case 5: ++ pat = GEN_FCN (icode) (target, op[0], op[1], op[2], op[3], op[4]); ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ else ++ switch (argc) ++ { ++ case 1: ++ pat = GEN_FCN (icode) (op[0]); ++ break; ++ ++ case 2: ++ pat = GEN_FCN (icode) (op[0], op[1]); ++ break; ++ ++ case 3: ++ pat = GEN_FCN (icode) (op[0], op[1], op[2]); ++ break; ++ ++ case 4: ++ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]); ++ break; ++ ++ case 5: ++ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4]); ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ ++ if (!pat) ++ return 0; ++ ++ emit_insn (pat); ++ ++ return target; ++} ++ ++/* Expand an AArch64 AdvSIMD builtin(intrinsic). */ ++rtx ++aarch64_simd_expand_builtin (int fcode, tree exp, rtx target) ++{ ++ aarch64_simd_itype itype; ++ enum insn_code icode = locate_simd_builtin_icode (fcode, &itype); ++ ++ switch (itype) ++ { ++ case AARCH64_SIMD_UNOP: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_BINOP: ++ { ++ rtx arg2 = expand_normal (CALL_EXPR_ARG (exp, 1)); ++ /* Handle constants only if the predicate allows it. */ ++ bool op1_const_int_p = ++ (CONST_INT_P (arg2) ++ && (*insn_data[icode].operand[2].predicate) ++ (arg2, insn_data[icode].operand[2].mode)); ++ return aarch64_simd_expand_args ++ (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ op1_const_int_p ? SIMD_ARG_CONSTANT : SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_STOP); ++ } ++ ++ case AARCH64_SIMD_TERNOP: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_QUADOP: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_STOP); ++ case AARCH64_SIMD_LOAD1: ++ case AARCH64_SIMD_LOADSTRUCT: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_STORESTRUCT: ++ return aarch64_simd_expand_args (target, icode, 0, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_REINTERP: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_CREATE: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_COMBINE: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_GETLANE: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_SETLANE: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_SHIFTIMM: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_SHIFTACC: ++ case AARCH64_SIMD_SHIFTINSERT: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP); ++ ++ default: ++ gcc_unreachable (); ++ } ++} + +Property changes on: gcc/config/aarch64/aarch64-builtins.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/aarch64-tune.md +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-tune.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-tune.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,5 @@ ++;; -*- buffer-read-only: t -*- ++;; Generated automatically by gentune.sh from aarch64-cores.def ++(define_attr "tune" ++ "large,small" ++ (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) +Index: gcc/config/aarch64/aarch64-opts.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-opts.h (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-opts.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,64 @@ ++/* Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* Definitions for option handling for AArch64. */ ++ ++#ifndef GCC_AARCH64_OPTS_H ++#define GCC_AARCH64_OPTS_H ++ ++/* The various cores that implement AArch64. */ ++enum aarch64_processor ++{ ++#define AARCH64_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ ++ IDENT, ++#include "aarch64-cores.def" ++#undef AARCH64_CORE ++ /* Used to indicate that no processor has been specified. */ ++ generic, ++ /* Used to mark the end of the processor table. */ ++ aarch64_none ++}; ++ ++/* TLS types. */ ++enum aarch64_tls_type { ++ TLS_TRADITIONAL, ++ TLS_DESCRIPTORS ++}; ++ ++/* The code model defines the address generation strategy. ++ Most have a PIC and non-PIC variant. */ ++enum aarch64_code_model { ++ /* Static code and data fit within a 1MB region. ++ Not fully implemented, mostly treated as SMALL. */ ++ AARCH64_CMODEL_TINY, ++ /* Static code, data and GOT/PLT fit within a 1MB region. ++ Not fully implemented, mostly treated as SMALL_PIC. */ ++ AARCH64_CMODEL_TINY_PIC, ++ /* Static code and data fit within a 4GB region. ++ The default non-PIC code model. */ ++ AARCH64_CMODEL_SMALL, ++ /* Static code, data and GOT/PLT fit within a 4GB region. ++ The default PIC code model. */ ++ AARCH64_CMODEL_SMALL_PIC, ++ /* No assumptions about addresses of code and data. ++ The PIC variant is not yet implemented. */ ++ AARCH64_CMODEL_LARGE ++}; ++ ++#endif + +Property changes on: gcc/config/aarch64/aarch64-opts.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/aarch64-generic.md +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-generic.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-generic.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,38 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; Generic scheduler ++ ++(define_automaton "aarch64") ++ ++(define_cpu_unit "core" "aarch64") ++ ++(define_attr "is_load" "yes,no" ++ (if_then_else (eq_attr "v8type" "fpsimd_load,fpsimd_load2,load1,load2") ++ (const_string "yes") ++ (const_string "no"))) ++ ++(define_insn_reservation "load" 2 ++ (eq_attr "is_load" "yes") ++ "core") ++ ++(define_insn_reservation "nonload" 1 ++ (eq_attr "is_load" "no") ++ "core") +Index: gcc/config/aarch64/aarch64-protos.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-protos.h (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-protos.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,258 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++ ++#ifndef GCC_AARCH64_PROTOS_H ++#define GCC_AARCH64_PROTOS_H ++ ++ /* This generator struct and enum is used to wrap a function pointer ++ to a function that generates an RTX fragment but takes either 3 or ++ 4 operands. ++ ++ The omn flavour, wraps a function that generates a synchronization ++ instruction from 3 operands: old value, memory and new value. ++ ++ The omrn flavour, wraps a function that generates a synchronization ++ instruction from 4 operands: old value, memory, required value and ++ new value. */ ++ ++enum aarch64_sync_generator_tag ++{ ++ aarch64_sync_generator_omn, ++ aarch64_sync_generator_omrn ++}; ++ ++ /* Wrapper to pass around a polymorphic pointer to a sync instruction ++ generator and. */ ++struct aarch64_sync_generator ++{ ++ enum aarch64_sync_generator_tag op; ++ union ++ { ++ rtx (*omn) (rtx, rtx, rtx); ++ rtx (*omrn) (rtx, rtx, rtx, rtx); ++ } u; ++}; ++ ++/* ++ SYMBOL_CONTEXT_ADR ++ The symbol is used in a load-address operation. ++ SYMBOL_CONTEXT_MEM ++ The symbol is used as the address in a MEM. ++ */ ++enum aarch64_symbol_context ++{ ++ SYMBOL_CONTEXT_MEM, ++ SYMBOL_CONTEXT_ADR ++}; ++ ++/* SYMBOL_SMALL_ABSOLUTE: Generate symbol accesses through ++ high and lo relocs that calculate the base address using a PC ++ relative reloc. ++ So to get the address of foo, we generate ++ adrp x0, foo ++ add x0, x0, :lo12:foo ++ ++ To load or store something to foo, we could use the corresponding ++ load store variants that generate an ++ ldr x0, [x0,:lo12:foo] ++ or ++ str x1, [x0, :lo12:foo] ++ ++ This corresponds to the small code model of the compiler. ++ ++ SYMBOL_SMALL_GOT: Similar to the one above but this ++ gives us the GOT entry of the symbol being referred to : ++ Thus calculating the GOT entry for foo is done using the ++ following sequence of instructions. The ADRP instruction ++ gets us to the page containing the GOT entry of the symbol ++ and the got_lo12 gets us the actual offset in it. ++ ++ adrp x0, :got:foo ++ ldr x0, [x0, :gotoff_lo12:foo] ++ ++ This corresponds to the small PIC model of the compiler. ++ ++ SYMBOL_SMALL_TLSGD ++ SYMBOL_SMALL_TLSDESC ++ SYMBOL_SMALL_GOTTPREL ++ SYMBOL_SMALL_TPREL ++ Each of of these represents a thread-local symbol, and corresponds to the ++ thread local storage relocation operator for the symbol being referred to. ++ ++ SYMBOL_FORCE_TO_MEM : Global variables are addressed using ++ constant pool. All variable addresses are spilled into constant ++ pools. The constant pools themselves are addressed using PC ++ relative accesses. This only works for the large code model. ++ */ ++enum aarch64_symbol_type ++{ ++ SYMBOL_SMALL_ABSOLUTE, ++ SYMBOL_SMALL_GOT, ++ SYMBOL_SMALL_TLSGD, ++ SYMBOL_SMALL_TLSDESC, ++ SYMBOL_SMALL_GOTTPREL, ++ SYMBOL_SMALL_TPREL, ++ SYMBOL_FORCE_TO_MEM ++}; ++ ++/* A set of tuning parameters contains references to size and time ++ cost models and vectors for address cost calculations, register ++ move costs and memory move costs. */ ++ ++/* Extra costs for specific insns. Only records the cost above a ++ single insn. */ ++ ++struct cpu_rtx_cost_table ++{ ++ const int memory_load; ++ const int memory_store; ++ const int register_shift; ++ const int int_divide; ++ const int float_divide; ++ const int double_divide; ++ const int int_multiply; ++ const int int_multiply_extend; ++ const int int_multiply_add; ++ const int int_multiply_extend_add; ++ const int float_multiply; ++ const int double_multiply; ++}; ++ ++/* Additional cost for addresses. */ ++struct cpu_addrcost_table ++{ ++ const int pre_modify; ++ const int post_modify; ++ const int register_offset; ++ const int register_extend; ++ const int imm_offset; ++}; ++ ++/* Additional costs for register copies. Cost is for one register. */ ++struct cpu_regmove_cost ++{ ++ const int GP2GP; ++ const int GP2FP; ++ const int FP2GP; ++ const int FP2FP; ++}; ++ ++struct tune_params ++{ ++ const struct cpu_rtx_cost_table *const insn_extra_cost; ++ const struct cpu_addrcost_table *const addr_cost; ++ const struct cpu_regmove_cost *const regmove_cost; ++ const int memmov_cost; ++}; ++ ++HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned); ++bool aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode); ++bool aarch64_const_double_zero_rtx_p (rtx); ++bool aarch64_constant_address_p (rtx); ++bool aarch64_function_arg_regno_p (unsigned); ++bool aarch64_gen_movmemqi (rtx *); ++bool aarch64_is_extend_from_extract (enum machine_mode, rtx, rtx); ++bool aarch64_is_long_call_p (rtx); ++bool aarch64_label_mentioned_p (rtx); ++bool aarch64_legitimate_pic_operand_p (rtx); ++bool aarch64_move_imm (HOST_WIDE_INT, enum machine_mode); ++bool aarch64_pad_arg_upward (enum machine_mode, const_tree); ++bool aarch64_pad_reg_upward (enum machine_mode, const_tree, bool); ++bool aarch64_regno_ok_for_base_p (int, bool); ++bool aarch64_regno_ok_for_index_p (int, bool); ++bool aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode); ++bool aarch64_simd_imm_zero_p (rtx, enum machine_mode); ++bool aarch64_simd_shift_imm_p (rtx, enum machine_mode, bool); ++bool aarch64_symbolic_address_p (rtx); ++bool aarch64_symbolic_constant_p (rtx, enum aarch64_symbol_context, ++ enum aarch64_symbol_type *); ++bool aarch64_uimm12_shift (HOST_WIDE_INT); ++const char *aarch64_output_casesi (rtx *); ++const char *aarch64_output_sync_insn (rtx, rtx *); ++const char *aarch64_output_sync_lock_release (rtx, rtx); ++enum aarch64_symbol_type aarch64_classify_symbol (rtx, ++ enum aarch64_symbol_context); ++enum aarch64_symbol_type aarch64_classify_tls_symbol (rtx); ++int aarch64_asm_preferred_eh_data_format (int, int); ++int aarch64_hard_regno_mode_ok (unsigned, enum machine_mode); ++int aarch64_hard_regno_nregs (unsigned, enum machine_mode); ++int aarch64_simd_attr_length_move (rtx); ++int aarch64_simd_immediate_valid_for_move (rtx, enum machine_mode, rtx *, ++ int *, unsigned char *, int *, ++ int *); ++int aarch64_uxt_size (int, HOST_WIDE_INT); ++rtx aarch64_final_eh_return_addr (void); ++rtx aarch64_legitimize_reload_address (rtx *, enum machine_mode, int, int, int); ++const char *aarch64_output_move_struct (rtx *operands); ++rtx aarch64_return_addr (int, rtx); ++rtx aarch64_simd_gen_const_vector_dup (enum machine_mode, int); ++bool aarch64_simd_mem_operand_p (rtx); ++rtx aarch64_simd_vect_par_cnst_half (enum machine_mode, bool); ++rtx aarch64_tls_get_addr (void); ++unsigned aarch64_dbx_register_number (unsigned); ++unsigned aarch64_regno_regclass (unsigned); ++unsigned aarch64_trampoline_size (void); ++unsigned aarch64_sync_loop_insns (rtx, rtx *); ++void aarch64_asm_output_labelref (FILE *, const char *); ++void aarch64_elf_asm_named_section (const char *, unsigned, tree); ++void aarch64_expand_epilogue (bool); ++void aarch64_expand_mov_immediate (rtx, rtx); ++void aarch64_expand_prologue (void); ++void aarch64_expand_sync (enum machine_mode, struct aarch64_sync_generator *, ++ rtx, rtx, rtx, rtx); ++void aarch64_function_profiler (FILE *, int); ++void aarch64_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx, ++ const_tree, unsigned); ++void aarch64_init_expanders (void); ++void aarch64_print_operand (FILE *, rtx, char); ++void aarch64_print_operand_address (FILE *, rtx); ++ ++/* Initialize builtins for SIMD intrinsics. */ ++void init_aarch64_simd_builtins (void); ++ ++void aarch64_simd_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); ++void aarch64_simd_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int); ++ ++/* Emit code to place a AdvSIMD pair result in memory locations (with equal ++ registers). */ ++void aarch64_simd_emit_pair_result_insn (enum machine_mode, ++ rtx (*intfn) (rtx, rtx, rtx), rtx, ++ rtx); ++ ++/* Expand builtins for SIMD intrinsics. */ ++rtx aarch64_simd_expand_builtin (int, tree, rtx); ++ ++void aarch64_simd_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); ++ ++/* Emit code for reinterprets. */ ++void aarch64_simd_reinterpret (rtx, rtx); ++ ++void aarch64_split_doubleword_move (rtx, rtx); ++ ++#if defined (RTX_CODE) ++ ++bool aarch64_legitimate_address_p (enum machine_mode, rtx, RTX_CODE, bool); ++enum machine_mode aarch64_select_cc_mode (RTX_CODE, rtx, rtx); ++rtx aarch64_gen_compare_reg (RTX_CODE, rtx, rtx); ++ ++#endif /* RTX_CODE */ ++ ++#endif /* GCC_AARCH64_PROTOS_H */ + +Property changes on: gcc/config/aarch64/aarch64-protos.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/constraints.md +=================================================================== +--- a/src/gcc/config/aarch64/constraints.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/constraints.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,167 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_register_constraint "k" "STACK_REG" ++ "@internal The stack register.") ++ ++(define_register_constraint "w" "FP_REGS" ++ "Floating point and SIMD vector registers.") ++ ++(define_register_constraint "x" "FP_LO_REGS" ++ "Floating point and SIMD vector registers V0 - V15.") ++ ++(define_constraint "I" ++ "A constant that can be used with an ADD operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_uimm12_shift (ival)"))) ++ ++(define_constraint "J" ++ "A constant that can be used with a SUB operation (once negated)." ++ (and (match_code "const_int") ++ (match_test "aarch64_uimm12_shift (-ival)"))) ++ ++;; We can't use the mode of a CONST_INT to determine the context in ++;; which it is being used, so we must have a separate constraint for ++;; each context. ++ ++(define_constraint "K" ++ "A constant that can be used with a 32-bit logical operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_bitmask_imm (ival, SImode)"))) ++ ++(define_constraint "L" ++ "A constant that can be used with a 64-bit logical operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_bitmask_imm (ival, DImode)"))) ++ ++(define_constraint "M" ++ "A constant that can be used with a 32-bit MOV immediate operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_move_imm (ival, SImode)"))) ++ ++(define_constraint "N" ++ "A constant that can be used with a 64-bit MOV immediate operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_move_imm (ival, DImode)"))) ++ ++(define_constraint "S" ++ "A constraint that matches an absolute symbolic address." ++ (and (match_code "const,symbol_ref,label_ref") ++ (match_test "aarch64_symbolic_address_p (op)"))) ++ ++(define_constraint "Y" ++ "Floating point constant zero." ++ (and (match_code "const_double") ++ (match_test "aarch64_const_double_zero_rtx_p (op)"))) ++ ++(define_constraint "Z" ++ "Integer constant zero." ++ (match_test "op == const0_rtx")) ++ ++(define_constraint "Usa" ++ "A constraint that matches an absolute symbolic address." ++ (and (match_code "const,symbol_ref") ++ (match_test "aarch64_symbolic_address_p (op)"))) ++ ++(define_constraint "Ush" ++ "A constraint that matches an absolute symbolic address high part." ++ (and (match_code "high") ++ (match_test "aarch64_valid_symref (XEXP (op, 0), GET_MODE (XEXP (op, 0)))"))) ++ ++(define_constraint "Uss" ++ "@internal ++ A constraint that matches an immediate shift constant in SImode." ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) ival < 32"))) ++ ++(define_constraint "Usd" ++ "@internal ++ A constraint that matches an immediate shift constant in DImode." ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) ival < 64"))) ++ ++(define_constraint "UsM" ++ "@internal ++ A constraint that matches the immediate constant -1." ++ (match_test "op == constm1_rtx")) ++ ++(define_constraint "Ui3" ++ "@internal ++ A constraint that matches the integers 0...4." ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) ival <= 4"))) ++ ++(define_constraint "Up3" ++ "@internal ++ A constraint that matches the integers 2^(0...4)." ++ (and (match_code "const_int") ++ (match_test "(unsigned) exact_log2 (ival) <= 4"))) ++ ++(define_memory_constraint "Q" ++ "A memory address which uses a single base register with no offset." ++ (and (match_code "mem") ++ (match_test "REG_P (XEXP (op, 0))"))) ++ ++(define_memory_constraint "Ump" ++ "@internal ++ A memory address suitable for a load/store pair operation." ++ (and (match_code "mem") ++ (match_test "aarch64_legitimate_address_p (GET_MODE (op), XEXP (op, 0), ++ PARALLEL, 1)"))) ++ ++(define_memory_constraint "Utv" ++ "@internal ++ An address valid for loading/storing opaque structure ++ types wider than TImode." ++ (and (match_code "mem") ++ (match_test "aarch64_simd_mem_operand_p (op)"))) ++ ++(define_constraint "Dn" ++ "@internal ++ A constraint that matches vector of immediates." ++ (and (match_code "const_vector") ++ (match_test "aarch64_simd_immediate_valid_for_move (op, GET_MODE (op), ++ NULL, NULL, NULL, ++ NULL, NULL) != 0"))) ++ ++(define_constraint "Dl" ++ "@internal ++ A constraint that matches vector of immediates for left shifts." ++ (and (match_code "const_vector") ++ (match_test "aarch64_simd_shift_imm_p (op, GET_MODE (op), ++ true)"))) ++ ++(define_constraint "Dr" ++ "@internal ++ A constraint that matches vector of immediates for right shifts." ++ (and (match_code "const_vector") ++ (match_test "aarch64_simd_shift_imm_p (op, GET_MODE (op), ++ false)"))) ++(define_constraint "Dz" ++ "@internal ++ A constraint that matches vector of immediate zero." ++ (and (match_code "const_vector") ++ (match_test "aarch64_simd_imm_zero_p (op, GET_MODE (op))"))) ++ ++(define_constraint "Dd" ++ "@internal ++ A constraint that matches an immediate operand valid for AdvSIMD scalar." ++ (and (match_code "const_int") ++ (match_test "aarch64_simd_imm_scalar_p (op, GET_MODE (op))"))) +Index: gcc/config/aarch64/small.md +=================================================================== +--- a/src/gcc/config/aarch64/small.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/small.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,287 @@ ++;; Copyright (C) 2012 Free Software Foundation, Inc. ++;; ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; In the absence of any ARMv8-A implementations, two examples derived ++;; from ARM's most recent ARMv7-A cores (Cortex-A7 and Cortex-A15) are ++;; included by way of example. This is a temporary measure. ++ ++;; Example pipeline description for an example 'small' core ++;; implementing AArch64 ++ ++;;------------------------------------------------------- ++;; General Description ++;;------------------------------------------------------- ++ ++(define_automaton "small_cpu") ++ ++;; The core is modelled as a single issue pipeline with the following ++;; dispatch units. ++;; 1. One pipeline for simple intructions. ++;; 2. One pipeline for branch intructions. ++;; ++;; There are five pipeline stages. ++;; The decode/issue stages operate the same for all instructions. ++;; Instructions always advance one stage per cycle in order. ++;; Only branch instructions may dual-issue with other instructions, except ++;; when those instructions take multiple cycles to issue. ++ ++ ++;;------------------------------------------------------- ++;; CPU Units and Reservations ++;;------------------------------------------------------- ++ ++(define_cpu_unit "small_cpu_unit_i" "small_cpu") ++(define_cpu_unit "small_cpu_unit_br" "small_cpu") ++ ++;; Pseudo-unit for blocking the multiply pipeline when a double-precision ++;; multiply is in progress. ++(define_cpu_unit "small_cpu_unit_fpmul_pipe" "small_cpu") ++ ++;; The floating-point add pipeline, used to model the usage ++;; of the add pipeline by fp alu instructions. ++(define_cpu_unit "small_cpu_unit_fpadd_pipe" "small_cpu") ++ ++;; Floating-point division pipeline (long latency, out-of-order completion). ++(define_cpu_unit "small_cpu_unit_fpdiv" "small_cpu") ++ ++ ++;;------------------------------------------------------- ++;; Simple ALU Instructions ++;;------------------------------------------------------- ++ ++;; Simple ALU operations without shift ++(define_insn_reservation "small_cpu_alu" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "adc,alu,alu_ext")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_logic" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "logic,logic_imm")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_shift" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "shift,shift_imm")) ++ "small_cpu_unit_i") ++ ++;; Simple ALU operations with immediate shift ++(define_insn_reservation "small_cpu_alu_shift" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "alu_shift")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_logic_shift" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "logic_shift")) ++ "small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Multiplication/Division ++;;------------------------------------------------------- ++ ++;; Simple multiplication ++(define_insn_reservation "small_cpu_mult_single" 2 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "SI"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_mult_double" 3 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "DI"))) ++ "small_cpu_unit_i") ++ ++;; 64-bit multiplication ++(define_insn_reservation "small_cpu_mull" 3 ++ (and (eq_attr "tune" "small") (eq_attr "v8type" "mull,mulh,maddl")) ++ "small_cpu_unit_i * 2") ++ ++;; Division ++(define_insn_reservation "small_cpu_udiv_single" 5 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "udiv") (eq_attr "mode" "SI"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_udiv_double" 10 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "udiv") (eq_attr "mode" "DI"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_sdiv_single" 6 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "SI"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_sdiv_double" 12 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "DI"))) ++ "small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Load/Store Instructions ++;;------------------------------------------------------- ++ ++(define_insn_reservation "small_cpu_load1" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "load_acq,load1")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_store1" 0 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "store_rel,store1")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_load2" 3 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "load2")) ++ "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_store2" 0 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "store2")) ++ "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Branches ++;;------------------------------------------------------- ++ ++;; Direct branches are the only instructions that can dual-issue. ++;; The latency here represents when the branch actually takes place. ++ ++(define_insn_reservation "small_cpu_unit_br" 3 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "branch,call")) ++ "small_cpu_unit_br") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point arithmetic. ++;;------------------------------------------------------- ++ ++(define_insn_reservation "small_cpu_fpalu" 4 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "ffarith,fadd,fccmp,fcvt,fcmp")) ++ "small_cpu_unit_i + small_cpu_unit_fpadd_pipe") ++ ++(define_insn_reservation "small_cpu_fconst" 3 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "fconst")) ++ "small_cpu_unit_i + small_cpu_unit_fpadd_pipe") ++ ++(define_insn_reservation "small_cpu_fpmuls" 4 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fmul") (eq_attr "mode" "SF"))) ++ "small_cpu_unit_i + small_cpu_unit_fpmul_pipe") ++ ++(define_insn_reservation "small_cpu_fpmuld" 7 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fmul") (eq_attr "mode" "DF"))) ++ "small_cpu_unit_i + small_cpu_unit_fpmul_pipe, small_cpu_unit_fpmul_pipe * 2,\ ++ small_cpu_unit_i + small_cpu_unit_fpmul_pipe") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Division ++;;------------------------------------------------------- ++ ++;; Single-precision divide takes 14 cycles to complete, and this ++;; includes the time taken for the special instruction used to collect the ++;; result to travel down the multiply pipeline. ++ ++(define_insn_reservation "small_cpu_fdivs" 14 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF"))) ++ "small_cpu_unit_i, small_cpu_unit_fpdiv * 13") ++ ++(define_insn_reservation "small_cpu_fdivd" 29 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF"))) ++ "small_cpu_unit_i, small_cpu_unit_fpdiv * 28") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Transfers ++;;------------------------------------------------------- ++ ++(define_insn_reservation "small_cpu_i2f" 4 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "fmovi2f")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_f2i" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "fmovf2i")) ++ "small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Load/Store ++;;------------------------------------------------------- ++ ++(define_insn_reservation "small_cpu_floads" 4 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "SF"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_floadd" 5 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "DF"))) ++ "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_fstores" 0 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "SF"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_fstored" 0 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "DF"))) ++ "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Bypasses ++;;------------------------------------------------------- ++ ++;; Forwarding path for unshifted operands. ++ ++(define_bypass 1 "small_cpu_alu, small_cpu_alu_shift" ++ "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") ++ ++(define_bypass 1 "small_cpu_logic, small_cpu_logic_shift" ++ "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") ++ ++(define_bypass 1 "small_cpu_shift" ++ "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") ++ ++;; Load-to-use for floating-point values has a penalty of one cycle. ++ ++(define_bypass 2 "small_cpu_floads" ++ "small_cpu_fpalu, small_cpu_fpmuld,\ ++ small_cpu_fdivs, small_cpu_fdivd,\ ++ small_cpu_f2i") ++ ++(define_bypass 3 "small_cpu_floadd" ++ "small_cpu_fpalu, small_cpu_fpmuld,\ ++ small_cpu_fdivs, small_cpu_fdivd,\ ++ small_cpu_f2i") +Index: gcc/config/aarch64/aarch64.c +=================================================================== +--- a/src/gcc/config/aarch64/aarch64.c (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64.c (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,6988 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "tm.h" ++#include "insn-codes.h" ++#include "rtl.h" ++#include "insn-attr.h" ++#include "tree.h" ++#include "regs.h" ++#include "df.h" ++#include "hard-reg-set.h" ++#include "output.h" ++#include "expr.h" ++#include "reload.h" ++#include "toplev.h" ++#include "target.h" ++#include "target-def.h" ++#include "targhooks.h" ++#include "ggc.h" ++#include "integrate.h" ++#include "tm_p.h" ++#include "recog.h" ++#include "langhooks.h" ++#include "diagnostic-core.h" ++#include "gimple.h" ++#include "optabs.h" ++#include "dwarf2.h" ++ ++/* Classifies an address. ++ ++ ADDRESS_REG_IMM ++ A simple base register plus immediate offset. ++ ++ ADDRESS_REG_WB ++ A base register indexed by immediate offset with writeback. ++ ++ ADDRESS_REG_REG ++ A base register indexed by (optionally scaled) register. ++ ++ ADDRESS_REG_UXTW ++ A base register indexed by (optionally scaled) zero-extended register. ++ ++ ADDRESS_REG_SXTW ++ A base register indexed by (optionally scaled) sign-extended register. ++ ++ ADDRESS_LO_SUM ++ A LO_SUM rtx with a base register and "LO12" symbol relocation. ++ ++ ADDRESS_SYMBOLIC: ++ A constant symbolic address, in pc-relative literal pool. */ ++ ++enum aarch64_address_type { ++ ADDRESS_REG_IMM, ++ ADDRESS_REG_WB, ++ ADDRESS_REG_REG, ++ ADDRESS_REG_UXTW, ++ ADDRESS_REG_SXTW, ++ ADDRESS_LO_SUM, ++ ADDRESS_SYMBOLIC ++}; ++ ++struct aarch64_address_info { ++ enum aarch64_address_type type; ++ rtx base; ++ rtx offset; ++ int shift; ++ enum aarch64_symbol_type symbol_type; ++}; ++ ++/* The current code model. */ ++enum aarch64_code_model aarch64_cmodel; ++ ++#ifdef HAVE_AS_TLS ++#undef TARGET_HAVE_TLS ++#define TARGET_HAVE_TLS 1 ++#endif ++ ++static bool aarch64_composite_type_p (const_tree, enum machine_mode); ++static bool aarch64_vfp_is_call_or_return_candidate (enum machine_mode, ++ const_tree, ++ enum machine_mode *, int *, ++ bool *); ++static void aarch64_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED; ++static void aarch64_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED; ++static rtx aarch64_load_tp (rtx); ++static void aarch64_override_options_after_change (void); ++static int aarch64_simd_valid_immediate (rtx, enum machine_mode, int, rtx *, ++ int *, unsigned char *, int *, int *); ++static bool aarch64_vector_mode_supported_p (enum machine_mode); ++static unsigned bit_count (unsigned HOST_WIDE_INT); ++static bool aarch64_const_vec_all_same_int_p (rtx, ++ HOST_WIDE_INT, HOST_WIDE_INT); ++ ++/* The processor for which instructions should be scheduled. */ ++enum aarch64_processor aarch64_tune = generic; ++ ++/* The current tuning set. */ ++const struct tune_params *aarch64_tune_params; ++ ++/* Mask to specify which instructions we are allowed to generate. */ ++unsigned long aarch64_isa_flags = 0; ++ ++/* Mask to specify which instruction scheduling options should be used. */ ++unsigned long aarch64_tune_flags = 0; ++ ++/* Tuning models. */ ++static const struct tune_params generic_tunings; ++ ++/* A processor implementing AArch64. */ ++struct processor ++{ ++ const char *const name; ++ enum aarch64_processor core; ++ const char *arch; ++ const unsigned long flags; ++ const struct tune_params *const tune; ++}; ++ ++/* Processor cores implementing AArch64. */ ++static const struct processor all_cores[] = ++{ ++#define AARCH64_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ ++ {NAME, IDENT, #ARCH, FLAGS | AARCH64_FL_FOR_ARCH##ARCH, &COSTS##_tunings}, ++#include "aarch64-cores.def" ++#undef AARCH64_CORE ++ {"generic", generic, "8", AARCH64_FL_FPSIMD | AARCH64_FL_FOR_ARCH8, &generic_tunings}, ++ {NULL, aarch64_none, NULL, 0, NULL} ++}; ++ ++/* Architectures implementing AArch64. */ ++static const struct processor all_architectures[] = ++{ ++#define AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) \ ++ {NAME, CORE, #ARCH, FLAGS, NULL}, ++#include "aarch64-arches.def" ++#undef AARCH64_ARCH ++ {"generic", generic, "8", AARCH64_FL_FOR_ARCH8, NULL}, ++ {NULL, aarch64_none, NULL, 0, NULL} ++}; ++ ++/* Target specification. These are populated as commandline arguments ++ are processed, or NULL if not specified. */ ++static const struct processor *selected_arch; ++static const struct processor *selected_cpu; ++static const struct processor *selected_tune; ++ ++#define AARCH64_CPU_DEFAULT_FLAGS ((selected_cpu) ? selected_cpu->flags : 0) ++ ++/* An ISA extension in the co-processor and main instruction set space. */ ++struct aarch64_option_extension ++{ ++ const char *const name; ++ const unsigned long flags_on; ++ const unsigned long flags_off; ++}; ++ ++/* ISA extensions in AArch64. */ ++static const struct aarch64_option_extension all_extensions[] = ++{ ++#define AARCH64_OPT_EXTENSION(NAME, FLAGS_ON, FLAGS_OFF) \ ++ {NAME, FLAGS_ON, FLAGS_OFF}, ++#include "aarch64-option-extensions.def" ++#undef AARCH64_OPT_EXTENSION ++ {NULL, 0, 0} ++}; ++ ++/* Used to track the size of an address when generating a pre/post ++ increment address. */ ++static enum machine_mode aarch64_memory_reference_mode; ++ ++/* Used to force GTY into this file. */ ++static GTY(()) int gty_dummy; ++ ++/* A table of valid AArch64 "bitmask immediate" values for ++ logical instructions. */ ++ ++#define AARCH64_NUM_BITMASKS 5334 ++static unsigned HOST_WIDE_INT aarch64_bitmasks[AARCH64_NUM_BITMASKS]; ++ ++/* Did we set flag_omit_frame_pointer just so ++ aarch64_frame_pointer_required would be called? */ ++static bool faked_omit_frame_pointer; ++ ++typedef enum aarch64_cond_code ++{ ++ AARCH64_EQ = 0, AARCH64_NE, AARCH64_CS, AARCH64_CC, AARCH64_MI, AARCH64_PL, ++ AARCH64_VS, AARCH64_VC, AARCH64_HI, AARCH64_LS, AARCH64_GE, AARCH64_LT, ++ AARCH64_GT, AARCH64_LE, AARCH64_AL, AARCH64_NV ++} ++aarch64_cc; ++ ++#define AARCH64_INVERSE_CONDITION_CODE(X) ((aarch64_cc) (((int) X) ^ 1)) ++ ++/* The condition codes of the processor, and the inverse function. */ ++static const char * const aarch64_condition_codes[] = ++{ ++ "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", ++ "hi", "ls", "ge", "lt", "gt", "le", "al", "nv" ++}; ++ ++/* Provide a mapping from gcc register numbers to dwarf register numbers. */ ++unsigned ++aarch64_dbx_register_number (unsigned regno) ++{ ++ if (GP_REGNUM_P (regno)) ++ return AARCH64_DWARF_R0 + regno - R0_REGNUM; ++ else if (regno == SP_REGNUM) ++ return AARCH64_DWARF_SP; ++ else if (FP_REGNUM_P (regno)) ++ return AARCH64_DWARF_V0 + regno - V0_REGNUM; ++ ++ /* Return values >= DWARF_FRAME_REGISTERS indicate that there is no ++ equivalent DWARF register. */ ++ return DWARF_FRAME_REGISTERS; ++} ++ ++/* Return TRUE if MODE is any of the large INT modes. */ ++static bool ++aarch64_vect_struct_mode_p (enum machine_mode mode) ++{ ++ return mode == OImode || mode == CImode || mode == XImode; ++} ++ ++/* Return TRUE if MODE is any of the vector modes. */ ++static bool ++aarch64_vector_mode_p (enum machine_mode mode) ++{ ++ return aarch64_vector_mode_supported_p (mode) ++ || aarch64_vect_struct_mode_p (mode); ++} ++ ++/* Implement target hook TARGET_ARRAY_MODE_SUPPORTED_P. */ ++static bool ++aarch64_array_mode_supported_p (enum machine_mode mode, ++ unsigned HOST_WIDE_INT nelems) ++{ ++ if (TARGET_SIMD ++ && AARCH64_VALID_SIMD_QREG_MODE (mode) ++ && (nelems >= 2 && nelems <= 4)) ++ return true; ++ ++ return false; ++} ++ ++/* Implement HARD_REGNO_NREGS. */ ++ ++int ++aarch64_hard_regno_nregs (unsigned regno, enum machine_mode mode) ++{ ++ switch (aarch64_regno_regclass (regno)) ++ { ++ case FP_REGS: ++ case FP_LO_REGS: ++ return (GET_MODE_SIZE (mode) + UNITS_PER_VREG - 1) / UNITS_PER_VREG; ++ default: ++ return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; ++ } ++ gcc_unreachable (); ++} ++ ++/* Implement HARD_REGNO_MODE_OK. */ ++ ++int ++aarch64_hard_regno_mode_ok (unsigned regno, enum machine_mode mode) ++{ ++ if (GET_MODE_CLASS (mode) == MODE_CC) ++ return regno == CC_REGNUM; ++ ++ if (regno == SP_REGNUM || regno == FRAME_POINTER_REGNUM ++ || regno == ARG_POINTER_REGNUM) ++ return mode == Pmode; ++ ++ if (GP_REGNUM_P (regno) && ! aarch64_vect_struct_mode_p (mode)) ++ return 1; ++ ++ if (FP_REGNUM_P (regno)) ++ { ++ if (aarch64_vect_struct_mode_p (mode)) ++ return ++ (regno + aarch64_hard_regno_nregs (regno, mode) - 1) <= V31_REGNUM; ++ else ++ return 1; ++ } ++ ++ return 0; ++} ++ ++/* Return true if calls to DECL should be treated as ++ long-calls (ie called via a register). */ ++static bool ++aarch64_decl_is_long_call_p (const_tree decl ATTRIBUTE_UNUSED) ++{ ++ return false; ++} ++ ++/* Return true if calls to symbol-ref SYM should be treated as ++ long-calls (ie called via a register). */ ++bool ++aarch64_is_long_call_p (rtx sym) ++{ ++ return aarch64_decl_is_long_call_p (SYMBOL_REF_DECL (sym)); ++} ++ ++/* Return true if the offsets to a zero/sign-extract operation ++ represent an expression that matches an extend operation. The ++ operands represent the paramters from ++ ++ (extract (mult (reg) (mult_imm)) (extract_imm) (const_int 0)). */ ++bool ++aarch64_is_extend_from_extract (enum machine_mode mode, rtx mult_imm, ++ rtx extract_imm) ++{ ++ HOST_WIDE_INT mult_val, extract_val; ++ ++ if (! CONST_INT_P (mult_imm) || ! CONST_INT_P (extract_imm)) ++ return false; ++ ++ mult_val = INTVAL (mult_imm); ++ extract_val = INTVAL (extract_imm); ++ ++ if (extract_val > 8 ++ && extract_val < GET_MODE_BITSIZE (mode) ++ && exact_log2 (extract_val & ~7) > 0 ++ && (extract_val & 7) <= 4 ++ && mult_val == (1 << (extract_val & 7))) ++ return true; ++ ++ return false; ++} ++ ++/* Emit an insn that's a simple single-set. Both the operands must be ++ known to be valid. */ ++inline static rtx ++emit_set_insn (rtx x, rtx y) ++{ ++ return emit_insn (gen_rtx_SET (VOIDmode, x, y)); ++} ++ ++/* X and Y are two things to compare using CODE. Emit the compare insn and ++ return the rtx for register 0 in the proper mode. */ ++rtx ++aarch64_gen_compare_reg (RTX_CODE code, rtx x, rtx y) ++{ ++ enum machine_mode mode = SELECT_CC_MODE (code, x, y); ++ rtx cc_reg = gen_rtx_REG (mode, CC_REGNUM); ++ ++ emit_set_insn (cc_reg, gen_rtx_COMPARE (mode, x, y)); ++ return cc_reg; ++} ++ ++/* Build the SYMBOL_REF for __tls_get_addr. */ ++ ++static GTY(()) rtx tls_get_addr_libfunc; ++ ++rtx ++aarch64_tls_get_addr (void) ++{ ++ if (!tls_get_addr_libfunc) ++ tls_get_addr_libfunc = init_one_libfunc ("__tls_get_addr"); ++ return tls_get_addr_libfunc; ++} ++ ++/* Return the TLS model to use for ADDR. */ ++ ++static enum tls_model ++tls_symbolic_operand_type (rtx addr) ++{ ++ enum tls_model tls_kind = TLS_MODEL_NONE; ++ rtx sym, addend; ++ ++ if (GET_CODE (addr) == CONST) ++ { ++ split_const (addr, &sym, &addend); ++ if (GET_CODE (sym) == SYMBOL_REF) ++ tls_kind = SYMBOL_REF_TLS_MODEL (sym); ++ } ++ else if (GET_CODE (addr) == SYMBOL_REF) ++ tls_kind = SYMBOL_REF_TLS_MODEL (addr); ++ ++ return tls_kind; ++} ++ ++/* We'll allow lo_sum's in addresses in our legitimate addresses ++ so that combine would take care of combining addresses where ++ necessary, but for generation purposes, we'll generate the address ++ as : ++ RTL Absolute ++ tmp = hi (symbol_ref); adrp x1, foo ++ dest = lo_sum (tmp, symbol_ref); add dest, x1, :lo_12:foo ++ nop ++ ++ PIC TLS ++ adrp x1, :got:foo adrp tmp, :tlsgd:foo ++ ldr x1, [:got_lo12:foo] add dest, tmp, :tlsgd_lo12:foo ++ bl __tls_get_addr ++ nop ++ ++ Load TLS symbol, depending on TLS mechanism and TLS access model. ++ ++ Global Dynamic - Traditional TLS: ++ adrp tmp, :tlsgd:imm ++ add dest, tmp, #:tlsgd_lo12:imm ++ bl __tls_get_addr ++ ++ Global Dynamic - TLS Descriptors: ++ adrp dest, :tlsdesc:imm ++ ldr tmp, [dest, #:tlsdesc_lo12:imm] ++ add dest, dest, #:tlsdesc_lo12:imm ++ blr tmp ++ mrs tp, tpidr_el0 ++ add dest, dest, tp ++ ++ Initial Exec: ++ mrs tp, tpidr_el0 ++ adrp tmp, :gottprel:imm ++ ldr dest, [tmp, #:gottprel_lo12:imm] ++ add dest, dest, tp ++ ++ Local Exec: ++ mrs tp, tpidr_el0 ++ add t0, tp, #:tprel_hi12:imm ++ add t0, #:tprel_lo12_nc:imm ++*/ ++ ++static void ++aarch64_load_symref_appropriately (rtx dest, rtx imm, ++ enum aarch64_symbol_type type) ++{ ++ switch (type) ++ { ++ case SYMBOL_SMALL_ABSOLUTE: ++ { ++ rtx tmp_reg = dest; ++ if (can_create_pseudo_p ()) ++ { ++ tmp_reg = gen_reg_rtx (Pmode); ++ } ++ ++ emit_move_insn (tmp_reg, gen_rtx_HIGH (Pmode, imm)); ++ emit_insn (gen_add_losym (dest, tmp_reg, imm)); ++ return; ++ } ++ ++ case SYMBOL_SMALL_GOT: ++ { ++ rtx tmp_reg = dest; ++ if (can_create_pseudo_p ()) ++ { ++ tmp_reg = gen_reg_rtx (Pmode); ++ } ++ emit_move_insn (tmp_reg, gen_rtx_HIGH (Pmode, imm)); ++ emit_insn (gen_ldr_got_small (dest, tmp_reg, imm)); ++ return; ++ } ++ ++ case SYMBOL_SMALL_TLSGD: ++ { ++ rtx insns; ++ rtx result = gen_rtx_REG (Pmode, R0_REGNUM); ++ ++ start_sequence (); ++ emit_call_insn (gen_tlsgd_small (result, imm)); ++ insns = get_insns (); ++ end_sequence (); ++ ++ RTL_CONST_CALL_P (insns) = 1; ++ emit_libcall_block (insns, dest, result, imm); ++ return; ++ } ++ ++ case SYMBOL_SMALL_TLSDESC: ++ { ++ rtx x0 = gen_rtx_REG (Pmode, R0_REGNUM); ++ rtx tp; ++ ++ emit_insn (gen_tlsdesc_small (imm)); ++ tp = aarch64_load_tp (NULL); ++ emit_insn (gen_rtx_SET (Pmode, dest, gen_rtx_PLUS (Pmode, tp, x0))); ++ set_unique_reg_note (get_last_insn (), REG_EQUIV, imm); ++ return; ++ } ++ ++ case SYMBOL_SMALL_GOTTPREL: ++ { ++ rtx tmp_reg = gen_reg_rtx (Pmode); ++ rtx tp = aarch64_load_tp (NULL); ++ emit_insn (gen_tlsie_small (tmp_reg, imm)); ++ emit_insn (gen_rtx_SET (Pmode, dest, gen_rtx_PLUS (Pmode, tp, tmp_reg))); ++ set_unique_reg_note (get_last_insn (), REG_EQUIV, imm); ++ return; ++ } ++ ++ case SYMBOL_SMALL_TPREL: ++ { ++ rtx tp = aarch64_load_tp (NULL); ++ emit_insn (gen_tlsle_small (dest, tp, imm)); ++ set_unique_reg_note (get_last_insn (), REG_EQUIV, imm); ++ return; ++ } ++ ++ default: ++ gcc_unreachable (); ++ } ++} ++ ++/* Emit a move from SRC to DEST. Assume that the move expanders can ++ handle all moves if !can_create_pseudo_p (). The distinction is ++ important because, unlike emit_move_insn, the move expanders know ++ how to force Pmode objects into the constant pool even when the ++ constant pool address is not itself legitimate. */ ++static rtx ++aarch64_emit_move (rtx dest, rtx src) ++{ ++ return (can_create_pseudo_p () ++ ? emit_move_insn (dest, src) ++ : emit_move_insn_1 (dest, src)); ++} ++ ++void ++aarch64_split_doubleword_move (rtx dst, rtx src) ++{ ++ rtx low_dst; ++ ++ gcc_assert (GET_MODE (dst) == TImode); ++ ++ if (REG_P (dst) && REG_P (src)) ++ { ++ int src_regno = REGNO (src); ++ int dst_regno = REGNO (dst); ++ ++ gcc_assert (GET_MODE (src) == TImode); ++ ++ /* Handle r -> w, w -> r. */ ++ if (FP_REGNUM_P (dst_regno) && GP_REGNUM_P (src_regno)) ++ { ++ emit_insn (gen_aarch64_movtilow_di (dst, ++ gen_lowpart (word_mode, src))); ++ emit_insn (gen_aarch64_movtihigh_di (dst, ++ gen_highpart (word_mode, src))); ++ return; ++ } ++ else if (GP_REGNUM_P (dst_regno) && FP_REGNUM_P (src_regno)) ++ { ++ emit_insn (gen_aarch64_movdi_tilow (gen_lowpart (word_mode, dst), ++ src)); ++ emit_insn (gen_aarch64_movdi_tihigh (gen_highpart (word_mode, dst), ++ src)); ++ return; ++ } ++ /* Fall through to r -> r cases. */ ++ } ++ ++ low_dst = gen_lowpart (word_mode, dst); ++ if (REG_P (low_dst) ++ && reg_overlap_mentioned_p (low_dst, src)) ++ { ++ aarch64_emit_move (gen_highpart (word_mode, dst), ++ gen_highpart_mode (word_mode, TImode, src)); ++ aarch64_emit_move (low_dst, gen_lowpart (word_mode, src)); ++ } ++ else ++ { ++ aarch64_emit_move (low_dst, gen_lowpart (word_mode, src)); ++ aarch64_emit_move (gen_highpart (word_mode, dst), ++ gen_highpart_mode (word_mode, TImode, src)); ++ } ++} ++ ++static rtx ++aarch64_force_temporary (rtx x, rtx value) ++{ ++ if (can_create_pseudo_p ()) ++ return force_reg (Pmode, value); ++ else ++ { ++ x = aarch64_emit_move (x, value); ++ return x; ++ } ++} ++ ++ ++static rtx ++aarch64_add_offset (rtx temp, rtx reg, HOST_WIDE_INT offset) ++{ ++ if (!aarch64_plus_immediate (GEN_INT (offset), DImode)) ++ { ++ rtx high; ++ /* Load the full offset into a register. This ++ might be improvable in the future. */ ++ high = GEN_INT (offset); ++ offset = 0; ++ high = aarch64_force_temporary (temp, high); ++ reg = aarch64_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg)); ++ } ++ return plus_constant (reg, offset); ++} ++ ++void ++aarch64_expand_mov_immediate (rtx dest, rtx imm) ++{ ++ enum machine_mode mode = GET_MODE (dest); ++ unsigned HOST_WIDE_INT mask; ++ int i; ++ bool first; ++ unsigned HOST_WIDE_INT val; ++ bool subtargets; ++ rtx subtarget; ++ int one_match, zero_match; ++ ++ gcc_assert (mode == SImode || mode == DImode); ++ ++ /* Check on what type of symbol it is. */ ++ if (GET_CODE (imm) == SYMBOL_REF ++ || GET_CODE (imm) == LABEL_REF ++ || GET_CODE (imm) == CONST) ++ { ++ rtx mem, base, offset; ++ enum aarch64_symbol_type sty; ++ ++ /* If we have (const (plus symbol offset)), separate out the offset ++ before we start classifying the symbol. */ ++ split_const (imm, &base, &offset); ++ ++ sty = aarch64_classify_symbol (base, SYMBOL_CONTEXT_ADR); ++ switch (sty) ++ { ++ case SYMBOL_FORCE_TO_MEM: ++ ++ if (offset != const0_rtx ++ && targetm.cannot_force_const_mem (mode, imm)) ++ { ++ gcc_assert(can_create_pseudo_p ()); ++ base = aarch64_force_temporary (dest, base); ++ base = aarch64_add_offset (NULL, base, INTVAL (offset)); ++ aarch64_emit_move (dest, base); ++ return; ++ } ++ mem = force_const_mem (mode, imm); ++ gcc_assert (mem); ++ emit_insn (gen_rtx_SET (VOIDmode, dest, mem)); ++ return; ++ ++ case SYMBOL_SMALL_TLSGD: ++ case SYMBOL_SMALL_TLSDESC: ++ case SYMBOL_SMALL_GOTTPREL: ++ case SYMBOL_SMALL_GOT: ++ if (offset != const0_rtx) ++ { ++ gcc_assert(can_create_pseudo_p ()); ++ base = aarch64_force_temporary (dest, base); ++ base = aarch64_add_offset (NULL, base, INTVAL (offset)); ++ aarch64_emit_move (dest, base); ++ return; ++ } ++ /* FALLTHRU */ ++ ++ case SYMBOL_SMALL_TPREL: ++ case SYMBOL_SMALL_ABSOLUTE: ++ aarch64_load_symref_appropriately (dest, imm, sty); ++ return; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ ++ if (CONST_INT_P (imm) && aarch64_move_imm (INTVAL (imm), mode)) ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, dest, imm)); ++ return; ++ } ++ ++ if (!CONST_INT_P (imm)) ++ { ++ if (GET_CODE (imm) == HIGH) ++ emit_insn (gen_rtx_SET (VOIDmode, dest, imm)); ++ else ++ { ++ rtx mem = force_const_mem (mode, imm); ++ gcc_assert (mem); ++ emit_insn (gen_rtx_SET (VOIDmode, dest, mem)); ++ } ++ ++ return; ++ } ++ ++ if (mode == SImode) ++ { ++ /* We know we can't do this in 1 insn, and we must be able to do it ++ in two; so don't mess around looking for sequences that don't buy ++ us anything. */ ++ emit_insn (gen_rtx_SET (VOIDmode, dest, GEN_INT (INTVAL (imm) & 0xffff))); ++ emit_insn (gen_insv_immsi (dest, GEN_INT (16), ++ GEN_INT ((INTVAL (imm) >> 16) & 0xffff))); ++ return; ++ } ++ ++ /* Remaining cases are all for DImode. */ ++ ++ val = INTVAL (imm); ++ subtargets = optimize && can_create_pseudo_p (); ++ ++ one_match = 0; ++ zero_match = 0; ++ mask = 0xffff; ++ ++ for (i = 0; i < 64; i += 16, mask <<= 16) ++ { ++ if ((val & mask) == 0) ++ zero_match++; ++ else if ((val & mask) == mask) ++ one_match++; ++ } ++ ++ if (one_match == 2) ++ { ++ mask = 0xffff; ++ for (i = 0; i < 64; i += 16, mask <<= 16) ++ { ++ if ((val & mask) != mask) ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, dest, GEN_INT (val | mask))); ++ emit_insn (gen_insv_immdi (dest, GEN_INT (i), ++ GEN_INT ((val >> i) & 0xffff))); ++ return; ++ } ++ } ++ gcc_unreachable (); ++ } ++ ++ if (zero_match == 2) ++ goto simple_sequence; ++ ++ mask = 0x0ffff0000UL; ++ for (i = 16; i < 64; i += 16, mask <<= 16) ++ { ++ HOST_WIDE_INT comp = mask & ~(mask - 1); ++ ++ if (aarch64_uimm12_shift (val - (val & mask))) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, GEN_INT (val & mask))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - (val & mask)))); ++ return; ++ } ++ else if (aarch64_uimm12_shift (-(val - ((val + comp) & mask)))) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT ((val + comp) & mask))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - ((val + comp) & mask)))); ++ return; ++ } ++ else if (aarch64_uimm12_shift (val - ((val - comp) | ~mask))) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT ((val - comp) | ~mask))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - ((val - comp) | ~mask)))); ++ return; ++ } ++ else if (aarch64_uimm12_shift (-(val - (val | ~mask)))) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT (val | ~mask))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - (val | ~mask)))); ++ return; ++ } ++ } ++ ++ /* See if we can do it by arithmetically combining two ++ immediates. */ ++ for (i = 0; i < AARCH64_NUM_BITMASKS; i++) ++ { ++ int j; ++ mask = 0xffff; ++ ++ if (aarch64_uimm12_shift (val - aarch64_bitmasks[i]) ++ || aarch64_uimm12_shift (-val + aarch64_bitmasks[i])) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT (aarch64_bitmasks[i]))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - aarch64_bitmasks[i]))); ++ return; ++ } ++ ++ for (j = 0; j < 64; j += 16, mask <<= 16) ++ { ++ if ((aarch64_bitmasks[i] & ~mask) == (val & ~mask)) ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, dest, ++ GEN_INT (aarch64_bitmasks[i]))); ++ emit_insn (gen_insv_immdi (dest, GEN_INT (j), ++ GEN_INT ((val >> j) & 0xffff))); ++ return; ++ } ++ } ++ } ++ ++ /* See if we can do it by logically combining two immediates. */ ++ for (i = 0; i < AARCH64_NUM_BITMASKS; i++) ++ { ++ if ((aarch64_bitmasks[i] & val) == aarch64_bitmasks[i]) ++ { ++ int j; ++ ++ for (j = i + 1; j < AARCH64_NUM_BITMASKS; j++) ++ if (val == (aarch64_bitmasks[i] | aarch64_bitmasks[j])) ++ { ++ subtarget = subtargets ? gen_reg_rtx (mode) : dest; ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT (aarch64_bitmasks[i]))); ++ emit_insn (gen_iordi3 (dest, subtarget, ++ GEN_INT (aarch64_bitmasks[j]))); ++ return; ++ } ++ } ++ else if ((val & aarch64_bitmasks[i]) == val) ++ { ++ int j; ++ ++ for (j = i + 1; j < AARCH64_NUM_BITMASKS; j++) ++ if (val == (aarch64_bitmasks[j] & aarch64_bitmasks[i])) ++ { ++ ++ subtarget = subtargets ? gen_reg_rtx (mode) : dest; ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT (aarch64_bitmasks[j]))); ++ emit_insn (gen_anddi3 (dest, subtarget, ++ GEN_INT (aarch64_bitmasks[i]))); ++ return; ++ } ++ } ++ } ++ ++ simple_sequence: ++ first = true; ++ mask = 0xffff; ++ for (i = 0; i < 64; i += 16, mask <<= 16) ++ { ++ if ((val & mask) != 0) ++ { ++ if (first) ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, dest, ++ GEN_INT (val & mask))); ++ first = false; ++ } ++ else ++ emit_insn (gen_insv_immdi (dest, GEN_INT (i), ++ GEN_INT ((val >> i) & 0xffff))); ++ } ++ } ++} ++ ++static bool ++aarch64_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) ++{ ++ /* Indirect calls are not currently supported. */ ++ if (decl == NULL) ++ return false; ++ ++ /* Cannot tail-call to long-calls, since these are outside of the ++ range of a branch instruction (we could handle this if we added ++ support for indirect tail-calls. */ ++ if (aarch64_decl_is_long_call_p (decl)) ++ return false; ++ ++ return true; ++} ++ ++/* Implement TARGET_PASS_BY_REFERENCE. */ ++ ++static bool ++aarch64_pass_by_reference (cumulative_args_t pcum ATTRIBUTE_UNUSED, ++ enum machine_mode mode, ++ const_tree type, ++ bool named ATTRIBUTE_UNUSED) ++{ ++ HOST_WIDE_INT size; ++ enum machine_mode dummymode; ++ int nregs; ++ ++ /* GET_MODE_SIZE (BLKmode) is useless since it is 0. */ ++ size = (mode == BLKmode && type) ++ ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode); ++ ++ if (type) ++ { ++ /* Arrays always passed by reference. */ ++ if (TREE_CODE (type) == ARRAY_TYPE) ++ return true; ++ /* Other aggregates based on their size. */ ++ if (AGGREGATE_TYPE_P (type)) ++ size = int_size_in_bytes (type); ++ } ++ ++ /* Variable sized arguments are always returned by reference. */ ++ if (size < 0) ++ return true; ++ ++ /* Can this be a candidate to be passed in fp/simd register(s)? */ ++ if (aarch64_vfp_is_call_or_return_candidate (mode, type, ++ &dummymode, &nregs, ++ NULL)) ++ return false; ++ ++ /* Arguments which are variable sized or larger than 2 registers are ++ passed by reference unless they are a homogenous floating point ++ aggregate. */ ++ return size > 2 * UNITS_PER_WORD; ++} ++ ++/* Return TRUE if VALTYPE is padded to its least significant bits. */ ++static bool ++aarch64_return_in_msb (const_tree valtype) ++{ ++ enum machine_mode dummy_mode; ++ int dummy_int; ++ ++ /* Never happens in little-endian mode. */ ++ if (!BYTES_BIG_ENDIAN) ++ return false; ++ ++ /* Only composite types smaller than or equal to 16 bytes can ++ be potentially returned in registers. */ ++ if (!aarch64_composite_type_p (valtype, TYPE_MODE (valtype)) ++ || int_size_in_bytes (valtype) <= 0 ++ || int_size_in_bytes (valtype) > 16) ++ return false; ++ ++ /* But not a composite that is an HFA (Homogeneous Floating-point Aggregate) ++ or an HVA (Homogeneous Short-Vector Aggregate); such a special composite ++ is always passed/returned in the least significant bits of fp/simd ++ register(s). */ ++ if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (valtype), valtype, ++ &dummy_mode, &dummy_int, NULL)) ++ return false; ++ ++ return true; ++} ++ ++/* Implement TARGET_FUNCTION_VALUE. ++ Define how to find the value returned by a function. */ ++ ++static rtx ++aarch64_function_value (const_tree type, const_tree func, ++ bool outgoing ATTRIBUTE_UNUSED) ++{ ++ enum machine_mode mode; ++ int unsignedp; ++ int count; ++ enum machine_mode ag_mode; ++ ++ mode = TYPE_MODE (type); ++ if (INTEGRAL_TYPE_P (type)) ++ mode = promote_function_mode (type, mode, &unsignedp, func, 1); ++ ++ if (aarch64_return_in_msb (type)) ++ { ++ HOST_WIDE_INT size = int_size_in_bytes (type); ++ ++ if (size % UNITS_PER_WORD != 0) ++ { ++ size += UNITS_PER_WORD - size % UNITS_PER_WORD; ++ mode = mode_for_size (size * BITS_PER_UNIT, MODE_INT, 0); ++ } ++ } ++ ++ if (aarch64_vfp_is_call_or_return_candidate (mode, type, ++ &ag_mode, &count, NULL)) ++ { ++ if (!aarch64_composite_type_p (type, mode)) ++ { ++ gcc_assert (count == 1 && mode == ag_mode); ++ return gen_rtx_REG (mode, V0_REGNUM); ++ } ++ else ++ { ++ int i; ++ rtx par; ++ ++ par = gen_rtx_PARALLEL (mode, rtvec_alloc (count)); ++ for (i = 0; i < count; i++) ++ { ++ rtx tmp = gen_rtx_REG (ag_mode, V0_REGNUM + i); ++ tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp, ++ GEN_INT (i * GET_MODE_SIZE (ag_mode))); ++ XVECEXP (par, 0, i) = tmp; ++ } ++ return par; ++ } ++ } ++ else ++ return gen_rtx_REG (mode, R0_REGNUM); ++} ++ ++/* Implements TARGET_FUNCTION_VALUE_REGNO_P. ++ Return true if REGNO is the number of a hard register in which the values ++ of called function may come back. */ ++ ++static bool ++aarch64_function_value_regno_p (const unsigned int regno) ++{ ++ /* Maximum of 16 bytes can be returned in the general registers. Examples ++ of 16-byte return values are: 128-bit integers and 16-byte small ++ structures (excluding homogeneous floating-point aggregates). */ ++ if (regno == R0_REGNUM || regno == R1_REGNUM) ++ return true; ++ ++ /* Up to four fp/simd registers can return a function value, e.g. a ++ homogeneous floating-point aggregate having four members. */ ++ if (regno >= V0_REGNUM && regno < V0_REGNUM + HA_MAX_NUM_FLDS) ++ return !TARGET_GENERAL_REGS_ONLY; ++ ++ return false; ++} ++ ++/* Implement TARGET_RETURN_IN_MEMORY. ++ ++ If the type T of the result of a function is such that ++ void func (T arg) ++ would require that arg be passed as a value in a register (or set of ++ registers) according to the parameter passing rules, then the result ++ is returned in the same registers as would be used for such an ++ argument. */ ++ ++static bool ++aarch64_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) ++{ ++ HOST_WIDE_INT size; ++ enum machine_mode ag_mode; ++ int count; ++ ++ if (!AGGREGATE_TYPE_P (type) ++ && TREE_CODE (type) != COMPLEX_TYPE ++ && TREE_CODE (type) != VECTOR_TYPE) ++ /* Simple scalar types always returned in registers. */ ++ return false; ++ ++ if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type), ++ type, ++ &ag_mode, ++ &count, ++ NULL)) ++ return false; ++ ++ /* Types larger than 2 registers returned in memory. */ ++ size = int_size_in_bytes (type); ++ return (size < 0 || size > 2 * UNITS_PER_WORD); ++} ++ ++static bool ++aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, enum machine_mode mode, ++ const_tree type, int *nregs) ++{ ++ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); ++ return aarch64_vfp_is_call_or_return_candidate (mode, ++ type, ++ &pcum->aapcs_vfp_rmode, ++ nregs, ++ NULL); ++} ++ ++/* Given MODE and TYPE of a function argument, return the alignment in ++ bits. The idea is to suppress any stronger alignment requested by ++ the user and opt for the natural alignment (specified in AAPCS64 \S 4.1). ++ This is a helper function for local use only. */ ++ ++static unsigned int ++aarch64_function_arg_alignment (enum machine_mode mode, const_tree type) ++{ ++ unsigned int alignment; ++ ++ if (type) ++ { ++ if (!integer_zerop (TYPE_SIZE (type))) ++ { ++ if (TYPE_MODE (type) == mode) ++ alignment = TYPE_ALIGN (type); ++ else ++ alignment = GET_MODE_ALIGNMENT (mode); ++ } ++ else ++ alignment = 0; ++ } ++ else ++ alignment = GET_MODE_ALIGNMENT (mode); ++ ++ return alignment; ++} ++ ++/* Layout a function argument according to the AAPCS64 rules. The rule ++ numbers refer to the rule numbers in the AAPCS64. */ ++ ++static void ++aarch64_layout_arg (cumulative_args_t pcum_v, enum machine_mode mode, ++ const_tree type, ++ bool named ATTRIBUTE_UNUSED) ++{ ++ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); ++ int ncrn, nvrn, nregs; ++ bool allocate_ncrn, allocate_nvrn; ++ ++ /* We need to do this once per argument. */ ++ if (pcum->aapcs_arg_processed) ++ return; ++ ++ pcum->aapcs_arg_processed = true; ++ ++ allocate_ncrn = (type) ? !(FLOAT_TYPE_P (type)) : !FLOAT_MODE_P (mode); ++ allocate_nvrn = aarch64_vfp_is_call_candidate (pcum_v, ++ mode, ++ type, ++ &nregs); ++ ++ /* allocate_ncrn may be false-positive, but allocate_nvrn is quite reliable. ++ The following code thus handles passing by SIMD/FP registers first. */ ++ ++ nvrn = pcum->aapcs_nvrn; ++ ++ /* C1 - C5 for floating point, homogenous floating point aggregates (HFA) ++ and homogenous short-vector aggregates (HVA). */ ++ if (allocate_nvrn) ++ { ++ if (nvrn + nregs <= NUM_FP_ARG_REGS) ++ { ++ pcum->aapcs_nextnvrn = nvrn + nregs; ++ if (!aarch64_composite_type_p (type, mode)) ++ { ++ gcc_assert (nregs == 1); ++ pcum->aapcs_reg = gen_rtx_REG (mode, V0_REGNUM + nvrn); ++ } ++ else ++ { ++ rtx par; ++ int i; ++ par = gen_rtx_PARALLEL (mode, rtvec_alloc (nregs)); ++ for (i = 0; i < nregs; i++) ++ { ++ rtx tmp = gen_rtx_REG (pcum->aapcs_vfp_rmode, ++ V0_REGNUM + nvrn + i); ++ tmp = gen_rtx_EXPR_LIST ++ (VOIDmode, tmp, ++ GEN_INT (i * GET_MODE_SIZE (pcum->aapcs_vfp_rmode))); ++ XVECEXP (par, 0, i) = tmp; ++ } ++ pcum->aapcs_reg = par; ++ } ++ return; ++ } ++ else ++ { ++ /* C.3 NSRN is set to 8. */ ++ pcum->aapcs_nextnvrn = NUM_FP_ARG_REGS; ++ goto on_stack; ++ } ++ } ++ ++ ncrn = pcum->aapcs_ncrn; ++ nregs = ((type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode)) ++ + UNITS_PER_WORD - 1) / UNITS_PER_WORD; ++ ++ ++ /* C6 - C9. though the sign and zero extension semantics are ++ handled elsewhere. This is the case where the argument fits ++ entirely general registers. */ ++ if (allocate_ncrn && (ncrn + nregs <= NUM_ARG_REGS)) ++ { ++ unsigned int alignment = aarch64_function_arg_alignment (mode, type); ++ ++ gcc_assert (nregs == 0 || nregs == 1 || nregs == 2); ++ ++ /* C.8 if the argument has an alignment of 16 then the NGRN is ++ rounded up to the next even number. */ ++ if (nregs == 2 && alignment == 16 * BITS_PER_UNIT && ncrn % 2) ++ { ++ ++ncrn; ++ gcc_assert (ncrn + nregs <= NUM_ARG_REGS); ++ } ++ /* NREGS can be 0 when e.g. an empty structure is to be passed. ++ A reg is still generated for it, but the caller should be smart ++ enough not to use it. */ ++ if (nregs == 0 || nregs == 1 || GET_MODE_CLASS (mode) == MODE_INT) ++ { ++ pcum->aapcs_reg = gen_rtx_REG (mode, R0_REGNUM + ncrn); ++ } ++ else ++ { ++ rtx par; ++ int i; ++ ++ par = gen_rtx_PARALLEL (mode, rtvec_alloc (nregs)); ++ for (i = 0; i < nregs; i++) ++ { ++ rtx tmp = gen_rtx_REG (word_mode, R0_REGNUM + ncrn + i); ++ tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp, ++ GEN_INT (i * UNITS_PER_WORD)); ++ XVECEXP (par, 0, i) = tmp; ++ } ++ pcum->aapcs_reg = par; ++ } ++ ++ pcum->aapcs_nextncrn = ncrn + nregs; ++ return; ++ } ++ ++ /* C.11 */ ++ pcum->aapcs_nextncrn = NUM_ARG_REGS; ++ ++ /* The argument is passed on stack; record the needed number of words for ++ this argument (we can re-use NREGS) and align the total size if ++ necessary. */ ++on_stack: ++ pcum->aapcs_stack_words = nregs; ++ if (aarch64_function_arg_alignment (mode, type) == 16 * BITS_PER_UNIT) ++ pcum->aapcs_stack_size = AARCH64_ROUND_UP (pcum->aapcs_stack_size, ++ 16 / UNITS_PER_WORD) + 1; ++ return; ++} ++ ++/* Implement TARGET_FUNCTION_ARG. */ ++ ++static rtx ++aarch64_function_arg (cumulative_args_t pcum_v, enum machine_mode mode, ++ const_tree type, bool named) ++{ ++ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); ++ gcc_assert (pcum->pcs_variant == ARM_PCS_AAPCS64); ++ ++ if (mode == VOIDmode) ++ return NULL_RTX; ++ ++ aarch64_layout_arg (pcum_v, mode, type, named); ++ return pcum->aapcs_reg; ++} ++ ++void ++aarch64_init_cumulative_args (CUMULATIVE_ARGS *pcum, ++ const_tree fntype ATTRIBUTE_UNUSED, ++ rtx libname ATTRIBUTE_UNUSED, ++ const_tree fndecl ATTRIBUTE_UNUSED, ++ unsigned n_named ATTRIBUTE_UNUSED) ++{ ++ pcum->aapcs_ncrn = 0; ++ pcum->aapcs_nvrn = 0; ++ pcum->aapcs_nextncrn = 0; ++ pcum->aapcs_nextnvrn = 0; ++ pcum->pcs_variant = ARM_PCS_AAPCS64; ++ pcum->aapcs_reg = NULL_RTX; ++ pcum->aapcs_arg_processed = false; ++ pcum->aapcs_stack_words = 0; ++ pcum->aapcs_stack_size = 0; ++ ++ return; ++} ++ ++static void ++aarch64_function_arg_advance (cumulative_args_t pcum_v, ++ enum machine_mode mode, ++ const_tree type, ++ bool named) ++{ ++ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); ++ if (pcum->pcs_variant == ARM_PCS_AAPCS64) ++ { ++ aarch64_layout_arg (pcum_v, mode, type, named); ++ gcc_assert ((pcum->aapcs_reg != NULL_RTX) ++ != (pcum->aapcs_stack_words != 0)); ++ pcum->aapcs_arg_processed = false; ++ pcum->aapcs_ncrn = pcum->aapcs_nextncrn; ++ pcum->aapcs_nvrn = pcum->aapcs_nextnvrn; ++ pcum->aapcs_stack_size += pcum->aapcs_stack_words; ++ pcum->aapcs_stack_words = 0; ++ pcum->aapcs_reg = NULL_RTX; ++ } ++} ++ ++bool ++aarch64_function_arg_regno_p (unsigned regno) ++{ ++ return ((GP_REGNUM_P (regno) && regno < R0_REGNUM + NUM_ARG_REGS) ++ || (FP_REGNUM_P (regno) && regno < V0_REGNUM + NUM_FP_ARG_REGS)); ++} ++ ++/* Implement FUNCTION_ARG_BOUNDARY. Every parameter gets at least ++ PARM_BOUNDARY bits of alignment, but will be given anything up ++ to STACK_BOUNDARY bits if the type requires it. This makes sure ++ that both before and after the layout of each argument, the Next ++ Stacked Argument Address (NSAA) will have a minimum alignment of ++ 8 bytes. */ ++ ++static unsigned int ++aarch64_function_arg_boundary (enum machine_mode mode, const_tree type) ++{ ++ unsigned int alignment = aarch64_function_arg_alignment (mode, type); ++ ++ if (alignment < PARM_BOUNDARY) ++ alignment = PARM_BOUNDARY; ++ if (alignment > STACK_BOUNDARY) ++ alignment = STACK_BOUNDARY; ++ return alignment; ++} ++ ++/* For use by FUNCTION_ARG_PADDING (MODE, TYPE). ++ ++ Return true if an argument passed on the stack should be padded upwards, ++ i.e. if the least-significant byte of the stack slot has useful data. ++ ++ Small aggregate types are placed in the lowest memory address. ++ ++ The related parameter passing rules are B.4, C.3, C.5 and C.14. */ ++ ++bool ++aarch64_pad_arg_upward (enum machine_mode mode, const_tree type) ++{ ++ /* On little-endian targets, the least significant byte of every stack ++ argument is passed at the lowest byte address of the stack slot. */ ++ if (!BYTES_BIG_ENDIAN) ++ return true; ++ ++ /* Otherwise, integral types and floating point types are padded downward: ++ the least significant byte of a stack argument is passed at the highest ++ byte address of the stack slot. */ ++ if (type ++ ? (INTEGRAL_TYPE_P (type) || SCALAR_FLOAT_TYPE_P (type)) ++ : (SCALAR_INT_MODE_P (mode) || SCALAR_FLOAT_MODE_P (mode))) ++ return false; ++ ++ /* Everything else padded upward, i.e. data in first byte of stack slot. */ ++ return true; ++} ++ ++/* Similarly, for use by BLOCK_REG_PADDING (MODE, TYPE, FIRST). ++ ++ It specifies padding for the last (may also be the only) ++ element of a block move between registers and memory. If ++ assuming the block is in the memory, padding upward means that ++ the last element is padded after its highest significant byte, ++ while in downward padding, the last element is padded at the ++ its least significant byte side. ++ ++ Small aggregates and small complex types are always padded ++ upwards. ++ ++ We don't need to worry about homogeneous floating-point or ++ short-vector aggregates; their move is not affected by the ++ padding direction determined here. Regardless of endianness, ++ each element of such an aggregate is put in the least ++ significant bits of a fp/simd register. ++ ++ Return !BYTES_BIG_ENDIAN if the least significant byte of the ++ register has useful data, and return the opposite if the most ++ significant byte does. */ ++ ++bool ++aarch64_pad_reg_upward (enum machine_mode mode, const_tree type, ++ bool first ATTRIBUTE_UNUSED) ++{ ++ ++ /* Small composite types are always padded upward. */ ++ if (BYTES_BIG_ENDIAN && aarch64_composite_type_p (type, mode)) ++ { ++ HOST_WIDE_INT size = (type ? int_size_in_bytes (type) ++ : GET_MODE_SIZE (mode)); ++ if (size < 2 * UNITS_PER_WORD) ++ return true; ++ } ++ ++ /* Otherwise, use the default padding. */ ++ return !BYTES_BIG_ENDIAN; ++} ++ ++static enum machine_mode ++aarch64_libgcc_cmp_return_mode (void) ++{ ++ return SImode; ++} ++ ++static bool ++aarch64_frame_pointer_required (void) ++{ ++ /* If the function contains dynamic stack allocations, we need to ++ use the frame pointer to access the static parts of the frame. */ ++ if (cfun->calls_alloca) ++ return true; ++ ++ /* We may have turned flag_omit_frame_pointer on in order to have this ++ function called; if we did, we also set the 'faked_omit_frame_pointer' flag ++ and we'll check it here. ++ If we really did set flag_omit_frame_pointer normally, then we return false ++ (no frame pointer required) in all cases. */ ++ ++ if (flag_omit_frame_pointer && !faked_omit_frame_pointer) ++ return false; ++ else if (flag_omit_leaf_frame_pointer) ++ return !current_function_is_leaf; ++ return true; ++} ++ ++/* Mark the registers that need to be saved by the callee and calculate ++ the size of the callee-saved registers area and frame record (both FP ++ and LR may be omitted). */ ++static void ++aarch64_layout_frame (void) ++{ ++ HOST_WIDE_INT offset = 0; ++ int regno; ++ ++ if (reload_completed && cfun->machine->frame.laid_out) ++ return; ++ ++ cfun->machine->frame.fp_lr_offset = 0; ++ ++ /* First mark all the registers that really need to be saved... */ ++ for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) ++ cfun->machine->frame.reg_offset[regno] = -1; ++ ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ cfun->machine->frame.reg_offset[regno] = -1; ++ ++ /* ... that includes the eh data registers (if needed)... */ ++ if (crtl->calls_eh_return) ++ for (regno = 0; EH_RETURN_DATA_REGNO (regno) != INVALID_REGNUM; regno++) ++ cfun->machine->frame.reg_offset[EH_RETURN_DATA_REGNO (regno)] = 0; ++ ++ /* ... and any callee saved register that dataflow says is live. */ ++ for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) ++ if (df_regs_ever_live_p (regno) ++ && !call_used_regs[regno]) ++ cfun->machine->frame.reg_offset[regno] = 0; ++ ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ if (df_regs_ever_live_p (regno) ++ && !call_used_regs[regno]) ++ cfun->machine->frame.reg_offset[regno] = 0; ++ ++ if (frame_pointer_needed) ++ { ++ cfun->machine->frame.reg_offset[R30_REGNUM] = 0; ++ cfun->machine->frame.reg_offset[R29_REGNUM] = 0; ++ cfun->machine->frame.hardfp_offset = 2 * UNITS_PER_WORD; ++ } ++ ++ /* Now assign stack slots for them. */ ++ for (regno = R0_REGNUM; regno <= R28_REGNUM; regno++) ++ if (cfun->machine->frame.reg_offset[regno] != -1) ++ { ++ cfun->machine->frame.reg_offset[regno] = offset; ++ offset += UNITS_PER_WORD; ++ } ++ ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ if (cfun->machine->frame.reg_offset[regno] != -1) ++ { ++ cfun->machine->frame.reg_offset[regno] = offset; ++ offset += UNITS_PER_WORD; ++ } ++ ++ if (frame_pointer_needed) ++ { ++ cfun->machine->frame.reg_offset[R29_REGNUM] = offset; ++ offset += UNITS_PER_WORD; ++ cfun->machine->frame.fp_lr_offset = UNITS_PER_WORD; ++ } ++ ++ if (cfun->machine->frame.reg_offset[R30_REGNUM] != -1) ++ { ++ cfun->machine->frame.reg_offset[R30_REGNUM] = offset; ++ offset += UNITS_PER_WORD; ++ cfun->machine->frame.fp_lr_offset += UNITS_PER_WORD; ++ } ++ ++ cfun->machine->frame.padding0 = ++ (AARCH64_ROUND_UP (offset, STACK_BOUNDARY / BITS_PER_UNIT) - offset); ++ offset = AARCH64_ROUND_UP (offset, STACK_BOUNDARY / BITS_PER_UNIT); ++ ++ cfun->machine->frame.saved_regs_size = offset; ++ cfun->machine->frame.laid_out = true; ++} ++ ++/* Make the last instruction frame-related and note that it performs ++ the operation described by FRAME_PATTERN. */ ++ ++static void ++aarch64_set_frame_expr (rtx frame_pattern) ++{ ++ rtx insn; ++ ++ insn = get_last_insn (); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ RTX_FRAME_RELATED_P (frame_pattern) = 1; ++ REG_NOTES (insn) = alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR, ++ frame_pattern, ++ REG_NOTES (insn)); ++} ++ ++static bool ++aarch64_register_saved_on_entry (int regno) ++{ ++ return cfun->machine->frame.reg_offset[regno] != -1; ++} ++ ++ ++static void ++aarch64_save_or_restore_fprs (int start_offset, int increment, ++ bool restore, rtx base_rtx) ++ ++{ ++ unsigned regno; ++ unsigned regno2; ++ rtx insn; ++ rtx (*gen_mem_ref)(enum machine_mode, rtx) = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM; ++ ++ ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ { ++ if (aarch64_register_saved_on_entry (regno)) ++ { ++ rtx mem; ++ mem = gen_mem_ref (DFmode, ++ plus_constant (base_rtx, ++ start_offset)); ++ ++ for (regno2 = regno + 1; ++ regno2 <= V31_REGNUM ++ && !aarch64_register_saved_on_entry (regno2); ++ regno2++) ++ { ++ /* Empty loop. */ ++ } ++ if (regno2 <= V31_REGNUM && ++ aarch64_register_saved_on_entry (regno2)) ++ { ++ rtx mem2; ++ /* Next highest register to be saved. */ ++ mem2 = gen_mem_ref (DFmode, ++ plus_constant ++ (base_rtx, ++ start_offset + increment)); ++ if (restore == false) ++ { ++ insn = emit_insn ++ ( gen_store_pairdf (mem, gen_rtx_REG (DFmode, regno), ++ mem2, gen_rtx_REG (DFmode, regno2))); ++ ++ } ++ else ++ { ++ insn = emit_insn ++ ( gen_load_pairdf (gen_rtx_REG (DFmode, regno), mem, ++ gen_rtx_REG (DFmode, regno2), mem2)); ++ ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DFmode, regno)); ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DFmode, regno2)); ++ } ++ ++ /* The first part of a frame-related parallel insn ++ is always assumed to be relevant to the frame ++ calculations; subsequent parts, are only ++ frame-related if explicitly marked. */ ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, ++ 1)) = 1; ++ regno = regno2; ++ start_offset += increment * 2; ++ } ++ else ++ { ++ if (restore == false) ++ insn = emit_move_insn (mem, gen_rtx_REG (DFmode, regno)); ++ else ++ { ++ insn = emit_move_insn (gen_rtx_REG (DFmode, regno), mem); ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno)); ++ } ++ start_offset += increment; ++ } ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++} ++ ++ ++/* offset from the stack pointer of where the saves and ++ restore's have to happen. */ ++static void ++aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset, ++ bool restore) ++{ ++ rtx insn; ++ rtx base_rtx = stack_pointer_rtx; ++ HOST_WIDE_INT start_offset = offset; ++ HOST_WIDE_INT increment = UNITS_PER_WORD; ++ rtx (*gen_mem_ref)(enum machine_mode, rtx) = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM; ++ unsigned limit = (frame_pointer_needed)? R28_REGNUM: R30_REGNUM; ++ unsigned regno; ++ unsigned regno2; ++ ++ for (regno = R0_REGNUM; regno <= limit; regno++) ++ { ++ if (aarch64_register_saved_on_entry (regno)) ++ { ++ rtx mem; ++ mem = gen_mem_ref (Pmode, ++ plus_constant (base_rtx, ++ start_offset)); ++ ++ for (regno2 = regno + 1; ++ regno2 <= limit ++ && !aarch64_register_saved_on_entry (regno2); ++ regno2++) ++ { ++ /* Empty loop. */ ++ } ++ if (regno2 <= limit && ++ aarch64_register_saved_on_entry (regno2)) ++ { ++ rtx mem2; ++ /* Next highest register to be saved. */ ++ mem2 = gen_mem_ref (Pmode, ++ plus_constant ++ (base_rtx, ++ start_offset + increment)); ++ if (restore == false) ++ { ++ insn = emit_insn ++ ( gen_store_pairdi (mem, gen_rtx_REG (DImode, regno), ++ mem2, gen_rtx_REG (DImode, regno2))); ++ ++ } ++ else ++ { ++ insn = emit_insn ++ ( gen_load_pairdi (gen_rtx_REG (DImode, regno), mem, ++ gen_rtx_REG (DImode, regno2), mem2)); ++ ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno)); ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno2)); ++ } ++ ++ /* The first part of a frame-related parallel insn ++ is always assumed to be relevant to the frame ++ calculations; subsequent parts, are only ++ frame-related if explicitly marked. */ ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, ++ 1)) = 1; ++ regno = regno2; ++ start_offset += increment * 2; ++ } ++ else ++ { ++ if (restore == false) ++ insn = emit_move_insn (mem, gen_rtx_REG (DImode, regno)); ++ else ++ { ++ insn = emit_move_insn (gen_rtx_REG (DImode, regno), mem); ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno)); ++ } ++ start_offset += increment; ++ } ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++ aarch64_save_or_restore_fprs (start_offset, increment, restore, base_rtx); ++ ++} ++ ++/* AArch64 stack frames generated by this compiler look like: ++ ++ +-------------------------------+ ++ | | ++ | incoming stack arguments | ++ | | ++ +-------------------------------+ <-- arg_pointer_rtx ++ | | ++ | callee-allocated save area | ++ | for register varargs | ++ | | ++ +-------------------------------+ ++ | | ++ | local variables | ++ | | ++ +-------------------------------+ <-- frame_pointer_rtx ++ | | ++ | callee-saved registers | ++ | | ++ +-------------------------------+ ++ | LR' | ++ +-------------------------------+ ++ | FP' | ++ P +-------------------------------+ <-- hard_frame_pointer_rtx ++ | dynamic allocation | ++ +-------------------------------+ ++ | | ++ | outgoing stack arguments | ++ | | ++ +-------------------------------+ <-- stack_pointer_rtx ++ ++ Dynamic stack allocations such as alloca insert data at point P. ++ They decrease stack_pointer_rtx but leave frame_pointer_rtx and ++ hard_frame_pointer_rtx unchanged. */ ++ ++/* Generate the prologue instructions for entry into a function. ++ Establish the stack frame by decreasing the stack pointer with a ++ properly calculated size and, if necessary, create a frame record ++ filled with the values of LR and previous frame pointer. The ++ current FP is also set up is it is in use. */ ++ ++void ++aarch64_expand_prologue (void) ++{ ++ /* sub sp, sp, # ++ stp {fp, lr}, [sp, # - 16] ++ add fp, sp, # - hardfp_offset ++ stp {cs_reg}, [fp, #-16] etc. ++ ++ sub sp, sp, ++ */ ++ HOST_WIDE_INT original_frame_size; /* local variables + vararg save */ ++ HOST_WIDE_INT frame_size, offset; ++ HOST_WIDE_INT fp_offset; /* FP offset from SP */ ++ rtx insn; ++ ++ aarch64_layout_frame (); ++ original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size; ++ gcc_assert ((!cfun->machine->saved_varargs_size || cfun->stdarg) ++ && (cfun->stdarg || !cfun->machine->saved_varargs_size)); ++ frame_size = (original_frame_size + cfun->machine->frame.saved_regs_size ++ + crtl->outgoing_args_size); ++ offset = frame_size = AARCH64_ROUND_UP (frame_size, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ ++ if (flag_stack_usage_info) ++ current_function_static_stack_size = frame_size; ++ ++ fp_offset = (offset ++ - original_frame_size ++ - cfun->machine->frame.saved_regs_size); ++ ++ /* Store pairs and load pairs have a range only of +/- 512. */ ++ if (offset >= 512) ++ { ++ /* When the frame has a large size, an initial decrease is done on ++ the stack pointer to jump over the callee-allocated save area for ++ register varargs, the local variable area and/or the callee-saved ++ register area. This will allow the pre-index write-back ++ store pair instructions to be used for setting up the stack frame ++ efficiently. */ ++ offset = original_frame_size + cfun->machine->frame.saved_regs_size; ++ if (offset >= 512) ++ offset = cfun->machine->frame.saved_regs_size; ++ ++ frame_size -= (offset + crtl->outgoing_args_size); ++ fp_offset = 0; ++ ++ if (frame_size >= 0x1000000) ++ { ++ rtx op0 = gen_rtx_REG (Pmode, IP0_REGNUM); ++ emit_move_insn (op0, GEN_INT (-frame_size)); ++ emit_insn (gen_add2_insn (stack_pointer_rtx, op0)); ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, stack_pointer_rtx, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (-frame_size)))); ++ } ++ else if (frame_size > 0) ++ { ++ if ((frame_size & 0xfff) != frame_size) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT (-(frame_size ++ & ~(HOST_WIDE_INT)0xfff)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ if ((frame_size & 0xfff) != 0) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT (-(frame_size ++ & (HOST_WIDE_INT)0xfff)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ } ++ else ++ frame_size = -1; ++ ++ if (offset > 0) ++ { ++ /* Save the frame pointer and lr if the frame pointer is needed ++ first. Make the frame pointer point to the location of the ++ old frame pointer on the stack. */ ++ if (frame_pointer_needed) ++ { ++ rtx mem_fp, mem_lr; ++ ++ if (fp_offset) ++ { ++ insn = emit_insn (gen_add2_insn (stack_pointer_rtx, ++ GEN_INT (-offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, stack_pointer_rtx, ++ gen_rtx_MINUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (offset)))); ++ mem_fp = gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset)); ++ mem_lr = gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset ++ + UNITS_PER_WORD)); ++ insn = emit_insn (gen_store_pairdi (mem_fp, ++ hard_frame_pointer_rtx, ++ mem_lr, ++ gen_rtx_REG (DImode, ++ LR_REGNUM))); ++ } ++ else ++ { ++ insn = emit_insn (gen_storewb_pairdi_di ++ (stack_pointer_rtx, stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++ gen_rtx_REG (DImode, LR_REGNUM), ++ GEN_INT (-offset), ++ GEN_INT (GET_MODE_SIZE (DImode) - offset))); ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 2)) = 1; ++ } ++ ++ /* The first part of a frame-related parallel insn is always ++ assumed to be relevant to the frame calculations; ++ subsequent parts, are only frame-related if explicitly ++ marked. */ ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1; ++ RTX_FRAME_RELATED_P (insn) = 1; ++ ++ /* Set up frame pointer to point to the location of the ++ previous frame pointer on the stack. */ ++ insn = emit_insn (gen_add3_insn (hard_frame_pointer_rtx, ++ stack_pointer_rtx, ++ GEN_INT (fp_offset))); ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, hard_frame_pointer_rtx, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (fp_offset)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ insn = emit_insn (gen_stack_tie (stack_pointer_rtx, ++ hard_frame_pointer_rtx)); ++ } ++ else ++ { ++ insn = emit_insn (gen_add2_insn (stack_pointer_rtx, ++ GEN_INT (-offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ ++ aarch64_save_or_restore_callee_save_registers ++ (fp_offset + cfun->machine->frame.hardfp_offset, 0); ++ } ++ ++ /* when offset >= 512, ++ sub sp, sp, # */ ++ if (frame_size > -1) ++ { ++ if (crtl->outgoing_args_size > 0) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT (- crtl->outgoing_args_size))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++} ++ ++/* Generate the epilogue instructions for returning from a function. */ ++void ++aarch64_expand_epilogue (bool for_sibcall) ++{ ++ HOST_WIDE_INT original_frame_size, frame_size, offset; ++ HOST_WIDE_INT fp_offset; ++ rtx insn; ++ ++ aarch64_layout_frame (); ++ original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size; ++ frame_size = (original_frame_size + cfun->machine->frame.saved_regs_size ++ + crtl->outgoing_args_size); ++ offset = frame_size = AARCH64_ROUND_UP (frame_size, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ ++ fp_offset = (offset ++ - original_frame_size ++ - cfun->machine->frame.saved_regs_size); ++ ++ /* Store pairs and load pairs have a range only of +/- 512. */ ++ if (offset >= 512) ++ { ++ offset = original_frame_size + cfun->machine->frame.saved_regs_size; ++ if (offset >= 512) ++ offset = cfun->machine->frame.saved_regs_size; ++ ++ frame_size -= (offset + crtl->outgoing_args_size); ++ fp_offset = 0; ++ if (!frame_pointer_needed && crtl->outgoing_args_size > 0) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT (crtl->outgoing_args_size))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ else ++ frame_size = -1; ++ ++ /* If there were outgoing arguments or we've done dynamic stack ++ allocation, then restore the stack pointer from the frame ++ pointer. This is at most one insn and more efficient than using ++ GCC's internal mechanism. */ ++ if (frame_pointer_needed ++ && (crtl->outgoing_args_size || cfun->calls_alloca)) ++ { ++ insn = emit_insn (gen_add3_insn (stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++ GEN_INT (- fp_offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ ++ aarch64_save_or_restore_callee_save_registers ++ (fp_offset + cfun->machine->frame.hardfp_offset, 1); ++ ++ /* Restore the frame pointer and lr if the frame pointer is needed. */ ++ if (offset > 0) ++ { ++ if (frame_pointer_needed) ++ { ++ rtx mem_fp, mem_lr; ++ ++ if (fp_offset) ++ { ++ mem_fp = gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset)); ++ mem_lr = gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset ++ + UNITS_PER_WORD)); ++ insn = emit_insn (gen_load_pairdi (hard_frame_pointer_rtx, ++ mem_fp, ++ gen_rtx_REG (DImode, ++ LR_REGNUM), ++ mem_lr)); ++ } ++ else ++ { ++ insn = emit_insn (gen_loadwb_pairdi_di ++ (stack_pointer_rtx, ++ stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++ gen_rtx_REG (DImode, LR_REGNUM), ++ GEN_INT (offset), ++ GEN_INT (GET_MODE_SIZE (DImode) + offset))); ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 2)) = 1; ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, ++ stack_pointer_rtx, ++ gen_rtx_PLUS (Pmode, stack_pointer_rtx, ++ GEN_INT (offset)))); ++ } ++ ++ /* The first part of a frame-related parallel insn ++ is always assumed to be relevant to the frame ++ calculations; subsequent parts, are only ++ frame-related if explicitly marked. */ ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1; ++ RTX_FRAME_RELATED_P (insn) = 1; ++ add_reg_note (insn, REG_CFA_RESTORE, hard_frame_pointer_rtx); ++ add_reg_note (insn, REG_CFA_RESTORE, ++ gen_rtx_REG (DImode, LR_REGNUM)); ++ ++ if (fp_offset) ++ { ++ insn = emit_insn (gen_add2_insn (stack_pointer_rtx, ++ GEN_INT (offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++ else ++ { ++ insn = emit_insn (gen_add2_insn (stack_pointer_rtx, ++ GEN_INT (offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++ /* Stack adjustment for exception handler. */ ++ if (crtl->calls_eh_return) ++ { ++ /* We need to unwind the stack by the offset computed by ++ EH_RETURN_STACKADJ_RTX. However, at this point the CFA is ++ based on SP. Ideally we would update the SP and define the ++ CFA along the lines of: ++ ++ SP = SP + EH_RETURN_STACKADJ_RTX ++ (regnote CFA = SP - EH_RETURN_STACKADJ_RTX) ++ ++ However the dwarf emitter only understands a constant ++ register offset. ++ ++ The solution choosen here is to use the otherwise unused IP0 ++ as a temporary register to hold the current SP value. The ++ CFA is described using IP0 then SP is modified. */ ++ ++ rtx ip0 = gen_rtx_REG (DImode, IP0_REGNUM); ++ ++ insn = emit_move_insn (ip0, stack_pointer_rtx); ++ add_reg_note (insn, REG_CFA_DEF_CFA, ip0); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ ++ emit_insn (gen_add2_insn (stack_pointer_rtx, EH_RETURN_STACKADJ_RTX)); ++ ++ /* Ensure the assignment to IP0 does not get optimized away. */ ++ emit_use (ip0); ++ } ++ ++ if (frame_size > -1) ++ { ++ if (frame_size >= 0x1000000) ++ { ++ rtx op0 = gen_rtx_REG (Pmode, IP0_REGNUM); ++ emit_move_insn (op0, GEN_INT (frame_size)); ++ emit_insn (gen_add2_insn (stack_pointer_rtx, op0)); ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, stack_pointer_rtx, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (frame_size)))); ++ } ++ else if (frame_size > 0) ++ { ++ if ((frame_size & 0xfff) != 0) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT ((frame_size ++ & (HOST_WIDE_INT) 0xfff)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ if ((frame_size & 0xfff) != frame_size) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT ((frame_size ++ & ~ (HOST_WIDE_INT) 0xfff)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++ aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (offset)))); ++ } ++ ++ emit_use (gen_rtx_REG (DImode, LR_REGNUM)); ++ if (!for_sibcall) ++ emit_jump_insn (ret_rtx); ++} ++ ++/* Return the place to copy the exception unwinding return address to. ++ This will probably be a stack slot, but could (in theory be the ++ return register). */ ++rtx ++aarch64_final_eh_return_addr (void) ++{ ++ HOST_WIDE_INT original_frame_size, frame_size, offset, fp_offset; ++ aarch64_layout_frame (); ++ original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size; ++ frame_size = (original_frame_size + cfun->machine->frame.saved_regs_size ++ + crtl->outgoing_args_size); ++ offset = frame_size = AARCH64_ROUND_UP (frame_size, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ fp_offset = offset ++ - original_frame_size ++ - cfun->machine->frame.saved_regs_size; ++ ++ if (cfun->machine->frame.reg_offset[LR_REGNUM] < 0) ++ return gen_rtx_REG (DImode, LR_REGNUM); ++ ++ /* DSE and CSELIB do not detect an alias between sp+k1 and fp+k2. This can ++ result in a store to save LR introduced by builtin_eh_return () being ++ incorrectly deleted because the alias is not detected. ++ So in the calculation of the address to copy the exception unwinding ++ return address to, we note 2 cases. ++ If FP is needed and the fp_offset is 0, it means that SP = FP and hence ++ we return a SP-relative location since all the addresses are SP-relative ++ in this case. This prevents the store from being optimized away. ++ If the fp_offset is not 0, then the addresses will be FP-relative and ++ therefore we return a FP-relative location. */ ++ ++ if (frame_pointer_needed) ++ { ++ if (fp_offset) ++ return gen_frame_mem (DImode, ++ plus_constant (hard_frame_pointer_rtx, UNITS_PER_WORD)); ++ else ++ return gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, UNITS_PER_WORD)); ++ } ++ ++ /* If FP is not needed, we calculate the location of LR, which would be ++ at the top of the saved registers block. */ ++ ++ return gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset ++ + cfun->machine->frame.saved_regs_size ++ - 2 * UNITS_PER_WORD)); ++} ++ ++/* Output code to build up a constant in a register. */ ++static void ++aarch64_build_constant (FILE *file, ++ int regnum, ++ HOST_WIDE_INT val) ++{ ++ if (aarch64_bitmask_imm (val, DImode)) ++ asm_fprintf (file, "\tmovi\t%r, %wd\n", regnum, val); ++ else ++ { ++ int i; ++ int ncount = 0; ++ int zcount = 0; ++ HOST_WIDE_INT valp = val >> 16; ++ HOST_WIDE_INT valm; ++ HOST_WIDE_INT tval; ++ ++ for (i = 16; i < 64; i += 16) ++ { ++ valm = (valp & 0xffff); ++ ++ if (valm != 0) ++ ++ zcount; ++ ++ if (valm != 0xffff) ++ ++ ncount; ++ ++ valp >>= 16; ++ } ++ ++ /* zcount contains the number of additional MOVK instructions ++ required if the constant is built up with an initial MOVZ instruction, ++ while ncount is the number of MOVK instructions required if starting ++ with a MOVN instruction. Choose the sequence that yields the fewest ++ number of instructions, preferring MOVZ instructions when they are both ++ the same. */ ++ if (ncount < zcount) ++ { ++ asm_fprintf (file, "\tmovn\t%r, %wd\n", regnum, (~val) & 0xffff); ++ tval = 0xffff; ++ } ++ else ++ { ++ asm_fprintf (file, "\tmovz\t%r, %wd\n", regnum, val & 0xffff); ++ tval = 0; ++ } ++ ++ val >>= 16; ++ ++ for (i = 16; i < 64; i += 16) ++ { ++ if ((val & 0xffff) != tval) ++ asm_fprintf (file, "\tmovk\t%r, %wd, lsl %d\n", ++ regnum, val & 0xffff, i); ++ val >>= 16; ++ } ++ } ++} ++ ++static void ++aarch64_add_constant (FILE *file, int regnum, int scratchreg, ++ HOST_WIDE_INT delta) ++{ ++ HOST_WIDE_INT mdelta = delta; ++ ++ if (mdelta < 0) ++ mdelta = -mdelta; ++ ++ if (mdelta >= 4096 * 4096) ++ { ++ aarch64_build_constant (file, scratchreg, delta); ++ asm_fprintf (file, "\tadd\t%r, %r, %r\n", regnum, regnum, ++ scratchreg); ++ } ++ else if (mdelta > 0) ++ { ++ const char *const mi_op = delta < 0 ? "sub" : "add"; ++ ++ if (mdelta >= 4096) ++ asm_fprintf (file, "\t%s\t%r, %r, %wd, lsl 12\n", mi_op, regnum, regnum, ++ mdelta / 4096); ++ ++ if (mdelta % 4096 != 0) ++ asm_fprintf (file, "\t%s\t%r, %r, %wd\n", mi_op, regnum, regnum, ++ mdelta % 4096); ++ } ++} ++ ++/* Output code to add DELTA to the first argument, and then jump ++ to FUNCTION. Used for C++ multiple inheritance. */ ++static void ++aarch64_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED, ++ HOST_WIDE_INT delta, ++ HOST_WIDE_INT vcall_offset, ++ tree function) ++{ ++ /* The this pointer is always in x0. Note that this differs from ++ Arm where the this pointer maybe bumped to r1 if r0 is required ++ to return a pointer to an aggregate. On AArch64 a result value ++ pointer will be in x8. */ ++ int this_regno = R0_REGNUM; ++ ++ /* Make sure unwind info is emitted for the thunk if needed. */ ++ final_start_function (emit_barrier (), file, 1); ++ ++ if (vcall_offset == 0) ++ aarch64_add_constant (file, this_regno, IP1_REGNUM, delta); ++ else ++ { ++ gcc_assert ((vcall_offset & 0x7) == 0); ++ ++ if (delta == 0) ++ asm_fprintf (file, "\tldr\t%r, [%r]\n", IP0_REGNUM, this_regno); ++ else if (delta >= -256 && delta < 256) ++ asm_fprintf (file, "\tldr\t%r, [%r,%wd]!\n", IP0_REGNUM, this_regno, ++ delta); ++ else ++ { ++ aarch64_add_constant (file, this_regno, IP1_REGNUM, delta); ++ ++ asm_fprintf (file, "\tldr\t%r, [%r]\n", IP0_REGNUM, this_regno); ++ } ++ ++ if (vcall_offset >= -256 && vcall_offset < 32768) ++ asm_fprintf (file, "\tldr\t%r, [%r,%wd]\n", IP1_REGNUM, IP0_REGNUM, ++ vcall_offset); ++ else ++ { ++ aarch64_build_constant (file, IP1_REGNUM, vcall_offset); ++ asm_fprintf (file, "\tldr\t%r, [%r,%r]\n", IP1_REGNUM, IP0_REGNUM, ++ IP1_REGNUM); ++ } ++ ++ asm_fprintf (file, "\tadd\t%r, %r, %r\n", this_regno, this_regno, ++ IP1_REGNUM); ++ } ++ ++ output_asm_insn ("b\t%a0", &XEXP (DECL_RTL (function), 0)); ++ final_end_function (); ++} ++ ++ ++static int ++aarch64_tls_operand_p_1 (rtx *x, void *data ATTRIBUTE_UNUSED) ++{ ++ if (GET_CODE (*x) == SYMBOL_REF) ++ return SYMBOL_REF_TLS_MODEL (*x) != 0; ++ ++ /* Don't recurse into UNSPEC_TLS looking for TLS symbols; these are ++ TLS offsets, not real symbol references. */ ++ if (GET_CODE (*x) == UNSPEC ++ && XINT (*x, 1) == UNSPEC_TLS) ++ return -1; ++ ++ return 0; ++} ++ ++static bool ++aarch64_tls_referenced_p (rtx x) ++{ ++ if (!TARGET_HAVE_TLS) ++ return false; ++ ++ return for_each_rtx (&x, aarch64_tls_operand_p_1, NULL); ++} ++ ++ ++static int ++aarch64_bitmasks_cmp (const void *i1, const void *i2) ++{ ++ const unsigned HOST_WIDE_INT *imm1 = (const unsigned HOST_WIDE_INT *) i1; ++ const unsigned HOST_WIDE_INT *imm2 = (const unsigned HOST_WIDE_INT *) i2; ++ ++ if (*imm1 < *imm2) ++ return -1; ++ if (*imm1 > *imm2) ++ return +1; ++ return 0; ++} ++ ++ ++static void ++aarch64_build_bitmask_table (void) ++{ ++ unsigned HOST_WIDE_INT mask, imm; ++ unsigned int log_e, e, s, r; ++ unsigned int nimms = 0; ++ ++ for (log_e = 1; log_e <= 6; log_e++) ++ { ++ e = 1 << log_e; ++ if (e == 64) ++ mask = ~(HOST_WIDE_INT) 0; ++ else ++ mask = ((HOST_WIDE_INT) 1 << e) - 1; ++ for (s = 1; s < e; s++) ++ { ++ for (r = 0; r < e; r++) ++ { ++ /* set s consecutive bits to 1 (s < 64) */ ++ imm = ((unsigned HOST_WIDE_INT)1 << s) - 1; ++ /* rotate right by r */ ++ if (r != 0) ++ imm = ((imm >> r) | (imm << (e - r))) & mask; ++ /* replicate the constant depending on SIMD size */ ++ switch (log_e) { ++ case 1: imm |= (imm << 2); ++ case 2: imm |= (imm << 4); ++ case 3: imm |= (imm << 8); ++ case 4: imm |= (imm << 16); ++ case 5: imm |= (imm << 32); ++ case 6: ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ gcc_assert (nimms < AARCH64_NUM_BITMASKS); ++ aarch64_bitmasks[nimms++] = imm; ++ } ++ } ++ } ++ ++ gcc_assert (nimms == AARCH64_NUM_BITMASKS); ++ qsort (aarch64_bitmasks, nimms, sizeof (aarch64_bitmasks[0]), ++ aarch64_bitmasks_cmp); ++} ++ ++ ++/* Return true if val can be encoded as a 12-bit unsigned immediate with ++ a left shift of 0 or 12 bits. */ ++bool ++aarch64_uimm12_shift (HOST_WIDE_INT val) ++{ ++ return ((val & (((HOST_WIDE_INT) 0xfff) << 0)) == val ++ || (val & (((HOST_WIDE_INT) 0xfff) << 12)) == val ++ ); ++} ++ ++ ++/* Return true if val is an immediate that can be loaded into a ++ register by a MOVZ instruction. */ ++static bool ++aarch64_movw_imm (HOST_WIDE_INT val, enum machine_mode mode) ++{ ++ if (GET_MODE_SIZE (mode) > 4) ++ { ++ if ((val & (((HOST_WIDE_INT) 0xffff) << 32)) == val ++ || (val & (((HOST_WIDE_INT) 0xffff) << 48)) == val) ++ return 1; ++ } ++ else ++ { ++ /* Ignore sign extension. */ ++ val &= (HOST_WIDE_INT) 0xffffffff; ++ } ++ return ((val & (((HOST_WIDE_INT) 0xffff) << 0)) == val ++ || (val & (((HOST_WIDE_INT) 0xffff) << 16)) == val); ++} ++ ++ ++/* Return true if val is a valid bitmask immediate. */ ++bool ++aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode mode) ++{ ++ if (GET_MODE_SIZE (mode) < 8) ++ { ++ /* Replicate bit pattern. */ ++ val &= (HOST_WIDE_INT) 0xffffffff; ++ val |= val << 32; ++ } ++ return bsearch (&val, aarch64_bitmasks, AARCH64_NUM_BITMASKS, ++ sizeof (aarch64_bitmasks[0]), aarch64_bitmasks_cmp) != NULL; ++} ++ ++ ++/* Return true if val is an immediate that can be loaded into a ++ register in a single instruction. */ ++bool ++aarch64_move_imm (HOST_WIDE_INT val, enum machine_mode mode) ++{ ++ if (aarch64_movw_imm (val, mode) || aarch64_movw_imm (~val, mode)) ++ return 1; ++ return aarch64_bitmask_imm (val, mode); ++} ++ ++static bool ++aarch64_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) ++{ ++ rtx base, offset; ++ if (GET_CODE (x) == HIGH) ++ return true; ++ ++ split_const (x, &base, &offset); ++ if (GET_CODE (base) == SYMBOL_REF || GET_CODE (base) == LABEL_REF) ++ return (aarch64_classify_symbol (base, SYMBOL_CONTEXT_ADR) != SYMBOL_FORCE_TO_MEM); ++ ++ return aarch64_tls_referenced_p (x); ++} ++ ++/* Return true if register REGNO is a valid index register. ++ STRICT_P is true if REG_OK_STRICT is in effect. */ ++ ++bool ++aarch64_regno_ok_for_index_p (int regno, bool strict_p) ++{ ++ if (!HARD_REGISTER_NUM_P (regno)) ++ { ++ if (!strict_p) ++ return true; ++ ++ if (!reg_renumber) ++ return false; ++ ++ regno = reg_renumber[regno]; ++ } ++ return GP_REGNUM_P (regno); ++} ++ ++/* Return true if register REGNO is a valid base register for mode MODE. ++ STRICT_P is true if REG_OK_STRICT is in effect. */ ++ ++bool ++aarch64_regno_ok_for_base_p (int regno, bool strict_p) ++{ ++ if (!HARD_REGISTER_NUM_P (regno)) ++ { ++ if (!strict_p) ++ return true; ++ ++ if (!reg_renumber) ++ return false; ++ ++ regno = reg_renumber[regno]; ++ } ++ ++ /* The fake registers will be eliminated to either the stack or ++ hard frame pointer, both of which are usually valid base registers. ++ Reload deals with the cases where the eliminated form isn't valid. */ ++ return (GP_REGNUM_P (regno) ++ || regno == SP_REGNUM ++ || regno == FRAME_POINTER_REGNUM ++ || regno == ARG_POINTER_REGNUM); ++} ++ ++/* Return true if X is a valid base register for mode MODE. ++ STRICT_P is true if REG_OK_STRICT is in effect. */ ++ ++static bool ++aarch64_base_register_rtx_p (rtx x, bool strict_p) ++{ ++ if (!strict_p && GET_CODE (x) == SUBREG) ++ x = SUBREG_REG (x); ++ ++ return (REG_P (x) && aarch64_regno_ok_for_base_p (REGNO (x), strict_p)); ++} ++ ++/* Return true if address offset is a valid index. If it is, fill in INFO ++ appropriately. STRICT_P is true if REG_OK_STRICT is in effect. */ ++ ++static bool ++aarch64_classify_index (struct aarch64_address_info *info, rtx x, ++ enum machine_mode mode, bool strict_p) ++{ ++ enum aarch64_address_type type; ++ rtx index; ++ int shift; ++ ++ /* (reg:P) */ ++ if ((REG_P (x) || GET_CODE (x) == SUBREG) ++ && GET_MODE (x) == Pmode) ++ { ++ type = ADDRESS_REG_REG; ++ index = x; ++ shift = 0; ++ } ++ /* (sign_extend:DI (reg:SI)) */ ++ else if ((GET_CODE (x) == SIGN_EXTEND ++ || GET_CODE (x) == ZERO_EXTEND) ++ && GET_MODE (x) == DImode ++ && GET_MODE (XEXP (x, 0)) == SImode) ++ { ++ type = (GET_CODE (x) == SIGN_EXTEND) ++ ? ADDRESS_REG_SXTW : ADDRESS_REG_UXTW; ++ index = XEXP (x, 0); ++ shift = 0; ++ } ++ /* (mult:DI (sign_extend:DI (reg:SI)) (const_int scale)) */ ++ else if (GET_CODE (x) == MULT ++ && (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND ++ || GET_CODE (XEXP (x, 0)) == ZERO_EXTEND) ++ && GET_MODE (XEXP (x, 0)) == DImode ++ && GET_MODE (XEXP (XEXP (x, 0), 0)) == SImode ++ && CONST_INT_P (XEXP (x, 1))) ++ { ++ type = (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND) ++ ? ADDRESS_REG_SXTW : ADDRESS_REG_UXTW; ++ index = XEXP (XEXP (x, 0), 0); ++ shift = exact_log2 (INTVAL (XEXP (x, 1))); ++ } ++ /* (ashift:DI (sign_extend:DI (reg:SI)) (const_int shift)) */ ++ else if (GET_CODE (x) == ASHIFT ++ && (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND ++ || GET_CODE (XEXP (x, 0)) == ZERO_EXTEND) ++ && GET_MODE (XEXP (x, 0)) == DImode ++ && GET_MODE (XEXP (XEXP (x, 0), 0)) == SImode ++ && CONST_INT_P (XEXP (x, 1))) ++ { ++ type = (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND) ++ ? ADDRESS_REG_SXTW : ADDRESS_REG_UXTW; ++ index = XEXP (XEXP (x, 0), 0); ++ shift = INTVAL (XEXP (x, 1)); ++ } ++ /* (sign_extract:DI (mult:DI (reg:DI) (const_int scale)) 32+shift 0) */ ++ else if ((GET_CODE (x) == SIGN_EXTRACT ++ || GET_CODE (x) == ZERO_EXTRACT) ++ && GET_MODE (x) == DImode ++ && GET_CODE (XEXP (x, 0)) == MULT ++ && GET_MODE (XEXP (XEXP (x, 0), 0)) == DImode ++ && CONST_INT_P (XEXP (XEXP (x, 0), 1))) ++ { ++ type = (GET_CODE (x) == SIGN_EXTRACT) ++ ? ADDRESS_REG_SXTW : ADDRESS_REG_UXTW; ++ index = XEXP (XEXP (x, 0), 0); ++ shift = exact_log2 (INTVAL (XEXP (XEXP (x, 0), 1))); ++ if (INTVAL (XEXP (x, 1)) != 32 + shift ++ || INTVAL (XEXP (x, 2)) != 0) ++ shift = -1; ++ } ++ /* (and:DI (mult:DI (reg:DI) (const_int scale)) ++ (const_int 0xffffffff< 0 && shift <= 3 ++ && (1 << shift) == GET_MODE_SIZE (mode))) ++ && REG_P (index) ++ && aarch64_regno_ok_for_index_p (REGNO (index), strict_p)) ++ { ++ info->type = type; ++ info->offset = index; ++ info->shift = shift; ++ return true; ++ } ++ ++ return false; ++} ++ ++static inline bool ++offset_7bit_signed_scaled_p (enum machine_mode mode, HOST_WIDE_INT offset) ++{ ++ return (offset >= -64 * GET_MODE_SIZE (mode) ++ && offset < 64 * GET_MODE_SIZE (mode) ++ && offset % GET_MODE_SIZE (mode) == 0); ++} ++ ++static inline bool ++offset_9bit_signed_unscaled_p (enum machine_mode mode ATTRIBUTE_UNUSED, ++ HOST_WIDE_INT offset) ++{ ++ return offset >= -256 && offset < 256; ++} ++ ++static inline bool ++offset_12bit_unsigned_scaled_p (enum machine_mode mode, HOST_WIDE_INT offset) ++{ ++ return (offset >= 0 ++ && offset < 4096 * GET_MODE_SIZE (mode) ++ && offset % GET_MODE_SIZE (mode) == 0); ++} ++ ++/* Return true if X is a valid address for machine mode MODE. If it is, ++ fill in INFO appropriately. STRICT_P is true if REG_OK_STRICT is in ++ effect. OUTER_CODE is PARALLEL for a load/store pair. */ ++ ++static bool ++aarch64_classify_address (struct aarch64_address_info *info, ++ rtx x, enum machine_mode mode, ++ RTX_CODE outer_code, bool strict_p) ++{ ++ enum rtx_code code = GET_CODE (x); ++ rtx op0, op1; ++ bool allow_reg_index_p = ++ outer_code != PARALLEL && GET_MODE_SIZE(mode) != 16; ++ ++ /* Don't support anything other than POST_INC or REG addressing for ++ AdvSIMD. */ ++ if (aarch64_vector_mode_p (mode) ++ && (code != POST_INC && code != REG)) ++ return false; ++ ++ switch (code) ++ { ++ case REG: ++ case SUBREG: ++ info->type = ADDRESS_REG_IMM; ++ info->base = x; ++ info->offset = const0_rtx; ++ return aarch64_base_register_rtx_p (x, strict_p); ++ ++ case PLUS: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ if (GET_MODE_SIZE (mode) != 0 ++ && CONST_INT_P (op1) ++ && aarch64_base_register_rtx_p (op0, strict_p)) ++ { ++ HOST_WIDE_INT offset = INTVAL (op1); ++ ++ info->type = ADDRESS_REG_IMM; ++ info->base = op0; ++ info->offset = op1; ++ ++ /* TImode and TFmode values are allowed in both pairs of X ++ registers and individual Q registers. The available ++ address modes are: ++ X,X: 7-bit signed scaled offset ++ Q: 9-bit signed offset ++ We conservatively require an offset representable in either mode. ++ */ ++ if (mode == TImode || mode == TFmode) ++ return (offset_7bit_signed_scaled_p (mode, offset) ++ && offset_9bit_signed_unscaled_p (mode, offset)); ++ ++ if (outer_code == PARALLEL) ++ return ((GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8) ++ && offset_7bit_signed_scaled_p (mode, offset)); ++ else ++ return (offset_9bit_signed_unscaled_p (mode, offset) ++ || offset_12bit_unsigned_scaled_p (mode, offset)); ++ } ++ ++ if (allow_reg_index_p) ++ { ++ /* Look for base + (scaled/extended) index register. */ ++ if (aarch64_base_register_rtx_p (op0, strict_p) ++ && aarch64_classify_index (info, op1, mode, strict_p)) ++ { ++ info->base = op0; ++ return true; ++ } ++ if (aarch64_base_register_rtx_p (op1, strict_p) ++ && aarch64_classify_index (info, op0, mode, strict_p)) ++ { ++ info->base = op1; ++ return true; ++ } ++ } ++ ++ return false; ++ ++ case POST_INC: ++ case POST_DEC: ++ case PRE_INC: ++ case PRE_DEC: ++ info->type = ADDRESS_REG_WB; ++ info->base = XEXP (x, 0); ++ info->offset = NULL_RTX; ++ return aarch64_base_register_rtx_p (info->base, strict_p); ++ ++ case POST_MODIFY: ++ case PRE_MODIFY: ++ info->type = ADDRESS_REG_WB; ++ info->base = XEXP (x, 0); ++ if (GET_CODE (XEXP (x, 1)) == PLUS ++ && CONST_INT_P (XEXP (XEXP (x, 1), 1)) ++ && rtx_equal_p (XEXP (XEXP (x, 1), 0), info->base) ++ && aarch64_base_register_rtx_p (info->base, strict_p)) ++ { ++ HOST_WIDE_INT offset; ++ info->offset = XEXP (XEXP (x, 1), 1); ++ offset = INTVAL (info->offset); ++ ++ /* TImode and TFmode values are allowed in both pairs of X ++ registers and individual Q registers. The available ++ address modes are: ++ X,X: 7-bit signed scaled offset ++ Q: 9-bit signed offset ++ We conservatively require an offset representable in either mode. ++ */ ++ if (mode == TImode || mode == TFmode) ++ return (offset_7bit_signed_scaled_p (mode, offset) ++ && offset_9bit_signed_unscaled_p (mode, offset)); ++ ++ if (outer_code == PARALLEL) ++ return ((GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8) ++ && offset_7bit_signed_scaled_p (mode, offset)); ++ else ++ return offset_9bit_signed_unscaled_p (mode, offset); ++ } ++ return false; ++ ++ case CONST: ++ case SYMBOL_REF: ++ case LABEL_REF: ++ /* load literal: pc-relative constant pool entry. */ ++ info->type = ADDRESS_SYMBOLIC; ++ if (outer_code != PARALLEL) ++ { ++ rtx sym, addend; ++ ++ split_const (x, &sym, &addend); ++ return (GET_CODE (sym) == LABEL_REF ++ || (GET_CODE (sym) == SYMBOL_REF ++ && CONSTANT_POOL_ADDRESS_P (sym))); ++ } ++ return false; ++ ++ case LO_SUM: ++ info->type = ADDRESS_LO_SUM; ++ info->base = XEXP (x, 0); ++ info->offset = XEXP (x, 1); ++ if (allow_reg_index_p ++ && aarch64_base_register_rtx_p (info->base, strict_p)) ++ { ++ rtx sym, offs; ++ split_const (info->offset, &sym, &offs); ++ if (GET_CODE (sym) == SYMBOL_REF ++ && (aarch64_classify_symbol (sym, SYMBOL_CONTEXT_MEM) ++ == SYMBOL_SMALL_ABSOLUTE)) ++ { ++ /* The symbol and offset must be aligned to the access size. */ ++ unsigned int align; ++ unsigned int ref_size; ++ ++ if (CONSTANT_POOL_ADDRESS_P (sym)) ++ align = GET_MODE_ALIGNMENT (get_pool_mode (sym)); ++ else if (TREE_CONSTANT_POOL_ADDRESS_P (sym)) ++ { ++ tree exp = SYMBOL_REF_DECL (sym); ++ align = TYPE_ALIGN (TREE_TYPE (exp)); ++ align = CONSTANT_ALIGNMENT (exp, align); ++ } ++ else if (SYMBOL_REF_DECL (sym)) ++ align = DECL_ALIGN (SYMBOL_REF_DECL (sym)); ++ else ++ align = BITS_PER_UNIT; ++ ++ ref_size = GET_MODE_SIZE (mode); ++ if (ref_size == 0) ++ ref_size = GET_MODE_SIZE (DImode); ++ ++ return ((INTVAL (offs) & (ref_size - 1)) == 0 ++ && ((align / BITS_PER_UNIT) & (ref_size - 1)) == 0); ++ } ++ } ++ return false; ++ ++ default: ++ return false; ++ } ++} ++ ++bool ++aarch64_symbolic_address_p (rtx x) ++{ ++ rtx offset; ++ ++ split_const (x, &x, &offset); ++ return GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF; ++} ++ ++/* Classify the base of symbolic expression X, given that X appears in ++ context CONTEXT. */ ++static enum aarch64_symbol_type ++aarch64_classify_symbolic_expression (rtx x, enum aarch64_symbol_context context) ++{ ++ rtx offset; ++ split_const (x, &x, &offset); ++ return aarch64_classify_symbol (x, context); ++} ++ ++ ++/* Return TRUE if X is a legitimate address for accessing memory in ++ mode MODE. */ ++static bool ++aarch64_legitimate_address_hook_p (enum machine_mode mode, rtx x, bool strict_p) ++{ ++ struct aarch64_address_info addr; ++ ++ return aarch64_classify_address (&addr, x, mode, MEM, strict_p); ++} ++ ++/* Return TRUE if X is a legitimate address for accessing memory in ++ mode MODE. OUTER_CODE will be PARALLEL if this is a load/store ++ pair operation. */ ++bool ++aarch64_legitimate_address_p (enum machine_mode mode, rtx x, ++ RTX_CODE outer_code, bool strict_p) ++{ ++ struct aarch64_address_info addr; ++ ++ return aarch64_classify_address (&addr, x, mode, outer_code, strict_p); ++} ++ ++/* Return TRUE if rtx X is immediate constant 0.0 */ ++bool ++aarch64_const_double_zero_rtx_p (rtx x) ++{ ++ REAL_VALUE_TYPE r; ++ ++ if (GET_MODE (x) == VOIDmode) ++ return false; ++ ++ REAL_VALUE_FROM_CONST_DOUBLE (r, x); ++ if (REAL_VALUE_MINUS_ZERO (r)) ++ return !HONOR_SIGNED_ZEROS (GET_MODE (x)); ++ return REAL_VALUES_EQUAL (r, dconst0); ++} ++ ++enum machine_mode ++aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y) ++{ ++ /* All floating point compares return CCFP if it is an equality ++ comparison, and CCFPE otherwise. */ ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) ++ { ++ switch (code) ++ { ++ case EQ: ++ case NE: ++ case UNORDERED: ++ case ORDERED: ++ case UNLT: ++ case UNLE: ++ case UNGT: ++ case UNGE: ++ case UNEQ: ++ case LTGT: ++ return CCFPmode; ++ ++ case LT: ++ case LE: ++ case GT: ++ case GE: ++ return CCFPEmode; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ ++ if ((GET_MODE (x) == SImode || GET_MODE (x) == DImode) ++ && y == const0_rtx ++ && (code == EQ || code == NE || code == LT || code == GE) ++ && (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS)) ++ return CC_NZmode; ++ ++ /* A compare with a shifted operand. Because of canonicalization, ++ the comparison will have to be swapped when we emit the assembly ++ code. */ ++ if ((GET_MODE (x) == SImode || GET_MODE (x) == DImode) ++ && (GET_CODE (y) == REG || GET_CODE (y) == SUBREG) ++ && (GET_CODE (x) == ASHIFT || GET_CODE (x) == ASHIFTRT ++ || GET_CODE (x) == LSHIFTRT ++ || GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)) ++ return CC_SWPmode; ++ ++ /* A compare of a mode narrower than SI mode against zero can be done ++ by extending the value in the comparison. */ ++ if ((GET_MODE (x) == QImode || GET_MODE (x) == HImode) ++ && y == const0_rtx) ++ /* Only use sign-extension if we really need it. */ ++ return ((code == GT || code == GE || code == LE || code == LT) ++ ? CC_SESWPmode : CC_ZESWPmode); ++ ++ /* For everything else, return CCmode. */ ++ return CCmode; ++} ++ ++static unsigned ++aarch64_get_condition_code (rtx x) ++{ ++ enum machine_mode mode = GET_MODE (XEXP (x, 0)); ++ enum rtx_code comp_code = GET_CODE (x); ++ ++ if (GET_MODE_CLASS (mode) != MODE_CC) ++ mode = SELECT_CC_MODE (comp_code, XEXP (x, 0), XEXP (x, 1)); ++ ++ switch (mode) ++ { ++ case CCFPmode: ++ case CCFPEmode: ++ switch (comp_code) ++ { ++ case GE: return AARCH64_GE; ++ case GT: return AARCH64_GT; ++ case LE: return AARCH64_LS; ++ case LT: return AARCH64_MI; ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ case ORDERED: return AARCH64_VC; ++ case UNORDERED: return AARCH64_VS; ++ case UNLT: return AARCH64_LT; ++ case UNLE: return AARCH64_LE; ++ case UNGT: return AARCH64_HI; ++ case UNGE: return AARCH64_PL; ++ default: gcc_unreachable (); ++ } ++ break; ++ ++ case CCmode: ++ switch (comp_code) ++ { ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ case GE: return AARCH64_GE; ++ case GT: return AARCH64_GT; ++ case LE: return AARCH64_LE; ++ case LT: return AARCH64_LT; ++ case GEU: return AARCH64_CS; ++ case GTU: return AARCH64_HI; ++ case LEU: return AARCH64_LS; ++ case LTU: return AARCH64_CC; ++ default: gcc_unreachable (); ++ } ++ break; ++ ++ case CC_SWPmode: ++ case CC_ZESWPmode: ++ case CC_SESWPmode: ++ switch (comp_code) ++ { ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ case GE: return AARCH64_LE; ++ case GT: return AARCH64_LT; ++ case LE: return AARCH64_GE; ++ case LT: return AARCH64_GT; ++ case GEU: return AARCH64_LS; ++ case GTU: return AARCH64_CC; ++ case LEU: return AARCH64_CS; ++ case LTU: return AARCH64_HI; ++ default: gcc_unreachable (); ++ } ++ break; ++ ++ case CC_NZmode: ++ switch (comp_code) ++ { ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ case GE: return AARCH64_PL; ++ case LT: return AARCH64_MI; ++ default: gcc_unreachable (); ++ } ++ break; ++ ++ default: ++ gcc_unreachable (); ++ break; ++ } ++} ++ ++static unsigned ++bit_count (unsigned HOST_WIDE_INT value) ++{ ++ unsigned count = 0; ++ ++ while (value) ++ { ++ count++; ++ value &= value - 1; ++ } ++ ++ return count; ++} ++ ++void ++aarch64_print_operand (FILE *f, rtx x, char code) ++{ ++ switch (code) ++ { ++ case 'e': ++ /* Print the sign/zero-extend size as a character 8->b, 16->h, 32->w. */ ++ { ++ int n; ++ ++ if (GET_CODE (x) != CONST_INT ++ || (n = exact_log2 (INTVAL (x) & ~7)) <= 0) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ switch (n) ++ { ++ case 3: ++ fputc ('b', f); ++ break; ++ case 4: ++ fputc ('h', f); ++ break; ++ case 5: ++ fputc ('w', f); ++ break; ++ default: ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ } ++ break; ++ ++ case 'p': ++ { ++ int n; ++ ++ /* Print N such that 2^N == X. */ ++ if (GET_CODE (x) != CONST_INT || (n = exact_log2 (INTVAL (x))) < 0) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ asm_fprintf (f, "%d", n); ++ } ++ break; ++ ++ case 'P': ++ /* Print the number of non-zero bits in X (a const_int). */ ++ if (GET_CODE (x) != CONST_INT) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ asm_fprintf (f, "%u", bit_count (INTVAL (x))); ++ break; ++ ++ case 'H': ++ /* Print the higher numbered register of a pair (TImode) of regs. */ ++ if (GET_CODE (x) != REG || !GP_REGNUM_P (REGNO (x) + 1)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ asm_fprintf (f, "%r", REGNO (x) + 1); ++ break; ++ ++ case 'Q': ++ /* Print the least significant register of a pair (TImode) of regs. */ ++ if (GET_CODE (x) != REG || !GP_REGNUM_P (REGNO (x) + 1)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ asm_fprintf (f, "%r", REGNO (x) + (WORDS_BIG_ENDIAN ? 1 : 0)); ++ break; ++ ++ case 'R': ++ /* Print the most significant register of a pair (TImode) of regs. */ ++ if (GET_CODE (x) != REG || !GP_REGNUM_P (REGNO (x) + 1)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ asm_fprintf (f, "%r", REGNO (x) + (WORDS_BIG_ENDIAN ? 0 : 1)); ++ break; ++ ++ case 'm': ++ /* Print a condition (eq, ne, etc). */ ++ ++ /* CONST_TRUE_RTX means always -- that's the default. */ ++ if (x == const_true_rtx) ++ return; ++ ++ if (!COMPARISON_P (x)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ fputs (aarch64_condition_codes[aarch64_get_condition_code (x)], f); ++ break; ++ ++ case 'M': ++ /* Print the inverse of a condition (eq <-> ne, etc). */ ++ ++ /* CONST_TRUE_RTX means never -- that's the default. */ ++ if (x == const_true_rtx) ++ { ++ fputs ("nv", f); ++ return; ++ } ++ ++ if (!COMPARISON_P (x)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ fputs (aarch64_condition_codes[AARCH64_INVERSE_CONDITION_CODE ++ (aarch64_get_condition_code (x))], f); ++ break; ++ ++ case 'b': ++ case 'h': ++ case 's': ++ case 'd': ++ case 'q': ++ /* Print a scalar FP/SIMD register name. */ ++ if (!REG_P (x) || !FP_REGNUM_P (REGNO (x))) ++ { ++ output_operand_lossage ("incompatible floating point / vector register operand for '%%%c'", code); ++ return; ++ } ++ asm_fprintf (f, "%s%c%d", REGISTER_PREFIX, code, REGNO (x) - V0_REGNUM); ++ break; ++ ++ case 'S': ++ case 'T': ++ case 'U': ++ case 'V': ++ /* Print the first FP/SIMD register name in a list. */ ++ if (!REG_P (x) || !FP_REGNUM_P (REGNO (x))) ++ { ++ output_operand_lossage ("incompatible floating point / vector register operand for '%%%c'", code); ++ return; ++ } ++ asm_fprintf (f, "%sv%d", REGISTER_PREFIX, ++ REGNO (x) - V0_REGNUM + (code - 'S')); ++ break; ++ ++ case 'w': ++ case 'x': ++ /* Print a general register name or the zero register (32-bit or ++ 64-bit). */ ++ if (x == const0_rtx) ++ { ++ asm_fprintf (f, "%s%czr", REGISTER_PREFIX, code); ++ break; ++ } ++ ++ if (REG_P (x) && GP_REGNUM_P (REGNO (x))) ++ { ++ asm_fprintf (f, "%s%c%d", REGISTER_PREFIX, code, ++ REGNO (x) - R0_REGNUM); ++ break; ++ } ++ ++ if (REG_P (x) && REGNO (x) == SP_REGNUM) ++ { ++ asm_fprintf (f, "%s%ssp", REGISTER_PREFIX, code == 'w' ? "w" : ""); ++ break; ++ } ++ ++ /* Fall through */ ++ ++ case 0: ++ /* Print a normal operand, if it's a general register, then we ++ assume DImode. */ ++ if (x == NULL) ++ { ++ output_operand_lossage ("missing operand"); ++ return; ++ } ++ ++ switch (GET_CODE (x)) ++ { ++ case REG: ++ asm_fprintf (f, "%r", REGNO (x)); ++ break; ++ ++ case MEM: ++ aarch64_memory_reference_mode = GET_MODE (x); ++ output_address (XEXP (x, 0)); ++ break; ++ ++ case LABEL_REF: ++ case SYMBOL_REF: ++ output_addr_const (asm_out_file, x); ++ break; ++ ++ case CONST_INT: ++ asm_fprintf (f, "%wd", INTVAL (x)); ++ break; ++ ++ case CONST_VECTOR: ++ gcc_assert (aarch64_const_vec_all_same_int_p (x, HOST_WIDE_INT_MIN, ++ HOST_WIDE_INT_MAX)); ++ asm_fprintf (f, "%wd", INTVAL (CONST_VECTOR_ELT (x, 0))); ++ break; ++ ++ default: ++ output_operand_lossage ("invalid operand"); ++ return; ++ } ++ break; ++ ++ case 'A': ++ if (GET_CODE (x) == HIGH) ++ x = XEXP (x, 0); ++ ++ switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR)) ++ { ++ case SYMBOL_SMALL_GOT: ++ asm_fprintf (asm_out_file, ":got:"); ++ break; ++ ++ case SYMBOL_SMALL_TLSGD: ++ asm_fprintf (asm_out_file, ":tlsgd:"); ++ break; ++ ++ case SYMBOL_SMALL_TLSDESC: ++ asm_fprintf (asm_out_file, ":tlsdesc:"); ++ break; ++ ++ case SYMBOL_SMALL_GOTTPREL: ++ asm_fprintf (asm_out_file, ":gottprel:"); ++ break; ++ ++ case SYMBOL_SMALL_TPREL: ++ asm_fprintf (asm_out_file, ":tprel:"); ++ break; ++ ++ default: ++ break; ++ } ++ output_addr_const (asm_out_file, x); ++ break; ++ ++ case 'L': ++ switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR)) ++ { ++ case SYMBOL_SMALL_GOT: ++ asm_fprintf (asm_out_file, ":lo12:"); ++ break; ++ ++ case SYMBOL_SMALL_TLSGD: ++ asm_fprintf (asm_out_file, ":tlsgd_lo12:"); ++ break; ++ ++ case SYMBOL_SMALL_TLSDESC: ++ asm_fprintf (asm_out_file, ":tlsdesc_lo12:"); ++ break; ++ ++ case SYMBOL_SMALL_GOTTPREL: ++ asm_fprintf (asm_out_file, ":gottprel_lo12:"); ++ break; ++ ++ case SYMBOL_SMALL_TPREL: ++ asm_fprintf (asm_out_file, ":tprel_lo12_nc:"); ++ break; ++ ++ default: ++ break; ++ } ++ output_addr_const (asm_out_file, x); ++ break; ++ ++ case 'G': ++ ++ switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR)) ++ { ++ case SYMBOL_SMALL_TPREL: ++ asm_fprintf (asm_out_file, ":tprel_hi12:"); ++ break; ++ default: ++ break; ++ } ++ output_addr_const (asm_out_file, x); ++ break; ++ ++ default: ++ output_operand_lossage ("invalid operand prefix '%%%c'", code); ++ return; ++ } ++} ++ ++void ++aarch64_print_operand_address (FILE *f, rtx x) ++{ ++ struct aarch64_address_info addr; ++ ++ if (aarch64_classify_address (&addr, x, aarch64_memory_reference_mode, ++ MEM, true)) ++ switch (addr.type) ++ { ++ case ADDRESS_REG_IMM: ++ if (addr.offset == const0_rtx) ++ asm_fprintf (f, "[%r]", REGNO (addr.base)); ++ else ++ asm_fprintf (f, "[%r,%wd]", REGNO (addr.base), ++ INTVAL (addr.offset)); ++ return; ++ ++ case ADDRESS_REG_REG: ++ if (addr.shift == 0) ++ asm_fprintf (f, "[%r,%r]", REGNO (addr.base), ++ REGNO (addr.offset)); ++ else ++ asm_fprintf (f, "[%r,%r,lsl %u]", REGNO (addr.base), ++ REGNO (addr.offset), addr.shift); ++ return; ++ ++ case ADDRESS_REG_UXTW: ++ if (addr.shift == 0) ++ asm_fprintf (f, "[%r,w%d,uxtw]", REGNO (addr.base), ++ REGNO (addr.offset) - R0_REGNUM); ++ else ++ asm_fprintf (f, "[%r,w%d,uxtw %u]", REGNO (addr.base), ++ REGNO (addr.offset) - R0_REGNUM, addr.shift); ++ return; ++ ++ case ADDRESS_REG_SXTW: ++ if (addr.shift == 0) ++ asm_fprintf (f, "[%r,w%d,sxtw]", REGNO (addr.base), ++ REGNO (addr.offset) - R0_REGNUM); ++ else ++ asm_fprintf (f, "[%r,w%d,sxtw %u]", REGNO (addr.base), ++ REGNO (addr.offset) - R0_REGNUM, addr.shift); ++ return; ++ ++ case ADDRESS_REG_WB: ++ switch (GET_CODE (x)) ++ { ++ case PRE_INC: ++ asm_fprintf (f, "[%r,%d]!", REGNO (addr.base), ++ GET_MODE_SIZE (aarch64_memory_reference_mode)); ++ return; ++ case POST_INC: ++ asm_fprintf (f, "[%r],%d", REGNO (addr.base), ++ GET_MODE_SIZE (aarch64_memory_reference_mode)); ++ return; ++ case PRE_DEC: ++ asm_fprintf (f, "[%r,-%d]!", REGNO (addr.base), ++ GET_MODE_SIZE (aarch64_memory_reference_mode)); ++ return; ++ case POST_DEC: ++ asm_fprintf (f, "[%r],-%d", REGNO (addr.base), ++ GET_MODE_SIZE (aarch64_memory_reference_mode)); ++ return; ++ case PRE_MODIFY: ++ asm_fprintf (f, "[%r,%wd]!", REGNO (addr.base), ++ INTVAL (addr.offset)); ++ return; ++ case POST_MODIFY: ++ asm_fprintf (f, "[%r],%wd", REGNO (addr.base), ++ INTVAL (addr.offset)); ++ return; ++ default: ++ break; ++ } ++ break; ++ ++ case ADDRESS_LO_SUM: ++ asm_fprintf (f, "[%r,#:lo12:", REGNO (addr.base)); ++ output_addr_const (f, addr.offset); ++ asm_fprintf (f, "]"); ++ return; ++ ++ case ADDRESS_SYMBOLIC: ++ break; ++ } ++ ++ output_addr_const (f, x); ++} ++ ++void ++aarch64_function_profiler (FILE *f ATTRIBUTE_UNUSED, ++ int labelno ATTRIBUTE_UNUSED) ++{ ++ sorry ("function profiling"); ++} ++ ++bool ++aarch64_label_mentioned_p (rtx x) ++{ ++ const char *fmt; ++ int i; ++ ++ if (GET_CODE (x) == LABEL_REF) ++ return true; ++ ++ /* UNSPEC_TLS entries for a symbol include a LABEL_REF for the ++ referencing instruction, but they are constant offsets, not ++ symbols. */ ++ if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLS) ++ return false; ++ ++ fmt = GET_RTX_FORMAT (GET_CODE (x)); ++ for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) ++ { ++ if (fmt[i] == 'E') ++ { ++ int j; ++ ++ for (j = XVECLEN (x, i) - 1; j >= 0; j--) ++ if (aarch64_label_mentioned_p (XVECEXP (x, i, j))) ++ return 1; ++ } ++ else if (fmt[i] == 'e' && aarch64_label_mentioned_p (XEXP (x, i))) ++ return 1; ++ } ++ ++ return 0; ++} ++ ++/* Implement REGNO_REG_CLASS. */ ++ ++unsigned ++aarch64_regno_regclass (unsigned regno) ++{ ++ if (GP_REGNUM_P (regno)) ++ return CORE_REGS; ++ ++ if (regno == SP_REGNUM) ++ return STACK_REG; ++ ++ if (regno == FRAME_POINTER_REGNUM ++ || regno == ARG_POINTER_REGNUM) ++ return CORE_REGS; ++ ++ if (FP_REGNUM_P (regno)) ++ return FP_LO_REGNUM_P (regno) ? FP_LO_REGS : FP_REGS; ++ ++ return NO_REGS; ++} ++ ++/* Try a machine-dependent way of reloading an illegitimate address ++ operand. If we find one, push the reload and return the new rtx. */ ++ ++rtx ++aarch64_legitimize_reload_address (rtx *x_p, ++ enum machine_mode mode, ++ int opnum, int type, ++ int ind_levels ATTRIBUTE_UNUSED) ++{ ++ rtx x = *x_p; ++ ++ /* Do not allow mem (plus (reg, const)) if vector mode. */ ++ if (aarch64_vector_mode_p (mode) ++ && GET_CODE (x) == PLUS ++ && REG_P (XEXP (x, 0)) ++ && CONST_INT_P (XEXP (x, 1))) ++ { ++ rtx orig_rtx = x; ++ x = copy_rtx (x); ++ push_reload (orig_rtx, NULL_RTX, x_p, NULL, ++ BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, ++ opnum, type); ++ return x; ++ } ++ ++ /* We must recognize output that we have already generated ourselves. */ ++ if (GET_CODE (x) == PLUS ++ && GET_CODE (XEXP (x, 0)) == PLUS ++ && REG_P (XEXP (XEXP (x, 0), 0)) ++ && CONST_INT_P (XEXP (XEXP (x, 0), 1)) ++ && CONST_INT_P (XEXP (x, 1))) ++ { ++ push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL, ++ BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, ++ opnum, type); ++ return x; ++ } ++ ++ /* We wish to handle large displacements off a base register by splitting ++ the addend across an add and the mem insn. This can cut the number of ++ extra insns needed from 3 to 1. It is only useful for load/store of a ++ single register with 12 bit offset field. */ ++ if (GET_CODE (x) == PLUS ++ && REG_P (XEXP (x, 0)) ++ && CONST_INT_P (XEXP (x, 1)) ++ && HARD_REGISTER_P (XEXP (x, 0)) ++ && mode != TImode ++ && mode != TFmode ++ && aarch64_regno_ok_for_base_p (REGNO (XEXP (x, 0)), true)) ++ { ++ HOST_WIDE_INT val = INTVAL (XEXP (x, 1)); ++ HOST_WIDE_INT low = val & 0xfff; ++ HOST_WIDE_INT high = val - low; ++ HOST_WIDE_INT offs; ++ rtx cst; ++ ++ /* Reload non-zero BLKmode offsets. This is because we cannot ascertain ++ BLKmode alignment. */ ++ if (GET_MODE_SIZE (mode) == 0) ++ return NULL_RTX; ++ ++ offs = low % GET_MODE_SIZE (mode); ++ ++ /* Align misaligned offset by adjusting high part to compensate. */ ++ if (offs != 0) ++ { ++ if (aarch64_uimm12_shift (high + offs)) ++ { ++ /* Align down. */ ++ low = low - offs; ++ high = high + offs; ++ } ++ else ++ { ++ /* Align up. */ ++ offs = GET_MODE_SIZE (mode) - offs; ++ low = low + offs; ++ high = high + (low & 0x1000) - offs; ++ low &= 0xfff; ++ } ++ } ++ ++ /* Check for overflow. */ ++ if (high + low != val) ++ return NULL_RTX; ++ ++ cst = GEN_INT (high); ++ if (!aarch64_uimm12_shift (high)) ++ cst = force_const_mem (Pmode, cst); ++ ++ /* Reload high part into base reg, leaving the low part ++ in the mem instruction. */ ++ x = gen_rtx_PLUS (Pmode, ++ gen_rtx_PLUS (Pmode, XEXP (x, 0), cst), ++ GEN_INT (low)); ++ ++ push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL, ++ BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, ++ opnum, type); ++ return x; ++ } ++ ++ return NULL_RTX; ++} ++ ++ ++static reg_class_t ++aarch64_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x, ++ reg_class_t rclass, ++ enum machine_mode mode, ++ secondary_reload_info *sri) ++{ ++ /* Address expressions of the form PLUS (SP, large_offset) need two ++ scratch registers, one for the constant, and one for holding a ++ copy of SP, since SP cannot be used on the RHS of an add-reg ++ instruction. */ ++ if (mode == DImode ++ && GET_CODE (x) == PLUS ++ && XEXP (x, 0) == stack_pointer_rtx ++ && CONST_INT_P (XEXP (x, 1)) ++ && !aarch64_uimm12_shift (INTVAL (XEXP (x, 1)))) ++ { ++ sri->icode = CODE_FOR_reload_sp_immediate; ++ return NO_REGS; ++ } ++ ++ /* Without the TARGET_SIMD instructions we cannot move a Q register ++ to a Q register directly. We need a scratch. */ ++ if (REG_P (x) && (mode == TFmode || mode == TImode) && mode == GET_MODE (x) ++ && FP_REGNUM_P (REGNO (x)) && !TARGET_SIMD ++ && reg_class_subset_p (rclass, FP_REGS)) ++ { ++ if (mode == TFmode) ++ sri->icode = CODE_FOR_aarch64_reload_movtf; ++ else if (mode == TImode) ++ sri->icode = CODE_FOR_aarch64_reload_movti; ++ return NO_REGS; ++ } ++ ++ /* A TFmode or TImode memory access should be handled via an FP_REGS ++ because AArch64 has richer addressing modes for LDR/STR instructions ++ than LDP/STP instructions. */ ++ if (!TARGET_GENERAL_REGS_ONLY && rclass == CORE_REGS ++ && GET_MODE_SIZE (mode) == 16 && MEM_P (x)) ++ return FP_REGS; ++ ++ if ((mode == TImode || mode == TFmode) && CONSTANT_P(x) ++ && reg_class_subset_p (rclass, FP_REGS)) ++ return CORE_REGS; ++ ++ return NO_REGS; ++} ++ ++static bool ++aarch64_can_eliminate (const int from, const int to) ++{ ++ /* If we need a frame pointer, we must eliminate FRAME_POINTER_REGNUM into ++ HARD_FRAME_POINTER_REGNUM and not into STACK_POINTER_REGNUM. */ ++ ++ if (frame_pointer_needed) ++ { ++ if (from == ARG_POINTER_REGNUM && to == HARD_FRAME_POINTER_REGNUM) ++ return true; ++ if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM) ++ return false; ++ if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM ++ && !cfun->calls_alloca) ++ return true; ++ if (from == FRAME_POINTER_REGNUM && to == HARD_FRAME_POINTER_REGNUM) ++ return true; ++ return false; ++ } ++ else ++ { ++ /* If we decided that we didn't need a frame pointer but then used ++ LR in the function, then we do need a frame pointer after all, so ++ prevent this elimination to ensure a frame pointer is used. */ ++ ++ if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM ++ && df_regs_ever_live_p (LR_REGNUM)) ++ return false; ++ } ++ return true; ++} ++ ++HOST_WIDE_INT ++aarch64_initial_elimination_offset (unsigned from, unsigned to) ++{ ++ HOST_WIDE_INT frame_size; ++ HOST_WIDE_INT offset; ++ ++ aarch64_layout_frame (); ++ frame_size = (get_frame_size () + cfun->machine->frame.saved_regs_size ++ + crtl->outgoing_args_size ++ + cfun->machine->saved_varargs_size); ++ ++ frame_size = AARCH64_ROUND_UP (frame_size, STACK_BOUNDARY / BITS_PER_UNIT); ++ offset = frame_size; ++ ++ if (to == HARD_FRAME_POINTER_REGNUM) ++ { ++ if (from == ARG_POINTER_REGNUM) ++ return offset - crtl->outgoing_args_size; ++ ++ if (from == FRAME_POINTER_REGNUM) ++ return cfun->machine->frame.saved_regs_size; ++ } ++ ++ if (to == STACK_POINTER_REGNUM) ++ { ++ if (from == FRAME_POINTER_REGNUM) ++ { ++ HOST_WIDE_INT elim = crtl->outgoing_args_size ++ + cfun->machine->frame.saved_regs_size ++ - cfun->machine->frame.fp_lr_offset; ++ elim = AARCH64_ROUND_UP (elim, STACK_BOUNDARY / BITS_PER_UNIT); ++ return elim; ++ } ++ } ++ ++ return offset; ++} ++ ++ ++/* Implement RETURN_ADDR_RTX. We do not support moving back to a ++ previous frame. */ ++ ++rtx ++aarch64_return_addr (int count, rtx frame ATTRIBUTE_UNUSED) ++{ ++ if (count != 0) ++ return const0_rtx; ++ return get_hard_reg_initial_val (Pmode, LR_REGNUM); ++} ++ ++ ++static void ++aarch64_asm_trampoline_template (FILE *f) ++{ ++ asm_fprintf (f, "\tldr\t%r, .+16\n", IP1_REGNUM); ++ asm_fprintf (f, "\tldr\t%r, .+20\n", STATIC_CHAIN_REGNUM); ++ asm_fprintf (f, "\tbr\t%r\n", IP1_REGNUM); ++ assemble_aligned_integer (4, const0_rtx); ++ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); ++ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); ++} ++ ++unsigned ++aarch64_trampoline_size (void) ++{ ++ return 32; /* 3 insns + padding + 2 dwords. */ ++} ++ ++static void ++aarch64_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ++{ ++ rtx fnaddr, mem, a_tramp; ++ ++ /* Don't need to copy the trailing D-words, we fill those in below. */ ++ emit_block_move (m_tramp, assemble_trampoline_template (), ++ GEN_INT (TRAMPOLINE_SIZE - 16), BLOCK_OP_NORMAL); ++ mem = adjust_address (m_tramp, DImode, 16); ++ fnaddr = XEXP (DECL_RTL (fndecl), 0); ++ emit_move_insn (mem, fnaddr); ++ ++ mem = adjust_address (m_tramp, DImode, 24); ++ emit_move_insn (mem, chain_value); ++ ++ /* XXX We should really define a "clear_cache" pattern and use ++ gen_clear_cache(). */ ++ a_tramp = XEXP (m_tramp, 0); ++ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), ++ 0, VOIDmode, 2, a_tramp, Pmode, ++ plus_constant (a_tramp, TRAMPOLINE_SIZE), Pmode); ++} ++ ++static unsigned char ++aarch64_class_max_nregs (reg_class_t regclass, enum machine_mode mode) ++{ ++ switch (regclass) ++ { ++ case CORE_REGS: ++ case POINTER_REGS: ++ case GENERAL_REGS: ++ case ALL_REGS: ++ case FP_REGS: ++ case FP_LO_REGS: ++ return ++ aarch64_vector_mode_p (mode) ? (GET_MODE_SIZE (mode) + 15) / 16 : ++ (GET_MODE_SIZE (mode) + 7) / 8; ++ case STACK_REG: ++ return 1; ++ ++ case NO_REGS: ++ return 0; ++ ++ default: ++ break; ++ } ++ gcc_unreachable (); ++} ++ ++static reg_class_t ++aarch64_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t regclass) ++{ ++ return ((regclass == POINTER_REGS || regclass == STACK_REG) ++ ? GENERAL_REGS : regclass); ++} ++ ++void ++aarch64_asm_output_labelref (FILE* f, const char *name) ++{ ++ asm_fprintf (f, "%U%s", name); ++} ++ ++static void ++aarch64_elf_asm_constructor (rtx symbol, int priority) ++{ ++ if (priority == DEFAULT_INIT_PRIORITY) ++ default_ctor_section_asm_out_constructor (symbol, priority); ++ else ++ { ++ section *s; ++ char buf[18]; ++ snprintf (buf, sizeof (buf), ".init_array.%.5u", priority); ++ s = get_section (buf, SECTION_WRITE, NULL); ++ switch_to_section (s); ++ assemble_align (POINTER_SIZE); ++ fputs ("\t.dword\t", asm_out_file); ++ output_addr_const (asm_out_file, symbol); ++ fputc ('\n', asm_out_file); ++ } ++} ++ ++static void ++aarch64_elf_asm_destructor (rtx symbol, int priority) ++{ ++ if (priority == DEFAULT_INIT_PRIORITY) ++ default_dtor_section_asm_out_destructor (symbol, priority); ++ else ++ { ++ section *s; ++ char buf[18]; ++ snprintf (buf, sizeof (buf), ".fini_array.%.5u", priority); ++ s = get_section (buf, SECTION_WRITE, NULL); ++ switch_to_section (s); ++ assemble_align (POINTER_SIZE); ++ fputs ("\t.dword\t", asm_out_file); ++ output_addr_const (asm_out_file, symbol); ++ fputc ('\n', asm_out_file); ++ } ++} ++ ++const char* ++aarch64_output_casesi (rtx *operands) ++{ ++ char buf[100]; ++ char label[100]; ++ rtx diff_vec = PATTERN (next_real_insn (operands[2])); ++ int index; ++ static const char *const patterns[4][2] = ++ { ++ { ++ "ldrb\t%w3, [%0,%w1,uxtw]", ++ "add\t%3, %4, %w3, sxtb #2" ++ }, ++ { ++ "ldrh\t%w3, [%0,%w1,uxtw #1]", ++ "add\t%3, %4, %w3, sxth #2" ++ }, ++ { ++ "ldr\t%w3, [%0,%w1,uxtw #2]", ++ "add\t%3, %4, %w3, sxtw #2" ++ }, ++ /* We assume that DImode is only generated when not optimizing and ++ that we don't really need 64-bit address offsets. That would ++ imply an object file with 8GB of code in a single function! */ ++ { ++ "ldr\t%w3, [%0,%w1,uxtw #2]", ++ "add\t%3, %4, %w3, sxtw #2" ++ } ++ }; ++ ++ gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC); ++ ++ index = exact_log2 (GET_MODE_SIZE (GET_MODE (diff_vec))); ++ ++ gcc_assert (index >= 0 && index <= 3); ++ ++ /* Need to implement table size reduction, by chaning the code below. */ ++ output_asm_insn (patterns[index][0], operands); ++ ASM_GENERATE_INTERNAL_LABEL (label, "Lrtx", CODE_LABEL_NUMBER (operands[2])); ++ snprintf (buf, sizeof (buf), ++ "adr\t%%4, %s", targetm.strip_name_encoding (label)); ++ output_asm_insn (buf, operands); ++ output_asm_insn (patterns[index][1], operands); ++ output_asm_insn ("br\t%3", operands); ++ assemble_label (asm_out_file, label); ++ return ""; ++} ++ ++ ++/* Return size in bits of an arithmetic operand which is shifted/scaled and ++ masked such that it is suitable for a UXTB, UXTH, or UXTW extend ++ operator. */ ++ ++int ++aarch64_uxt_size (int shift, HOST_WIDE_INT mask) ++{ ++ if (shift >= 0 && shift <= 3) ++ { ++ int size; ++ for (size = 8; size <= 32; size *= 2) ++ { ++ HOST_WIDE_INT bits = ((HOST_WIDE_INT)1U << size) - 1; ++ if (mask == bits << shift) ++ return size; ++ } ++ } ++ return 0; ++} ++ ++static bool ++aarch64_use_blocks_for_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, ++ const_rtx x ATTRIBUTE_UNUSED) ++{ ++ /* We can't use blocks for constants when we're using a per-function ++ constant pool. */ ++ return false; ++} ++ ++static section * ++aarch64_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED, ++ rtx x ATTRIBUTE_UNUSED, ++ unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED) ++{ ++ /* Force all constant pool entries into the current function section. */ ++ return function_section (current_function_decl); ++} ++ ++ ++/* Costs. */ ++ ++/* Helper function for rtx cost calculation. Strip a shift expression ++ from X. Returns the inner operand if successful, or the original ++ expression on failure. */ ++static rtx ++aarch64_strip_shift (rtx x) ++{ ++ rtx op = x; ++ ++ if ((GET_CODE (op) == ASHIFT ++ || GET_CODE (op) == ASHIFTRT ++ || GET_CODE (op) == LSHIFTRT) ++ && CONST_INT_P (XEXP (op, 1))) ++ return XEXP (op, 0); ++ ++ if (GET_CODE (op) == MULT ++ && CONST_INT_P (XEXP (op, 1)) ++ && ((unsigned) exact_log2 (INTVAL (XEXP (op, 1)))) < 64) ++ return XEXP (op, 0); ++ ++ return x; ++} ++ ++/* Helper function for rtx cost calculation. Strip a shift or extend ++ expression from X. Returns the inner operand if successful, or the ++ original expression on failure. We deal with a number of possible ++ canonicalization variations here. */ ++static rtx ++aarch64_strip_shift_or_extend (rtx x) ++{ ++ rtx op = x; ++ ++ /* Zero and sign extraction of a widened value. */ ++ if ((GET_CODE (op) == ZERO_EXTRACT || GET_CODE (op) == SIGN_EXTRACT) ++ && XEXP (op, 2) == const0_rtx ++ && aarch64_is_extend_from_extract (GET_MODE (op), XEXP (XEXP (op, 0), 1), ++ XEXP (op, 1))) ++ return XEXP (XEXP (op, 0), 0); ++ ++ /* It can also be represented (for zero-extend) as an AND with an ++ immediate. */ ++ if (GET_CODE (op) == AND ++ && GET_CODE (XEXP (op, 0)) == MULT ++ && CONST_INT_P (XEXP (XEXP (op, 0), 1)) ++ && CONST_INT_P (XEXP (op, 1)) ++ && aarch64_uxt_size (exact_log2 (INTVAL (XEXP (XEXP (op, 0), 1))), ++ INTVAL (XEXP (op, 1))) != 0) ++ return XEXP (XEXP (op, 0), 0); ++ ++ /* Now handle extended register, as this may also have an optional ++ left shift by 1..4. */ ++ if (GET_CODE (op) == ASHIFT ++ && CONST_INT_P (XEXP (op, 1)) ++ && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) <= 4) ++ op = XEXP (op, 0); ++ ++ if (GET_CODE (op) == ZERO_EXTEND ++ || GET_CODE (op) == SIGN_EXTEND) ++ op = XEXP (op, 0); ++ ++ if (op != x) ++ return op; ++ ++ return aarch64_strip_shift (x); ++} ++ ++/* Calculate the cost of calculating X, storing it in *COST. Result ++ is true if the total cost of the operation has now been calculated. */ ++static bool ++aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ++ int param ATTRIBUTE_UNUSED, int *cost, bool speed) ++{ ++ rtx op0, op1; ++ const struct cpu_rtx_cost_table *extra_cost ++ = aarch64_tune_params->insn_extra_cost; ++ ++ switch (code) ++ { ++ case SET: ++ op0 = SET_DEST (x); ++ op1 = SET_SRC (x); ++ ++ switch (GET_CODE (op0)) ++ { ++ case MEM: ++ if (speed) ++ *cost += extra_cost->memory_store; ++ ++ if (op1 != const0_rtx) ++ *cost += rtx_cost (op1, SET, 1, speed); ++ return true; ++ ++ case SUBREG: ++ if (! REG_P (SUBREG_REG (op0))) ++ *cost += rtx_cost (SUBREG_REG (op0), SET, 0, speed); ++ /* Fall through. */ ++ case REG: ++ /* Cost is just the cost of the RHS of the set. */ ++ *cost += rtx_cost (op1, SET, 1, true); ++ return true; ++ ++ case ZERO_EXTRACT: /* Bit-field insertion. */ ++ case SIGN_EXTRACT: ++ /* Strip any redundant widening of the RHS to meet the width of ++ the target. */ ++ if (GET_CODE (op1) == SUBREG) ++ op1 = SUBREG_REG (op1); ++ if ((GET_CODE (op1) == ZERO_EXTEND ++ || GET_CODE (op1) == SIGN_EXTEND) ++ && GET_CODE (XEXP (op0, 1)) == CONST_INT ++ && (GET_MODE_BITSIZE (GET_MODE (XEXP (op1, 0))) ++ >= INTVAL (XEXP (op0, 1)))) ++ op1 = XEXP (op1, 0); ++ *cost += rtx_cost (op1, SET, 1, speed); ++ return true; ++ ++ default: ++ break; ++ } ++ return false; ++ ++ case MEM: ++ if (speed) ++ *cost += extra_cost->memory_load; ++ ++ return true; ++ ++ case NEG: ++ op0 = CONST0_RTX (GET_MODE (x)); ++ op1 = XEXP (x, 0); ++ goto cost_minus; ++ ++ case COMPARE: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ if (op1 == const0_rtx ++ && GET_CODE (op0) == AND) ++ { ++ x = op0; ++ goto cost_logic; ++ } ++ ++ /* Comparisons can work if the order is swapped. ++ Canonicalization puts the more complex operation first, but ++ we want it in op1. */ ++ if (! (REG_P (op0) ++ || (GET_CODE (op0) == SUBREG && REG_P (SUBREG_REG (op0))))) ++ { ++ op0 = XEXP (x, 1); ++ op1 = XEXP (x, 0); ++ } ++ goto cost_minus; ++ ++ case MINUS: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ cost_minus: ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT ++ || (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC ++ && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)) ++ { ++ if (op0 != const0_rtx) ++ *cost += rtx_cost (op0, MINUS, 0, speed); ++ ++ if (CONST_INT_P (op1)) ++ { ++ if (!aarch64_uimm12_shift (INTVAL (op1))) ++ *cost += rtx_cost (op1, MINUS, 1, speed); ++ } ++ else ++ { ++ op1 = aarch64_strip_shift_or_extend (op1); ++ *cost += rtx_cost (op1, MINUS, 1, speed); ++ } ++ return true; ++ } ++ ++ return false; ++ ++ case PLUS: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ { ++ if (CONST_INT_P (op1) && aarch64_uimm12_shift (INTVAL (op1))) ++ { ++ *cost += rtx_cost (op0, PLUS, 0, speed); ++ } ++ else ++ { ++ rtx new_op0 = aarch64_strip_shift_or_extend (op0); ++ ++ if (new_op0 == op0 ++ && GET_CODE (op0) == MULT) ++ { ++ if ((GET_CODE (XEXP (op0, 0)) == ZERO_EXTEND ++ && GET_CODE (XEXP (op0, 1)) == ZERO_EXTEND) ++ || (GET_CODE (XEXP (op0, 0)) == SIGN_EXTEND ++ && GET_CODE (XEXP (op0, 1)) == SIGN_EXTEND)) ++ { ++ *cost += (rtx_cost (XEXP (XEXP (op0, 0), 0), MULT, 0, ++ speed) ++ + rtx_cost (XEXP (XEXP (op0, 1), 0), MULT, 1, ++ speed) ++ + rtx_cost (op1, PLUS, 1, speed)); ++ if (speed) ++ *cost += extra_cost->int_multiply_extend_add; ++ return true; ++ } ++ *cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed) ++ + rtx_cost (XEXP (op0, 1), MULT, 1, speed) ++ + rtx_cost (op1, PLUS, 1, speed)); ++ ++ if (speed) ++ *cost += extra_cost->int_multiply_add; ++ } ++ ++ *cost += (rtx_cost (new_op0, PLUS, 0, speed) ++ + rtx_cost (op1, PLUS, 1, speed)); ++ } ++ return true; ++ } ++ ++ return false; ++ ++ case IOR: ++ case XOR: ++ case AND: ++ cost_logic: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ { ++ if (CONST_INT_P (op1) ++ && aarch64_bitmask_imm (INTVAL (op1), GET_MODE (x))) ++ { ++ *cost += rtx_cost (op0, AND, 0, speed); ++ } ++ else ++ { ++ if (GET_CODE (op0) == NOT) ++ op0 = XEXP (op0, 0); ++ op0 = aarch64_strip_shift (op0); ++ *cost += (rtx_cost (op0, AND, 0, speed) ++ + rtx_cost (op1, AND, 1, speed)); ++ } ++ return true; ++ } ++ return false; ++ ++ case ZERO_EXTEND: ++ if ((GET_MODE (x) == DImode ++ && GET_MODE (XEXP (x, 0)) == SImode) ++ || GET_CODE (XEXP (x, 0)) == MEM) ++ { ++ *cost += rtx_cost (XEXP (x, 0), ZERO_EXTEND, 0, speed); ++ return true; ++ } ++ return false; ++ ++ case SIGN_EXTEND: ++ if (GET_CODE (XEXP (x, 0)) == MEM) ++ { ++ *cost += rtx_cost (XEXP (x, 0), SIGN_EXTEND, 0, speed); ++ return true; ++ } ++ return false; ++ ++ case ROTATE: ++ if (!CONST_INT_P (XEXP (x, 1))) ++ *cost += COSTS_N_INSNS (2); ++ /* Fall through. */ ++ case ROTATERT: ++ case LSHIFTRT: ++ case ASHIFT: ++ case ASHIFTRT: ++ ++ /* Shifting by a register often takes an extra cycle. */ ++ if (speed && !CONST_INT_P (XEXP (x, 1))) ++ *cost += extra_cost->register_shift; ++ ++ *cost += rtx_cost (XEXP (x, 0), ASHIFT, 0, speed); ++ return true; ++ ++ case HIGH: ++ if (!CONSTANT_P (XEXP (x, 0))) ++ *cost += rtx_cost (XEXP (x, 0), HIGH, 0, speed); ++ return true; ++ ++ case LO_SUM: ++ if (!CONSTANT_P (XEXP (x, 1))) ++ *cost += rtx_cost (XEXP (x, 1), LO_SUM, 1, speed); ++ *cost += rtx_cost (XEXP (x, 0), LO_SUM, 0, speed); ++ return true; ++ ++ case ZERO_EXTRACT: ++ case SIGN_EXTRACT: ++ *cost += rtx_cost (XEXP (x, 0), ZERO_EXTRACT, 0, speed); ++ return true; ++ ++ case MULT: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ *cost = COSTS_N_INSNS (1); ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ { ++ if (CONST_INT_P (op1) ++ && exact_log2 (INTVAL (op1)) > 0) ++ { ++ *cost += rtx_cost (op0, ASHIFT, 0, speed); ++ return true; ++ } ++ ++ if ((GET_CODE (op0) == ZERO_EXTEND ++ && GET_CODE (op1) == ZERO_EXTEND) ++ || (GET_CODE (op0) == SIGN_EXTEND ++ && GET_CODE (op1) == SIGN_EXTEND)) ++ { ++ *cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed) ++ + rtx_cost (XEXP (op1, 0), MULT, 1, speed)); ++ if (speed) ++ *cost += extra_cost->int_multiply_extend; ++ return true; ++ } ++ ++ if (speed) ++ *cost += extra_cost->int_multiply; ++ } ++ else if (speed) ++ { ++ if (GET_MODE (x) == DFmode) ++ *cost += extra_cost->double_multiply; ++ else if (GET_MODE (x) == SFmode) ++ *cost += extra_cost->float_multiply; ++ } ++ ++ return false; /* All arguments need to be in registers. */ ++ ++ case MOD: ++ case UMOD: ++ *cost = COSTS_N_INSNS (2); ++ if (speed) ++ { ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ *cost += (extra_cost->int_multiply_add ++ + extra_cost->int_divide); ++ else if (GET_MODE (x) == DFmode) ++ *cost += (extra_cost->double_multiply ++ + extra_cost->double_divide); ++ else if (GET_MODE (x) == SFmode) ++ *cost += (extra_cost->float_multiply ++ + extra_cost->float_divide); ++ } ++ return false; /* All arguments need to be in registers. */ ++ ++ case DIV: ++ case UDIV: ++ *cost = COSTS_N_INSNS (1); ++ if (speed) ++ { ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ *cost += extra_cost->int_divide; ++ else if (GET_MODE (x) == DFmode) ++ *cost += extra_cost->double_divide; ++ else if (GET_MODE (x) == SFmode) ++ *cost += extra_cost->float_divide; ++ } ++ return false; /* All arguments need to be in registers. */ ++ ++ default: ++ break; ++ } ++ return false; ++} ++ ++static int ++aarch64_address_cost (rtx x ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) ++{ ++ enum rtx_code c = GET_CODE (x); ++ const struct cpu_addrcost_table *addr_cost = aarch64_tune_params->addr_cost; ++ ++ if (c == PRE_INC || c == PRE_DEC || c == PRE_MODIFY) ++ return addr_cost->pre_modify; ++ ++ if (c == POST_INC || c == POST_DEC || c == POST_MODIFY) ++ return addr_cost->post_modify; ++ ++ if (c == PLUS) ++ { ++ if (GET_CODE (XEXP (x, 1)) == CONST_INT) ++ return addr_cost->imm_offset; ++ else if (GET_CODE (XEXP (x, 0)) == MULT ++ || GET_CODE (XEXP (x, 0)) == ZERO_EXTEND ++ || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND) ++ return addr_cost->register_extend; ++ ++ return addr_cost->register_offset; ++ } ++ else if (c == MEM || c == LABEL_REF || c == SYMBOL_REF) ++ return addr_cost->imm_offset; ++ ++ return 0; ++} ++ ++static int ++aarch64_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, ++ reg_class_t from, reg_class_t to) ++{ ++ const struct cpu_regmove_cost *regmove_cost ++ = aarch64_tune_params->regmove_cost; ++ ++ if (from == GENERAL_REGS && to == GENERAL_REGS) ++ return regmove_cost->GP2GP; ++ else if (from == GENERAL_REGS) ++ return regmove_cost->GP2FP; ++ else if (to == GENERAL_REGS) ++ return regmove_cost->FP2GP; ++ ++ /* When AdvSIMD instructions are disabled it is not possible to move ++ a 128-bit value directly between Q registers. This is handled in ++ secondary reload. A general register is used as a scratch to move ++ the upper DI value and the lower DI value is moved directly, ++ hence the cost is the sum of three moves. */ ++ ++ if (! TARGET_SIMD && GET_MODE_SIZE (from) == 128 && GET_MODE_SIZE (to) == 128) ++ return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP; ++ ++ return regmove_cost->FP2FP; ++} ++ ++static int ++aarch64_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, ++ reg_class_t rclass ATTRIBUTE_UNUSED, ++ bool in ATTRIBUTE_UNUSED) ++{ ++ return aarch64_tune_params->memmov_cost; ++} ++ ++static void initialize_aarch64_code_model (void); ++ ++/* Tuning parameters. */ ++ ++#if HAVE_DESIGNATED_INITIALIZERS ++#define NAMED_PARAM(NAME, VAL) .NAME = (VAL) ++#else ++#define NAMED_PARAM(NAME, VAL) (VAL) ++#endif ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif ++static const struct cpu_rtx_cost_table generic_rtx_cost_table = ++{ ++ NAMED_PARAM (memory_load, COSTS_N_INSNS (1)), ++ NAMED_PARAM (memory_store, COSTS_N_INSNS (0)), ++ NAMED_PARAM (register_shift, COSTS_N_INSNS (1)), ++ NAMED_PARAM (int_divide, COSTS_N_INSNS (6)), ++ NAMED_PARAM (float_divide, COSTS_N_INSNS (2)), ++ NAMED_PARAM (double_divide, COSTS_N_INSNS (6)), ++ NAMED_PARAM (int_multiply, COSTS_N_INSNS (1)), ++ NAMED_PARAM (int_multiply_extend, COSTS_N_INSNS (1)), ++ NAMED_PARAM (int_multiply_add, COSTS_N_INSNS (1)), ++ NAMED_PARAM (int_multiply_extend_add, COSTS_N_INSNS (1)), ++ NAMED_PARAM (float_multiply, COSTS_N_INSNS (0)), ++ NAMED_PARAM (double_multiply, COSTS_N_INSNS (1)) ++}; ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif ++static const struct cpu_addrcost_table generic_addrcost_table = ++{ ++ NAMED_PARAM (pre_modify, 0), ++ NAMED_PARAM (post_modify, 0), ++ NAMED_PARAM (register_offset, 0), ++ NAMED_PARAM (register_extend, 0), ++ NAMED_PARAM (imm_offset, 0) ++}; ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif ++static const struct cpu_regmove_cost generic_regmove_cost = ++{ ++ NAMED_PARAM (GP2GP, 1), ++ NAMED_PARAM (GP2FP, 2), ++ NAMED_PARAM (FP2GP, 2), ++ /* We currently do not provide direct support for TFmode Q->Q move. ++ Therefore we need to raise the cost above 2 in order to have ++ reload handle the situation. */ ++ NAMED_PARAM (FP2FP, 4) ++}; ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif ++static const struct tune_params generic_tunings = ++{ ++ &generic_rtx_cost_table, ++ &generic_addrcost_table, ++ &generic_regmove_cost, ++ NAMED_PARAM (memmov_cost, 4) ++}; ++ ++ ++/* Parse the architecture extension string. */ ++ ++static void ++aarch64_parse_extension (char *str) ++{ ++ /* The extension string is parsed left to right. */ ++ const struct aarch64_option_extension *opt = NULL; ++ ++ /* Flag to say whether we are adding or removing an extension. */ ++ int adding_ext = -1; ++ ++ while (str != NULL && *str != 0) ++ { ++ char *ext; ++ size_t len; ++ ++ str++; ++ ext = strchr (str, '+'); ++ ++ if (ext != NULL) ++ len = ext - str; ++ else ++ len = strlen (str); ++ ++ if (len >= 2 && strncmp (str, "no", 2) == 0) ++ { ++ adding_ext = 0; ++ len -= 2; ++ str += 2; ++ } ++ else if (len > 0) ++ adding_ext = 1; ++ ++ if (len == 0) ++ { ++ error ("missing feature modifier after %qs", "+no"); ++ return; ++ } ++ ++ /* Scan over the extensions table trying to find an exact match. */ ++ for (opt = all_extensions; opt->name != NULL; opt++) ++ { ++ if (strlen (opt->name) == len && strncmp (opt->name, str, len) == 0) ++ { ++ /* Add or remove the extension. */ ++ if (adding_ext) ++ aarch64_isa_flags |= opt->flags_on; ++ else ++ aarch64_isa_flags &= ~(opt->flags_off); ++ break; ++ } ++ } ++ ++ if (opt->name == NULL) ++ { ++ /* Extension not found in list. */ ++ error ("unknown feature modifier %qs", str); ++ return; ++ } ++ ++ str = ext; ++ }; ++ ++ return; ++} ++ ++/* Parse the ARCH string. */ ++ ++static void ++aarch64_parse_arch (void) ++{ ++ char *ext; ++ const struct processor *arch; ++ char *str = (char *) alloca (strlen (aarch64_arch_string) + 1); ++ size_t len; ++ ++ strcpy (str, aarch64_arch_string); ++ ++ ext = strchr (str, '+'); ++ ++ if (ext != NULL) ++ len = ext - str; ++ else ++ len = strlen (str); ++ ++ if (len == 0) ++ { ++ error ("missing arch name in -march=%qs", str); ++ return; ++ } ++ ++ /* Loop through the list of supported ARCHs to find a match. */ ++ for (arch = all_architectures; arch->name != NULL; arch++) ++ { ++ if (strlen (arch->name) == len && strncmp (arch->name, str, len) == 0) ++ { ++ selected_arch = arch; ++ aarch64_isa_flags = selected_arch->flags; ++ selected_cpu = &all_cores[selected_arch->core]; ++ ++ if (ext != NULL) ++ { ++ /* ARCH string contains at least one extension. */ ++ aarch64_parse_extension (ext); ++ } ++ ++ return; ++ } ++ } ++ ++ /* ARCH name not found in list. */ ++ error ("unknown value %qs for -march", str); ++ return; ++} ++ ++/* Parse the CPU string. */ ++ ++static void ++aarch64_parse_cpu (void) ++{ ++ char *ext; ++ const struct processor *cpu; ++ char *str = (char *) alloca (strlen (aarch64_cpu_string) + 1); ++ size_t len; ++ ++ strcpy (str, aarch64_cpu_string); ++ ++ ext = strchr (str, '+'); ++ ++ if (ext != NULL) ++ len = ext - str; ++ else ++ len = strlen (str); ++ ++ if (len == 0) ++ { ++ error ("missing cpu name in -mcpu=%qs", str); ++ return; ++ } ++ ++ /* Loop through the list of supported CPUs to find a match. */ ++ for (cpu = all_cores; cpu->name != NULL; cpu++) ++ { ++ if (strlen (cpu->name) == len && strncmp (cpu->name, str, len) == 0) ++ { ++ selected_cpu = cpu; ++ aarch64_isa_flags = selected_cpu->flags; ++ ++ if (ext != NULL) ++ { ++ /* CPU string contains at least one extension. */ ++ aarch64_parse_extension (ext); ++ } ++ ++ return; ++ } ++ } ++ ++ /* CPU name not found in list. */ ++ error ("unknown value %qs for -mcpu", str); ++ return; ++} ++ ++/* Parse the TUNE string. */ ++ ++static void ++aarch64_parse_tune (void) ++{ ++ const struct processor *cpu; ++ char *str = (char *) alloca (strlen (aarch64_tune_string) + 1); ++ strcpy (str, aarch64_tune_string); ++ ++ /* Loop through the list of supported CPUs to find a match. */ ++ for (cpu = all_cores; cpu->name != NULL; cpu++) ++ { ++ if (strcmp (cpu->name, str) == 0) ++ { ++ selected_tune = cpu; ++ return; ++ } ++ } ++ ++ /* CPU name not found in list. */ ++ error ("unknown value %qs for -mtune", str); ++ return; ++} ++ ++ ++/* Implement TARGET_OPTION_OVERRIDE. */ ++ ++static void ++aarch64_override_options (void) ++{ ++ /* march wins over mcpu, so when march is defined, mcpu takes the same value, ++ otherwise march remains undefined. mtune can be used with either march or ++ mcpu. */ ++ ++ if (aarch64_arch_string) ++ { ++ aarch64_parse_arch (); ++ aarch64_cpu_string = NULL; ++ } ++ ++ if (aarch64_cpu_string) ++ { ++ aarch64_parse_cpu (); ++ selected_arch = NULL; ++ } ++ ++ if (aarch64_tune_string) ++ { ++ aarch64_parse_tune (); ++ } ++ ++ initialize_aarch64_code_model (); ++ ++ aarch64_build_bitmask_table (); ++ ++ /* This target defaults to strict volatile bitfields. */ ++ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least (2)) ++ flag_strict_volatile_bitfields = 1; ++ ++ /* If the user did not specify a processor, choose the default ++ one for them. This will be the CPU set during configuration using ++ --with-cpu, otherwise it is "generic". */ ++ if (!selected_cpu) ++ { ++ selected_cpu = &all_cores[TARGET_CPU_DEFAULT & 0x3f]; ++ aarch64_isa_flags = TARGET_CPU_DEFAULT >> 6; ++ } ++ ++ gcc_assert (selected_cpu); ++ ++ /* The selected cpu may be an architecture, so lookup tuning by core ID. */ ++ if (!selected_tune) ++ selected_tune = &all_cores[selected_cpu->core]; ++ ++ aarch64_tune_flags = selected_tune->flags; ++ aarch64_tune = selected_tune->core; ++ aarch64_tune_params = selected_tune->tune; ++ ++ aarch64_override_options_after_change (); ++} ++ ++/* Implement targetm.override_options_after_change. */ ++ ++static void ++aarch64_override_options_after_change (void) ++{ ++ faked_omit_frame_pointer = false; ++ ++ /* To omit leaf frame pointers, we need to turn flag_omit_frame_pointer on so ++ that aarch64_frame_pointer_required will be called. We need to remember ++ whether flag_omit_frame_pointer was turned on normally or just faked. */ ++ ++ if (flag_omit_leaf_frame_pointer && !flag_omit_frame_pointer) ++ { ++ flag_omit_frame_pointer = true; ++ faked_omit_frame_pointer = true; ++ } ++} ++ ++static struct machine_function * ++aarch64_init_machine_status (void) ++{ ++ struct machine_function *machine; ++ machine = ggc_alloc_cleared_machine_function (); ++ return machine; ++} ++ ++void ++aarch64_init_expanders (void) ++{ ++ init_machine_status = aarch64_init_machine_status; ++} ++ ++/* A checking mechanism for the implementation of the various code models. */ ++static void ++initialize_aarch64_code_model (void) ++{ ++ if (flag_pic) ++ { ++ switch (aarch64_cmodel_var) ++ { ++ case AARCH64_CMODEL_TINY: ++ aarch64_cmodel = AARCH64_CMODEL_TINY_PIC; ++ break; ++ case AARCH64_CMODEL_SMALL: ++ aarch64_cmodel = AARCH64_CMODEL_SMALL_PIC; ++ break; ++ case AARCH64_CMODEL_LARGE: ++ sorry ("code model %qs with -f%s", "large", ++ flag_pic > 1 ? "PIC" : "pic"); ++ default: ++ gcc_unreachable (); ++ } ++ } ++ else ++ aarch64_cmodel = aarch64_cmodel_var; ++} ++ ++/* Return true if SYMBOL_REF X binds locally. */ ++ ++static bool ++aarch64_symbol_binds_local_p (const_rtx x) ++{ ++ return (SYMBOL_REF_DECL (x) ++ ? targetm.binds_local_p (SYMBOL_REF_DECL (x)) ++ : SYMBOL_REF_LOCAL_P (x)); ++} ++ ++/* Return true if SYMBOL_REF X is thread local */ ++static bool ++aarch64_tls_symbol_p (rtx x) ++{ ++ if (! TARGET_HAVE_TLS) ++ return false; ++ ++ if (GET_CODE (x) != SYMBOL_REF) ++ return false; ++ ++ return SYMBOL_REF_TLS_MODEL (x) != 0; ++} ++ ++/* Classify a TLS symbol into one of the TLS kinds. */ ++enum aarch64_symbol_type ++aarch64_classify_tls_symbol (rtx x) ++{ ++ enum tls_model tls_kind = tls_symbolic_operand_type (x); ++ ++ switch (tls_kind) ++ { ++ case TLS_MODEL_GLOBAL_DYNAMIC: ++ case TLS_MODEL_LOCAL_DYNAMIC: ++ return TARGET_TLS_DESC ? SYMBOL_SMALL_TLSDESC : SYMBOL_SMALL_TLSGD; ++ ++ case TLS_MODEL_INITIAL_EXEC: ++ return SYMBOL_SMALL_GOTTPREL; ++ ++ case TLS_MODEL_LOCAL_EXEC: ++ return SYMBOL_SMALL_TPREL; ++ ++ case TLS_MODEL_EMULATED: ++ case TLS_MODEL_NONE: ++ return SYMBOL_FORCE_TO_MEM; ++ ++ default: ++ gcc_unreachable (); ++ } ++} ++ ++/* Return the method that should be used to access SYMBOL_REF or ++ LABEL_REF X in context CONTEXT. */ ++enum aarch64_symbol_type ++aarch64_classify_symbol (rtx x, ++ enum aarch64_symbol_context context ATTRIBUTE_UNUSED) ++{ ++ if (GET_CODE (x) == LABEL_REF) ++ { ++ switch (aarch64_cmodel) ++ { ++ case AARCH64_CMODEL_LARGE: ++ return SYMBOL_FORCE_TO_MEM; ++ ++ case AARCH64_CMODEL_TINY_PIC: ++ case AARCH64_CMODEL_TINY: ++ case AARCH64_CMODEL_SMALL_PIC: ++ case AARCH64_CMODEL_SMALL: ++ return SYMBOL_SMALL_ABSOLUTE; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ ++ gcc_assert (GET_CODE (x) == SYMBOL_REF); ++ ++ switch (aarch64_cmodel) ++ { ++ case AARCH64_CMODEL_LARGE: ++ return SYMBOL_FORCE_TO_MEM; ++ ++ case AARCH64_CMODEL_TINY: ++ case AARCH64_CMODEL_SMALL: ++ ++ /* This is needed to get DFmode, TImode constants to be loaded off ++ the constant pool. Is it necessary to dump TImode values into ++ the constant pool. We don't handle TImode constant loads properly ++ yet and hence need to use the constant pool. */ ++ if (CONSTANT_POOL_ADDRESS_P (x)) ++ return SYMBOL_FORCE_TO_MEM; ++ ++ if (aarch64_tls_symbol_p (x)) ++ return aarch64_classify_tls_symbol (x); ++ ++ if (SYMBOL_REF_WEAK (x)) ++ return SYMBOL_FORCE_TO_MEM; ++ ++ return SYMBOL_SMALL_ABSOLUTE; ++ ++ case AARCH64_CMODEL_TINY_PIC: ++ case AARCH64_CMODEL_SMALL_PIC: ++ ++ if (CONSTANT_POOL_ADDRESS_P (x)) ++ return SYMBOL_FORCE_TO_MEM; ++ ++ if (aarch64_tls_symbol_p (x)) ++ return aarch64_classify_tls_symbol (x); ++ ++ if (!aarch64_symbol_binds_local_p (x)) ++ return SYMBOL_SMALL_GOT; ++ ++ return SYMBOL_SMALL_ABSOLUTE; ++ ++ default: ++ gcc_unreachable (); ++ } ++ /* By default push everything into the constant pool. */ ++ return SYMBOL_FORCE_TO_MEM; ++} ++ ++/* Return true if X is a symbolic constant that can be used in context ++ CONTEXT. If it is, store the type of the symbol in *SYMBOL_TYPE. */ ++ ++bool ++aarch64_symbolic_constant_p (rtx x, enum aarch64_symbol_context context, ++ enum aarch64_symbol_type *symbol_type) ++{ ++ rtx offset; ++ split_const (x, &x, &offset); ++ if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF) ++ *symbol_type = aarch64_classify_symbol (x, context); ++ else ++ return false; ++ ++ /* No checking of offset at this point. */ ++ return true; ++} ++ ++bool ++aarch64_constant_address_p (rtx x) ++{ ++ return (CONSTANT_P (x) && memory_address_p (DImode, x)); ++} ++ ++bool ++aarch64_legitimate_pic_operand_p (rtx x) ++{ ++ if (GET_CODE (x) == SYMBOL_REF ++ || (GET_CODE (x) == CONST ++ && GET_CODE (XEXP (x, 0)) == PLUS ++ && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF)) ++ return false; ++ ++ return true; ++} ++ ++static bool ++aarch64_legitimate_constant_p (enum machine_mode mode, rtx x) ++{ ++ /* Do not allow vector struct mode constants. We could support ++ 0 and -1 easily, but they need support in aarch64-simd.md. */ ++ if (TARGET_SIMD && aarch64_vect_struct_mode_p (mode)) ++ return false; ++ ++ /* This could probably go away because ++ we now decompose CONST_INTs according to expand_mov_immediate. */ ++ if ((GET_CODE (x) == CONST_VECTOR ++ && aarch64_simd_valid_immediate (x, mode, false, ++ NULL, NULL, NULL, NULL, NULL) != -1) ++ || CONST_INT_P (x)) ++ return !targetm.cannot_force_const_mem (mode, x); ++ ++ if (GET_CODE (x) == HIGH ++ && aarch64_valid_symref (XEXP (x, 0), GET_MODE (XEXP (x, 0)))) ++ return true; ++ ++ return aarch64_constant_address_p (x); ++} ++ ++static void ++aarch64_init_builtins (void) ++{ ++ tree ftype, decl = NULL; ++ ++ ftype = build_function_type (ptr_type_node, void_list_node); ++ decl = add_builtin_function ("__builtin_thread_pointer", ftype, ++ AARCH64_BUILTIN_THREAD_POINTER, BUILT_IN_MD, ++ NULL, NULL_TREE); ++ TREE_NOTHROW (decl) = 1; ++ TREE_READONLY (decl) = 1; ++ ++ if (TARGET_SIMD) ++ init_aarch64_simd_builtins (); ++} ++ ++static rtx ++aarch64_load_tp (rtx target) ++{ ++ if (!target ++ || GET_MODE (target) != Pmode ++ || !register_operand (target, Pmode)) ++ target = gen_reg_rtx (Pmode); ++ ++ /* Can return in any reg. */ ++ emit_insn (gen_aarch64_load_tp_hard (target)); ++ return target; ++} ++ ++/* Expand an expression EXP that calls a built-in function, ++ with result going to TARGET if that's convenient. */ ++static rtx ++aarch64_expand_builtin (tree exp, ++ rtx target, ++ rtx subtarget ATTRIBUTE_UNUSED, ++ enum machine_mode mode ATTRIBUTE_UNUSED, ++ int ignore ATTRIBUTE_UNUSED) ++{ ++ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); ++ int fcode = DECL_FUNCTION_CODE (fndecl); ++ ++ if (fcode == AARCH64_BUILTIN_THREAD_POINTER) ++ return aarch64_load_tp (target); ++ ++ if (fcode >= AARCH64_SIMD_BUILTIN_BASE) ++ return aarch64_simd_expand_builtin (fcode, exp, target); ++ ++ return NULL_RTX; ++} ++ ++/* On AAPCS systems, this is the "struct __va_list". */ ++static GTY(()) tree va_list_type; ++ ++/* Implement TARGET_BUILD_BUILTIN_VA_LIST. ++ Return the type to use as __builtin_va_list. ++ ++ AAPCS64 \S 7.1.4 requires that va_list be a typedef for a type defined as: ++ ++ struct __va_list ++ { ++ void *__stack; ++ void *__gr_top; ++ void *__vr_top; ++ int __gr_offs; ++ int __vr_offs; ++ }; */ ++ ++static tree ++aarch64_build_builtin_va_list (void) ++{ ++ tree va_list_name; ++ tree f_stack, f_grtop, f_vrtop, f_groff, f_vroff; ++ ++ /* Create the type. */ ++ va_list_type = lang_hooks.types.make_type (RECORD_TYPE); ++ /* Give it the required name. */ ++ va_list_name = build_decl (BUILTINS_LOCATION, ++ TYPE_DECL, ++ get_identifier ("__va_list"), ++ va_list_type); ++ DECL_ARTIFICIAL (va_list_name) = 1; ++ TYPE_NAME (va_list_type) = va_list_name; ++ ++ /* Create the fields. */ ++ f_stack = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__stack"), ++ ptr_type_node); ++ f_grtop = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__gr_top"), ++ ptr_type_node); ++ f_vrtop = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__vr_top"), ++ ptr_type_node); ++ f_groff = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__gr_offs"), ++ integer_type_node); ++ f_vroff = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__vr_offs"), ++ integer_type_node); ++ ++ DECL_ARTIFICIAL (f_stack) = 1; ++ DECL_ARTIFICIAL (f_grtop) = 1; ++ DECL_ARTIFICIAL (f_vrtop) = 1; ++ DECL_ARTIFICIAL (f_groff) = 1; ++ DECL_ARTIFICIAL (f_vroff) = 1; ++ ++ DECL_FIELD_CONTEXT (f_stack) = va_list_type; ++ DECL_FIELD_CONTEXT (f_grtop) = va_list_type; ++ DECL_FIELD_CONTEXT (f_vrtop) = va_list_type; ++ DECL_FIELD_CONTEXT (f_groff) = va_list_type; ++ DECL_FIELD_CONTEXT (f_vroff) = va_list_type; ++ ++ TYPE_FIELDS (va_list_type) = f_stack; ++ DECL_CHAIN (f_stack) = f_grtop; ++ DECL_CHAIN (f_grtop) = f_vrtop; ++ DECL_CHAIN (f_vrtop) = f_groff; ++ DECL_CHAIN (f_groff) = f_vroff; ++ ++ /* Compute its layout. */ ++ layout_type (va_list_type); ++ ++ return va_list_type; ++} ++ ++/* Implement TARGET_EXPAND_BUILTIN_VA_START. */ ++static void ++aarch64_expand_builtin_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED) ++{ ++ const CUMULATIVE_ARGS *cum; ++ tree f_stack, f_grtop, f_vrtop, f_groff, f_vroff; ++ tree stack, grtop, vrtop, groff, vroff; ++ tree t; ++ int gr_save_area_size; ++ int vr_save_area_size; ++ int vr_offset; ++ ++ cum = &crtl->args.info; ++ gr_save_area_size ++ = (NUM_ARG_REGS - cum->aapcs_ncrn) * UNITS_PER_WORD; ++ vr_save_area_size ++ = (NUM_FP_ARG_REGS - cum->aapcs_nvrn) * UNITS_PER_VREG; ++ ++ if (TARGET_GENERAL_REGS_ONLY) ++ { ++ if (cum->aapcs_nvrn > 0) ++ sorry ("%qs and floating point or vector arguments", ++ "-mgeneral-regs-only"); ++ vr_save_area_size = 0; ++ } ++ ++ f_stack = TYPE_FIELDS (va_list_type_node); ++ f_grtop = DECL_CHAIN (f_stack); ++ f_vrtop = DECL_CHAIN (f_grtop); ++ f_groff = DECL_CHAIN (f_vrtop); ++ f_vroff = DECL_CHAIN (f_groff); ++ ++ stack = build3 (COMPONENT_REF, TREE_TYPE (f_stack), valist, f_stack, ++ NULL_TREE); ++ grtop = build3 (COMPONENT_REF, TREE_TYPE (f_grtop), valist, f_grtop, ++ NULL_TREE); ++ vrtop = build3 (COMPONENT_REF, TREE_TYPE (f_vrtop), valist, f_vrtop, ++ NULL_TREE); ++ groff = build3 (COMPONENT_REF, TREE_TYPE (f_groff), valist, f_groff, ++ NULL_TREE); ++ vroff = build3 (COMPONENT_REF, TREE_TYPE (f_vroff), valist, f_vroff, ++ NULL_TREE); ++ ++ /* Emit code to initialize STACK, which points to the next varargs stack ++ argument. CUM->AAPCS_STACK_SIZE gives the number of stack words used ++ by named arguments. STACK is 8-byte aligned. */ ++ t = make_tree (TREE_TYPE (stack), virtual_incoming_args_rtx); ++ if (cum->aapcs_stack_size > 0) ++ t = fold_build_pointer_plus_hwi (t, cum->aapcs_stack_size * UNITS_PER_WORD); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (stack), stack, t); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++ ++ /* Emit code to initialize GRTOP, the top of the GR save area. ++ virtual_incoming_args_rtx should have been 16 byte aligned. */ ++ t = make_tree (TREE_TYPE (grtop), virtual_incoming_args_rtx); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (grtop), grtop, t); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++ ++ /* Emit code to initialize VRTOP, the top of the VR save area. ++ This address is gr_save_area_bytes below GRTOP, rounded ++ down to the next 16-byte boundary. */ ++ t = make_tree (TREE_TYPE (vrtop), virtual_incoming_args_rtx); ++ vr_offset = AARCH64_ROUND_UP (gr_save_area_size, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ ++ if (vr_offset) ++ t = fold_build_pointer_plus_hwi (t, -vr_offset); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (vrtop), vrtop, t); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++ ++ /* Emit code to initialize GROFF, the offset from GRTOP of the ++ next GPR argument. */ ++ t = build2 (MODIFY_EXPR, TREE_TYPE (groff), groff, ++ build_int_cst (TREE_TYPE (groff), -gr_save_area_size)); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++ ++ /* Likewise emit code to initialize VROFF, the offset from FTOP ++ of the next VR argument. */ ++ t = build2 (MODIFY_EXPR, TREE_TYPE (vroff), vroff, ++ build_int_cst (TREE_TYPE (vroff), -vr_save_area_size)); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++} ++ ++/* Implement TARGET_GIMPLIFY_VA_ARG_EXPR. */ ++ ++static tree ++aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p, ++ gimple_seq *post_p ATTRIBUTE_UNUSED) ++{ ++ tree addr; ++ bool indirect_p; ++ bool is_ha; /* is HFA or HVA. */ ++ bool dw_align; /* double-word align. */ ++ enum machine_mode ag_mode = VOIDmode; ++ int nregs; ++ enum machine_mode mode; ++ ++ tree f_stack, f_grtop, f_vrtop, f_groff, f_vroff; ++ tree stack, f_top, f_off, off, arg, roundup, on_stack; ++ HOST_WIDE_INT size, rsize, adjust, align; ++ tree t, u, cond1, cond2; ++ ++ indirect_p = pass_by_reference (NULL, TYPE_MODE (type), type, false); ++ if (indirect_p) ++ type = build_pointer_type (type); ++ ++ mode = TYPE_MODE (type); ++ ++ f_stack = TYPE_FIELDS (va_list_type_node); ++ f_grtop = DECL_CHAIN (f_stack); ++ f_vrtop = DECL_CHAIN (f_grtop); ++ f_groff = DECL_CHAIN (f_vrtop); ++ f_vroff = DECL_CHAIN (f_groff); ++ ++ stack = build3 (COMPONENT_REF, TREE_TYPE (f_stack), unshare_expr (valist), ++ f_stack, NULL_TREE); ++ size = int_size_in_bytes (type); ++ align = aarch64_function_arg_alignment (mode, type) / BITS_PER_UNIT; ++ ++ dw_align = false; ++ adjust = 0; ++ if (aarch64_vfp_is_call_or_return_candidate (mode, ++ type, ++ &ag_mode, ++ &nregs, ++ &is_ha)) ++ { ++ /* TYPE passed in fp/simd registers. */ ++ if (TARGET_GENERAL_REGS_ONLY) ++ sorry ("%qs and floating point or vector arguments", ++ "-mgeneral-regs-only"); ++ ++ f_top = build3 (COMPONENT_REF, TREE_TYPE (f_vrtop), ++ unshare_expr (valist), f_vrtop, NULL_TREE); ++ f_off = build3 (COMPONENT_REF, TREE_TYPE (f_vroff), ++ unshare_expr (valist), f_vroff, NULL_TREE); ++ ++ rsize = nregs * UNITS_PER_VREG; ++ ++ if (is_ha) ++ { ++ if (BYTES_BIG_ENDIAN && GET_MODE_SIZE (ag_mode) < UNITS_PER_VREG) ++ adjust = UNITS_PER_VREG - GET_MODE_SIZE (ag_mode); ++ } ++ else if (BLOCK_REG_PADDING (mode, type, 1) == downward ++ && size < UNITS_PER_VREG) ++ { ++ adjust = UNITS_PER_VREG - size; ++ } ++ } ++ else ++ { ++ /* TYPE passed in general registers. */ ++ f_top = build3 (COMPONENT_REF, TREE_TYPE (f_grtop), ++ unshare_expr (valist), f_grtop, NULL_TREE); ++ f_off = build3 (COMPONENT_REF, TREE_TYPE (f_groff), ++ unshare_expr (valist), f_groff, NULL_TREE); ++ rsize = (size + UNITS_PER_WORD - 1) & -UNITS_PER_WORD; ++ nregs = rsize / UNITS_PER_WORD; ++ ++ if (align > 8) ++ dw_align = true; ++ ++ if (BLOCK_REG_PADDING (mode, type, 1) == downward ++ && size < UNITS_PER_WORD) ++ { ++ adjust = UNITS_PER_WORD - size; ++ } ++ } ++ ++ /* Get a local temporary for the field value. */ ++ off = get_initialized_tmp_var (f_off, pre_p, NULL); ++ ++ /* Emit code to branch if off >= 0. */ ++ t = build2 (GE_EXPR, boolean_type_node, off, ++ build_int_cst (TREE_TYPE (off), 0)); ++ cond1 = build3 (COND_EXPR, ptr_type_node, t, NULL_TREE, NULL_TREE); ++ ++ if (dw_align) ++ { ++ /* Emit: offs = (offs + 15) & -16. */ ++ t = build2 (PLUS_EXPR, TREE_TYPE (off), off, ++ build_int_cst (TREE_TYPE (off), 15)); ++ t = build2 (BIT_AND_EXPR, TREE_TYPE (off), t, ++ build_int_cst (TREE_TYPE (off), -16)); ++ roundup = build2 (MODIFY_EXPR, TREE_TYPE (off), off, t); ++ } ++ else ++ roundup = NULL; ++ ++ /* Update ap.__[g|v]r_offs */ ++ t = build2 (PLUS_EXPR, TREE_TYPE (off), off, ++ build_int_cst (TREE_TYPE (off), rsize)); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (f_off), unshare_expr (f_off), t); ++ ++ /* String up. */ ++ if (roundup) ++ t = build2 (COMPOUND_EXPR, TREE_TYPE (t), roundup, t); ++ ++ /* [cond2] if (ap.__[g|v]r_offs > 0) */ ++ u = build2 (GT_EXPR, boolean_type_node, unshare_expr (f_off), ++ build_int_cst (TREE_TYPE (f_off), 0)); ++ cond2 = build3 (COND_EXPR, ptr_type_node, u, NULL_TREE, NULL_TREE); ++ ++ /* String up: make sure the assignment happens before the use. */ ++ t = build2 (COMPOUND_EXPR, TREE_TYPE (cond2), t, cond2); ++ COND_EXPR_ELSE (cond1) = t; ++ ++ /* Prepare the trees handling the argument that is passed on the stack; ++ the top level node will store in ON_STACK. */ ++ arg = get_initialized_tmp_var (stack, pre_p, NULL); ++ if (align > 8) ++ { ++ /* if (alignof(type) > 8) (arg = arg + 15) & -16; */ ++ t = fold_convert (intDI_type_node, arg); ++ t = build2 (PLUS_EXPR, TREE_TYPE (t), t, ++ build_int_cst (TREE_TYPE (t), 15)); ++ t = build2 (BIT_AND_EXPR, TREE_TYPE (t), t, ++ build_int_cst (TREE_TYPE (t), -16)); ++ t = fold_convert (TREE_TYPE (arg), t); ++ roundup = build2 (MODIFY_EXPR, TREE_TYPE (arg), arg, t); ++ } ++ else ++ roundup = NULL; ++ /* Advance ap.__stack */ ++ t = fold_convert (intDI_type_node, arg); ++ t = build2 (PLUS_EXPR, TREE_TYPE (t), t, ++ build_int_cst (TREE_TYPE (t), size + 7)); ++ t = build2 (BIT_AND_EXPR, TREE_TYPE (t), t, ++ build_int_cst (TREE_TYPE (t), -8)); ++ t = fold_convert (TREE_TYPE (arg), t); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (stack), unshare_expr (stack), t); ++ /* String up roundup and advance. */ ++ if (roundup) ++ t = build2 (COMPOUND_EXPR, TREE_TYPE (t), roundup, t); ++ /* String up with arg */ ++ on_stack = build2 (COMPOUND_EXPR, TREE_TYPE (arg), t, arg); ++ /* Big-endianness related address adjustment. */ ++ if (BLOCK_REG_PADDING (mode, type, 1) == downward ++ && size < UNITS_PER_WORD) ++ { ++ t = build2 (POINTER_PLUS_EXPR, TREE_TYPE (arg), arg, ++ size_int (UNITS_PER_WORD - size)); ++ on_stack = build2 (COMPOUND_EXPR, TREE_TYPE (arg), on_stack, t); ++ } ++ ++ COND_EXPR_THEN (cond1) = unshare_expr (on_stack); ++ COND_EXPR_THEN (cond2) = unshare_expr (on_stack); ++ ++ /* Adjustment to OFFSET in the case of BIG_ENDIAN. */ ++ t = off; ++ if (adjust) ++ t = build2 (PREINCREMENT_EXPR, TREE_TYPE (off), off, ++ build_int_cst (TREE_TYPE (off), adjust)); ++ ++ t = fold_convert (sizetype, t); ++ t = build2 (POINTER_PLUS_EXPR, TREE_TYPE (f_top), f_top, t); ++ ++ if (is_ha) ++ { ++ /* type ha; // treat as "struct {ftype field[n];}" ++ ... [computing offs] ++ for (i = 0; i 0) ++ sorry ("%qs and floating point or vector arguments", ++ "-mgeneral-regs-only"); ++ vr_saved = 0; ++ } ++ ++ if (!no_rtl) ++ { ++ if (gr_saved > 0) ++ { ++ rtx ptr, mem; ++ ++ /* virtual_incoming_args_rtx should have been 16-byte aligned. */ ++ ptr = plus_constant (virtual_incoming_args_rtx, ++ - gr_saved * UNITS_PER_WORD); ++ mem = gen_frame_mem (BLKmode, ptr); ++ set_mem_alias_set (mem, get_varargs_alias_set ()); ++ ++ move_block_from_reg (local_cum.aapcs_ncrn + R0_REGNUM, ++ mem, gr_saved); ++ } ++ if (vr_saved > 0) ++ { ++ /* We can't use move_block_from_reg, because it will use ++ the wrong mode, storing D regs only. */ ++ enum machine_mode mode = TImode; ++ int off, i; ++ ++ /* Set OFF to the offset from virtual_incoming_args_rtx of ++ the first vector register. The VR save area lies below ++ the GR one, and is aligned to 16 bytes. */ ++ off = -AARCH64_ROUND_UP (gr_saved * UNITS_PER_WORD, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ off -= vr_saved * UNITS_PER_VREG; ++ ++ for (i = local_cum.aapcs_nvrn; i < NUM_FP_ARG_REGS; ++i) ++ { ++ rtx ptr, mem; ++ ++ ptr = plus_constant (virtual_incoming_args_rtx, off); ++ mem = gen_frame_mem (mode, ptr); ++ set_mem_alias_set (mem, get_varargs_alias_set ()); ++ aarch64_emit_move (mem, gen_rtx_REG (mode, V0_REGNUM + i)); ++ off += UNITS_PER_VREG; ++ } ++ } ++ } ++ ++ /* We don't save the size into *PRETEND_SIZE because we want to avoid ++ any complication of having crtl->args.pretend_args_size changed. */ ++ cfun->machine->saved_varargs_size ++ = (AARCH64_ROUND_UP (gr_saved * UNITS_PER_WORD, ++ STACK_BOUNDARY / BITS_PER_UNIT) ++ + vr_saved * UNITS_PER_VREG); ++} ++ ++static void ++aarch64_conditional_register_usage (void) ++{ ++ int i; ++ if (!TARGET_FLOAT) ++ { ++ for (i = V0_REGNUM; i <= V31_REGNUM; i++) ++ { ++ fixed_regs[i] = 1; ++ call_used_regs[i] = 1; ++ } ++ } ++} ++ ++/* Walk down the type tree of TYPE counting consecutive base elements. ++ If *MODEP is VOIDmode, then set it to the first valid floating point ++ type. If a non-floating point type is found, or if a floating point ++ type that doesn't match a non-VOIDmode *MODEP is found, then return -1, ++ otherwise return the count in the sub-tree. */ ++static int ++aapcs_vfp_sub_candidate (const_tree type, enum machine_mode *modep) ++{ ++ enum machine_mode mode; ++ HOST_WIDE_INT size; ++ ++ switch (TREE_CODE (type)) ++ { ++ case REAL_TYPE: ++ mode = TYPE_MODE (type); ++ if (mode != DFmode && mode != SFmode && mode != TFmode) ++ return -1; ++ ++ if (*modep == VOIDmode) ++ *modep = mode; ++ ++ if (*modep == mode) ++ return 1; ++ ++ break; ++ ++ case COMPLEX_TYPE: ++ mode = TYPE_MODE (TREE_TYPE (type)); ++ if (mode != DFmode && mode != SFmode && mode != TFmode) ++ return -1; ++ ++ if (*modep == VOIDmode) ++ *modep = mode; ++ ++ if (*modep == mode) ++ return 2; ++ ++ break; ++ ++ case VECTOR_TYPE: ++ /* Use V2SImode and V4SImode as representatives of all 64-bit ++ and 128-bit vector types. */ ++ size = int_size_in_bytes (type); ++ switch (size) ++ { ++ case 8: ++ mode = V2SImode; ++ break; ++ case 16: ++ mode = V4SImode; ++ break; ++ default: ++ return -1; ++ } ++ ++ if (*modep == VOIDmode) ++ *modep = mode; ++ ++ /* Vector modes are considered to be opaque: two vectors are ++ equivalent for the purposes of being homogeneous aggregates ++ if they are the same size. */ ++ if (*modep == mode) ++ return 1; ++ ++ break; ++ ++ case ARRAY_TYPE: ++ { ++ int count; ++ tree index = TYPE_DOMAIN (type); ++ ++ /* Can't handle incomplete types. */ ++ if (!COMPLETE_TYPE_P (type)) ++ return -1; ++ ++ count = aapcs_vfp_sub_candidate (TREE_TYPE (type), modep); ++ if (count == -1 ++ || !index ++ || !TYPE_MAX_VALUE (index) ++ || !host_integerp (TYPE_MAX_VALUE (index), 1) ++ || !TYPE_MIN_VALUE (index) ++ || !host_integerp (TYPE_MIN_VALUE (index), 1) ++ || count < 0) ++ return -1; ++ ++ count *= (1 + tree_low_cst (TYPE_MAX_VALUE (index), 1) ++ - tree_low_cst (TYPE_MIN_VALUE (index), 1)); ++ ++ /* There must be no padding. */ ++ if (!host_integerp (TYPE_SIZE (type), 1) ++ || (tree_low_cst (TYPE_SIZE (type), 1) ++ != count * GET_MODE_BITSIZE (*modep))) ++ return -1; ++ ++ return count; ++ } ++ ++ case RECORD_TYPE: ++ { ++ int count = 0; ++ int sub_count; ++ tree field; ++ ++ /* Can't handle incomplete types. */ ++ if (!COMPLETE_TYPE_P (type)) ++ return -1; ++ ++ for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field)) ++ { ++ if (TREE_CODE (field) != FIELD_DECL) ++ continue; ++ ++ sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep); ++ if (sub_count < 0) ++ return -1; ++ count += sub_count; ++ } ++ ++ /* There must be no padding. */ ++ if (!host_integerp (TYPE_SIZE (type), 1) ++ || (tree_low_cst (TYPE_SIZE (type), 1) ++ != count * GET_MODE_BITSIZE (*modep))) ++ return -1; ++ ++ return count; ++ } ++ ++ case UNION_TYPE: ++ case QUAL_UNION_TYPE: ++ { ++ /* These aren't very interesting except in a degenerate case. */ ++ int count = 0; ++ int sub_count; ++ tree field; ++ ++ /* Can't handle incomplete types. */ ++ if (!COMPLETE_TYPE_P (type)) ++ return -1; ++ ++ for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field)) ++ { ++ if (TREE_CODE (field) != FIELD_DECL) ++ continue; ++ ++ sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep); ++ if (sub_count < 0) ++ return -1; ++ count = count > sub_count ? count : sub_count; ++ } ++ ++ /* There must be no padding. */ ++ if (!host_integerp (TYPE_SIZE (type), 1) ++ || (tree_low_cst (TYPE_SIZE (type), 1) ++ != count * GET_MODE_BITSIZE (*modep))) ++ return -1; ++ ++ return count; ++ } ++ ++ default: ++ break; ++ } ++ ++ return -1; ++} ++ ++/* Return TRUE if the type, as described by TYPE and MODE, is a composite ++ type as described in AAPCS64 \S 4.3. This includes aggregate, union and ++ array types. The C99 floating-point complex types are also considered ++ as composite types, according to AAPCS64 \S 7.1.1. The complex integer ++ types, which are GCC extensions and out of the scope of AAPCS64, are ++ treated as composite types here as well. ++ ++ Note that MODE itself is not sufficient in determining whether a type ++ is such a composite type or not. This is because ++ stor-layout.c:compute_record_mode may have already changed the MODE ++ (BLKmode) of a RECORD_TYPE TYPE to some other mode. For example, a ++ structure with only one field may have its MODE set to the mode of the ++ field. Also an integer mode whose size matches the size of the ++ RECORD_TYPE type may be used to substitute the original mode ++ (i.e. BLKmode) in certain circumstances. In other words, MODE cannot be ++ solely relied on. */ ++ ++static bool ++aarch64_composite_type_p (const_tree type, ++ enum machine_mode mode) ++{ ++ if (type && (AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE)) ++ return true; ++ ++ if (mode == BLKmode ++ || GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT ++ || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT) ++ return true; ++ ++ return false; ++} ++ ++/* Return TRUE if the type, as described by TYPE and MODE, is a short vector ++ type as described in AAPCS64 \S 4.1.2. ++ ++ See the comment above aarch64_composite_type_p for the notes on MODE. */ ++ ++static bool ++aarch64_short_vector_p (const_tree type, ++ enum machine_mode mode) ++{ ++ HOST_WIDE_INT size = -1; ++ ++ if (type && TREE_CODE (type) == VECTOR_TYPE) ++ size = int_size_in_bytes (type); ++ else if (!aarch64_composite_type_p (type, mode) ++ && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT ++ || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)) ++ size = GET_MODE_SIZE (mode); ++ ++ return (size == 8 || size == 16) ? true : false; ++} ++ ++/* Return TRUE if an argument, whose type is described by TYPE and MODE, ++ shall be passed or returned in simd/fp register(s) (providing these ++ parameter passing registers are available). ++ ++ Upon successful return, *COUNT returns the number of needed registers, ++ *BASE_MODE returns the mode of the individual register and when IS_HAF ++ is not NULL, *IS_HA indicates whether or not the argument is a homogeneous ++ floating-point aggregate or a homogeneous short-vector aggregate. */ ++ ++static bool ++aarch64_vfp_is_call_or_return_candidate (enum machine_mode mode, ++ const_tree type, ++ enum machine_mode *base_mode, ++ int *count, ++ bool *is_ha) ++{ ++ enum machine_mode new_mode = VOIDmode; ++ bool composite_p = aarch64_composite_type_p (type, mode); ++ ++ if (is_ha != NULL) *is_ha = false; ++ ++ if ((!composite_p && GET_MODE_CLASS (mode) == MODE_FLOAT) ++ || aarch64_short_vector_p (type, mode)) ++ { ++ *count = 1; ++ new_mode = mode; ++ } ++ else if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT) ++ { ++ if (is_ha != NULL) *is_ha = true; ++ *count = 2; ++ new_mode = GET_MODE_INNER (mode); ++ } ++ else if (type && composite_p) ++ { ++ int ag_count = aapcs_vfp_sub_candidate (type, &new_mode); ++ ++ if (ag_count > 0 && ag_count <= HA_MAX_NUM_FLDS) ++ { ++ if (is_ha != NULL) *is_ha = true; ++ *count = ag_count; ++ } ++ else ++ return false; ++ } ++ else ++ return false; ++ ++ *base_mode = new_mode; ++ return true; ++} ++ ++/* Implement TARGET_STRUCT_VALUE_RTX. */ ++ ++static rtx ++aarch64_struct_value_rtx (tree fndecl ATTRIBUTE_UNUSED, ++ int incoming ATTRIBUTE_UNUSED) ++{ ++ return gen_rtx_REG (Pmode, AARCH64_STRUCT_VALUE_REGNUM); ++} ++ ++/* Implements target hook vector_mode_supported_p. */ ++static bool ++aarch64_vector_mode_supported_p (enum machine_mode mode) ++{ ++ if (TARGET_SIMD ++ && (mode == V4SImode || mode == V8HImode ++ || mode == V16QImode || mode == V2DImode ++ || mode == V2SImode || mode == V4HImode ++ || mode == V8QImode || mode == V2SFmode ++ || mode == V4SFmode || mode == V2DFmode)) ++ return true; ++ ++ return false; ++} ++ ++/* Return quad mode as the preferred SIMD mode. */ ++static enum machine_mode ++aarch64_preferred_simd_mode (enum machine_mode mode) ++{ ++ if (TARGET_SIMD) ++ switch (mode) ++ { ++ case DFmode: ++ return V2DFmode; ++ case SFmode: ++ return V4SFmode; ++ case SImode: ++ return V4SImode; ++ case HImode: ++ return V8HImode; ++ case QImode: ++ return V16QImode; ++ case DImode: ++ return V2DImode; ++ break; ++ ++ default:; ++ } ++ return word_mode; ++} ++ ++/* Legitimize a memory reference for sync primitive implemented using ++ LDXR/STXR instructions. We currently force the form of the reference ++ to be indirect without offset. */ ++static rtx ++aarch64_legitimize_sync_memory (rtx memory) ++{ ++ rtx addr = force_reg (Pmode, XEXP (memory, 0)); ++ rtx legitimate_memory = gen_rtx_MEM (GET_MODE (memory), addr); ++ ++ set_mem_alias_set (legitimate_memory, ALIAS_SET_MEMORY_BARRIER); ++ MEM_VOLATILE_P (legitimate_memory) = MEM_VOLATILE_P (memory); ++ return legitimate_memory; ++} ++ ++/* An instruction emitter. */ ++typedef void (* emit_f) (int label, const char *, rtx *); ++ ++/* An instruction emitter that emits via the conventional ++ output_asm_insn. */ ++static void ++aarch64_emit (int label ATTRIBUTE_UNUSED, const char *pattern, rtx *operands) ++{ ++ output_asm_insn (pattern, operands); ++} ++ ++/* Count the number of emitted synchronization instructions. */ ++static unsigned aarch64_insn_count; ++ ++/* An emitter that counts emitted instructions but does not actually ++ emit instruction into the the instruction stream. */ ++static void ++aarch64_count (int label, ++ const char *pattern ATTRIBUTE_UNUSED, ++ rtx *operands ATTRIBUTE_UNUSED) ++{ ++ if (! label) ++ ++ aarch64_insn_count; ++} ++ ++static void ++aarch64_output_asm_insn (emit_f, int, rtx *, ++ const char *, ...) ATTRIBUTE_PRINTF_4; ++ ++/* Construct a pattern using conventional output formatting and feed ++ it to output_asm_insn. Provides a mechanism to construct the ++ output pattern on the fly. Note the hard limit on the pattern ++ buffer size. */ ++static void ++aarch64_output_asm_insn (emit_f emit, int label, rtx *operands, ++ const char *pattern, ...) ++{ ++ va_list ap; ++ char buffer[256]; ++ ++ va_start (ap, pattern); ++ vsnprintf (buffer, sizeof (buffer), pattern, ap); ++ va_end (ap); ++ emit (label, buffer, operands); ++} ++ ++/* Helper to figure out the instruction suffix required on LDXR/STXR ++ instructions for operations on an object of the specified mode. */ ++static const char * ++aarch64_load_store_suffix (enum machine_mode mode) ++{ ++ switch (mode) ++ { ++ case QImode: return "b"; ++ case HImode: return "h"; ++ case SImode: return ""; ++ case DImode: return ""; ++ default: ++ gcc_unreachable (); ++ } ++ return ""; ++} ++ ++/* Emit an excluive load instruction appropriate for the specified ++ mode. */ ++static void ++aarch64_output_sync_load (emit_f emit, ++ enum machine_mode mode, ++ rtx target, ++ rtx memory, ++ bool with_barrier) ++{ ++ const char *suffix = aarch64_load_store_suffix (mode); ++ rtx operands[2]; ++ ++ operands[0] = target; ++ operands[1] = memory; ++ aarch64_output_asm_insn (emit, 0, operands, "ld%sxr%s\t%%%s0, %%1", ++ with_barrier ? "a" : "", suffix, ++ mode == DImode ? "x" : "w"); ++} ++ ++/* Emit an exclusive store instruction appropriate for the specified ++ mode. */ ++static void ++aarch64_output_sync_store (emit_f emit, ++ enum machine_mode mode, ++ rtx result, ++ rtx value, ++ rtx memory, ++ bool with_barrier) ++{ ++ const char *suffix = aarch64_load_store_suffix (mode); ++ rtx operands[3]; ++ ++ operands[0] = result; ++ operands[1] = value; ++ operands[2] = memory; ++ aarch64_output_asm_insn (emit, 0, operands, ++ "st%sxr%s\t%%w0, %%%s1, %%2", ++ with_barrier ? "l" : "", ++ suffix, ++ mode == DImode ? "x" : "w"); ++} ++ ++/* Helper to emit a two operand instruction. */ ++static void ++aarch64_output_op2 (emit_f emit, const char *mnemonic, rtx d, rtx s) ++{ ++ rtx operands[2]; ++ enum machine_mode mode; ++ const char *constraint; ++ ++ mode = GET_MODE (d); ++ operands[0] = d; ++ operands[1] = s; ++ constraint = mode == DImode ? "" : "w"; ++ aarch64_output_asm_insn (emit, 0, operands, "%s\t%%%s0, %%%s1", mnemonic, ++ constraint, constraint); ++} ++ ++/* Helper to emit a three operand instruction. */ ++static void ++aarch64_output_op3 (emit_f emit, const char *mnemonic, rtx d, rtx a, rtx b) ++{ ++ rtx operands[3]; ++ enum machine_mode mode; ++ const char *constraint; ++ ++ mode = GET_MODE (d); ++ operands[0] = d; ++ operands[1] = a; ++ operands[2] = b; ++ ++ constraint = mode == DImode ? "" : "w"; ++ aarch64_output_asm_insn (emit, 0, operands, "%s\t%%%s0, %%%s1, %%%s2", ++ mnemonic, constraint, constraint, constraint); ++} ++ ++/* Emit a load store exclusive synchronization loop. ++ ++ do ++ old_value = [mem] ++ if old_value != required_value ++ break; ++ t1 = sync_op (old_value, new_value) ++ [mem] = t1, t2 = [0|1] ++ while ! t2 ++ ++ Note: ++ t1 == t2 is not permitted ++ t1 == old_value is permitted ++ ++ required_value: ++ ++ RTX register or const_int representing the required old_value for ++ the modify to continue, if NULL no comparsion is performed. */ ++static void ++aarch64_output_sync_loop (emit_f emit, ++ enum machine_mode mode, ++ rtx old_value, ++ rtx memory, ++ rtx required_value, ++ rtx new_value, ++ rtx t1, ++ rtx t2, ++ enum attr_sync_op sync_op, ++ int acquire_barrier, ++ int release_barrier) ++{ ++ rtx operands[1]; ++ ++ gcc_assert (t1 != t2); ++ ++ aarch64_output_asm_insn (emit, 1, operands, "%sLSYT%%=:", LOCAL_LABEL_PREFIX); ++ ++ aarch64_output_sync_load (emit, mode, old_value, memory, acquire_barrier); ++ ++ if (required_value) ++ { ++ rtx operands[2]; ++ ++ operands[0] = old_value; ++ operands[1] = required_value; ++ aarch64_output_asm_insn (emit, 0, operands, "cmp\t%%0, %%1"); ++ aarch64_output_asm_insn (emit, 0, operands, "bne\t%sLSYB%%=", ++ LOCAL_LABEL_PREFIX); ++ } ++ ++ switch (sync_op) ++ { ++ case SYNC_OP_ADD: ++ aarch64_output_op3 (emit, "add", t1, old_value, new_value); ++ break; ++ ++ case SYNC_OP_SUB: ++ aarch64_output_op3 (emit, "sub", t1, old_value, new_value); ++ break; ++ ++ case SYNC_OP_IOR: ++ aarch64_output_op3 (emit, "orr", t1, old_value, new_value); ++ break; ++ ++ case SYNC_OP_XOR: ++ aarch64_output_op3 (emit, "eor", t1, old_value, new_value); ++ break; ++ ++ case SYNC_OP_AND: ++ aarch64_output_op3 (emit,"and", t1, old_value, new_value); ++ break; ++ ++ case SYNC_OP_NAND: ++ aarch64_output_op3 (emit, "and", t1, old_value, new_value); ++ aarch64_output_op2 (emit, "mvn", t1, t1); ++ break; ++ ++ case SYNC_OP_NONE: ++ t1 = new_value; ++ break; ++ } ++ ++ aarch64_output_sync_store (emit, mode, t2, t1, memory, release_barrier); ++ operands[0] = t2; ++ aarch64_output_asm_insn (emit, 0, operands, "cbnz\t%%w0, %sLSYT%%=", ++ LOCAL_LABEL_PREFIX); ++ ++ aarch64_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX); ++} ++ ++static rtx ++aarch64_get_sync_operand (rtx *operands, int index, rtx default_value) ++{ ++ if (index > 0) ++ default_value = operands[index - 1]; ++ ++ return default_value; ++} ++ ++#define FETCH_SYNC_OPERAND(NAME, DEFAULT) \ ++ aarch64_get_sync_operand (operands, (int) get_attr_sync_##NAME (insn), \ ++ DEFAULT); ++ ++/* Extract the operands for a synchroniztion instruction from the ++ instructions attributes and emit the instruction. */ ++static void ++aarch64_process_output_sync_insn (emit_f emit, rtx insn, rtx *operands) ++{ ++ rtx result, memory, required_value, new_value, t1, t2; ++ int release_barrier; ++ int acquire_barrier = 1; ++ enum machine_mode mode; ++ enum attr_sync_op sync_op; ++ ++ result = FETCH_SYNC_OPERAND (result, 0); ++ memory = FETCH_SYNC_OPERAND (memory, 0); ++ required_value = FETCH_SYNC_OPERAND (required_value, 0); ++ new_value = FETCH_SYNC_OPERAND (new_value, 0); ++ t1 = FETCH_SYNC_OPERAND (t1, 0); ++ t2 = FETCH_SYNC_OPERAND (t2, 0); ++ release_barrier = ++ get_attr_sync_release_barrier (insn) == SYNC_RELEASE_BARRIER_YES; ++ sync_op = get_attr_sync_op (insn); ++ mode = GET_MODE (memory); ++ ++ aarch64_output_sync_loop (emit, mode, result, memory, required_value, ++ new_value, t1, t2, sync_op, acquire_barrier, ++ release_barrier); ++} ++ ++/* Emit a synchronization instruction loop. */ ++const char * ++aarch64_output_sync_insn (rtx insn, rtx *operands) ++{ ++ aarch64_process_output_sync_insn (aarch64_emit, insn, operands); ++ return ""; ++} ++ ++/* Emit a store release instruction appropriate for the specified ++ mode. */ ++const char * ++aarch64_output_sync_lock_release (rtx value, rtx memory) ++{ ++ const char *suffix; ++ enum machine_mode mode; ++ rtx operands[2]; ++ operands[0] = value; ++ operands[1] = memory; ++ mode = GET_MODE (memory); ++ suffix = aarch64_load_store_suffix (mode); ++ aarch64_output_asm_insn (aarch64_emit, 0, operands, ++ "stlr%s\t%%%s0, %%1", ++ suffix, ++ mode == DImode ? "x" : "w"); ++ return ""; ++} ++ ++/* Count the number of machine instruction that will be emitted for a ++ synchronization instruction. Note that the emitter used does not ++ emit instructions, it just counts instructions being careful not ++ to count labels. */ ++unsigned int ++aarch64_sync_loop_insns (rtx insn, rtx *operands) ++{ ++ aarch64_insn_count = 0; ++ aarch64_process_output_sync_insn (aarch64_count, insn, operands); ++ return aarch64_insn_count; ++} ++ ++/* Helper to call a target sync instruction generator, dealing with ++ the variation in operands required by the different generators. */ ++static rtx ++aarch64_call_generator (struct aarch64_sync_generator *generator, rtx old_value, ++ rtx memory, rtx required_value, rtx new_value) ++{ ++ switch (generator->op) ++ { ++ case aarch64_sync_generator_omn: ++ gcc_assert (! required_value); ++ return generator->u.omn (old_value, memory, new_value); ++ ++ case aarch64_sync_generator_omrn: ++ gcc_assert (required_value); ++ return generator->u.omrn (old_value, memory, required_value, new_value); ++ } ++ ++ return NULL; ++} ++ ++/* Expand a synchronization loop. The synchronization loop is ++ expanded as an opaque block of instructions in order to ensure that ++ we do not subsequently get extraneous memory accesses inserted ++ within the critical region. The exclusive access property of ++ LDXR/STXR instructions is only guaranteed if there are no intervening ++ memory accesses. */ ++void ++aarch64_expand_sync (enum machine_mode mode, ++ struct aarch64_sync_generator *generator, ++ rtx target, rtx memory, rtx required_value, rtx new_value) ++{ ++ if (target == NULL) ++ target = gen_reg_rtx (mode); ++ ++ memory = aarch64_legitimize_sync_memory (memory); ++ if (mode != SImode && mode != DImode) ++ { ++ rtx load_temp = gen_reg_rtx (SImode); ++ ++ if (required_value) ++ required_value = convert_modes (SImode, mode, required_value, true); ++ ++ new_value = convert_modes (SImode, mode, new_value, true); ++ emit_insn (aarch64_call_generator (generator, load_temp, memory, ++ required_value, new_value)); ++ emit_move_insn (target, gen_lowpart (mode, load_temp)); ++ } ++ else ++ { ++ emit_insn (aarch64_call_generator (generator, target, memory, ++ required_value, new_value)); ++ } ++} ++ ++/* Return the equivalent letter for size. */ ++static unsigned char ++sizetochar (int size) ++{ ++ switch (size) ++ { ++ case 64: return 'd'; ++ case 32: return 's'; ++ case 16: return 'h'; ++ case 8 : return 'b'; ++ default: gcc_unreachable (); ++ } ++} ++ ++static int ++aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, int inverse, ++ rtx *modconst, int *elementwidth, ++ unsigned char *elementchar, ++ int *mvn, int *shift) ++{ ++#define CHECK(STRIDE, ELSIZE, CLASS, TEST, SHIFT, NEG) \ ++ matches = 1; \ ++ for (i = 0; i < idx; i += (STRIDE)) \ ++ if (!(TEST)) \ ++ matches = 0; \ ++ if (matches) \ ++ { \ ++ immtype = (CLASS); \ ++ elsize = (ELSIZE); \ ++ elchar = sizetochar (elsize); \ ++ eshift = (SHIFT); \ ++ emvn = (NEG); \ ++ break; \ ++ } ++ ++ unsigned int i, elsize = 0, idx = 0, n_elts = CONST_VECTOR_NUNITS (op); ++ unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode)); ++ unsigned char bytes[16]; ++ unsigned char elchar = 0; ++ int immtype = -1, matches; ++ unsigned int invmask = inverse ? 0xff : 0; ++ int eshift, emvn; ++ ++ /* TODO: Vectors of float constants. */ ++ if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) ++ return -1; ++ ++ /* Splat vector constant out into a byte vector. */ ++ for (i = 0; i < n_elts; i++) ++ { ++ rtx el = CONST_VECTOR_ELT (op, i); ++ unsigned HOST_WIDE_INT elpart; ++ unsigned int part, parts; ++ ++ if (GET_CODE (el) == CONST_INT) ++ { ++ elpart = INTVAL (el); ++ parts = 1; ++ } ++ else if (GET_CODE (el) == CONST_DOUBLE) ++ { ++ elpart = CONST_DOUBLE_LOW (el); ++ parts = 2; ++ } ++ else ++ gcc_unreachable (); ++ ++ for (part = 0; part < parts; part++) ++ { ++ unsigned int byte; ++ for (byte = 0; byte < innersize; byte++) ++ { ++ bytes[idx++] = (elpart & 0xff) ^ invmask; ++ elpart >>= BITS_PER_UNIT; ++ } ++ if (GET_CODE (el) == CONST_DOUBLE) ++ elpart = CONST_DOUBLE_HIGH (el); ++ } ++ } ++ ++ /* Sanity check. */ ++ gcc_assert (idx == GET_MODE_SIZE (mode)); ++ ++ do ++ { ++ CHECK (4, 32, 0, bytes[i] == bytes[0] && bytes[i + 1] == 0 ++ && bytes[i + 2] == 0 && bytes[i + 3] == 0, 0, 0); ++ ++ CHECK (4, 32, 1, bytes[i] == 0 && bytes[i + 1] == bytes[1] ++ && bytes[i + 2] == 0 && bytes[i + 3] == 0, 8, 0); ++ ++ CHECK (4, 32, 2, bytes[i] == 0 && bytes[i + 1] == 0 ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0, 16, 0); ++ ++ CHECK (4, 32, 3, bytes[i] == 0 && bytes[i + 1] == 0 ++ && bytes[i + 2] == 0 && bytes[i + 3] == bytes[3], 24, 0); ++ ++ CHECK (2, 16, 4, bytes[i] == bytes[0] && bytes[i + 1] == 0, 0, 0); ++ ++ CHECK (2, 16, 5, bytes[i] == 0 && bytes[i + 1] == bytes[1], 8, 0); ++ ++ CHECK (4, 32, 6, bytes[i] == bytes[0] && bytes[i + 1] == 0xff ++ && bytes[i + 2] == 0xff && bytes[i + 3] == 0xff, 0, 1); ++ ++ CHECK (4, 32, 7, bytes[i] == 0xff && bytes[i + 1] == bytes[1] ++ && bytes[i + 2] == 0xff && bytes[i + 3] == 0xff, 8, 1); ++ ++ CHECK (4, 32, 8, bytes[i] == 0xff && bytes[i + 1] == 0xff ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0xff, 16, 1); ++ ++ CHECK (4, 32, 9, bytes[i] == 0xff && bytes[i + 1] == 0xff ++ && bytes[i + 2] == 0xff && bytes[i + 3] == bytes[3], 24, 1); ++ ++ CHECK (2, 16, 10, bytes[i] == bytes[0] && bytes[i + 1] == 0xff, 0, 1); ++ ++ CHECK (2, 16, 11, bytes[i] == 0xff && bytes[i + 1] == bytes[1], 8, 1); ++ ++ CHECK (4, 32, 12, bytes[i] == 0xff && bytes[i + 1] == bytes[1] ++ && bytes[i + 2] == 0 && bytes[i + 3] == 0, 0, 0); ++ ++ CHECK (4, 32, 13, bytes[i] == 0 && bytes[i + 1] == bytes[1] ++ && bytes[i + 2] == 0xff && bytes[i + 3] == 0xff, 0, 1); ++ ++ CHECK (4, 32, 14, bytes[i] == 0xff && bytes[i + 1] == 0xff ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0, 0, 0); ++ ++ CHECK (4, 32, 15, bytes[i] == 0 && bytes[i + 1] == 0 ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0xff, 0, 1); ++ ++ CHECK (1, 8, 16, bytes[i] == bytes[0], 0, 0); ++ ++ CHECK (1, 64, 17, (bytes[i] == 0 || bytes[i] == 0xff) ++ && bytes[i] == bytes[(i + 8) % idx], 0, 0); ++ } ++ while (0); ++ ++ /* TODO: Currently the assembler cannot handle types 12 to 15. ++ And there is no way to specify cmode through the compiler. ++ Disable them till there is support in the assembler. */ ++ if (immtype == -1 ++ || (immtype >= 12 && immtype <= 15) ++ || immtype == 18) ++ return -1; ++ ++ ++ if (elementwidth) ++ *elementwidth = elsize; ++ ++ if (elementchar) ++ *elementchar = elchar; ++ ++ if (mvn) ++ *mvn = emvn; ++ ++ if (shift) ++ *shift = eshift; ++ ++ if (modconst) ++ { ++ unsigned HOST_WIDE_INT imm = 0; ++ ++ /* Un-invert bytes of recognized vector, if necessary. */ ++ if (invmask != 0) ++ for (i = 0; i < idx; i++) ++ bytes[i] ^= invmask; ++ ++ if (immtype == 17) ++ { ++ /* FIXME: Broken on 32-bit H_W_I hosts. */ ++ gcc_assert (sizeof (HOST_WIDE_INT) == 8); ++ ++ for (i = 0; i < 8; i++) ++ imm |= (unsigned HOST_WIDE_INT) (bytes[i] ? 0xff : 0) ++ << (i * BITS_PER_UNIT); ++ ++ *modconst = GEN_INT (imm); ++ } ++ else ++ { ++ unsigned HOST_WIDE_INT imm = 0; ++ ++ for (i = 0; i < elsize / BITS_PER_UNIT; i++) ++ imm |= (unsigned HOST_WIDE_INT) bytes[i] << (i * BITS_PER_UNIT); ++ ++ /* Construct 'abcdefgh' because the assembler cannot handle ++ generic constants. */ ++ gcc_assert (shift != NULL && mvn != NULL); ++ if (*mvn) ++ imm = ~imm; ++ imm = (imm >> *shift) & 0xff; ++ *modconst = GEN_INT (imm); ++ } ++ } ++ ++ return immtype; ++#undef CHECK ++} ++ ++/* Return TRUE if rtx X is legal for use as either a AdvSIMD MOVI instruction ++ (or, implicitly, MVNI) immediate. Write back width per element ++ to *ELEMENTWIDTH (or zero for float elements), and a modified constant ++ (whatever should be output for a MOVI instruction) in *MODCONST. */ ++int ++aarch64_simd_immediate_valid_for_move (rtx op, enum machine_mode mode, ++ rtx *modconst, int *elementwidth, ++ unsigned char *elementchar, ++ int *mvn, int *shift) ++{ ++ rtx tmpconst; ++ int tmpwidth; ++ unsigned char tmpwidthc; ++ int tmpmvn = 0, tmpshift = 0; ++ int retval = aarch64_simd_valid_immediate (op, mode, 0, &tmpconst, ++ &tmpwidth, &tmpwidthc, ++ &tmpmvn, &tmpshift); ++ ++ if (retval == -1) ++ return 0; ++ ++ if (modconst) ++ *modconst = tmpconst; ++ ++ if (elementwidth) ++ *elementwidth = tmpwidth; ++ ++ if (elementchar) ++ *elementchar = tmpwidthc; ++ ++ if (mvn) ++ *mvn = tmpmvn; ++ ++ if (shift) ++ *shift = tmpshift; ++ ++ return 1; ++} ++ ++static bool ++aarch64_const_vec_all_same_int_p (rtx x, ++ HOST_WIDE_INT minval, ++ HOST_WIDE_INT maxval) ++{ ++ HOST_WIDE_INT firstval; ++ int count, i; ++ ++ if (GET_CODE (x) != CONST_VECTOR ++ || GET_MODE_CLASS (GET_MODE (x)) != MODE_VECTOR_INT) ++ return false; ++ ++ firstval = INTVAL (CONST_VECTOR_ELT (x, 0)); ++ if (firstval < minval || firstval > maxval) ++ return false; ++ ++ count = CONST_VECTOR_NUNITS (x); ++ for (i = 1; i < count; i++) ++ if (INTVAL (CONST_VECTOR_ELT (x, i)) != firstval) ++ return false; ++ ++ return true; ++} ++ ++/* Check of immediate shift constants are within range. */ ++bool ++aarch64_simd_shift_imm_p (rtx x, enum machine_mode mode, bool left) ++{ ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ if (left) ++ return aarch64_const_vec_all_same_int_p (x, 0, bit_width - 1); ++ else ++ return aarch64_const_vec_all_same_int_p (x, 1, bit_width); ++} ++ ++bool ++aarch64_simd_imm_zero_p (rtx x, enum machine_mode mode) ++{ ++ int nunits; ++ int i; ++ ++ if (GET_CODE (x) != CONST_VECTOR) ++ return false; ++ ++ nunits = GET_MODE_NUNITS (mode); ++ ++ for (i = 0; i < nunits; i++) ++ if (INTVAL (CONST_VECTOR_ELT (x, i)) != 0) ++ return false; ++ ++ return true; ++} ++ ++bool ++aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED) ++{ ++ HOST_WIDE_INT imm = INTVAL (x); ++ int i; ++ ++ for (i = 0; i < 8; i++) ++ { ++ unsigned int byte = imm & 0xff; ++ if (byte != 0xff && byte != 0) ++ return false; ++ imm >>= 8; ++ } ++ ++ return true; ++} ++ ++/* Return a const_int vector of VAL. */ ++rtx ++aarch64_simd_gen_const_vector_dup (enum machine_mode mode, int val) ++{ ++ int nunits = GET_MODE_NUNITS (mode); ++ rtvec v = rtvec_alloc (nunits); ++ int i; ++ ++ for (i=0; i < nunits; i++) ++ RTVEC_ELT (v, i) = GEN_INT (val); ++ ++ return gen_rtx_CONST_VECTOR (mode, v); ++} ++ ++/* Construct and return a PARALLEL RTX vector. */ ++rtx ++aarch64_simd_vect_par_cnst_half (enum machine_mode mode, bool high) ++{ ++ int nunits = GET_MODE_NUNITS (mode); ++ rtvec v = rtvec_alloc (nunits / 2); ++ int base = high ? nunits / 2 : 0; ++ rtx t1; ++ int i; ++ ++ for (i=0; i < nunits / 2; i++) ++ RTVEC_ELT (v, i) = GEN_INT (base + i); ++ ++ t1 = gen_rtx_PARALLEL (mode, v); ++ return t1; ++} ++ ++/* Bounds-check lanes. Ensure OPERAND lies between LOW (inclusive) and ++ HIGH (exclusive). */ ++void ++aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high) ++{ ++ HOST_WIDE_INT lane; ++ gcc_assert (GET_CODE (operand) == CONST_INT); ++ lane = INTVAL (operand); ++ ++ if (lane < low || lane >= high) ++ error ("lane out of range"); ++} ++ ++void ++aarch64_simd_const_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high) ++{ ++ gcc_assert (GET_CODE (operand) == CONST_INT); ++ HOST_WIDE_INT lane = INTVAL (operand); ++ ++ if (lane < low || lane >= high) ++ error ("constant out of range"); ++} ++ ++/* Emit code to reinterpret one AdvSIMD type as another, ++ without altering bits. */ ++void ++aarch64_simd_reinterpret (rtx dest, rtx src) ++{ ++ emit_move_insn (dest, gen_lowpart (GET_MODE (dest), src)); ++} ++ ++/* Emit code to place a AdvSIMD pair result in memory locations (with equal ++ registers). */ ++void ++aarch64_simd_emit_pair_result_insn (enum machine_mode mode, ++ rtx (*intfn) (rtx, rtx, rtx), rtx destaddr, ++ rtx op1) ++{ ++ rtx mem = gen_rtx_MEM (mode, destaddr); ++ rtx tmp1 = gen_reg_rtx (mode); ++ rtx tmp2 = gen_reg_rtx (mode); ++ ++ emit_insn (intfn (tmp1, op1, tmp2)); ++ ++ emit_move_insn (mem, tmp1); ++ mem = adjust_address (mem, mode, GET_MODE_SIZE (mode)); ++ emit_move_insn (mem, tmp2); ++} ++ ++/* Return TRUE if OP is a valid vector addressing mode. */ ++bool ++aarch64_simd_mem_operand_p (rtx op) ++{ ++ return MEM_P (op) && (GET_CODE (XEXP (op, 0)) == POST_INC ++ || GET_CODE (XEXP (op, 0)) == REG); ++} ++ ++/* Set up OPERANDS for a register copy from SRC to DEST, taking care ++ not to early-clobber SRC registers in the process. ++ ++ We assume that the operands described by SRC and DEST represent a ++ decomposed copy of OPERANDS[1] into OPERANDS[0]. COUNT is the ++ number of components into which the copy has been decomposed. */ ++void ++aarch64_simd_disambiguate_copy (rtx *operands, rtx *dest, ++ rtx *src, unsigned int count) ++{ ++ unsigned int i; ++ ++ if (!reg_overlap_mentioned_p (operands[0], operands[1]) ++ || REGNO (operands[0]) < REGNO (operands[1])) ++ { ++ for (i = 0; i < count; i++) ++ { ++ operands[2 * i] = dest[i]; ++ operands[2 * i + 1] = src[i]; ++ } ++ } ++ else ++ { ++ for (i = 0; i < count; i++) ++ { ++ operands[2 * i] = dest[count - i - 1]; ++ operands[2 * i + 1] = src[count - i - 1]; ++ } ++ } ++} ++ ++/* Compute and return the length of aarch64_simd_mov, where is ++ one of VSTRUCT modes: OI, CI or XI. */ ++int ++aarch64_simd_attr_length_move (rtx insn) ++{ ++ rtx reg, mem, addr; ++ int load; ++ enum machine_mode mode; ++ ++ extract_insn_cached (insn); ++ ++ if (REG_P (recog_data.operand[0]) && REG_P (recog_data.operand[1])) ++ { ++ mode = GET_MODE (recog_data.operand[0]); ++ switch (mode) ++ { ++ case OImode: ++ return 8; ++ case CImode: ++ return 12; ++ case XImode: ++ return 16; ++ default: ++ gcc_unreachable (); ++ } ++ } ++ return 4; ++} ++ ++static unsigned HOST_WIDE_INT ++aarch64_shift_truncation_mask (enum machine_mode mode) ++{ ++ return ++ (aarch64_vector_mode_supported_p (mode) ++ || aarch64_vect_struct_mode_p (mode)) ? 0 : (GET_MODE_BITSIZE (mode) - 1); ++} ++ ++#ifndef TLS_SECTION_ASM_FLAG ++#define TLS_SECTION_ASM_FLAG 'T' ++#endif ++ ++void ++aarch64_elf_asm_named_section (const char *name, unsigned int flags, ++ tree decl ATTRIBUTE_UNUSED) ++{ ++ char flagchars[10], *f = flagchars; ++ ++ /* If we have already declared this section, we can use an ++ abbreviated form to switch back to it -- unless this section is ++ part of a COMDAT groups, in which case GAS requires the full ++ declaration every time. */ ++ if (!(HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE)) ++ && (flags & SECTION_DECLARED)) ++ { ++ fprintf (asm_out_file, "\t.section\t%s\n", name); ++ return; ++ } ++ ++ if (!(flags & SECTION_DEBUG)) ++ *f++ = 'a'; ++ if (flags & SECTION_WRITE) ++ *f++ = 'w'; ++ if (flags & SECTION_CODE) ++ *f++ = 'x'; ++ if (flags & SECTION_SMALL) ++ *f++ = 's'; ++ if (flags & SECTION_MERGE) ++ *f++ = 'M'; ++ if (flags & SECTION_STRINGS) ++ *f++ = 'S'; ++ if (flags & SECTION_TLS) ++ *f++ = TLS_SECTION_ASM_FLAG; ++ if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE)) ++ *f++ = 'G'; ++ *f = '\0'; ++ ++ fprintf (asm_out_file, "\t.section\t%s,\"%s\"", name, flagchars); ++ ++ if (!(flags & SECTION_NOTYPE)) ++ { ++ const char *type; ++ const char *format; ++ ++ if (flags & SECTION_BSS) ++ type = "nobits"; ++ else ++ type = "progbits"; ++ ++#ifdef TYPE_OPERAND_FMT ++ format = "," TYPE_OPERAND_FMT; ++#else ++ format = ",@%s"; ++#endif ++ ++ fprintf (asm_out_file, format, type); ++ ++ if (flags & SECTION_ENTSIZE) ++ fprintf (asm_out_file, ",%d", flags & SECTION_ENTSIZE); ++ if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE)) ++ { ++ if (TREE_CODE (decl) == IDENTIFIER_NODE) ++ fprintf (asm_out_file, ",%s,comdat", IDENTIFIER_POINTER (decl)); ++ else ++ fprintf (asm_out_file, ",%s,comdat", ++ IDENTIFIER_POINTER (DECL_COMDAT_GROUP (decl))); ++ } ++ } ++ ++ putc ('\n', asm_out_file); ++} ++ ++/* Select a format to encode pointers in exception handling data. */ ++int ++aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global) ++{ ++ int type; ++ switch (aarch64_cmodel) ++ { ++ case AARCH64_CMODEL_TINY: ++ case AARCH64_CMODEL_TINY_PIC: ++ case AARCH64_CMODEL_SMALL: ++ case AARCH64_CMODEL_SMALL_PIC: ++ /* text+got+data < 4Gb. 4-byte signed relocs are sufficient ++ for everything. */ ++ type = DW_EH_PE_sdata4; ++ break; ++ default: ++ /* No assumptions here. 8-byte relocs required. */ ++ type = DW_EH_PE_sdata8; ++ break; ++ } ++ return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type; ++} ++ ++static void ++aarch64_start_file (void) ++{ ++ if (selected_arch) ++ asm_fprintf (asm_out_file, "\t.arch %s\n", selected_arch->name); ++ else if (selected_cpu) ++ asm_fprintf (asm_out_file, "\t.cpu %s\n", selected_cpu->name); ++ default_file_start(); ++} ++ ++/* Target hook for c_mode_for_suffix. */ ++static enum machine_mode ++aarch64_c_mode_for_suffix (char suffix) ++{ ++ if (suffix == 'q') ++ return TFmode; ++ ++ return VOIDmode; ++} ++ ++#undef TARGET_ADDRESS_COST ++#define TARGET_ADDRESS_COST aarch64_address_cost ++ ++/* This hook will determines whether unnamed bitfields affect the alignment ++ of the containing structure. The hook returns true if the structure ++ should inherit the alignment requirements of an unnamed bitfield's ++ type. */ ++#undef TARGET_ALIGN_ANON_BITFIELD ++#define TARGET_ALIGN_ANON_BITFIELD hook_bool_void_true ++ ++#undef TARGET_ASM_ALIGNED_DI_OP ++#define TARGET_ASM_ALIGNED_DI_OP "\t.xword\t" ++ ++#undef TARGET_ASM_ALIGNED_HI_OP ++#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t" ++ ++#undef TARGET_ASM_ALIGNED_SI_OP ++#define TARGET_ASM_ALIGNED_SI_OP "\t.word\t" ++ ++#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK ++#define TARGET_ASM_CAN_OUTPUT_MI_THUNK \ ++ hook_bool_const_tree_hwi_hwi_const_tree_true ++ ++#undef TARGET_ASM_FILE_START ++#define TARGET_ASM_FILE_START aarch64_start_file ++ ++#undef TARGET_ASM_OUTPUT_MI_THUNK ++#define TARGET_ASM_OUTPUT_MI_THUNK aarch64_output_mi_thunk ++ ++#undef TARGET_ASM_SELECT_RTX_SECTION ++#define TARGET_ASM_SELECT_RTX_SECTION aarch64_select_rtx_section ++ ++#undef TARGET_ASM_TRAMPOLINE_TEMPLATE ++#define TARGET_ASM_TRAMPOLINE_TEMPLATE aarch64_asm_trampoline_template ++ ++#undef TARGET_BUILD_BUILTIN_VA_LIST ++#define TARGET_BUILD_BUILTIN_VA_LIST aarch64_build_builtin_va_list ++ ++#undef TARGET_CALLEE_COPIES ++#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false ++ ++#undef TARGET_CAN_ELIMINATE ++#define TARGET_CAN_ELIMINATE aarch64_can_eliminate ++ ++#undef TARGET_CANNOT_FORCE_CONST_MEM ++#define TARGET_CANNOT_FORCE_CONST_MEM aarch64_cannot_force_const_mem ++ ++#undef TARGET_CONDITIONAL_REGISTER_USAGE ++#define TARGET_CONDITIONAL_REGISTER_USAGE aarch64_conditional_register_usage ++ ++/* Only the least significant bit is used for initialization guard ++ variables. */ ++#undef TARGET_CXX_GUARD_MASK_BIT ++#define TARGET_CXX_GUARD_MASK_BIT hook_bool_void_true ++ ++#undef TARGET_C_MODE_FOR_SUFFIX ++#define TARGET_C_MODE_FOR_SUFFIX aarch64_c_mode_for_suffix ++ ++#ifdef TARGET_BIG_ENDIAN_DEFAULT ++#undef TARGET_DEFAULT_TARGET_FLAGS ++#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_END) ++#endif ++ ++#undef TARGET_CLASS_MAX_NREGS ++#define TARGET_CLASS_MAX_NREGS aarch64_class_max_nregs ++ ++#undef TARGET_EXPAND_BUILTIN ++#define TARGET_EXPAND_BUILTIN aarch64_expand_builtin ++ ++#undef TARGET_EXPAND_BUILTIN_VA_START ++#define TARGET_EXPAND_BUILTIN_VA_START aarch64_expand_builtin_va_start ++ ++#undef TARGET_FUNCTION_ARG ++#define TARGET_FUNCTION_ARG aarch64_function_arg ++ ++#undef TARGET_FUNCTION_ARG_ADVANCE ++#define TARGET_FUNCTION_ARG_ADVANCE aarch64_function_arg_advance ++ ++#undef TARGET_FUNCTION_ARG_BOUNDARY ++#define TARGET_FUNCTION_ARG_BOUNDARY aarch64_function_arg_boundary ++ ++#undef TARGET_FUNCTION_OK_FOR_SIBCALL ++#define TARGET_FUNCTION_OK_FOR_SIBCALL aarch64_function_ok_for_sibcall ++ ++#undef TARGET_FUNCTION_VALUE ++#define TARGET_FUNCTION_VALUE aarch64_function_value ++ ++#undef TARGET_FUNCTION_VALUE_REGNO_P ++#define TARGET_FUNCTION_VALUE_REGNO_P aarch64_function_value_regno_p ++ ++#undef TARGET_FRAME_POINTER_REQUIRED ++#define TARGET_FRAME_POINTER_REQUIRED aarch64_frame_pointer_required ++ ++#undef TARGET_GIMPLIFY_VA_ARG_EXPR ++#define TARGET_GIMPLIFY_VA_ARG_EXPR aarch64_gimplify_va_arg_expr ++ ++#undef TARGET_INIT_BUILTINS ++#define TARGET_INIT_BUILTINS aarch64_init_builtins ++ ++#undef TARGET_LEGITIMATE_ADDRESS_P ++#define TARGET_LEGITIMATE_ADDRESS_P aarch64_legitimate_address_hook_p ++ ++#undef TARGET_LEGITIMATE_CONSTANT_P ++#define TARGET_LEGITIMATE_CONSTANT_P aarch64_legitimate_constant_p ++ ++#undef TARGET_LIBGCC_CMP_RETURN_MODE ++#define TARGET_LIBGCC_CMP_RETURN_MODE aarch64_libgcc_cmp_return_mode ++ ++#undef TARGET_MEMORY_MOVE_COST ++#define TARGET_MEMORY_MOVE_COST aarch64_memory_move_cost ++ ++#undef TARGET_MUST_PASS_IN_STACK ++#define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size ++ ++/* This target hook should return true if accesses to volatile bitfields ++ should use the narrowest mode possible. It should return false if these ++ accesses should use the bitfield container type. */ ++#undef TARGET_NARROW_VOLATILE_BITFIELD ++#define TARGET_NARROW_VOLATILE_BITFIELD hook_bool_void_false ++ ++#undef TARGET_OPTION_OVERRIDE ++#define TARGET_OPTION_OVERRIDE aarch64_override_options ++ ++#undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE ++#define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE \ ++ aarch64_override_options_after_change ++ ++#undef TARGET_PASS_BY_REFERENCE ++#define TARGET_PASS_BY_REFERENCE aarch64_pass_by_reference ++ ++#undef TARGET_PREFERRED_RELOAD_CLASS ++#define TARGET_PREFERRED_RELOAD_CLASS aarch64_preferred_reload_class ++ ++#undef TARGET_SECONDARY_RELOAD ++#define TARGET_SECONDARY_RELOAD aarch64_secondary_reload ++ ++#undef TARGET_SHIFT_TRUNCATION_MASK ++#define TARGET_SHIFT_TRUNCATION_MASK aarch64_shift_truncation_mask ++ ++#undef TARGET_SETUP_INCOMING_VARARGS ++#define TARGET_SETUP_INCOMING_VARARGS aarch64_setup_incoming_varargs ++ ++#undef TARGET_STRUCT_VALUE_RTX ++#define TARGET_STRUCT_VALUE_RTX aarch64_struct_value_rtx ++ ++#undef TARGET_REGISTER_MOVE_COST ++#define TARGET_REGISTER_MOVE_COST aarch64_register_move_cost ++ ++#undef TARGET_RETURN_IN_MEMORY ++#define TARGET_RETURN_IN_MEMORY aarch64_return_in_memory ++ ++#undef TARGET_RETURN_IN_MSB ++#define TARGET_RETURN_IN_MSB aarch64_return_in_msb ++ ++#undef TARGET_RTX_COSTS ++#define TARGET_RTX_COSTS aarch64_rtx_costs ++ ++#undef TARGET_TRAMPOLINE_INIT ++#define TARGET_TRAMPOLINE_INIT aarch64_trampoline_init ++ ++#undef TARGET_USE_BLOCKS_FOR_CONSTANT_P ++#define TARGET_USE_BLOCKS_FOR_CONSTANT_P aarch64_use_blocks_for_constant_p ++ ++#undef TARGET_VECTOR_MODE_SUPPORTED_P ++#define TARGET_VECTOR_MODE_SUPPORTED_P aarch64_vector_mode_supported_p ++ ++#undef TARGET_ARRAY_MODE_SUPPORTED_P ++#define TARGET_ARRAY_MODE_SUPPORTED_P aarch64_array_mode_supported_p ++ ++#undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE ++#define TARGET_VECTORIZE_PREFERRED_SIMD_MODE aarch64_preferred_simd_mode ++ ++struct gcc_target targetm = TARGET_INITIALIZER; ++ ++#include "gt-aarch64.h" + +Property changes on: gcc/config/aarch64/aarch64.c +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/aarch64-elf-raw.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-elf-raw.h (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-elf-raw.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,32 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* Support for bare-metal builds. */ ++#ifndef GCC_AARCH64_ELF_RAW_H ++#define GCC_AARCH64_ELF_RAW_H ++ ++#define STARTFILE_SPEC " crti%O%s crtbegin%O%s crt0%O%s" ++#define ENDFILE_SPEC " crtend%O%s crtn%O%s" ++ ++#ifndef LINK_SPEC ++#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X" ++#endif ++ ++#endif /* GCC_AARCH64_ELF_RAW_H */ + +Property changes on: gcc/config/aarch64/aarch64-elf-raw.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/aarch64-linux.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-linux.h (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64-linux.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,44 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#ifndef GCC_AARCH64_LINUX_H ++#define GCC_AARCH64_LINUX_H ++ ++#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64.so.1" ++ ++#define LINUX_TARGET_LINK_SPEC "%{h*} \ ++ %{static:-Bstatic} \ ++ %{shared:-shared} \ ++ %{symbolic:-Bsymbolic} \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ ++ -X \ ++ %{mbig-endian:-EB} %{mlittle-endian:-EL}" ++ ++#define LINK_SPEC LINUX_TARGET_LINK_SPEC ++ ++#define TARGET_OS_CPP_BUILTINS() \ ++ do \ ++ { \ ++ GNU_USER_TARGET_OS_CPP_BUILTINS(); \ ++ } \ ++ while (0) ++ ++#endif /* GCC_AARCH64_LINUX_H */ + +Property changes on: gcc/config/aarch64/aarch64-linux.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/iterators.md +=================================================================== +--- a/src/gcc/config/aarch64/iterators.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/iterators.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,716 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; ------------------------------------------------------------------- ++;; Mode Iterators ++;; ------------------------------------------------------------------- ++ ++ ++;; Iterator for General Purpose Integer registers (32- and 64-bit modes) ++(define_mode_iterator GPI [SI DI]) ++ ++;; Iterator for QI and HI modes ++(define_mode_iterator SHORT [QI HI]) ++ ++;; Iterator for all integer modes (up to 64-bit) ++(define_mode_iterator ALLI [QI HI SI DI]) ++ ++;; Iterator scalar modes (up to 64-bit) ++(define_mode_iterator SDQ_I [QI HI SI DI]) ++ ++;; Iterator for all integer modes that can be extended (up to 64-bit) ++(define_mode_iterator ALLX [QI HI SI]) ++ ++;; Iterator for General Purpose Floating-point registers (32- and 64-bit modes) ++(define_mode_iterator GPF [SF DF]) ++ ++;; Integer vector modes. ++(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V2DI]) ++ ++;; Integer vector modes. ++(define_mode_iterator VDQ_I [V8QI V16QI V4HI V8HI V2SI V4SI V2DI]) ++ ++;; vector and scalar, 64 & 128-bit container, all integer modes ++(define_mode_iterator VSDQ_I [V8QI V16QI V4HI V8HI V2SI V4SI V2DI QI HI SI DI]) ++ ++;; vector and scalar, 64 & 128-bit container: all vector integer modes; ++;; 64-bit scalar integer mode ++(define_mode_iterator VSDQ_I_DI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI DI]) ++ ++;; Double vector modes. ++(define_mode_iterator VD [V8QI V4HI V2SI V2SF]) ++ ++;; vector, 64-bit container, all integer modes ++(define_mode_iterator VD_BHSI [V8QI V4HI V2SI]) ++ ++;; 128 and 64-bit container; 8, 16, 32-bit vector integer modes ++(define_mode_iterator VDQ_BHSI [V8QI V16QI V4HI V8HI V2SI V4SI]) ++ ++;; Quad vector modes. ++(define_mode_iterator VQ [V16QI V8HI V4SI V2DI V4SF V2DF]) ++ ++;; All vector modes, except double. ++(define_mode_iterator VQ_S [V8QI V16QI V4HI V8HI V2SI V4SI]) ++ ++;; Vector and scalar, 64 & 128-bit container: all vector integer mode; ++;; 8, 16, 32-bit scalar integer modes ++(define_mode_iterator VSDQ_I_BHSI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI QI HI SI]) ++ ++;; Vector modes for moves. ++(define_mode_iterator VDQM [V8QI V16QI V4HI V8HI V2SI V4SI]) ++ ++;; This mode iterator allows :PTR to be used for patterns that operate on ++;; pointer-sized quantities. Exactly one of the two alternatives will match. ++(define_mode_iterator PTR [(SI "Pmode == SImode") (DI "Pmode == DImode")]) ++ ++;; Vector Float modes. ++(define_mode_iterator VDQF [V2SF V4SF V2DF]) ++ ++;; Vector Float modes with 2 elements. ++(define_mode_iterator V2F [V2SF V2DF]) ++ ++;; All modes. ++(define_mode_iterator VALL [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF V2DF]) ++ ++;; Vector modes for Integer reduction across lanes. ++(define_mode_iterator VDQV [V8QI V16QI V4HI V8HI V4SI]) ++ ++;; All double integer narrow-able modes. ++(define_mode_iterator VDN [V4HI V2SI DI]) ++ ++;; All quad integer narrow-able modes. ++(define_mode_iterator VQN [V8HI V4SI V2DI]) ++ ++;; All double integer widen-able modes. ++(define_mode_iterator VDW [V8QI V4HI V2SI]) ++ ++;; Vector and scalar 128-bit container: narrowable 16, 32, 64-bit integer modes ++(define_mode_iterator VSQN_HSDI [V8HI V4SI V2DI HI SI DI]) ++ ++;; All quad integer widen-able modes. ++(define_mode_iterator VQW [V16QI V8HI V4SI]) ++ ++;; Double vector modes for combines. ++(define_mode_iterator VDC [V8QI V4HI V2SI V2SF DI DF]) ++ ++;; Double vector modes for combines. ++(define_mode_iterator VDIC [V8QI V4HI V2SI]) ++ ++;; Double vector modes. ++(define_mode_iterator VD_RE [V8QI V4HI V2SI DI DF V2SF]) ++ ++;; Vector modes except double int. ++(define_mode_iterator VDQIF [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DF]) ++ ++;; Vector modes for H and S types. ++(define_mode_iterator VDQHS [V4HI V8HI V2SI V4SI]) ++ ++;; Vector and scalar integer modes for H and S ++(define_mode_iterator VSDQ_HSI [V4HI V8HI V2SI V4SI HI SI]) ++ ++;; Vector and scalar 64-bit container: 16, 32-bit integer modes ++(define_mode_iterator VSD_HSI [V4HI V2SI HI SI]) ++ ++;; Vector 64-bit container: 16, 32-bit integer modes ++(define_mode_iterator VD_HSI [V4HI V2SI]) ++ ++;; Scalar 64-bit container: 16, 32-bit integer modes ++(define_mode_iterator SD_HSI [HI SI]) ++ ++;; Vector 64-bit container: 16, 32-bit integer modes ++(define_mode_iterator VQ_HSI [V8HI V4SI]) ++ ++;; All byte modes. ++(define_mode_iterator VB [V8QI V16QI]) ++ ++(define_mode_iterator TX [TI TF]) ++ ++;; Opaque structure modes. ++(define_mode_iterator VSTRUCT [OI CI XI]) ++ ++;; Double scalar modes ++(define_mode_iterator DX [DI DF]) ++ ++;; ------------------------------------------------------------------ ++;; Unspec enumerations for Advance SIMD. These could well go into ++;; aarch64.md but for their use in int_iterators here. ++;; ------------------------------------------------------------------ ++ ++(define_c_enum "unspec" ++ [ ++ UNSPEC_ASHIFT_SIGNED ; Used in aarch-simd.md. ++ UNSPEC_ASHIFT_UNSIGNED ; Used in aarch64-simd.md. ++ UNSPEC_FMAXV ; Used in aarch64-simd.md. ++ UNSPEC_FMINV ; Used in aarch64-simd.md. ++ UNSPEC_FADDV ; Used in aarch64-simd.md. ++ UNSPEC_ADDV ; Used in aarch64-simd.md. ++ UNSPEC_SMAXV ; Used in aarch64-simd.md. ++ UNSPEC_SMINV ; Used in aarch64-simd.md. ++ UNSPEC_UMAXV ; Used in aarch64-simd.md. ++ UNSPEC_UMINV ; Used in aarch64-simd.md. ++ UNSPEC_SHADD ; Used in aarch64-simd.md. ++ UNSPEC_UHADD ; Used in aarch64-simd.md. ++ UNSPEC_SRHADD ; Used in aarch64-simd.md. ++ UNSPEC_URHADD ; Used in aarch64-simd.md. ++ UNSPEC_SHSUB ; Used in aarch64-simd.md. ++ UNSPEC_UHSUB ; Used in aarch64-simd.md. ++ UNSPEC_SRHSUB ; Used in aarch64-simd.md. ++ UNSPEC_URHSUB ; Used in aarch64-simd.md. ++ UNSPEC_ADDHN ; Used in aarch64-simd.md. ++ UNSPEC_RADDHN ; Used in aarch64-simd.md. ++ UNSPEC_SUBHN ; Used in aarch64-simd.md. ++ UNSPEC_RSUBHN ; Used in aarch64-simd.md. ++ UNSPEC_ADDHN2 ; Used in aarch64-simd.md. ++ UNSPEC_RADDHN2 ; Used in aarch64-simd.md. ++ UNSPEC_SUBHN2 ; Used in aarch64-simd.md. ++ UNSPEC_RSUBHN2 ; Used in aarch64-simd.md. ++ UNSPEC_SQDMULH ; Used in aarch64-simd.md. ++ UNSPEC_SQRDMULH ; Used in aarch64-simd.md. ++ UNSPEC_PMUL ; Used in aarch64-simd.md. ++ UNSPEC_USQADD ; Used in aarch64-simd.md. ++ UNSPEC_SUQADD ; Used in aarch64-simd.md. ++ UNSPEC_SQXTUN ; Used in aarch64-simd.md. ++ UNSPEC_SQXTN ; Used in aarch64-simd.md. ++ UNSPEC_UQXTN ; Used in aarch64-simd.md. ++ UNSPEC_SSRA ; Used in aarch64-simd.md. ++ UNSPEC_USRA ; Used in aarch64-simd.md. ++ UNSPEC_SRSRA ; Used in aarch64-simd.md. ++ UNSPEC_URSRA ; Used in aarch64-simd.md. ++ UNSPEC_SRSHR ; Used in aarch64-simd.md. ++ UNSPEC_URSHR ; Used in aarch64-simd.md. ++ UNSPEC_SQSHLU ; Used in aarch64-simd.md. ++ UNSPEC_SQSHL ; Used in aarch64-simd.md. ++ UNSPEC_UQSHL ; Used in aarch64-simd.md. ++ UNSPEC_SQSHRUN ; Used in aarch64-simd.md. ++ UNSPEC_SQRSHRUN ; Used in aarch64-simd.md. ++ UNSPEC_SQSHRN ; Used in aarch64-simd.md. ++ UNSPEC_UQSHRN ; Used in aarch64-simd.md. ++ UNSPEC_SQRSHRN ; Used in aarch64-simd.md. ++ UNSPEC_UQRSHRN ; Used in aarch64-simd.md. ++ UNSPEC_SSHL ; Used in aarch64-simd.md. ++ UNSPEC_USHL ; Used in aarch64-simd.md. ++ UNSPEC_SRSHL ; Used in aarch64-simd.md. ++ UNSPEC_URSHL ; Used in aarch64-simd.md. ++ UNSPEC_SQRSHL ; Used in aarch64-simd.md. ++ UNSPEC_UQRSHL ; Used in aarch64-simd.md. ++ UNSPEC_CMEQ ; Used in aarch64-simd.md. ++ UNSPEC_CMLE ; Used in aarch64-simd.md. ++ UNSPEC_CMLT ; Used in aarch64-simd.md. ++ UNSPEC_CMGE ; Used in aarch64-simd.md. ++ UNSPEC_CMGT ; Used in aarch64-simd.md. ++ UNSPEC_CMHS ; Used in aarch64-simd.md. ++ UNSPEC_CMHI ; Used in aarch64-simd.md. ++ UNSPEC_SSLI ; Used in aarch64-simd.md. ++ UNSPEC_USLI ; Used in aarch64-simd.md. ++ UNSPEC_SSRI ; Used in aarch64-simd.md. ++ UNSPEC_USRI ; Used in aarch64-simd.md. ++ UNSPEC_SSHLL ; Used in aarch64-simd.md. ++ UNSPEC_USHLL ; Used in aarch64-simd.md. ++ UNSPEC_ADDP ; Used in aarch64-simd.md. ++ UNSPEC_CMTST ; Used in aarch64-simd.md. ++ UNSPEC_FMAX ; Used in aarch64-simd.md. ++ UNSPEC_FMIN ; Used in aarch64-simd.md. ++]) ++ ++;; ------------------------------------------------------------------- ++;; Mode attributes ++;; ------------------------------------------------------------------- ++ ++;; In GPI templates, a string like "%0" will expand to "%w0" in the ++;; 32-bit version and "%x0" in the 64-bit version. ++(define_mode_attr w [(QI "w") (HI "w") (SI "w") (DI "x") (SF "s") (DF "d")]) ++ ++;; For scalar usage of vector/FP registers ++(define_mode_attr v [(QI "b") (HI "h") (SI "s") (DI "d") ++ (V8QI "") (V16QI "") ++ (V4HI "") (V8HI "") ++ (V2SI "") (V4SI "") ++ (V2DI "") (V2SF "") ++ (V4SF "") (V2DF "")]) ++ ++;; For scalar usage of vector/FP registers, narrowing ++(define_mode_attr vn2 [(QI "") (HI "b") (SI "h") (DI "s") ++ (V8QI "") (V16QI "") ++ (V4HI "") (V8HI "") ++ (V2SI "") (V4SI "") ++ (V2DI "") (V2SF "") ++ (V4SF "") (V2DF "")]) ++ ++;; For scalar usage of vector/FP registers, widening ++(define_mode_attr vw2 [(DI "") (QI "h") (HI "s") (SI "d") ++ (V8QI "") (V16QI "") ++ (V4HI "") (V8HI "") ++ (V2SI "") (V4SI "") ++ (V2DI "") (V2SF "") ++ (V4SF "") (V2DF "")]) ++ ++;; Map a floating point mode to the appropriate register name prefix ++(define_mode_attr s [(SF "s") (DF "d")]) ++ ++;; Give the length suffix letter for a sign- or zero-extension. ++(define_mode_attr size [(QI "b") (HI "h") (SI "w")]) ++ ++;; Give the number of bits in the mode ++(define_mode_attr sizen [(QI "8") (HI "16") (SI "32") (DI "64")]) ++ ++;; Give the ordinal of the MSB in the mode ++(define_mode_attr sizem1 [(QI "#7") (HI "#15") (SI "#31") (DI "#63")]) ++ ++;; Attribute to describe constants acceptable in logical operations ++(define_mode_attr lconst [(SI "K") (DI "L")]) ++ ++;; Map a mode to a specific constraint character. ++(define_mode_attr cmode [(QI "q") (HI "h") (SI "s") (DI "d")]) ++ ++(define_mode_attr Vtype [(V8QI "8b") (V16QI "16b") ++ (V4HI "4h") (V8HI "8h") ++ (V2SI "2s") (V4SI "4s") ++ (DI "1d") (DF "1d") ++ (V2DI "2d") (V2SF "2s") ++ (V4SF "4s") (V2DF "2d")]) ++ ++(define_mode_attr Vmtype [(V8QI ".8b") (V16QI ".16b") ++ (V4HI ".4h") (V8HI ".8h") ++ (V2SI ".2s") (V4SI ".4s") ++ (V2DI ".2d") (V2SF ".2s") ++ (V4SF ".4s") (V2DF ".2d") ++ (DI "") (SI "") ++ (HI "") (QI "") ++ (TI "")]) ++ ++;; Register suffix narrowed modes for VQN. ++(define_mode_attr Vmntype [(V8HI ".8b") (V4SI ".4h") ++ (V2DI ".2s") ++ (DI "") (SI "") ++ (HI "")]) ++ ++;; Mode-to-individual element type mapping. ++(define_mode_attr Vetype [(V8QI "b") (V16QI "b") ++ (V4HI "h") (V8HI "h") ++ (V2SI "s") (V4SI "s") ++ (V2DI "d") (V2SF "s") ++ (V4SF "s") (V2DF "d") ++ (QI "b") (HI "h") ++ (SI "s") (DI "d")]) ++ ++;; Mode-to-bitwise operation type mapping. ++(define_mode_attr Vbtype [(V8QI "8b") (V16QI "16b") ++ (V4HI "8b") (V8HI "16b") ++ (V2SI "8b") (V4SI "16b") ++ (V2DI "16b") (V2SF "8b") ++ (V4SF "16b") (V2DF "16b")]) ++ ++;; Define element mode for each vector mode. ++(define_mode_attr VEL [(V8QI "QI") (V16QI "QI") ++ (V4HI "HI") (V8HI "HI") ++ (V2SI "SI") (V4SI "SI") ++ (DI "DI") (V2DI "DI") ++ (V2SF "SF") (V4SF "SF") ++ (V2DF "DF") ++ (SI "SI") (HI "HI") ++ (QI "QI")]) ++ ++;; Define container mode for lane selection. ++(define_mode_attr VCON [(V8QI "V16QI") (V16QI "V16QI") ++ (V4HI "V8HI") (V8HI "V8HI") ++ (V2SI "V4SI") (V4SI "V4SI") ++ (DI "V2DI") (V2DI "V2DI") ++ (V2SF "V2SF") (V4SF "V4SF") ++ (V2DF "V2DF") (SI "V4SI") ++ (HI "V8HI") (QI "V16QI")]) ++ ++;; Half modes of all vector modes. ++(define_mode_attr VHALF [(V8QI "V4QI") (V16QI "V8QI") ++ (V4HI "V2HI") (V8HI "V4HI") ++ (V2SI "SI") (V4SI "V2SI") ++ (V2DI "DI") (V2SF "SF") ++ (V4SF "V2SF") (V2DF "DF")]) ++ ++;; Double modes of vector modes. ++(define_mode_attr VDBL [(V8QI "V16QI") (V4HI "V8HI") ++ (V2SI "V4SI") (V2SF "V4SF") ++ (SI "V2SI") (DI "V2DI") ++ (DF "V2DF")]) ++ ++;; Double modes of vector modes (lower case). ++(define_mode_attr Vdbl [(V8QI "v16qi") (V4HI "v8hi") ++ (V2SI "v4si") (V2SF "v4sf") ++ (SI "v2si") (DI "v2di")]) ++ ++;; Narrowed modes for VDN. ++(define_mode_attr VNARROWD [(V4HI "V8QI") (V2SI "V4HI") ++ (DI "V2SI")]) ++ ++;; Narrowed double-modes for VQN (Used for XTN). ++(define_mode_attr VNARROWQ [(V8HI "V8QI") (V4SI "V4HI") ++ (V2DI "V2SI") ++ (DI "SI") (SI "HI") ++ (HI "QI")]) ++ ++;; Narrowed quad-modes for VQN (Used for XTN2). ++(define_mode_attr VNARROWQ2 [(V8HI "V16QI") (V4SI "V8HI") ++ (V2DI "V4SI")]) ++ ++;; Register suffix narrowed modes for VQN. ++(define_mode_attr Vntype [(V8HI "8b") (V4SI "4h") ++ (V2DI "2s")]) ++ ++;; Register suffix narrowed modes for VQN. ++(define_mode_attr V2ntype [(V8HI "16b") (V4SI "8h") ++ (V2DI "4s")]) ++ ++;; Widened modes of vector modes. ++(define_mode_attr VWIDE [(V8QI "V8HI") (V4HI "V4SI") ++ (V2SI "V2DI") (V16QI "V8HI") ++ (V8HI "V4SI") (V4SI "V2DI") ++ (HI "SI") (SI "DI")] ++ ++) ++ ++;; Widened mode register suffixes for VDW/VQW. ++(define_mode_attr Vwtype [(V8QI "8h") (V4HI "4s") ++ (V2SI "2d") (V16QI "8h") ++ (V8HI "4s") (V4SI "2d")]) ++ ++;; Widened mode register suffixes for VDW/VQW. ++(define_mode_attr Vmwtype [(V8QI ".8h") (V4HI ".4s") ++ (V2SI ".2d") (V16QI ".8h") ++ (V8HI ".4s") (V4SI ".2d") ++ (SI "") (HI "")]) ++ ++;; Lower part register suffixes for VQW. ++(define_mode_attr Vhalftype [(V16QI "8b") (V8HI "4h") ++ (V4SI "2s")]) ++ ++;; Define corresponding core/FP element mode for each vector mode. ++(define_mode_attr vw [(V8QI "w") (V16QI "w") ++ (V4HI "w") (V8HI "w") ++ (V2SI "w") (V4SI "w") ++ (DI "x") (V2DI "x") ++ (V2SF "s") (V4SF "s") ++ (V2DF "d")]) ++ ++;; Double vector types for ALLX. ++(define_mode_attr Vallxd [(QI "8b") (HI "4h") (SI "2s")]) ++ ++;; Mode of result of comparison operations. ++(define_mode_attr V_cmp_result [(V8QI "V8QI") (V16QI "V16QI") ++ (V4HI "V4HI") (V8HI "V8HI") ++ (V2SI "V2SI") (V4SI "V4SI") ++ (V2SF "V2SI") (V4SF "V4SI") ++ (DI "DI") (V2DI "V2DI")]) ++ ++;; Vm for lane instructions is restricted to FP_LO_REGS. ++(define_mode_attr vwx [(V4HI "x") (V8HI "x") (HI "x") ++ (V2SI "w") (V4SI "w") (SI "w")]) ++ ++(define_mode_attr Vendreg [(OI "T") (CI "U") (XI "V")]) ++ ++(define_mode_attr nregs [(OI "2") (CI "3") (XI "4")]) ++ ++(define_mode_attr VRL2 [(V8QI "V32QI") (V4HI "V16HI") ++ (V2SI "V8SI") (V2SF "V8SF") ++ (DI "V4DI") (DF "V4DF") ++ (V16QI "V32QI") (V8HI "V16HI") ++ (V4SI "V8SI") (V4SF "V8SF") ++ (V2DI "V4DI") (V2DF "V4DF")]) ++ ++(define_mode_attr VRL3 [(V8QI "V48QI") (V4HI "V24HI") ++ (V2SI "V12SI") (V2SF "V12SF") ++ (DI "V6DI") (DF "V6DF") ++ (V16QI "V48QI") (V8HI "V24HI") ++ (V4SI "V12SI") (V4SF "V12SF") ++ (V2DI "V6DI") (V2DF "V6DF")]) ++ ++(define_mode_attr VRL4 [(V8QI "V64QI") (V4HI "V32HI") ++ (V2SI "V16SI") (V2SF "V16SF") ++ (DI "V8DI") (DF "V8DF") ++ (V16QI "V64QI") (V8HI "V32HI") ++ (V4SI "V16SI") (V4SF "V16SF") ++ (V2DI "V8DI") (V2DF "V8DF")]) ++ ++(define_mode_attr VSTRUCT_DREG [(OI "TI") (CI "EI") (XI "OI")]) ++ ++;; ------------------------------------------------------------------- ++;; Code Iterators ++;; ------------------------------------------------------------------- ++ ++;; This code iterator allows the various shifts supported on the core ++(define_code_iterator SHIFT [ashift ashiftrt lshiftrt rotatert]) ++ ++;; This code iterator allows the shifts supported in arithmetic instructions ++(define_code_iterator ASHIFT [ashift ashiftrt lshiftrt]) ++ ++;; Code iterator for logical operations ++(define_code_iterator LOGICAL [and ior xor]) ++ ++;; Code iterator for sign/zero extension ++(define_code_iterator ANY_EXTEND [sign_extend zero_extend]) ++ ++;; All division operations (signed/unsigned) ++(define_code_iterator ANY_DIV [div udiv]) ++ ++;; Code iterator for sign/zero extraction ++(define_code_iterator ANY_EXTRACT [sign_extract zero_extract]) ++ ++;; Code iterator for equality comparisons ++(define_code_iterator EQL [eq ne]) ++ ++;; Code iterator for less-than and greater/equal-to ++(define_code_iterator LTGE [lt ge]) ++ ++;; Iterator for __sync_ operations that where the operation can be ++;; represented directly RTL. This is all of the sync operations bar ++;; nand. ++(define_code_iterator syncop [plus minus ior xor and]) ++ ++;; Iterator for integer conversions ++(define_code_iterator FIXUORS [fix unsigned_fix]) ++ ++;; Code iterator for variants of vector max and min. ++(define_code_iterator MAXMIN [smax smin umax umin]) ++ ++;; Code iterator for variants of vector max and min. ++(define_code_iterator ADDSUB [plus minus]) ++ ++;; Code iterator for variants of vector saturating binary ops. ++(define_code_iterator BINQOPS [ss_plus us_plus ss_minus us_minus]) ++ ++;; Code iterator for variants of vector saturating unary ops. ++(define_code_iterator UNQOPS [ss_neg ss_abs]) ++ ++;; Code iterator for signed variants of vector saturating binary ops. ++(define_code_iterator SBINQOPS [ss_plus ss_minus]) ++ ++;; ------------------------------------------------------------------- ++;; Code Attributes ++;; ------------------------------------------------------------------- ++;; Map rtl objects to optab names ++(define_code_attr optab [(ashift "ashl") ++ (ashiftrt "ashr") ++ (lshiftrt "lshr") ++ (rotatert "rotr") ++ (sign_extend "extend") ++ (zero_extend "zero_extend") ++ (sign_extract "extv") ++ (zero_extract "extzv") ++ (and "and") ++ (ior "ior") ++ (xor "xor") ++ (not "one_cmpl") ++ (neg "neg") ++ (plus "add") ++ (minus "sub") ++ (ss_plus "qadd") ++ (us_plus "qadd") ++ (ss_minus "qsub") ++ (us_minus "qsub") ++ (ss_neg "qneg") ++ (ss_abs "qabs") ++ (eq "eq") ++ (ne "ne") ++ (lt "lt") ++ (ge "ge")]) ++ ++;; Optab prefix for sign/zero-extending operations ++(define_code_attr su_optab [(sign_extend "") (zero_extend "u") ++ (div "") (udiv "u") ++ (fix "") (unsigned_fix "u") ++ (ss_plus "s") (us_plus "u") ++ (ss_minus "s") (us_minus "u")]) ++ ++;; Similar for the instruction mnemonics ++(define_code_attr shift [(ashift "lsl") (ashiftrt "asr") ++ (lshiftrt "lsr") (rotatert "ror")]) ++ ++;; Map shift operators onto underlying bit-field instructions ++(define_code_attr bfshift [(ashift "ubfiz") (ashiftrt "sbfx") ++ (lshiftrt "ubfx") (rotatert "extr")]) ++ ++;; Logical operator instruction mnemonics ++(define_code_attr logical [(and "and") (ior "orr") (xor "eor")]) ++ ++;; Similar, but when not(op) ++(define_code_attr nlogical [(and "bic") (ior "orn") (xor "eon")]) ++ ++;; Sign- or zero-extending load ++(define_code_attr ldrxt [(sign_extend "ldrs") (zero_extend "ldr")]) ++ ++;; Sign- or zero-extending data-op ++(define_code_attr su [(sign_extend "s") (zero_extend "u") ++ (sign_extract "s") (zero_extract "u") ++ (fix "s") (unsigned_fix "u") ++ (div "s") (udiv "u")]) ++ ++;; Emit cbz/cbnz depending on comparison type. ++(define_code_attr cbz [(eq "cbz") (ne "cbnz") (lt "cbnz") (ge "cbz")]) ++ ++;; Emit tbz/tbnz depending on comparison type. ++(define_code_attr tbz [(eq "tbz") (ne "tbnz") (lt "tbnz") (ge "tbz")]) ++ ++;; Max/min attributes. ++(define_code_attr maxmin [(smax "smax") ++ (smin "smin") ++ (umax "umax") ++ (umin "umin")]) ++ ++;; MLA/MLS attributes. ++(define_code_attr as [(ss_plus "a") (ss_minus "s")]) ++ ++ ++;; ------------------------------------------------------------------- ++;; Int Iterators. ++;; ------------------------------------------------------------------- ++(define_int_iterator MAXMINV [UNSPEC_UMAXV UNSPEC_UMINV ++ UNSPEC_SMAXV UNSPEC_SMINV]) ++ ++(define_int_iterator FMAXMINV [UNSPEC_FMAXV UNSPEC_FMINV]) ++ ++(define_int_iterator HADDSUB [UNSPEC_SHADD UNSPEC_UHADD ++ UNSPEC_SRHADD UNSPEC_URHADD ++ UNSPEC_SHSUB UNSPEC_UHSUB ++ UNSPEC_SRHSUB UNSPEC_URHSUB]) ++ ++ ++(define_int_iterator ADDSUBHN [UNSPEC_ADDHN UNSPEC_RADDHN ++ UNSPEC_SUBHN UNSPEC_RSUBHN]) ++ ++(define_int_iterator ADDSUBHN2 [UNSPEC_ADDHN2 UNSPEC_RADDHN2 ++ UNSPEC_SUBHN2 UNSPEC_RSUBHN2]) ++ ++(define_int_iterator FMAXMIN [UNSPEC_FMAX UNSPEC_FMIN]) ++ ++(define_int_iterator VQDMULH [UNSPEC_SQDMULH UNSPEC_SQRDMULH]) ++ ++(define_int_iterator USSUQADD [UNSPEC_SUQADD UNSPEC_USQADD]) ++ ++(define_int_iterator SUQMOVN [UNSPEC_SQXTN UNSPEC_UQXTN]) ++ ++(define_int_iterator VSHL [UNSPEC_SSHL UNSPEC_USHL ++ UNSPEC_SRSHL UNSPEC_URSHL]) ++ ++(define_int_iterator VSHLL [UNSPEC_SSHLL UNSPEC_USHLL]) ++ ++(define_int_iterator VQSHL [UNSPEC_SQSHL UNSPEC_UQSHL ++ UNSPEC_SQRSHL UNSPEC_UQRSHL]) ++ ++(define_int_iterator VSRA [UNSPEC_SSRA UNSPEC_USRA ++ UNSPEC_SRSRA UNSPEC_URSRA]) ++ ++(define_int_iterator VSLRI [UNSPEC_SSLI UNSPEC_USLI ++ UNSPEC_SSRI UNSPEC_USRI]) ++ ++ ++(define_int_iterator VRSHR_N [UNSPEC_SRSHR UNSPEC_URSHR]) ++ ++(define_int_iterator VQSHL_N [UNSPEC_SQSHLU UNSPEC_SQSHL UNSPEC_UQSHL]) ++ ++(define_int_iterator VQSHRN_N [UNSPEC_SQSHRUN UNSPEC_SQRSHRUN ++ UNSPEC_SQSHRN UNSPEC_UQSHRN ++ UNSPEC_SQRSHRN UNSPEC_UQRSHRN]) ++ ++(define_int_iterator VCMP_S [UNSPEC_CMEQ UNSPEC_CMGE UNSPEC_CMGT ++ UNSPEC_CMLE UNSPEC_CMLT]) ++ ++(define_int_iterator VCMP_U [UNSPEC_CMHS UNSPEC_CMHI UNSPEC_CMTST]) ++ ++ ++;; ------------------------------------------------------------------- ++;; Int Iterators Attributes. ++;; ------------------------------------------------------------------- ++(define_int_attr maxminv [(UNSPEC_UMAXV "umax") ++ (UNSPEC_UMINV "umin") ++ (UNSPEC_SMAXV "smax") ++ (UNSPEC_SMINV "smin")]) ++ ++(define_int_attr fmaxminv [(UNSPEC_FMAXV "max") ++ (UNSPEC_FMINV "min")]) ++ ++(define_int_attr fmaxmin [(UNSPEC_FMAX "fmax") ++ (UNSPEC_FMIN "fmin")]) ++ ++(define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u") ++ (UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur") ++ (UNSPEC_SHSUB "s") (UNSPEC_UHSUB "u") ++ (UNSPEC_SRHSUB "sr") (UNSPEC_URHSUB "ur") ++ (UNSPEC_ADDHN "") (UNSPEC_RADDHN "r") ++ (UNSPEC_SUBHN "") (UNSPEC_RSUBHN "r") ++ (UNSPEC_ADDHN2 "") (UNSPEC_RADDHN2 "r") ++ (UNSPEC_SUBHN2 "") (UNSPEC_RSUBHN2 "r") ++ (UNSPEC_SQXTN "s") (UNSPEC_UQXTN "u") ++ (UNSPEC_USQADD "us") (UNSPEC_SUQADD "su") ++ (UNSPEC_SSLI "s") (UNSPEC_USLI "u") ++ (UNSPEC_SSRI "s") (UNSPEC_USRI "u") ++ (UNSPEC_USRA "u") (UNSPEC_SSRA "s") ++ (UNSPEC_URSRA "ur") (UNSPEC_SRSRA "sr") ++ (UNSPEC_URSHR "ur") (UNSPEC_SRSHR "sr") ++ (UNSPEC_SQSHLU "s") (UNSPEC_SQSHL "s") ++ (UNSPEC_UQSHL "u") ++ (UNSPEC_SQSHRUN "s") (UNSPEC_SQRSHRUN "s") ++ (UNSPEC_SQSHRN "s") (UNSPEC_UQSHRN "u") ++ (UNSPEC_SQRSHRN "s") (UNSPEC_UQRSHRN "u") ++ (UNSPEC_USHL "u") (UNSPEC_SSHL "s") ++ (UNSPEC_USHLL "u") (UNSPEC_SSHLL "s") ++ (UNSPEC_URSHL "ur") (UNSPEC_SRSHL "sr") ++ (UNSPEC_UQRSHL "u") (UNSPEC_SQRSHL "s") ++]) ++ ++(define_int_attr r [(UNSPEC_SQDMULH "") (UNSPEC_SQRDMULH "r") ++ (UNSPEC_SQSHRUN "") (UNSPEC_SQRSHRUN "r") ++ (UNSPEC_SQSHRN "") (UNSPEC_UQSHRN "") ++ (UNSPEC_SQRSHRN "r") (UNSPEC_UQRSHRN "r") ++ (UNSPEC_SQSHL "") (UNSPEC_UQSHL "") ++ (UNSPEC_SQRSHL "r")(UNSPEC_UQRSHL "r") ++]) ++ ++(define_int_attr lr [(UNSPEC_SSLI "l") (UNSPEC_USLI "l") ++ (UNSPEC_SSRI "r") (UNSPEC_USRI "r")]) ++ ++(define_int_attr u [(UNSPEC_SQSHLU "u") (UNSPEC_SQSHL "") (UNSPEC_UQSHL "") ++ (UNSPEC_SQSHRUN "u") (UNSPEC_SQRSHRUN "u") ++ (UNSPEC_SQSHRN "") (UNSPEC_UQSHRN "") ++ (UNSPEC_SQRSHRN "") (UNSPEC_UQRSHRN "")]) ++ ++(define_int_attr addsub [(UNSPEC_SHADD "add") ++ (UNSPEC_UHADD "add") ++ (UNSPEC_SRHADD "add") ++ (UNSPEC_URHADD "add") ++ (UNSPEC_SHSUB "sub") ++ (UNSPEC_UHSUB "sub") ++ (UNSPEC_SRHSUB "sub") ++ (UNSPEC_URHSUB "sub") ++ (UNSPEC_ADDHN "add") ++ (UNSPEC_SUBHN "sub") ++ (UNSPEC_RADDHN "add") ++ (UNSPEC_RSUBHN "sub") ++ (UNSPEC_ADDHN2 "add") ++ (UNSPEC_SUBHN2 "sub") ++ (UNSPEC_RADDHN2 "add") ++ (UNSPEC_RSUBHN2 "sub")]) ++ ++(define_int_attr cmp [(UNSPEC_CMGE "ge") (UNSPEC_CMGT "gt") ++ (UNSPEC_CMLE "le") (UNSPEC_CMLT "lt") ++ (UNSPEC_CMEQ "eq") ++ (UNSPEC_CMHS "hs") (UNSPEC_CMHI "hi") ++ (UNSPEC_CMTST "tst")]) ++ ++(define_int_attr offsetlr [(UNSPEC_SSLI "1") (UNSPEC_USLI "1") ++ (UNSPEC_SSRI "0") (UNSPEC_USRI "0")]) ++ +Index: gcc/config/aarch64/sync.md +=================================================================== +--- a/src/gcc/config/aarch64/sync.md (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/sync.md (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,467 @@ ++;; Machine description for AArch64 processor synchronization primitives. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_c_enum "unspecv" ++ [ ++ UNSPECV_SYNC_COMPARE_AND_SWAP ; Represent a sync_compare_and_swap. ++ UNSPECV_SYNC_LOCK ; Represent a sync_lock_test_and_set. ++ UNSPECV_SYNC_LOCK_RELEASE ; Represent a sync_lock_release. ++ UNSPECV_SYNC_OP ; Represent a sync_ ++ UNSPECV_SYNC_NEW_OP ; Represent a sync_new_ ++ UNSPECV_SYNC_OLD_OP ; Represent a sync_old_ ++]) ++ ++(define_expand "sync_compare_and_swap" ++ [(set (match_operand:ALLI 0 "register_operand") ++ (unspec_volatile:ALLI [(match_operand:ALLI 1 "memory_operand") ++ (match_operand:ALLI 2 "register_operand") ++ (match_operand:ALLI 3 "register_operand")] ++ UNSPECV_SYNC_COMPARE_AND_SWAP))] ++ "" ++ { ++ struct aarch64_sync_generator generator; ++ generator.op = aarch64_sync_generator_omrn; ++ generator.u.omrn = gen_aarch64_sync_compare_and_swap; ++ aarch64_expand_sync (mode, &generator, operands[0], operands[1], ++ operands[2], operands[3]); ++ DONE; ++ }) ++ ++(define_expand "sync_lock_test_and_set" ++ [(match_operand:ALLI 0 "register_operand") ++ (match_operand:ALLI 1 "memory_operand") ++ (match_operand:ALLI 2 "register_operand")] ++ "" ++ { ++ struct aarch64_sync_generator generator; ++ generator.op = aarch64_sync_generator_omn; ++ generator.u.omn = gen_aarch64_sync_lock_test_and_set; ++ aarch64_expand_sync (mode, &generator, operands[0], operands[1], ++ NULL, operands[2]); ++ DONE; ++ }) ++ ++(define_expand "sync_" ++ [(match_operand:ALLI 0 "memory_operand") ++ (match_operand:ALLI 1 "register_operand") ++ (syncop:ALLI (match_dup 0) (match_dup 1))] ++ "" ++ { ++ struct aarch64_sync_generator generator; ++ generator.op = aarch64_sync_generator_omn; ++ generator.u.omn = gen_aarch64_sync_new_; ++ aarch64_expand_sync (mode, &generator, NULL, operands[0], NULL, ++ operands[1]); ++ DONE; ++ }) ++ ++(define_expand "sync_nand" ++ [(match_operand:ALLI 0 "memory_operand") ++ (match_operand:ALLI 1 "register_operand") ++ (not:ALLI (and:ALLI (match_dup 0) (match_dup 1)))] ++ "" ++ { ++ struct aarch64_sync_generator generator; ++ generator.op = aarch64_sync_generator_omn; ++ generator.u.omn = gen_aarch64_sync_new_nand; ++ aarch64_expand_sync (mode, &generator, NULL, operands[0], NULL, ++ operands[1]); ++ DONE; ++ }) ++ ++(define_expand "sync_new_" ++ [(match_operand:ALLI 0 "register_operand") ++ (match_operand:ALLI 1 "memory_operand") ++ (match_operand:ALLI 2 "register_operand") ++ (syncop:ALLI (match_dup 1) (match_dup 2))] ++ "" ++ { ++ struct aarch64_sync_generator generator; ++ generator.op = aarch64_sync_generator_omn; ++ generator.u.omn = gen_aarch64_sync_new_; ++ aarch64_expand_sync (mode, &generator, operands[0], operands[1], ++ NULL, operands[2]); ++ DONE; ++ }) ++ ++(define_expand "sync_new_nand" ++ [(match_operand:ALLI 0 "register_operand") ++ (match_operand:ALLI 1 "memory_operand") ++ (match_operand:ALLI 2 "register_operand") ++ (not:ALLI (and:ALLI (match_dup 1) (match_dup 2)))] ++ "" ++ { ++ struct aarch64_sync_generator generator; ++ generator.op = aarch64_sync_generator_omn; ++ generator.u.omn = gen_aarch64_sync_new_nand; ++ aarch64_expand_sync (mode, &generator, operands[0], operands[1], ++ NULL, operands[2]); ++ DONE; ++ }); ++ ++(define_expand "sync_old_" ++ [(match_operand:ALLI 0 "register_operand") ++ (match_operand:ALLI 1 "memory_operand") ++ (match_operand:ALLI 2 "register_operand") ++ (syncop:ALLI (match_dup 1) (match_dup 2))] ++ "" ++ { ++ struct aarch64_sync_generator generator; ++ generator.op = aarch64_sync_generator_omn; ++ generator.u.omn = gen_aarch64_sync_old_; ++ aarch64_expand_sync (mode, &generator, operands[0], operands[1], ++ NULL, operands[2]); ++ DONE; ++ }) ++ ++(define_expand "sync_old_nand" ++ [(match_operand:ALLI 0 "register_operand") ++ (match_operand:ALLI 1 "memory_operand") ++ (match_operand:ALLI 2 "register_operand") ++ (not:ALLI (and:ALLI (match_dup 1) (match_dup 2)))] ++ "" ++ { ++ struct aarch64_sync_generator generator; ++ generator.op = aarch64_sync_generator_omn; ++ generator.u.omn = gen_aarch64_sync_old_nand; ++ aarch64_expand_sync (mode, &generator, operands[0], operands[1], ++ NULL, operands[2]); ++ DONE; ++ }) ++ ++(define_expand "memory_barrier" ++ [(set (match_dup 0) (unspec:BLK [(match_dup 0)] UNSPEC_MB))] ++ "" ++{ ++ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode)); ++ MEM_VOLATILE_P (operands[0]) = 1; ++}) ++ ++(define_insn "aarch64_sync_compare_and_swap" ++ [(set (match_operand:GPI 0 "register_operand" "=&r") ++ (unspec_volatile:GPI ++ [(match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q") ++ (match_operand:GPI 2 "register_operand" "r") ++ (match_operand:GPI 3 "register_operand" "r")] ++ UNSPECV_SYNC_COMPARE_AND_SWAP)) ++ (set (match_dup 1) (unspec_volatile:GPI [(match_dup 2)] ++ UNSPECV_SYNC_COMPARE_AND_SWAP)) ++ (clobber:GPI (match_scratch:GPI 4 "=&r")) ++ (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)] ++ UNSPECV_SYNC_COMPARE_AND_SWAP)) ++ ] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_required_value" "2") ++ (set_attr "sync_new_value" "3") ++ (set_attr "sync_t1" "0") ++ (set_attr "sync_t2" "4") ++ ]) ++ ++(define_insn "aarch64_sync_compare_and_swap" ++ [(set (match_operand:SI 0 "register_operand" "=&r") ++ (zero_extend:SI ++ (unspec_volatile:SHORT ++ [(match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q") ++ (match_operand:SI 2 "register_operand" "r") ++ (match_operand:SI 3 "register_operand" "r")] ++ UNSPECV_SYNC_COMPARE_AND_SWAP))) ++ (set (match_dup 1) (unspec_volatile:SHORT [(match_dup 2)] ++ UNSPECV_SYNC_COMPARE_AND_SWAP)) ++ (clobber:SI (match_scratch:SI 4 "=&r")) ++ (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)] ++ UNSPECV_SYNC_COMPARE_AND_SWAP)) ++ ] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_required_value" "2") ++ (set_attr "sync_new_value" "3") ++ (set_attr "sync_t1" "0") ++ (set_attr "sync_t2" "4") ++ ]) ++ ++(define_insn "aarch64_sync_lock_test_and_set" ++ [(set (match_operand:GPI 0 "register_operand" "=&r") ++ (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q")) ++ (set (match_dup 1) ++ (unspec_volatile:GPI [(match_operand:GPI 2 "register_operand" "r")] ++ UNSPECV_SYNC_LOCK)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:GPI 3 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_release_barrier" "no") ++ (set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "0") ++ (set_attr "sync_t2" "3") ++ ]) ++ ++(define_insn "aarch64_sync_lock_test_and_set" ++ [(set (match_operand:SI 0 "register_operand" "=&r") ++ (zero_extend:SI (match_operand:SHORT 1 ++ "aarch64_sync_memory_operand" "+Q"))) ++ (set (match_dup 1) ++ (unspec_volatile:SHORT [(match_operand:SI 2 "register_operand" "r")] ++ UNSPECV_SYNC_LOCK)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:SI 3 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_release_barrier" "no") ++ (set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "0") ++ (set_attr "sync_t2" "3") ++ ]) ++ ++(define_insn "aarch64_sync_new_" ++ [(set (match_operand:GPI 0 "register_operand" "=&r") ++ (unspec_volatile:GPI ++ [(syncop:GPI ++ (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q") ++ (match_operand:GPI 2 "register_operand" "r"))] ++ UNSPECV_SYNC_NEW_OP)) ++ (set (match_dup 1) ++ (unspec_volatile:GPI [(match_dup 1) (match_dup 2)] ++ UNSPECV_SYNC_NEW_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:GPI 3 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "0") ++ (set_attr "sync_t2" "3") ++ (set_attr "sync_op" "") ++ ]) ++ ++(define_insn "aarch64_sync_new_nand" ++ [(set (match_operand:GPI 0 "register_operand" "=&r") ++ (unspec_volatile:GPI ++ [(not:GPI (and:GPI ++ (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q") ++ (match_operand:GPI 2 "register_operand" "r")))] ++ UNSPECV_SYNC_NEW_OP)) ++ (set (match_dup 1) ++ (unspec_volatile:GPI [(match_dup 1) (match_dup 2)] ++ UNSPECV_SYNC_NEW_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:GPI 3 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "0") ++ (set_attr "sync_t2" "3") ++ (set_attr "sync_op" "nand") ++ ]) ++ ++(define_insn "aarch64_sync_new_" ++ [(set (match_operand:SI 0 "register_operand" "=&r") ++ (unspec_volatile:SI ++ [(syncop:SI ++ (zero_extend:SI ++ (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q")) ++ (match_operand:SI 2 "register_operand" "r"))] ++ UNSPECV_SYNC_NEW_OP)) ++ (set (match_dup 1) ++ (unspec_volatile:SHORT [(match_dup 1) (match_dup 2)] ++ UNSPECV_SYNC_NEW_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:SI 3 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "0") ++ (set_attr "sync_t2" "3") ++ (set_attr "sync_op" "") ++ ]) ++ ++(define_insn "aarch64_sync_new_nand" ++ [(set (match_operand:SI 0 "register_operand" "=&r") ++ (unspec_volatile:SI ++ [(not:SI ++ (and:SI ++ (zero_extend:SI ++ (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q")) ++ (match_operand:SI 2 "register_operand" "r"))) ++ ] UNSPECV_SYNC_NEW_OP)) ++ (set (match_dup 1) ++ (unspec_volatile:SHORT [(match_dup 1) (match_dup 2)] ++ UNSPECV_SYNC_NEW_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:SI 3 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "0") ++ (set_attr "sync_t2" "3") ++ (set_attr "sync_op" "nand") ++ ]) ++ ++(define_insn "aarch64_sync_old_" ++ [(set (match_operand:GPI 0 "register_operand" "=&r") ++ (unspec_volatile:GPI ++ [(syncop:GPI ++ (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q") ++ (match_operand:GPI 2 "register_operand" "r"))] ++ UNSPECV_SYNC_OLD_OP)) ++ (set (match_dup 1) ++ (unspec_volatile:GPI [(match_dup 1) (match_dup 2)] ++ UNSPECV_SYNC_OLD_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:GPI 3 "=&r")) ++ (clobber (match_scratch:GPI 4 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "3") ++ (set_attr "sync_t2" "4") ++ (set_attr "sync_op" "") ++ ]) ++ ++(define_insn "aarch64_sync_old_nand" ++ [(set (match_operand:GPI 0 "register_operand" "=&r") ++ (unspec_volatile:GPI ++ [(not:GPI (and:GPI ++ (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q") ++ (match_operand:GPI 2 "register_operand" "r")))] ++ UNSPECV_SYNC_OLD_OP)) ++ (set (match_dup 1) ++ (unspec_volatile:GPI [(match_dup 1) (match_dup 2)] ++ UNSPECV_SYNC_OLD_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:GPI 3 "=&r")) ++ (clobber (match_scratch:GPI 4 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "3") ++ (set_attr "sync_t2" "4") ++ (set_attr "sync_op" "nand") ++ ]) ++ ++(define_insn "aarch64_sync_old_" ++ [(set (match_operand:SI 0 "register_operand" "=&r") ++ (unspec_volatile:SI ++ [(syncop:SI ++ (zero_extend:SI ++ (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q")) ++ (match_operand:SI 2 "register_operand" "r"))] ++ UNSPECV_SYNC_OLD_OP)) ++ (set (match_dup 1) ++ (unspec_volatile:SHORT [(match_dup 1) (match_dup 2)] ++ UNSPECV_SYNC_OLD_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:SI 3 "=&r")) ++ (clobber (match_scratch:SI 4 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "3") ++ (set_attr "sync_t2" "4") ++ (set_attr "sync_op" "") ++ ]) ++ ++(define_insn "aarch64_sync_old_nand" ++ [(set (match_operand:SI 0 "register_operand" "=&r") ++ (unspec_volatile:SI ++ [(not:SI ++ (and:SI ++ (zero_extend:SI ++ (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q")) ++ (match_operand:SI 2 "register_operand" "r")))] ++ UNSPECV_SYNC_OLD_OP)) ++ (set (match_dup 1) ++ (unspec_volatile:SHORT [(match_dup 1) (match_dup 2)] ++ UNSPECV_SYNC_OLD_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:SI 3 "=&r")) ++ (clobber (match_scratch:SI 4 "=&r"))] ++ "" ++ { ++ return aarch64_output_sync_insn (insn, operands); ++ } ++ [(set_attr "sync_result" "0") ++ (set_attr "sync_memory" "1") ++ (set_attr "sync_new_value" "2") ++ (set_attr "sync_t1" "3") ++ (set_attr "sync_t2" "4") ++ (set_attr "sync_op" "nand") ++ ]) ++ ++(define_insn "*memory_barrier" ++ [(set (match_operand:BLK 0 "" "") ++ (unspec:BLK [(match_dup 0)] UNSPEC_MB))] ++ "" ++ "dmb\\tish" ++) ++ ++(define_insn "sync_lock_release" ++ [(set (match_operand:ALLI 0 "memory_operand" "+Q") ++ (unspec_volatile:ALLI [(match_operand:ALLI 1 "register_operand" "r")] ++ UNSPECV_SYNC_LOCK_RELEASE))] ++ ++ "" ++ { ++ return aarch64_output_sync_lock_release (operands[1], operands[0]); ++ }) ++ +Index: gcc/config/aarch64/aarch64.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64.h (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/aarch64.h (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,824 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++ ++#ifndef GCC_AARCH64_H ++#define GCC_AARCH64_H ++ ++/* Target CPU builtins. */ ++#define TARGET_CPU_CPP_BUILTINS() \ ++ do \ ++ { \ ++ builtin_define ("__aarch64__"); \ ++ if (TARGET_BIG_END) \ ++ builtin_define ("__AARCH64EB__"); \ ++ else \ ++ builtin_define ("__AARCH64EL__"); \ ++ } while (0) ++ ++ ++ ++/* Target machine storage layout. */ ++ ++#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ ++ if (GET_MODE_CLASS (MODE) == MODE_INT \ ++ && GET_MODE_SIZE (MODE) < 4) \ ++ { \ ++ if (MODE == QImode || MODE == HImode) \ ++ { \ ++ MODE = SImode; \ ++ } \ ++ } ++ ++/* Bits are always numbered from the LSBit. */ ++#define BITS_BIG_ENDIAN 0 ++ ++/* Big/little-endian flavour. */ ++#define BYTES_BIG_ENDIAN (TARGET_BIG_END != 0) ++#define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN) ++ ++/* AdvSIMD is supported in the default configuration, unless disabled by ++ -mgeneral-regs-only. */ ++#define TARGET_SIMD !TARGET_GENERAL_REGS_ONLY ++#define TARGET_FLOAT !TARGET_GENERAL_REGS_ONLY ++ ++#define UNITS_PER_WORD 8 ++ ++#define UNITS_PER_VREG 16 ++ ++#define PARM_BOUNDARY 64 ++ ++#define STACK_BOUNDARY 128 ++ ++#define FUNCTION_BOUNDARY 32 ++ ++#define EMPTY_FIELD_BOUNDARY 32 ++ ++#define BIGGEST_ALIGNMENT 128 ++ ++#define SHORT_TYPE_SIZE 16 ++ ++#define INT_TYPE_SIZE 32 ++ ++#define LONG_TYPE_SIZE 64 /* XXX This should be an option */ ++ ++#define LONG_LONG_TYPE_SIZE 64 ++ ++#define FLOAT_TYPE_SIZE 32 ++ ++#define DOUBLE_TYPE_SIZE 64 ++ ++#define LONG_DOUBLE_TYPE_SIZE 128 ++ ++/* The architecture reserves all bits of the address for hardware use, ++ so the vbit must go into the delta field of pointers to member ++ functions. This is the same config as that in the AArch32 ++ port. */ ++#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta ++ ++/* Make strings word-aligned so that strcpy from constants will be ++ faster. */ ++#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ ++ ((TREE_CODE (EXP) == STRING_CST \ ++ && !optimize_size \ ++ && (ALIGN) < BITS_PER_WORD) \ ++ ? BITS_PER_WORD : ALIGN) ++ ++#define DATA_ALIGNMENT(EXP, ALIGN) \ ++ ((((ALIGN) < BITS_PER_WORD) \ ++ && (TREE_CODE (EXP) == ARRAY_TYPE \ ++ || TREE_CODE (EXP) == UNION_TYPE \ ++ || TREE_CODE (EXP) == RECORD_TYPE)) \ ++ ? BITS_PER_WORD : (ALIGN)) ++ ++#define LOCAL_ALIGNMENT(EXP, ALIGN) DATA_ALIGNMENT(EXP, ALIGN) ++ ++#define STRUCTURE_SIZE_BOUNDARY 8 ++ ++/* Defined by the ABI */ ++#define WCHAR_TYPE "unsigned int" ++#define WCHAR_TYPE_SIZE 32 ++ ++/* Using long long breaks -ansi and -std=c90, so these will need to be ++ made conditional for an LLP64 ABI. */ ++ ++#define SIZE_TYPE "long unsigned int" ++ ++#define PTRDIFF_TYPE "long int" ++ ++#define PCC_BITFIELD_TYPE_MATTERS 1 ++ ++ ++/* Instruction tuning/selection flags. */ ++ ++/* Bit values used to identify processor capabilities. */ ++#define AARCH64_FL_SIMD (1 << 0) /* Has SIMD instructions. */ ++#define AARCH64_FL_FP (1 << 1) /* Has FP. */ ++#define AARCH64_FL_CRYPTO (1 << 2) /* Has crypto. */ ++#define AARCH64_FL_SLOWMUL (1 << 3) /* A slow multiply core. */ ++ ++/* Has FP and SIMD. */ ++#define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) ++ ++/* Has FP without SIMD. */ ++#define AARCH64_FL_FPQ16 (AARCH64_FL_FP & ~AARCH64_FL_SIMD) ++ ++/* Architecture flags that effect instruction selection. */ ++#define AARCH64_FL_FOR_ARCH8 (AARCH64_FL_FPSIMD) ++ ++/* Macros to test ISA flags. */ ++extern unsigned long aarch64_isa_flags; ++#define AARCH64_ISA_CRYPTO (aarch64_isa_flags & AARCH64_FL_CRYPTO) ++#define AARCH64_ISA_FP (aarch64_isa_flags & AARCH64_FL_FP) ++#define AARCH64_ISA_SIMD (aarch64_isa_flags & AARCH64_FL_SIMD) ++ ++/* Macros to test tuning flags. */ ++extern unsigned long aarch64_tune_flags; ++#define AARCH64_TUNE_SLOWMUL (aarch64_tune_flags & AARCH64_FL_SLOWMUL) ++ ++ ++/* Standard register usage. */ ++ ++/* 31 64-bit general purpose registers R0-R30: ++ R30 LR (link register) ++ R29 FP (frame pointer) ++ R19-R28 Callee-saved registers ++ R18 The platform register; use as temporary register. ++ R17 IP1 The second intra-procedure-call temporary register ++ (can be used by call veneers and PLT code); otherwise use ++ as a temporary register ++ R16 IP0 The first intra-procedure-call temporary register (can ++ be used by call veneers and PLT code); otherwise use as a ++ temporary register ++ R9-R15 Temporary registers ++ R8 Structure value parameter / temporary register ++ R0-R7 Parameter/result registers ++ ++ SP stack pointer, encoded as X/R31 where permitted. ++ ZR zero register, encoded as X/R31 elsewhere ++ ++ 32 x 128-bit floating-point/vector registers ++ V16-V31 Caller-saved (temporary) registers ++ V8-V15 Callee-saved registers ++ V0-V7 Parameter/result registers ++ ++ The vector register V0 holds scalar B0, H0, S0 and D0 in its least ++ significant bits. Unlike AArch32 S1 is not packed into D0, ++ etc. */ ++ ++/* Note that we don't mark X30 as a call-clobbered register. The idea is ++ that it's really the call instructions themselves which clobber X30. ++ We don't care what the called function does with it afterwards. ++ ++ This approach makes it easier to implement sibcalls. Unlike normal ++ calls, sibcalls don't clobber X30, so the register reaches the ++ called function intact. EPILOGUE_USES says that X30 is useful ++ to the called function. */ ++ ++#define FIXED_REGISTERS \ ++ { \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* R0 - R7 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* R8 - R15 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* R16 - R23 */ \ ++ 0, 0, 0, 0, 0, 1, 0, 1, /* R24 - R30, SP */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V0 - V7 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V8 - V15 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V16 - V23 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V24 - V31 */ \ ++ 1, 1, 1, /* SFP, AP, CC */ \ ++ } ++ ++#define CALL_USED_REGISTERS \ ++ { \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* R0 - R7 */ \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* R8 - R15 */ \ ++ 1, 1, 1, 0, 0, 0, 0, 0, /* R16 - R23 */ \ ++ 0, 0, 0, 0, 0, 1, 0, 1, /* R24 - R30, SP */ \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* V0 - V7 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V8 - V15 */ \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* V16 - V23 */ \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* V24 - V31 */ \ ++ 1, 1, 1, /* SFP, AP, CC */ \ ++ } ++ ++#define REGISTER_NAMES \ ++ { \ ++ "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", \ ++ "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", \ ++ "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", \ ++ "x24", "x25", "x26", "x27", "x28", "x29", "x30", "sp", \ ++ "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", \ ++ "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", \ ++ "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", \ ++ "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \ ++ "sfp", "ap", "cc", \ ++ } ++ ++/* Generate the register aliases for core register N */ ++#define R_ALIASES(N) {"r" # N, R0_REGNUM + (N)}, \ ++ {"w" # N, R0_REGNUM + (N)} ++ ++#define V_ALIASES(N) {"q" # N, V0_REGNUM + (N)}, \ ++ {"d" # N, V0_REGNUM + (N)}, \ ++ {"s" # N, V0_REGNUM + (N)}, \ ++ {"h" # N, V0_REGNUM + (N)}, \ ++ {"b" # N, V0_REGNUM + (N)} ++ ++/* Provide aliases for all of the ISA defined register name forms. ++ These aliases are convenient for use in the clobber lists of inline ++ asm statements. */ ++ ++#define ADDITIONAL_REGISTER_NAMES \ ++ { R_ALIASES(0), R_ALIASES(1), R_ALIASES(2), R_ALIASES(3), \ ++ R_ALIASES(4), R_ALIASES(5), R_ALIASES(6), R_ALIASES(7), \ ++ R_ALIASES(8), R_ALIASES(9), R_ALIASES(10), R_ALIASES(11), \ ++ R_ALIASES(12), R_ALIASES(13), R_ALIASES(14), R_ALIASES(15), \ ++ R_ALIASES(16), R_ALIASES(17), R_ALIASES(18), R_ALIASES(19), \ ++ R_ALIASES(20), R_ALIASES(21), R_ALIASES(22), R_ALIASES(23), \ ++ R_ALIASES(24), R_ALIASES(25), R_ALIASES(26), R_ALIASES(27), \ ++ R_ALIASES(28), R_ALIASES(29), R_ALIASES(30), /* 31 omitted */ \ ++ V_ALIASES(0), V_ALIASES(1), V_ALIASES(2), V_ALIASES(3), \ ++ V_ALIASES(4), V_ALIASES(5), V_ALIASES(6), V_ALIASES(7), \ ++ V_ALIASES(8), V_ALIASES(9), V_ALIASES(10), V_ALIASES(11), \ ++ V_ALIASES(12), V_ALIASES(13), V_ALIASES(14), V_ALIASES(15), \ ++ V_ALIASES(16), V_ALIASES(17), V_ALIASES(18), V_ALIASES(19), \ ++ V_ALIASES(20), V_ALIASES(21), V_ALIASES(22), V_ALIASES(23), \ ++ V_ALIASES(24), V_ALIASES(25), V_ALIASES(26), V_ALIASES(27), \ ++ V_ALIASES(28), V_ALIASES(29), V_ALIASES(30), V_ALIASES(31) \ ++ } ++ ++/* Say that the epilogue uses the return address register. Note that ++ in the case of sibcalls, the values "used by the epilogue" are ++ considered live at the start of the called function. */ ++ ++#define EPILOGUE_USES(REGNO) \ ++ ((REGNO) == LR_REGNUM) ++ ++/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, ++ the stack pointer does not matter. The value is tested only in ++ functions that have frame pointers. */ ++#define EXIT_IGNORE_STACK 1 ++ ++#define STATIC_CHAIN_REGNUM R18_REGNUM ++#define HARD_FRAME_POINTER_REGNUM R29_REGNUM ++#define FRAME_POINTER_REGNUM SFP_REGNUM ++#define STACK_POINTER_REGNUM SP_REGNUM ++#define ARG_POINTER_REGNUM AP_REGNUM ++#define FIRST_PSEUDO_REGISTER 67 ++ ++/* The number of (integer) argument register available. */ ++#define NUM_ARG_REGS 8 ++#define NUM_FP_ARG_REGS 8 ++ ++/* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most ++ four members. */ ++#define HA_MAX_NUM_FLDS 4 ++ ++/* External dwarf register number scheme. These number are used to ++ identify registers in dwarf debug information, the values are ++ defined by the AArch64 ABI. The numbering scheme is independent of ++ GCC's internal register numbering scheme. */ ++ ++#define AARCH64_DWARF_R0 0 ++ ++/* The number of R registers, note 31! not 32. */ ++#define AARCH64_DWARF_NUMBER_R 31 ++ ++#define AARCH64_DWARF_SP 31 ++#define AARCH64_DWARF_V0 64 ++ ++/* The number of V registers. */ ++#define AARCH64_DWARF_NUMBER_V 32 ++ ++/* For signal frames we need to use an alternative return column. This ++ value must not correspond to a hard register and must be out of the ++ range of DWARF_FRAME_REGNUM(). */ ++#define DWARF_ALT_FRAME_RETURN_COLUMN \ ++ (AARCH64_DWARF_V0 + AARCH64_DWARF_NUMBER_V) ++ ++/* We add 1 extra frame register for use as the ++ DWARF_ALT_FRAME_RETURN_COLUMN. */ ++#define DWARF_FRAME_REGISTERS (DWARF_ALT_FRAME_RETURN_COLUMN + 1) ++ ++ ++#define DBX_REGISTER_NUMBER(REGNO) aarch64_dbx_register_number (REGNO) ++/* Provide a definition of DWARF_FRAME_REGNUM here so that fallback unwinders ++ can use DWARF_ALT_FRAME_RETURN_COLUMN defined below. This is just the same ++ as the default definition in dwarf2out.c. */ ++#undef DWARF_FRAME_REGNUM ++#define DWARF_FRAME_REGNUM(REGNO) DBX_REGISTER_NUMBER (REGNO) ++ ++#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM) ++ ++#define HARD_REGNO_NREGS(REGNO, MODE) aarch64_hard_regno_nregs (REGNO, MODE) ++ ++#define HARD_REGNO_MODE_OK(REGNO, MODE) aarch64_hard_regno_mode_ok (REGNO, MODE) ++ ++#define MODES_TIEABLE_P(MODE1, MODE2) \ ++ (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) ++ ++#define DWARF2_UNWIND_INFO 1 ++ ++/* Use R0 through R3 to pass exception handling information. */ ++#define EH_RETURN_DATA_REGNO(N) \ ++ ((N) < 4 ? ((unsigned int) R0_REGNUM + (N)) : INVALID_REGNUM) ++ ++/* Select a format to encode pointers in exception handling data. */ ++#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ ++ aarch64_asm_preferred_eh_data_format ((CODE), (GLOBAL)) ++ ++/* The register that holds the return address in exception handlers. */ ++#define AARCH64_EH_STACKADJ_REGNUM (R0_REGNUM + 4) ++#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, AARCH64_EH_STACKADJ_REGNUM) ++ ++/* Don't use __builtin_setjmp until we've defined it. */ ++#undef DONT_USE_BUILTIN_SETJMP ++#define DONT_USE_BUILTIN_SETJMP 1 ++ ++/* Register in which the structure value is to be returned. */ ++#define AARCH64_STRUCT_VALUE_REGNUM R8_REGNUM ++ ++/* Non-zero if REGNO is part of the Core register set. ++ ++ The rather unusual way of expressing this check is to avoid ++ warnings when building the compiler when R0_REGNUM is 0 and REGNO ++ is unsigned. */ ++#define GP_REGNUM_P(REGNO) \ ++ (((unsigned) (REGNO - R0_REGNUM)) <= (R30_REGNUM - R0_REGNUM)) ++ ++#define FP_REGNUM_P(REGNO) \ ++ (((unsigned) (REGNO - V0_REGNUM)) <= (V31_REGNUM - V0_REGNUM)) ++ ++#define FP_LO_REGNUM_P(REGNO) \ ++ (((unsigned) (REGNO - V0_REGNUM)) <= (V15_REGNUM - V0_REGNUM)) ++ ++ ++/* Register and constant classes. */ ++ ++enum reg_class ++{ ++ NO_REGS, ++ CORE_REGS, ++ GENERAL_REGS, ++ STACK_REG, ++ POINTER_REGS, ++ FP_LO_REGS, ++ FP_REGS, ++ ALL_REGS, ++ LIM_REG_CLASSES /* Last */ ++}; ++ ++#define N_REG_CLASSES ((int) LIM_REG_CLASSES) ++ ++#define REG_CLASS_NAMES \ ++{ \ ++ "NO_REGS", \ ++ "CORE_REGS", \ ++ "GENERAL_REGS", \ ++ "STACK_REG", \ ++ "POINTER_REGS", \ ++ "FP_LO_REGS", \ ++ "FP_REGS", \ ++ "ALL_REGS" \ ++} ++ ++#define REG_CLASS_CONTENTS \ ++{ \ ++ { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ ++ { 0x7fffffff, 0x00000000, 0x00000003 }, /* CORE_REGS */ \ ++ { 0x7fffffff, 0x00000000, 0x00000003 }, /* GENERAL_REGS */ \ ++ { 0x80000000, 0x00000000, 0x00000000 }, /* STACK_REG */ \ ++ { 0xffffffff, 0x00000000, 0x00000003 }, /* POINTER_REGS */ \ ++ { 0x00000000, 0x0000ffff, 0x00000000 }, /* FP_LO_REGS */ \ ++ { 0x00000000, 0xffffffff, 0x00000000 }, /* FP_REGS */ \ ++ { 0xffffffff, 0xffffffff, 0x00000007 } /* ALL_REGS */ \ ++} ++ ++#define REGNO_REG_CLASS(REGNO) aarch64_regno_regclass (REGNO) ++ ++#define INDEX_REG_CLASS CORE_REGS ++#define BASE_REG_CLASS POINTER_REGS ++ ++/* Register pairs used to eliminate unneeded registers that point intoi ++ the stack frame. */ ++#define ELIMINABLE_REGS \ ++{ \ ++ { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ ++ { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ ++ { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ ++ { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ ++} ++ ++#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ ++ (OFFSET) = aarch64_initial_elimination_offset (FROM, TO) ++ ++/* CPU/ARCH option handling. */ ++#include "config/aarch64/aarch64-opts.h" ++ ++enum target_cpus ++{ ++#define AARCH64_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ ++ TARGET_CPU_##IDENT, ++#include "aarch64-cores.def" ++#undef AARCH64_CORE ++ TARGET_CPU_generic ++}; ++ ++/* If there is no CPU defined at configure, use "generic" as default. */ ++#ifndef TARGET_CPU_DEFAULT ++#define TARGET_CPU_DEFAULT \ ++ (TARGET_CPU_generic | (AARCH64_CPU_DEFAULT_FLAGS << 6)) ++#endif ++ ++/* The processor for which instructions should be scheduled. */ ++extern enum aarch64_processor aarch64_tune; ++ ++/* RTL generation support. */ ++#define INIT_EXPANDERS aarch64_init_expanders () ++ ++ ++/* Stack layout; function entry, exit and calling. */ ++#define STACK_GROWS_DOWNWARD 1 ++ ++#define FRAME_GROWS_DOWNWARD 0 ++ ++#define STARTING_FRAME_OFFSET 0 ++ ++#define ACCUMULATE_OUTGOING_ARGS 1 ++ ++#define FIRST_PARM_OFFSET(FNDECL) 0 ++ ++/* Fix for VFP */ ++#define LIBCALL_VALUE(MODE) \ ++ gen_rtx_REG (MODE, FLOAT_MODE_P (MODE) ? V0_REGNUM : R0_REGNUM) ++ ++#define DEFAULT_PCC_STRUCT_RETURN 0 ++ ++#define AARCH64_ROUND_UP(X, ALIGNMENT) \ ++ (((X) + ((ALIGNMENT) - 1)) & ~((ALIGNMENT) - 1)) ++ ++#define AARCH64_ROUND_DOWN(X, ALIGNMENT) \ ++ ((X) & ~((ALIGNMENT) - 1)) ++ ++#ifdef HOST_WIDE_INT ++struct GTY (()) aarch64_frame ++{ ++ HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER]; ++ HOST_WIDE_INT saved_regs_size; ++ /* Padding if needed after the all the callee save registers have ++ been saved. */ ++ HOST_WIDE_INT padding0; ++ HOST_WIDE_INT hardfp_offset; /* HARD_FRAME_POINTER_REGNUM */ ++ HOST_WIDE_INT fp_lr_offset; /* Space needed for saving fp and/or lr */ ++ ++ bool laid_out; ++}; ++ ++typedef struct GTY (()) machine_function ++{ ++ struct aarch64_frame frame; ++ ++ /* The number of extra stack bytes taken up by register varargs. ++ This area is allocated by the callee at the very top of the frame. */ ++ HOST_WIDE_INT saved_varargs_size; ++ ++} machine_function; ++#endif ++ ++ ++/* Which ABI to use. */ ++enum arm_abi_type ++{ ++ ARM_ABI_AAPCS64 ++}; ++ ++enum arm_pcs ++{ ++ ARM_PCS_AAPCS64, /* Base standard AAPCS for 64 bit. */ ++ ARM_PCS_UNKNOWN ++}; ++ ++ ++extern enum arm_abi_type arm_abi; ++extern enum arm_pcs arm_pcs_variant; ++#ifndef ARM_DEFAULT_ABI ++#define ARM_DEFAULT_ABI ARM_ABI_AAPCS64 ++#endif ++ ++#ifndef ARM_DEFAULT_PCS ++#define ARM_DEFAULT_PCS ARM_PCS_AAPCS64 ++#endif ++ ++/* We can't use enum machine_mode inside a generator file because it ++ hasn't been created yet; we shouldn't be using any code that ++ needs the real definition though, so this ought to be safe. */ ++#ifdef GENERATOR_FILE ++#define MACHMODE int ++#else ++#include "insn-modes.h" ++#define MACHMODE enum machine_mode ++#endif ++ ++ ++/* AAPCS related state tracking. */ ++typedef struct ++{ ++ enum arm_pcs pcs_variant; ++ int aapcs_arg_processed; /* No need to lay out this argument again. */ ++ int aapcs_ncrn; /* Next Core register number. */ ++ int aapcs_nextncrn; /* Next next core register number. */ ++ int aapcs_nvrn; /* Next Vector register number. */ ++ int aapcs_nextnvrn; /* Next Next Vector register number. */ ++ rtx aapcs_reg; /* Register assigned to this argument. This ++ is NULL_RTX if this parameter goes on ++ the stack. */ ++ MACHMODE aapcs_vfp_rmode; ++ int aapcs_stack_words; /* If the argument is passed on the stack, this ++ is the number of words needed, after rounding ++ up. Only meaningful when ++ aapcs_reg == NULL_RTX. */ ++ int aapcs_stack_size; /* The total size (in words, per 8 byte) of the ++ stack arg area so far. */ ++} CUMULATIVE_ARGS; ++ ++#define FUNCTION_ARG_PADDING(MODE, TYPE) \ ++ (aarch64_pad_arg_upward (MODE, TYPE) ? upward : downward) ++ ++#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \ ++ (aarch64_pad_reg_upward (MODE, TYPE, FIRST) ? upward : downward) ++ ++#define PAD_VARARGS_DOWN 0 ++ ++#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ ++ aarch64_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) ++ ++#define FUNCTION_ARG_REGNO_P(REGNO) \ ++ aarch64_function_arg_regno_p(REGNO) ++ ++ ++/* ISA Features. */ ++ ++/* Addressing modes, etc. */ ++#define HAVE_POST_INCREMENT 1 ++#define HAVE_PRE_INCREMENT 1 ++#define HAVE_POST_DECREMENT 1 ++#define HAVE_PRE_DECREMENT 1 ++#define HAVE_POST_MODIFY_DISP 1 ++#define HAVE_PRE_MODIFY_DISP 1 ++ ++#define MAX_REGS_PER_ADDRESS 2 ++ ++#define CONSTANT_ADDRESS_P(X) aarch64_constant_address_p(X) ++ ++/* Try a machine-dependent way of reloading an illegitimate address ++ operand. If we find one, push the reload and jump to WIN. This ++ macro is used in only one place: `find_reloads_address' in reload.c. */ ++ ++#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN) \ ++do { \ ++ rtx new_x = aarch64_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \ ++ IND_L); \ ++ if (new_x) \ ++ { \ ++ X = new_x; \ ++ goto WIN; \ ++ } \ ++} while (0) ++ ++#define REGNO_OK_FOR_BASE_P(REGNO) \ ++ aarch64_regno_ok_for_base_p (REGNO, true) ++ ++#define REGNO_OK_FOR_INDEX_P(REGNO) \ ++ aarch64_regno_ok_for_index_p (REGNO, true) ++ ++#define LEGITIMATE_PIC_OPERAND_P(X) \ ++ aarch64_legitimate_pic_operand_p (X) ++ ++/* Go to LABEL if ADDR (a legitimate address expression) ++ has an effect that depends on the machine mode it is used for. ++ Post-inc/dec are now explicitly handled by recog.c. */ ++#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) ++ ++#define CASE_VECTOR_MODE Pmode ++ ++#define DEFAULT_SIGNED_CHAR 0 ++ ++/* An integer expression for the size in bits of the largest integer machine ++ mode that should actually be used. We allow pairs of registers. */ ++#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) ++ ++/* Maximum bytes moved by a single instruction (load/store pair). */ ++#define MOVE_MAX (UNITS_PER_WORD * 2) ++ ++/* The base cost overhead of a memcpy call, for MOVE_RATIO and friends. */ ++#define AARCH64_CALL_RATIO 8 ++ ++/* When optimizing for size, give a better estimate of the length of a memcpy ++ call, but use the default otherwise. But move_by_pieces_ninsns() counts ++ memory-to-memory moves, and we'll have to generate a load & store for each, ++ so halve the value to take that into account. */ ++#define MOVE_RATIO(speed) \ ++ (((speed) ? 15 : AARCH64_CALL_RATIO) / 2) ++ ++/* For CLEAR_RATIO, when optimizing for size, give a better estimate ++ of the length of a memset call, but use the default otherwise. */ ++#define CLEAR_RATIO(speed) \ ++ ((speed) ? 15 : AARCH64_CALL_RATIO) ++ ++/* SET_RATIO is similar to CLEAR_RATIO, but for a non-zero constant, so when ++ optimizing for size adjust the ratio to account for the overhead of loading ++ the constant. */ ++#define SET_RATIO(speed) \ ++ ((speed) ? 15 : AARCH64_CALL_RATIO - 2) ++ ++/* STORE_BY_PIECES_P can be used when copying a constant string, but ++ in that case each 64-bit chunk takes 5 insns instead of 2 (LDR/STR). ++ For now we always fail this and let the move_by_pieces code copy ++ the string from read-only memory. */ ++#define STORE_BY_PIECES_P(SIZE, ALIGN) 0 ++ ++/* Disable auto-increment in move_by_pieces et al. Use of auto-increment is ++ rarely a good idea in straight-line code since it adds an extra address ++ dependency between each instruction. Better to use incrementing offsets. */ ++#define USE_LOAD_POST_INCREMENT(MODE) 0 ++#define USE_LOAD_POST_DECREMENT(MODE) 0 ++#define USE_LOAD_PRE_INCREMENT(MODE) 0 ++#define USE_LOAD_PRE_DECREMENT(MODE) 0 ++#define USE_STORE_POST_INCREMENT(MODE) 0 ++#define USE_STORE_POST_DECREMENT(MODE) 0 ++#define USE_STORE_PRE_INCREMENT(MODE) 0 ++#define USE_STORE_PRE_DECREMENT(MODE) 0 ++ ++/* ?? #define WORD_REGISTER_OPERATIONS */ ++ ++/* Define if loading from memory in MODE, an integral mode narrower than ++ BITS_PER_WORD will either zero-extend or sign-extend. The value of this ++ macro should be the code that says which one of the two operations is ++ implicitly done, or UNKNOWN if none. */ ++#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND ++ ++/* Define this macro to be non-zero if instructions will fail to work ++ if given data not on the nominal alignment. */ ++#define STRICT_ALIGNMENT TARGET_STRICT_ALIGN ++ ++/* Define this macro to be non-zero if accessing less than a word of ++ memory is no faster than accessing a word of memory, i.e., if such ++ accesses require more than one instruction or if there is no ++ difference in cost. ++ Although there's no difference in instruction count or cycles, ++ in AArch64 we don't want to expand to a sub-word to a 64-bit access ++ if we don't have to, for power-saving reasons. */ ++#define SLOW_BYTE_ACCESS 0 ++ ++#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 ++ ++#define NO_FUNCTION_CSE 1 ++ ++#define Pmode DImode ++#define FUNCTION_MODE Pmode ++ ++#define SELECT_CC_MODE(OP, X, Y) aarch64_select_cc_mode (OP, X, Y) ++ ++#define REVERSE_CONDITION(CODE, MODE) \ ++ (((MODE) == CCFPmode || (MODE) == CCFPEmode) \ ++ ? reverse_condition_maybe_unordered (CODE) \ ++ : reverse_condition (CODE)) ++ ++#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ ++ ((VALUE) = ((MODE) == SImode ? 32 : 64), 2) ++#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ ++ ((VALUE) = ((MODE) == SImode ? 32 : 64), 2) ++ ++#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM) ++ ++#define RETURN_ADDR_RTX aarch64_return_addr ++ ++#define TRAMPOLINE_SIZE aarch64_trampoline_size () ++ ++/* Trampolines contain dwords, so must be dword aligned. */ ++#define TRAMPOLINE_ALIGNMENT 64 ++ ++/* Put trampolines in the text section so that mapping symbols work ++ correctly. */ ++#define TRAMPOLINE_SECTION text_section ++ ++/* Costs, etc. */ ++#define MEMORY_MOVE_COST(M, CLASS, IN) \ ++ (GET_MODE_SIZE (M) < 8 ? 8 : GET_MODE_SIZE (M)) ++ ++/* To start with. */ ++#define BRANCH_COST(SPEED_P, PREDICTABLE_P) 2 ++ ++ ++/* Assembly output. */ ++ ++/* For now we'll make all jump tables pc-relative. */ ++#define CASE_VECTOR_PC_RELATIVE 1 ++ ++#define CASE_VECTOR_SHORTEN_MODE(min, max, body) \ ++ ((min < -0x1fff0 || max > 0x1fff0) ? SImode \ ++ : (min < -0x1f0 || max > 0x1f0) ? HImode \ ++ : QImode) ++ ++/* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */ ++#define ADDR_VEC_ALIGN(JUMPTABLE) 0 ++ ++#define PRINT_OPERAND(STREAM, X, CODE) aarch64_print_operand (STREAM, X, CODE) ++ ++#define PRINT_OPERAND_ADDRESS(STREAM, X) \ ++ aarch64_print_operand_address (STREAM, X) ++ ++#define FUNCTION_PROFILER(STREAM, LABELNO) \ ++ aarch64_function_profiler (STREAM, LABELNO) ++ ++/* For some reason, the Linux headers think they know how to define ++ these macros. They don't!!! */ ++#undef ASM_APP_ON ++#undef ASM_APP_OFF ++#define ASM_APP_ON "\t" ASM_COMMENT_START " Start of user assembly\n" ++#define ASM_APP_OFF "\t" ASM_COMMENT_START " End of user assembly\n" ++ ++#define ASM_FPRINTF_EXTENSIONS(FILE, ARGS, P) \ ++ case '@': \ ++ fputs (ASM_COMMENT_START, FILE); \ ++ break; \ ++ \ ++ case 'r': \ ++ fputs (REGISTER_PREFIX, FILE); \ ++ fputs (reg_names[va_arg (ARGS, int)], FILE); \ ++ break; ++ ++#define CONSTANT_POOL_BEFORE_FUNCTION 0 ++ ++/* This definition should be relocated to aarch64-elf-raw.h. This macro ++ should be undefined in aarch64-linux.h and a clear_cache pattern ++ implmented to emit either the call to __aarch64_sync_cache_range() ++ directly or preferably the appropriate sycall or cache clear ++ instructions inline. */ ++#define CLEAR_INSN_CACHE(beg, end) \ ++ extern void __aarch64_sync_cache_range (void *, void *); \ ++ __aarch64_sync_cache_range (beg, end) ++ ++/* This should be integrated with the equivalent in the 32 bit ++ world. */ ++enum aarch64_builtins ++{ ++ AARCH64_BUILTIN_MIN, ++ AARCH64_BUILTIN_THREAD_POINTER, ++ AARCH64_SIMD_BUILTIN_BASE ++}; ++ ++/* VFP registers may only be accessed in the mode they ++ were set. */ ++#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ ++ (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ ++ ? reg_classes_intersect_p (FP_REGS, (CLASS)) \ ++ : 0) ++ ++ ++#define SHIFT_COUNT_TRUNCATED !TARGET_SIMD ++ ++/* Callee only saves lower 64-bits of a 128-bit register. Tell the ++ compiler the callee clobbers the top 64-bits when restoring the ++ bottom 64-bits. */ ++#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \ ++ (FP_REGNUM_P (REGNO) && GET_MODE_SIZE (MODE) > 8) ++ ++/* Check TLS Descriptors mechanism is selected. */ ++#define TARGET_TLS_DESC (aarch64_tls_dialect == TLS_DESCRIPTORS) ++ ++extern enum aarch64_code_model aarch64_cmodel; ++ ++/* When using the tiny addressing model conditional and unconditional branches ++ can span the whole of the available address space (1MB). */ ++#define HAS_LONG_COND_BRANCH \ ++ (aarch64_cmodel == AARCH64_CMODEL_TINY \ ++ || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC) ++ ++#define HAS_LONG_UNCOND_BRANCH \ ++ (aarch64_cmodel == AARCH64_CMODEL_TINY \ ++ || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC) ++ ++/* Modes valid for AdvSIMD Q registers. */ ++#define AARCH64_VALID_SIMD_QREG_MODE(MODE) \ ++ ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \ ++ || (MODE) == V4SFmode || (MODE) == V2DImode || mode == V2DFmode) ++ ++#endif /* GCC_AARCH64_H */ + +Property changes on: gcc/config/aarch64/aarch64.h +___________________________________________________________________ +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: gcc/config/aarch64/gentune.sh +=================================================================== +--- a/src/gcc/config/aarch64/gentune.sh (.../gcc-4_7-branch) ++++ b/src/gcc/config/aarch64/gentune.sh (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,32 @@ ++#!/bin/sh ++# ++# Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++# Generate aarch64-tune.md, a file containing the tune attribute from the list of ++# CPUs in aarch64-cores.def ++ ++echo ";; -*- buffer-read-only: t -*-" ++echo ";; Generated automatically by gentune.sh from aarch64-cores.def" ++ ++allcores=`awk -F'[(, ]+' '/^AARCH64_CORE/ { cores = cores$3"," } END { print cores } ' $1` ++ ++echo "(define_attr \"tune\"" ++echo " \"$allcores\"" | sed -e 's/,"$/"/' ++echo " (const (symbol_ref \"((enum attr_tune) aarch64_tune)\")))" + +Property changes on: gcc/config/aarch64/gentune.sh +___________________________________________________________________ +Added: svn:executable + + * +Added: svn:keywords + + Rev Date Author URL Id +Added: svn:eol-style + + native + +Index: config.sub +=================================================================== +--- a/src/config.sub (.../gcc-4_7-branch) ++++ b/src/config.sub (.../ARM/aarch64-4.7-branch) +@@ -2,9 +2,9 @@ + # Configuration validation subroutine script. + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, + # 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, +-# 2011 Free Software Foundation, Inc. ++# 2011, 2012 Free Software Foundation, Inc. + +-timestamp='2011-10-29' ++timestamp='2012-08-18' + + # This file is (in principle) common to ALL GNU software. + # The presence of a machine in this file suggests that SOME GNU software +@@ -21,9 +21,7 @@ + # GNU General Public License for more details. + # + # You should have received a copy of the GNU General Public License +-# along with this program; if not, write to the Free Software +-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA +-# 02110-1301, USA. ++# along with this program; if not, see . + # + # As a special exception to the GNU General Public License, if you + # distribute this file as part of a program that contains a +@@ -76,8 +74,8 @@ + GNU config.sub ($timestamp) + + Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, +-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free +-Software Foundation, Inc. ++2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 ++Free Software Foundation, Inc. + + This is free software; see the source for copying conditions. There is NO + warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." +@@ -125,13 +123,17 @@ + maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` + case $maybe_os in + nto-qnx* | linux-gnu* | linux-android* | linux-dietlibc | linux-newlib* | \ +- linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | \ ++ linux-musl* | linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | \ + knetbsd*-gnu* | netbsd*-gnu* | \ + kopensolaris*-gnu* | \ + storm-chaos* | os2-emx* | rtmk-nova*) + os=-$maybe_os + basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` + ;; ++ android-linux) ++ os=-linux-android ++ basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`-unknown ++ ;; + *) + basic_machine=`echo $1 | sed 's/-[^-]*$//'` + if [ $basic_machine != $1 ] +@@ -223,6 +225,12 @@ + -isc*) + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; ++ -lynx*178) ++ os=-lynxos178 ++ ;; ++ -lynx*5) ++ os=-lynxos5 ++ ;; + -lynx*) + os=-lynxos + ;; +@@ -247,6 +255,7 @@ + # Some are omitted here because they have special meanings below. + 1750a | 580 \ + | a29k \ ++ | aarch64 | aarch64_be \ + | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ + | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ + | am33_2.0 \ +@@ -319,8 +328,7 @@ + c6x) + basic_machine=tic6x-unknown + ;; +- m6811 | m68hc11 | m6812 | m68hc12 | picochip) +- # Motorola 68HC11/12. ++ m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | picochip) + basic_machine=$basic_machine-unknown + os=-none + ;; +@@ -333,7 +341,10 @@ + strongarm | thumb | xscale) + basic_machine=arm-unknown + ;; +- ++ xgate) ++ basic_machine=$basic_machine-unknown ++ os=-none ++ ;; + xscaleeb) + basic_machine=armeb-unknown + ;; +@@ -356,6 +367,7 @@ + # Recognize the basic CPU types with company name. + 580-* \ + | a29k-* \ ++ | aarch64-* | aarch64_be-* \ + | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ + | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ + | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \ +@@ -719,7 +731,6 @@ + i370-ibm* | ibm*) + basic_machine=i370-ibm + ;; +-# I'm not sure what "Sysv32" means. Should this be sysv3.2? + i*86v32) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-sysv32 +@@ -780,6 +791,10 @@ + microblaze) + basic_machine=microblaze-xilinx + ;; ++ mingw64) ++ basic_machine=x86_64-pc ++ os=-mingw64 ++ ;; + mingw32) + basic_machine=i386-pc + os=-mingw32 +@@ -816,6 +831,10 @@ + ms1-*) + basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'` + ;; ++ msys) ++ basic_machine=i386-pc ++ os=-msys ++ ;; + mvs) + basic_machine=i370-ibm + os=-mvs +@@ -1337,15 +1356,15 @@ + | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \ + | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \ + | -hiux* | -386bsd* | -knetbsd* | -mirbsd* | -netbsd* \ +- | -openbsd* | -solidbsd* \ ++ | -bitrig* | -openbsd* | -solidbsd* \ + | -ekkobsd* | -kfreebsd* | -freebsd* | -riscix* | -lynxos* \ + | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \ + | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \ + | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \ + | -chorusos* | -chorusrdb* | -cegcc* \ +- | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ +- | -mingw32* | -linux-gnu* | -linux-android* \ +- | -linux-newlib* | -linux-uclibc* \ ++ | -cygwin* | -msys* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ ++ | -mingw32* | -mingw64* | -linux-gnu* | -linux-android* \ ++ | -linux-newlib* | -linux-musl* | -linux-uclibc* \ + | -uxpv* | -beos* | -mpeix* | -udk* \ + | -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \ + | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \ +@@ -1528,6 +1547,9 @@ + c4x-* | tic4x-*) + os=-coff + ;; ++ hexagon-*) ++ os=-elf ++ ;; + tic54x-*) + os=-coff + ;; +@@ -1555,9 +1577,6 @@ + ;; + m68000-sun) + os=-sunos3 +- # This also exists in the configure program, but was not the +- # default. +- # os=-sunos4 + ;; + m68*-cisco) + os=-aout +Index: libcpp/configure +=================================================================== +--- a/src/libcpp/configure (.../gcc-4_7-branch) ++++ b/src/libcpp/configure (.../ARM/aarch64-4.7-branch) +@@ -7368,6 +7368,7 @@ + + + case $target in ++ aarch64*-*-* | \ + alpha*-*-* | \ + arm*-*-*eabi* | \ + arm*-*-symbianelf* | \ +Index: libcpp/configure.ac +=================================================================== +--- a/src/libcpp/configure.ac (.../gcc-4_7-branch) ++++ b/src/libcpp/configure.ac (.../ARM/aarch64-4.7-branch) +@@ -148,6 +148,7 @@ + + m4_changequote(,) + case $target in ++ aarch64*-*-* | \ + alpha*-*-* | \ + arm*-*-*eabi* | \ + arm*-*-symbianelf* | \ +Index: libcpp/ChangeLog.aarch64 +=================================================================== +--- a/src/libcpp/ChangeLog.aarch64 (.../gcc-4_7-branch) ++++ b/src/libcpp/ChangeLog.aarch64 (.../ARM/aarch64-4.7-branch) +@@ -0,0 +1,13 @@ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * configure.ac: Enable AArch64. ++ * configure: Regenerate. + +Property changes on: . +___________________________________________________________________ +Modified: svn:mergeinfo + Merged /branches/gcc-4_7-branch:r191148-191656,191658-192191 + --- gcc-4.7-4.7.2.orig/debian/patches/ibm-branch.diff +++ gcc-4.7-4.7.2/debian/patches/ibm-branch.diff @@ -0,0 +1,6 @@ +# DP: updates from the ibm/4.7 branch upto 2012xxxx (r175989). + +svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@175885 svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-4_6-branch \ + | sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \ + | awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0' + --- gcc-4.7-4.7.2.orig/debian/patches/arm-no-va_list-warn.diff +++ gcc-4.7-4.7.2/debian/patches/arm-no-va_list-warn.diff @@ -0,0 +1,31 @@ +# DP: Don't warn anymore that 4.4 has changed the `va_list' mangling. + +gcc/ + +2012-09-21 Matthias Klose + + * config/arm/arm.c (arm_mangle_type): Don't warn anymore that + 4.4 has changed the `va_list' mangling. + +Index: gcc/config/arm/arm.c +=================================================================== +--- a/src/gcc/config/arm/arm.c (revision 191609) ++++ b/src/gcc/config/arm/arm.c (revision 191610) +@@ -25072,16 +25072,7 @@ + has to be managled as if it is in the "std" namespace. */ + if (TARGET_AAPCS_BASED + && lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type)) +- { +- static bool warned; +- if (!warned && warn_psabi && !in_system_header) +- { +- warned = true; +- inform (input_location, +- "the mangling of % has changed in GCC 4.4"); +- } +- return "St9__va_list"; +- } ++ return "St9__va_list"; + + /* Half-precision float. */ + if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16) --- gcc-4.7-4.7.2.orig/debian/patches/pr45078.diff +++ gcc-4.7-4.7.2/debian/patches/pr45078.diff @@ -0,0 +1,36 @@ +# DP: Proposed patch for PR plugin/45078 + +2011-06-24 Matthias Klose + + PR plugin/45078 + * Makefile.in (PLUGIN_HEADERS): Add config/arm/arm-cores.def. + (install-plugin): Install c-family headers into a c-family subdir. + * config.gcc: Add vxworks-dummy.h to tm_file for arm, mips, sh and + sparc targets. + +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -4547,6 +4547,7 @@ + $(C_PRAGMA_H) $(CPPLIB_H) $(FUNCTION_H) \ + cppdefault.h flags.h $(MD5_H) params.def params.h prefix.h tree-inline.h \ + gimple-pretty-print.h tree-pretty-print.h realmpfr.h \ ++ config/arm/arm-cores.def \ + $(IPA_PROP_H) $(RTL_H) $(TM_P_H) $(CFGLOOP_H) $(EMIT_RTL_H) version.h + + # generate the 'build fragment' b-header-vars +Index: b/src/gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -486,6 +486,9 @@ + fi + tm_file="vxworks-dummy.h ${tm_file}" + ;; ++arm*-*-*|mips*-*-*|sh*-*-*|sparc*-*-*) ++ tm_file="vxworks-dummy.h ${tm_file}" ++ ;; + esac + + # On a.out targets, we need to use collect2. --- gcc-4.7-4.7.2.orig/debian/patches/libgo-fix-arm.diff +++ gcc-4.7-4.7.2/debian/patches/libgo-fix-arm.diff @@ -0,0 +1,14 @@ +# DP: libgo: Work around parse error of struct timex_ on ARM + +--- a/src/libgo/mksysinfo.sh ++++ b/src/libgo/mksysinfo.sh +@@ -137,6 +137,9 @@ + + ${CC} -fdump-go-spec=gen-sysinfo.go -std=gnu99 -S -o sysinfo.s sysinfo.c + ++# ARM ++sed -i '/type _timex/s/INVALID-bit-field/int32/g;/type _timex/s,^// ,,' gen-sysinfo.go ++ + echo 'package syscall' > ${OUT} + echo 'import "unsafe"' >> ${OUT} + echo 'type _ unsafe.Pointer' >> ${OUT} --- gcc-4.7-4.7.2.orig/debian/patches/libjava-disable-plugin.diff +++ gcc-4.7-4.7.2/debian/patches/libjava-disable-plugin.diff @@ -0,0 +1,13 @@ +# DP: Don't build the gcjwebplugin, even when configured with --enable-plugin + +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -65,6 +65,8 @@ + esac], + [browser_plugin_enabled=no] + ) ++# FIXME: don't build the plugin, this option collides with GCC plugin support ++plugin_enabled=no + + AC_ARG_ENABLE(gconf-peer, + AS_HELP_STRING([--enable-gconf-peer], --- gcc-4.7-4.7.2.orig/debian/patches/ada-sjlj.diff +++ gcc-4.7-4.7.2/debian/patches/ada-sjlj.diff @@ -0,0 +1,728 @@ +# DP: There are two exception mechanisms to choose from: zero-cost and +# DP: setjump/longjump. The Ada run-time library uses either of them +# DP: but not both. Build both versions of the run-time library. + +# This patch changes the way the upstream Makefiles build the run-time +# library. Before the patch: libada/Makefile calls gcc/ada/Makefile, +# which builds the "rts" subdirectory containing symbolic links to +# most source files, and modified copies of a few source files (to +# take target dependencies into account, and also to select the +# exception handling mechanism in system.ads). Then, gcc/ada/Makefile +# calls itself recursively but in the "rts" subdirectory and builds +# libgnat.a and libgnarl.a (and a couple other libraries: +# libgccprefix.a, libgmem.a). Upon return from this recursive call, +# it deletes the source and object files from "rts", reconstructs the +# source files, and builds libgnat.so and libgnarl.so by calling +# itself recursively a second time in the "rts" directory. + +# Furthermore, gcc/ada/Makefile disables parallel makes, so building +# the static and then shared versions of the RTS is entirely +# sequential even on SMP systems. + +# As a consequence of the above, building the SJLJ version of the +# library would overwrite the ZCX version. Thus it is necessary to +# manually save the previous version of the library before building the +# second one. + +# After the patch: libada/Makefile calls gcc/ada/Makefile, which +# builds the source directory (named gnatlib-sources instead of rts), +# containing the symbolic links and target-dependent files. + +# In a second step, libada/Makefile calls gcc/ada/Makefile again to +# build the targets gnatlib-shared-zcx, gnatlib-static-zcx and +# gnatlib-static-sjlj (we could also build gnatlib-shared-sjlj, but +# that triggers compiler errors on PowerPC). + +# Each of these three targets copies the source directory "rts" into a +# new directory named rts-shared-zcx, rts-static-zcx or +# rts-static-sjlj. In the new directory, they change the value of +# System.ZCX_By_Default, and then they call gcc/ada/Makefile +# recursively in the new directory to build the library. + +# gcc/ada/Makefile.in has a .NOTPARALLEL directive preventing it from +# launching commands in parallel. However, libada/Makefile has no +# such directive and can invoke up to three instances of +# gcc/ada/Makefile.in in parallel. This is okay because each of them +# runs in a different directory. + +# This patch also updates libgnat{vsn,prj}/Makefile and +# gnattools/Makefile to look for the shared ZCX version of the library +# in the appropriate directory, rather than just "rts", and updates +# the "make install" and binary targets as well. + +Index: b/src/libada/Makefile.in +=================================================================== +--- a/src/libada/Makefile.in ++++ b/src/libada/Makefile.in +@@ -16,7 +16,8 @@ + # . + + # Default target; must be first. +-all: gnatlib ++GNATLIB = gnatlib-static-zcx gnatlib-static-sjlj gnatlib-shared-zcx ++all: $(GNATLIB) + $(MULTIDO) $(AM_MAKEFLAGS) DO=all multi-do # $(MAKE) + + .PHONY: all +@@ -97,26 +98,28 @@ + "CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" + + # Rules to build gnatlib. +-.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared osconstool +-gnatlib: @default_gnatlib_target@ ++.PHONY: $(GNATLIB) osconstool + +-gnatlib-plain: osconstool $(GCC_DIR)/ada/Makefile +- test -f stamp-libada || \ +- $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) gnatlib \ +- && touch stamp-libada +- -rm -rf adainclude +- -rm -rf adalib +- $(LN_S) $(ADA_RTS_DIR) adainclude +- $(LN_S) $(ADA_RTS_DIR) adalib +- +-gnatlib-sjlj gnatlib-zcx gnatlib-shared: osconstool $(GCC_DIR)/ada/Makefile +- test -f stamp-libada || \ +- $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) $@ \ +- && touch stamp-libada +- -rm -rf adainclude +- -rm -rf adalib +- $(LN_S) $(ADA_RTS_DIR) adainclude +- $(LN_S) $(ADA_RTS_DIR) adalib ++$(GCC_DIR)/ada/gnatlib-sources-sjlj/a-except.ads: ++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) \ ++ EH_MECHANISM="" \ ++ gnatlib-sources-sjlj/a-except.ads ++ ++$(GCC_DIR)/ada/gnatlib-sources-zcx/a-except.ads: ++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) \ ++ EH_MECHANISM="-gcc" \ ++ gnatlib-sources-zcx/a-except.ads ++ ++$(GNATLIB): osconstool $(GCC_DIR)/ada/Makefile \ ++$(GCC_DIR)/ada/gnatlib-sources-zcx/a-except.ads \ ++$(GCC_DIR)/ada/gnatlib-sources-sjlj/a-except.ads ++ $(MAKE) -C $(GCC_DIR)/ada $(FLAGS_TO_PASS) \ ++ GNATLIBFLAGS="$(GNATLIBFLAGS)" \ ++ GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ ++ TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ ++ THREAD_KIND="$(THREAD_KIND)" \ ++ TRACE="$(TRACE)" \ ++ $@ + + osconstool: + $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) ./bldtools/oscons/xoscons +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -2234,57 +2234,75 @@ + a-[a-o]*.adb a-[p-z]*.adb a-[a-o]*.ads a-[p-z]*.ads g-*.ad? i-*.ad? \ + s-[a-o]*.adb s-[p-z]*.adb s-[a-o]*.ads s-[p-z]*.ads + +-../stamp-gnatlib-$(RTSDIR): +- @if [ ! -f stamp-gnatlib-$(RTSDIR) ] ; \ +- then \ +- $(ECHO) You must first build the GNAT library: make gnatlib; \ +- false; \ +- else \ +- true; \ +- fi ++libgnat = libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) ++libgnat-sjlj = libgnat$(hyphen)sjlj$(hyphen)$(LIBRARY_VERSION)$(soext) + +-install-gnatlib: ../stamp-gnatlib-$(RTSDIR) ++install-gnatlib: rts-static-zcx/libgnat$(arext) rts-static-sjlj/libgnat$(arext) ++install-gnatlib: rts-shared-zcx/$(libgnat) + # Create the directory before deleting it, in case the directory is + # a list of directories (as it may be on VMS). This ensures we are + # deleting the right one. +- -$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- $(RMDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- $(RMDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- for file in $(RTSDIR)/*.ali; do \ +- $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ ++ for file in rts-shared-zcx/*.ali; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ ++ done ++ for file in rts-static-sjlj/*.ali; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR); \ ++ done ++ ++ -cd rts-static-zcx; for file in *$(arext);do \ ++ $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ ++ $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR)/$$file; \ + done +- -cd $(RTSDIR); for file in *$(arext);do \ +- $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ +- $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_RTL_OBJ_DIR)/$$file; \ ++ -cd rts-static-sjlj; for file in *$(arext);do \ ++ $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR); \ ++ $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR)/$$file; \ + done ++ ++ -$(foreach file, $(EXTRA_ADALIB_FILES), \ ++ $(INSTALL_DATA_DATE) rts-static-zcx/$(file) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) && \ ++ ) true + -$(foreach file, $(EXTRA_ADALIB_FILES), \ +- $(INSTALL_DATA_DATE) $(RTSDIR)/$(file) $(DESTDIR)$(ADA_RTL_OBJ_DIR) && \ ++ $(INSTALL_DATA_DATE) rts-static-sjlj/$(file) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) && \ + ) true + # Install the shared libraries, if any, using $(INSTALL) instead + # of $(INSTALL_DATA). The latter may force a mode inappropriate + # for shared libraries on some targets, e.g. on HP-UX where the x + # permission is required. +-# Also install the .dSYM directories if they exist (these directories +-# contain the debug information for the shared libraries on darwin) + for file in gnat gnarl; do \ +- if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) ]; then \ +- $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ +- $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ +- fi; \ +- if [ -d $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM ]; then \ +- $(CP) -r $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM \ +- $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ ++ if [ -f rts-shared-zcx/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 ]; then \ ++ $(INSTALL) rts-shared-zcx/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ + fi; \ + done + # This copy must be done preserving the date on the original file. +- for file in $(RTSDIR)/*.ad?; do \ +- $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_INCLUDE_DIR); \ ++ for file in rts-shared-zcx/*.adb rts-shared-zcx/*.ads; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR); \ + done +- cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.adb +- cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.ads ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR)/*.adb ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR)/*.ads ++ for file in rts-static-sjlj/*.adb rts-static-sjlj/*.ads; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR); \ ++ done ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR)/*.adb ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR)/*.ads ++ ++ (cd $(DESTDIR)$(libsubdir); \ ++ ln -s rts-native/adainclude adainclude; \ ++ ln -s rts-native/adalib adalib;) + + # NOTE: The $(foreach ...) commands assume ";" is the valid separator between + # successive target commands. Although the Gnu make documentation +@@ -2295,30 +2313,37 @@ + + # GNULLI Begin ########################################################### + +-../stamp-gnatlib1-$(RTSDIR): Makefile +- $(RMDIR) $(RTSDIR) +- $(MKDIR) $(RTSDIR) +- $(CHMOD) u+w $(RTSDIR) ++replace_zcx_by_default=\ ++'s/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := $(zcx_by_default);/' ++ ++gnatlib-sources-zcx/a-except.ads: dir=$(dir $@) ++gnatlib-sources-zcx/a-except.ads: zcx_by_default=True ++ ++gnatlib-sources-sjlj/a-except.ads: dir=$(dir $@) ++gnatlib-sources-sjlj/a-except.ads: zcx_by_default=False ++ ++gnatlib-sources-zcx/a-except.ads gnatlib-sources-sjlj/a-except.ads: ++ $(MKDIR) $(dir) ++ $(CHMOD) u+w $(dir) + # Copy target independent sources + $(foreach f,$(ADA_INCLUDE_SRCS) $(LIBGNAT_SRCS), \ +- $(LN_S) $(fsrcpfx)ada/$(f) $(RTSDIR) ;) true ++ $(LN_S) $(fsrcpfx)ada/$(f) $(dir) ;) true + # Remove files to be replaced by target dependent sources + $(RM) $(foreach PAIR,$(LIBGNAT_TARGET_PAIRS), \ +- $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)))) +- for f in $(RTSDIR)/*-*-*.ads $(RTSDIR)/*-*-*.adb; do \ ++ $(dir)/$(word 1,$(subst <, ,$(PAIR)))) ++ for f in $(dir)/*-*-*.ads $(dir)/*-*-*.adb; do \ + case "$$f" in \ +- $(RTSDIR)/s-stratt-*) ;; \ ++ $(dir)/s-stratt-*) ;; \ + *) $(RM) $$f ;; \ + esac; \ + done + # Copy new target dependent sources + $(foreach PAIR,$(LIBGNAT_TARGET_PAIRS), \ + $(LN_S) $(fsrcpfx)ada/$(word 2,$(subst <, ,$(PAIR))) \ +- $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)));) ++ $(dir)/$(word 1,$(subst <, ,$(PAIR)));) ++ sed -e $(replace_zcx_by_default) $(dir)/system.ads > $(dir)/s.ads + # Copy tsystem.h +- $(CP) $(srcdir)/tsystem.h $(RTSDIR) +- $(RM) ../stamp-gnatlib-$(RTSDIR) +- touch ../stamp-gnatlib1-$(RTSDIR) ++ $(CP) $(srcdir)/tsystem.h $(dir) + + # GNULLI End ############################################################# + +@@ -2347,9 +2372,10 @@ + $(CP) $^ ./bldtools/oscons + (cd ./bldtools/oscons ; gnatmake -q xoscons) + +-$(RTSDIR)/s-oscons.ads: ../stamp-gnatlib1-$(RTSDIR) s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons +- $(RM) $(RTSDIR)/s-oscons-tmplt.i $(RTSDIR)/s-oscons-tmplt.s +- (cd $(RTSDIR) ; \ ++%/s-oscons.ads: dir = $(dir $@) ++%/s-oscons.ads: s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons ++ $(RM) $(dir)/s-oscons-tmplt.i $(dir)/s-oscons-tmplt.s ++ (cd $(dir) ; \ + $(OSCONS_CPP) ; \ + $(OSCONS_EXTRACT) ; \ + ../bldtools/oscons/xoscons) +@@ -2360,8 +2386,11 @@ + # Example: cd $(RTSDIR); ar rc libfoo.a $(LONG_LIST_OF_OBJS) + # is guaranteed to overflow the buffer. + +-gnatlib: ../stamp-gnatlib1-$(RTSDIR) $(RTSDIR)/s-oscons.ads +- $(MAKE) -C $(RTSDIR) \ ++%/libgnat$(arext): build_dir = $(dir $@) ++%/libgnat$(arext): libgnarl = $(subst libgnat,libgnarl,$@) ++%/libgnat$(arext): libgnala = $(subst libgnat,libgnala,$@) ++%/libgnat$(arext): % %/s-oscons.ads ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \ +@@ -2369,7 +2398,7 @@ + FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ + srcdir=$(fsrcdir) \ + -f ../Makefile $(LIBGNAT_OBJS) +- $(MAKE) -C $(RTSDIR) \ ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + ADA_INCLUDES="" \ +@@ -2377,35 +2406,37 @@ + ADAFLAGS="$(GNATLIBFLAGS)" \ + FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ + srcdir=$(fsrcdir) \ +- -f ../Makefile \ +- $(GNATRTL_OBJS) +- $(RM) $(RTSDIR)/libgnat$(arext) $(RTSDIR)/libgnarl$(arext) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnat$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) g-trasym.o convert_addresses.o) +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnat$(arext) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnarl$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_TASKING_OBJS)) +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnarl$(arext) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnala$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_LINEARALGEBRA_OBJS)) +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnala$(arext) ++ -f ../Makefile \ ++ $(GNATRTL_OBJS) ++ $(RM) $@ $(libgnarl) ++ $(AR_FOR_TARGET) $(AR_FLAGS) $@ \ ++ $(addprefix $(build_dir),$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) g-trasym.o convert_addresses.o) ++ $(RANLIB_FOR_TARGET) $@ ++ $(AR_FOR_TARGET) $(AR_FLAGS) $(libgnarl) \ ++ $(addprefix $(build_dir),$(GNATRTL_TASKING_OBJS)) ++ $(RANLIB_FOR_TARGET) $(libgnarl) ++ $(AR_FOR_TARGET) $(AR_FLAGS) $(libgnala) \ ++ $(addprefix $(build_dir),$(GNATRTL_LINEARALGEBRA_OBJS)) ++ $(RANLIB_FOR_TARGET) $(libgnala) + ifeq ($(GMEM_LIB),gmemlib) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgmem$(arext) \ +- $(RTSDIR)/memtrack.o +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgmem$(arext) ++ $(AR_FOR_TARGET) $(AR_FLAGS) $(build_dir)libgmem$(arext) \ ++ $(build_dir)memtrack.o ++ $(RANLIB_FOR_TARGET) $(build_dir)libgmem$(arext) + endif +- touch ../stamp-gnatlib-$(RTSDIR) + + # Warning: this target assumes that LIBRARY_VERSION has been set correctly. +-gnatlib-shared-default: ../stamp-gnatlib1-$(RTSDIR) +- $(MAKE) -C $(RTSDIR) \ ++%/$(libgnat) %/$(libgnat-sjlj): build_dir = $(dir $@) ++%/$(libgnat) %/$(libgnat-sjlj): libgnarl = $(notdir $(subst libgnat,libgnarl,$@)) ++%/$(libgnat) %/$(libgnat-sjlj): libgnala = $(notdir $(subst libgnat,libgnala,$@)) ++%/$(libgnat) %/$(libgnat-sjlj): % %/s-oscons.ads ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,^\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \ + CFLAGS="$(GNATLIBCFLAGS_FOR_C)" \ + srcdir=$(fsrcdir) \ + -f ../Makefile $(LIBGNAT_OBJS) +- $(MAKE) -C $(RTSDIR) \ ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,^\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + ADA_INCLUDES="" \ +@@ -2415,160 +2446,56 @@ + srcdir=$(fsrcdir) \ + -f ../Makefile \ + $(GNATRTL_OBJS) +- $(RM) $(RTSDIR)/libgna*$(soext) $(RTSDIR)/libgna*$(soext).1 +- cd $(RTSDIR); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ ++ $(RM) $(build_dir)/libgna*$(soext) $(build_dir)/libgna*$(soext).1 ++ cd $(build_dir); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ + $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ -o $(notdir $@).1 \ + $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ + g-trasym.o convert_addresses.o \ +- $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(SO_OPTS)$(notdir $@).1 \ + $(MISCLIB) -lm +- cd $(RTSDIR); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ ++ cd $(build_dir); $(LN_S) $(notdir $@).1 $(notdir $@) ++ cd $(build_dir); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ + $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ -o $(libgnarl).1 \ + $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(SO_OPTS)$(libgnarl).1 \ + $(THREADSLIB) +- cd $(RTSDIR); for lib in gnat gnarl; do \ +- l=lib$${lib}$(hyphen)$(LIBRARY_VERSION)$(soext); \ +- $(LN_S) $$l.1 $$l; \ +- done +-# Delete the object files, lest they be linked statically into the tools +-# executables. Only the .ali, .a and .so files must remain. +- rm -f $(RTSDIR)/*.o +- $(CHMOD) a-wx $(RTSDIR)/*.ali +- +-gnatlib-shared-dual: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib-shared-default +- +-gnatlib-shared-dual-win32: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(TARGET_LIBGCC2_CFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib-shared-win32 +- +-# ??? we need to add the option to support auto-import of arrays/records to +-# the GNATLIBFLAGS when this will be supported by GNAT. At this point we will +-# use the gnatlib-shared-dual-win32 target to build the GNAT runtimes on +-# Windows. +-gnatlib-shared-win32: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(TARGET_LIBGCC2_CFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgna*$(soext) +- cd $(RTSDIR); ../../xgcc -B../../ -shared -shared-libgcc \ +- $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ +- $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) $(MISCLIB) +- cd $(RTSDIR); ../../xgcc -B../../ -shared -shared-libgcc \ ++ cd $(build_dir); $(LN_S) $(libgnarl).1 $(libgnarl) ++# TODO: enable building the shared libgnala ++ifeq (libgnala-shared-enabled,yes) ++ cd $(build_dir); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ + $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(THREADSLIB) -Wl,libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- +-gnatlib-shared-darwin: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(TARGET_LIBGCC2_CFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) -fno-common" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgnat$(soext) $(RTSDIR)/libgnarl$(soext) +- cd $(RTSDIR); ../../xgcc -B../../ -dynamiclib $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ +- $(SO_OPTS) \ +- -Wl,-install_name,@rpath/libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(MISCLIB) -lm +- cd $(RTSDIR); ../../xgcc -B../../ -dynamiclib $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS) \ +- -Wl,-install_name,@rpath/libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(THREADSLIB) -Wl,libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- cd $(RTSDIR); $(LN_S) libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnat$(soext) +- cd $(RTSDIR); $(LN_S) libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnarl$(soext) +- cd $(RTSDIR); dsymutil libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- cd $(RTSDIR); dsymutil libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) ++ -o $(libgnala).1 \ ++ $(GNATRTL_LINEARALGEBRA_OBJS) \ ++ $(SO_OPTS)$(libgnala).1 ++ cd $(build_dir); $(LN_S) $(libgnala).1 $(libgnala) ++endif + +-gnatlib-shared-vms: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgna*$(soext) +- cd $(RTSDIR) && \ +- ../../gnatsym -s SYMVEC_$$$$.opt \ +- $(LIBGNAT_OBJS) $(GNATRTL_NONTASKING_OBJS) && \ +- ../../xgcc -g -B../../ -shared -shared-libgcc \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) libgnat.a \ +- sys\$$library:trace.exe \ +- --for-linker=/noinform \ +- --for-linker=SYMVEC_$$$$.opt \ +- --for-linker=gsmatch=equal,$(GSMATCH_VERSION) +- cd $(RTSDIR) && \ +- ../../gnatsym -s SYMVEC_$$$$.opt \ +- $(GNATRTL_TASKING_OBJS) && \ +- ../../xgcc -g -B../../ -shared -shared-libgcc \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnarl.a libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- sys\$$library:trace.exe \ +- --for-linker=/noinform \ +- --for-linker=SYMVEC_$$$$.opt \ +- --for-linker=gsmatch=equal,$(GSMATCH_VERSION) ++gnatlib-shared-dual: gnatlib-static-zcx gnatlib-static-sjlj gnatlib-shared-zcx + +-gnatlib-shared: ++gnatlib-shared-zcx: rts = $(subst gnatlib,rts,$@) ++gnatlib-shared-zcx: gnatlib-sources-zcx/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-zcx $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ ++ EH_MECHANISM="-gcc" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ + GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ + TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ +- $(GNATLIB_SHARED) ++ $(rts)/$(libgnat) + +-gnatlib-sjlj: +- $(MAKE) $(FLAGS_TO_PASS) EH_MECHANISM="" \ +- THREAD_KIND="$(THREAD_KIND)" ../stamp-gnatlib1-$(RTSDIR) +- sed -e 's/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := False;/' $(RTSDIR)/system.ads > $(RTSDIR)/s.ads +- $(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads ++gnatlib-static-sjlj: rts = $(subst gnatlib,rts,$@) ++gnatlib-static-sjlj: gnatlib-sources-sjlj/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-sjlj $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ + EH_MECHANISM="" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +@@ -2576,13 +2503,15 @@ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" gnatlib ++ TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ ++ $(rts)/libgnat$(arext) + +-gnatlib-zcx: +- $(MAKE) $(FLAGS_TO_PASS) EH_MECHANISM="-gcc" \ +- THREAD_KIND="$(THREAD_KIND)" ../stamp-gnatlib1-$(RTSDIR) +- sed -e 's/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := True;/' $(RTSDIR)/system.ads > $(RTSDIR)/s.ads +- $(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads ++gnatlib-static-zcx: rts = $(subst gnatlib,rts,$@) ++gnatlib-static-zcx: gnatlib-sources-zcx/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-zcx $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ + EH_MECHANISM="-gcc" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +@@ -2590,7 +2519,8 @@ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" gnatlib ++ TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ ++ $(rts)/libgnat$(arext) + + # .s files for cross-building + gnat-cross: force +@@ -2598,6 +2528,10 @@ + + ADA_INCLUDE_DIR = $(libsubdir)/adainclude + ADA_RTL_OBJ_DIR = $(libsubdir)/adalib ++ADA_NATIVE_INCLUDE_DIR = $(libsubdir)/rts-native/adainclude ++ADA_NATIVE_RTL_OBJ_DIR = $(libsubdir)/rts-native/adalib ++ADA_SJLJ_INCLUDE_DIR = $(libsubdir)/rts-sjlj/adainclude ++ADA_SJLJ_RTL_OBJ_DIR = $(libsubdir)/rts-sjlj/adalib + + # force no sibling call optimization on s-traceb.o so the number of stack + # frames to be skipped when computing a call chain is not modified by +Index: b/src/gnattools/Makefile.in +=================================================================== +--- a/src/gnattools/Makefile.in ++++ b/src/gnattools/Makefile.in +@@ -35,12 +35,13 @@ + LN_S=@LN_S@ + target_noncanonical=@target_noncanonical@ + ++RTS=../gcc/ada/rts-shared-zcx + CFLAGS=-O2 -Wall + ADA_CFLAGS=-O2 -gnatn +-ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts -I../libgnatvsn -I../libgnatprj ++ADA_INCLUDES=-nostdinc -I- -I. -I$(RTS) -I../libgnatvsn -I../libgnatprj + LIB_VERSION=$(strip $(shell grep ' Library_Version :' \ + ../libgnatvsn/gnatvsn.ads | sed -e 's/.*"\(.*\)".*/\1/')) +-ADA_LIBS := -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ADA_LIBS := -L$(RTS) -lgnat-$(LIB_VERSION) + ADA_LIBS += -L../libgnatvsn -lgnatvsn + ADA_LIBS += -L../libgnatprj -lgnatprj + +@@ -110,6 +111,7 @@ + + .PHONY: gnattools gnattools-native gnattools-cross regnattools + gnattools: @default_gnattools_target@ ++ (cd $(RTS); if [ -d obj ]; then mv obj/* .; rmdir obj; fi) + + BODIES := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.adb,$(f)))) + SPECS := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.ads,$(f)))) +@@ -120,9 +122,12 @@ + for file in $(BODIES) $(SPECS); do \ + $(LN_S) -f $$file .; \ + done ++# Move the RTS object files away lest they be linked statically into the ++# tools. Only the .ali, .a and .so files must remain. ++ (cd $(RTS); mkdir obj; mv *.o obj; chmod a-wx *.ali) + touch $@ + +-gnattools-native: ../gcc/ada/rts/libgnat-$(LIB_VERSION).so ++gnattools-native: $(RTS)/libgnat-$(LIB_VERSION).so + gnattools-native: ../libgnatvsn/libgnatvsn.so + gnattools-native: stamp-gnattools-sources + gnattools-native: $(TOOLS) +@@ -138,7 +143,7 @@ + $(GCC) -o $@ $^ \ + ../libgnatprj/libgnatprj.a \ + ../libgnatvsn/libgnatvsn.a \ +- ../gcc/ada/rts/libgnat.a \ ++ ../gcc/ada/rts-static-zcx/libgnat.a \ + ../libiberty/libiberty.a + + gnatlink: $(GNATLINK_OBJS) b_gnatl.o +@@ -156,7 +161,7 @@ + $(GCC) -o $@ $(ADA_CFLAGS) $^ \ + ../libgnatprj/libgnatprj.a \ + ../libgnatvsn/libgnatvsn.a \ +- ../gcc/ada/rts/libgnat.a \ ++ ../gcc/ada/rts-static-zcx/libgnat.a \ + ../libiberty/libiberty.a + + gnatmake: $(GNATMAKE_OBJS) b_gnatm.o +Index: b/src/libgnatprj/Makefile.in +=================================================================== +--- a/src/libgnatprj/Makefile.in ++++ b/src/libgnatprj/Makefile.in +@@ -25,7 +25,8 @@ + @srcdir@/../gcc/ada/gnatvsn.ads | \ + sed -e 's/.*"\(.*\)".*/\1/')) + GCC:=../gcc/xgcc -B../gcc/ +-LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++RTS:=../gcc/ada/rts-shared-zcx ++LIBGNAT_JUST_BUILT := -nostdinc -I$(RTS) + LIBGNATVSN := -I../libgnatvsn + CFLAGS := -g -O2 + ADAFLAGS := -g -O2 -gnatn +@@ -70,7 +71,7 @@ + libgnatprj.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) + : # Make libgnatprj.so + $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ +- -L../gcc/ada/rts -lgnat-$(LIB_VERSION) \ ++ -L$(RTS) -lgnat-$(LIB_VERSION) \ + -L../libgnatvsn -lgnatvsn + $(LN_S) -f libgnatprj.so.$(LIB_VERSION) libgnatprj.so + chmod a=r obj-shared/*.ali +Index: b/src/libgnatvsn/Makefile.in +=================================================================== +--- a/src/libgnatvsn/Makefile.in ++++ b/src/libgnatvsn/Makefile.in +@@ -25,7 +25,8 @@ + @srcdir@/../gcc/ada/gnatvsn.ads | \ + sed -e 's/.*"\(.*\)".*/\1/')) + GCC:=../gcc/xgcc -B../gcc/ +-LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++RTS:=../gcc/ada/rts-shared-zcx ++LIBGNAT_JUST_BUILT := -nostdinc -I$(RTS) + CFLAGS := -g -O2 -gnatn + BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) + DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) +@@ -66,7 +67,7 @@ + libgnatvsn.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) + : # Make libgnatvsn.so + $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ +- -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ -L$(RTS) -lgnat-$(LIB_VERSION) + ln -s libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so + chmod a=r obj-shared/*.ali + # Make the .ali files, but not the .o files, visible to the gnat tools. +Index: b/src/gcc/ada/gcc-interface/Make-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Make-lang.in ++++ b/src/gcc/ada/gcc-interface/Make-lang.in +@@ -70,7 +70,8 @@ + "ADA_FOR_TARGET=$(ADA_FOR_TARGET)" \ + "INSTALL=$(INSTALL)" \ + "INSTALL_DATA=$(INSTALL_DATA)" \ +- "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" ++ "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" \ ++ "GCC_FOR_TARGET=$(GCC_FOR_TARGET)" + + # Say how to compile Ada programs. + .SUFFIXES: .ada .adb .ads --- gcc-4.7-4.7.2.orig/debian/patches/ada-libgnatprj.diff +++ gcc-4.7-4.7.2/debian/patches/ada-libgnatprj.diff @@ -0,0 +1,1686 @@ +# DP: - Introduce a new shared library named libgnatprj, containing +# DP: the GNAT project file manager licensed under the pure GPL, for +# DP: use in GNAT tools, GLADE and GPS. Link the GNAT tools against +# DP: this new library. + +# This patch seems large, but the hunks in Makefile.in are actually +# generated from Makefile.def using autogen. + +# !!! Must be applied after ada-libgnatvsn.dpatch + +Index: b/src/gcc/ada/gcc-interface/config-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/config-lang.in ++++ b/src/gcc/ada/gcc-interface/config-lang.in +@@ -36,8 +36,8 @@ + + outputs="ada/gcc-interface/Makefile ada/Makefile" + +-target_libs="target-libada target-libgnatvsn" +-lang_dirs="libada libgnatvsn gnattools" ++target_libs="target-libada target-libgnatvsn target-libgnatprj" ++lang_dirs="libada libgnatvsn libgnatprj gnattools" + + # Ada is not enabled by default for the time being. + build_by_default=no +Index: b/src/gnattools/Makefile.in +=================================================================== +--- a/src/gnattools/Makefile.in ++++ b/src/gnattools/Makefile.in +@@ -36,13 +36,13 @@ + target_noncanonical=@target_noncanonical@ + + CFLAGS=-O2 -Wall +-INCLUDES = -I@srcdir@/../gcc/ada -I@srcdir@/../gcc + ADA_CFLAGS=-O2 -gnatn +-ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts -I../libgnatvsn ++ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts -I../libgnatvsn -I../libgnatprj + LIB_VERSION=$(strip $(shell grep ' Library_Version :' \ + ../libgnatvsn/gnatvsn.ads | sed -e 's/.*"\(.*\)".*/\1/')) + ADA_LIBS := -L../gcc/ada/rts -lgnat-$(LIB_VERSION) + ADA_LIBS += -L../libgnatvsn -lgnatvsn ++ADA_LIBS += -L../libgnatprj -lgnatprj + + # We will use the just-built compiler to compile and link everything. + GCC=../gcc/xgcc -B../gcc/ +@@ -67,74 +67,18 @@ + + # Since we don't have gnatmake, we must specify the full list of + # object files necessary to build gnatmake and gnatlink. +-# TODO: remove from these lists the objects that are part of +-# libgnatprj. + GNATLINK_OBJS = \ +-ali.o \ +-butil.o \ +-fmap.o \ + gnatlink.o \ + indepsw.o \ +-osint.o \ +-prefix.o \ +-rident.o \ +-sdefault.o \ +-stylesw.o \ +-switch.o \ +-targparm.o \ + validsw.o + + GNATMAKE_OBJS = \ +-ali-util.o \ +-ali.o \ +-binderr.o \ +-butil.o \ +-err_vars.o \ +-erroutc.o \ +-errutil.o \ +-fmap.o \ + fname-sf.o \ +-fname-uf.o \ + gnatmake.o \ + make.o \ + makeusg.o \ +-makeutl.o \ +-mlib-fil.o \ + mlib-prj.o \ +-mlib-tgt.o \ +-mlib-tgt-specific.o \ +-mlib-utl.o \ +-mlib.o \ + osint-m.o \ +-osint.o \ +-prefix.o \ +-prj-attr-pm.o \ +-prj-attr.o \ +-prj-com.o \ +-prj-dect.o \ +-prj-env.o \ +-prj-err.o \ +-prj-ext.o \ +-prj-nmsc.o \ +-prj-pars.o \ +-prj-part.o \ +-prj-proc.o \ +-prj-strt.o \ +-prj-tree.o \ +-prj-util.o \ +-prj.o \ +-rident.o \ +-scng.o \ +-sdefault.o \ +-sfn_scan.o \ +-sinput-c.o \ +-sinput-p.o \ +-styleg.o \ +-stylesw.o \ +-switch-m.o \ +-switch.o \ +-targparm.o \ +-tempdir.o \ + usage.o \ + validsw.o \ + $(EXTRA_GNATMAKE_OBJS) +@@ -176,11 +120,6 @@ + for file in $(BODIES) $(SPECS); do \ + $(LN_S) -f $$file .; \ + done +- rm -f sdefault.adb; $(LN_S) ../gcc/ada/sdefault.adb . +- $(foreach PAIR,$(TOOLS_TARGET_PAIRS), \ +- rm -f $(word 1,$(subst <, ,$(PAIR)));\ +- $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \ +- $(word 1,$(subst <, ,$(PAIR)));) + touch $@ + + gnattools-native: ../gcc/ada/rts/libgnat-$(LIB_VERSION).so +@@ -193,19 +132,16 @@ + vpath %.c @srcdir@/../gcc/ada:@srcdir@/../gcc + vpath %.h @srcdir@/../gcc/ada + +-# Because the just-built gcc is a host tool like us, we can use some +-# of its object files, e.g. prefix.o. +-vpath prefix.o ../gcc +- + # gnatlink + +-gnatlink-static: $(GNATLINK_OBJS) b_gnatl.o link.o ++gnatlink-static: $(GNATLINK_OBJS) b_gnatl.o + $(GCC) -o $@ $^ \ ++ ../libgnatprj/libgnatprj.a \ + ../libgnatvsn/libgnatvsn.a \ + ../gcc/ada/rts/libgnat.a \ + ../libiberty/libiberty.a + +-gnatlink: $(GNATLINK_OBJS) b_gnatl.o link.o ++gnatlink: $(GNATLINK_OBJS) b_gnatl.o + $(GCC) -o $@ $^ $(ADA_LIBS) ../libiberty/libiberty.a + + b_gnatl.o: b_gnatl.c adaint.h +@@ -216,13 +152,14 @@ + + # gnatmake + +-gnatmake-static: $(GNATMAKE_OBJS) b_gnatm.o link.o ++gnatmake-static: $(GNATMAKE_OBJS) b_gnatm.o + $(GCC) -o $@ $(ADA_CFLAGS) $^ \ ++ ../libgnatprj/libgnatprj.a \ + ../libgnatvsn/libgnatvsn.a \ + ../gcc/ada/rts/libgnat.a \ + ../libiberty/libiberty.a + +-gnatmake: $(GNATMAKE_OBJS) b_gnatm.o link.o ++gnatmake: $(GNATMAKE_OBJS) b_gnatm.o + $(GCC) -o $@ $(ADA_CFLAGS) $^ $(ADA_LIBS) ../libiberty/libiberty.a + + b_gnatm.o: b_gnatm.c adaint.h +@@ -232,19 +169,11 @@ + ../gcc/gnatbind -C -o $@ $(ADA_INCLUDES) gnatmake.ali + + # Other tools +-gnatkr: +- if [ ! -f $@.adb ] ; then $(LN_S) ../../src/gcc/ada/$@.ad[bs] .; fi +- ./gnatmake-static -c -b $@ $(ADA_CFLAGS) $(ADA_INCLUDES) \ +- --GCC="$(GCC)" \ +- --GNATBIND=../gcc/gnatbind +- ./gnatlink-static -o $@ $@.ali $^ $(ADA_INCLUDES) $(ADA_LIBS) \ +- --GCC="$(GCC) $(ADA_INCLUDES)" +- + gnat: gnatcmd + cp -lp $< $@ + +-gnatbind gnatchop gnatclean gnatcmd gnatfind gnatls gnatname gnatprep gnatxref: \ +-link.o prefix.o ++gnatbind gnatchop gnatclean gnatcmd gnatfind gnatkr gnatls gnatname gnatprep \ ++gnatxref: + if [ ! -f $@.adb ] ; then $(LN_S) ../../src/gcc/ada/$@.ad[bs] .; fi + ./gnatmake-static -c -b $@ $(ADA_CFLAGS) $(ADA_INCLUDES) \ + --GCC="$(GCC)" \ +@@ -253,22 +182,12 @@ + ../libiberty/libiberty.a \ + --GCC="$(GCC) $(ADA_INCLUDES)" + +-# Force compiling sdefault.adb, not .ads, to produce sdefault.o +-sdefault.o: sdefault.adb +- +-sdefault.adb: stamp-gnattools-sources +- + %.o: %.adb + $(GCC) -c -o $@ $< $(ADA_CFLAGS) $(ADA_INCLUDES) + + %.o: %.ads + $(GCC) -c -o $@ $< $(ADA_CFLAGS) $(ADA_INCLUDES) + +-%.o: %.c +- $(GCC) -c -o $@ $< $(CFLAGS) $(INCLUDES) +- +-prefix.o: +- + # Other + # ----- + +Index: b/src/libgnatprj/Makefile.in +=================================================================== +--- /dev/null ++++ b/src/libgnatprj/Makefile.in +@@ -0,0 +1,178 @@ ++# Makefile for libgnatprj. ++# Copyright (c) 2006 Ludovic Brenta ++# ++# This file is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ ++# Default target; must be first. ++all: libgnatprj ++ ++.SUFFIXES: ++ ++CPUS := $(shell getconf _NPROCESSORS_ONLN) ++LIB_VERSION := $(strip $(shell grep ' Library_Version :' \ ++ @srcdir@/../gcc/ada/gnatvsn.ads | \ ++ sed -e 's/.*"\(.*\)".*/\1/')) ++GCC:=../gcc/xgcc -B../gcc/ ++LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++LIBGNATVSN := -I../libgnatvsn ++CFLAGS := -g -O2 ++ADAFLAGS := -g -O2 -gnatn ++BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) ++DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) ++DATESTAMP := $(shell cat @srcdir@/../gcc/DATESTAMP) ++TOOLS_TARGET_PAIRS := @TOOLS_TARGET_PAIRS@ ++LN_S := @LN_S@ ++ ++ifneq (@build@,@host@) ++ CFLAGS += -b @host@ ++endif ++ ++.PHONY: libgnatprj install ++libgnatprj: libgnatprj.so.$(LIB_VERSION) libgnatprj.a ++ ++# Here we list one file per Ada unit: the body file if the unit has a ++# body, the spec file otherwise. ++PRJ_SOURCES := ali.adb ali-util.adb butil.adb binderr.adb errout.adb \ ++erroutc.adb errutil.adb err_vars.ads fname-uf.adb fmap.adb impunit.adb \ ++lib-util.adb makeutl.adb mlib.adb mlib-fil.adb mlib-tgt.adb \ ++mlib-tgt-specific.adb mlib-utl.adb osint.adb osint-c.adb prj.adb prj-attr.adb \ ++prj-attr-pm.adb prj-com.ads prj-conf.adb prj-dect.adb prj-env.adb prj-err.adb \ ++prj-ext.adb prj-nmsc.adb prj-pars.adb prj-part.adb prj-pp.adb prj-proc.adb \ ++prj-strt.adb prj-tree.adb prj-util.adb rident.ads scng.adb sfn_scan.adb \ ++sinfo-cn.adb sinput-c.adb sinput-p.adb style.adb styleg.adb stylesw.adb \ ++switch.adb switch-m.adb targparm.adb tempdir.adb ++ ++# Source files generated in build/gcc/ada, not src/gcc/ada. ++GENERATED_SOURCES := sdefault.adb ++ ++SOURCES := $(PRJ_SOURCES) $(GENERATED_SOURCES) ++ ++OBJECTS := $(patsubst %.ads,%.o,$(SOURCES:.adb=.o)) ++ ++# Add some object files compiled from C sources. prefix.o requires ++# some objects from libiberty. ++OBJECTS += concat.o link.o prefix.o xexit.o xmalloc.o xstrdup.o ++ ++vpath %.c @srcdir@/../gcc/ada ++ ++libgnatprj.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) ++ : # Make libgnatprj.so ++ $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ ++ -L../gcc/ada/rts -lgnat-$(LIB_VERSION) \ ++ -L../libgnatvsn -lgnatvsn ++ $(LN_S) -f libgnatprj.so.$(LIB_VERSION) libgnatprj.so ++ chmod a=r obj-shared/*.ali ++# Make the .ali files, but not the .o files, visible to the gnat tools. ++ cp -lp obj-shared/*.ali . ++ ++$(addprefix obj-shared/,$(OBJECTS)): | stamp-libgnatprj-sources obj-shared ++ ++obj-shared/%.o: %.adb ++ $(GCC) -c -fPIC $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-shared/%.o: %.ads ++ $(GCC) -c -fPIC $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-shared/%.o: %.c ++ $(GCC) -c -fPIC $(CFLAGS) -I@srcdir@/../gcc $< -o $@ ++ ++obj-shared/prefix.o: @srcdir@/../gcc/prefix.c ++ $(GCC) -c -fPIC $(CFLAGS) -DPREFIX=\"@prefix@\" -DBASEVER=\"$(BASEVER)\" \ ++ -I@srcdir@/../gcc -I@srcdir@/../include -I../gcc -I../libiberty \ ++ $< -o $@ ++ ++obj-shared/%.o: @srcdir@/../libiberty/%.c ++ $(GCC) -c -fPIC $(CFLAGS) \ ++ -I@srcdir@/../libiberty -I@srcdir@/../include $< -o $@ ++ ++obj-shared: ++ -mkdir $@ ++ ++libgnatprj.a: $(addprefix obj-static/,$(OBJECTS)) ++ : # Make libgnatprj.a ++ ar rc $@ $^ ++ ranlib $@ ++ ++$(addprefix obj-static/,$(OBJECTS)): | stamp-libgnatprj-sources obj-static ++ ++obj-static/%.o: %.adb ++ $(GCC) -c $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-static/%.o: %.ads ++ $(GCC) -c $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-static/%.o: %.c ++ $(GCC) -c $(CFLAGS) -I@srcdir@/../gcc $< -o $@ ++ ++obj-static/prefix.o: @srcdir@/../gcc/prefix.c ++ $(GCC) -c $(CFLAGS) -DPREFIX=\"@prefix@\" -DBASEVER=\"$(BASEVER)\" \ ++ -I@srcdir@/../gcc -I@srcdir@/../include -I../gcc -I../libiberty \ ++ $< -o $@ ++ ++obj-static/%.o: @srcdir@/../libiberty/%.c ++ $(GCC) -c -fPIC $(CFLAGS) \ ++ -I@srcdir@/../libiberty -I@srcdir@/../include $< -o $@ ++ ++obj-static: ++ -mkdir $@ ++ ++$(SOURCES): stamp-libgnatprj-sources ++ ++stamp-libgnatprj-sources: ++ for file in $(PRJ_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f @srcdir@/../gcc/ada/$$file -a ! -L $$file ] ; then $(LN_S) @srcdir@/../gcc/ada/$$file .; fi; \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) @srcdir@/../gcc/ada/$$ads .; fi; \ ++ done ++ for file in $(GENERATED_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f ../gcc/ada/$$file -a ! -L $$file ] ; then $(LN_S) ../gcc/ada/$$file .; fi; \ ++ if [ -f ../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) ../gcc/ada/$$ads .; \ ++ else \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) @srcdir@/../gcc/ada/$$ads .; fi; \ ++ fi; \ ++ done ++ $(foreach PAIR,$(TOOLS_TARGET_PAIRS), \ ++ rm -f $(word 1,$(subst <, ,$(PAIR)));\ ++ $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \ ++ $(word 1,$(subst <, ,$(PAIR)));) ++ touch $@ ++ ++# Generate a list of source files (.ads and .adb) to install. Almost ++# all of them are in src/gcc/ada, but some are generated during build ++# and are in build/gcc/ada. ++BODIES := $(filter %.adb,$(PRJ_SOURCES)) ++SPECS := $(filter %.ads,$(PRJ_SOURCES)) $(patsubst %.adb,%.ads,$(BODIES) $(GENERATED_SOURCES)) ++SOURCES_TO_INSTALL := \ ++$(addprefix @srcdir@/../gcc/ada/,$(SPECS) $(BODIES)) \ ++$(addprefix ../gcc/ada/,$(GENERATED_SOURCES)) ++ ++libdir = @libdir@ ++ ++install: libgnatprj ++ $(INSTALL_DATA) libgnatprj.a $(DESTDIR)$(libdir) ++ $(INSTALL_DATA) libgnatprj.so.$(LIB_VERSION) $(DESTDIR)$(libdir) ++ cd $(DESTDIR)$(libdir); ln -sf libgnatprj.so.$(LIB_VERSION) libgnatprj.so ++ mkdir -p $(DESTDIR)$(prefix)/share/ada/adainclude/gnatprj ++ $(INSTALL_DATA) $(SOURCES_TO_INSTALL) \ ++ $(DESTDIR)$(prefix)/share/ada/adainclude/gnatprj ++ mkdir -p $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj ++ $(INSTALL) -m 0444 obj-shared/*.ali \ ++ $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj ++ chmod a=r $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj/*.ali ++ ++.PHONY: clean ++clean: ++ rm -rf *.ali obj-static obj-shared libgnatprj* *.adb *.ads stamp* +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -158,6 +158,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++host_modules= { module= libgnatprj; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + host_modules= { module= gnattools; no_check=true; + missing= info; + missing= dvi; +@@ -210,6 +217,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++target_modules = { module= libgnatprj; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; }; + + // These are (some of) the make targets to be done in each subdirectory. +@@ -397,7 +411,10 @@ + + dependencies = { module=all-gnattools; on=all-libada; }; + dependencies = { module=all-gnattools; on=all-libgnatvsn; }; ++dependencies = { module=all-gnattools; on=all-libgnatprj; }; + dependencies = { module=all-libgnatvsn; on=all-libada; }; ++dependencies = { module=all-libgnatprj; on=all-libada; }; ++dependencies = { module=all-libgnatprj; on=all-libgnatvsn; }; + + dependencies = { module=all-lto-plugin; on=all-libiberty; }; + +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -952,6 +952,7 @@ + maybe-configure-utils \ + maybe-configure-libada \ + maybe-configure-libgnatvsn \ ++ maybe-configure-libgnatprj \ + maybe-configure-gnattools \ + maybe-configure-lto-plugin + .PHONY: configure-target +@@ -979,6 +980,7 @@ + maybe-configure-target-rda \ + maybe-configure-target-libada \ + maybe-configure-target-libgnatvsn \ ++ maybe-configure-target-libgnatprj \ + maybe-configure-target-libgomp + + # The target built for a native non-bootstrap build. +@@ -1132,6 +1134,7 @@ + all-host: maybe-all-utils + all-host: maybe-all-libada + all-host: maybe-all-libgnatvsn ++all-host: maybe-all-libgnatprj + all-host: maybe-all-gnattools + @if lto-plugin-no-bootstrap + all-host: maybe-all-lto-plugin +@@ -1166,6 +1169,7 @@ + all-target: maybe-all-target-rda + all-target: maybe-all-target-libada + all-target: maybe-all-target-libgnatvsn ++all-target: maybe-all-target-libgnatprj + @if target-libgomp-no-bootstrap + all-target: maybe-all-target-libgomp + @endif target-libgomp-no-bootstrap +@@ -1264,6 +1268,7 @@ + info-host: maybe-info-utils + info-host: maybe-info-libada + info-host: maybe-info-libgnatvsn ++info-host: maybe-info-libgnatprj + info-host: maybe-info-gnattools + info-host: maybe-info-lto-plugin + +@@ -1292,6 +1297,7 @@ + info-target: maybe-info-target-rda + info-target: maybe-info-target-libada + info-target: maybe-info-target-libgnatvsn ++info-target: maybe-info-target-libgnatprj + info-target: maybe-info-target-libgomp + + .PHONY: do-dvi +@@ -1383,6 +1389,7 @@ + dvi-host: maybe-dvi-utils + dvi-host: maybe-dvi-libada + dvi-host: maybe-dvi-libgnatvsn ++dvi-host: maybe-dvi-libgnatprj + dvi-host: maybe-dvi-gnattools + dvi-host: maybe-dvi-lto-plugin + +@@ -1411,6 +1418,7 @@ + dvi-target: maybe-dvi-target-rda + dvi-target: maybe-dvi-target-libada + dvi-target: maybe-dvi-target-libgnatvsn ++dvi-target: maybe-dvi-target-libgnatprj + dvi-target: maybe-dvi-target-libgomp + + .PHONY: do-pdf +@@ -1502,6 +1510,7 @@ + pdf-host: maybe-pdf-utils + pdf-host: maybe-pdf-libada + pdf-host: maybe-pdf-libgnatvsn ++pdf-host: maybe-pdf-libgnatprj + pdf-host: maybe-pdf-gnattools + pdf-host: maybe-pdf-lto-plugin + +@@ -1530,6 +1539,7 @@ + pdf-target: maybe-pdf-target-rda + pdf-target: maybe-pdf-target-libada + pdf-target: maybe-pdf-target-libgnatvsn ++pdf-target: maybe-pdf-target-libgnatprj + pdf-target: maybe-pdf-target-libgomp + + .PHONY: do-html +@@ -1621,6 +1631,7 @@ + html-host: maybe-html-utils + html-host: maybe-html-libada + html-host: maybe-html-libgnatvsn ++html-host: maybe-html-libgnatprj + html-host: maybe-html-gnattools + html-host: maybe-html-lto-plugin + +@@ -1649,6 +1660,7 @@ + html-target: maybe-html-target-rda + html-target: maybe-html-target-libada + html-target: maybe-html-target-libgnatvsn ++html-target: maybe-html-target-libgnatprj + html-target: maybe-html-target-libgomp + + .PHONY: do-TAGS +@@ -1740,6 +1752,7 @@ + TAGS-host: maybe-TAGS-utils + TAGS-host: maybe-TAGS-libada + TAGS-host: maybe-TAGS-libgnatvsn ++TAGS-host: maybe-TAGS-libgnatprj + TAGS-host: maybe-TAGS-gnattools + TAGS-host: maybe-TAGS-lto-plugin + +@@ -1768,6 +1781,7 @@ + TAGS-target: maybe-TAGS-target-rda + TAGS-target: maybe-TAGS-target-libada + TAGS-target: maybe-TAGS-target-libgnatvsn ++TAGS-target: maybe-TAGS-target-libgnatprj + TAGS-target: maybe-TAGS-target-libgomp + + .PHONY: do-install-info +@@ -1859,6 +1873,7 @@ + install-info-host: maybe-install-info-utils + install-info-host: maybe-install-info-libada + install-info-host: maybe-install-info-libgnatvsn ++install-info-host: maybe-install-info-libgnatprj + install-info-host: maybe-install-info-gnattools + install-info-host: maybe-install-info-lto-plugin + +@@ -1887,6 +1902,7 @@ + install-info-target: maybe-install-info-target-rda + install-info-target: maybe-install-info-target-libada + install-info-target: maybe-install-info-target-libgnatvsn ++install-info-target: maybe-install-info-target-libgnatprj + install-info-target: maybe-install-info-target-libgomp + + .PHONY: do-install-pdf +@@ -1978,6 +1994,7 @@ + install-pdf-host: maybe-install-pdf-utils + install-pdf-host: maybe-install-pdf-libada + install-pdf-host: maybe-install-pdf-libgnatvsn ++install-pdf-host: maybe-install-pdf-libgnatprj + install-pdf-host: maybe-install-pdf-gnattools + install-pdf-host: maybe-install-pdf-lto-plugin + +@@ -2006,6 +2023,7 @@ + install-pdf-target: maybe-install-pdf-target-rda + install-pdf-target: maybe-install-pdf-target-libada + install-pdf-target: maybe-install-pdf-target-libgnatvsn ++install-pdf-target: maybe-install-pdf-target-libgnatprj + install-pdf-target: maybe-install-pdf-target-libgomp + + .PHONY: do-install-html +@@ -2097,6 +2115,7 @@ + install-html-host: maybe-install-html-utils + install-html-host: maybe-install-html-libada + install-html-host: maybe-install-html-libgnatvsn ++install-html-host: maybe-install-html-libgnatprj + install-html-host: maybe-install-html-gnattools + install-html-host: maybe-install-html-lto-plugin + +@@ -2125,6 +2144,7 @@ + install-html-target: maybe-install-html-target-rda + install-html-target: maybe-install-html-target-libada + install-html-target: maybe-install-html-target-libgnatvsn ++install-html-target: maybe-install-html-target-libgnatprj + install-html-target: maybe-install-html-target-libgomp + + .PHONY: do-installcheck +@@ -2216,6 +2236,7 @@ + installcheck-host: maybe-installcheck-utils + installcheck-host: maybe-installcheck-libada + installcheck-host: maybe-installcheck-libgnatvsn ++installcheck-host: maybe-installcheck-libgnatprj + installcheck-host: maybe-installcheck-gnattools + installcheck-host: maybe-installcheck-lto-plugin + +@@ -2244,6 +2265,7 @@ + installcheck-target: maybe-installcheck-target-rda + installcheck-target: maybe-installcheck-target-libada + installcheck-target: maybe-installcheck-target-libgnatvsn ++installcheck-target: maybe-installcheck-target-libgnatprj + installcheck-target: maybe-installcheck-target-libgomp + + .PHONY: do-mostlyclean +@@ -2335,6 +2357,7 @@ + mostlyclean-host: maybe-mostlyclean-utils + mostlyclean-host: maybe-mostlyclean-libada + mostlyclean-host: maybe-mostlyclean-libgnatvsn ++mostlyclean-host: maybe-mostlyclean-libgnatprj + mostlyclean-host: maybe-mostlyclean-gnattools + mostlyclean-host: maybe-mostlyclean-lto-plugin + +@@ -2363,6 +2386,7 @@ + mostlyclean-target: maybe-mostlyclean-target-rda + mostlyclean-target: maybe-mostlyclean-target-libada + mostlyclean-target: maybe-mostlyclean-target-libgnatvsn ++mostlyclean-target: maybe-mostlyclean-target-libgnatprj + mostlyclean-target: maybe-mostlyclean-target-libgomp + + .PHONY: do-clean +@@ -2454,6 +2478,7 @@ + clean-host: maybe-clean-utils + clean-host: maybe-clean-libada + clean-host: maybe-clean-libgnatvsn ++clean-host: maybe-clean-libgnatprj + clean-host: maybe-clean-gnattools + clean-host: maybe-clean-lto-plugin + +@@ -2482,6 +2507,7 @@ + clean-target: maybe-clean-target-rda + clean-target: maybe-clean-target-libada + clean-target: maybe-clean-target-libgnatvsn ++clean-target: maybe-clean-target-libgnatprj + clean-target: maybe-clean-target-libgomp + + .PHONY: do-distclean +@@ -2573,6 +2599,7 @@ + distclean-host: maybe-distclean-utils + distclean-host: maybe-distclean-libada + distclean-host: maybe-distclean-libgnatvsn ++distclean-host: maybe-distclean-libgnatprj + distclean-host: maybe-distclean-gnattools + distclean-host: maybe-distclean-lto-plugin + +@@ -2601,6 +2628,7 @@ + distclean-target: maybe-distclean-target-rda + distclean-target: maybe-distclean-target-libada + distclean-target: maybe-distclean-target-libgnatvsn ++distclean-target: maybe-distclean-target-libgnatprj + distclean-target: maybe-distclean-target-libgomp + + .PHONY: do-maintainer-clean +@@ -2692,6 +2720,7 @@ + maintainer-clean-host: maybe-maintainer-clean-utils + maintainer-clean-host: maybe-maintainer-clean-libada + maintainer-clean-host: maybe-maintainer-clean-libgnatvsn ++maintainer-clean-host: maybe-maintainer-clean-libgnatprj + maintainer-clean-host: maybe-maintainer-clean-gnattools + maintainer-clean-host: maybe-maintainer-clean-lto-plugin + +@@ -2720,6 +2749,7 @@ + maintainer-clean-target: maybe-maintainer-clean-target-rda + maintainer-clean-target: maybe-maintainer-clean-target-libada + maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn ++maintainer-clean-target: maybe-maintainer-clean-target-libgnatprj + maintainer-clean-target: maybe-maintainer-clean-target-libgomp + + +@@ -2866,6 +2896,7 @@ + maybe-check-utils \ + maybe-check-libada \ + maybe-check-libgnatvsn \ ++ maybe-check-libgnatprj \ + maybe-check-gnattools \ + maybe-check-lto-plugin + +@@ -2894,6 +2925,7 @@ + maybe-check-target-rda \ + maybe-check-target-libada \ + maybe-check-target-libgnatvsn \ ++ maybe-check-target-libgnatprj \ + maybe-check-target-libgomp + + do-check: +@@ -3011,6 +3043,7 @@ + maybe-install-utils \ + maybe-install-libada \ + maybe-install-libgnatvsn \ ++ maybe-install-libgnatprj \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -3094,6 +3127,7 @@ + maybe-install-utils \ + maybe-install-libada \ + maybe-install-libgnatvsn \ ++ maybe-install-libgnatprj \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -3122,6 +3156,7 @@ + maybe-install-target-rda \ + maybe-install-target-libada \ + maybe-install-target-libgnatvsn \ ++ maybe-install-target-libgnatprj \ + maybe-install-target-libgomp + + uninstall: +@@ -3232,6 +3267,7 @@ + maybe-install-strip-utils \ + maybe-install-strip-libada \ + maybe-install-strip-libgnatvsn \ ++ maybe-install-strip-libgnatprj \ + maybe-install-strip-gnattools \ + maybe-install-strip-lto-plugin + +@@ -3260,6 +3296,7 @@ + maybe-install-strip-target-rda \ + maybe-install-strip-target-libada \ + maybe-install-strip-target-libgnatvsn \ ++ maybe-install-strip-target-libgnatprj \ + maybe-install-strip-target-libgomp + + +@@ -45502,6 +45539,343 @@ + + + ++.PHONY: configure-libgnatprj maybe-configure-libgnatprj ++maybe-configure-libgnatprj: ++@if gcc-bootstrap ++configure-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if libgnatprj ++maybe-configure-libgnatprj: configure-libgnatprj ++configure-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ test ! -f $(HOST_SUBDIR)/libgnatprj/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libgnatprj ; \ ++ $(HOST_EXPORTS) \ ++ echo Configuring in $(HOST_SUBDIR)/libgnatprj; \ ++ cd "$(HOST_SUBDIR)/libgnatprj" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(HOST_SUBDIR)/libgnatprj/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatprj"; \ ++ libsrcdir="$$s/libgnatprj"; \ ++ $(SHELL) $${libsrcdir}/configure \ ++ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif libgnatprj ++ ++ ++ ++ ++ ++.PHONY: all-libgnatprj maybe-all-libgnatprj ++maybe-all-libgnatprj: ++@if gcc-bootstrap ++all-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if libgnatprj ++TARGET-libgnatprj=all ++maybe-all-libgnatprj: all-libgnatprj ++all-libgnatprj: configure-libgnatprj ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) \ ++ $(TARGET-libgnatprj)) ++@endif libgnatprj ++ ++ ++ ++ ++.PHONY: check-libgnatprj maybe-check-libgnatprj ++maybe-check-libgnatprj: ++@if libgnatprj ++maybe-check-libgnatprj: check-libgnatprj ++ ++check-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: install-libgnatprj maybe-install-libgnatprj ++maybe-install-libgnatprj: ++@if libgnatprj ++maybe-install-libgnatprj: install-libgnatprj ++ ++install-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(FLAGS_TO_PASS) install) ++ ++@endif libgnatprj ++ ++.PHONY: install-strip-libgnatprj maybe-install-strip-libgnatprj ++maybe-install-strip-libgnatprj: ++@if libgnatprj ++maybe-install-strip-libgnatprj: install-strip-libgnatprj ++ ++install-strip-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(FLAGS_TO_PASS) install-strip) ++ ++@endif libgnatprj ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-libgnatprj info-libgnatprj ++maybe-info-libgnatprj: ++@if libgnatprj ++maybe-info-libgnatprj: info-libgnatprj ++ ++# libgnatprj doesn't support info. ++info-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-dvi-libgnatprj dvi-libgnatprj ++maybe-dvi-libgnatprj: ++@if libgnatprj ++maybe-dvi-libgnatprj: dvi-libgnatprj ++ ++# libgnatprj doesn't support dvi. ++dvi-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-pdf-libgnatprj pdf-libgnatprj ++maybe-pdf-libgnatprj: ++@if libgnatprj ++maybe-pdf-libgnatprj: pdf-libgnatprj ++ ++pdf-libgnatprj: \ ++ configure-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing pdf in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-html-libgnatprj html-libgnatprj ++maybe-html-libgnatprj: ++@if libgnatprj ++maybe-html-libgnatprj: html-libgnatprj ++ ++# libgnatprj doesn't support html. ++html-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-TAGS-libgnatprj TAGS-libgnatprj ++maybe-TAGS-libgnatprj: ++@if libgnatprj ++maybe-TAGS-libgnatprj: TAGS-libgnatprj ++ ++# libgnatprj doesn't support TAGS. ++TAGS-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-info-libgnatprj install-info-libgnatprj ++maybe-install-info-libgnatprj: ++@if libgnatprj ++maybe-install-info-libgnatprj: install-info-libgnatprj ++ ++# libgnatprj doesn't support install-info. ++install-info-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-pdf-libgnatprj install-pdf-libgnatprj ++maybe-install-pdf-libgnatprj: ++@if libgnatprj ++maybe-install-pdf-libgnatprj: install-pdf-libgnatprj ++ ++install-pdf-libgnatprj: \ ++ configure-libgnatprj \ ++ pdf-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-pdf in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-html-libgnatprj install-html-libgnatprj ++maybe-install-html-libgnatprj: ++@if libgnatprj ++maybe-install-html-libgnatprj: install-html-libgnatprj ++ ++install-html-libgnatprj: \ ++ configure-libgnatprj \ ++ html-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-html in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-installcheck-libgnatprj installcheck-libgnatprj ++maybe-installcheck-libgnatprj: ++@if libgnatprj ++maybe-installcheck-libgnatprj: installcheck-libgnatprj ++ ++# libgnatprj doesn't support installcheck. ++installcheck-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-mostlyclean-libgnatprj mostlyclean-libgnatprj ++maybe-mostlyclean-libgnatprj: ++@if libgnatprj ++maybe-mostlyclean-libgnatprj: mostlyclean-libgnatprj ++ ++mostlyclean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing mostlyclean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-clean-libgnatprj clean-libgnatprj ++maybe-clean-libgnatprj: ++@if libgnatprj ++maybe-clean-libgnatprj: clean-libgnatprj ++ ++clean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing clean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-distclean-libgnatprj distclean-libgnatprj ++maybe-distclean-libgnatprj: ++@if libgnatprj ++maybe-distclean-libgnatprj: distclean-libgnatprj ++ ++distclean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing distclean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-maintainer-clean-libgnatprj maintainer-clean-libgnatprj ++maybe-maintainer-clean-libgnatprj: ++@if libgnatprj ++maybe-maintainer-clean-libgnatprj: maintainer-clean-libgnatprj ++ ++maintainer-clean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing maintainer-clean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++ ++ + .PHONY: configure-gnattools maybe-configure-gnattools + maybe-configure-gnattools: + @if gcc-bootstrap +@@ -57992,6 +58366,361 @@ + + + ++.PHONY: configure-target-libgnatprj maybe-configure-target-libgnatprj ++maybe-configure-target-libgnatprj: ++@if gcc-bootstrap ++configure-target-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if target-libgnatprj ++maybe-configure-target-libgnatprj: configure-target-libgnatprj ++configure-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ echo "Checking multilib configuration for libgnatprj..."; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatprj ; \ ++ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgnatprj/multilib.tmp 2> /dev/null ; \ ++ if test -r $(TARGET_SUBDIR)/libgnatprj/multilib.out; then \ ++ if cmp -s $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; then \ ++ rm -f $(TARGET_SUBDIR)/libgnatprj/multilib.tmp; \ ++ else \ ++ rm -f $(TARGET_SUBDIR)/libgnatprj/Makefile; \ ++ mv $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; \ ++ fi; \ ++ else \ ++ mv $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; \ ++ fi; \ ++ test ! -f $(TARGET_SUBDIR)/libgnatprj/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatprj ; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo Configuring in $(TARGET_SUBDIR)/libgnatprj; \ ++ cd "$(TARGET_SUBDIR)/libgnatprj" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(TARGET_SUBDIR)/libgnatprj/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatprj"; \ ++ libsrcdir="$$s/libgnatprj"; \ ++ rm -f no-such-file || : ; \ ++ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ ++ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif target-libgnatprj ++ ++ ++ ++ ++ ++.PHONY: all-target-libgnatprj maybe-all-target-libgnatprj ++maybe-all-target-libgnatprj: ++@if gcc-bootstrap ++all-target-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if target-libgnatprj ++TARGET-target-libgnatprj=all ++maybe-all-target-libgnatprj: all-target-libgnatprj ++all-target-libgnatprj: configure-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ ++ $(TARGET-target-libgnatprj)) ++@endif target-libgnatprj ++ ++ ++ ++ ++ ++.PHONY: check-target-libgnatprj maybe-check-target-libgnatprj ++maybe-check-target-libgnatprj: ++@if target-libgnatprj ++maybe-check-target-libgnatprj: check-target-libgnatprj ++ ++# Dummy target for uncheckable module. ++check-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: install-target-libgnatprj maybe-install-target-libgnatprj ++maybe-install-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-target-libgnatprj: install-target-libgnatprj ++ ++install-target-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++ ++@endif target-libgnatprj ++ ++.PHONY: install-strip-target-libgnatprj maybe-install-strip-target-libgnatprj ++maybe-install-strip-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-strip-target-libgnatprj: install-strip-target-libgnatprj ++ ++install-strip-target-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++ ++@endif target-libgnatprj ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-target-libgnatprj info-target-libgnatprj ++maybe-info-target-libgnatprj: ++@if target-libgnatprj ++maybe-info-target-libgnatprj: info-target-libgnatprj ++ ++# libgnatprj doesn't support info. ++info-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-dvi-target-libgnatprj dvi-target-libgnatprj ++maybe-dvi-target-libgnatprj: ++@if target-libgnatprj ++maybe-dvi-target-libgnatprj: dvi-target-libgnatprj ++ ++# libgnatprj doesn't support dvi. ++dvi-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-pdf-target-libgnatprj pdf-target-libgnatprj ++maybe-pdf-target-libgnatprj: ++@if target-libgnatprj ++maybe-pdf-target-libgnatprj: pdf-target-libgnatprj ++ ++pdf-target-libgnatprj: \ ++ configure-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing pdf in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-html-target-libgnatprj html-target-libgnatprj ++maybe-html-target-libgnatprj: ++@if target-libgnatprj ++maybe-html-target-libgnatprj: html-target-libgnatprj ++ ++# libgnatprj doesn't support html. ++html-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-TAGS-target-libgnatprj TAGS-target-libgnatprj ++maybe-TAGS-target-libgnatprj: ++@if target-libgnatprj ++maybe-TAGS-target-libgnatprj: TAGS-target-libgnatprj ++ ++# libgnatprj doesn't support TAGS. ++TAGS-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-info-target-libgnatprj install-info-target-libgnatprj ++maybe-install-info-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-info-target-libgnatprj: install-info-target-libgnatprj ++ ++# libgnatprj doesn't support install-info. ++install-info-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-pdf-target-libgnatprj install-pdf-target-libgnatprj ++maybe-install-pdf-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-pdf-target-libgnatprj: install-pdf-target-libgnatprj ++ ++install-pdf-target-libgnatprj: \ ++ configure-target-libgnatprj \ ++ pdf-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-pdf in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-html-target-libgnatprj install-html-target-libgnatprj ++maybe-install-html-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-html-target-libgnatprj: install-html-target-libgnatprj ++ ++install-html-target-libgnatprj: \ ++ configure-target-libgnatprj \ ++ html-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-html in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-installcheck-target-libgnatprj installcheck-target-libgnatprj ++maybe-installcheck-target-libgnatprj: ++@if target-libgnatprj ++maybe-installcheck-target-libgnatprj: installcheck-target-libgnatprj ++ ++# libgnatprj doesn't support installcheck. ++installcheck-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-mostlyclean-target-libgnatprj mostlyclean-target-libgnatprj ++maybe-mostlyclean-target-libgnatprj: ++@if target-libgnatprj ++maybe-mostlyclean-target-libgnatprj: mostlyclean-target-libgnatprj ++ ++mostlyclean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-clean-target-libgnatprj clean-target-libgnatprj ++maybe-clean-target-libgnatprj: ++@if target-libgnatprj ++maybe-clean-target-libgnatprj: clean-target-libgnatprj ++ ++clean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing clean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-distclean-target-libgnatprj distclean-target-libgnatprj ++maybe-distclean-target-libgnatprj: ++@if target-libgnatprj ++maybe-distclean-target-libgnatprj: distclean-target-libgnatprj ++ ++distclean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing distclean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-maintainer-clean-target-libgnatprj maintainer-clean-target-libgnatprj ++maybe-maintainer-clean-target-libgnatprj: ++@if target-libgnatprj ++maybe-maintainer-clean-target-libgnatprj: maintainer-clean-target-libgnatprj ++ ++maintainer-clean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++ ++ ++ ++ + .PHONY: configure-target-libgomp maybe-configure-target-libgomp + maybe-configure-target-libgomp: + @if gcc-bootstrap +@@ -61056,6 +61785,7 @@ + configure-target-rda: stage_last + configure-target-libada: stage_last + configure-target-libgnatvsn: stage_last ++configure-target-libgnatprj: stage_last + configure-stage1-target-libgomp: maybe-all-stage1-gcc + configure-stage2-target-libgomp: maybe-all-stage2-gcc + configure-stage3-target-libgomp: maybe-all-stage3-gcc +@@ -61088,6 +61818,7 @@ + configure-target-rda: maybe-all-gcc + configure-target-libada: maybe-all-gcc + configure-target-libgnatvsn: maybe-all-gcc ++configure-target-libgnatprj: maybe-all-gcc + configure-target-libgomp: maybe-all-gcc + @endif gcc-no-bootstrap + +@@ -61389,7 +62120,10 @@ + all-fixincludes: maybe-all-libiberty + all-gnattools: maybe-all-libada + all-gnattools: maybe-all-libgnatvsn ++all-gnattools: maybe-all-libgnatprj + all-libgnatvsn: maybe-all-libada ++all-libgnatprj: maybe-all-libada ++all-libgnatprj: maybe-all-libgnatvsn + all-lto-plugin: maybe-all-libiberty + + all-stage1-lto-plugin: maybe-all-stage1-libiberty +@@ -61935,6 +62669,7 @@ + configure-target-rda: maybe-all-target-libgcc + configure-target-libada: maybe-all-target-libgcc + configure-target-libgnatvsn: maybe-all-target-libgcc ++configure-target-libgnatprj: maybe-all-target-libgcc + configure-target-libgomp: maybe-all-target-libgcc + @endif gcc-no-bootstrap + +@@ -61983,6 +62718,8 @@ + + configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss + ++configure-target-libgnatprj: maybe-all-target-newlib maybe-all-target-libgloss ++ + configure-target-libgomp: maybe-all-target-newlib maybe-all-target-libgloss + + +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -168,7 +168,7 @@ + + # these libraries are used by various programs built for the host environment + # +-host_libs="intl mmalloc libiberty opcodes bfd readline tcl tk itcl libgui zlib libcpp libdecnumber gmp mpfr mpc ppl cloog libelf libiconv libada libgnatvsn" ++host_libs="intl mmalloc libiberty opcodes bfd readline tcl tk itcl libgui zlib libcpp libdecnumber gmp mpfr mpc ppl cloog libelf libiconv libada libgnatvsn libgnatprj" + + # these tools are built for the host environment + # Note, the powerpc-eabi build depends on sim occurring before gdb in order to +@@ -202,6 +202,7 @@ + target-libobjc \ + target-libada \ + target-libgnatvsn \ ++ target-libgnatprj \ + target-libgo" + + # these tools are built using the target libraries, and are intended to +@@ -303,7 +304,7 @@ + + # Similarly, some are only suitable for cross toolchains. + # Remove these if host=target. +-cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn" ++cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn target-libgnatprj" + + case $is_cross_compiler in + no) skipdirs="${skipdirs} ${cross_only}" ;; +@@ -487,7 +488,7 @@ + ENABLE_LIBADA=$enableval, + ENABLE_LIBADA=yes) + if test "${ENABLE_LIBADA}" != "yes" ; then +- noconfigdirs="$noconfigdirs libgnatvsn gnattools" ++ noconfigdirs="$noconfigdirs libgnatvsn libgnatprj gnattools" + fi + + AC_ARG_ENABLE(libssp, +Index: b/src/libgnatprj/configure.ac +=================================================================== +--- /dev/null ++++ b/src/libgnatprj/configure.ac +@@ -0,0 +1,149 @@ ++# Configure script for libada. ++# Copyright 2003, 2004 Free Software Foundation, Inc. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ ++AC_INIT ++AC_PREREQ([2.59]) ++ ++AC_CONFIG_SRCDIR([Makefile.in]) ++ ++# Start of actual configure tests ++ ++AC_PROG_INSTALL ++ ++AC_CANONICAL_BUILD ++AC_CANONICAL_HOST ++AC_CANONICAL_TARGET ++ ++sinclude(../config/acx.m4) ++ACX_NONCANONICAL_TARGET ++ ++# Need to pass this down for now :-P ++AC_PROG_LN_S ++ ++# Determine x_ada_cflags ++case $host in ++ hppa*) x_ada_cflags=-mdisable-indexing ;; ++ *) x_ada_cflags= ;; ++esac ++AC_SUBST([x_ada_cflags]) ++ ++# Determine what to build for 'gnattools' ++if test $build = $target ; then ++ # Note that build=target is almost certainly the wrong test; FIXME ++ default_gnattools_target="gnattools-native" ++else ++ default_gnattools_target="gnattools-cross" ++fi ++AC_SUBST([default_gnattools_target]) ++ ++# Target-specific stuff (defaults) ++TOOLS_TARGET_PAIRS= ++AC_SUBST(TOOLS_TARGET_PAIRS) ++ ++# Per-target case statement ++# ---/---------------------- ++case "${target}" in ++ alpha*-dec-vx*) # Unlike all other Vxworks ++ ;; ++ m68k*-wrs-vx* \ ++ | powerpc*-wrs-vxworks \ ++ | sparc*-wrs-vx* \ ++ | *86-wrs-vxworks \ ++ | xscale*-wrs-vx* \ ++ | xscale*-wrs-coff \ ++ | mips*-wrs-vx*) ++ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb&1 || echo failure` ++errors=`(${CC} $1[]m4_ifval([$1], [ ])-c conftest.adb) 2>/dev/null || echo failure` + if test x"$errors" = x && test -f conftest.$ac_objext; then + acx_cv_cc_gcc_supports_ada=yes + fi + +--- a/src/configure~ 2007-09-02 16:50:31.206279000 +0200 ++++ b/src/configure 2007-09-02 19:28:58.259691491 +0200 +@@ -4448,7 +4448,7 @@ + # Other compilers, like HP Tru64 UNIX cc, exit successfully when + # given a .adb file, but produce no object file. So we must check + # if an object file was really produced to guard against this. +-errors=`(${CC} -c conftest.adb) 2>&1 || echo failure` ++errors=`(${CC} -c conftest.adb) 2>/dev/null || echo failure` + if test x"$errors" = x && test -f conftest.$ac_objext; then + acx_cv_cc_gcc_supports_ada=yes + fi --- gcc-4.7-4.7.2.orig/debian/patches/ada-libgnatvsn.diff +++ gcc-4.7-4.7.2/debian/patches/ada-libgnatvsn.diff @@ -0,0 +1,1625 @@ +# DP: - Introduce a new shared library named libgnatvsn, containing +# DP: common components of GNAT under the GNAT-Modified GPL, for +# DP: use in GNAT tools, ASIS, GLADE and GPS. Link the gnat tools +# DP: against this new library. + +# This patch seems large, but the hunks in Makefile.in are actually +# generated from Makefile.def using autogen. + +# !!! Must be applied after ada-link-lib.dpatch + +Index: b/src/gnattools/Makefile.in +=================================================================== +--- a/src/gnattools/Makefile.in ++++ b/src/gnattools/Makefile.in +@@ -38,10 +38,11 @@ + CFLAGS=-O2 -Wall + INCLUDES = -I@srcdir@/../gcc/ada -I@srcdir@/../gcc + ADA_CFLAGS=-O2 -gnatn +-ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts -I@srcdir@/../gcc/ada ++ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts -I../libgnatvsn + LIB_VERSION=$(strip $(shell grep ' Library_Version :' \ +- @srcdir@/../gcc/ada/gnatvsn.ads | sed -e 's/.*"\(.*\)".*/\1/')) ++ ../libgnatvsn/gnatvsn.ads | sed -e 's/.*"\(.*\)".*/\1/')) + ADA_LIBS := -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ADA_LIBS += -L../libgnatvsn -lgnatvsn + + # We will use the just-built compiler to compile and link everything. + GCC=../gcc/xgcc -B../gcc/ +@@ -67,62 +68,34 @@ + # Since we don't have gnatmake, we must specify the full list of + # object files necessary to build gnatmake and gnatlink. + # TODO: remove from these lists the objects that are part of +-# libgnatvsn and libgnatprj. ++# libgnatprj. + GNATLINK_OBJS = \ + ali.o \ +-alloc.o \ + butil.o \ +-casing.o \ +-csets.o \ +-debug.o \ + fmap.o \ +-fname.o \ + gnatlink.o \ +-gnatvsn.o \ +-hostparm.o \ + indepsw.o \ +-namet.o \ +-opt.o \ + osint.o \ +-output.o \ + prefix.o \ + rident.o \ + sdefault.o \ +-snames.o \ + stylesw.o \ + switch.o \ +-table.o \ + targparm.o \ +-tree_io.o \ +-types.o \ +-validsw.o \ +-version.o \ +-widechar.o ++validsw.o + + GNATMAKE_OBJS = \ + ali-util.o \ + ali.o \ +-alloc.o \ +-atree.o \ + binderr.o \ + butil.o \ +-casing.o \ +-csets.o \ +-debug.o \ +-einfo.o\ +-elists.o \ + err_vars.o \ + erroutc.o \ + errutil.o \ + fmap.o \ + fname-sf.o \ + fname-uf.o \ +-fname.o \ + gnatmake.o \ +-gnatvsn.o \ +-hostparm.o \ +-krunch.o \ +-lib.o \ + make.o \ + makeusg.o \ + makeutl.o \ +@@ -132,12 +105,8 @@ + mlib-tgt-specific.o \ + mlib-utl.o \ + mlib.o \ +-namet.o \ +-nlists.o \ +-opt.o \ + osint-m.o \ + osint.o \ +-output.o \ + prefix.o \ + prj-attr-pm.o \ + prj-attr.o \ +@@ -155,47 +124,59 @@ + prj-util.o \ + prj.o \ + rident.o \ +-scans.o \ + scng.o \ + sdefault.o \ + sfn_scan.o \ +-sinfo.o \ + sinput-c.o \ + sinput-p.o \ +-sinput.o \ +-snames.o \ +-stand.o \ +-stringt.o \ + styleg.o \ + stylesw.o \ + switch-m.o \ + switch.o \ +-table.o \ + targparm.o \ + tempdir.o \ +-tree_io.o \ +-types.o \ +-uintp.o \ +-uname.o \ +-urealp.o \ + usage.o \ + validsw.o \ +-version.o \ +-widechar.o \ + $(EXTRA_GNATMAKE_OBJS) + ++EXTRA_TOOLS_OBJS = \ ++bcheck.o \ ++binde.o \ ++bindgen.o \ ++bindusg.o \ ++clean.o \ ++gprep.o \ ++makegpr.o \ ++osint-b.o \ ++osint-l.o \ ++prep.o \ ++prj-makr.o \ ++prj-pp.o \ ++switch-b.o \ ++vms_cmds.o \ ++vms_conv.o \ ++vms_data.o \ ++xr_tabls.o \ ++xref_lib.o ++ ++OBJECTS = $(GNATLINK_OBJS) $(GNATMAKE_OBJS) $(EXTRA_TOOLS_OBJS) ++ + # Makefile targets + # ---------------- + + .PHONY: gnattools gnattools-native gnattools-cross regnattools + gnattools: @default_gnattools_target@ + +-# Build directory for the tools. Let's copy the target-dependent +-# sources using the same mechanism as for gnatlib. The other sources are +-# accessed using the vpath directive. ++BODIES := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.adb,$(f)))) ++SPECS := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.ads,$(f)))) ++ ++$(notdir $(SPECS) $(BODIES)): stamp-gnattools-sources + + stamp-gnattools-sources: +- $(LN_S) ../gcc/ada/sdefault.adb . ++ for file in $(BODIES) $(SPECS); do \ ++ $(LN_S) -f $$file .; \ ++ done ++ rm -f sdefault.adb; $(LN_S) ../gcc/ada/sdefault.adb . + $(foreach PAIR,$(TOOLS_TARGET_PAIRS), \ + rm -f $(word 1,$(subst <, ,$(PAIR)));\ + $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \ +@@ -203,6 +184,7 @@ + touch $@ + + gnattools-native: ../gcc/ada/rts/libgnat-$(LIB_VERSION).so ++gnattools-native: ../libgnatvsn/libgnatvsn.so + gnattools-native: stamp-gnattools-sources + gnattools-native: $(TOOLS) + +@@ -210,18 +192,16 @@ + + vpath %.c @srcdir@/../gcc/ada:@srcdir@/../gcc + vpath %.h @srcdir@/../gcc/ada +-vpath %.adb .:@srcdir@/../gcc/ada +-vpath %.ads @srcdir@/../gcc/ada + + # Because the just-built gcc is a host tool like us, we can use some +-# of its object files, e.g. prefix.o and version.o. ++# of its object files, e.g. prefix.o. + vpath prefix.o ../gcc +-vpath version.o ../gcc + + # gnatlink + + gnatlink-static: $(GNATLINK_OBJS) b_gnatl.o link.o + $(GCC) -o $@ $^ \ ++ ../libgnatvsn/libgnatvsn.a \ + ../gcc/ada/rts/libgnat.a \ + ../libiberty/libiberty.a + +@@ -238,6 +218,7 @@ + + gnatmake-static: $(GNATMAKE_OBJS) b_gnatm.o link.o + $(GCC) -o $@ $(ADA_CFLAGS) $^ \ ++ ../libgnatvsn/libgnatvsn.a \ + ../gcc/ada/rts/libgnat.a \ + ../libiberty/libiberty.a + +@@ -251,7 +232,8 @@ + ../gcc/gnatbind -C -o $@ $(ADA_INCLUDES) gnatmake.ali + + # Other tools +-gnatkr: version.o ++gnatkr: ++ if [ ! -f $@.adb ] ; then $(LN_S) ../../src/gcc/ada/$@.ad[bs] .; fi + ./gnatmake-static -c -b $@ $(ADA_CFLAGS) $(ADA_INCLUDES) \ + --GCC="$(GCC)" \ + --GNATBIND=../gcc/gnatbind +@@ -262,7 +244,8 @@ + cp -lp $< $@ + + gnatbind gnatchop gnatclean gnatcmd gnatfind gnatls gnatname gnatprep gnatxref: \ +-link.o version.o prefix.o ++link.o prefix.o ++ if [ ! -f $@.adb ] ; then $(LN_S) ../../src/gcc/ada/$@.ad[bs] .; fi + ./gnatmake-static -c -b $@ $(ADA_CFLAGS) $(ADA_INCLUDES) \ + --GCC="$(GCC)" \ + --GNATBIND=../gcc/gnatbind +@@ -284,6 +267,8 @@ + %.o: %.c + $(GCC) -c -o $@ $< $(CFLAGS) $(INCLUDES) + ++prefix.o: ++ + # Other + # ----- + +@@ -325,13 +310,15 @@ + .PHONY: install install-strip install-info install-pdf install-html + + # Cleaning rules. ++.PHONY: mostlyclean clean distclean ++ + mostlyclean: + $(RM) gnatmake gnatlink $(TOOLS) *.o *.ali + +-clean: ++clean: mostlyclean + $(RM) *.ads *.adb stamp-gnattools-sources + +-distclean: ++distclean: clean + $(RM) Makefile config.status config.log + + maintainer-clean: +Index: b/src/libgnatvsn/configure +=================================================================== +--- /dev/null ++++ b/src/libgnatvsn/configure +@@ -0,0 +1,47 @@ ++#!/bin/sh ++ ++# Minimal configure script for libgnatvsn. We're only interested in ++# a few parameters. ++ ++for arg in $*; do ++ case ${arg} in ++ --build=*) ++ build=`expr ${arg} : '--build=\(.\+\)'`;; ++ --host=*) ++ host=`expr ${arg} : '--host=\(.\+\)'`;; ++ --target=*) ++ target=`expr ${arg} : '--target=\(.\+\)'`;; ++ --prefix=*) ++ prefix=`expr ${arg} : '--prefix=\(.\+\)'`;; ++ --srcdir=*) ++ srcdir=`expr ${arg} : '--srcdir=\(.\+\)'`;; ++ --libdir=*) ++ libdir=`expr ${arg} : '--libdir=\(.\+\)'`;; ++ --with-pkgversion=*) ++ pkgversion=`expr ${arg} : '--with-pkgversion=\(.\+\)'`;; ++ --with-bugurl=*) ++ bugurl=`expr ${arg} : '--with-bugurl=\(.\+\)'`;; ++ *) ++ echo "Warning: ignoring option: ${arg}" ++ esac ++done ++ ++echo "build: ${build}" | tee config.log ++echo "host: ${host}" | tee -a config.log ++echo "target: ${target}" | tee -a config.log ++echo "prefix: ${prefix}" | tee -a config.log ++echo "srcdir: ${srcdir}" | tee -a config.log ++echo "libdir: ${libdir}" | tee -a config.log ++echo "pkgversion: ${pkgversion}" | tee -a config.log ++echo "bugurl: ${bugurl}" | tee -a config.log ++ ++echo "Creating Makefile..." | tee -a config.log ++sed -e "s,@build@,${build},g" \ ++ -e "s,@host@,${host},g" \ ++ -e "s,@target@,${target},g" \ ++ -e "s,@prefix@,${prefix},g" \ ++ -e "s,@srcdir@,${srcdir},g" \ ++ -e "s,@libdir@,${libdir},g" \ ++ -e "s,@PKGVERSION@,${pkgversion},g" \ ++ -e "s,@REPORT_BUGS_TO@,${bugurl},g" \ ++ < ${srcdir}/Makefile.in > Makefile +Index: b/src/libgnatvsn/Makefile.in +=================================================================== +--- /dev/null ++++ b/src/libgnatvsn/Makefile.in +@@ -0,0 +1,157 @@ ++# Makefile for libgnatvsn. ++# Copyright (c) 2006 Ludovic Brenta ++# ++# This file is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ ++# Default target; must be first. ++all: libgnatvsn ++ ++.SUFFIXES: ++ ++CPUS := $(shell getconf _NPROCESSORS_ONLN) ++LIB_VERSION := $(strip $(shell grep ' Library_Version :' \ ++ @srcdir@/../gcc/ada/gnatvsn.ads | \ ++ sed -e 's/.*"\(.*\)".*/\1/')) ++GCC:=../gcc/xgcc -B../gcc/ ++LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++CFLAGS := -g -O2 -gnatn ++BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) ++DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) ++DATESTAMP := $(shell cat @srcdir@/../gcc/DATESTAMP) ++ ++# For use in version.c - double quoted strings, with appropriate ++# surrounding punctuation and spaces, and with the datestamp and ++# development phase collapsed to the empty string in release mode ++# (i.e. if DEVPHASE_c is empty). The space immediately after the ++# comma in the $(if ...) constructs is significant - do not remove it. ++BASEVER_s := "\"$(BASEVER)\"" ++DEVPHASE_s := "\"$(if $(DEVPHASE), ($(DEVPHASE)))\"" ++DATESTAMP_s := "\"$(if $(DEVPHASE), $(DATESTAMP))\"" ++PKGVERSION_s:= "\"@PKGVERSION@\"" ++BUGURL_s := "\"@REPORT_BUGS_TO@\"" ++ ++ifneq (@build@,@host@) ++ CFLAGS += -b @host@ ++endif ++ ++.PHONY: libgnatvsn install ++libgnatvsn: libgnatvsn.so.$(LIB_VERSION) libgnatvsn.a ++ ++VSN_SOURCES := alloc.ads aspects.adb atree.adb casing.adb csets.adb debug.adb einfo.adb \ ++elists.adb fname.adb gnatvsn.adb hostparm.ads krunch.adb lib.adb namet.adb \ ++nlists.adb opt.adb output.adb repinfo.adb scans.adb sinfo.adb sem_aux.adb \ ++sinput.adb stand.adb stringt.adb table.adb tree_in.adb tree_io.adb types.adb \ ++uintp.adb uname.adb urealp.adb widechar.adb ++ ++VSN_SEPARATES := lib-list.adb lib-sort.adb ++ ++VSN_GENERATED_SOURCES := snames.adb ++ ++OBJECTS=$(patsubst %.ads,%.o,$(VSN_SOURCES:.adb=.o) $(VSN_GENERATED_SOURCES:.adb=.o)) version.o ++ ++vpath %.c @srcdir@/../gcc ++ ++libgnatvsn.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) ++ : # Make libgnatvsn.so ++ $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ ++ -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ ln -s libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so ++ chmod a=r obj-shared/*.ali ++# Make the .ali files, but not the .o files, visible to the gnat tools. ++ cp -lp obj-shared/*.ali . ++ ++$(addprefix obj-shared/,$(OBJECTS)): | stamp-libgnatvsn-sources obj-shared ++ ++obj-shared/%.o: %.adb ++ $(GCC) -c -fPIC $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-shared/%.o: %.ads ++ $(GCC) -c -fPIC $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-shared/version.o: version.c ++ $(GCC) -c -fPIC -g -O2 \ ++ -DBASEVER=$(BASEVER_s) \ ++ -DDATESTAMP=$(DATESTAMP_s) \ ++ -DDEVPHASE=$(DEVPHASE_s) \ ++ -DPKGVERSION=$(PKGVERSION_s) \ ++ -DBUGURL=$(BUGURL_s) \ ++ -DREVISION= \ ++ $(realpath $<) -o $@ ++ ++obj-shared: ++ -mkdir $@ ++ ++libgnatvsn.a: $(addprefix obj-static/,$(OBJECTS)) ++ : # Make libgnatvsn.a ++ ar rc $@ $^ ++ ranlib $@ ++ ++$(addprefix obj-static/,$(OBJECTS)): | stamp-libgnatvsn-sources obj-static ++ ++obj-static/%.o: %.adb ++ $(GCC) -c $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-static/%.o: %.ads ++ $(GCC) -c $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-static/version.o: version.c ++ $(GCC) -c -g -O2 \ ++ -DBASEVER=$(BASEVER_s) \ ++ -DDATESTAMP=$(DATESTAMP_s) \ ++ -DDEVPHASE=$(DEVPHASE_s) \ ++ -DPKGVERSION=$(PKGVERSION_s) \ ++ -DBUGURL=$(BUGURL_s) \ ++ -DREVISION= \ ++ $< -o $@ ++ ++obj-static: ++ -mkdir $@ ++ ++$(VSN_SOURCES) $(VSN_SEPARATES) $(VSN_GENERATED_SOURCES): stamp-libgnatvsn-sources ++ ++stamp-libgnatvsn-sources: ++ for file in $(VSN_SOURCES) $(VSN_SEPARATES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f @srcdir@/../gcc/ada/$$file -a ! -L $$file ] ; then ln -s @srcdir@/../gcc/ada/$$file .; fi; \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then ln -s @srcdir@/../gcc/ada/$$ads .; fi; \ ++ done ++ for file in $(VSN_GENERATED_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f ../gcc/ada/$$file -a ! -L $$file ] ; then ln -s ../gcc/ada/$$file .; fi; \ ++ if [ -f ../gcc/ada/$$ads -a ! -L $$ads ] ; then ln -s ../gcc/ada/$$ads .; fi; \ ++ done ++ touch $@ ++ ++libdir = @libdir@ ++ ++install: libgnatvsn ++ $(INSTALL_DATA) libgnatvsn.a $(DESTDIR)$(libdir) ++ $(INSTALL_DATA) libgnatvsn.so.$(LIB_VERSION) $(DESTDIR)$(libdir) ++ cd $(DESTDIR)$(libdir); ln -sf libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so ++ mkdir -p $(DESTDIR)$(prefix)/share/ada/adainclude/gnatvsn ++ $(INSTALL_DATA) \ ++ $(addprefix @srcdir@/../gcc/ada/,$(VSN_SOURCES) $(VSN_SEPARATES)) \ ++ $(addprefix @srcdir@/../gcc/ada/,$(patsubst %.adb,%.ads,$(filter %.adb,$(VSN_SOURCES)))) \ ++ $(addprefix ../gcc/ada/,$(VSN_GENERATED_SOURCES)) \ ++ $(addprefix ../gcc/ada/,$(patsubst %.adb,%.ads,$(VSN_GENERATED_SOURCES))) \ ++ $(DESTDIR)$(prefix)/share/ada/adainclude/gnatvsn ++ mkdir -p $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn ++ $(INSTALL) -m 0444 obj-shared/*.ali \ ++ $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn ++ chmod a=r $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn/*.ali ++ ++.PHONY: clean ++clean: ++ rm -rf *.ali obj-static obj-shared libgnatvsn* *.adb *.ads stamp* +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -151,6 +151,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++host_modules= { module= libgnatvsn; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + host_modules= { module= gnattools; no_check=true; + missing= info; + missing= dvi; +@@ -196,6 +203,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++target_modules = { module= libgnatvsn; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; }; + + // These are (some of) the make targets to be done in each subdirectory. +@@ -382,6 +396,8 @@ + dependencies = { module=all-fixincludes; on=all-libiberty; }; + + dependencies = { module=all-gnattools; on=all-libada; }; ++dependencies = { module=all-gnattools; on=all-libgnatvsn; }; ++dependencies = { module=all-libgnatvsn; on=all-libada; }; + + dependencies = { module=all-lto-plugin; on=all-libiberty; }; + +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -951,6 +951,7 @@ + maybe-configure-libtermcap \ + maybe-configure-utils \ + maybe-configure-libada \ ++ maybe-configure-libgnatvsn \ + maybe-configure-gnattools \ + maybe-configure-lto-plugin + .PHONY: configure-target +@@ -977,6 +978,7 @@ + maybe-configure-target-qthreads \ + maybe-configure-target-rda \ + maybe-configure-target-libada \ ++ maybe-configure-target-libgnatvsn \ + maybe-configure-target-libgomp + + # The target built for a native non-bootstrap build. +@@ -1129,6 +1131,7 @@ + all-host: maybe-all-libtermcap + all-host: maybe-all-utils + all-host: maybe-all-libada ++all-host: maybe-all-libgnatvsn + all-host: maybe-all-gnattools + @if lto-plugin-no-bootstrap + all-host: maybe-all-lto-plugin +@@ -1162,6 +1165,7 @@ + all-target: maybe-all-target-qthreads + all-target: maybe-all-target-rda + all-target: maybe-all-target-libada ++all-target: maybe-all-target-libgnatvsn + @if target-libgomp-no-bootstrap + all-target: maybe-all-target-libgomp + @endif target-libgomp-no-bootstrap +@@ -1259,6 +1263,7 @@ + info-host: maybe-info-libtermcap + info-host: maybe-info-utils + info-host: maybe-info-libada ++info-host: maybe-info-libgnatvsn + info-host: maybe-info-gnattools + info-host: maybe-info-lto-plugin + +@@ -1286,6 +1291,7 @@ + info-target: maybe-info-target-qthreads + info-target: maybe-info-target-rda + info-target: maybe-info-target-libada ++info-target: maybe-info-target-libgnatvsn + info-target: maybe-info-target-libgomp + + .PHONY: do-dvi +@@ -1376,6 +1382,7 @@ + dvi-host: maybe-dvi-libtermcap + dvi-host: maybe-dvi-utils + dvi-host: maybe-dvi-libada ++dvi-host: maybe-dvi-libgnatvsn + dvi-host: maybe-dvi-gnattools + dvi-host: maybe-dvi-lto-plugin + +@@ -1403,6 +1410,7 @@ + dvi-target: maybe-dvi-target-qthreads + dvi-target: maybe-dvi-target-rda + dvi-target: maybe-dvi-target-libada ++dvi-target: maybe-dvi-target-libgnatvsn + dvi-target: maybe-dvi-target-libgomp + + .PHONY: do-pdf +@@ -1493,6 +1501,7 @@ + pdf-host: maybe-pdf-libtermcap + pdf-host: maybe-pdf-utils + pdf-host: maybe-pdf-libada ++pdf-host: maybe-pdf-libgnatvsn + pdf-host: maybe-pdf-gnattools + pdf-host: maybe-pdf-lto-plugin + +@@ -1520,6 +1529,7 @@ + pdf-target: maybe-pdf-target-qthreads + pdf-target: maybe-pdf-target-rda + pdf-target: maybe-pdf-target-libada ++pdf-target: maybe-pdf-target-libgnatvsn + pdf-target: maybe-pdf-target-libgomp + + .PHONY: do-html +@@ -1610,6 +1620,7 @@ + html-host: maybe-html-libtermcap + html-host: maybe-html-utils + html-host: maybe-html-libada ++html-host: maybe-html-libgnatvsn + html-host: maybe-html-gnattools + html-host: maybe-html-lto-plugin + +@@ -1637,6 +1648,7 @@ + html-target: maybe-html-target-qthreads + html-target: maybe-html-target-rda + html-target: maybe-html-target-libada ++html-target: maybe-html-target-libgnatvsn + html-target: maybe-html-target-libgomp + + .PHONY: do-TAGS +@@ -1727,6 +1739,7 @@ + TAGS-host: maybe-TAGS-libtermcap + TAGS-host: maybe-TAGS-utils + TAGS-host: maybe-TAGS-libada ++TAGS-host: maybe-TAGS-libgnatvsn + TAGS-host: maybe-TAGS-gnattools + TAGS-host: maybe-TAGS-lto-plugin + +@@ -1754,6 +1767,7 @@ + TAGS-target: maybe-TAGS-target-qthreads + TAGS-target: maybe-TAGS-target-rda + TAGS-target: maybe-TAGS-target-libada ++TAGS-target: maybe-TAGS-target-libgnatvsn + TAGS-target: maybe-TAGS-target-libgomp + + .PHONY: do-install-info +@@ -1844,6 +1858,7 @@ + install-info-host: maybe-install-info-libtermcap + install-info-host: maybe-install-info-utils + install-info-host: maybe-install-info-libada ++install-info-host: maybe-install-info-libgnatvsn + install-info-host: maybe-install-info-gnattools + install-info-host: maybe-install-info-lto-plugin + +@@ -1871,6 +1886,7 @@ + install-info-target: maybe-install-info-target-qthreads + install-info-target: maybe-install-info-target-rda + install-info-target: maybe-install-info-target-libada ++install-info-target: maybe-install-info-target-libgnatvsn + install-info-target: maybe-install-info-target-libgomp + + .PHONY: do-install-pdf +@@ -1961,6 +1977,7 @@ + install-pdf-host: maybe-install-pdf-libtermcap + install-pdf-host: maybe-install-pdf-utils + install-pdf-host: maybe-install-pdf-libada ++install-pdf-host: maybe-install-pdf-libgnatvsn + install-pdf-host: maybe-install-pdf-gnattools + install-pdf-host: maybe-install-pdf-lto-plugin + +@@ -1988,6 +2005,7 @@ + install-pdf-target: maybe-install-pdf-target-qthreads + install-pdf-target: maybe-install-pdf-target-rda + install-pdf-target: maybe-install-pdf-target-libada ++install-pdf-target: maybe-install-pdf-target-libgnatvsn + install-pdf-target: maybe-install-pdf-target-libgomp + + .PHONY: do-install-html +@@ -2078,6 +2096,7 @@ + install-html-host: maybe-install-html-libtermcap + install-html-host: maybe-install-html-utils + install-html-host: maybe-install-html-libada ++install-html-host: maybe-install-html-libgnatvsn + install-html-host: maybe-install-html-gnattools + install-html-host: maybe-install-html-lto-plugin + +@@ -2105,6 +2124,7 @@ + install-html-target: maybe-install-html-target-qthreads + install-html-target: maybe-install-html-target-rda + install-html-target: maybe-install-html-target-libada ++install-html-target: maybe-install-html-target-libgnatvsn + install-html-target: maybe-install-html-target-libgomp + + .PHONY: do-installcheck +@@ -2195,6 +2215,7 @@ + installcheck-host: maybe-installcheck-libtermcap + installcheck-host: maybe-installcheck-utils + installcheck-host: maybe-installcheck-libada ++installcheck-host: maybe-installcheck-libgnatvsn + installcheck-host: maybe-installcheck-gnattools + installcheck-host: maybe-installcheck-lto-plugin + +@@ -2222,6 +2243,7 @@ + installcheck-target: maybe-installcheck-target-qthreads + installcheck-target: maybe-installcheck-target-rda + installcheck-target: maybe-installcheck-target-libada ++installcheck-target: maybe-installcheck-target-libgnatvsn + installcheck-target: maybe-installcheck-target-libgomp + + .PHONY: do-mostlyclean +@@ -2312,6 +2334,7 @@ + mostlyclean-host: maybe-mostlyclean-libtermcap + mostlyclean-host: maybe-mostlyclean-utils + mostlyclean-host: maybe-mostlyclean-libada ++mostlyclean-host: maybe-mostlyclean-libgnatvsn + mostlyclean-host: maybe-mostlyclean-gnattools + mostlyclean-host: maybe-mostlyclean-lto-plugin + +@@ -2339,6 +2362,7 @@ + mostlyclean-target: maybe-mostlyclean-target-qthreads + mostlyclean-target: maybe-mostlyclean-target-rda + mostlyclean-target: maybe-mostlyclean-target-libada ++mostlyclean-target: maybe-mostlyclean-target-libgnatvsn + mostlyclean-target: maybe-mostlyclean-target-libgomp + + .PHONY: do-clean +@@ -2429,6 +2453,7 @@ + clean-host: maybe-clean-libtermcap + clean-host: maybe-clean-utils + clean-host: maybe-clean-libada ++clean-host: maybe-clean-libgnatvsn + clean-host: maybe-clean-gnattools + clean-host: maybe-clean-lto-plugin + +@@ -2456,6 +2481,7 @@ + clean-target: maybe-clean-target-qthreads + clean-target: maybe-clean-target-rda + clean-target: maybe-clean-target-libada ++clean-target: maybe-clean-target-libgnatvsn + clean-target: maybe-clean-target-libgomp + + .PHONY: do-distclean +@@ -2546,6 +2572,7 @@ + distclean-host: maybe-distclean-libtermcap + distclean-host: maybe-distclean-utils + distclean-host: maybe-distclean-libada ++distclean-host: maybe-distclean-libgnatvsn + distclean-host: maybe-distclean-gnattools + distclean-host: maybe-distclean-lto-plugin + +@@ -2573,6 +2600,7 @@ + distclean-target: maybe-distclean-target-qthreads + distclean-target: maybe-distclean-target-rda + distclean-target: maybe-distclean-target-libada ++distclean-target: maybe-distclean-target-libgnatvsn + distclean-target: maybe-distclean-target-libgomp + + .PHONY: do-maintainer-clean +@@ -2663,6 +2691,7 @@ + maintainer-clean-host: maybe-maintainer-clean-libtermcap + maintainer-clean-host: maybe-maintainer-clean-utils + maintainer-clean-host: maybe-maintainer-clean-libada ++maintainer-clean-host: maybe-maintainer-clean-libgnatvsn + maintainer-clean-host: maybe-maintainer-clean-gnattools + maintainer-clean-host: maybe-maintainer-clean-lto-plugin + +@@ -2690,6 +2719,7 @@ + maintainer-clean-target: maybe-maintainer-clean-target-qthreads + maintainer-clean-target: maybe-maintainer-clean-target-rda + maintainer-clean-target: maybe-maintainer-clean-target-libada ++maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn + maintainer-clean-target: maybe-maintainer-clean-target-libgomp + + +@@ -2835,6 +2865,7 @@ + maybe-check-libtermcap \ + maybe-check-utils \ + maybe-check-libada \ ++ maybe-check-libgnatvsn \ + maybe-check-gnattools \ + maybe-check-lto-plugin + +@@ -2862,6 +2893,7 @@ + maybe-check-target-qthreads \ + maybe-check-target-rda \ + maybe-check-target-libada \ ++ maybe-check-target-libgnatvsn \ + maybe-check-target-libgomp + + do-check: +@@ -2978,6 +3010,7 @@ + maybe-install-libtermcap \ + maybe-install-utils \ + maybe-install-libada \ ++ maybe-install-libgnatvsn \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -3060,6 +3093,7 @@ + maybe-install-libtermcap \ + maybe-install-utils \ + maybe-install-libada \ ++ maybe-install-libgnatvsn \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -3087,6 +3121,7 @@ + maybe-install-target-qthreads \ + maybe-install-target-rda \ + maybe-install-target-libada \ ++ maybe-install-target-libgnatvsn \ + maybe-install-target-libgomp + + uninstall: +@@ -3196,6 +3231,7 @@ + maybe-install-strip-libtermcap \ + maybe-install-strip-utils \ + maybe-install-strip-libada \ ++ maybe-install-strip-libgnatvsn \ + maybe-install-strip-gnattools \ + maybe-install-strip-lto-plugin + +@@ -3223,6 +3259,7 @@ + maybe-install-strip-target-qthreads \ + maybe-install-strip-target-rda \ + maybe-install-strip-target-libada \ ++ maybe-install-strip-target-libgnatvsn \ + maybe-install-strip-target-libgomp + + +@@ -45128,6 +45165,343 @@ + + + ++.PHONY: configure-libgnatvsn maybe-configure-libgnatvsn ++maybe-configure-libgnatvsn: ++@if gcc-bootstrap ++configure-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if libgnatvsn ++maybe-configure-libgnatvsn: configure-libgnatvsn ++configure-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ test ! -f $(HOST_SUBDIR)/libgnatvsn/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libgnatvsn ; \ ++ $(HOST_EXPORTS) \ ++ echo Configuring in $(HOST_SUBDIR)/libgnatvsn; \ ++ cd "$(HOST_SUBDIR)/libgnatvsn" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(HOST_SUBDIR)/libgnatvsn/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatvsn"; \ ++ libsrcdir="$$s/libgnatvsn"; \ ++ $(SHELL) $${libsrcdir}/configure \ ++ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: all-libgnatvsn maybe-all-libgnatvsn ++maybe-all-libgnatvsn: ++@if gcc-bootstrap ++all-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if libgnatvsn ++TARGET-libgnatvsn=all ++maybe-all-libgnatvsn: all-libgnatvsn ++all-libgnatvsn: configure-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) \ ++ $(TARGET-libgnatvsn)) ++@endif libgnatvsn ++ ++ ++ ++ ++.PHONY: check-libgnatvsn maybe-check-libgnatvsn ++maybe-check-libgnatvsn: ++@if libgnatvsn ++maybe-check-libgnatvsn: check-libgnatvsn ++ ++check-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: install-libgnatvsn maybe-install-libgnatvsn ++maybe-install-libgnatvsn: ++@if libgnatvsn ++maybe-install-libgnatvsn: install-libgnatvsn ++ ++install-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(FLAGS_TO_PASS) install) ++ ++@endif libgnatvsn ++ ++.PHONY: install-strip-libgnatvsn maybe-install-strip-libgnatvsn ++maybe-install-strip-libgnatvsn: ++@if libgnatvsn ++maybe-install-strip-libgnatvsn: install-strip-libgnatvsn ++ ++install-strip-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(FLAGS_TO_PASS) install-strip) ++ ++@endif libgnatvsn ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-libgnatvsn info-libgnatvsn ++maybe-info-libgnatvsn: ++@if libgnatvsn ++maybe-info-libgnatvsn: info-libgnatvsn ++ ++# libgnatvsn doesn't support info. ++info-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-dvi-libgnatvsn dvi-libgnatvsn ++maybe-dvi-libgnatvsn: ++@if libgnatvsn ++maybe-dvi-libgnatvsn: dvi-libgnatvsn ++ ++# libgnatvsn doesn't support dvi. ++dvi-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-pdf-libgnatvsn pdf-libgnatvsn ++maybe-pdf-libgnatvsn: ++@if libgnatvsn ++maybe-pdf-libgnatvsn: pdf-libgnatvsn ++ ++pdf-libgnatvsn: \ ++ configure-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing pdf in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-html-libgnatvsn html-libgnatvsn ++maybe-html-libgnatvsn: ++@if libgnatvsn ++maybe-html-libgnatvsn: html-libgnatvsn ++ ++# libgnatvsn doesn't support html. ++html-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-TAGS-libgnatvsn TAGS-libgnatvsn ++maybe-TAGS-libgnatvsn: ++@if libgnatvsn ++maybe-TAGS-libgnatvsn: TAGS-libgnatvsn ++ ++# libgnatvsn doesn't support TAGS. ++TAGS-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-info-libgnatvsn install-info-libgnatvsn ++maybe-install-info-libgnatvsn: ++@if libgnatvsn ++maybe-install-info-libgnatvsn: install-info-libgnatvsn ++ ++# libgnatvsn doesn't support install-info. ++install-info-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-pdf-libgnatvsn install-pdf-libgnatvsn ++maybe-install-pdf-libgnatvsn: ++@if libgnatvsn ++maybe-install-pdf-libgnatvsn: install-pdf-libgnatvsn ++ ++install-pdf-libgnatvsn: \ ++ configure-libgnatvsn \ ++ pdf-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-pdf in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-html-libgnatvsn install-html-libgnatvsn ++maybe-install-html-libgnatvsn: ++@if libgnatvsn ++maybe-install-html-libgnatvsn: install-html-libgnatvsn ++ ++install-html-libgnatvsn: \ ++ configure-libgnatvsn \ ++ html-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-html in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-installcheck-libgnatvsn installcheck-libgnatvsn ++maybe-installcheck-libgnatvsn: ++@if libgnatvsn ++maybe-installcheck-libgnatvsn: installcheck-libgnatvsn ++ ++# libgnatvsn doesn't support installcheck. ++installcheck-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-mostlyclean-libgnatvsn mostlyclean-libgnatvsn ++maybe-mostlyclean-libgnatvsn: ++@if libgnatvsn ++maybe-mostlyclean-libgnatvsn: mostlyclean-libgnatvsn ++ ++mostlyclean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing mostlyclean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-clean-libgnatvsn clean-libgnatvsn ++maybe-clean-libgnatvsn: ++@if libgnatvsn ++maybe-clean-libgnatvsn: clean-libgnatvsn ++ ++clean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing clean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-distclean-libgnatvsn distclean-libgnatvsn ++maybe-distclean-libgnatvsn: ++@if libgnatvsn ++maybe-distclean-libgnatvsn: distclean-libgnatvsn ++ ++distclean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing distclean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-maintainer-clean-libgnatvsn maintainer-clean-libgnatvsn ++maybe-maintainer-clean-libgnatvsn: ++@if libgnatvsn ++maybe-maintainer-clean-libgnatvsn: maintainer-clean-libgnatvsn ++ ++maintainer-clean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing maintainer-clean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++ ++ + .PHONY: configure-gnattools maybe-configure-gnattools + maybe-configure-gnattools: + @if gcc-bootstrap +@@ -57263,6 +57637,361 @@ + + + ++.PHONY: configure-target-libgnatvsn maybe-configure-target-libgnatvsn ++maybe-configure-target-libgnatvsn: ++@if gcc-bootstrap ++configure-target-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if target-libgnatvsn ++maybe-configure-target-libgnatvsn: configure-target-libgnatvsn ++configure-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ echo "Checking multilib configuration for libgnatvsn..."; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatvsn ; \ ++ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp 2> /dev/null ; \ ++ if test -r $(TARGET_SUBDIR)/libgnatvsn/multilib.out; then \ ++ if cmp -s $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; then \ ++ rm -f $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp; \ ++ else \ ++ rm -f $(TARGET_SUBDIR)/libgnatvsn/Makefile; \ ++ mv $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; \ ++ fi; \ ++ else \ ++ mv $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; \ ++ fi; \ ++ test ! -f $(TARGET_SUBDIR)/libgnatvsn/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatvsn ; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo Configuring in $(TARGET_SUBDIR)/libgnatvsn; \ ++ cd "$(TARGET_SUBDIR)/libgnatvsn" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(TARGET_SUBDIR)/libgnatvsn/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatvsn"; \ ++ libsrcdir="$$s/libgnatvsn"; \ ++ rm -f no-such-file || : ; \ ++ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ ++ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif target-libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: all-target-libgnatvsn maybe-all-target-libgnatvsn ++maybe-all-target-libgnatvsn: ++@if gcc-bootstrap ++all-target-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if target-libgnatvsn ++TARGET-target-libgnatvsn=all ++maybe-all-target-libgnatvsn: all-target-libgnatvsn ++all-target-libgnatvsn: configure-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ ++ $(TARGET-target-libgnatvsn)) ++@endif target-libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: check-target-libgnatvsn maybe-check-target-libgnatvsn ++maybe-check-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-check-target-libgnatvsn: check-target-libgnatvsn ++ ++# Dummy target for uncheckable module. ++check-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: install-target-libgnatvsn maybe-install-target-libgnatvsn ++maybe-install-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-target-libgnatvsn: install-target-libgnatvsn ++ ++install-target-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++ ++@endif target-libgnatvsn ++ ++.PHONY: install-strip-target-libgnatvsn maybe-install-strip-target-libgnatvsn ++maybe-install-strip-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-strip-target-libgnatvsn: install-strip-target-libgnatvsn ++ ++install-strip-target-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++ ++@endif target-libgnatvsn ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-target-libgnatvsn info-target-libgnatvsn ++maybe-info-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-info-target-libgnatvsn: info-target-libgnatvsn ++ ++# libgnatvsn doesn't support info. ++info-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-dvi-target-libgnatvsn dvi-target-libgnatvsn ++maybe-dvi-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-dvi-target-libgnatvsn: dvi-target-libgnatvsn ++ ++# libgnatvsn doesn't support dvi. ++dvi-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-pdf-target-libgnatvsn pdf-target-libgnatvsn ++maybe-pdf-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-pdf-target-libgnatvsn: pdf-target-libgnatvsn ++ ++pdf-target-libgnatvsn: \ ++ configure-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing pdf in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-html-target-libgnatvsn html-target-libgnatvsn ++maybe-html-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-html-target-libgnatvsn: html-target-libgnatvsn ++ ++# libgnatvsn doesn't support html. ++html-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-TAGS-target-libgnatvsn TAGS-target-libgnatvsn ++maybe-TAGS-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-TAGS-target-libgnatvsn: TAGS-target-libgnatvsn ++ ++# libgnatvsn doesn't support TAGS. ++TAGS-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-info-target-libgnatvsn install-info-target-libgnatvsn ++maybe-install-info-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-info-target-libgnatvsn: install-info-target-libgnatvsn ++ ++# libgnatvsn doesn't support install-info. ++install-info-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-pdf-target-libgnatvsn install-pdf-target-libgnatvsn ++maybe-install-pdf-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-pdf-target-libgnatvsn: install-pdf-target-libgnatvsn ++ ++install-pdf-target-libgnatvsn: \ ++ configure-target-libgnatvsn \ ++ pdf-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-pdf in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-html-target-libgnatvsn install-html-target-libgnatvsn ++maybe-install-html-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-html-target-libgnatvsn: install-html-target-libgnatvsn ++ ++install-html-target-libgnatvsn: \ ++ configure-target-libgnatvsn \ ++ html-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-html in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-installcheck-target-libgnatvsn installcheck-target-libgnatvsn ++maybe-installcheck-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-installcheck-target-libgnatvsn: installcheck-target-libgnatvsn ++ ++# libgnatvsn doesn't support installcheck. ++installcheck-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-mostlyclean-target-libgnatvsn mostlyclean-target-libgnatvsn ++maybe-mostlyclean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-mostlyclean-target-libgnatvsn: mostlyclean-target-libgnatvsn ++ ++mostlyclean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-clean-target-libgnatvsn clean-target-libgnatvsn ++maybe-clean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-clean-target-libgnatvsn: clean-target-libgnatvsn ++ ++clean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing clean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-distclean-target-libgnatvsn distclean-target-libgnatvsn ++maybe-distclean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-distclean-target-libgnatvsn: distclean-target-libgnatvsn ++ ++distclean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing distclean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-maintainer-clean-target-libgnatvsn maintainer-clean-target-libgnatvsn ++maybe-maintainer-clean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-maintainer-clean-target-libgnatvsn: maintainer-clean-target-libgnatvsn ++ ++maintainer-clean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++ ++ ++ ++ + .PHONY: configure-target-libgomp maybe-configure-target-libgomp + maybe-configure-target-libgomp: + @if gcc-bootstrap +@@ -60326,6 +61055,7 @@ + configure-target-qthreads: stage_last + configure-target-rda: stage_last + configure-target-libada: stage_last ++configure-target-libgnatvsn: stage_last + configure-stage1-target-libgomp: maybe-all-stage1-gcc + configure-stage2-target-libgomp: maybe-all-stage2-gcc + configure-stage3-target-libgomp: maybe-all-stage3-gcc +@@ -60357,6 +61087,7 @@ + configure-target-qthreads: maybe-all-gcc + configure-target-rda: maybe-all-gcc + configure-target-libada: maybe-all-gcc ++configure-target-libgnatvsn: maybe-all-gcc + configure-target-libgomp: maybe-all-gcc + @endif gcc-no-bootstrap + +@@ -60657,6 +61388,8 @@ + all-stagefeedback-libcpp: maybe-all-stagefeedback-intl + all-fixincludes: maybe-all-libiberty + all-gnattools: maybe-all-libada ++all-gnattools: maybe-all-libgnatvsn ++all-libgnatvsn: maybe-all-libada + all-lto-plugin: maybe-all-libiberty + + all-stage1-lto-plugin: maybe-all-stage1-libiberty +@@ -61201,6 +61934,7 @@ + configure-target-qthreads: maybe-all-target-libgcc + configure-target-rda: maybe-all-target-libgcc + configure-target-libada: maybe-all-target-libgcc ++configure-target-libgnatvsn: maybe-all-target-libgcc + configure-target-libgomp: maybe-all-target-libgcc + @endif gcc-no-bootstrap + +@@ -61247,6 +61981,8 @@ + + configure-target-libada: maybe-all-target-newlib maybe-all-target-libgloss + ++configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss ++ + configure-target-libgomp: maybe-all-target-newlib maybe-all-target-libgloss + + +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -168,7 +168,7 @@ + + # these libraries are used by various programs built for the host environment + # +-host_libs="intl mmalloc libiberty opcodes bfd readline tcl tk itcl libgui zlib libcpp libdecnumber gmp mpfr mpc ppl cloog libelf libiconv libada" ++host_libs="intl mmalloc libiberty opcodes bfd readline tcl tk itcl libgui zlib libcpp libdecnumber gmp mpfr mpc ppl cloog libelf libiconv libada libgnatvsn" + + # these tools are built for the host environment + # Note, the powerpc-eabi build depends on sim occurring before gdb in order to +@@ -201,6 +201,7 @@ + ${libgcj} \ + target-libobjc \ + target-libada \ ++ target-libgnatvsn \ + target-libgo" + + # these tools are built using the target libraries, and are intended to +@@ -302,7 +303,7 @@ + + # Similarly, some are only suitable for cross toolchains. + # Remove these if host=target. +-cross_only="target-libgloss target-newlib target-opcodes target-libada" ++cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn" + + case $is_cross_compiler in + no) skipdirs="${skipdirs} ${cross_only}" ;; +@@ -486,7 +487,7 @@ + ENABLE_LIBADA=$enableval, + ENABLE_LIBADA=yes) + if test "${ENABLE_LIBADA}" != "yes" ; then +- noconfigdirs="$noconfigdirs gnattools" ++ noconfigdirs="$noconfigdirs libgnatvsn gnattools" + fi + + AC_ARG_ENABLE(libssp, +Index: b/src/gcc/ada/gcc-interface/config-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/config-lang.in ++++ b/src/gcc/ada/gcc-interface/config-lang.in +@@ -36,8 +36,8 @@ + + outputs="ada/gcc-interface/Makefile ada/Makefile" + +-target_libs="target-libada" +-lang_dirs="libada gnattools" ++target_libs="target-libada target-libgnatvsn" ++lang_dirs="libada libgnatvsn gnattools" + + # Ada is not enabled by default for the time being. + build_by_default=no --- gcc-4.7-4.7.2.orig/debian/patches/gcc-base-version.diff +++ gcc-4.7-4.7.2/debian/patches/gcc-base-version.diff @@ -0,0 +1,189 @@ +# DP: Set base version to 4.7, introduce full version 4.7.x. + +Index: b/src/gcc/BASE-VER +=================================================================== +--- a/src/gcc/BASE-VER ++++ b/src/gcc/BASE-VER +@@ -1 +1 @@ +-4.7.2 ++4.7 +Index: b/src/gcc/FULL-VER +=================================================================== +--- /dev/null ++++ b/src/gcc/FULL-VER +@@ -0,0 +1 @@ ++4.7.2 +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -792,11 +792,13 @@ + TM_H = $(GTM_H) insn-flags.h $(OPTIONS_H) + + # Variables for version information. +-BASEVER := $(srcdir)/BASE-VER # 4.x.y ++FULLVER := $(srcdir)/FULL-VER # 4.x.y ++BASEVER := $(srcdir)/BASE-VER # 4.x + DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" + DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty + REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] + ++FULLVER_c := $(shell cat $(FULLVER)) + BASEVER_c := $(shell cat $(BASEVER)) + DEVPHASE_c := $(shell cat $(DEVPHASE)) + DATESTAMP_c := $(shell cat $(DATESTAMP)) +@@ -815,7 +817,7 @@ + # development phase collapsed to the empty string in release mode + # (i.e. if DEVPHASE_c is empty). The space immediately after the + # comma in the $(if ...) constructs is significant - do not remove it. +-BASEVER_s := "\"$(BASEVER_c)\"" ++FULLVER_s := "\"$(FULLVER_c)\"" + DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\"" + DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" + PKGVERSION_s:= "\"@PKGVERSION@\"" +@@ -2066,9 +2068,9 @@ + intl.h prefix.h coretypes.h $(TM_H) cppdefault.h $(TARGET_H) \ + $(MACHMODE_H) + +-CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(BASEVER_s) ++CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(FULLVER_s) + prefix.o: prefix.c $(CONFIG_H) $(SYSTEM_H) coretypes.h prefix.h \ +- $(COMMON_TARGET_H) Makefile $(BASEVER) ++ $(COMMON_TARGET_H) Makefile $(FULLVER) + + # Language-independent files. + +@@ -2146,11 +2148,11 @@ + + dumpvers: dumpvers.c + +-CFLAGS-version.o += -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++CFLAGS-version.o += -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) +-version.o: version.c version.h $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + + gtype-desc.o: gtype-desc.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(HASHTAB_H) $(SPLAY_TREE_H) $(OBSTACK_H) $(BITMAP_H) \ +@@ -2736,10 +2738,10 @@ + coretypes.h $(INPUT_H) $(TM_H) $(COMMON_TARGET_H) common/common-targhooks.h + + bversion.h: s-bversion; @true +-s-bversion: BASE-VER +- echo "#define BUILDING_GCC_MAJOR `echo $(BASEVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h +- echo "#define BUILDING_GCC_MINOR `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h +- echo "#define BUILDING_GCC_PATCHLEVEL `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h ++s-bversion: FULL-VER ++ echo "#define BUILDING_GCC_MAJOR `echo $(FULLVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h ++ echo "#define BUILDING_GCC_MINOR `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h ++ echo "#define BUILDING_GCC_PATCHLEVEL `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h + echo "#define BUILDING_GCC_VERSION (BUILDING_GCC_MAJOR * 1000 + BUILDING_GCC_MINOR)" >> bversion.h + $(STAMP) s-bversion + +@@ -3791,9 +3793,9 @@ + ## build/version.o is compiled by the $(COMPILER_FOR_BUILD) but needs + ## several C macro definitions, just like version.o + build/version.o: version.c version.h \ +- $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++ $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + $(COMPILER_FOR_BUILD) -c $(BUILD_COMPILERFLAGS) $(BUILD_CPPFLAGS) \ +- -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++ -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) -o $@ $< +@@ -3968,7 +3970,7 @@ + -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + +-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) ++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s) + cppbuiltin.o: cppbuiltin.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(TREE_H) cppbuiltin.h Makefile + +@@ -3988,8 +3990,8 @@ + build/gcov-iov.o -o $@ + + gcov-iov.h: s-iov +-s-iov: build/gcov-iov$(build_exeext) $(BASEVER) $(DEVPHASE) +- build/gcov-iov$(build_exeext) '$(BASEVER_c)' '$(DEVPHASE_c)' \ ++s-iov: build/gcov-iov$(build_exeext) $(FULLVER) $(DEVPHASE) ++ build/gcov-iov$(build_exeext) '$(FULLVER_c)' '$(DEVPHASE_c)' \ + > tmp-gcov-iov.h + $(SHELL) $(srcdir)/../move-if-change tmp-gcov-iov.h gcov-iov.h + $(STAMP) s-iov +@@ -4229,8 +4231,8 @@ + TEXI_CPPINT_FILES = cppinternals.texi gcc-common.texi gcc-vers.texi + + # gcc-vers.texi is generated from the version files. +-gcc-vers.texi: $(BASEVER) $(DEVPHASE) +- (echo "@set version-GCC $(BASEVER_c)"; \ ++gcc-vers.texi: $(FULLVER) $(DEVPHASE) ++ (echo "@set version-GCC $(FULLVER_c)"; \ + if [ "$(DEVPHASE_c)" = "experimental" ]; \ + then echo "@set DEVELOPMENT"; \ + else echo "@clear DEVELOPMENT"; \ +@@ -4624,9 +4626,11 @@ + install-driver: installdirs xgcc$(exeext) + -rm -f $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) + -$(INSTALL_PROGRAM) xgcc$(exeext) $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) ++ifneq ($(GCC_INSTALL_NAME),$(target_noncanonical)-gcc-$(version)) + -rm -f $(DESTDIR)$(bindir)/$(target_noncanonical)-gcc-$(version)$(exeext) + -( cd $(DESTDIR)$(bindir) && \ + $(LN) $(GCC_INSTALL_NAME)$(exeext) $(target_noncanonical)-gcc-$(version)$(exeext) ) ++endif + -if [ -f gcc-cross$(exeext) ] ; then \ + if [ -d $(DESTDIR)$(gcc_tooldir)/bin/. ] ; then \ + rm -f $(DESTDIR)$(gcc_tooldir)/bin/gcc$(exeext); \ +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -775,7 +775,7 @@ + install-data-local: + $(PRE_INSTALL) + ## Install the .pc file. +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=$(GCJVERSION); \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -12413,7 +12413,7 @@ + @BUILD_ECJ1_TRUE@ mv $(DESTDIR)$(libexecsubdir)/`echo ecjx | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` $(DESTDIR)$(libexecsubdir)/ecj1$(host_exeext) + install-data-local: + $(PRE_INSTALL) +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=$(GCJVERSION); \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libgcc/Makefile.in +=================================================================== +--- a/src/libgcc/Makefile.in ++++ b/src/libgcc/Makefile.in +@@ -206,7 +206,7 @@ + export toolexecdir + export toolexeclibdir + +-version := $(shell $(CC) -dumpversion) ++version := $(shell cat $(srcdir)/../gcc/BASE-VER) + + ifeq ($(decimal_float),yes) + ifeq ($(enable_decimal_float),bid) +--- a/src/libjava/testsuite/lib/libjava.exp ++++ b/src/libjava/testsuite/lib/libjava.exp +@@ -177,7 +177,7 @@ + + set text [eval exec "$GCJ_UNDER_TEST -B$specdir -v 2>@ stdout"] + regexp " version \[^\n\r\]*" $text version +- set libjava_version [lindex $version 1] ++ set libjava_version 4.7 + + verbose "version: $libjava_version" + --- gcc-4.7-4.7.2.orig/debian/patches/libffi-ro-eh_frame_sect.diff +++ gcc-4.7-4.7.2/debian/patches/libffi-ro-eh_frame_sect.diff @@ -0,0 +1,13 @@ +# DP: PR libffi/47248, force a read only eh frame section. + +--- a/src/libffi/configure.ac ++++ b/src/libffi/configure.ac +@@ -347,6 +347,8 @@ + libffi_cv_ro_eh_frame=yes + fi + fi ++ # FIXME: see PR libffi/47248 ++ libffi_cv_ro_eh_frame=yes + rm -f conftest.* + ]) + if test "x$libffi_cv_ro_eh_frame" = xyes; then --- gcc-4.7-4.7.2.orig/debian/patches/cross-biarch.diff +++ gcc-4.7-4.7.2/debian/patches/cross-biarch.diff @@ -0,0 +1,79 @@ +# DP: Fix the location of target's libs in cross-build for biarch + +--- + +--- a/src/config-ml.in 2010-08-24 01:48:38.000000000 -0400 ++++ b/src/config-ml.in 2010-08-24 03:56:12.000000000 -0400 +@@ -540,7 +540,12 @@ + else \ + if [ -d ../$${dir}/$${lib} ]; then \ + flags=`echo $$i | sed -e 's/^[^;]*;//' -e 's/@/ -/g'`; \ +- if (cd ../$${dir}/$${lib}; $(MAKE) $(FLAGS_TO_PASS) \ ++ libsuffix_="$${dir}"; \ ++ if [ "$${dir}" = "n32" ]; then libsuffix_=32; fi; \ ++ if (cd ../$${dir}/$${lib}; $(MAKE) $(subst \ ++ -B$(build_tooldir)/lib/, \ ++ -B$(build_tooldir)/lib$${libsuffix_}/, \ ++ $(FLAGS_TO_PASS)) \ + CFLAGS="$(CFLAGS) $${flags}" \ + CCASFLAGS="$(CCASFLAGS) $${flags}" \ + FCFLAGS="$(FCFLAGS) $${flags}" \ +@@ -791,6 +796,13 @@ + GCJ_=$GCJ' ' + GFORTRAN_=$GFORTRAN' ' + else ++ if [ "${ml_dir}" = "." ]; then ++ FILTER_="s!X\\(.*\\)!\\1!p" ++ elif [ "${ml_dir}" = "n32" ]; then # mips n32 -> lib32 ++ FILTER_="s!X\\(.*\\)/!\\132/!p" ++ else ++ FILTER_="s!X\\(.*\\)/!\\1${ml_dir}/!p" ++ fi + # Create a regular expression that matches any string as long + # as ML_POPDIR. + popdir_rx=`echo "${ML_POPDIR}" | sed 's,.,.,g'` +@@ -799,6 +811,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\1/p"`' ' ;; ++ -B*/lib/) ++ CC_="${CC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -811,6 +825,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ CXX_="${CXX_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -823,6 +839,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ F77_="${F77_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -835,6 +853,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -847,6 +867,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) --- gcc-4.7-4.7.2.orig/debian/patches/mudflapth-link.diff +++ gcc-4.7-4.7.2/debian/patches/mudflapth-link.diff @@ -0,0 +1,24 @@ +# DP: Link libmudflapth.so with -lpthread + +--- a/src/libmudflap/Makefile.am ++++ b/src/libmudflap/Makefile.am +@@ -44,7 +44,7 @@ + mf-hooks2.c \ + mf-hooks3.c + libmudflapth_la_CFLAGS = -DLIBMUDFLAPTH +-libmudflapth_la_LIBADD = ++libmudflapth_la_LIBADD = -lpthread + libmudflapth_la_DEPENDENCIES = $(libmudflapth_la_LIBADD) + libmudflapth_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` + +--- a/src/libmudflap/Makefile.in ++++ b/src/libmudflap/Makefile.in +@@ -288,7 +288,7 @@ + mf-hooks3.c + + libmudflapth_la_CFLAGS = -DLIBMUDFLAPTH +-libmudflapth_la_LIBADD = ++libmudflapth_la_LIBADD = -lpthread + libmudflapth_la_DEPENDENCIES = $(libmudflapth_la_LIBADD) + libmudflapth_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` + --- gcc-4.7-4.7.2.orig/debian/patches/libffi-powerpc-sf.diff +++ gcc-4.7-4.7.2/debian/patches/libffi-powerpc-sf.diff @@ -0,0 +1,982 @@ +>From 95d80e11f6d14da32c9e117321658c27155e313a Mon Sep 17 00:00:00 2001 +From: Kyle Moffett +Date: Tue, 16 Aug 2011 14:46:50 -0400 +Subject: [PATCH] PowerPC: Debug and fix soft-floating-point support + +There were a wide range of bugs in this code, including long-double +register alignment issues, assignments to global constants (which were +actually stored as non-constant integers). + +This passes the testsuite on soft-floating-point PowerPC, and it builds +and passes the testsuite on PowerPC e500 systems which cannot even +assemble the regular floating-point instruction set. + +Signed-off-by: Kyle Moffett +--- + src/powerpc/ffi.c | 533 ++++++++++++++++++++++++--------------------- + src/powerpc/ffitarget.h | 14 +- + src/powerpc/ppc_closure.S | 19 ++ + src/powerpc/sysv.S | 6 + + 4 files changed, 310 insertions(+), 262 deletions(-) + +diff --git a/src/powerpc/ffi.c b/src/powerpc/ffi.c +index fb2a39f..e5ec1c5 100644 +--- a/src/libffi/src/powerpc/ffi.c ++++ b/src/libffi/src/powerpc/ffi.c +@@ -39,7 +39,9 @@ + /* The assembly depends on these exact flags. */ + FLAG_RETURNS_SMST = 1 << (31-31), /* Used for FFI_SYSV small structs. */ + FLAG_RETURNS_NOTHING = 1 << (31-30), /* These go in cr7 */ ++#ifndef __NO_FPRS__ + FLAG_RETURNS_FP = 1 << (31-29), ++#endif + FLAG_RETURNS_64BITS = 1 << (31-28), + + FLAG_RETURNS_128BITS = 1 << (31-27), /* cr6 */ +@@ -50,21 +52,20 @@ + /* Bits (31-24) through (31-19) store shift value for SMST */ + + FLAG_ARG_NEEDS_COPY = 1 << (31- 7), ++#ifndef __NO_FPRS__ + FLAG_FP_ARGUMENTS = 1 << (31- 6), /* cr1.eq; specified by ABI */ ++#endif + FLAG_4_GPR_ARGUMENTS = 1 << (31- 5), + FLAG_RETVAL_REFERENCE = 1 << (31- 4) + }; + + /* About the SYSV ABI. */ +-unsigned int NUM_GPR_ARG_REGISTERS = 8; ++#define ASM_NEEDS_REGISTERS 4 ++#define NUM_GPR_ARG_REGISTERS 8 + #ifndef __NO_FPRS__ +-unsigned int NUM_FPR_ARG_REGISTERS = 8; +-#else +-unsigned int NUM_FPR_ARG_REGISTERS = 0; ++# define NUM_FPR_ARG_REGISTERS 8 + #endif + +-enum { ASM_NEEDS_REGISTERS = 4 }; +- + /* ffi_prep_args_SYSV is called by the assembly routine once stack space + has been allocated for the function's arguments. + +@@ -113,10 +114,12 @@ + valp gpr_base; + int intarg_count; + ++#ifndef __NO_FPRS__ + /* 'fpr_base' points at the space for fpr1, and grows upwards as + we use FPR registers. */ + valp fpr_base; + int fparg_count; ++#endif + + /* 'copy_space' grows down as we put structures in it. It should + stay 16-byte aligned. */ +@@ -125,9 +128,8 @@ + /* 'next_arg' grows up as we put parameters in it. */ + valp next_arg; + +- int i, ii MAYBE_UNUSED; ++ int i; + ffi_type **ptr; +- double double_tmp; + union { + void **v; + char **c; +@@ -143,15 +145,16 @@ + size_t struct_copy_size; + unsigned gprvalue; + +- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) +- NUM_FPR_ARG_REGISTERS = 0; +- + stacktop.c = (char *) stack + bytes; + gpr_base.u = stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS; + intarg_count = 0; ++#ifndef __NO_FPRS__ + fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS; + fparg_count = 0; + copy_space.c = ((flags & FLAG_FP_ARGUMENTS) ? fpr_base.c : gpr_base.c); ++#else ++ copy_space.c = gpr_base.c; ++#endif + next_arg.u = stack + 2; + + /* Check that everything starts aligned properly. */ +@@ -174,12 +177,29 @@ + i > 0; + i--, ptr++, p_argv.v++) + { +- switch ((*ptr)->type) +- { ++ unsigned short typenum = (*ptr)->type; ++ ++ /* We may need to handle some values depending on ABI */ ++ if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (typenum == FFI_TYPE_FLOAT) ++ typenum = FFI_TYPE_UINT32; ++ if (typenum == FFI_TYPE_DOUBLE) ++ typenum = FFI_TYPE_UINT64; ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_UINT128; ++ } else if (ecif->cif->abi != FFI_LINUX) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_STRUCT; ++#endif ++ } ++ ++ /* Now test the translated value */ ++ switch (typenum) { ++ double double_tmp; ++#ifndef __NO_FPRS__ + case FFI_TYPE_FLOAT: + /* With FFI_LINUX_SOFT_FLOAT floats are handled like UINT32. */ +- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_float_prep; + double_tmp = **p_argv.f; + if (fparg_count >= NUM_FPR_ARG_REGISTERS) + { +@@ -195,8 +215,6 @@ + + case FFI_TYPE_DOUBLE: + /* With FFI_LINUX_SOFT_FLOAT doubles are handled like UINT64. */ +- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_double_prep; + double_tmp = **p_argv.d; + + if (fparg_count >= NUM_FPR_ARG_REGISTERS) +@@ -218,43 +236,6 @@ + + #if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE + case FFI_TYPE_LONGDOUBLE: +- if ((ecif->cif->abi != FFI_LINUX) +- && (ecif->cif->abi != FFI_LINUX_SOFT_FLOAT)) +- goto do_struct; +- /* The soft float ABI for long doubles works like this, +- a long double is passed in four consecutive gprs if available. +- A maximum of 2 long doubles can be passed in gprs. +- If we do not have 4 gprs left, the long double is passed on the +- stack, 4-byte aligned. */ +- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) +- { +- unsigned int int_tmp = (*p_argv.ui)[0]; +- if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3) +- { +- if (intarg_count < NUM_GPR_ARG_REGISTERS) +- intarg_count += NUM_GPR_ARG_REGISTERS - intarg_count; +- *next_arg.u = int_tmp; +- next_arg.u++; +- for (ii = 1; ii < 4; ii++) +- { +- int_tmp = (*p_argv.ui)[ii]; +- *next_arg.u = int_tmp; +- next_arg.u++; +- } +- } +- else +- { +- *gpr_base.u++ = int_tmp; +- for (ii = 1; ii < 4; ii++) +- { +- int_tmp = (*p_argv.ui)[ii]; +- *gpr_base.u++ = int_tmp; +- } +- } +- intarg_count +=4; +- } +- else +- { + double_tmp = (*p_argv.d)[0]; + + if (fparg_count >= NUM_FPR_ARG_REGISTERS - 1) +@@ -280,13 +261,40 @@ + + fparg_count += 2; + FFI_ASSERT (flags & FLAG_FP_ARGUMENTS); +- } + break; + #endif ++#endif /* have FPRs */ ++ ++ /* ++ * The soft float ABI for long doubles works like this, a long double ++ * is passed in four consecutive GPRs if available. A maximum of 2 ++ * long doubles can be passed in gprs. If we do not have 4 GPRs ++ * left, the long double is passed on the stack, 4-byte aligned. ++ */ ++ case FFI_TYPE_UINT128: { ++ unsigned int int_tmp = (*p_argv.ui)[0]; ++ unsigned int ii; ++ if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3) { ++ if (intarg_count < NUM_GPR_ARG_REGISTERS) ++ intarg_count += NUM_GPR_ARG_REGISTERS - intarg_count; ++ *(next_arg.u++) = int_tmp; ++ for (ii = 1; ii < 4; ii++) { ++ int_tmp = (*p_argv.ui)[ii]; ++ *(next_arg.u++) = int_tmp; ++ } ++ } else { ++ *(gpr_base.u++) = int_tmp; ++ for (ii = 1; ii < 4; ii++) { ++ int_tmp = (*p_argv.ui)[ii]; ++ *(gpr_base.u++) = int_tmp; ++ } ++ } ++ intarg_count += 4; ++ break; ++ } + + case FFI_TYPE_UINT64: + case FFI_TYPE_SINT64: +- soft_double_prep: + if (intarg_count == NUM_GPR_ARG_REGISTERS-1) + intarg_count++; + if (intarg_count >= NUM_GPR_ARG_REGISTERS) +@@ -319,9 +327,6 @@ + break; + + case FFI_TYPE_STRUCT: +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- do_struct: +-#endif + struct_copy_size = ((*ptr)->size + 15) & ~0xF; + copy_space.c -= struct_copy_size; + memcpy (copy_space.c, *p_argv.c, (*ptr)->size); +@@ -349,7 +354,6 @@ + case FFI_TYPE_UINT32: + case FFI_TYPE_SINT32: + case FFI_TYPE_POINTER: +- soft_float_prep: + + gprvalue = **p_argv.ui; + +@@ -366,8 +370,10 @@ + /* Check that we didn't overrun the stack... */ + FFI_ASSERT (copy_space.c >= next_arg.c); + FFI_ASSERT (gpr_base.u <= stacktop.u - ASM_NEEDS_REGISTERS); ++#ifndef __NO_FPRS__ + FFI_ASSERT (fpr_base.u + <= stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS); ++#endif + FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS || intarg_count <= 4); + } + +@@ -604,9 +610,6 @@ + unsigned type = cif->rtype->type; + unsigned size = cif->rtype->size; + +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- NUM_FPR_ARG_REGISTERS = 0; +- + if (cif->abi != FFI_LINUX64) + { + /* All the machine-independent calculation of cif->bytes will be wrong. +@@ -646,25 +649,38 @@ + - Single/double FP values in fpr1, long double in fpr1,fpr2. + - soft-float float/doubles are treated as UINT32/UINT64 respectivley. + - soft-float long doubles are returned in gpr3-gpr6. */ ++ /* First translate for softfloat/nonlinux */ ++ if (cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (type == FFI_TYPE_FLOAT) ++ type = FFI_TYPE_UINT32; ++ if (type == FFI_TYPE_DOUBLE) ++ type = FFI_TYPE_UINT64; ++ if (type == FFI_TYPE_LONGDOUBLE) ++ type = FFI_TYPE_UINT128; ++ } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (type == FFI_TYPE_LONGDOUBLE) ++ type = FFI_TYPE_STRUCT; ++#endif ++ } ++ + switch (type) + { +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++#ifndef __NO_FPRS__ + case FFI_TYPE_LONGDOUBLE: +- if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64 +- && cif->abi != FFI_LINUX_SOFT_FLOAT) +- goto byref; + flags |= FLAG_RETURNS_128BITS; + /* Fall through. */ +-#endif + case FFI_TYPE_DOUBLE: + flags |= FLAG_RETURNS_64BITS; + /* Fall through. */ + case FFI_TYPE_FLOAT: +- /* With FFI_LINUX_SOFT_FLOAT no fp registers are used. */ +- if (cif->abi != FFI_LINUX_SOFT_FLOAT) +- flags |= FLAG_RETURNS_FP; ++ flags |= FLAG_RETURNS_FP; + break; ++#endif + ++ case FFI_TYPE_UINT128: ++ flags |= FLAG_RETURNS_128BITS; ++ /* Fall through. */ + case FFI_TYPE_UINT64: + case FFI_TYPE_SINT64: + flags |= FLAG_RETURNS_64BITS; +@@ -699,9 +715,6 @@ + } + } + } +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- byref: +-#endif + intarg_count++; + flags |= FLAG_RETVAL_REFERENCE; + /* Fall through. */ +@@ -722,39 +735,36 @@ + Stuff on the stack needs to keep proper alignment. */ + for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++) + { +- switch ((*ptr)->type) +- { ++ unsigned short typenum = (*ptr)->type; ++ ++ /* We may need to handle some values depending on ABI */ ++ if (cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (typenum == FFI_TYPE_FLOAT) ++ typenum = FFI_TYPE_UINT32; ++ if (typenum == FFI_TYPE_DOUBLE) ++ typenum = FFI_TYPE_UINT64; ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_UINT128; ++ } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_STRUCT; ++#endif ++ } ++ ++ switch (typenum) { ++#ifndef __NO_FPRS__ + case FFI_TYPE_FLOAT: +- /* With FFI_LINUX_SOFT_FLOAT floats are handled like UINT32. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_float_cif; + fparg_count++; + /* floating singles are not 8-aligned on stack */ + break; + + #if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE + case FFI_TYPE_LONGDOUBLE: +- if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX_SOFT_FLOAT) +- goto do_struct; +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- { +- if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3 +- || intarg_count < NUM_GPR_ARG_REGISTERS) +- /* A long double in FFI_LINUX_SOFT_FLOAT can use only +- a set of four consecutive gprs. If we have not enough, +- we have to adjust the intarg_count value. */ +- intarg_count += NUM_GPR_ARG_REGISTERS - intarg_count; +- intarg_count += 4; +- break; +- } +- else +- fparg_count++; ++ fparg_count++; + /* Fall thru */ + #endif + case FFI_TYPE_DOUBLE: +- /* With FFI_LINUX_SOFT_FLOAT doubles are handled like UINT64. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_double_cif; + fparg_count++; + /* If this FP arg is going on the stack, it must be + 8-byte-aligned. */ +@@ -763,10 +773,21 @@ + && intarg_count % 2 != 0) + intarg_count++; + break; ++#endif ++ case FFI_TYPE_UINT128: ++ /* ++ * A long double in FFI_LINUX_SOFT_FLOAT can use only a set ++ * of four consecutive gprs. If we do not have enough, we ++ * have to adjust the intarg_count value. ++ */ ++ if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3 ++ && intarg_count < NUM_GPR_ARG_REGISTERS) ++ intarg_count = NUM_GPR_ARG_REGISTERS; ++ intarg_count += 4; ++ break; + + case FFI_TYPE_UINT64: + case FFI_TYPE_SINT64: +- soft_double_cif: + /* 'long long' arguments are passed as two words, but + either both words must fit in registers or both go + on the stack. If they go on the stack, they must +@@ -783,9 +804,6 @@ + break; + + case FFI_TYPE_STRUCT: +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- do_struct: +-#endif + /* We must allocate space for a copy of these to enforce + pass-by-value. Pad the space up to a multiple of 16 + bytes (the maximum alignment required for anything under +@@ -793,12 +811,20 @@ + struct_copy_size += ((*ptr)->size + 15) & ~0xF; + /* Fall through (allocate space for the pointer). */ + +- default: +- soft_float_cif: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: + /* Everything else is passed as a 4-byte word in a GPR, either + the object itself or a pointer to it. */ + intarg_count++; + break; ++ default: ++ FFI_ASSERT (0); + } + } + else +@@ -827,16 +853,29 @@ + intarg_count += ((*ptr)->size + 7) / 8; + break; + +- default: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_SINT64: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: + /* Everything else is passed as a 8-byte word in a GPR, either + the object itself or a pointer to it. */ + intarg_count++; + break; ++ default: ++ FFI_ASSERT (0); + } + } + ++#ifndef __NO_FPRS__ + if (fparg_count != 0) + flags |= FLAG_FP_ARGUMENTS; ++#endif + if (intarg_count > 4) + flags |= FLAG_4_GPR_ARGUMENTS; + if (struct_copy_size != 0) +@@ -844,21 +883,27 @@ + + if (cif->abi != FFI_LINUX64) + { ++#ifndef __NO_FPRS__ + /* Space for the FPR registers, if needed. */ + if (fparg_count != 0) + bytes += NUM_FPR_ARG_REGISTERS * sizeof (double); ++#endif + + /* Stack space. */ + if (intarg_count > NUM_GPR_ARG_REGISTERS) + bytes += (intarg_count - NUM_GPR_ARG_REGISTERS) * sizeof (int); ++#ifndef __NO_FPRS__ + if (fparg_count > NUM_FPR_ARG_REGISTERS) + bytes += (fparg_count - NUM_FPR_ARG_REGISTERS) * sizeof (double); ++#endif + } + else + { ++#ifndef __NO_FPRS__ + /* Space for the FPR registers, if needed. */ + if (fparg_count != 0) + bytes += NUM_FPR_ARG_REGISTERS64 * sizeof (double); ++#endif + + /* Stack space. */ + if (intarg_count > NUM_GPR_ARG_REGISTERS64) +@@ -905,9 +950,11 @@ + switch (cif->abi) + { + #ifndef POWERPC64 ++# ifndef __NO_FPRS__ + case FFI_SYSV: + case FFI_GCC_SYSV: + case FFI_LINUX: ++# endif + case FFI_LINUX_SOFT_FLOAT: + ffi_call_SYSV (&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn); + break; +@@ -1011,32 +1058,38 @@ + void ** avalue; + ffi_type ** arg_types; + long i, avn; +- long nf; /* number of floating registers already used */ +- long ng; /* number of general registers already used */ +- ffi_cif * cif; +- double temp; +- unsigned size; ++#ifndef __NO_FPRS__ ++ long nf = 0; /* number of floating registers already used */ ++#endif ++ long ng = 0; /* number of general registers already used */ ++ ++ ffi_cif *cif = closure->cif; ++ unsigned size = cif->rtype->size; ++ unsigned short rtypenum = cif->rtype->type; + +- cif = closure->cif; + avalue = alloca (cif->nargs * sizeof (void *)); +- size = cif->rtype->size; + +- nf = 0; +- ng = 0; ++ /* First translate for softfloat/nonlinux */ ++ if (cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (rtypenum == FFI_TYPE_FLOAT) ++ rtypenum = FFI_TYPE_UINT32; ++ if (rtypenum == FFI_TYPE_DOUBLE) ++ rtypenum = FFI_TYPE_UINT64; ++ if (rtypenum == FFI_TYPE_LONGDOUBLE) ++ rtypenum = FFI_TYPE_UINT128; ++ } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (rtypenum == FFI_TYPE_LONGDOUBLE) ++ rtypenum = FFI_TYPE_STRUCT; ++#endif ++ } ++ + + /* Copy the caller's structure return value address so that the closure + returns the data directly to the caller. + For FFI_SYSV the result is passed in r3/r4 if the struct size is less + or equal 8 bytes. */ +- +- if ((cif->rtype->type == FFI_TYPE_STRUCT +- && !((cif->abi == FFI_SYSV) && (size <= 8))) +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- || (cif->rtype->type == FFI_TYPE_LONGDOUBLE +- && cif->abi != FFI_LINUX && cif->abi != FFI_LINUX_SOFT_FLOAT) +-#endif +- ) +- { ++ if (rtypenum == FFI_TYPE_STRUCT && ((cif->abi != FFI_SYSV) || (size > 8))) { + rvalue = (void *) *pgr; + ng++; + pgr++; +@@ -1047,10 +1100,109 @@ + arg_types = cif->arg_types; + + /* Grab the addresses of the arguments from the stack frame. */ +- while (i < avn) +- { +- switch (arg_types[i]->type) +- { ++ while (i < avn) { ++ unsigned short typenum = arg_types[i]->type; ++ ++ /* We may need to handle some values depending on ABI */ ++ if (cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (typenum == FFI_TYPE_FLOAT) ++ typenum = FFI_TYPE_UINT32; ++ if (typenum == FFI_TYPE_DOUBLE) ++ typenum = FFI_TYPE_UINT64; ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_UINT128; ++ } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_STRUCT; ++#endif ++ } ++ ++ switch (typenum) { ++#ifndef __NO_FPRS__ ++ case FFI_TYPE_FLOAT: ++ /* unfortunately float values are stored as doubles ++ * in the ffi_closure_SYSV code (since we don't check ++ * the type in that routine). ++ */ ++ ++ /* there are 8 64bit floating point registers */ ++ ++ if (nf < 8) ++ { ++ double temp = pfr->d; ++ pfr->f = (float) temp; ++ avalue[i] = pfr; ++ nf++; ++ pfr++; ++ } ++ else ++ { ++ /* FIXME? here we are really changing the values ++ * stored in the original calling routines outgoing ++ * parameter stack. This is probably a really ++ * naughty thing to do but... ++ */ ++ avalue[i] = pst; ++ pst += 1; ++ } ++ break; ++ ++ case FFI_TYPE_DOUBLE: ++ /* On the outgoing stack all values are aligned to 8 */ ++ /* there are 8 64bit floating point registers */ ++ ++ if (nf < 8) ++ { ++ avalue[i] = pfr; ++ nf++; ++ pfr++; ++ } ++ else ++ { ++ if (((long) pst) & 4) ++ pst++; ++ avalue[i] = pst; ++ pst += 2; ++ } ++ break; ++ ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ case FFI_TYPE_LONGDOUBLE: ++ if (nf < 7) ++ { ++ avalue[i] = pfr; ++ pfr += 2; ++ nf += 2; ++ } ++ else ++ { ++ if (((long) pst) & 4) ++ pst++; ++ avalue[i] = pst; ++ pst += 4; ++ nf = 8; ++ } ++ break; ++#endif ++#endif /* have FPRS */ ++ ++ case FFI_TYPE_UINT128: ++ /* ++ * Test if for the whole long double, 4 gprs are available. ++ * otherwise the stuff ends up on the stack. ++ */ ++ if (ng < 5) { ++ avalue[i] = pgr; ++ pgr += 4; ++ ng += 4; ++ } else { ++ avalue[i] = pst; ++ pst += 4; ++ ng = 8+4; ++ } ++ break; ++ + case FFI_TYPE_SINT8: + case FFI_TYPE_UINT8: + /* there are 8 gpr registers used to pass values */ +@@ -1086,7 +1238,6 @@ + case FFI_TYPE_SINT32: + case FFI_TYPE_UINT32: + case FFI_TYPE_POINTER: +- soft_float_closure: + /* there are 8 gpr registers used to pass values */ + if (ng < 8) + { +@@ -1102,9 +1253,6 @@ + break; + + case FFI_TYPE_STRUCT: +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- do_struct: +-#endif + /* Structs are passed by reference. The address will appear in a + gpr if it is one of the first 8 arguments. */ + if (ng < 8) +@@ -1122,7 +1270,6 @@ + + case FFI_TYPE_SINT64: + case FFI_TYPE_UINT64: +- soft_double_closure: + /* passing long long ints are complex, they must + * be passed in suitable register pairs such as + * (r3,r4) or (r5,r6) or (r6,r7), or (r7,r8) or (r9,r10) +@@ -1154,99 +1301,8 @@ + } + break; + +- case FFI_TYPE_FLOAT: +- /* With FFI_LINUX_SOFT_FLOAT floats are handled like UINT32. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_float_closure; +- /* unfortunately float values are stored as doubles +- * in the ffi_closure_SYSV code (since we don't check +- * the type in that routine). +- */ +- +- /* there are 8 64bit floating point registers */ +- +- if (nf < 8) +- { +- temp = pfr->d; +- pfr->f = (float) temp; +- avalue[i] = pfr; +- nf++; +- pfr++; +- } +- else +- { +- /* FIXME? here we are really changing the values +- * stored in the original calling routines outgoing +- * parameter stack. This is probably a really +- * naughty thing to do but... +- */ +- avalue[i] = pst; +- pst += 1; +- } +- break; +- +- case FFI_TYPE_DOUBLE: +- /* With FFI_LINUX_SOFT_FLOAT doubles are handled like UINT64. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_double_closure; +- /* On the outgoing stack all values are aligned to 8 */ +- /* there are 8 64bit floating point registers */ +- +- if (nf < 8) +- { +- avalue[i] = pfr; +- nf++; +- pfr++; +- } +- else +- { +- if (((long) pst) & 4) +- pst++; +- avalue[i] = pst; +- pst += 2; +- } +- break; +- +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- case FFI_TYPE_LONGDOUBLE: +- if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX_SOFT_FLOAT) +- goto do_struct; +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- { /* Test if for the whole long double, 4 gprs are available. +- otherwise the stuff ends up on the stack. */ +- if (ng < 5) +- { +- avalue[i] = pgr; +- pgr += 4; +- ng += 4; +- } +- else +- { +- avalue[i] = pst; +- pst += 4; +- ng = 8; +- } +- break; +- } +- if (nf < 7) +- { +- avalue[i] = pfr; +- pfr += 2; +- nf += 2; +- } +- else +- { +- if (((long) pst) & 4) +- pst++; +- avalue[i] = pst; +- pst += 4; +- nf = 8; +- } +- break; +-#endif +- + default: +- FFI_ASSERT (0); ++ FFI_ASSERT (0); + } + + i++; +@@ -1263,39 +1319,9 @@ + already used and we never have a struct with size zero. That is the reason + for the subtraction of 1. See the comment in ffitarget.h about ordering. + */ +- if (cif->abi == FFI_SYSV && cif->rtype->type == FFI_TYPE_STRUCT +- && size <= 8) ++ if (cif->abi == FFI_SYSV && rtypenum == FFI_TYPE_STRUCT && size <= 8) + return (FFI_SYSV_TYPE_SMALL_STRUCT - 1) + size; +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- else if (cif->rtype->type == FFI_TYPE_LONGDOUBLE +- && cif->abi != FFI_LINUX && cif->abi != FFI_LINUX_SOFT_FLOAT) +- return FFI_TYPE_STRUCT; +-#endif +- /* With FFI_LINUX_SOFT_FLOAT floats and doubles are handled like UINT32 +- respectivley UINT64. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- { +- switch (cif->rtype->type) +- { +- case FFI_TYPE_FLOAT: +- return FFI_TYPE_UINT32; +- break; +- case FFI_TYPE_DOUBLE: +- return FFI_TYPE_UINT64; +- break; +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- case FFI_TYPE_LONGDOUBLE: +- return FFI_TYPE_UINT128; +- break; +-#endif +- default: +- return cif->rtype->type; +- } +- } +- else +- { +- return cif->rtype->type; +- } ++ return rtypenum; + } + + int FFI_HIDDEN ffi_closure_helper_LINUX64 (ffi_closure *, void *, +diff --git a/src/powerpc/ffitarget.h b/src/powerpc/ffitarget.h +index d17f731..820c482 100644 +--- a/src/libffi/src/powerpc/ffitarget.h ++++ b/src/libffi/src/powerpc/ffitarget.h +@@ -60,18 +60,14 @@ typedef enum ffi_abi { + FFI_LINUX64, + FFI_LINUX, + FFI_LINUX_SOFT_FLOAT, +-# ifdef POWERPC64 ++# if defined(POWERPC64) + FFI_DEFAULT_ABI = FFI_LINUX64, +-# else +-# if (!defined(__NO_FPRS__) && (__LDBL_MANT_DIG__ == 106)) +- FFI_DEFAULT_ABI = FFI_LINUX, +-# else +-# ifdef __NO_FPRS__ ++# elif defined(__NO_FPRS__) + FFI_DEFAULT_ABI = FFI_LINUX_SOFT_FLOAT, +-# else ++# elif (__LDBL_MANT_DIG__ == 106) ++ FFI_DEFAULT_ABI = FFI_LINUX, ++# else + FFI_DEFAULT_ABI = FFI_GCC_SYSV, +-# endif +-# endif + # endif + #endif + +diff --git a/src/powerpc/ppc_closure.S b/src/powerpc/ppc_closure.S +index 56f7d1a..41fb885 100644 +--- a/src/libffi/src/powerpc/ppc_closure.S ++++ b/src/libffi/src/powerpc/ppc_closure.S +@@ -122,22 +122,41 @@ ENTRY(ffi_closure_SYSV) + blr + + # case FFI_TYPE_FLOAT ++#ifndef __NO_FPRS__ + lfs %f1,112+0(%r1) + mtlr %r0 + addi %r1,%r1,144 ++#else ++ nop ++ nop ++ nop ++#endif + blr + + # case FFI_TYPE_DOUBLE ++#ifndef __NO_FPRS__ + lfd %f1,112+0(%r1) + mtlr %r0 + addi %r1,%r1,144 ++#else ++ nop ++ nop ++ nop ++#endif + blr + + # case FFI_TYPE_LONGDOUBLE ++#ifndef __NO_FPRS__ + lfd %f1,112+0(%r1) + lfd %f2,112+8(%r1) + mtlr %r0 + b .Lfinish ++#else ++ nop ++ nop ++ nop ++ blr ++#endif + + # case FFI_TYPE_UINT8 + lbz %r3,112+3(%r1) +diff --git a/src/powerpc/sysv.S b/src/powerpc/sysv.S +index 96ea22b..5ee3a19 100644 +--- a/src/libffi/src/powerpc/sysv.S ++++ b/src/libffi/src/powerpc/sysv.S +@@ -83,6 +83,7 @@ ENTRY(ffi_call_SYSV) + nop + 1: + ++#ifndef __NO_FPRS__ + /* Load all the FP registers. */ + bf- 6,2f + lfd %f1,-16-(8*4)-(8*8)(%r28) +@@ -94,6 +95,7 @@ ENTRY(ffi_call_SYSV) + lfd %f6,-16-(8*4)-(3*8)(%r28) + lfd %f7,-16-(8*4)-(2*8)(%r28) + lfd %f8,-16-(8*4)-(1*8)(%r28) ++#endif + 2: + + /* Make the call. */ +@@ -103,7 +105,9 @@ ENTRY(ffi_call_SYSV) + mtcrf 0x01,%r31 /* cr7 */ + bt- 31,L(small_struct_return_value) + bt- 30,L(done_return_value) ++#ifndef __NO_FPRS__ + bt- 29,L(fp_return_value) ++#endif + stw %r3,0(%r30) + bf+ 28,L(done_return_value) + stw %r4,4(%r30) +@@ -124,6 +128,7 @@ L(done_return_value): + lwz %r1,0(%r1) + blr + ++#ifndef __NO_FPRS__ + L(fp_return_value): + bf 28,L(float_return_value) + stfd %f1,0(%r30) +@@ -134,6 +139,7 @@ L(fp_return_value): + L(float_return_value): + stfs %f1,0(%r30) + b L(done_return_value) ++#endif + + L(small_struct_return_value): + extrwi %r6,%r31,2,19 /* number of bytes padding = shift/8 */ +-- +1.7.2.5 + --- gcc-4.7-4.7.2.orig/debian/patches/fix-warnings.diff +++ gcc-4.7-4.7.2/debian/patches/fix-warnings.diff @@ -0,0 +1,1341 @@ +# DP: Fix warnings with -D_FORTIFY_SOURCE and -Wformat-security. + +libcpp/ + + * macro.c (create_iso_definition): Avoid warnings with + -Wformat-security. + * lex.c (cpp_output_token): Avoid warnings with -D_FORTIFY_SOURCE. + +gcc/ + + * toplev.c (print_to_asm_out_file, print_to_stderr): Avoid warnings with + -Wformat-security, (pch_option_mismatch) avoid warnings with + -D_FORTIFY_SOURCE. + + * c-convert.c (convert): Avoid warnings with -Wformat-security. + * c-typeck.c (convert_arguments, build_unary_op, build_binary_op): Likewise. + * c-common.c (c_parse_error): Likewise. + * cfg.c (dump_cfg_bb_info): Likewise. + * fold-const.c (fold_overflow_warning): Likewise. + * ira-conflicts.c (print_hard_reg_set): Likewise. + * opts.c (print_filtered_help): Likewise. + * tree-switch-conversion.c (do_switchconv): Likewise. + * collect2.c (collect_execute, scan_prog_file): Likewise. + + * c-ppoutput.c (print_lines_directives_only,scan_translation_unit_trad): + Avoid warnings with -D_FORTIFY_SOURCE. + * dbxout.c (dbxout_finish_complex_stabs): Likewise. + * diagnostic.c (build_message_string): Likewise. + * final.c (output_operand_lossage): Likewise. + * tree-data-ref.c (dot_rdg): Likewise. + * tree-ssa-structalias.c (create_function_info_for, + create_variable_info_for): Likewise. + +gcc/cp/ + + * pt.c (tsubst_copy_and_build): Avoid warnings with -Wformat-security. + * parser.c (cp_parser_check_type_definition, + cp_parser_non_integral_constant_expression): Likewise. + * typeck.c (cp_build_binary_op, cp_build_unary_op): Likewise. + * cvt.c (ocp_convert): Likewise. + +gcc/fortran/ + + * cpp.c (scan_translation_unit_trad): Avoid warnings with -D_FORTIFY_SOURCE. + * trans.c (gfc_trans_runtime_error_vararg): Likewise. + * trans-array.c (gfc_trans_array_bound_check, gfc_conv_array_ref, + gfc_conv_ss_startstride, gfc_trans_dummy_array_bias, + gfc_conv_array_parameter): Likewise. + * trans-io.c (gfc_trans_io_runtime_check, set_string): Likewise. + * trans-expr.c (gfc_conv_substring): Likewise. + + * decl.c (gfc_match_kind_spec, match_char_kind): Avoid warnings with + -Wformat-security. + * intrinsic.c (add_sym, find_sym, make_alias): Likewise. + * match.c (gfc_match_small_int, gfc_match_small_int_expr): Likewise. + * matchexp.c (match_primary, match_level_2, match_level_3, + match_level_4, match_or_operand, match_equiv_operand, match_level_5, + gfc_match_expr): Likewise. + * module.c (find_true_name, mio_pool_string, mio_symtree_ref, mio_expr, + load_generic_interfaces, load_needed, read_module, write_symbol0, + write_generic, import_iso_c_binding_module, create_int_parameter, + use_iso_fortran_env_module, gfc_use_module): Likewise. + * openmp.c (gfc_match_omp_clauses): Likewise. + * primary.c (match_hollerith_constant, match_string_constant, + match_keyword_arg): Likewise. + * symbol.c (gfc_add_component, gfc_new_symtree, gfc_delete_symtree, + gfc_get_uop, gfc_new_symbol, gfc_get_gsymbol, gen_special_c_interop_ptr, + gen_cptr_param, gen_fptr_param, gen_shape_param, + generate_isocbinding_symbol, get_iso_c_sym): Likewise. + * trans-decl.c (gfc_find_module): Likewise. + +gcc/objc/ + + * objc-act.c (objc_lookup_protocol): Avoid warnings with + -Wformat-security. + +--- + gcc/c-common.c | 4 +- + gcc/c-convert.c | 2 +- + gcc/c-ppoutput.c | 6 ++- + gcc/c-typeck.c | 6 +- + gcc/cfg.c | 2 +- + gcc/collect2.c | 8 ++-- + gcc/cp/cvt.c | 2 +- + gcc/cp/parser.c | 4 +- + gcc/cp/pt.c | 2 +- + gcc/cp/typeck.c | 4 +- + gcc/dbxout.c | 5 +- + gcc/diagnostic.c | 3 +- + gcc/final.c | 5 +- + gcc/fold-const.c | 2 +- + gcc/fortran/cpp.c | 3 +- + gcc/fortran/decl.c | 4 +- + gcc/fortran/intrinsic.c | 8 ++-- + gcc/fortran/match.c | 4 +- + gcc/fortran/matchexp.c | 18 ++++---- + gcc/fortran/module.c | 30 +++++++------- + gcc/fortran/openmp.c | 2 +- + gcc/fortran/primary.c | 6 +- + gcc/fortran/symbol.c | 24 +++++----- + gcc/fortran/trans-array.c | 94 +++++++++++++++++++++++++---------------- + gcc/fortran/trans-decl.c | 2 +- + gcc/fortran/trans-expr.c | 22 ++++++---- + gcc/fortran/trans-io.c | 9 +++- + gcc/fortran/trans.c | 11 +++-- + gcc/ira-conflicts.c | 2 +- + gcc/objc/objc-act.c | 2 +- + gcc/opts.c | 2 +- + gcc/toplev.c | 9 +++- + gcc/tree-data-ref.c | 3 +- + gcc/tree-ssa-structalias.c | 13 ++++-- + gcc/tree-switch-conversion.c | 2 +- + libcpp/lex.c | 6 ++- + libcpp/macro.c | 4 +- + 37 files changed, 190 insertions(+), 145 deletions(-) + +--- a/src/gcc/c-common.c ++++ b/src/gcc/c-common.c +@@ -7493,11 +7493,11 @@ c_parse_error (const char *gmsgid, enum cpp_ttype token, tree value) + message = NULL; + } + else +- error (gmsgid); ++ error ("%s", gmsgid); + + if (message) + { +- error (message); ++ error ("%s", message); + free (message); + } + #undef catenate_messages +--- a/src/gcc/c-convert.c ++++ b/src/gcc/c-convert.c +@@ -79,7 +79,7 @@ convert (tree type, tree expr) + if ((invalid_conv_diag + = targetm.invalid_conversion (TREE_TYPE (expr), type))) + { +- error (invalid_conv_diag); ++ error ("%s", invalid_conv_diag); + return error_mark_node; + } + +--- a/src/gcc/c-ppoutput.c ++++ b/src/gcc/c-ppoutput.c +@@ -223,8 +223,9 @@ scan_translation_unit (cpp_reader *pfile) + static void + print_lines_directives_only (int lines, const void *buf, size_t size) + { ++ size_t rv_neverused ATTRIBUTE_UNUSED; + print.src_line += lines; +- fwrite (buf, 1, size, print.outf); ++ rv_neverused = fwrite (buf, 1, size, print.outf); + } + + /* Writes out the preprocessed file, handling spacing and paste +@@ -256,8 +257,9 @@ scan_translation_unit_trad (cpp_reader *pfile) + while (_cpp_read_logical_line_trad (pfile)) + { + size_t len = pfile->out.cur - pfile->out.base; ++ size_t rv_neverused ATTRIBUTE_UNUSED; + maybe_print_line (pfile->out.first_line); +- fwrite (pfile->out.base, 1, len, print.outf); ++ rv_neverused = fwrite (pfile->out.base, 1, len, print.outf); + print.printed = 1; + if (!CPP_OPTION (pfile, discard_comments)) + account_for_newlines (pfile->out.base, len); +--- a/src/gcc/c-typeck.c ++++ b/src/gcc/c-typeck.c +@@ -2730,7 +2730,7 @@ convert_arguments (int nargs, tree *argarray, + else if ((invalid_func_diag = + targetm.calls.invalid_arg_for_unprototyped_fn (typelist, fundecl, val))) + { +- error (invalid_func_diag); ++ error ("%s", invalid_func_diag); + return -1; + } + else +@@ -2947,7 +2947,7 @@ build_unary_op (location_t location, + if ((invalid_op_diag + = targetm.invalid_unary_op (code, TREE_TYPE (xarg)))) + { +- error_at (location, invalid_op_diag); ++ error_at (location, "%s", invalid_op_diag); + return error_mark_node; + } + +@@ -8095,7 +8095,7 @@ build_binary_op (location_t location, enum tree_code code, + if ((invalid_op_diag + = targetm.invalid_binary_op (code, type0, type1))) + { +- error_at (location, invalid_op_diag); ++ error_at (location, "%s", invalid_op_diag); + return error_mark_node; + } + +--- a/src/gcc/cfg.c ++++ b/src/gcc/cfg.c +@@ -908,7 +908,7 @@ dump_cfg_bb_info (FILE *file, basic_block bb) + else + fprintf (file, ", "); + first = false; +- fprintf (file, bb_bitnames[i]); ++ fprintf (file, "%s", bb_bitnames[i]); + } + if (!first) + fprintf (file, ")"); +--- a/src/gcc/collect2.c ++++ b/src/gcc/collect2.c +@@ -1647,10 +1647,10 @@ collect_execute (const char *prog, char **argv, const char *outname, + if (err != 0) + { + errno = err; +- fatal_perror (errmsg); ++ fatal_perror ("%s", errmsg); + } + else +- fatal (errmsg); ++ fatal ("%s", errmsg); + } + + if (response_arg) +@@ -2137,10 +2137,10 @@ scan_prog_file (const char *prog_name, enum pass which_pass) + if (err != 0) + { + errno = err; +- fatal_perror (errmsg); ++ fatal_perror ("%s", errmsg); + } + else +- fatal (errmsg); ++ fatal ("%s", errmsg); + } + + int_handler = (void (*) (int)) signal (SIGINT, SIG_IGN); +--- a/src/gcc/cp/cvt.c ++++ b/src/gcc/cp/cvt.c +@@ -591,7 +591,7 @@ ocp_convert (tree type, tree expr, int convtype, int flags) + if ((invalid_conv_diag + = targetm.invalid_conversion (TREE_TYPE (expr), type))) + { +- error (invalid_conv_diag); ++ error ("%s", invalid_conv_diag); + return error_mark_node; + } + +--- a/src/gcc/cp/parser.c ++++ b/src/gcc/cp/parser.c +@@ -2204,7 +2204,7 @@ cp_parser_check_type_definition (cp_parser* parser) + { + /* Don't use `%s' to print the string, because quotations (`%<', `%>') + in the message need to be interpreted. */ +- error (parser->type_definition_forbidden_message); ++ error ("%s", parser->type_definition_forbidden_message); + return false; + } + return true; +@@ -2291,7 +2291,7 @@ cp_parser_non_integral_constant_expression (cp_parser *parser, + char *message = concat (thing, + " cannot appear in a constant-expression", + NULL); +- error (message); ++ error ("%s", message); + free (message); + return true; + } +--- a/src/gcc/cp/pt.c ++++ b/src/gcc/cp/pt.c +@@ -11060,7 +11060,7 @@ tsubst_copy_and_build (tree t, + &error_msg, + input_location); + if (error_msg) +- error (error_msg); ++ error ("%s", error_msg); + if (!function_p && TREE_CODE (decl) == IDENTIFIER_NODE) + decl = unqualified_name_lookup_error (decl); + return decl; +--- a/src/gcc/cp/typeck.c ++++ b/src/gcc/cp/typeck.c +@@ -3373,7 +3373,7 @@ cp_build_binary_op (location_t location, + if ((invalid_op_diag + = targetm.invalid_binary_op (code, type0, type1))) + { +- error (invalid_op_diag); ++ error ("%s", invalid_op_diag); + return error_mark_node; + } + +@@ -4254,7 +4254,7 @@ cp_build_unary_op (enum tree_code code, tree xarg, int noconvert, + : code), + TREE_TYPE (xarg)))) + { +- error (invalid_op_diag); ++ error ("%s", invalid_op_diag); + return error_mark_node; + } + +--- a/src/gcc/dbxout.c ++++ b/src/gcc/dbxout.c +@@ -847,6 +847,7 @@ dbxout_finish_complex_stabs (tree sym, STAB_CODE_TYPE code, + int line ATTRIBUTE_UNUSED; + char *str; + size_t len; ++ size_t rv_neverused ATTRIBUTE_UNUSED; + + line = sym ? DECL_SOURCE_LINE (sym) : 0; + if (DBX_CONTIN_LENGTH > 0) +@@ -867,7 +868,7 @@ dbxout_finish_complex_stabs (tree sym, STAB_CODE_TYPE code, + for (;;) + { + chunklen = strlen (chunk); +- fwrite (chunk, 1, chunklen, asm_out_file); ++ rv_neverused = fwrite (chunk, 1, chunklen, asm_out_file); + fputs ("\",", asm_out_file); + + /* Must add an extra byte to account for the NUL separator. */ +@@ -894,7 +895,7 @@ dbxout_finish_complex_stabs (tree sym, STAB_CODE_TYPE code, + len = obstack_object_size (&stabstr_ob); + str = XOBFINISH (&stabstr_ob, char *); + +- fwrite (str, 1, len, asm_out_file); ++ rv_neverused = fwrite (str, 1, len, asm_out_file); + DBX_FINISH_STABS (sym, code, line, addr, label, number); + } + obstack_free (&stabstr_ob, str); +--- a/src/gcc/diagnostic.c ++++ b/src/gcc/diagnostic.c +@@ -70,9 +70,10 @@ build_message_string (const char *msg, ...) + { + char *str; + va_list ap; ++ size_t rv_neverused ATTRIBUTE_UNUSED; + + va_start (ap, msg); +- vasprintf (&str, msg, ap); ++ rv_neverused = vasprintf (&str, msg, ap); + va_end (ap); + + return str; +--- a/src/gcc/final.c ++++ b/src/gcc/final.c +@@ -2989,12 +2989,13 @@ output_operand_lossage (const char *cmsgid, ...) + char *new_message; + const char *pfx_str; + va_list ap; ++ int rv_neverused ATTRIBUTE_UNUSED; + + va_start (ap, cmsgid); + + pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; +- asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); +- vasprintf (&new_message, fmt_string, ap); ++ rv_neverused = asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); ++ rv_neverused = vasprintf (&new_message, fmt_string, ap); + + if (this_is_asm_operands) + error_for_asm (this_is_asm_operands, "%s", new_message); +--- a/src/gcc/fold-const.c ++++ b/src/gcc/fold-const.c +@@ -1025,7 +1025,7 @@ fold_overflow_warning (const char* gmsgid, enum warn_strict_overflow_code wc) + } + } + else if (issue_strict_overflow_warning (wc)) +- warning (OPT_Wstrict_overflow, gmsgid); ++ warning (OPT_Wstrict_overflow, "%s", gmsgid); + } + + /* Return true if the built-in mathematical function specified by CODE +--- a/src/gcc/fortran/cpp.c ++++ b/src/gcc/fortran/cpp.c +@@ -729,8 +729,9 @@ scan_translation_unit_trad (cpp_reader *pfile) + while (_cpp_read_logical_line_trad (pfile)) + { + size_t len = pfile->out.cur - pfile->out.base; ++ size_t rv_neverused ATTRIBUTE_UNUSED; + maybe_print_line (pfile->out.first_line); +- fwrite (pfile->out.base, 1, len, print.outf); ++ rv_neverused = fwrite (pfile->out.base, 1, len, print.outf); + print.printed = 1; + if (!CPP_OPTION (pfile, discard_comments)) + account_for_newlines (pfile->out.base, len); +--- a/src/gcc/fortran/decl.c ++++ b/src/gcc/fortran/decl.c +@@ -1954,7 +1954,7 @@ kind_expr: + + if (msg != NULL) + { +- gfc_error (msg); ++ gfc_error ("%s", msg); + m = MATCH_ERROR; + goto no_match; + } +@@ -2060,7 +2060,7 @@ match_char_kind (int * kind, int * is_iso_c) + *is_iso_c = e->ts.is_iso_c; + if (msg != NULL) + { +- gfc_error (msg); ++ gfc_error ("%s", msg); + m = MATCH_ERROR; + goto no_match; + } +--- a/src/gcc/fortran/intrinsic.c ++++ b/src/gcc/fortran/intrinsic.c +@@ -262,11 +262,11 @@ add_sym (const char *name, gfc_isym_id id, enum klass cl, int actual_ok, bt type + break; + + case SZ_NOTHING: +- next_sym->name = gfc_get_string (name); ++ next_sym->name = gfc_get_string ("%s", name); + + strcpy (buf, "_gfortran_"); + strcat (buf, name); +- next_sym->lib_name = gfc_get_string (buf); ++ next_sym->lib_name = gfc_get_string ("%s", buf); + + next_sym->elemental = (cl == CLASS_ELEMENTAL); + next_sym->inquiry = (cl == CLASS_INQUIRY); +@@ -722,7 +722,7 @@ find_sym (gfc_intrinsic_sym *start, int n, const char *name) + /* name may be a user-supplied string, so we must first make sure + that we're comparing against a pointer into the global string + table. */ +- const char *p = gfc_get_string (name); ++ const char *p = gfc_get_string ("%s", name); + + while (n > 0) + { +@@ -918,7 +918,7 @@ make_alias (const char *name, int standard) + + case SZ_NOTHING: + next_sym[0] = next_sym[-1]; +- next_sym->name = gfc_get_string (name); ++ next_sym->name = gfc_get_string ("%s", name); + next_sym->standard = standard; + next_sym++; + break; +--- a/src/gcc/fortran/match.c ++++ b/src/gcc/fortran/match.c +@@ -391,7 +391,7 @@ gfc_match_small_int (int *value) + + if (p != NULL) + { +- gfc_error (p); ++ gfc_error ("%s", p); + m = MATCH_ERROR; + } + +@@ -423,7 +423,7 @@ gfc_match_small_int_expr (int *value, gfc_expr **expr) + + if (p != NULL) + { +- gfc_error (p); ++ gfc_error ("%s", p); + m = MATCH_ERROR; + } + +--- a/src/gcc/fortran/matchexp.c ++++ b/src/gcc/fortran/matchexp.c +@@ -193,7 +193,7 @@ match_primary (gfc_expr **result) + return MATCH_YES; + + syntax: +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + return MATCH_ERROR; + } + +@@ -496,7 +496,7 @@ match_level_2 (gfc_expr **result) + m = match_ext_add_operand (&e); + if (m == MATCH_NO) + { +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + m = MATCH_ERROR; + } + } +@@ -535,7 +535,7 @@ match_level_2 (gfc_expr **result) + + m = match_ext_add_operand (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +@@ -586,7 +586,7 @@ match_level_3 (gfc_expr **result) + m = match_level_2 (&e); + if (m == MATCH_NO) + { +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + gfc_free_expr (all); + } + if (m != MATCH_YES) +@@ -646,7 +646,7 @@ match_level_4 (gfc_expr **result) + + m = match_level_3 (&right); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (left); +@@ -755,7 +755,7 @@ match_or_operand (gfc_expr **result) + + m = match_and_operand (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +@@ -798,7 +798,7 @@ match_equiv_operand (gfc_expr **result) + + m = match_or_operand (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +@@ -852,7 +852,7 @@ match_level_5 (gfc_expr **result) + + m = match_equiv_operand (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +@@ -911,7 +911,7 @@ gfc_match_expr (gfc_expr **result) + + m = match_level_5 (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +--- a/src/gcc/fortran/module.c ++++ b/src/gcc/fortran/module.c +@@ -805,9 +805,9 @@ find_true_name (const char *name, const char *module) + gfc_symbol sym; + int c; + +- sym.name = gfc_get_string (name); ++ sym.name = gfc_get_string ("%s", name); + if (module != NULL) +- sym.module = gfc_get_string (module); ++ sym.module = gfc_get_string ("%s", module); + else + sym.module = NULL; + t.sym = &sym; +@@ -1612,7 +1612,7 @@ mio_pool_string (const char **stringp) + else + { + require_atom (ATOM_STRING); +- *stringp = atom_string[0] == '\0' ? NULL : gfc_get_string (atom_string); ++ *stringp = atom_string[0] == '\0' ? NULL : gfc_get_string ("%s", atom_string); + gfc_free (atom_string); + } + } +@@ -2460,7 +2460,7 @@ mio_symtree_ref (gfc_symtree **stp) + { + p->u.rsym.sym = gfc_new_symbol (p->u.rsym.true_name, + gfc_current_ns); +- p->u.rsym.sym->module = gfc_get_string (p->u.rsym.module); ++ p->u.rsym.sym->module = gfc_get_string ("%s", p->u.rsym.module); + } + + p->u.rsym.symtree->n.sym = p->u.rsym.sym; +@@ -2967,7 +2967,7 @@ mio_expr (gfc_expr **ep) + else + { + require_atom (ATOM_STRING); +- e->value.function.name = gfc_get_string (atom_string); ++ e->value.function.name = gfc_get_string ("%s", atom_string); + gfc_free (atom_string); + + mio_integer (&flag); +@@ -3695,8 +3695,8 @@ load_generic_interfaces (void) + if (!sym) + { + gfc_get_symbol (p, NULL, &sym); +- sym->name = gfc_get_string (name); +- sym->module = gfc_get_string (module_name); ++ sym->name = gfc_get_string ("%s", name); ++ sym->module = gfc_get_string ("%s", module_name); + sym->attr.flavor = FL_PROCEDURE; + sym->attr.generic = 1; + sym->attr.use_assoc = 1; +@@ -3901,7 +3901,7 @@ load_needed (pointer_info *p) + 1, &ns->proc_name); + + sym = gfc_new_symbol (p->u.rsym.true_name, ns); +- sym->module = gfc_get_string (p->u.rsym.module); ++ sym->module = gfc_get_string ("%s", p->u.rsym.module); + strcpy (sym->binding_label, p->u.rsym.binding_label); + + associate_integer_pointer (p, sym); +@@ -4162,7 +4162,7 @@ read_module (void) + info->u.rsym.sym = gfc_new_symbol (info->u.rsym.true_name, + gfc_current_ns); + sym = info->u.rsym.sym; +- sym->module = gfc_get_string (info->u.rsym.module); ++ sym->module = gfc_get_string ("%s", info->u.rsym.module); + + /* TODO: hmm, can we test this? Do we know it will be + initialized to zeros? */ +@@ -4521,7 +4521,7 @@ write_symbol0 (gfc_symtree *st) + + sym = st->n.sym; + if (sym->module == NULL) +- sym->module = gfc_get_string (module_name); ++ sym->module = gfc_get_string ("%s", module_name); + + if (sym->attr.flavor == FL_PROCEDURE && sym->attr.generic + && !sym->attr.subroutine && !sym->attr.function) +@@ -4614,7 +4614,7 @@ write_generic (gfc_symtree *st) + return; + + if (sym->module == NULL) +- sym->module = gfc_get_string (module_name); ++ sym->module = gfc_get_string ("%s", module_name); + + mio_symbol_interface (&st->name, &sym->module, &sym->generic); + } +@@ -4962,7 +4962,7 @@ import_iso_c_binding_module (void) + + mod_sym->attr.flavor = FL_MODULE; + mod_sym->attr.intrinsic = 1; +- mod_sym->module = gfc_get_string (iso_c_module_name); ++ mod_sym->module = gfc_get_string ("%s", iso_c_module_name); + mod_sym->from_intmod = INTMOD_ISO_C_BINDING; + } + +@@ -5039,7 +5039,7 @@ create_int_parameter (const char *name, int value, const char *modname, + gfc_get_sym_tree (name, gfc_current_ns, &tmp_symtree); + sym = tmp_symtree->n.sym; + +- sym->module = gfc_get_string (modname); ++ sym->module = gfc_get_string ("%s", modname); + sym->attr.flavor = FL_PARAMETER; + sym->ts.type = BT_INTEGER; + sym->ts.kind = gfc_default_integer_kind; +@@ -5083,7 +5083,7 @@ use_iso_fortran_env_module (void) + + mod_sym->attr.flavor = FL_MODULE; + mod_sym->attr.intrinsic = 1; +- mod_sym->module = gfc_get_string (mod); ++ mod_sym->module = gfc_get_string ("%s", mod); + mod_sym->from_intmod = INTMOD_ISO_FORTRAN_ENV; + } + else +@@ -5279,7 +5279,7 @@ gfc_use_module (void) + fclose (module_fp); + + use_stmt = gfc_get_use_list (); +- use_stmt->module_name = gfc_get_string (module_name); ++ use_stmt->module_name = gfc_get_string ("%s", module_name); + use_stmt->only_flag = only_flag; + use_stmt->rename = gfc_rename_list; + use_stmt->where = use_locus; +--- a/src/gcc/fortran/openmp.c ++++ b/src/gcc/fortran/openmp.c +@@ -396,7 +396,7 @@ gfc_match_omp_clauses (gfc_omp_clauses **cp, int mask) + const char *p = gfc_extract_int (cexpr, &collapse); + if (p) + { +- gfc_error (p); ++ gfc_error ("%s", p); + collapse = 1; + } + else if (collapse <= 0) +--- a/src/gcc/fortran/primary.c ++++ b/src/gcc/fortran/primary.c +@@ -255,7 +255,7 @@ match_hollerith_constant (gfc_expr **result) + msg = gfc_extract_int (e, &num); + if (msg != NULL) + { +- gfc_error (msg); ++ gfc_error ("%s", msg); + goto cleanup; + } + if (num == 0) +@@ -924,7 +924,7 @@ match_string_constant (gfc_expr **result) + q = gfc_extract_int (sym->value, &kind); + if (q != NULL) + { +- gfc_error (q); ++ gfc_error ("%s", q); + return MATCH_ERROR; + } + gfc_set_sym_referenced (sym); +@@ -1479,7 +1479,7 @@ match_keyword_arg (gfc_actual_arglist *actual, gfc_actual_arglist *base) + } + } + +- actual->name = gfc_get_string (name); ++ actual->name = gfc_get_string ("%s", name); + return MATCH_YES; + + cleanup: +--- a/src/gcc/fortran/symbol.c ++++ b/src/gcc/fortran/symbol.c +@@ -1759,7 +1759,7 @@ gfc_add_component (gfc_symbol *sym, const char *name, + else + tail->next = p; + +- p->name = gfc_get_string (name); ++ p->name = gfc_get_string ("%s", name); + p->loc = gfc_current_locus; + + *component = p; +@@ -2251,7 +2251,7 @@ gfc_new_symtree (gfc_symtree **root, const char *name) + gfc_symtree *st; + + st = XCNEW (gfc_symtree); +- st->name = gfc_get_string (name); ++ st->name = gfc_get_string ("%s", name); + st->typebound = NULL; + + gfc_insert_bbt (root, st, compare_symtree); +@@ -2268,7 +2268,7 @@ gfc_delete_symtree (gfc_symtree **root, const char *name) + + st0 = gfc_find_symtree (*root, name); + +- st.name = gfc_get_string (name); ++ st.name = gfc_get_string ("%s", name); + gfc_delete_bbt (root, &st, compare_symtree); + + gfc_free (st0); +@@ -2327,7 +2327,7 @@ gfc_get_uop (const char *name) + st = gfc_new_symtree (&gfc_current_ns->uop_root, name); + + uop = st->n.uop = XCNEW (gfc_user_op); +- uop->name = gfc_get_string (name); ++ uop->name = gfc_get_string ("%s", name); + uop->access = ACCESS_UNKNOWN; + uop->ns = gfc_current_ns; + +@@ -2399,7 +2399,7 @@ gfc_new_symbol (const char *name, gfc_namespace *ns) + if (strlen (name) > GFC_MAX_SYMBOL_LEN) + gfc_internal_error ("new_symbol(): Symbol name too long"); + +- p->name = gfc_get_string (name); ++ p->name = gfc_get_string ("%s", name); + + /* Make sure flags for symbol being C bound are clear initially. */ + p->attr.is_bind_c = 0; +@@ -3280,7 +3280,7 @@ gfc_get_gsymbol (const char *name) + + s = XCNEW (gfc_gsymbol); + s->type = GSYM_UNKNOWN; +- s->name = gfc_get_string (name); ++ s->name = gfc_get_string ("%s", name); + + gfc_insert_bbt (&gfc_gsym_root, s, gsym_compare); + +@@ -3517,7 +3517,7 @@ gen_special_c_interop_ptr (int ptr_id, const char *ptr_name, + } + + /* Module name is some mangled version of iso_c_binding. */ +- tmp_sym->module = gfc_get_string (module_name); ++ tmp_sym->module = gfc_get_string ("%s", module_name); + + /* Say it's from the iso_c_binding module. */ + tmp_sym->attr.is_iso_c = 1; +@@ -3637,7 +3637,7 @@ gen_cptr_param (gfc_formal_arglist **head, + } + + param_sym->ts.derived = c_ptr_sym; +- param_sym->module = gfc_get_string (module_name); ++ param_sym->module = gfc_get_string ("%s", module_name); + + /* Make new formal arg. */ + formal_arg = gfc_get_formal_arglist (); +@@ -3682,7 +3682,7 @@ gen_fptr_param (gfc_formal_arglist **head, + + /* ISO C Binding type to allow any pointer type as actual param. */ + param_sym->ts.type = BT_VOID; +- param_sym->module = gfc_get_string (module_name); ++ param_sym->module = gfc_get_string ("%s", module_name); + + /* Make the arg. */ + formal_arg = gfc_get_formal_arglist (); +@@ -3753,7 +3753,7 @@ gen_shape_param (gfc_formal_arglist **head, + param_sym->attr.optional = 1; + param_sym->attr.intent = INTENT_IN; + param_sym->attr.dimension = 1; +- param_sym->module = gfc_get_string (module_name); ++ param_sym->module = gfc_get_string ("%s", module_name); + + /* Make the arg. */ + formal_arg = gfc_get_formal_arglist (); +@@ -3957,7 +3957,7 @@ generate_isocbinding_symbol (const char *mod_name, iso_c_binding_symbol s, + "create symbol"); + + /* Say what module this symbol belongs to. */ +- tmp_sym->module = gfc_get_string (mod_name); ++ tmp_sym->module = gfc_get_string ("%s", mod_name); + tmp_sym->from_intmod = INTMOD_ISO_C_BINDING; + tmp_sym->intmod_sym_id = s; + +@@ -4234,7 +4234,7 @@ get_iso_c_sym (gfc_symbol *old_sym, char *new_name, + strcpy (new_symtree->n.sym->binding_label, new_binding_label); + new_symtree->n.sym->attr = old_sym->attr; + new_symtree->n.sym->ts = old_sym->ts; +- new_symtree->n.sym->module = gfc_get_string (old_sym->module); ++ new_symtree->n.sym->module = gfc_get_string ("%s", old_sym->module); + new_symtree->n.sym->from_intmod = old_sym->from_intmod; + new_symtree->n.sym->intmod_sym_id = old_sym->intmod_sym_id; + /* Build the formal arg list. */ +--- a/src/gcc/fortran/trans-array.c ++++ b/src/gcc/fortran/trans-array.c +@@ -2232,6 +2232,7 @@ gfc_trans_array_bound_check (gfc_se * se, tree descriptor, tree index, int n, + tree tmp; + char *msg; + const char * name = NULL; ++ int rv_neverused ATTRIBUTE_UNUSED; + + if (!flag_bounds_check) + return index; +@@ -2270,11 +2271,13 @@ gfc_trans_array_bound_check (gfc_se * se, tree descriptor, tree index, int n, + tmp = gfc_conv_array_lbound (descriptor, n); + fault = fold_build2 (LT_EXPR, boolean_type_node, index, tmp); + if (name) +- asprintf (&msg, "%s for array '%s', lower bound of dimension %d exceeded" +- "(%%ld < %%ld)", gfc_msg_fault, name, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s for array '%s', lower bound of dimension %d exceeded" ++ "(%%ld < %%ld)", gfc_msg_fault, name, n+1); + else +- asprintf (&msg, "%s, lower bound of dimension %d exceeded (%%ld < %%ld)", +- gfc_msg_fault, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s, lower bound of dimension %d exceeded (%%ld < %%ld)", ++ gfc_msg_fault, n+1); + gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg, + fold_convert (long_integer_type_node, index), + fold_convert (long_integer_type_node, tmp)); +@@ -2286,11 +2289,14 @@ gfc_trans_array_bound_check (gfc_se * se, tree descriptor, tree index, int n, + tmp = gfc_conv_array_ubound (descriptor, n); + fault = fold_build2 (GT_EXPR, boolean_type_node, index, tmp); + if (name) +- asprintf (&msg, "%s for array '%s', upper bound of dimension %d " +- " exceeded (%%ld > %%ld)", gfc_msg_fault, name, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s for array '%s', upper bound of dimension %d " ++ " exceeded (%%ld > %%ld)", gfc_msg_fault, name, n+1); + else +- asprintf (&msg, "%s, upper bound of dimension %d exceeded (%%ld > %%ld)", +- gfc_msg_fault, n+1); ++ rv_neverused = ++ asprintf (&msg, ++ "%s, upper bound of dimension %d exceeded (%%ld > %%ld)", ++ gfc_msg_fault, n+1); + gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg, + fold_convert (long_integer_type_node, index), + fold_convert (long_integer_type_node, tmp)); +@@ -2474,6 +2480,7 @@ gfc_conv_array_ref (gfc_se * se, gfc_array_ref * ar, gfc_symbol * sym, + /* Check array bounds. */ + tree cond; + char *msg; ++ int rv_neverused ATTRIBUTE_UNUSED; + + /* Evaluate the indexse.expr only once. */ + indexse.expr = save_expr (indexse.expr); +@@ -2482,9 +2489,10 @@ gfc_conv_array_ref (gfc_se * se, gfc_array_ref * ar, gfc_symbol * sym, + tmp = gfc_conv_array_lbound (se->expr, n); + cond = fold_build2 (LT_EXPR, boolean_type_node, + indexse.expr, tmp); +- asprintf (&msg, "%s for array '%s', " +- "lower bound of dimension %d exceeded (%%ld < %%ld)", +- gfc_msg_fault, sym->name, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s for array '%s', " ++ "lower bound of dimension %d exceeded (%%ld < %%ld)", ++ gfc_msg_fault, sym->name, n+1); + gfc_trans_runtime_check (true, false, cond, &se->pre, where, msg, + fold_convert (long_integer_type_node, + indexse.expr), +@@ -2499,9 +2507,10 @@ gfc_conv_array_ref (gfc_se * se, gfc_array_ref * ar, gfc_symbol * sym, + tmp = gfc_conv_array_ubound (se->expr, n); + cond = fold_build2 (GT_EXPR, boolean_type_node, + indexse.expr, tmp); +- asprintf (&msg, "%s for array '%s', " +- "upper bound of dimension %d exceeded (%%ld > %%ld)", +- gfc_msg_fault, sym->name, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s for array '%s', " ++ "upper bound of dimension %d exceeded (%%ld > %%ld)", ++ gfc_msg_fault, sym->name, n+1); + gfc_trans_runtime_check (true, false, cond, &se->pre, where, msg, + fold_convert (long_integer_type_node, + indexse.expr), +@@ -3048,6 +3057,7 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + for (n = 0; n < loop->dimen; n++) + { + bool check_upper; ++ int rv_neverused ATTRIBUTE_UNUSED; + + dim = info->dim[n]; + if (info->ref->u.ar.dimen_type[dim] != DIMEN_RANGE) +@@ -3063,9 +3073,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + /* Zero stride is not allowed. */ + tmp = fold_build2 (EQ_EXPR, boolean_type_node, info->stride[n], + gfc_index_zero_node); +- asprintf (&msg, "Zero stride is not allowed, for dimension %d " +- "of array '%s'", info->dim[n]+1, +- ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "Zero stride is not allowed, for dimension %d " ++ "of array '%s'", info->dim[n]+1, ++ ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg); + gfc_free (msg); +@@ -3106,9 +3117,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + lbound); + tmp = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, + non_zerosized, tmp); +- asprintf (&msg, "%s, lower bound of dimension %d of array '%s'" +- " exceeded (%%ld < %%ld)", gfc_msg_fault, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, lower bound of dimension %d of array '%s'" ++ " exceeded (%%ld < %%ld)", gfc_msg_fault, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, +@@ -3123,9 +3135,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + info->start[n], ubound); + tmp = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, + non_zerosized, tmp); +- asprintf (&msg, "%s, upper bound of dimension %d of array " +- "'%s' exceeded (%%ld > %%ld)", gfc_msg_fault, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, upper bound of dimension %d of array " ++ "'%s' exceeded (%%ld > %%ld)", gfc_msg_fault, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, info->start[n]), +@@ -3146,9 +3159,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + tmp = fold_build2 (LT_EXPR, boolean_type_node, tmp2, lbound); + tmp = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, + non_zerosized, tmp); +- asprintf (&msg, "%s, lower bound of dimension %d of array '%s'" +- " exceeded (%%ld < %%ld)", gfc_msg_fault, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, lower bound of dimension %d of array '%s'" ++ " exceeded (%%ld < %%ld)", gfc_msg_fault, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, +@@ -3162,9 +3176,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + tmp = fold_build2 (GT_EXPR, boolean_type_node, tmp2, ubound); + tmp = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, + non_zerosized, tmp); +- asprintf (&msg, "%s, upper bound of dimension %d of array " +- "'%s' exceeded (%%ld > %%ld)", gfc_msg_fault, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, upper bound of dimension %d of array " ++ "'%s' exceeded (%%ld > %%ld)", gfc_msg_fault, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, tmp2), +@@ -3186,9 +3201,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + tree tmp3; + + tmp3 = fold_build2 (NE_EXPR, boolean_type_node, tmp, size[n]); +- asprintf (&msg, "%s, size mismatch for dimension %d " +- "of array '%s' (%%ld/%%ld)", gfc_msg_bounds, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, size mismatch for dimension %d " ++ "of array '%s' (%%ld/%%ld)", gfc_msg_bounds, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp3, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, tmp), +@@ -4449,14 +4465,16 @@ gfc_trans_dummy_array_bias (gfc_symbol * sym, tree tmpdesc, tree body) + { + /* Check (ubound(a) - lbound(a) == ubound(b) - lbound(b)). */ + char * msg; ++ int rv_neverused ATTRIBUTE_UNUSED; + + tmp = fold_build2 (MINUS_EXPR, gfc_array_index_type, + ubound, lbound); + stride2 = fold_build2 (MINUS_EXPR, gfc_array_index_type, + dubound, dlbound); + tmp = fold_build2 (NE_EXPR, gfc_array_index_type, tmp, stride2); +- asprintf (&msg, "%s for dimension %d of array '%s'", +- gfc_msg_bounds, n+1, sym->name); ++ rv_neverused = ++ asprintf (&msg, "%s for dimension %d of array '%s'", ++ gfc_msg_bounds, n+1, sym->name); + gfc_trans_runtime_check (true, false, tmp, &block, &loc, msg); + gfc_free (msg); + } +@@ -5332,12 +5350,14 @@ gfc_conv_array_parameter (gfc_se * se, gfc_expr * expr, gfc_ss * ss, int g77, + if (gfc_option.flag_check_array_temporaries) + { + char * msg; ++ int rv_neverused ATTRIBUTE_UNUSED; + + if (fsym && proc_name) +- asprintf (&msg, "An array temporary was created for argument " +- "'%s' of procedure '%s'", fsym->name, proc_name); ++ rv_neverused = ++ asprintf (&msg, "An array temporary was created for argument " ++ "'%s' of procedure '%s'", fsym->name, proc_name); + else +- asprintf (&msg, "An array temporary was created"); ++ rv_neverused = asprintf (&msg, "An array temporary was created"); + + tmp = build_fold_indirect_ref (desc); + tmp = gfc_conv_array_data (tmp); +--- a/src/gcc/fortran/trans-decl.c ++++ b/src/gcc/fortran/trans-decl.c +@@ -3071,7 +3071,7 @@ gfc_find_module (const char *name) + { + struct module_htab_entry *entry = GGC_CNEW (struct module_htab_entry); + +- entry->name = gfc_get_string (name); ++ entry->name = gfc_get_string ("%s", name); + entry->decls = htab_create_ggc (10, module_htab_decls_hash, + module_htab_decls_eq, NULL); + *slot = (void *) entry; +--- a/src/gcc/fortran/trans-expr.c ++++ b/src/gcc/fortran/trans-expr.c +@@ -400,6 +400,8 @@ gfc_conv_substring (gfc_se * se, gfc_ref * ref, int kind, + + if (flag_bounds_check) + { ++ int rv_neverused ATTRIBUTE_UNUSED; ++ + tree nonempty = fold_build2 (LE_EXPR, boolean_type_node, + start.expr, end.expr); + +@@ -409,11 +411,13 @@ gfc_conv_substring (gfc_se * se, gfc_ref * ref, int kind, + fault = fold_build2 (TRUTH_ANDIF_EXPR, boolean_type_node, + nonempty, fault); + if (name) +- asprintf (&msg, "Substring out of bounds: lower bound (%%ld) of '%s' " +- "is less than one", name); ++ rv_neverused = ++ asprintf (&msg, "Substring out of bounds: lower bound (%%ld) of '%s' " ++ "is less than one", name); + else +- asprintf (&msg, "Substring out of bounds: lower bound (%%ld)" +- "is less than one"); ++ rv_neverused = ++ asprintf (&msg, "Substring out of bounds: lower bound (%%ld)" ++ "is less than one"); + gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg, + fold_convert (long_integer_type_node, + start.expr)); +@@ -425,11 +429,13 @@ gfc_conv_substring (gfc_se * se, gfc_ref * ref, int kind, + fault = fold_build2 (TRUTH_ANDIF_EXPR, boolean_type_node, + nonempty, fault); + if (name) +- asprintf (&msg, "Substring out of bounds: upper bound (%%ld) of '%s' " +- "exceeds string length (%%ld)", name); ++ rv_neverused = ++ asprintf (&msg, "Substring out of bounds: upper bound (%%ld) of '%s' " ++ "exceeds string length (%%ld)", name); + else +- asprintf (&msg, "Substring out of bounds: upper bound (%%ld) " +- "exceeds string length (%%ld)"); ++ rv_neverused = ++ asprintf (&msg, "Substring out of bounds: upper bound (%%ld) " ++ "exceeds string length (%%ld)"); + gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg, + fold_convert (long_integer_type_node, end.expr), + fold_convert (long_integer_type_node, +--- a/src/gcc/fortran/trans-io.c ++++ b/src/gcc/fortran/trans-io.c +@@ -232,6 +232,7 @@ gfc_trans_io_runtime_check (tree cond, tree var, int error_code, + tree tmp; + tree arg1, arg2, arg3; + char *message; ++ int rv_neverused ATTRIBUTE_UNUSED; + + if (integer_zerop (cond)) + return; +@@ -243,7 +244,7 @@ gfc_trans_io_runtime_check (tree cond, tree var, int error_code, + + arg2 = build_int_cst (integer_type_node, error_code), + +- asprintf (&message, "%s", _(msgid)); ++ rv_neverused = asprintf (&message, "%s", _(msgid)); + arg3 = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + gfc_free(message); +@@ -660,14 +661,16 @@ set_string (stmtblock_t * block, stmtblock_t * postblock, tree var, + { + char * msg; + tree cond; ++ int rv_neverused ATTRIBUTE_UNUSED; + + gfc_conv_label_variable (&se, e); + tmp = GFC_DECL_STRING_LEN (se.expr); + cond = fold_build2 (LT_EXPR, boolean_type_node, + tmp, build_int_cst (TREE_TYPE (tmp), 0)); + +- asprintf(&msg, "Label assigned to variable '%s' (%%ld) is not a format " +- "label", e->symtree->name); ++ rv_neverused = ++ asprintf(&msg, "Label assigned to variable '%s' (%%ld) is not a format " ++ "label", e->symtree->name); + gfc_trans_runtime_check (true, false, cond, &se.pre, &e->where, msg, + fold_convert (long_integer_type_node, tmp)); + gfc_free (msg); +--- a/src/gcc/fortran/trans.c ++++ b/src/gcc/fortran/trans.c +@@ -371,6 +371,7 @@ gfc_trans_runtime_error_vararg (bool error, locus* where, const char* msgid, + char *message; + const char *p; + int line, nargs, i; ++ int rv_neverused ATTRIBUTE_UNUSED; + + /* Compute the number of extra arguments from the format string. */ + for (p = msgid, nargs = 0; *p; p++) +@@ -387,18 +388,18 @@ gfc_trans_runtime_error_vararg (bool error, locus* where, const char* msgid, + if (where) + { + line = LOCATION_LINE (where->lb->location); +- asprintf (&message, "At line %d of file %s", line, +- where->lb->file->filename); ++ rv_neverused = asprintf (&message, "At line %d of file %s", line, ++ where->lb->file->filename); + } + else +- asprintf (&message, "In file '%s', around line %d", +- gfc_source_file, input_line + 1); ++ rv_neverused = asprintf (&message, "In file '%s', around line %d", ++ gfc_source_file, input_line + 1); + + arg = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + gfc_free(message); + +- asprintf (&message, "%s", _(msgid)); ++ rv_neverused = asprintf (&message, "%s", _(msgid)); + arg2 = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + gfc_free(message); +--- a/src/gcc/ira-conflicts.c ++++ b/src/gcc/ira-conflicts.c +@@ -664,7 +664,7 @@ print_hard_reg_set (FILE *file, const char *title, HARD_REG_SET set) + { + int i, start; + +- fprintf (file, title); ++ fputs (title, file); + for (start = -1, i = 0; i < FIRST_PSEUDO_REGISTER; i++) + { + if (TEST_HARD_REG_BIT (set, i)) +--- a/src/gcc/objc/objc-act.c ++++ b/src/gcc/objc/objc-act.c +@@ -988,7 +988,7 @@ objc_lookup_protocol (tree proto, tree cls, tree typ, bool warn) + strcat (errbuf, " the \'"); + strcat (errbuf, IDENTIFIER_POINTER (PROTOCOL_NAME (proto))); + strcat (errbuf, "\' protocol"); +- warning (0, errbuf); ++ warning (0, "%s", errbuf); + } + + return false; +--- a/src/gcc/opts.c ++++ b/src/gcc/opts.c +@@ -1287,7 +1287,7 @@ print_filtered_help (unsigned int include_flags, + if (* (const char **) option->flag_var != NULL) + snprintf (new_help + strlen (new_help), + sizeof (new_help) - strlen (new_help), +- * (const char **) option->flag_var); ++ "%s", * (const char **) option->flag_var); + } + else + sprintf (new_help + strlen (new_help), +--- a/src/gcc/toplev.c ++++ b/src/gcc/toplev.c +@@ -1182,7 +1182,7 @@ print_to_asm_out_file (print_switch_type type, const char * text) + case SWITCH_TYPE_ENABLED: + if (prepend_sep) + fputc (' ', asm_out_file); +- fprintf (asm_out_file, text); ++ fputs (text, asm_out_file); + /* No need to return the length here as + print_single_switch has already done it. */ + return 0; +@@ -1211,7 +1211,7 @@ print_to_stderr (print_switch_type type, const char * text) + /* Drop through. */ + + case SWITCH_TYPE_DESCRIPTIVE: +- fprintf (stderr, text); ++ fputs (text, stderr); + /* No need to return the length here as + print_single_switch has already done it. */ + return 0; +@@ -1437,8 +1437,11 @@ static const char * + pch_option_mismatch (const char *option) + { + char *r; ++ int rv_neverused ATTRIBUTE_UNUSED; + +- asprintf (&r, _("created and used with differing settings of '%s'"), option); ++ rv_neverused = asprintf (&r, ++ _("created and used with differing settings of '%s'"), ++ option); + if (r == NULL) + return _("out of memory"); + return r; +--- a/src/gcc/tree-data-ref.c ++++ b/src/gcc/tree-data-ref.c +@@ -4607,13 +4607,14 @@ dot_rdg_1 (FILE *file, struct graph *rdg) + void + dot_rdg (struct graph *rdg) + { ++ int rv_neverused ATTRIBUTE_UNUSED; + FILE *file = fopen ("/tmp/rdg.dot", "w"); + gcc_assert (file != NULL); + + dot_rdg_1 (file, rdg); + fclose (file); + +- system ("dotty /tmp/rdg.dot"); ++ rv_neverused = system ("dotty /tmp/rdg.dot"); + } + + +--- a/src/gcc/tree-ssa-structalias.c ++++ b/src/gcc/tree-ssa-structalias.c +@@ -4240,6 +4240,7 @@ create_function_info_for (tree decl, const char *name) + tree arg; + unsigned int i; + bool is_varargs = false; ++ int rv_neverused ATTRIBUTE_UNUSED; + + /* Create the variable info. */ + +@@ -4279,7 +4280,7 @@ create_function_info_for (tree decl, const char *name) + argdecl = arg; + + newindex = VEC_length (varinfo_t, varmap); +- asprintf (&tempname, "%s.arg%d", name, i-1); ++ rv_neverused = asprintf (&tempname, "%s.arg%d", name, i-1); + newname = ggc_strdup (tempname); + free (tempname); + +@@ -4315,7 +4316,7 @@ create_function_info_for (tree decl, const char *name) + resultdecl = DECL_RESULT (decl); + + newindex = VEC_length (varinfo_t, varmap); +- asprintf (&tempname, "%s.result", name); ++ rv_neverused = asprintf (&tempname, "%s.result", name); + newname = ggc_strdup (tempname); + free (tempname); + +@@ -4474,9 +4475,11 @@ create_variable_info_for (tree decl, const char *name) + newindex = VEC_length (varinfo_t, varmap); + if (dump_file) + { +- asprintf (&tempname, "%s." HOST_WIDE_INT_PRINT_DEC +- "+" HOST_WIDE_INT_PRINT_DEC, +- vi->name, fo->offset, fo->size); ++ int rv_neverused ATTRIBUTE_UNUSED; ++ ++ rv_neverused = asprintf (&tempname, "%s." HOST_WIDE_INT_PRINT_DEC ++ "+" HOST_WIDE_INT_PRINT_DEC, ++ vi->name, fo->offset, fo->size); + newname = ggc_strdup (tempname); + free (tempname); + } +--- a/src/gcc/tree-switch-conversion.c ++++ b/src/gcc/tree-switch-conversion.c +@@ -858,7 +858,7 @@ do_switchconv (void) + { + gcc_assert (info.reason); + fprintf (dump_file, "Bailing out - "); +- fprintf (dump_file, info.reason); ++ fprintf (dump_file, "%s", info.reason); + fprintf (dump_file, "--------------------------------\n"); + } + } +--- a/src/libcpp/lex.c ++++ b/src/libcpp/lex.c +@@ -1512,6 +1512,8 @@ cpp_type2name (enum cpp_ttype type) + void + cpp_output_token (const cpp_token *token, FILE *fp) + { ++ size_t rv_neverused ATTRIBUTE_UNUSED; ++ + switch (TOKEN_SPELL (token)) + { + case SPELL_OPERATOR: +@@ -1545,7 +1547,7 @@ cpp_output_token (const cpp_token *token, FILE *fp) + { + unsigned char buffer[10]; + i += utf8_to_ucn (buffer, name + i) - 1; +- fwrite (buffer, 1, 10, fp); ++ rv_neverused = fwrite (buffer, 1, 10, fp); + } + else + fputc (NODE_NAME (token->val.node)[i], fp); +@@ -1553,7 +1555,7 @@ cpp_output_token (const cpp_token *token, FILE *fp) + break; + + case SPELL_LITERAL: +- fwrite (token->val.str.text, 1, token->val.str.len, fp); ++ rv_neverused = fwrite (token->val.str.text, 1, token->val.str.len, fp); + break; + + case SPELL_NONE: +--- a/src/libcpp/macro.c ++++ b/src/libcpp/macro.c +@@ -1701,7 +1701,7 @@ create_iso_definition (cpp_reader *pfile, cpp_macro *macro) + function-like macros, but not at the end. */ + if (following_paste_op) + { +- cpp_error (pfile, CPP_DL_ERROR, paste_op_error_msg); ++ cpp_error (pfile, CPP_DL_ERROR, "%s", paste_op_error_msg); + return false; + } + break; +@@ -1714,7 +1714,7 @@ create_iso_definition (cpp_reader *pfile, cpp_macro *macro) + function-like macros, but not at the beginning. */ + if (macro->count == 1) + { +- cpp_error (pfile, CPP_DL_ERROR, paste_op_error_msg); ++ cpp_error (pfile, CPP_DL_ERROR, "%s", paste_op_error_msg); + return false; + } + --- gcc-4.7-4.7.2.orig/debian/patches/address-clauses-timed-entry-calls.diff +++ gcc-4.7-4.7.2/debian/patches/address-clauses-timed-entry-calls.diff @@ -0,0 +1,104 @@ +# backport bug fixes about address clauses and timed entry calls +# taken from gcc-4.7 +# +# http://gcc.gnu.org/ml/gcc-patches/2011-08/msg02277.html +# Thanks to Arnaud Charlet + +--- a/src/gcc/ada/exp_ch9.adb ++++ b/src/gcc/ada/exp_ch9.adb +@@ -24,6 +24,7 @@ + ------------------------------------------------------------------------------ + + with Atree; use Atree; ++with Atree.Copy_Separate_List; + with Checks; use Checks; + with Einfo; use Einfo; + with Elists; use Elists; +@@ -10908,6 +10909,11 @@ + -- end if; + -- end if; + -- end; ++ -- ++ -- The triggering statement and the timed statements have not been ++ -- analyzed yet (see Analyzed_Timed_Entry_Call). They may contain local ++ -- declarations, and therefore the copies that are made during expansion ++ -- must be disjoint, as for any other inlining. + + procedure Expand_N_Timed_Entry_Call (N : Node_Id) is + Loc : constant Source_Ptr := Sloc (N); +@@ -11199,7 +11205,7 @@ + -- + -- end if; + +- N_Stats := New_Copy_List_Tree (E_Stats); ++ N_Stats := Copy_Separate_List (E_Stats); + + Prepend_To (N_Stats, + Make_If_Statement (Loc, +@@ -11242,7 +11248,7 @@ + -- ; + -- + +- Lim_Typ_Stmts := New_Copy_List_Tree (E_Stats); ++ Lim_Typ_Stmts := Copy_Separate_List (E_Stats); + Prepend_To (Lim_Typ_Stmts, New_Copy_Tree (E_Call)); + + -- Generate: +--- /dev/null ++++ b/src/gcc/ada/atree-copy_separate_list.adb +@@ -0,0 +1,15 @@ ++with Nlists; ++ ++function Atree.Copy_Separate_List (Source : List_Id) return List_Id is ++ use Atree.Atree_Private_Part.Nodes; ++ use Nlists; ++ Result : constant List_Id := New_List; ++ Nod : Node_Id; ++begin ++ Nod := Nlists.First (Source); ++ while Present (Nod) loop ++ Append (Copy_Separate_Tree (Nod), Result); ++ Next (Nod); ++ end loop; ++ return Result; ++end Atree.Copy_Separate_List; +--- /dev/null ++++ b/src/gcc/ada/atree-copy_separate_list.ads +@@ -0,0 +1 @@ ++function Atree.Copy_Separate_List (Source : List_Id) return List_Id; +--- a/src/gcc/ada/gcc-interface/Make-lang.in ++++ b/src/gcc/ada/gcc-interface/Make-lang.in +@@ -158,6 +158,7 @@ + ada/exp_ch7.o \ + ada/exp_ch8.o \ + ada/exp_ch9.o \ ++ ada/atree-copy_separate_list.o \ + ada/exp_code.o \ + ada/exp_dbug.o \ + ada/exp_disp.o \ +@@ -1371,6 +1372,17 @@ + ada/table.ads ada/table.adb ada/tree_io.ads ada/types.ads ada/uintp.ads \ + ada/unchconv.ads ada/unchdeal.ads ada/urealp.ads + ++ada/atree-copy_separate_list.o : ada/ada.ads ada/a-except.ads ada/a-unccon.ads \ ++ ada/a-uncdea.ads ada/alloc.ads ada/aspects.ads ada/atree.ads \ ++ ada/atree.adb ada/casing.ads ada/debug.ads ada/einfo.ads \ ++ ada/hostparm.ads ada/namet.ads ada/nlists.ads ada/nlists.adb \ ++ ada/opt.ads ada/output.ads ada/sinfo.ads ada/sinfo.adb ada/sinput.ads \ ++ ada/snames.ads ada/system.ads ada/s-exctab.ads ada/s-imenne.ads \ ++ ada/s-memory.ads ada/s-os_lib.ads ada/s-parame.ads ada/s-stalib.ads \ ++ ada/s-string.ads ada/s-traent.ads ada/s-unstyp.ads ada/s-wchcon.ads \ ++ ada/table.ads ada/table.adb ada/tree_io.ads ada/types.ads ada/uintp.ads \ ++ ada/unchconv.ads ada/unchdeal.ads ada/urealp.ads ++ + ada/back_end.o : ada/ada.ads ada/a-except.ads ada/a-unccon.ads \ + ada/a-uncdea.ads ada/alloc.ads ada/aspects.ads ada/atree.ads \ + ada/atree.adb ada/back_end.ads ada/back_end.adb ada/casing.ads \ +@@ -2006,6 +2018,7 @@ + ada/exp_ch9.o : ada/ada.ads ada/a-except.ads ada/a-unccon.ads \ + ada/a-uncdea.ads ada/alloc.ads ada/aspects.ads ada/atree.ads \ + ada/atree.adb ada/casing.ads ada/checks.ads ada/csets.ads ada/debug.ads \ ++ ada/atree-copy_separate_list.ads ada/atree-copy_separate_list.adb \ + ada/einfo.ads ada/einfo.adb ada/elists.ads ada/elists.adb \ + ada/err_vars.ads ada/errout.ads ada/erroutc.ads ada/exp_aggr.ads \ + ada/exp_ch11.ads ada/exp_ch3.ads ada/exp_ch6.ads ada/exp_ch7.ads \ --- gcc-4.7-4.7.2.orig/debian/patches/cell-branch-doc.diff +++ gcc-4.7-4.7.2/debian/patches/cell-branch-doc.diff @@ -0,0 +1,2 @@ +# DP: Updates from the cell-4_5-branch (documentation) up to 2010xxxx + --- gcc-4.7-4.7.2.orig/debian/patches/testsuite-hardening-format.diff +++ gcc-4.7-4.7.2/debian/patches/testsuite-hardening-format.diff @@ -0,0 +1,89 @@ +#! /bin/sh -e + +# All lines beginning with `# DPATCH:' are a description of the patch. +# DP: Description: use -Wno-format on tests that cannot be adjusted other ways. +# DP: Author: Kees Cook +# DP: Ubuntu: https://bugs.launchpad.net/bugs/344502 + +dir= +if [ $# -eq 3 -a "$2" = '-d' ]; then + pdir="-d $3" + dir="$3/" +elif [ $# -ne 1 ]; then + echo >&2 "`basename $0`: script expects -patch|-unpatch as argument" + exit 1 +fi +case "$1" in + -patch) + patch $pdir -f --no-backup-if-mismatch -p1 < $0 + #cd ${dir}gcc && autoconf + ;; + -unpatch) + patch $pdir -f --no-backup-if-mismatch -R -p1 < $0 + #rm ${dir}gcc/configure + ;; + *) + echo >&2 "`basename $0`: script expects -patch|-unpatch as argument" + exit 1 +esac +exit 0 + +--- /dev/null ++++ b/src/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.x +@@ -0,0 +1,5 @@ ++# Implement "/* { dg-options "-U_FORITFY_SOURCE" } */", due to ++# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20567 ++ ++set additional_flags "-U_FORTIFY_SOURCE" ++return 0 +--- /dev/null ++++ b/src/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.x +@@ -0,0 +1,5 @@ ++# Implement "/* { dg-options "-U_FORITFY_SOURCE" } */", due to ++# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20567 ++ ++set additional_flags "-U_FORTIFY_SOURCE" ++return 0 +--- a/src/gcc/testsuite/gcc.dg/charset/builtin2.c ++++ b/src/gcc/testsuite/gcc.dg/charset/builtin2.c +@@ -3,7 +3,7 @@ + + /* { dg-do compile } */ + /* { dg-require-iconv "IBM1047" } */ +-/* { dg-options "-O2 -fexec-charset=IBM1047" } */ ++/* { dg-options "-O2 -fexec-charset=IBM1047 -Wno-format" } */ + /* { dg-final { scan-assembler-not "printf" } } */ + /* { dg-final { scan-assembler-not "fprintf" } } */ + /* { dg-final { scan-assembler-not "sprintf" } } */ +--- a/src/gcc/testsuite/gcc.dg/format/format.exp ++++ b/src/gcc/testsuite/gcc.dg/format/format.exp +@@ -26,7 +26,7 @@ + load_lib torture-options.exp + + torture-init +-set-torture-options [list { } { -DWIDE } ] ++set-torture-options [list { -Wformat=0 } { -DWIDE -Wformat=0 } ] + + dg-init + gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] "" +--- a/src/gcc/testsuite/gcc.dg/pr30473.c ++++ b/src/gcc/testsuite/gcc.dg/pr30473.c +@@ -1,7 +1,7 @@ + /* PR middle-end/30473 */ + /* Make sure this doesn't ICE. */ + /* { dg-do compile } */ +-/* { dg-options "-O2" } */ ++/* { dg-options "-O2 -Wno-format" } */ + + extern int sprintf (char *, const char *, ...); + +--- a/src/gcc/testsuite/gcc.dg/pr38902.c ++++ b/src/gcc/testsuite/gcc.dg/pr38902.c +@@ -1,6 +1,6 @@ + /* PR target/38902 */ + /* { dg-do run } */ +-/* { dg-options "-O2 -fstack-protector" } */ ++/* { dg-options "-O2 -fstack-protector -Wno-format" } */ + /* { dg-require-effective-target fstack_protector } */ + + #ifdef DEBUG --- gcc-4.7-4.7.2.orig/debian/patches/ada-bug564232.diff +++ gcc-4.7-4.7.2/debian/patches/ada-bug564232.diff @@ -0,0 +1,11 @@ +--- a/src/gcc/ada/gsocket.h ++++ b/src/gcc/ada/gsocket.h +@@ -225,7 +225,7 @@ + # define Need_Netdb_Buffer 0 + #endif + +-#if defined (__FreeBSD__) || defined (__vxworks) || defined(__rtems__) ++#if defined (__FreeBSD__) || defined (__FreeBSD_kernel__) || defined (__vxworks) || defined(__rtems__) || defined(__GNU__) + # define Has_Sockaddr_Len 1 + #else + # define Has_Sockaddr_Len 0 --- gcc-4.7-4.7.2.orig/debian/patches/ada-link-lib.diff +++ gcc-4.7-4.7.2/debian/patches/ada-link-lib.diff @@ -0,0 +1,1863 @@ +# DP: - Install the shared Ada libraries as '.so.1', not '.so' to conform +# DP: to the Debian policy. +# DP: - Don't include a runtime link path (-rpath), when linking binaries. +# DP: - Build the shared libraries on hppa-linux. +# DP: - Instead of building libada as a target library only, build it as +# DP: both a host and, if different, target library. +# DP: - Build the GNAT tools in their top-level directory; do not use +# DP: recursive makefiles. +# DP: - Link the GNAT tools dynamically. +# DP: - Fix a bug in src/gnattools/configure.ac whereby a nonexistent version +# DP: of indepsw's body was selected. Regenerate configure. (PR ada/27300) + +# This patch seems large, but the hunks in Makefile.in are actually +# generated from Makefile.def using autogen. + +Index: b/src/gcc/ada/gcc-interface/config-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/config-lang.in ++++ b/src/gcc/ada/gcc-interface/config-lang.in +@@ -37,7 +37,7 @@ + outputs="ada/gcc-interface/Makefile ada/Makefile" + + target_libs="target-libada" +-lang_dirs="gnattools" ++lang_dirs="libada gnattools" + + # Ada is not enabled by default for the time being. + build_by_default=no +Index: b/src/gcc/ada/link.c +=================================================================== +--- a/src/gcc/ada/link.c ++++ b/src/gcc/ada/link.c +@@ -189,9 +189,9 @@ + + #elif defined (__FreeBSD__) + const char *__gnat_object_file_option = ""; +-const char *__gnat_run_path_option = "-Wl,-rpath,"; +-char __gnat_shared_libgnat_default = STATIC; +-char __gnat_shared_libgcc_default = STATIC; ++const char *__gnat_run_path_option = ""; ++char __gnat_shared_libgnat_default = SHARED; ++char __gnat_shared_libgcc_default = SHARED; + int __gnat_link_max = 8192; + unsigned char __gnat_objlist_file_supported = 1; + unsigned char __gnat_using_gnu_linker = 1; +@@ -213,9 +213,9 @@ + + #elif defined (linux) || defined(__GLIBC__) + const char *__gnat_object_file_option = ""; +-const char *__gnat_run_path_option = "-Wl,-rpath,"; +-char __gnat_shared_libgnat_default = STATIC; +-char __gnat_shared_libgcc_default = STATIC; ++const char *__gnat_run_path_option = ""; ++char __gnat_shared_libgnat_default = SHARED; ++char __gnat_shared_libgcc_default = SHARED; + int __gnat_link_max = 8192; + unsigned char __gnat_objlist_file_supported = 1; + unsigned char __gnat_using_gnu_linker = 1; +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -102,7 +102,7 @@ + MAKEINFO = makeinfo + TEXI2DVI = texi2dvi + TEXI2PDF = texi2pdf +-GNATBIND_FLAGS = -static -x ++GNATBIND_FLAGS = -shared -x + ADA_CFLAGS = + ADAFLAGS = -W -Wall -gnatpg -gnata + SOME_ADAFLAGS =-gnata +@@ -241,7 +241,6 @@ + LIBDEPS = $(LIBINTL_DEP) $(LIBIBERTY) + # Default is no TGT_LIB; one might be passed down or something + TGT_LIB = +-TOOLS_LIBS = $(EXTRA_GNATTOOLS_OBJS) targext.o link.o $(LIBGNAT) ../../../libiberty/libiberty.a $(SYSLIBS) $(TGT_LIB) + + # Specify the directories to be searched for header files. + # Both . and srcdir are used, in that order, +@@ -287,30 +286,6 @@ + # defined in this file into the environment. + .NOEXPORT: + +-# Lists of files for various purposes. +- +-GNATLINK_OBJS = gnatlink.o \ +- a-except.o ali.o alloc.o butil.o casing.o csets.o debug.o fmap.o fname.o \ +- gnatvsn.o hostparm.o indepsw.o interfac.o i-c.o i-cstrin.o namet.o opt.o \ +- osint.o output.o rident.o s-exctab.o s-secsta.o s-stalib.o s-stoele.o \ +- sdefault.o snames.o stylesw.o switch.o system.o table.o targparm.o tree_io.o \ +- types.o validsw.o widechar.o +- +-GNATMAKE_OBJS = a-except.o ali.o ali-util.o aspects.o s-casuti.o \ +- alloc.o atree.o binderr.o butil.o casing.o csets.o debug.o elists.o einfo.o\ +- erroutc.o errutil.o err_vars.o fmap.o fname.o fname-uf.o fname-sf.o \ +- gnatmake.o gnatvsn.o hostparm.o interfac.o i-c.o i-cstrin.o krunch.o lib.o \ +- make.o makeusg.o makeutl.o mlib.o mlib-fil.o mlib-prj.o mlib-tgt.o \ +- mlib-tgt-specific.o mlib-utl.o namet.o nlists.o opt.o osint.o osint-m.o \ +- output.o prj.o prj-attr.o prj-attr-pm.o prj-com.o prj-dect.o prj-env.o \ +- prj-conf.o prj-pp.o \ +- prj-err.o prj-ext.o prj-nmsc.o prj-pars.o prj-part.o prj-proc.o prj-strt.o \ +- prj-tree.o prj-util.o rident.o s-exctab.o s-secsta.o s-stalib.o s-stoele.o \ +- scans.o scng.o sdefault.o sfn_scan.o s-purexc.o s-htable.o sinfo.o sinput.o \ +- sinput-c.o sinput-p.o snames.o stand.o stringt.o styleg.o stylesw.o system.o \ +- validsw.o switch.o switch-m.o table.o targparm.o tempdir.o tree_io.o types.o \ +- uintp.o uname.o urealp.o usage.o widechar.o scil_ll.o \ +- $(EXTRA_GNATMAKE_OBJS) + + # Convert the target variable into a space separated list of architecture, + # manufacturer, and operating system and assign each of those to its own +@@ -1281,6 +1256,11 @@ + GMEM_LIB = gmemlib + endif + ++ifeq ($(strip $(filter-out hppa% unknown linux gnu,$(targ))),) ++ GNATLIB_SHARED = gnatlib-shared-dual ++ LIBRARY_VERSION := $(LIB_VERSION) ++endif ++ + ifeq ($(strip $(filter-out hppa% hp hpux10%,$(targ))),) + LIBGNAT_TARGET_PAIRS = \ + a-excpol.adb + + * gcc.c (execute): Don't free first string early, but at the end + of the function. Call retry_ice if compiler exited with + ICE_EXIT_CODE. + (retry_ice): New function. + * diagnostic.c (diagnostic_count_diagnostic, + diagnostic_action_after_output, error_recursion): Exit with + ICE_EXIT_CODE instead of FATAL_EXIT_CODE. + +#--- a/src/gcc/Makefile.in +#+++ b/src/gcc/Makefile.in +#@@ -181,6 +181,8 @@ SYSCALLS.c.X-warn = -Wno-strict-prototypes -Wno-error +# dfp.o-warn = -Wno-error +# # mips-tfile.c contains -Wcast-qual warnings. +# mips-tfile.o-warn = -Wno-error +#+# gcc-ice-hack +#+gcc.o-warn = -Wno-error +# +# # All warnings have to be shut off in stage1 if the compiler used then +# # isn't gcc; configure determines that. WARN_CFLAGS will be either +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -250,6 +250,9 @@ + #if defined(HAVE_TARGET_OBJECT_SUFFIX) || defined(HAVE_TARGET_EXECUTABLE_SUFFIX) + static const char *convert_filename (const char *, int, int); + #endif ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++static void retry_ice (const char *prog, const char **argv); ++#endif + + static const char *getenv_spec_function (int, const char **); + static const char *if_exists_spec_function (int, const char **); +@@ -2638,7 +2643,7 @@ + } + } + +- if (string != commands[i].prog) ++ if (i && string != commands[i].prog) + free (CONST_CAST (char *, string)); + } + +@@ -2691,6 +2696,16 @@ + else if (WIFEXITED (status) + && WEXITSTATUS (status) >= MIN_FATAL_STATUS) + { ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++ /* For ICEs in cc1, cc1obj, cc1plus see if it is ++ reproducible or not. */ ++ const char *p; ++ if (WEXITSTATUS (status) == ICE_EXIT_CODE ++ && i == 0 ++ && (p = strrchr (commands[0].argv[0], DIR_SEPARATOR)) ++ && ! strncmp (p + 1, "cc1", 3)) ++ retry_ice (commands[0].prog, commands[0].argv); ++#endif + if (WEXITSTATUS (status) > greatest_status) + greatest_status = WEXITSTATUS (status); + ret_code = -1; +@@ -2748,6 +2763,9 @@ + } + } + ++ if (commands[0].argv[0] != commands[0].prog) ++ free (CONST_CAST (char *, commands[0].argv[0])); ++ + return ret_code; + } + } +@@ -5874,6 +5892,227 @@ + switches[switchnum].validated = 1; + } + ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++#define RETRY_ICE_ATTEMPTS 2 ++ ++static void ++retry_ice (const char *prog, const char **argv) ++{ ++ int nargs, out_arg = -1, quiet = 0, attempt; ++ int pid, retries, sleep_interval; ++ const char **new_argv; ++ char *temp_filenames[RETRY_ICE_ATTEMPTS * 2 + 2]; ++ ++ if (gcc_input_filename == NULL || ! strcmp (gcc_input_filename, "-")) ++ return; ++ ++ for (nargs = 0; argv[nargs] != NULL; ++nargs) ++ /* Only retry compiler ICEs, not preprocessor ones. */ ++ if (! strcmp (argv[nargs], "-E")) ++ return; ++ else if (argv[nargs][0] == '-' && argv[nargs][1] == 'o') ++ { ++ if (out_arg == -1) ++ out_arg = nargs; ++ else ++ return; ++ } ++ /* If the compiler is going to output any time information, ++ it might varry between invocations. */ ++ else if (! strcmp (argv[nargs], "-quiet")) ++ quiet = 1; ++ else if (! strcmp (argv[nargs], "-ftime-report")) ++ return; ++ ++ if (out_arg == -1 || !quiet) ++ return; ++ ++ memset (temp_filenames, '\0', sizeof (temp_filenames)); ++ new_argv = XALLOCAVEC (const char *, nargs + 3); ++ memcpy (new_argv, argv, (nargs + 1) * sizeof (const char *)); ++ new_argv[nargs++] = "-frandom-seed=0"; ++ new_argv[nargs] = NULL; ++ if (new_argv[out_arg][2] == '\0') ++ new_argv[out_arg + 1] = "-"; ++ else ++ new_argv[out_arg] = "-o-"; ++ ++ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS + 1; ++attempt) ++ { ++ int fd = -1; ++ int status; ++ ++ temp_filenames[attempt * 2] = make_temp_file (".out"); ++ temp_filenames[attempt * 2 + 1] = make_temp_file (".err"); ++ ++ if (attempt == RETRY_ICE_ATTEMPTS) ++ { ++ int i; ++ int fd1, fd2; ++ struct stat st1, st2; ++ size_t n, len; ++ char *buf; ++ ++ buf = XNEWVEC (char, 8192); ++ ++ for (i = 0; i < 2; ++i) ++ { ++ fd1 = open (temp_filenames[i], O_RDONLY); ++ fd2 = open (temp_filenames[2 + i], O_RDONLY); ++ ++ if (fd1 < 0 || fd2 < 0) ++ { ++ i = -1; ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ if (fstat (fd1, &st1) < 0 || fstat (fd2, &st2) < 0) ++ { ++ i = -1; ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ if (st1.st_size != st2.st_size) ++ { ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ len = 0; ++ for (n = st1.st_size; n; n -= len) ++ { ++ len = n; ++ if (len > 4096) ++ len = 4096; ++ ++ if (read (fd1, buf, len) != (int) len ++ || read (fd2, buf + 4096, len) != (int) len) ++ { ++ i = -1; ++ break; ++ } ++ ++ if (memcmp (buf, buf + 4096, len) != 0) ++ break; ++ } ++ ++ close (fd1); ++ close (fd2); ++ ++ if (n) ++ break; ++ } ++ ++ free (buf); ++ if (i == -1) ++ break; ++ ++ if (i != 2) ++ { ++ fnotice (stderr, "The bug is not reproducible, so it is" ++ " likely a hardware or OS problem.\n"); ++ break; ++ } ++ ++ fd = open (temp_filenames[attempt * 2], O_RDWR); ++ if (fd < 0) ++ break; ++ write (fd, "//", 2); ++ for (i = 0; i < nargs; i++) ++ { ++ write (fd, " ", 1); ++ write (fd, new_argv[i], strlen (new_argv[i])); ++ } ++ write (fd, "\n", 1); ++ new_argv[nargs] = "-E"; ++ new_argv[nargs + 1] = NULL; ++ } ++ ++ /* Fork a subprocess; wait and retry if it fails. */ ++ sleep_interval = 1; ++ pid = -1; ++ for (retries = 0; retries < 4; retries++) ++ { ++ pid = fork (); ++ if (pid >= 0) ++ break; ++ sleep (sleep_interval); ++ sleep_interval *= 2; ++ } ++ ++ if (pid < 0) ++ break; ++ else if (pid == 0) ++ { ++ if (attempt != RETRY_ICE_ATTEMPTS) ++ fd = open (temp_filenames[attempt * 2], O_RDWR); ++ if (fd < 0) ++ exit (-1); ++ if (fd != 1) ++ { ++ close (1); ++ dup (fd); ++ close (fd); ++ } ++ ++ fd = open (temp_filenames[attempt * 2 + 1], O_RDWR); ++ if (fd < 0) ++ exit (-1); ++ if (fd != 2) ++ { ++ close (2); ++ dup (fd); ++ close (fd); ++ } ++ ++ if (prog == new_argv[0]) ++ execvp (prog, CONST_CAST2 (char *const *, const char **, new_argv)); ++ else ++ execv (new_argv[0], CONST_CAST2 (char *const *, const char **, new_argv)); ++ exit (-1); ++ } ++ ++ if (waitpid (pid, &status, 0) < 0) ++ break; ++ ++ if (attempt < RETRY_ICE_ATTEMPTS ++ && (! WIFEXITED (status) || WEXITSTATUS (status) != ICE_EXIT_CODE)) ++ { ++ fnotice (stderr, "The bug is not reproducible, so it is" ++ " likely a hardware or OS problem.\n"); ++ break; ++ } ++ else if (attempt == RETRY_ICE_ATTEMPTS) ++ { ++ close (fd); ++ if (WIFEXITED (status) ++ && WEXITSTATUS (status) == SUCCESS_EXIT_CODE) ++ { ++ fnotice (stderr, "Preprocessed source stored into %s file," ++ " please attach this to your bugreport.\n", ++ temp_filenames[attempt * 2]); ++ /* Make sure it is not deleted. */ ++ free (temp_filenames[attempt * 2]); ++ temp_filenames[attempt * 2] = NULL; ++ break; ++ } ++ } ++ } ++ ++ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS * 2 + 2; attempt++) ++ if (temp_filenames[attempt]) ++ { ++ unlink (temp_filenames[attempt]); ++ free (temp_filenames[attempt]); ++ } ++} ++#endif ++ + /* Search for a file named NAME trying various prefixes including the + user's -B prefix and some standard ones. + Return the absolute file name found. If nothing is found, return NAME. */ +--- a/src/gcc/diagnostic.c ++++ b/src/gcc/diagnostic.c +@@ -247,7 +247,7 @@ + real_abort (); + diagnostic_finish (context); + fnotice (stderr, "compilation terminated.\n"); +- exit (FATAL_EXIT_CODE); ++ exit (ICE_EXIT_CODE); + + default: + gcc_unreachable (); --- gcc-4.7-4.7.2.orig/debian/patches/gcc-gfdl-build.diff +++ gcc-4.7-4.7.2/debian/patches/gcc-gfdl-build.diff @@ -0,0 +1,37 @@ +# DP: Build a dummy s-tm-texi without access to the texinfo sources + +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -3672,30 +3672,8 @@ + # \r is not portable to Solaris tr, therefore we have a special + # case for ASCII. We use \r for other encodings like EBCDIC. + s-tm-texi: build/genhooks$(build_exeext) $(srcdir)/doc/tm.texi.in +- $(RUN_GEN) build/genhooks$(build_exeext) -d \ +- $(srcdir)/doc/tm.texi.in > tmp-tm.texi +- case `echo X|tr X '\101'` in \ +- A) tr -d '\015' < tmp-tm.texi > tmp2-tm.texi ;; \ +- *) tr -d '\r' < tmp-tm.texi > tmp2-tm.texi ;; \ +- esac +- mv tmp2-tm.texi tmp-tm.texi +- $(SHELL) $(srcdir)/../move-if-change tmp-tm.texi tm.texi +- @if cmp -s $(srcdir)/doc/tm.texi tm.texi; then \ +- $(STAMP) $@; \ +- elif test $(srcdir)/doc/tm.texi -nt $(srcdir)/doc/tm.texi.in \ +- && ( test $(srcdir)/doc/tm.texi -nt $(srcdir)/target.def \ +- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/c-family/c-target.def \ +- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/common/common-target.def \ +- ); then \ +- echo >&2 ; \ +- echo You should edit $(srcdir)/doc/tm.texi.in rather than $(srcdir)/doc/tm.texi . >&2 ; \ +- false; \ +- else \ +- echo >&2 ; \ +- echo Verify that you have permission to grant a GFDL license for all >&2 ; \ +- echo new text in tm.texi, then copy it to $(srcdir)/doc/tm.texi. >&2 ; \ +- false; \ +- fi ++ cat $(srcdir)/doc/tm.texi.in > tmp-tm.texi ++ $(STAMP) $@ + + GTFILES = $(CPP_ID_DATA_H) $(srcdir)/input.h $(srcdir)/coretypes.h \ + $(srcdir)/vecprim.h $(srcdir)/vecir.h \ --- gcc-4.7-4.7.2.orig/debian/patches/gcc-default-ssp.diff +++ gcc-4.7-4.7.2/debian/patches/gcc-default-ssp.diff @@ -0,0 +1,214 @@ +# DP: Turn on -fstack-protector by default for C, C++, ObjC, ObjC++. +# DP: Build libgcc using -fno-stack-protector. + +--- + gcc/Makefile.in | 2 ++ + gcc/cp/lang-specs.h | 6 +++--- + gcc/doc/invoke.texi | 4 ++++ + gcc/gcc.c | 18 ++++++++++++++---- + gcc/objc/lang-specs.h | 10 +++++----- + gcc/objcp/lang-specs.h | 8 ++++---- + 6 files changed, 32 insertions(+), 16 deletions(-) + +Index: gcc-4.7-4.7.0/src/gcc/gcc.c +=================================================================== +--- gcc-4.7-4.7.0.orig/src/gcc/gcc.c 2012-04-27 14:51:40.231510380 -0700 ++++ gcc-4.7-4.7.0/src/gcc/gcc.c 2012-04-27 14:51:46.859606634 -0700 +@@ -604,6 +604,14 @@ + #define LINK_GCC_C_SEQUENCE_SPEC "%G %L %G" + #endif + ++#ifndef SSP_DEFAULT_SPEC ++#ifdef TARGET_LIBC_PROVIDES_SSP ++#define SSP_DEFAULT_SPEC "%{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:-fstack-protector}}}}" ++#else ++#define SSP_DEFAULT_SPEC "" ++#endif ++#endif ++ + #ifndef LINK_SSP_SPEC + #ifdef TARGET_LIBC_PROVIDES_SSP + #define LINK_SSP_SPEC "%{fstack-protector:}" +@@ -714,6 +722,7 @@ + static const char *cc1plus_spec = CC1PLUS_SPEC; + static const char *link_gcc_c_sequence_spec = LINK_GCC_C_SEQUENCE_SPEC; + static const char *link_ssp_spec = LINK_SSP_SPEC; ++static const char *ssp_default_spec = SSP_DEFAULT_SPEC; + static const char *asm_spec = ASM_SPEC; + static const char *asm_final_spec = ASM_FINAL_SPEC; + static const char *link_spec = LINK_SPEC; +@@ -772,7 +781,7 @@ + static const char *cpp_options = + "%(cpp_unique_options) %1 %{m*} %{std*&ansi&trigraphs} %{W*&pedantic*} %{w}\ + %{f*} %{g*:%{!g0:%{g*} %{!fno-working-directory:-fworking-directory}}} %{O*}\ +- %{undef} %{save-temps*:-fpch-preprocess}"; ++ %{undef} %{save-temps*:-fpch-preprocess} %(ssp_default)"; + + /* This contains cpp options which are not passed when the preprocessor + output will be used by another program. */ +@@ -951,9 +960,9 @@ + %{save-temps*|traditional-cpp|no-integrated-cpp:%(trad_capable_cpp) \ + %(cpp_options) -o %{save-temps*:%b.i} %{!save-temps*:%g.i} \n\ + cc1 -fpreprocessed %{save-temps*:%b.i} %{!save-temps*:%g.i} \ +- %(cc1_options)}\ ++ %(cc1_options) %(ssp_default)}\ + %{!save-temps*:%{!traditional-cpp:%{!no-integrated-cpp:\ +- cc1 %(cpp_unique_options) %(cc1_options)}}}\ ++ cc1 %(cpp_unique_options) %(cc1_options) %(ssp_default)}}}\ + %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 1}, + {"-", + "%{!E:%e-E or -x required when input is from standard input}\ +@@ -976,7 +985,7 @@ + %W{o*:--output-pch=%*}}%V}}}}}}", 0, 0, 0}, + {".i", "@cpp-output", 0, 0, 0}, + {"@cpp-output", +- "%{!M:%{!MM:%{!E:cc1 -fpreprocessed %i %(cc1_options) %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, ++ "%{!M:%{!MM:%{!E:cc1 -fpreprocessed %i %(cc1_options) %(ssp_default) %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, + {".s", "@assembler", 0, 0, 0}, + {"@assembler", + "%{!M:%{!MM:%{!E:%{!S:as %(asm_debug) %(asm_options) %i %A }}}}", 0, 0, 0}, +@@ -1204,6 +1213,7 @@ + INIT_STATIC_SPEC ("cc1plus", &cc1plus_spec), + INIT_STATIC_SPEC ("link_gcc_c_sequence", &link_gcc_c_sequence_spec), + INIT_STATIC_SPEC ("link_ssp", &link_ssp_spec), ++ INIT_STATIC_SPEC ("ssp_default", &ssp_default_spec), + INIT_STATIC_SPEC ("endfile", &endfile_spec), + INIT_STATIC_SPEC ("link", &link_spec), + INIT_STATIC_SPEC ("lib", &lib_spec), +Index: gcc-4.7-4.7.0/src/gcc/cp/lang-specs.h +=================================================================== +--- gcc-4.7-4.7.0.orig/src/gcc/cp/lang-specs.h 2012-04-27 14:51:40.207510031 -0700 ++++ gcc-4.7-4.7.0/src/gcc/cp/lang-specs.h 2012-04-27 14:51:46.859606634 -0700 +@@ -47,7 +47,7 @@ + %(cpp_options) %2 -o %{save-temps*:%b.ii} %{!save-temps*:%g.ii} \n}\ + cc1plus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.ii} %{!save-temps*:%g.ii}}\ + %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\ +- %(cc1_options) %2\ ++ %(cc1_options) %(ssp_default) %2\ + %{!fsyntax-only:%{!fdump-ada-spec*:-o %g.s %{!o*:--output-pch=%i.gch}\ + %W{o*:--output-pch=%*}}%V}}}}", + CPLUSPLUS_CPP_SPEC, 0, 0}, +@@ -58,11 +58,11 @@ + %(cpp_options) %2 -o %{save-temps*:%b.ii} %{!save-temps*:%g.ii} \n}\ + cc1plus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.ii} %{!save-temps*:%g.ii}}\ + %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\ +- %(cc1_options) %2\ ++ %(cc1_options) %(ssp_default) %2\ + %{!fsyntax-only:%(invoke_as)}}}}", + CPLUSPLUS_CPP_SPEC, 0, 0}, + {".ii", "@c++-cpp-output", 0, 0, 0}, + {"@c++-cpp-output", + "%{!M:%{!MM:%{!E:\ +- cc1plus -fpreprocessed %i %(cc1_options) %2\ ++ cc1plus -fpreprocessed %i %(cc1_options) %(ssp_default) %2\ + %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, +Index: gcc-4.7-4.7.0/src/gcc/params.def +=================================================================== +--- gcc-4.7-4.7.0.orig/src/gcc/params.def 2012-04-27 14:51:40.251510670 -0700 ++++ gcc-4.7-4.7.0/src/gcc/params.def 2012-04-27 14:51:46.859606634 -0700 +@@ -671,7 +671,7 @@ + DEFPARAM (PARAM_SSP_BUFFER_SIZE, + "ssp-buffer-size", + "The lower bound for a buffer to be considered for stack smashing protection", +- 8, 1, 0) ++ 4, 1, 0) + + /* When we thread through a block we have to make copies of the + statements within the block. Clearly for large blocks the code +Index: gcc-4.7-4.7.0/src/gcc/objc/lang-specs.h +=================================================================== +--- gcc-4.7-4.7.0.orig/src/gcc/objc/lang-specs.h 2012-04-27 14:51:40.219510205 -0700 ++++ gcc-4.7-4.7.0/src/gcc/objc/lang-specs.h 2012-04-27 14:51:46.859606634 -0700 +@@ -30,9 +30,9 @@ + %{traditional|traditional-cpp:\ + %eGNU Objective C no longer supports traditional compilation}\ + %{save-temps*|no-integrated-cpp:cc1obj -E %(cpp_options) -o %{save-temps*:%b.mi} %{!save-temps*:%g.mi} \n\ +- cc1obj -fpreprocessed %{save-temps*:%b.mi} %{!save-temps*:%g.mi} %(cc1_options) %{print-objc-runtime-info} %{gen-decls}}\ ++ cc1obj -fpreprocessed %{save-temps*:%b.mi} %{!save-temps*:%g.mi} %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}}\ + %{!save-temps*:%{!no-integrated-cpp:\ +- cc1obj %(cpp_unique_options) %(cc1_options) %{print-objc-runtime-info} %{gen-decls}}}\ ++ cc1obj %(cpp_unique_options) %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}}}\ + %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, + {"@objective-c-header", + "%{E|M|MM:cc1obj -E %{traditional|traditional-cpp:-traditional-cpp}\ +@@ -41,18 +41,18 @@ + %{traditional|traditional-cpp:\ + %eGNU Objective C no longer supports traditional compilation}\ + %{save-temps*|no-integrated-cpp:cc1obj -E %(cpp_options) -o %{save-temps*:%b.mi} %{!save-temps*:%g.mi} \n\ +- cc1obj -fpreprocessed %b.mi %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\ ++ cc1obj -fpreprocessed %b.mi %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}\ + -o %g.s %{!o*:--output-pch=%i.gch}\ + %W{o*:--output-pch=%*}%V}\ + %{!save-temps*:%{!no-integrated-cpp:\ +- cc1obj %(cpp_unique_options) %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\ ++ cc1obj %(cpp_unique_options) %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}\ + -o %g.s %{!o*:--output-pch=%i.gch}\ + %W{o*:--output-pch=%*}%V}}}}}", 0, 0, 0}, + {".mi", "@objective-c-cpp-output", 0, 0, 0}, + {"@objective-c-cpp-output", +- "%{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\ ++ "%{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}\ + %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, + {"@objc-cpp-output", + "%nobjc-cpp-output is deprecated; please use objective-c-cpp-output instead\n\ +- %{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\ ++ %{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}\ + %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, +Index: gcc-4.7-4.7.0/src/gcc/objcp/lang-specs.h +=================================================================== +--- gcc-4.7-4.7.0.orig/src/gcc/objcp/lang-specs.h 2012-04-27 14:51:40.271510961 -0700 ++++ gcc-4.7-4.7.0/src/gcc/objcp/lang-specs.h 2012-04-27 14:51:46.859606634 -0700 +@@ -36,7 +36,7 @@ + %(cpp_options) %2 -o %{save-temps*:%b.mii} %{!save-temps*:%g.mii} \n}\ + cc1objplus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.mii} %{!save-temps*:%g.mii}}\ + %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\ +- %(cc1_options) %2\ ++ %(cc1_options) %(ssp_default) %2\ + -o %g.s %{!o*:--output-pch=%i.gch} %W{o*:--output-pch=%*}%V}}}", + CPLUSPLUS_CPP_SPEC, 0, 0}, + {"@objective-c++", +@@ -46,16 +46,16 @@ + %(cpp_options) %2 -o %{save-temps*:%b.mii} %{!save-temps*:%g.mii} \n}\ + cc1objplus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.mii} %{!save-temps*:%g.mii}}\ + %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\ +- %(cc1_options) %2\ ++ %(cc1_options) %(ssp_default) %2\ + %{!fsyntax-only:%(invoke_as)}}}}", + CPLUSPLUS_CPP_SPEC, 0, 0}, + {".mii", "@objective-c++-cpp-output", 0, 0, 0}, + {"@objective-c++-cpp-output", + "%{!M:%{!MM:%{!E:\ +- cc1objplus -fpreprocessed %i %(cc1_options) %2\ ++ cc1objplus -fpreprocessed %i %(cc1_options) %(ssp_default) %2\ + %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, + {"@objc++-cpp-output", + "%nobjc++-cpp-output is deprecated; please use objective-c++-cpp-output instead\n\ + %{!M:%{!MM:%{!E:\ +- cc1objplus -fpreprocessed %i %(cc1_options) %2\ ++ cc1objplus -fpreprocessed %i %(cc1_options) %(ssp_default) %2\ + %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, +Index: gcc-4.7-4.7.0/src/gcc/doc/invoke.texi +=================================================================== +--- gcc-4.7-4.7.0.orig/src/gcc/doc/invoke.texi 2012-04-27 14:51:40.243510554 -0700 ++++ gcc-4.7-4.7.0/src/gcc/doc/invoke.texi 2012-04-27 14:53:02.500704549 -0700 +@@ -8494,6 +8494,10 @@ + when a function is entered and then checked when the function exits. + If a guard check fails, an error message is printed and the program exits. + ++NOTE: In Ubuntu 6.10 and later versions this option is enabled by default ++for C, C++, ObjC, ObjC++, if none of @option{-fno-stack-protector}, ++@option{-nostdlib}, nor @option{-ffreestanding} are found. ++ + @item -fstack-protector-all + @opindex fstack-protector-all + Like @option{-fstack-protector} except that all functions are protected. +@@ -9072,6 +9076,9 @@ + The minimum size of buffers (i.e.@: arrays) that will receive stack smashing + protection when @option{-fstack-protection} is used. + ++This default before Ubuntu 10.10 was "8". Currently it is "4", to increase ++the number of functions protected by the stack protector. ++ + @item max-jump-thread-duplication-stmts + Maximum number of statements allowed in a block that needs to be + duplicated when threading jumps. --- gcc-4.7-4.7.2.orig/debian/patches/libmudflap-x32.diff +++ gcc-4.7-4.7.2/debian/patches/libmudflap-x32.diff @@ -0,0 +1,13 @@ +# DP: Fix libmudflap build failure for x32 multilibs + +--- a/src/libmudflap/mf-runtime.c ++++ b/src/libmudflap/mf-runtime.c +@@ -165,7 +165,7 @@ + #define LOOKUP_CACHE_SHIFT_DFL 2 + + struct __mf_cache __mf_lookup_cache [LOOKUP_CACHE_SIZE_MAX]; +-uintptr_t __mf_lc_mask = LOOKUP_CACHE_MASK_DFL; ++__mf_uintptr_t __mf_lc_mask = LOOKUP_CACHE_MASK_DFL; + unsigned char __mf_lc_shift = LOOKUP_CACHE_SHIFT_DFL; + #define LOOKUP_CACHE_SIZE (__mf_lc_mask + 1) + --- gcc-4.7-4.7.2.orig/debian/patches/pr49940.diff +++ gcc-4.7-4.7.2/debian/patches/pr49940.diff @@ -0,0 +1,26 @@ +# DP: Apply proposed patch for PR ada/49940. + +# This patch consists in copying the declaration (and import) of lwp_self from +# s-osint-freebsd.ads to s-osint-kfreebsd-gnu.ads. + +Index: b/src/gcc/ada/s-osinte-kfreebsd-gnu.ads +=================================================================== +--- a/src/gcc/ada/s-osinte-kfreebsd-gnu.ads ++++ b/src/gcc/ada/s-osinte-kfreebsd-gnu.ads +@@ -238,6 +254,16 @@ + function getpid return pid_t; + pragma Import (C, getpid, "getpid"); + ++ --------- ++ -- LWP -- ++ --------- ++ ++ function lwp_self return System.Address; ++ -- lwp_self does not exist on this thread library, revert to pthread_self ++ -- which is the closest approximation (with getpid). This function is ++ -- needed to share 7staprop.adb across POSIX-like targets. ++ pragma Import (C, lwp_self, "pthread_self"); ++ + ------------- + -- Threads -- + ------------- --- gcc-4.7-4.7.2.orig/debian/patches/boehm-gc-nocheck.diff +++ gcc-4.7-4.7.2/debian/patches/boehm-gc-nocheck.diff @@ -0,0 +1,18 @@ +# DP: Disable running the boehm-gc testsuite. Hangs the buildd at least on hppa. + +--- + boehm-gc/Makefile.in | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/src/boehm-gc/Makefile.in ++++ b/src/boehm-gc/Makefile.in +@@ -684,7 +684,8 @@ check-TESTS: $(TESTS) + test "$$failed" -eq 0; \ + else :; fi + check-am: $(check_PROGRAMS) +- $(MAKE) $(AM_MAKEFLAGS) check-TESTS ++ : # $(MAKE) $(AM_MAKEFLAGS) check-TESTS ++ @echo target $@ disabled for Debian build. + check: check-recursive + all-am: Makefile $(LTLIBRARIES) all-multi + installdirs: installdirs-recursive --- gcc-4.7-4.7.2.orig/debian/patches/hurd-pthread.diff +++ gcc-4.7-4.7.2/debian/patches/hurd-pthread.diff @@ -0,0 +1,181 @@ +# Fix pthread support in a/src/boehm-gc + +--- a/src/boehm-gc/dyn_load.c ++++ b/src/boehm-gc/dyn_load.c +@@ -26,7 +26,7 @@ + * None of this is safe with dlclose and incremental collection. + * But then not much of anything is safe in the presence of dlclose. + */ +-#if (defined(__linux__) || defined(__GLIBC__)) && !defined(_GNU_SOURCE) ++#if (defined(__linux__) || defined(__GLIBC__) || defined(__GNU__)) && !defined(_GNU_SOURCE) + /* Can't test LINUX, since this must be define before other includes */ + # define _GNU_SOURCE + #endif +--- a/src/boehm-gc/pthread_support.c.orig 2009-02-07 22:27:11.828527000 +0000 ++++ b/src/boehm-gc/pthread_support.c 2009-02-07 22:27:18.279505000 +0000 +@@ -885,7 +885,7 @@ + GC_nprocs = pthread_num_processors_np(); + # endif + # if defined(GC_OSF1_THREADS) || defined(GC_AIX_THREADS) \ +- || defined(GC_SOLARIS_PTHREADS) ++ || defined(GC_SOLARIS_PTHREADS) || defined(GC_GNU_THREADS) + GC_nprocs = sysconf(_SC_NPROCESSORS_ONLN); + if (GC_nprocs <= 0) GC_nprocs = 1; + # endif +--- a/src/boehm-gc/include/gc_config_macros.h.orig 2009-02-07 22:25:08.240177000 +0000 ++++ b/src/boehm-gc/include/gc_config_macros.h 2009-02-07 22:28:40.648347000 +0000 +@@ -6,7 +6,8 @@ + || defined(GC_SOLARIS_PTHREADS) \ + || defined(GC_HPUX_THREADS) \ + || defined(GC_AIX_THREADS) \ +- || defined(GC_LINUX_THREADS)) ++ || defined(GC_LINUX_THREADS) \ ++ || defined(GC_GNU_THREADS)) + # define _REENTRANT + /* Better late than never. This fails if system headers that */ + /* depend on this were previously included. */ +@@ -21,7 +22,8 @@ + defined(GC_HPUX_THREADS) || defined(GC_OSF1_THREADS) || \ + defined(GC_DGUX386_THREADS) || defined(GC_DARWIN_THREADS) || \ + defined(GC_AIX_THREADS) || \ +- (defined(GC_WIN32_THREADS) && defined(__CYGWIN32__)) ++ (defined(GC_WIN32_THREADS) && defined(__CYGWIN32__)) || \ ++ defined(GC_GNU_THREADS) + # define GC_PTHREADS + # endif + +--- a/src/boehm-gc/threadlibs.c.orig 2009-02-07 22:34:42.429201000 +0000 ++++ b/src/boehm-gc/threadlibs.c 2009-02-07 22:34:49.530544000 +0000 +@@ -12,7 +12,8 @@ + # endif + # if defined(GC_LINUX_THREADS) || defined(GC_IRIX_THREADS) \ + || defined(GC_SOLARIS_PTHREADS) \ +- || defined(GC_DARWIN_THREADS) || defined(GC_AIX_THREADS) ++ || defined(GC_DARWIN_THREADS) || defined(GC_AIX_THREADS) \ ++ || defined(GC_GNU_THREADS) + printf("-lpthread\n"); + # endif + # if defined(GC_FREEBSD_THREADS) +--- a/src/boehm-gc/configure.ac.orig 2009-02-07 22:30:12.000000000 +0000 ++++ b/src/boehm-gc/configure.ac 2009-02-07 22:35:31.717091000 +0000 +@@ -180,6 +180,11 @@ + AM_CPPFLAGS="$AM_CPPFLAGS -pthread" + THREADLIBS=-pthread + ;; ++ *-*-gnu*) ++ AC_DEFINE(GC_GNU_THREADS,1,[support GNU threads]) ++ AC_DEFINE(_REENTRANT) ++ AC_DEFINE(THREAD_LOCAL_ALLOC) ++ ;; + *-*-solaris2.8*) + AC_DEFINE(GC_SOLARIS_PTHREADS,1,[support for Solaris pthreads]) + # Need to use alternate thread library, otherwise gctest hangs +--- a/src/boehm-gc/configure.orig 2009-02-07 22:32:34.000000000 +0000 ++++ b/src/boehm-gc/configure 2009-02-07 22:35:28.065650000 +0000 +@@ -14893,6 +14893,20 @@ + AM_CPPFLAGS="$AM_CPPFLAGS -pthread" + THREADLIBS=-pthread + ;; ++ *-*-gnu*) ++cat >>confdefs.h <<\_ACEOF ++#define GC_GNU_THREADS 1 ++_ACEOF ++ ++ cat >>confdefs.h <<\_ACEOF ++#define _REENTRANT 1 ++_ACEOF ++ ++cat >>confdefs.h <<\_ACEOF ++#define THREAD_LOCAL_ALLOC 1 ++_ACEOF ++ ++ ;; + *-*-solaris2.8*) + + $as_echo "#define GC_SOLARIS_PTHREADS 1" >>confdefs.h +--- a/src/boehm-gc/os_dep.c.orig 2009-02-07 22:37:20.000000000 +0000 ++++ b/src/boehm-gc/os_dep.c 2009-02-07 22:37:40.000000000 +0000 +@@ -312,7 +312,7 @@ + /* for recent Linux versions. This seems to be the easiest way to */ + /* cover all versions. */ + +-# ifdef LINUX ++# if defined(LINUX) || defined(HURD) + /* Some Linux distributions arrange to define __data_start. Some */ + /* define data_start as a weak symbol. The latter is technically */ + /* broken, since the user program may define data_start, in which */ +@@ -331,7 +331,7 @@ + { + extern ptr_t GC_find_limit(); + +-# ifdef LINUX ++# if defined(LINUX) || defined(HURD) + /* Try the easy approaches first: */ + if ((ptr_t)__data_start != 0) { + GC_data_start = (ptr_t)(__data_start); +--- a/src/boehm-gc/include/private/gcconfig.h.orig 2009-02-07 22:29:18.000000000 +0000 ++++ b/src/boehm-gc/include/private/gcconfig.h 2009-02-07 22:41:24.598684000 +0000 +@@ -1316,8 +1316,9 @@ + # define OS_TYPE "HURD" + # define STACK_GROWS_DOWN + # define HEURISTIC2 +- extern int __data_start[]; +-# define DATASTART ( (ptr_t) (__data_start)) ++# define SIG_SUSPEND SIGUSR1 ++# define SIG_THR_RESTART SIGUSR2 ++# define SEARCH_FOR_DATA_START + extern int _end[]; + # define DATAEND ( (ptr_t) (_end)) + /* # define MPROTECT_VDB Not quite working yet? */ +@@ -2153,7 +2154,8 @@ + # if defined(SVR4) || defined(LINUX) || defined(IRIX5) || defined(HPUX) \ + || defined(OPENBSD) || defined(NETBSD) || defined(FREEBSD) \ + || defined(DGUX) || defined(BSD) || defined(SUNOS4) \ +- || defined(_AIX) || defined(DARWIN) || defined(OSF1) ++ || defined(_AIX) || defined(DARWIN) || defined(OSF1) \ ++ || defined(HURD) + # define UNIX_LIKE /* Basic Unix-like system calls work. */ + # endif + +@@ -2209,7 +2211,7 @@ + # define CACHE_LINE_SIZE 32 /* Wild guess */ + # endif + +-# if defined(LINUX) || defined(__GLIBC__) ++# if defined(LINUX) || defined(HURD) || defined(__GLIBC__) + # define REGISTER_LIBRARIES_EARLY + /* We sometimes use dl_iterate_phdr, which may acquire an internal */ + /* lock. This isn't safe after the world has stopped. So we must */ +@@ -2244,6 +2246,9 @@ + # if defined(GC_AIX_THREADS) && !defined(_AIX) + --> inconsistent configuration + # endif ++# if defined(GC_GNU_THREADS) && !defined(HURD) ++ --> inconsistent configuration ++# endif + # if defined(GC_WIN32_THREADS) && !defined(MSWIN32) && !defined(CYGWIN32) + --> inconsistent configuration + # endif +--- a/src/boehm-gc/include/gc_config.h.in.orig 2009-02-08 01:51:09.707191000 +0000 ++++ b/src/boehm-gc/include/gc_config.h.in 2009-02-08 01:54:06.298757000 +0000 +@@ -33,6 +33,9 @@ + /* include support for gcj */ + #undef GC_GCJ_SUPPORT + ++/* support GNU/Hurd threads */ ++#undef GC_GNU_THREADS ++ + /* enables support for HP/UX 11 pthreads */ + #undef GC_HPUX_THREADS + +--- a/src/boehm-gc/specific.c.orig 2009-02-08 03:44:40.833287000 +0000 ++++ b/src/boehm-gc/specific.c 2009-02-08 03:44:50.865199000 +0000 +@@ -13,7 +13,7 @@ + + #include "private/gc_priv.h" /* For GC_compare_and_exchange, GC_memory_barrier */ + +-#if defined(GC_LINUX_THREADS) ++#if defined(GC_LINUX_THREADS) || defined(GC_GNU_THREADS) + + #include "private/specific.h" + --- gcc-4.7-4.7.2.orig/debian/patches/ada-acats.diff +++ gcc-4.7-4.7.2/debian/patches/ada-acats.diff @@ -0,0 +1,199 @@ +# DP: - When running the ACATS, look for the gnat tools in their new +# DP: directory (build/gnattools), and for the shared libraries in +# DP: build/gcc/ada/rts-shared-zcx, build/libgnatvsn and build/libgnatprj. + +Index: b/src/gcc/testsuite/ada/acats/run_acats +=================================================================== +--- a/src/gcc/testsuite/ada/acats/run_acats ++++ b/src/gcc/testsuite/ada/acats/run_acats +@@ -20,52 +20,29 @@ + return 1 + } + ++echo '#!/bin/sh' > host_gnatchop ++echo exec /usr/bin/gnatchop '$*' >> host_gnatchop ++ ++chmod +x host_gnatchop ++ ++echo '#!/bin/sh' > host_gnatmake ++echo echo '$PATH' '$*' >> host_gnatmake ++echo exec /usr/bin/gnatmake '$*' >> host_gnatmake ++ ++chmod +x host_gnatmake ++ + # Set up environment to use the Ada compiler from the object tree + +-host_gnatchop=`which gnatchop` +-host_gnatmake=`which gnatmake` + ROOT=`${PWDCMD-pwd}` + BASE=`cd $ROOT/../../..; ${PWDCMD-pwd}` +- + PATH=$BASE:$ROOT:$PATH +-ADA_INCLUDE_PATH=$BASE/ada/rts +-LD_LIBRARY_PATH=$ADA_INCLUDE_PATH:$BASE:$LD_LIBRARY_PATH +-ADA_OBJECTS_PATH=$ADA_INCLUDE_PATH +- +-if [ ! -d $ADA_INCLUDE_PATH ]; then +- echo gnatlib missing, exiting. +- exit 1 +-fi +- +-if [ ! -f $BASE/gnatchop ]; then +- echo gnattools missing, exiting. +- exit 1 +-fi +- +-if [ ! -f $BASE/gnatmake ]; then +- echo gnattools missing, exiting. +- exit 1 +-fi +- ++GNATTOOLS=`cd $BASE/../gnattools; ${PWDCMD-pwd}` ++LIBGNATVSN=`cd $BASE/../libgnatvsn; ${PWDCMD-pwd}` ++LIBGNATPRJ=`cd $BASE/../libgnatprj; ${PWDCMD-pwd}` + GCC_DRIVER="$BASE/xgcc" + GCC="$BASE/xgcc -B$BASE/" + export PATH ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_DRIVER GCC LD_LIBRARY_PATH +- +-echo '#!/bin/sh' > host_gnatchop +-echo PATH=`dirname $host_gnatchop`:'$PATH' >> host_gnatchop +-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatchop +-echo export PATH >> host_gnatchop +-echo exec gnatchop '"$@"' >> host_gnatchop +- +-chmod +x host_gnatchop +- +-echo '#!/bin/sh' > host_gnatmake +-echo PATH=`dirname $host_gnatmake`:'$PATH' >> host_gnatmake +-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatmake +-echo export PATH >> host_gnatmake +-echo exec gnatmake '"$@"' >> host_gnatmake +- +-chmod +x host_gnatmake ++export GNATTOOLS LIBGNATVSN LIBGNATPRJ + + # Limit the stack to 16MB for stack checking + ulimit -s 16384 +Index: b/src/gcc/testsuite/ada/acats/run_all.sh +=================================================================== +--- a/src/gcc/testsuite/ada/acats/run_all.sh ++++ b/src/gcc/testsuite/ada/acats/run_all.sh +@@ -12,6 +12,10 @@ + gccflags="-O2" + gnatflags="-gnatws" + ++RTS=`cd $GNATTOOLS/../gcc/ada/rts-shared-zcx; ${PWDCMD-pwd}` ++LD_LIBRARY_PATH=$RTS:$LIBGNATVSN:$LIBGNATPRJ ++export LD_LIBRARY_PATH ++ + target_run () { + eval $EXPECT -f $testdir/run_test.exp $* + } +@@ -48,15 +52,25 @@ + fi + + target_gnatchop () { +- gnatchop --GCC="$GCC_DRIVER" $* ++ display ADA_INCLUDE_PATH=$GNATTOOLS/../../src/gcc/ada $GNATTOOLS/gnatchop --GCC="$GCC_DRIVER" $* ++ ADA_INCLUDE_PATH=$GNATTOOLS/../../src/gcc/ada $GNATTOOLS/gnatchop --GCC="$GCC_DRIVER" $* + } + + target_gnatmake () { +- echo gnatmake --GCC=\"$GCC\" $gnatflags $gccflags $* -largs $EXTERNAL_OBJECTS --GCC=\"$GCC\" +- gnatmake --GCC="$GCC" $gnatflags $gccflags $* -largs $EXTERNAL_OBJECTS --GCC="$GCC" ++ RTS="$GNATTOOLS/../gcc/ada/rts-shared-zcx" ++ EXTERNAL_OBJECTS="$EXTERNAL_OBJECTS $RTS/adaint.o $RTS/sysdep.o $RTS/init.o $RTS/raise-gcc.o" ++ display $GNATTOOLS/gnatmake -I- -I$RTS -I. \ ++ --GCC=\"$GCC\" --GNATBIND="$GNATTOOLS/gnatbind" \ ++ --GNATLINK="$GNATTOOLS/gnatlink" $gnatflags $gccflags $* \ ++ -bargs -static -largs $EXTERNAL_OBJECTS --GCC=\"$GCC -I- -I$RTS -I.\" ++ $GNATTOOLS/gnatmake -I- -I$RTS -I. \ ++ --GCC="$GCC" --GNATBIND="$GNATTOOLS/gnatbind" \ ++ --GNATLINK="$GNATTOOLS/gnatlink" $gnatflags $gccflags $* \ ++ -bargs -static -largs $EXTERNAL_OBJECTS --GCC="$GCC -I- -I$RTS -I." + } + + target_gcc () { ++ display $GCC $gccflags $* + $GCC $gccflags $* + } + +@@ -86,8 +100,8 @@ + display `$GCC -v 2>&1` + display host=`gcc -dumpmachine` + display target=$target +-display `type gnatmake` +-gnatls -v >> $dir/acats.log ++display `type $GNATTOOLS/gnatmake` ++$GNATTOOLS/gnatls -I- -I$RTS -v >> $dir/acats.log + display "" + + display " === acats support ===" +Index: b/src/gcc/testsuite/lib/gnat.exp +=================================================================== +--- a/src/gcc/testsuite/lib/gnat.exp ++++ b/src/gcc/testsuite/lib/gnat.exp +@@ -89,18 +89,24 @@ + global GNAT_UNDER_TEST + global TOOL_EXECUTABLE + global gnat_target_current ++ global ld_library_path + + set gnat_target_current "" + + if { $gnat_initialized == 1 } { return } + +- if ![info exists GNAT_UNDER_TEST] then { +- if [info exists TOOL_EXECUTABLE] { +- set GNAT_UNDER_TEST "$TOOL_EXECUTABLE" +- } else { +- set GNAT_UNDER_TEST "[local_find_gnatmake]" +- } +- } ++ set GNAT_UNDER_TEST "$rootme/../gnattools/gnatmake -I$rootme/ada/rts-shared-zcx --GCC=$rootme/xgcc --GNATBIND=$rootme/../gnattools/gnatbind --GNATLINK=$rootme/../gnattools/gnatlink -cargs -B$rootme -largs --GCC=$rootme/xgcc -B$rootme -margs" ++ append ld_library_path ":$rootme/ada/rts-shared-zcx" ++ append ld_library_path ":$rootme/../libgnatvsn" ++ append ld_library_path ":$rootme/../libgnatprj" ++ set_ld_library_path_env_vars ++ ++ # gnatlink looks for system.ads itself and has no --RTS option, so ++ # specify via environment ++ verbose -log "ADA_INCLUDE_PATH=$rootme/ada/rts-shared-zcx" ++ verbose -log "ADA_OBJECTS_PATH=$rootme/ada/rts-shared-zcx" ++ setenv ADA_INCLUDE_PATH "$rootme/ada/rts-shared-zcx" ++ setenv ADA_OBJECTS_PATH "$rootme/ada/rts-shared-zcx" + + if ![info exists tmpdir] then { + set tmpdir /tmp +@@ -121,31 +127,6 @@ + return [gcc_target_compile $source $dest $type $options] + } + +- # If we detect a change of target, we need to recompute both +- # GNAT_UNDER_TEST and the appropriate RTS. +- if { $gnat_target_current!="[current_target_name]" } { +- set gnat_target_current "[current_target_name]" +- if [info exists TOOL_OPTIONS] { +- set rtsdir "[get_multilibs ${TOOL_OPTIONS}]/libada" +- } else { +- set rtsdir "[get_multilibs]/libada" +- } +- if [info exists TOOL_EXECUTABLE] { +- set GNAT_UNDER_TEST "$TOOL_EXECUTABLE" +- } else { +- set GNAT_UNDER_TEST "[local_find_gnatmake]" +- } +- set GNAT_UNDER_TEST "$GNAT_UNDER_TEST --RTS=$rtsdir" +- +- # gnatlink looks for system.ads itself and has no --RTS option, so +- # specify via environment +- setenv ADA_INCLUDE_PATH "$rtsdir/adainclude" +- setenv ADA_OBJECTS_PATH "$rtsdir/adainclude" +- # Always log so compilations can be repeated manually. +- verbose -log "ADA_INCLUDE_PATH=$rtsdir/adainclude" +- verbose -log "ADA_OBJECTS_PATH=$rtsdir/adainclude" +- } +- + lappend options "compiler=$GNAT_UNDER_TEST -q -f" + lappend options "timeout=[timeout_value]" + --- gcc-4.7-4.7.2.orig/debian/patches/hjl-x32-gcc-4_7-branch.diff +++ gcc-4.7-4.7.2/debian/patches/hjl-x32-gcc-4_7-branch.diff @@ -0,0 +1,3926 @@ +diff --git a/src/ChangeLog.x32 b/src/ChangeLog.x32 +new file mode 100644 +index 0000000..b633cf6 +--- /dev/null ++++ b/src/ChangeLog.x32 +@@ -0,0 +1,4 @@ ++2012-05-15 H.J. Lu ++ ++ Merge upstream change ++ * libtool.m4 (_LT_ENABLE_LOCK): Support x32. +diff --git a/src/boehm-gc/ChangeLog.x32 b/src/boehm-gc/ChangeLog.x32 +new file mode 100644 +index 0000000..0990077 +--- /dev/null ++++ b/src/boehm-gc/ChangeLog.x32 +@@ -0,0 +1,9 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. ++ ++2012-05-11 H.J. Lu ++ ++ Merge upstream changes ++ * include/private/gcconfig.h: (ALIGNMENT): Set to 4 for x32. ++ (CPP_WORDSZ): Set to 32 for x32. +diff --git a/src/boehm-gc/configure b/src/boehm-gc/configure +index c76ea44..aa61053 100755 +--- a/src/boehm-gc/configure ++++ b/src/boehm-gc/configure +@@ -6786,7 +6786,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11304,7 +11311,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11307 "configure" ++#line 11314 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11410,7 +11417,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11413 "configure" ++#line 11420 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/boehm-gc/include/private/gcconfig.h b/src/boehm-gc/include/private/gcconfig.h +index fb09cf7..0263c13 100644 +--- a/src/boehm-gc/include/private/gcconfig.h ++++ b/src/boehm-gc/include/private/gcconfig.h +@@ -1974,8 +1974,13 @@ + + # ifdef X86_64 + # define MACH_TYPE "X86_64" +-# define ALIGNMENT 8 +-# define CPP_WORDSZ 64 ++# ifdef __ILP32__ ++# define ALIGNMENT 4 ++# define CPP_WORDSZ 32 ++# else ++# define ALIGNMENT 8 ++# define CPP_WORDSZ 64 ++# endif + # ifndef HBLKSIZE + # define HBLKSIZE 4096 + # endif +diff --git a/src/gcc/ChangeLog.pr53383 b/src/gcc/ChangeLog.pr53383 +new file mode 100644 +index 0000000..bcb48cc +--- /dev/null ++++ b/src/gcc/ChangeLog.pr53383 +@@ -0,0 +1,10 @@ ++2012-05-25 H.J. Lu ++ ++ PR target/53383 ++ * doc/invoke.texi: Add a warning for -mpreferred-stack-boundary=3. ++ ++ * config/i386/i386.c (ix86_option_override_internal): Allow ++ -mpreferred-stack-boundary=3 for 64-bit if SSE is disenabled. ++ ++ * config/i386/i386.h (MIN_STACK_BOUNDARY): Set to 64 for 64-bit ++ if SSE is disenabled. +diff --git a/src/gcc/ChangeLog.x32 b/src/gcc/ChangeLog.x32 +new file mode 100644 +index 0000000..6b8c31a +--- /dev/null ++++ b/src/gcc/ChangeLog.x32 +@@ -0,0 +1,343 @@ ++2012-08-24 H.J. Lu ++ ++ PR debug/52857 ++ * dwarf2out.c (mem_loc_descriptor): Allow arg_pointer_rtx and ++ frame_pointer_rtx for based_loc_descr. ++ ++2012-06-29 H.J. Lu ++ ++ PR target/53539 ++ * config/i386/gnu-user64.h (WCHAR_TYPE): Use "int" only for ++ TARGET_LP64. ++ ++2012-06-05 H.J. Lu ++ ++ PR target/53575 ++ * config.gcc: Select x32 run-time library if --with-abi={x32|mx32} ++ is used for x86_64-*-*. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. ++ ++2012-04-25 H.J. Lu ++ ++ PR debug/52857 ++ * dwarf2out.c (dbx_reg_number): Assert return value != ++ INVALID_REGNUM. ++ ++2012-04-11 H.J. Lu ++ ++ * config/host-linux.c (TRY_EMPTY_VM_SPACE): Defined to ++ 0x60000000 if __x86_64 is defined and __LP64__ isn't defined. ++ ++2012-04-11 H.J. Lu ++ ++ PR rtl-optimization/52876 ++ * emit-rtl.c (set_reg_attrs_from_value): Handle arbitrary value. ++ Don't call mark_reg_pointer for incompatible pointer sign ++ extension. ++ ++ * reginfo.c (reg_scan_mark_refs): Call set_reg_attrs_from_value ++ directly. ++ ++2012-04-11 H.J. Lu ++ ++ * config/i386/i386.c (ix86_option_override_internal): Check ++ SUBTARGET_OVERRIDE_OPTIONS and SUBSUBTARGET_OVERRIDE_OPTIONS ++ after TARGET_64BIT is updated. ++ ++2012-04-09 Uros Bizjak ++ ++ PR target/52883 ++ * config/i386/predicates.md (x86_64_zext_general_operand): Prevent ++ VOIDmode immediate operands. ++ * config/i386/constraints.md (Wz): New constraint. ++ * config/i386/i386.md (*zero_extendsidi2_rex64): Use Wz instead of Z. ++ ++2012-04-05 Uros Bizjak ++ ++ PR target/52882 ++ * config/i386/i386.c (ix86_decompose_address): Allow VOIDmode ++ CONST_INT operands, zero-extended with AND. ++ ++2012-04-02 H.J. Lu ++ ++ * config.gcc: Use i386/biarchx32.h instead of i386/biarch64.h ++ for --with-abi={x32|mx32} or --with-multilib-list=mx32. ++ (supported_defaults): Add abi for i[34567]86-*-* and x86_64-*-*. ++ ++ * config/i386/biarchx32.h: New. ++ ++2012-03-31 H.J. Lu ++ ++ PR bootstrap/52784 ++ * config/i386/i386.c (ix86_option_override_internal): Don't ++ check TARGET_64BIT if TARGET_64BIT_DEFAULT is false. ++ ++2012-03-28 H.J. Lu ++ ++ * config/i386/biarch64.h (TARGET_64BIT_DEFAULT): Add ++ OPTION_MASK_ABI_64. ++ ++ * config/i386/gnu-user64.h (SPEC_64): Support TARGET_BI_ARCH == 2. ++ (SPEC_X32): Likewise. ++ (MULTILIB_DEFAULTS): Likewise. ++ ++ * config/i386/i386.c (isa_opts): Remove -m64. ++ (ix86_target_string): Properly handle -m32/-m64/-mx32. ++ (ix86_option_override_internal): Properly ++ set OPTION_MASK_ISA_64BIT and OPTION_MASK_ISA_X32 as well as ++ handle -m32, -m64 and -mx32. ++ ++ * config/i386/i386.h (TARGET_X32): Replace OPTION_ISA_X32 ++ with OPTION_ABI_X32. Moved after TARGET_LP64. ++ (TARGET_LP64): Changed to OPTION_ABI_64. ++ ++ * config/i386/i386.opt (m64): Replace ISA_64BIT with ABI_64. ++ (mx32): Replace ISA_X32 with ABI_X32. ++ ++2012-03-27 H.J. Lu ++ ++ * config/arm/arm.opt (mapcs): Remove MaskExists. ++ * config/cris/linux.opt (mno-gotplt): Likewise. ++ * config/i386/i386.opt (mhard-float): Likewise. ++ (msse4): Likewise. ++ (mno-sse4): Likewise. ++ * config/m68k/m68k.opt (mhard-float): Likewise. ++ * config/mep/mep.op (mcop32): Likewise. ++ * config/pa/pa-hpux.opt (msio): Likewise. ++ * config/pa/pa64-hpux.opt (mgnu-ld): Likewise. ++ * config/picochip/picochip.opt (mlittle): Likewise. ++ * config/sh/sh.opt (mrenesas): Likewise. ++ * config/sparc/long-double-switch.opt (mlong-double-128): Likewise. ++ * config/sparc/sparc.opt (mhard-float): Likewise. ++ * config/v850/v850.opt (mv850es): Likewise. ++ * config/vax/vax.opt (mg-float): Likewise. ++ ++2012-03-27 H.J. Lu ++ ++ * opth-gen.awk: Allocated a bit for Mask and InverseMask if it ++ hasn't been allocated. Define a target macro for Mask and ++ InverseMask if it hasn't been defined. Remove MaskExists ++ handling. ++ ++ * doc/options.texi: Remove MaskExists. ++ ++2012-03-14 H.J. Lu ++ ++ PR target/50797 ++ * config/i386/i386-opts.h (pmode): New. ++ ++ * config/i386/i386.c (ix86_option_override_internal): Properly ++ check and set ix86_pmode. ++ ++ * config/i386/i386.h (Pmode): Check ix86_pmode instead of ++ TARGET_64BIT. ++ ++ * config/i386/i386.opt (maddress-mode=): New. ++ ++ * doc/invoke.texi: Document -maddress-mode=short|long for x86. ++ ++2012-03-20 Jakub Jelinek ++ ++ * config/i386/i386.c (ix86_decompose_address) : ++ If operand isn't UNSPEC, return 0. ++ ++2012-03-19 Uros Bizjak ++ ++ * config/i386/i386.c (get_thread_pointer): Add tp_mode argument. ++ Generate ZERO_EXTEND in place if GET_MODE (tp) != tp_mode. ++ (legitimize_tls_address) : Always generate ++ DImode UNSPEC_GOTNTPOFF references on TARGET_64BIT. ++ (ix86_decompose_address): Allow zero extended UNSPEC_TP references. ++ ++2012-03-13 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_decompose_address): Handle subregs of ++ AND zero extended address correctly. ++ ++2012-03-13 Uros Bizjak ++ ++ * config/i386/predicates.md (tls_symbolic_operand): Declare as ++ special predicate. ++ (tls_modbase_operand): Ditto. ++ * config/i386/i386.md: Remove mode from tls_symbolic_operand and ++ tls_modbase_operand predicates. ++ ++2012-03-13 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_decompose_address): Prevent %fs:(%reg) ++ addresses only when %reg is not in word mode. ++ ++2012-03-12 H.J. Lu ++ ++ * config/i386/i386.md (*tls_global_dynamic_64_): Remove :P ++ on tls_symbolic_operand. ++ (tls_global_dynamic_64_): Likewise. ++ ++2012-03-12 H.J. Lu ++ ++ * config/i386/i386.c (ix86_gen_tls_global_dynamic_64): New. ++ (ix86_gen_tls_local_dynamic_base_64): Likewise. ++ (ix86_option_override_internal): Set ix86_gen_tls_global_dynamic_64 ++ and ix86_gen_tls_local_dynamic_base_64. ++ (legitimize_tls_address): Use ix86_gen_tls_global_dynamic_64 and ++ ix86_gen_tls_local_dynamic_base_64. ++ ++ * config/i386/i386.md (*tls_global_dynamic_64): Renamed to ... ++ (*tls_global_dynamic_64_): This. ++ (tls_global_dynamic_64): Renamed to ... ++ (tls_global_dynamic_64_): This. ++ (*tls_local_dynamic_base_64): Renamed to ... ++ (*tls_local_dynamic_base_64_): This. ++ (tls_local_dynamic_base_64): Renamed to ... ++ (tls_local_dynamic_base_64_): This. ++ ++2012-03-12 H.J. Lu ++ ++ * config/i386/i386.c (ix86_option_override_internal): Properly ++ set ix86_gen_leave and ix86_gen_monitor. Check Pmode == DImode, ++ instead of TARGET_64BIT, to set ix86_gen_add3, ix86_gen_sub3, ++ ix86_gen_one_cmpl2, ix86_gen_andsp, ++ ix86_gen_allocate_stack_worker, ix86_gen_adjust_stack_and_probe ++ and ix86_gen_probe_stack_range. ++ ++ * config/i386/sse.md (sse3_monitor64): Renamed to ... ++ (sse3_monitor64_): This. ++ ++2012-03-11 H.J. Lu ++ ++ * config/i386/i386.c (ix86_expand_movmem): Use word_mode for size ++ needed for loop. ++ (ix86_expand_setmem): Likewise. ++ ++2012-03-11 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_zero_extend_to_Pmode): Rewrite using ++ convert_to_mode. ++ ++2012-03-11 H.J. Lu ++ ++ * config/i386/i386.c (ix86_trampoline_init): Use movl for 64bit if ++ ptr_mode == SImode. Replace DImode with Pmode or ptr_mode. ++ ++2012-03-11 H.J. Lu ++ ++ * config/i386/i386.c (x86_this_parameter): Replace DImode with ++ Pmode. ++ ++2012-03-11 H.J. Lu ++ ++ * config/i386/i386.md (lwp_slwpcb): Check Pmode instead of ++ TARGET_64BIT. ++ ++2012-03-11 H.J. Lu ++ Uros Bizjak ++ ++ * config/i386/predicates.md (call_insn_operand): Allow ++ constant_call_address_operand in Pmode only. ++ (sibcall_insn_operand): Ditto. ++ * config/i386/i386.md (*call): Use W mode iterator instead of P mode. ++ (*call_vzeroupper): Ditto. ++ (*sibcall): Ditto. ++ (*sibcall_vzeroupper): Ditto. ++ (*call_value): Ditto. ++ (*call_value_vzeroupper): Ditto. ++ (*sibcall_value): Ditto. ++ (*sibcall_value_vzeroupper): Ditto. ++ (*indirect_jump): Ditto. ++ (*tablejump_1): Ditto. ++ (indirect_jump): Convert memory address to word mode for TARGET_X32. ++ (tablejump): Ditto. ++ * config/i386/i386.c (ix86_expand_call): Convert indirect operands ++ to word mode. ++ ++2012-03-08 H.J. Lu ++ ++ * config/i386/i386.c (setup_incoming_varargs_64): Use word_mode ++ with integer parameters in registers. ++ (gen_push): Push register in word_mode instead of Pmode. ++ (ix86_emit_save_regs): Likewise. ++ (ix86_emit_save_regs_using_mov): Save integer registers in ++ word_mode. ++ (gen_pop): Pop register in word_mode instead of Pmode. ++ (ix86_emit_restore_regs_using_pop): Likewise. ++ (ix86_expand_prologue): Replace Pmode with word_mode for push ++ immediate. Use ix86_gen_pro_epilogue_adjust_stack. Save and ++ restore RAX and R10 in word_mode. ++ (ix86_emit_restore_regs_using_mov): Restore integer registers ++ in word_mode. ++ (ix86_expand_split_stack_prologue): Save R10_REG and restore in ++ word_mode. ++ (ix86_split_to_parts): Use word_mode with PUT_MODE for push. ++ (ix86_split_long_move): Likewise. ++ ++ * config/i386/i386.md (W): New. ++ (*push2_prologue): Replace :P with :W. ++ (*pop1): Likewise. ++ (*pop1_epilogue): Likewise. ++ (push/pop peephole2): Use word_mode scratch registers. ++ ++2012-03-09 Uros Bizjak ++ ++ PR target/52530 ++ * config/i386/i386.c (ix86_print_operand): Handle 'E' operand modifier. ++ (ix86_print_operand_address): Handle UNSPEC_LEA_ADDR. Do not fallback ++ to set code to 'q'. ++ * config/i386/i386.md (UNSPEC_LEA_ADDR): New unspec. ++ (*movdi_internal_rex64): Use %E operand modifier for lea. ++ (*movsi_internal): Ditto. ++ (*lea_1): Ditto. ++ (*lea_2): Ditto. ++ (*lea_{3,4,5,6}_zext): Ditto. ++ (*tls_global_dynamic_32_gnu): Ditto. ++ (*tls_global_dynamic_64): Ditto. ++ (*tls_dynamic_gnu2_lea_32): Ditto. ++ (*tls_dynamic_gnu2_lea_64): Ditto. ++ (pro_epilogue_adjust_stack__add): Ditto. ++ ++2012-03-08 Uros Bizjak ++ ++ * config/i386/predicates.md (indirect_branch_operand): Simplify. ++ ++2012-03-07 Uros Bizjak ++ ++ * config/i386/predicates.md (x86_64_zext_general_operand): New. ++ * config/i386/i386.md (*zero_extendsidi2_rex64): Change operand 1 ++ predicate to x86_64_zext_general_operand. Accept "Z" constraint. ++ ++2012-03-07 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_print_operand_punct_valid_p): Add '^'. ++ (ix86_print_operand): Handle '^'. ++ * config/i386/i386.md (*strmovdi_rex_1): Macroize memory operands ++ using P mode iterator. Add %^ to asm template to conditionally emit ++ addr32 prefix. ++ (*rep_movdi_rex64): Ditto. ++ (*strsetdi_rex_1): Ditto. ++ (*rep_stosdi_rex64): Ditto. ++ (*strmov{si,hi,qi}_1): Add %^ to asm template to ++ conditionally emit addr32 prefix. ++ (*rep_mov{si,qi}): Ditto. ++ (*strset{si,hi,qi}): Ditto. ++ (*rep_stos{si,qi}): Ditto. ++ (*cmpstrnqi_nz_1): Ditto. ++ (*cmpstrnqi_1): Ditto. ++ (*strlenqi_1): Ditto. ++ ++2012-03-07 H.J. Lu ++ ++ * config/i386/i386.c (function_value_64): Return pointers in ++ word_mode instead of Pmode. ++ (ix86_promote_function_mode): Likewise. ++ ++2012-03-04 H.J. Lu ++ ++ * config/i386/i386.c (pro_epilogue_adjust_stack): Check Pmode ++ instead of TARGET_64BIT. ++ ++2012-03-04 H.J. Lu ++ ++ * config/i386/i386.c (ix86_expand_prologue): Check Pmode to set ++ adjust_stack_insn. +diff --git a/src/gcc/ada/ChangeLog.x32 b/src/gcc/ada/ChangeLog.x32 +new file mode 100644 +index 0000000..5d5bca2 +--- /dev/null ++++ b/src/gcc/ada/ChangeLog.x32 +@@ -0,0 +1,10 @@ ++2012-03-03 H.J. Lu ++ ++ * init.c (__gnat_adjust_context_for_raise): Also check ++ "orq $0x0,(%esp)" for x32. ++ ++ * link.c (__gnat_default_libgcc_subdir): set to libx32 for x32. ++ ++ * gcc-interface/Makefile.in (arch): Set to x32 if MULTISUBDIR ++ is /x32. ++ Support x32. +diff --git a/src/gcc/ada/gcc-interface/Makefile.in b/src/gcc/ada/gcc-interface/Makefile.in +index 9b5135e..70c28e5 100644 +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -350,6 +350,10 @@ GNATMAKE_OBJS = a-except.o ali.o ali-util.o aspects.o s-casuti.o alloc.o \ + ifeq ($(strip $(filter-out %x86_64, $(arch))),) + ifeq ($(strip $(MULTISUBDIR)),/32) + arch:=i686 ++ else ++ ifeq ($(strip $(MULTISUBDIR)),/x32) ++ arch:=x32 ++ endif + endif + endif + +@@ -2131,6 +2135,43 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(arch) $(osys))),) + LIBRARY_VERSION := $(LIB_VERSION) + endif + ++ifeq ($(strip $(filter-out %x32 linux%,$(arch) $(osys))),) ++ LIBGNAT_TARGET_PAIRS = \ ++ a-exetim.adbgregs[REG_ESP] += 4096 + 4 * sizeof (unsigned long); + #elif defined (__x86_64__) +- unsigned long *pc = (unsigned long *)mcontext->gregs[REG_RIP]; +- /* The pattern is "orq $0x0,(%rsp)" for a probe in 64-bit mode. */ +- if (signo == SIGSEGV && pc && (*pc & 0xffffffffff) == 0x00240c8348) ++ unsigned long long *pc = (unsigned long long *)mcontext->gregs[REG_RIP]; ++ if (signo == SIGSEGV && pc ++ /* The pattern is "orq $0x0,(%rsp)" for a probe in 64-bit mode. */ ++ && ((*pc & 0xffffffffffLL) == 0x00240c8348LL ++ /* The pattern may also be "orl $0x0,(%esp)" for a probe in ++ x32 mode. */ ++ || (*pc & 0xffffffffLL) == 0x00240c83LL)) + mcontext->gregs[REG_RSP] += 4096 + 4 * sizeof (unsigned long); + #elif defined (__ia64__) + /* ??? The IA-64 unwinder doesn't compensate for signals. */ +diff --git a/src/gcc/ada/link.c b/src/gcc/ada/link.c +index 51ea759..5a5dabe 100644 +--- a/src/gcc/ada/link.c ++++ b/src/gcc/ada/link.c +@@ -165,7 +165,11 @@ unsigned char __gnat_objlist_file_supported = 1; + const char *__gnat_object_library_extension = ".a"; + unsigned char __gnat_separate_run_path_options = 0; + #if defined (__x86_64) ++# if defined (__LP64__) + const char *__gnat_default_libgcc_subdir = "lib64"; ++# else ++const char *__gnat_default_libgcc_subdir = "libx32"; ++# endif + #else + const char *__gnat_default_libgcc_subdir = "lib"; + #endif +diff --git a/src/gcc/config.gcc b/src/gcc/config.gcc +index 288043e..bf7ce5f 100644 +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -494,6 +494,10 @@ fi + + case ${target} in + i[34567]86-*-*) ++ if test "x$with_abi" != x; then ++ echo "This target does not support --with-abi." ++ exit 1 ++ fi + if test "x$enable_cld" = xyes; then + tm_defines="${tm_defines} USE_IX86_CLD=1" + fi +@@ -503,7 +507,24 @@ i[34567]86-*-*) + tm_file="vxworks-dummy.h ${tm_file}" + ;; + x86_64-*-*) +- tm_file="i386/biarch64.h ${tm_file}" ++ case ${with_abi} in ++ "") ++ if test "x$with_multilib_list" = xmx32; then ++ tm_file="i386/biarchx32.h ${tm_file}" ++ else ++ tm_file="i386/biarch64.h ${tm_file}" ++ fi ++ ;; ++ 64 | m64) ++ tm_file="i386/biarch64.h ${tm_file}" ++ ;; ++ x32 | mx32) ++ tm_file="i386/biarchx32.h ${tm_file}" ++ ;; ++ *) ++ echo "Unknown ABI used in --with-abi=$with_abi" ++ exit 1 ++ esac + if test "x$enable_cld" = xyes; then + tm_defines="${tm_defines} USE_IX86_CLD=1" + fi +@@ -1323,7 +1344,14 @@ x86_64-*-linux* | x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu) + tmake_file="${tmake_file} i386/t-linux64" + x86_multilibs="${with_multilib_list}" + if test "$x86_multilibs" = "default"; then +- x86_multilibs="m64,m32" ++ case ${with_abi} in ++ x32 | mx32) ++ x86_multilibs="mx32" ++ ;; ++ *) ++ x86_multilibs="m64,m32" ++ ;; ++ esac + fi + x86_multilibs=`echo $x86_multilibs | sed -e 's/,/ /g'` + for x86_multilib in ${x86_multilibs}; do +@@ -3240,7 +3268,7 @@ case "${target}" in + ;; + + i[34567]86-*-* | x86_64-*-*) +- supported_defaults="arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64" ++ supported_defaults="abi arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64" + for which in arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64; do + eval "val=\$with_$which" + case ${val} in +diff --git a/src/gcc/config/arm/arm.opt b/src/gcc/config/arm/arm.opt +index 934aa35..e03a163 100644 +--- a/src/gcc/config/arm/arm.opt ++++ b/src/gcc/config/arm/arm.opt +@@ -59,7 +59,7 @@ Target Report Mask(ABORT_NORETURN) + Generate a call to abort if a noreturn function returns + + mapcs +-Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented ++Target RejectNegative Mask(APCS_FRAME) Undocumented + + mapcs-float + Target Report Mask(APCS_FLOAT) +diff --git a/src/gcc/config/cris/linux.opt b/src/gcc/config/cris/linux.opt +index a57c48d..e93bb53 100644 +--- a/src/gcc/config/cris/linux.opt ++++ b/src/gcc/config/cris/linux.opt +@@ -23,7 +23,7 @@ mlinux + Target Report RejectNegative Undocumented + + mno-gotplt +-Target Report RejectNegative Mask(AVOID_GOTPLT) MaskExists ++Target Report RejectNegative Mask(AVOID_GOTPLT) + Together with -fpic and -fPIC, do not use GOTPLT references + + ; There's a small added setup cost with using GOTPLT references +diff --git a/src/gcc/config/host-linux.c b/src/gcc/config/host-linux.c +index 94b7a0b..b535758 100644 +--- a/src/gcc/config/host-linux.c ++++ b/src/gcc/config/host-linux.c +@@ -68,8 +68,10 @@ + # define TRY_EMPTY_VM_SPACE 0x10000000000 + #elif defined(__ia64) + # define TRY_EMPTY_VM_SPACE 0x2000000100000000 +-#elif defined(__x86_64) ++#elif defined(__x86_64) && defined(__LP64__) + # define TRY_EMPTY_VM_SPACE 0x1000000000 ++#elif defined(__x86_64) ++# define TRY_EMPTY_VM_SPACE 0x60000000 + #elif defined(__i386) + # define TRY_EMPTY_VM_SPACE 0x60000000 + #elif defined(__powerpc__) +diff --git a/src/gcc/config/i386/biarch64.h b/src/gcc/config/i386/biarch64.h +index 629ec98..0c3811e 100644 +--- a/src/gcc/config/i386/biarch64.h ++++ b/src/gcc/config/i386/biarch64.h +@@ -25,5 +25,5 @@ a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +-#define TARGET_64BIT_DEFAULT OPTION_MASK_ISA_64BIT ++#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64) + #define TARGET_BI_ARCH 1 +diff --git a/src/gcc/config/i386/biarchx32.h b/src/gcc/config/i386/biarchx32.h +new file mode 100644 +index 0000000..69d6722 +--- /dev/null ++++ b/src/gcc/config/i386/biarchx32.h +@@ -0,0 +1,28 @@ ++/* Make configure files to produce biarch compiler defaulting to x32 mode. ++ This file must be included very first, while the OS specific file later ++ to overwrite otherwise wrong defaults. ++ Copyright (C) 2012 Free Software Foundation, Inc. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 3, or (at your option) ++any later version. ++ ++GCC is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU General Public License for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++. */ ++ ++#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_X32) ++#define TARGET_BI_ARCH 2 +diff --git a/src/gcc/config/i386/constraints.md b/src/gcc/config/i386/constraints.md +index 5a19307..f4a19b1 100644 +--- a/src/gcc/config/i386/constraints.md ++++ b/src/gcc/config/i386/constraints.md +@@ -18,7 +18,7 @@ + ;; . + + ;;; Unused letters: +-;;; B H T W ++;;; B H T + ;;; h jk v + + ;; Integer register constraints. +@@ -188,6 +188,16 @@ + instructions)." + (match_operand 0 "x86_64_immediate_operand")) + ++;; We use W prefix to denote any number of ++;; constant-or-symbol-reference constraints ++ ++(define_constraint "Wz" ++ "32-bit unsigned integer constant, or a symbolic reference known ++ to fit that range (for zero-extending conversion operations that ++ require non-VOIDmode immediate operands)." ++ (and (match_operand 0 "x86_64_zext_immediate_operand") ++ (match_test "GET_MODE (op) != VOIDmode"))) ++ + (define_constraint "Z" + "32-bit unsigned integer constant, or a symbolic reference known + to fit that range (for immediate operands in zero-extending x86-64 +diff --git a/src/gcc/config/i386/gnu-user64.h b/src/gcc/config/i386/gnu-user64.h +index 954f3b2..c9e12d3 100644 +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -58,8 +58,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + + #if TARGET_64BIT_DEFAULT + #define SPEC_32 "m32" ++#if TARGET_BI_ARCH == 2 ++#define SPEC_64 "m64" ++#define SPEC_X32 "m32|m64:;" ++#else + #define SPEC_64 "m32|mx32:;" + #define SPEC_X32 "mx32" ++#endif + #else + #define SPEC_32 "m64|mx32:;" + #define SPEC_64 "m64" +@@ -95,7 +100,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + %{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s" + + #if TARGET_64BIT_DEFAULT ++#if TARGET_BI_ARCH == 2 ++#define MULTILIB_DEFAULTS { "mx32" } ++#else + #define MULTILIB_DEFAULTS { "m64" } ++#endif + #else + #define MULTILIB_DEFAULTS { "m32" } + #endif +@@ -126,3 +135,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + #define TARGET_THREAD_SPLIT_STACK_OFFSET \ + (TARGET_64BIT ? (TARGET_X32 ? 0x40 : 0x70) : 0x30) + #endif ++ ++#undef WCHAR_TYPE ++#define WCHAR_TYPE (TARGET_LP64 ? "int" : "long int") +diff --git a/src/gcc/config/i386/i386-opts.h b/src/gcc/config/i386/i386-opts.h +index 3cc2253..eea85fd 100644 +--- a/src/gcc/config/i386/i386-opts.h ++++ b/src/gcc/config/i386/i386-opts.h +@@ -71,6 +71,11 @@ enum cmodel { + CM_LARGE_PIC /* No assumptions. */ + }; + ++enum pmode { ++ PMODE_SI, /* Pmode == SImode. */ ++ PMODE_DI /* Pmode == DImode. */ ++}; ++ + enum asm_dialect { + ASM_ATT, + ASM_INTEL +diff --git a/src/gcc/config/i386/i386.c b/src/gcc/config/i386/i386.c +index 3cee9f4..1538f538 100644 +--- a/src/gcc/config/i386/i386.c ++++ b/src/gcc/config/i386/i386.c +@@ -2448,6 +2448,8 @@ static rtx (*ix86_gen_andsp) (rtx, rtx, rtx); + static rtx (*ix86_gen_allocate_stack_worker) (rtx, rtx); + static rtx (*ix86_gen_adjust_stack_and_probe) (rtx, rtx, rtx); + static rtx (*ix86_gen_probe_stack_range) (rtx, rtx, rtx); ++static rtx (*ix86_gen_tls_global_dynamic_64) (rtx, rtx, rtx); ++static rtx (*ix86_gen_tls_local_dynamic_base_64) (rtx, rtx); + + /* Preferred alignment for stack boundary in bits. */ + unsigned int ix86_preferred_stack_boundary; +@@ -2658,7 +2660,6 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, + preceding options while match those first. */ + static struct ix86_target_opts isa_opts[] = + { +- { "-m64", OPTION_MASK_ISA_64BIT }, + { "-mfma4", OPTION_MASK_ISA_FMA4 }, + { "-mfma", OPTION_MASK_ISA_FMA }, + { "-mxop", OPTION_MASK_ISA_XOP }, +@@ -2730,6 +2731,7 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, + size_t len; + size_t line_len; + size_t sep_len; ++ const char *abi; + + memset (opts, '\0', sizeof (opts)); + +@@ -2747,6 +2749,21 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, + opts[num++][1] = tune; + } + ++ /* Add -m32/-m64/-mx32. */ ++ if ((isa & OPTION_MASK_ISA_64BIT) != 0) ++ { ++ if ((isa & OPTION_MASK_ABI_64) != 0) ++ abi = "-m64"; ++ else ++ abi = "-mx32"; ++ isa &= ~ (OPTION_MASK_ISA_64BIT ++ | OPTION_MASK_ABI_64 ++ | OPTION_MASK_ABI_X32); ++ } ++ else ++ abi = "-m32"; ++ opts[num++][0] = abi; ++ + /* Pick out the options in isa options. */ + for (i = 0; i < ARRAY_SIZE (isa_opts); i++) + { +@@ -3095,6 +3112,46 @@ ix86_option_override_internal (bool main_args_p) + sw = "attribute"; + } + ++ /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if ++ TARGET_64BIT_DEFAULT is true and TARGET_64BIT is false. */ ++ if (TARGET_64BIT_DEFAULT && !TARGET_64BIT) ++ ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32); ++#ifdef TARGET_BI_ARCH ++ else ++ { ++#if TARGET_BI_ARCH == 1 ++ /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64 ++ is on and OPTION_MASK_ABI_X32 is off. We turn off ++ OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by ++ -mx32. */ ++ if (TARGET_X32) ++ ix86_isa_flags &= ~OPTION_MASK_ABI_64; ++#else ++ /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is ++ on and OPTION_MASK_ABI_64 is off. We turn off ++ OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by ++ -m64. */ ++ if (TARGET_LP64) ++ ix86_isa_flags &= ~OPTION_MASK_ABI_X32; ++#endif ++ } ++#endif ++ ++ if (TARGET_X32) ++ { ++ /* Always turn on OPTION_MASK_ISA_64BIT and turn off ++ OPTION_MASK_ABI_64 for TARGET_X32. */ ++ ix86_isa_flags |= OPTION_MASK_ISA_64BIT; ++ ix86_isa_flags &= ~OPTION_MASK_ABI_64; ++ } ++ else if (TARGET_LP64) ++ { ++ /* Always turn on OPTION_MASK_ISA_64BIT and turn off ++ OPTION_MASK_ABI_X32 for TARGET_LP64. */ ++ ix86_isa_flags |= OPTION_MASK_ISA_64BIT; ++ ix86_isa_flags &= ~OPTION_MASK_ABI_X32; ++ } ++ + #ifdef SUBTARGET_OVERRIDE_OPTIONS + SUBTARGET_OVERRIDE_OPTIONS; + #endif +@@ -3103,9 +3160,6 @@ ix86_option_override_internal (bool main_args_p) + SUBSUBTARGET_OVERRIDE_OPTIONS; + #endif + +- if (TARGET_X32) +- ix86_isa_flags |= OPTION_MASK_ISA_64BIT; +- + /* -fPIC is the default for x86_64. */ + if (TARGET_MACHO && TARGET_64BIT) + flag_pic = 2; +@@ -3174,6 +3228,17 @@ ix86_option_override_internal (bool main_args_p) + else + ix86_arch_specified = 1; + ++ if (global_options_set.x_ix86_pmode) ++ { ++ if ((TARGET_LP64 && ix86_pmode == PMODE_SI) ++ || (!TARGET_64BIT && ix86_pmode == PMODE_DI)) ++ error ("address mode %qs not supported in the %s bit mode", ++ TARGET_64BIT ? "short" : "long", ++ TARGET_64BIT ? "64" : "32"); ++ } ++ else ++ ix86_pmode = TARGET_LP64 ? PMODE_DI : PMODE_SI; ++ + if (!global_options_set.x_ix86_abi) + ix86_abi = DEFAULT_ABI; + +@@ -3587,7 +3652,7 @@ ix86_option_override_internal (bool main_args_p) + ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT; + if (global_options_set.x_ix86_preferred_stack_boundary_arg) + { +- int min = (TARGET_64BIT ? 4 : 2); ++ int min = (TARGET_64BIT ? (TARGET_SSE ? 4 : 3) : 2); + int max = (TARGET_SEH ? 4 : 12); + + if (ix86_preferred_stack_boundary_arg < min +@@ -3750,11 +3815,33 @@ ix86_option_override_internal (bool main_args_p) + if (TARGET_64BIT) + { + ix86_gen_leave = gen_leave_rex64; ++ if (Pmode == DImode) ++ { ++ ix86_gen_monitor = gen_sse3_monitor64_di; ++ ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_di; ++ ix86_gen_tls_local_dynamic_base_64 ++ = gen_tls_local_dynamic_base_64_di; ++ } ++ else ++ { ++ ix86_gen_monitor = gen_sse3_monitor64_si; ++ ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_si; ++ ix86_gen_tls_local_dynamic_base_64 ++ = gen_tls_local_dynamic_base_64_si; ++ } ++ } ++ else ++ { ++ ix86_gen_leave = gen_leave; ++ ix86_gen_monitor = gen_sse3_monitor; ++ } ++ ++ if (Pmode == DImode) ++ { + ix86_gen_add3 = gen_adddi3; + ix86_gen_sub3 = gen_subdi3; + ix86_gen_sub3_carry = gen_subdi3_carry; + ix86_gen_one_cmpl2 = gen_one_cmpldi2; +- ix86_gen_monitor = gen_sse3_monitor64; + ix86_gen_andsp = gen_anddi3; + ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_di; + ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi; +@@ -3762,12 +3849,10 @@ ix86_option_override_internal (bool main_args_p) + } + else + { +- ix86_gen_leave = gen_leave; + ix86_gen_add3 = gen_addsi3; + ix86_gen_sub3 = gen_subsi3; + ix86_gen_sub3_carry = gen_subsi3_carry; + ix86_gen_one_cmpl2 = gen_one_cmplsi2; +- ix86_gen_monitor = gen_sse3_monitor; + ix86_gen_andsp = gen_andsi3; + ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si; + ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi; +@@ -7227,8 +7312,8 @@ function_value_64 (enum machine_mode orig_mode, enum machine_mode mode, + } + else if (POINTER_TYPE_P (valtype)) + { +- /* Pointers are always returned in Pmode. */ +- mode = Pmode; ++ /* Pointers are always returned in word_mode. */ ++ mode = word_mode; + } + + ret = construct_container (mode, orig_mode, valtype, 1, +@@ -7299,7 +7384,8 @@ ix86_function_value (const_tree valtype, const_tree fntype_or_decl, + return ix86_function_value_1 (valtype, fntype_or_decl, orig_mode, mode); + } + +-/* Pointer function arguments and return values are promoted to Pmode. */ ++/* Pointer function arguments and return values are promoted to ++ word_mode. */ + + static enum machine_mode + ix86_promote_function_mode (const_tree type, enum machine_mode mode, +@@ -7309,7 +7395,7 @@ ix86_promote_function_mode (const_tree type, enum machine_mode mode, + if (type != NULL_TREE && POINTER_TYPE_P (type)) + { + *punsignedp = POINTERS_EXTEND_UNSIGNED; +- return Pmode; ++ return word_mode; + } + return default_promote_function_mode (type, mode, punsignedp, fntype, + for_return); +@@ -7587,12 +7673,13 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum) + + for (i = cum->regno; i < max; i++) + { +- mem = gen_rtx_MEM (Pmode, ++ mem = gen_rtx_MEM (word_mode, + plus_constant (save_area, i * UNITS_PER_WORD)); + MEM_NOTRAP_P (mem) = 1; + set_mem_alias_set (mem, set); +- emit_move_insn (mem, gen_rtx_REG (Pmode, +- x86_64_int_parameter_registers[i])); ++ emit_move_insn (mem, ++ gen_rtx_REG (word_mode, ++ x86_64_int_parameter_registers[i])); + } + + if (ix86_varargs_fpr_size) +@@ -8652,8 +8739,11 @@ gen_push (rtx arg) + m->fs.cfa_offset += UNITS_PER_WORD; + m->fs.sp_offset += UNITS_PER_WORD; + ++ if (REG_P (arg) && GET_MODE (arg) != word_mode) ++ arg = gen_rtx_REG (word_mode, REGNO (arg)); ++ + return gen_rtx_SET (VOIDmode, +- gen_rtx_MEM (Pmode, ++ gen_rtx_MEM (word_mode, + gen_rtx_PRE_DEC (Pmode, + stack_pointer_rtx)), + arg); +@@ -8664,9 +8754,12 @@ gen_push (rtx arg) + static rtx + gen_pop (rtx arg) + { ++ if (REG_P (arg) && GET_MODE (arg) != word_mode) ++ arg = gen_rtx_REG (word_mode, REGNO (arg)); ++ + return gen_rtx_SET (VOIDmode, + arg, +- gen_rtx_MEM (Pmode, ++ gen_rtx_MEM (word_mode, + gen_rtx_POST_INC (Pmode, + stack_pointer_rtx))); + } +@@ -9141,7 +9234,7 @@ ix86_emit_save_regs (void) + for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; ) + if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) + { +- insn = emit_insn (gen_push (gen_rtx_REG (Pmode, regno))); ++ insn = emit_insn (gen_push (gen_rtx_REG (word_mode, regno))); + RTX_FRAME_RELATED_P (insn) = 1; + } + } +@@ -9221,7 +9314,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset) + for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) + if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) + { +- ix86_emit_save_reg_using_mov (Pmode, regno, cfa_offset); ++ ix86_emit_save_reg_using_mov (word_mode, regno, cfa_offset); + cfa_offset -= UNITS_PER_WORD; + } + } +@@ -9296,7 +9389,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset, + rtx insn; + bool add_frame_related_expr = false; + +- if (! TARGET_64BIT) ++ if (Pmode == SImode) + insn = gen_pro_epilogue_adjust_stack_si_add (dest, src, offset); + else if (x86_64_immediate_operand (offset, DImode)) + insn = gen_pro_epilogue_adjust_stack_di_add (dest, src, offset); +@@ -10159,7 +10252,7 @@ ix86_expand_prologue (void) + to implement macro RETURN_ADDR_RTX and intrinsic function + expand_builtin_return_addr etc. */ + t = plus_constant (crtl->drap_reg, -UNITS_PER_WORD); +- t = gen_frame_mem (Pmode, t); ++ t = gen_frame_mem (word_mode, t); + insn = emit_insn (gen_push (t)); + RTX_FRAME_RELATED_P (insn) = 1; + +@@ -10364,7 +10457,7 @@ ix86_expand_prologue (void) + emit_insn (ix86_gen_allocate_stack_worker (eax, eax)); + + /* Use the fact that AX still contains ALLOCATE. */ +- adjust_stack_insn = (TARGET_64BIT ++ adjust_stack_insn = (Pmode == DImode + ? gen_pro_epilogue_adjust_stack_di_sub + : gen_pro_epilogue_adjust_stack_si_sub); + +@@ -10389,14 +10482,18 @@ ix86_expand_prologue (void) + if (r10_live && eax_live) + { + t = choose_baseaddr (m->fs.sp_offset - allocate); +- emit_move_insn (r10, gen_frame_mem (Pmode, t)); ++ emit_move_insn (gen_rtx_REG (word_mode, R10_REG), ++ gen_frame_mem (word_mode, t)); + t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD); +- emit_move_insn (eax, gen_frame_mem (Pmode, t)); ++ emit_move_insn (gen_rtx_REG (word_mode, AX_REG), ++ gen_frame_mem (word_mode, t)); + } + else if (eax_live || r10_live) + { + t = choose_baseaddr (m->fs.sp_offset - allocate); +- emit_move_insn ((eax_live ? eax : r10), gen_frame_mem (Pmode, t)); ++ emit_move_insn (gen_rtx_REG (word_mode, ++ (eax_live ? AX_REG : R10_REG)), ++ gen_frame_mem (word_mode, t)); + } + } + gcc_assert (m->fs.sp_offset == frame.stack_pointer_offset); +@@ -10566,7 +10663,7 @@ ix86_emit_restore_regs_using_pop (void) + + for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) + if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, false)) +- ix86_emit_restore_reg_using_pop (gen_rtx_REG (Pmode, regno)); ++ ix86_emit_restore_reg_using_pop (gen_rtx_REG (word_mode, regno)); + } + + /* Emit code and notes for the LEAVE instruction. */ +@@ -10609,11 +10706,11 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset, + for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) + if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return)) + { +- rtx reg = gen_rtx_REG (Pmode, regno); ++ rtx reg = gen_rtx_REG (word_mode, regno); + rtx insn, mem; + + mem = choose_baseaddr (cfa_offset); +- mem = gen_frame_mem (Pmode, mem); ++ mem = gen_frame_mem (word_mode, mem); + insn = emit_move_insn (reg, mem); + + if (m->fs.cfa_reg == crtl->drap_reg && regno == REGNO (crtl->drap_reg)) +@@ -11223,8 +11320,8 @@ ix86_expand_split_stack_prologue (void) + { + rtx rax; + +- rax = gen_rtx_REG (Pmode, AX_REG); +- emit_move_insn (rax, reg10); ++ rax = gen_rtx_REG (word_mode, AX_REG); ++ emit_move_insn (rax, gen_rtx_REG (word_mode, R10_REG)); + use_reg (&call_fusage, rax); + } + +@@ -11303,8 +11400,8 @@ ix86_expand_split_stack_prologue (void) + /* If we are in 64-bit mode and this function uses a static chain, + we saved %r10 in %rax before calling _morestack. */ + if (TARGET_64BIT && DECL_STATIC_CHAIN (cfun->decl)) +- emit_move_insn (gen_rtx_REG (Pmode, R10_REG), +- gen_rtx_REG (Pmode, AX_REG)); ++ emit_move_insn (gen_rtx_REG (word_mode, R10_REG), ++ gen_rtx_REG (word_mode, AX_REG)); + + /* If this function calls va_start, we need to store a pointer to + the arguments on the old stack, because they may not have been +@@ -11522,6 +11619,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) + scale = 1 << scale; + break; + ++ case ZERO_EXTEND: ++ op = XEXP (op, 0); ++ if (GET_CODE (op) != UNSPEC) ++ return 0; ++ /* FALLTHRU */ ++ + case UNSPEC: + if (XINT (op, 1) == UNSPEC_TP + && TARGET_TLS_DIRECT_SEG_REFS +@@ -11604,6 +11707,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) + return 0; + } + ++/* Address override works only on the (%reg) part of %fs:(%reg). */ ++ if (seg != SEG_DEFAULT ++ && ((base && GET_MODE (base) != word_mode) ++ || (index && GET_MODE (index) != word_mode))) ++ return 0; ++ + /* Extract the integral value of scale. */ + if (scale_rtx) + { +@@ -12549,15 +12658,20 @@ legitimize_pic_address (rtx orig, rtx reg) + /* Load the thread pointer. If TO_REG is true, force it into a register. */ + + static rtx +-get_thread_pointer (bool to_reg) ++get_thread_pointer (enum machine_mode tp_mode, bool to_reg) + { + rtx tp = gen_rtx_UNSPEC (ptr_mode, gen_rtvec (1, const0_rtx), UNSPEC_TP); + +- if (GET_MODE (tp) != Pmode) +- tp = convert_to_mode (Pmode, tp, 1); ++ if (GET_MODE (tp) != tp_mode) ++ { ++ gcc_assert (GET_MODE (tp) == SImode); ++ gcc_assert (tp_mode == DImode); ++ ++ tp = gen_rtx_ZERO_EXTEND (tp_mode, tp); ++ } + + if (to_reg) +- tp = copy_addr_to_reg (tp); ++ tp = copy_to_mode_reg (tp_mode, tp); + + return tp; + } +@@ -12609,6 +12723,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + { + rtx dest, base, off; + rtx pic = NULL_RTX, tp = NULL_RTX; ++ enum machine_mode tp_mode = Pmode; + int type; + + switch (model) +@@ -12634,7 +12749,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + else + emit_insn (gen_tls_dynamic_gnu2_32 (dest, x, pic)); + +- tp = get_thread_pointer (true); ++ tp = get_thread_pointer (Pmode, true); + dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, tp, dest)); + + set_unique_reg_note (get_last_insn (), REG_EQUAL, x); +@@ -12648,7 +12763,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + rtx rax = gen_rtx_REG (Pmode, AX_REG), insns; + + start_sequence (); +- emit_call_insn (gen_tls_global_dynamic_64 (rax, x, caddr)); ++ emit_call_insn (ix86_gen_tls_global_dynamic_64 (rax, x, ++ caddr)); + insns = get_insns (); + end_sequence (); + +@@ -12683,7 +12799,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + else + emit_insn (gen_tls_dynamic_gnu2_32 (base, tmp, pic)); + +- tp = get_thread_pointer (true); ++ tp = get_thread_pointer (Pmode, true); + set_unique_reg_note (get_last_insn (), REG_EQUAL, + gen_rtx_MINUS (Pmode, tmp, tp)); + } +@@ -12696,7 +12812,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + rtx rax = gen_rtx_REG (Pmode, AX_REG), insns, eqv; + + start_sequence (); +- emit_call_insn (gen_tls_local_dynamic_base_64 (rax, caddr)); ++ emit_call_insn (ix86_gen_tls_local_dynamic_base_64 (rax, ++ caddr)); + insns = get_insns (); + end_sequence (); + +@@ -12739,6 +12856,9 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + return dest; + } + ++ /* Generate DImode references to avoid %fs:(%reg32) ++ problems and linker IE->LE relaxation bug. */ ++ tp_mode = DImode; + pic = NULL; + type = UNSPEC_GOTNTPOFF; + } +@@ -12761,22 +12881,23 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + type = UNSPEC_INDNTPOFF; + } + +- off = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, x), type); +- off = gen_rtx_CONST (Pmode, off); ++ off = gen_rtx_UNSPEC (tp_mode, gen_rtvec (1, x), type); ++ off = gen_rtx_CONST (tp_mode, off); + if (pic) +- off = gen_rtx_PLUS (Pmode, pic, off); +- off = gen_const_mem (Pmode, off); ++ off = gen_rtx_PLUS (tp_mode, pic, off); ++ off = gen_const_mem (tp_mode, off); + set_mem_alias_set (off, ix86_GOT_alias_set ()); + + if (TARGET_64BIT || TARGET_ANY_GNU_TLS) + { +- base = get_thread_pointer (for_mov || !TARGET_TLS_DIRECT_SEG_REFS); +- off = force_reg (Pmode, off); +- return gen_rtx_PLUS (Pmode, base, off); ++ base = get_thread_pointer (tp_mode, ++ for_mov || !TARGET_TLS_DIRECT_SEG_REFS); ++ off = force_reg (tp_mode, off); ++ return gen_rtx_PLUS (tp_mode, base, off); + } + else + { +- base = get_thread_pointer (true); ++ base = get_thread_pointer (Pmode, true); + dest = gen_reg_rtx (Pmode); + emit_insn (gen_subsi3 (dest, base, off)); + } +@@ -12790,12 +12911,13 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + + if (TARGET_64BIT || TARGET_ANY_GNU_TLS) + { +- base = get_thread_pointer (for_mov || !TARGET_TLS_DIRECT_SEG_REFS); ++ base = get_thread_pointer (Pmode, ++ for_mov || !TARGET_TLS_DIRECT_SEG_REFS); + return gen_rtx_PLUS (Pmode, base, off); + } + else + { +- base = get_thread_pointer (true); ++ base = get_thread_pointer (Pmode, true); + dest = gen_reg_rtx (Pmode); + emit_insn (gen_subsi3 (dest, base, off)); + } +@@ -13875,6 +13997,7 @@ get_some_local_dynamic_name (void) + ; -- print a semicolon (after prefixes due to bug in older gas). + ~ -- print "i" if TARGET_AVX2, "f" otherwise. + @ -- print a segment register of thread base pointer load ++ ^ -- print addr32 prefix if TARGET_64BIT and Pmode != word_mode + */ + + void +@@ -14385,6 +14508,11 @@ ix86_print_operand (FILE *file, rtx x, int code) + putc (TARGET_AVX2 ? 'i' : 'f', file); + return; + ++ case '^': ++ if (TARGET_64BIT && Pmode != word_mode) ++ fputs ("addr32 ", file); ++ return; ++ + default: + output_operand_lossage ("invalid operand code '%c'", code); + } +@@ -14524,8 +14652,8 @@ ix86_print_operand (FILE *file, rtx x, int code) + static bool + ix86_print_operand_punct_valid_p (unsigned char code) + { +- return (code == '@' || code == '*' || code == '+' +- || code == '&' || code == ';' || code == '~'); ++ return (code == '@' || code == '*' || code == '+' || code == '&' ++ || code == ';' || code == '~' || code == '^'); + } + + /* Print a memory operand whose address is ADDR. */ +@@ -20483,7 +20611,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) + gcc_assert (ok); + + operand = copy_rtx (operand); +- PUT_MODE (operand, Pmode); ++ PUT_MODE (operand, word_mode); + parts[0] = parts[1] = parts[2] = parts[3] = operand; + return size; + } +@@ -20636,7 +20764,7 @@ ix86_split_long_move (rtx operands[]) + if (push_operand (operands[0], VOIDmode)) + { + operands[0] = copy_rtx (operands[0]); +- PUT_MODE (operands[0], Pmode); ++ PUT_MODE (operands[0], word_mode); + } + else + operands[0] = gen_lowpart (DImode, operands[0]); +@@ -21191,14 +21319,9 @@ ix86_adjust_counter (rtx countreg, HOST_WIDE_INT value) + rtx + ix86_zero_extend_to_Pmode (rtx exp) + { +- rtx r; +- if (GET_MODE (exp) == VOIDmode) +- return force_reg (Pmode, exp); +- if (GET_MODE (exp) == Pmode) +- return copy_to_mode_reg (Pmode, exp); +- r = gen_reg_rtx (Pmode); +- emit_insn (gen_zero_extendsidi2 (r, exp)); +- return r; ++ if (GET_MODE (exp) != Pmode) ++ exp = convert_to_mode (Pmode, exp, 1); ++ return force_reg (Pmode, exp); + } + + /* Divide COUNTREG by SCALE. */ +@@ -22226,11 +22349,11 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, + gcc_unreachable (); + case loop: + need_zero_guard = true; +- size_needed = GET_MODE_SIZE (Pmode); ++ size_needed = GET_MODE_SIZE (word_mode); + break; + case unrolled_loop: + need_zero_guard = true; +- size_needed = GET_MODE_SIZE (Pmode) * (TARGET_64BIT ? 4 : 2); ++ size_needed = GET_MODE_SIZE (word_mode) * (TARGET_64BIT ? 4 : 2); + break; + case rep_prefix_8_byte: + size_needed = 8; +@@ -22396,13 +22519,13 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, + break; + case loop: + expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, NULL, +- count_exp, Pmode, 1, expected_size); ++ count_exp, word_mode, 1, expected_size); + break; + case unrolled_loop: + /* Unroll only by factor of 2 in 32bit mode, since we don't have enough + registers for 4 temporaries anyway. */ + expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, NULL, +- count_exp, Pmode, TARGET_64BIT ? 4 : 2, ++ count_exp, word_mode, TARGET_64BIT ? 4 : 2, + expected_size); + break; + case rep_prefix_8_byte: +@@ -22614,11 +22737,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, + gcc_unreachable (); + case loop: + need_zero_guard = true; +- size_needed = GET_MODE_SIZE (Pmode); ++ size_needed = GET_MODE_SIZE (word_mode); + break; + case unrolled_loop: + need_zero_guard = true; +- size_needed = GET_MODE_SIZE (Pmode) * 4; ++ size_needed = GET_MODE_SIZE (word_mode) * 4; + break; + case rep_prefix_8_byte: + size_needed = 8; +@@ -22789,11 +22912,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, + break; + case loop: + expand_set_or_movmem_via_loop (dst, NULL, destreg, NULL, promoted_val, +- count_exp, Pmode, 1, expected_size); ++ count_exp, word_mode, 1, expected_size); + break; + case unrolled_loop: + expand_set_or_movmem_via_loop (dst, NULL, destreg, NULL, promoted_val, +- count_exp, Pmode, 4, expected_size); ++ count_exp, word_mode, 4, expected_size); + break; + case rep_prefix_8_byte: + expand_setmem_via_rep_stos (dst, destreg, promoted_val, count_exp, +@@ -23156,13 +23279,13 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, + && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode)) + fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0))); + else if (sibcall +- ? !sibcall_insn_operand (XEXP (fnaddr, 0), Pmode) +- : !call_insn_operand (XEXP (fnaddr, 0), Pmode)) ++ ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode) ++ : !call_insn_operand (XEXP (fnaddr, 0), word_mode)) + { + fnaddr = XEXP (fnaddr, 0); +- if (GET_MODE (fnaddr) != Pmode) +- fnaddr = convert_to_mode (Pmode, fnaddr, 1); +- fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (Pmode, fnaddr)); ++ if (GET_MODE (fnaddr) != word_mode) ++ fnaddr = convert_to_mode (word_mode, fnaddr, 1); ++ fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (word_mode, fnaddr)); + } + + vec_len = 0; +@@ -24465,10 +24588,13 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) + /* Load the function address to r11. Try to load address using + the shorter movl instead of movabs. We may want to support + movq for kernel mode, but kernel does not use trampolines at +- the moment. */ +- if (x86_64_zext_immediate_operand (fnaddr, VOIDmode)) ++ the moment. FNADDR is a 32bit address and may not be in ++ DImode when ptr_mode == SImode. Always use movl in this ++ case. */ ++ if (ptr_mode == SImode ++ || x86_64_zext_immediate_operand (fnaddr, VOIDmode)) + { +- fnaddr = copy_to_mode_reg (DImode, fnaddr); ++ fnaddr = copy_to_mode_reg (Pmode, fnaddr); + + mem = adjust_address (m_tramp, HImode, offset); + emit_move_insn (mem, gen_int_mode (0xbb41, HImode)); +@@ -24487,9 +24613,9 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) + offset += 10; + } + +- /* Load static chain using movabs to r10. Use the +- shorter movl instead of movabs for x32. */ +- if (TARGET_X32) ++ /* Load static chain using movabs to r10. Use the shorter movl ++ instead of movabs when ptr_mode == SImode. */ ++ if (ptr_mode == SImode) + { + opcode = 0xba41; + size = 6; +@@ -32126,7 +32252,7 @@ x86_this_parameter (tree function) + parm_regs = x86_64_ms_abi_int_parameter_registers; + else + parm_regs = x86_64_int_parameter_registers; +- return gen_rtx_REG (DImode, parm_regs[aggr]); ++ return gen_rtx_REG (Pmode, parm_regs[aggr]); + } + + nregs = ix86_function_regparm (type, function); +diff --git a/src/gcc/config/i386/i386.h b/src/gcc/config/i386/i386.h +index 3a49803..f3ee68a 100644 +--- a/src/gcc/config/i386/i386.h ++++ b/src/gcc/config/i386/i386.h +@@ -42,7 +42,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + /* Redefines for option macros. */ + + #define TARGET_64BIT OPTION_ISA_64BIT +-#define TARGET_X32 OPTION_ISA_X32 + #define TARGET_MMX OPTION_ISA_MMX + #define TARGET_3DNOW OPTION_ISA_3DNOW + #define TARGET_3DNOW_A OPTION_ISA_3DNOW_A +@@ -76,7 +75,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + #define TARGET_RDRND OPTION_ISA_RDRND + #define TARGET_F16C OPTION_ISA_F16C + +-#define TARGET_LP64 (TARGET_64BIT && !TARGET_X32) ++#define TARGET_LP64 OPTION_ABI_64 ++#define TARGET_X32 OPTION_ABI_X32 + + /* SSE4.1 defines round instructions */ + #define OPTION_MASK_ISA_ROUND OPTION_MASK_ISA_SSE4_1 +@@ -705,7 +705,7 @@ enum target_cpu_default + #define MAIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32) + + /* Minimum stack boundary. */ +-#define MIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32) ++#define MIN_STACK_BOUNDARY (TARGET_64BIT ? (TARGET_SSE ? 128 : 64) : 32) + + /* Boundary (in *bits*) on which the stack pointer prefers to be + aligned; the compiler cannot rely on having this alignment. */ +@@ -1774,7 +1774,7 @@ do { \ + /* Specify the machine mode that pointers have. + After generation of rtl, the compiler makes no further distinction + between pointers and any other objects of this machine mode. */ +-#define Pmode (TARGET_64BIT ? DImode : SImode) ++#define Pmode (ix86_pmode == PMODE_DI ? DImode : SImode) + + /* A C expression whose value is zero if pointers that need to be extended + from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and +diff --git a/src/gcc/config/i386/i386.md b/src/gcc/config/i386/i386.md +index f1b53a0..2863700 100644 +--- a/src/gcc/config/i386/i386.md ++++ b/src/gcc/config/i386/i386.md +@@ -61,7 +61,9 @@ + ;; Y -- print condition for XOP pcom* instruction. + ;; + -- print a branch hint as 'cs' or 'ds' prefix + ;; ; -- print a semicolon (after prefixes due to bug in older gas). ++;; ~ -- print "i" if TARGET_AVX2, "f" otherwise. + ;; @ -- print a segment register of thread base pointer load ++;; ^ -- print addr32 prefix if TARGET_64BIT and Pmode != word_mode + + (define_c_enum "unspec" [ + ;; Relocation specifiers +@@ -901,6 +903,11 @@ + ;; pointer-sized quantities. Exactly one of the two alternatives will match. + (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) + ++;; This mode iterator allows :W to be used for patterns that operate on ++;; word_mode sized quantities. ++(define_mode_iterator W ++ [(SI "word_mode == SImode") (DI "word_mode == DImode")]) ++ + ;; This mode iterator allows :PTR to be used for patterns that operate on + ;; ptr_mode sized quantities. + (define_mode_iterator PTR +@@ -1709,8 +1716,8 @@ + (set_attr "mode" "SI")]) + + (define_insn "*push2_prologue" +- [(set (match_operand:P 0 "push_operand" "=<") +- (match_operand:P 1 "general_no_elim_operand" "r*m")) ++ [(set (match_operand:W 0 "push_operand" "=<") ++ (match_operand:W 1 "general_no_elim_operand" "r*m")) + (clobber (mem:BLK (scratch)))] + "" + "push{}\t%1" +@@ -1718,16 +1725,16 @@ + (set_attr "mode" "")]) + + (define_insn "*pop1" +- [(set (match_operand:P 0 "nonimmediate_operand" "=r*m") +- (match_operand:P 1 "pop_operand" ">"))] ++ [(set (match_operand:W 0 "nonimmediate_operand" "=r*m") ++ (match_operand:W 1 "pop_operand" ">"))] + "" + "pop{}\t%0" + [(set_attr "type" "pop") + (set_attr "mode" "")]) + + (define_insn "*pop1_epilogue" +- [(set (match_operand:P 0 "nonimmediate_operand" "=r*m") +- (match_operand:P 1 "pop_operand" ">")) ++ [(set (match_operand:W 0 "nonimmediate_operand" "=r*m") ++ (match_operand:W 1 "pop_operand" ">")) + (clobber (mem:BLK (scratch)))] + "" + "pop{}\t%0" +@@ -3399,9 +3406,9 @@ + }) + + (define_insn "*zero_extendsidi2_rex64" +- [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?*y,?*Yi,*x") ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r ,o,?*Ym,?*y,?*Yi,*x") + (zero_extend:DI +- (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] ++ (match_operand:SI 1 "x86_64_zext_general_operand" "rmWz,0,r ,m ,r ,m")))] + "TARGET_64BIT" + "@ + mov{l}\t{%1, %k0|%k0, %1} +@@ -11121,10 +11128,15 @@ + (set_attr "modrm" "0")]) + + (define_expand "indirect_jump" +- [(set (pc) (match_operand 0 "indirect_branch_operand" ""))]) ++ [(set (pc) (match_operand 0 "indirect_branch_operand" ""))] ++ "" ++{ ++ if (TARGET_X32) ++ operands[0] = convert_memory_address (word_mode, operands[0]); ++}) + + (define_insn "*indirect_jump" +- [(set (pc) (match_operand:P 0 "indirect_branch_operand" "rw"))] ++ [(set (pc) (match_operand:W 0 "indirect_branch_operand" "rw"))] + "" + "jmp\t%A0" + [(set_attr "type" "ibr") +@@ -11166,12 +11178,13 @@ + operands[0] = expand_simple_binop (Pmode, code, op0, op1, NULL_RTX, 0, + OPTAB_DIRECT); + } +- else if (TARGET_X32) +- operands[0] = convert_memory_address (Pmode, operands[0]); ++ ++ if (TARGET_X32) ++ operands[0] = convert_memory_address (word_mode, operands[0]); + }) + + (define_insn "*tablejump_1" +- [(set (pc) (match_operand:P 0 "indirect_branch_operand" "rw")) ++ [(set (pc) (match_operand:W 0 "indirect_branch_operand" "rw")) + (use (label_ref (match_operand 1 "" "")))] + "" + "jmp\t%A0" +@@ -11259,7 +11272,7 @@ + }) + + (define_insn_and_split "*call_vzeroupper" +- [(call (mem:QI (match_operand:P 0 "call_insn_operand" "zw")) ++ [(call (mem:QI (match_operand:W 0 "call_insn_operand" "zw")) + (match_operand 1 "" "")) + (unspec [(match_operand 2 "const_int_operand" "")] + UNSPEC_CALL_NEEDS_VZEROUPPER)] +@@ -11271,7 +11284,7 @@ + [(set_attr "type" "call")]) + + (define_insn "*call" +- [(call (mem:QI (match_operand:P 0 "call_insn_operand" "zw")) ++ [(call (mem:QI (match_operand:W 0 "call_insn_operand" "zw")) + (match_operand 1 "" ""))] + "!SIBLING_CALL_P (insn)" + "* return ix86_output_call_insn (insn, operands[0]);" +@@ -11323,7 +11336,7 @@ + [(set_attr "type" "call")]) + + (define_insn_and_split "*sibcall_vzeroupper" +- [(call (mem:QI (match_operand:P 0 "sibcall_insn_operand" "Uz")) ++ [(call (mem:QI (match_operand:W 0 "sibcall_insn_operand" "Uz")) + (match_operand 1 "" "")) + (unspec [(match_operand 2 "const_int_operand" "")] + UNSPEC_CALL_NEEDS_VZEROUPPER)] +@@ -11335,7 +11348,7 @@ + [(set_attr "type" "call")]) + + (define_insn "*sibcall" +- [(call (mem:QI (match_operand:P 0 "sibcall_insn_operand" "Uz")) ++ [(call (mem:QI (match_operand:W 0 "sibcall_insn_operand" "Uz")) + (match_operand 1 "" ""))] + "SIBLING_CALL_P (insn)" + "* return ix86_output_call_insn (insn, operands[0]);" +@@ -11432,7 +11445,7 @@ + + (define_insn_and_split "*call_value_vzeroupper" + [(set (match_operand 0 "" "") +- (call (mem:QI (match_operand:P 1 "call_insn_operand" "zw")) ++ (call (mem:QI (match_operand:W 1 "call_insn_operand" "zw")) + (match_operand 2 "" ""))) + (unspec [(match_operand 3 "const_int_operand" "")] + UNSPEC_CALL_NEEDS_VZEROUPPER)] +@@ -11445,7 +11458,7 @@ + + (define_insn "*call_value" + [(set (match_operand 0 "" "") +- (call (mem:QI (match_operand:P 1 "call_insn_operand" "zw")) ++ (call (mem:QI (match_operand:W 1 "call_insn_operand" "zw")) + (match_operand 2 "" "")))] + "!SIBLING_CALL_P (insn)" + "* return ix86_output_call_insn (insn, operands[1]);" +@@ -11453,7 +11466,7 @@ + + (define_insn_and_split "*sibcall_value_vzeroupper" + [(set (match_operand 0 "" "") +- (call (mem:QI (match_operand:P 1 "sibcall_insn_operand" "Uz")) ++ (call (mem:QI (match_operand:W 1 "sibcall_insn_operand" "Uz")) + (match_operand 2 "" ""))) + (unspec [(match_operand 3 "const_int_operand" "")] + UNSPEC_CALL_NEEDS_VZEROUPPER)] +@@ -11466,7 +11479,7 @@ + + (define_insn "*sibcall_value" + [(set (match_operand 0 "" "") +- (call (mem:QI (match_operand:P 1 "sibcall_insn_operand" "Uz")) ++ (call (mem:QI (match_operand:W 1 "sibcall_insn_operand" "Uz")) + (match_operand 2 "" "")))] + "SIBLING_CALL_P (insn)" + "* return ix86_output_call_insn (insn, operands[1]);" +@@ -12571,7 +12584,7 @@ + [(set (match_operand:SI 0 "register_operand" "=a") + (unspec:SI + [(match_operand:SI 1 "register_operand" "b") +- (match_operand:SI 2 "tls_symbolic_operand" "") ++ (match_operand 2 "tls_symbolic_operand" "") + (match_operand:SI 3 "constant_call_address_operand" "z")] + UNSPEC_TLS_GD)) + (clobber (match_scratch:SI 4 "=d")) +@@ -12596,20 +12609,20 @@ + [(parallel + [(set (match_operand:SI 0 "register_operand" "") + (unspec:SI [(match_operand:SI 2 "register_operand" "") +- (match_operand:SI 1 "tls_symbolic_operand" "") ++ (match_operand 1 "tls_symbolic_operand" "") + (match_operand:SI 3 "constant_call_address_operand" "")] + UNSPEC_TLS_GD)) + (clobber (match_scratch:SI 4 "")) + (clobber (match_scratch:SI 5 "")) + (clobber (reg:CC FLAGS_REG))])]) + +-(define_insn "*tls_global_dynamic_64" +- [(set (match_operand:DI 0 "register_operand" "=a") +- (call:DI +- (mem:QI (match_operand:DI 2 "constant_call_address_operand" "z")) +- (match_operand:DI 3 "" ""))) +- (unspec:DI [(match_operand 1 "tls_symbolic_operand" "")] +- UNSPEC_TLS_GD)] ++(define_insn "*tls_global_dynamic_64_" ++ [(set (match_operand:P 0 "register_operand" "=a") ++ (call:P ++ (mem:QI (match_operand:P 2 "constant_call_address_operand" "z")) ++ (match_operand:P 3 "" ""))) ++ (unspec:P [(match_operand 1 "tls_symbolic_operand" "")] ++ UNSPEC_TLS_GD)] + "TARGET_64BIT" + { + if (!TARGET_X32) +@@ -12626,14 +12639,15 @@ + (set (attr "length") + (symbol_ref "TARGET_X32 ? 15 : 16"))]) + +-(define_expand "tls_global_dynamic_64" ++(define_expand "tls_global_dynamic_64_" + [(parallel +- [(set (match_operand:DI 0 "register_operand" "") +- (call:DI +- (mem:QI (match_operand:DI 2 "constant_call_address_operand" "")) ++ [(set (match_operand:P 0 "register_operand" "") ++ (call:P ++ (mem:QI (match_operand:P 2 "constant_call_address_operand" "")) + (const_int 0))) +- (unspec:DI [(match_operand 1 "tls_symbolic_operand" "")] +- UNSPEC_TLS_GD)])]) ++ (unspec:P [(match_operand 1 "tls_symbolic_operand" "")] ++ UNSPEC_TLS_GD)])] ++ "TARGET_64BIT") + + (define_insn "*tls_local_dynamic_base_32_gnu" + [(set (match_operand:SI 0 "register_operand" "=a") +@@ -12670,12 +12684,12 @@ + (clobber (match_scratch:SI 4 "")) + (clobber (reg:CC FLAGS_REG))])]) + +-(define_insn "*tls_local_dynamic_base_64" +- [(set (match_operand:DI 0 "register_operand" "=a") +- (call:DI +- (mem:QI (match_operand:DI 1 "constant_call_address_operand" "z")) +- (match_operand:DI 2 "" ""))) +- (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)] ++(define_insn "*tls_local_dynamic_base_64_" ++ [(set (match_operand:P 0 "register_operand" "=a") ++ (call:P ++ (mem:QI (match_operand:P 1 "constant_call_address_operand" "z")) ++ (match_operand:P 2 "" ""))) ++ (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)] + "TARGET_64BIT" + { + output_asm_insn +@@ -12687,13 +12701,14 @@ + [(set_attr "type" "multi") + (set_attr "length" "12")]) + +-(define_expand "tls_local_dynamic_base_64" ++(define_expand "tls_local_dynamic_base_64_" + [(parallel +- [(set (match_operand:DI 0 "register_operand" "") +- (call:DI +- (mem:QI (match_operand:DI 1 "constant_call_address_operand" "")) ++ [(set (match_operand:P 0 "register_operand" "") ++ (call:P ++ (mem:QI (match_operand:P 1 "constant_call_address_operand" "")) + (const_int 0))) +- (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)])]) ++ (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)])] ++ "TARGET_64BIT") + + ;; Local dynamic of a single variable is a lose. Show combine how + ;; to convert that back to global dynamic. +@@ -12705,7 +12720,7 @@ + (match_operand:SI 2 "constant_call_address_operand" "z")] + UNSPEC_TLS_LD_BASE) + (const:SI (unspec:SI +- [(match_operand:SI 3 "tls_symbolic_operand" "")] ++ [(match_operand 3 "tls_symbolic_operand" "")] + UNSPEC_DTPOFF)))) + (clobber (match_scratch:SI 4 "=d")) + (clobber (match_scratch:SI 5 "=c")) +@@ -12803,7 +12818,7 @@ + (define_insn "tls_initial_exec_64_sun" + [(set (match_operand:DI 0 "register_operand" "=a") + (unspec:DI +- [(match_operand:DI 1 "tls_symbolic_operand" "")] ++ [(match_operand 1 "tls_symbolic_operand" "")] + UNSPEC_TLS_IE_SUN)) + (clobber (reg:CC FLAGS_REG))] + "TARGET_64BIT && TARGET_SUN_TLS" +@@ -12820,7 +12835,7 @@ + [(set (match_dup 3) + (plus:SI (match_operand:SI 2 "register_operand" "") + (const:SI +- (unspec:SI [(match_operand:SI 1 "tls_symbolic_operand" "")] ++ (unspec:SI [(match_operand 1 "tls_symbolic_operand" "")] + UNSPEC_TLSDESC)))) + (parallel + [(set (match_operand:SI 0 "register_operand" "") +@@ -12838,7 +12853,7 @@ + [(set (match_operand:SI 0 "register_operand" "=r") + (plus:SI (match_operand:SI 1 "register_operand" "b") + (const:SI +- (unspec:SI [(match_operand:SI 2 "tls_symbolic_operand" "")] ++ (unspec:SI [(match_operand 2 "tls_symbolic_operand" "")] + UNSPEC_TLSDESC))))] + "!TARGET_64BIT && TARGET_GNU2_TLS" + "lea{l}\t{%E2@TLSDESC(%1), %0|%0, %E2@TLSDESC[%1]}" +@@ -12849,7 +12864,7 @@ + + (define_insn "*tls_dynamic_gnu2_call_32" + [(set (match_operand:SI 0 "register_operand" "=a") +- (unspec:SI [(match_operand:SI 1 "tls_symbolic_operand" "") ++ (unspec:SI [(match_operand 1 "tls_symbolic_operand" "") + (match_operand:SI 2 "register_operand" "0") + ;; we have to make sure %ebx still points to the GOT + (match_operand:SI 3 "register_operand" "b") +@@ -12865,13 +12880,13 @@ + (define_insn_and_split "*tls_dynamic_gnu2_combine_32" + [(set (match_operand:SI 0 "register_operand" "=&a") + (plus:SI +- (unspec:SI [(match_operand:SI 3 "tls_modbase_operand" "") ++ (unspec:SI [(match_operand 3 "tls_modbase_operand" "") + (match_operand:SI 4 "" "") + (match_operand:SI 2 "register_operand" "b") + (reg:SI SP_REG)] + UNSPEC_TLSDESC) + (const:SI (unspec:SI +- [(match_operand:SI 1 "tls_symbolic_operand" "")] ++ [(match_operand 1 "tls_symbolic_operand" "")] + UNSPEC_DTPOFF)))) + (clobber (reg:CC FLAGS_REG))] + "!TARGET_64BIT && TARGET_GNU2_TLS" +@@ -12925,7 +12940,7 @@ + (define_insn_and_split "*tls_dynamic_gnu2_combine_64" + [(set (match_operand:DI 0 "register_operand" "=&a") + (plus:DI +- (unspec:DI [(match_operand:DI 2 "tls_modbase_operand" "") ++ (unspec:DI [(match_operand 2 "tls_modbase_operand" "") + (match_operand:DI 3 "" "") + (reg:DI SP_REG)] + UNSPEC_TLSDESC) +@@ -15724,17 +15739,17 @@ + "ix86_current_function_needs_cld = 1;") + + (define_insn "*strmovdi_rex_1" +- [(set (mem:DI (match_operand:DI 2 "register_operand" "0")) +- (mem:DI (match_operand:DI 3 "register_operand" "1"))) +- (set (match_operand:DI 0 "register_operand" "=D") +- (plus:DI (match_dup 2) +- (const_int 8))) +- (set (match_operand:DI 1 "register_operand" "=S") +- (plus:DI (match_dup 3) +- (const_int 8)))] ++ [(set (mem:DI (match_operand:P 2 "register_operand" "0")) ++ (mem:DI (match_operand:P 3 "register_operand" "1"))) ++ (set (match_operand:P 0 "register_operand" "=D") ++ (plus:P (match_dup 2) ++ (const_int 8))) ++ (set (match_operand:P 1 "register_operand" "=S") ++ (plus:P (match_dup 3) ++ (const_int 8)))] + "TARGET_64BIT + && !(fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "movsq" ++ "%^movsq" + [(set_attr "type" "str") + (set_attr "memory" "both") + (set_attr "mode" "DI")]) +@@ -15749,7 +15764,7 @@ + (plus:P (match_dup 3) + (const_int 4)))] + "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "movs{l|d}" ++ "%^movs{l|d}" + [(set_attr "type" "str") + (set_attr "memory" "both") + (set_attr "mode" "SI")]) +@@ -15764,7 +15779,7 @@ + (plus:P (match_dup 3) + (const_int 2)))] + "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "movsw" ++ "%^movsw" + [(set_attr "type" "str") + (set_attr "memory" "both") + (set_attr "mode" "HI")]) +@@ -15779,7 +15794,7 @@ + (plus:P (match_dup 3) + (const_int 1)))] + "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "movsb" ++ "%^movsb" + [(set_attr "type" "str") + (set_attr "memory" "both") + (set (attr "prefix_rex") +@@ -15802,20 +15817,20 @@ + "ix86_current_function_needs_cld = 1;") + + (define_insn "*rep_movdi_rex64" +- [(set (match_operand:DI 2 "register_operand" "=c") (const_int 0)) +- (set (match_operand:DI 0 "register_operand" "=D") +- (plus:DI (ashift:DI (match_operand:DI 5 "register_operand" "2") +- (const_int 3)) +- (match_operand:DI 3 "register_operand" "0"))) +- (set (match_operand:DI 1 "register_operand" "=S") +- (plus:DI (ashift:DI (match_dup 5) (const_int 3)) +- (match_operand:DI 4 "register_operand" "1"))) ++ [(set (match_operand:P 2 "register_operand" "=c") (const_int 0)) ++ (set (match_operand:P 0 "register_operand" "=D") ++ (plus:P (ashift:P (match_operand:P 5 "register_operand" "2") ++ (const_int 3)) ++ (match_operand:P 3 "register_operand" "0"))) ++ (set (match_operand:P 1 "register_operand" "=S") ++ (plus:P (ashift:P (match_dup 5) (const_int 3)) ++ (match_operand:P 4 "register_operand" "1"))) + (set (mem:BLK (match_dup 3)) + (mem:BLK (match_dup 4))) + (use (match_dup 5))] + "TARGET_64BIT + && !(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "rep{%;} movsq" ++ "%^rep{%;} movsq" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "both") +@@ -15834,7 +15849,7 @@ + (mem:BLK (match_dup 4))) + (use (match_dup 5))] + "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "rep{%;} movs{l|d}" ++ "%^rep{%;} movs{l|d}" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "both") +@@ -15851,7 +15866,7 @@ + (mem:BLK (match_dup 4))) + (use (match_dup 5))] + "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "rep{%;} movsb" ++ "%^rep{%;} movsb" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "both") +@@ -15912,14 +15927,14 @@ + "ix86_current_function_needs_cld = 1;") + + (define_insn "*strsetdi_rex_1" +- [(set (mem:DI (match_operand:DI 1 "register_operand" "0")) ++ [(set (mem:DI (match_operand:P 1 "register_operand" "0")) + (match_operand:DI 2 "register_operand" "a")) +- (set (match_operand:DI 0 "register_operand" "=D") +- (plus:DI (match_dup 1) +- (const_int 8)))] ++ (set (match_operand:P 0 "register_operand" "=D") ++ (plus:P (match_dup 1) ++ (const_int 8)))] + "TARGET_64BIT + && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])" +- "stosq" ++ "%^stosq" + [(set_attr "type" "str") + (set_attr "memory" "store") + (set_attr "mode" "DI")]) +@@ -15931,7 +15946,7 @@ + (plus:P (match_dup 1) + (const_int 4)))] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" +- "stos{l|d}" ++ "%^stos{l|d}" + [(set_attr "type" "str") + (set_attr "memory" "store") + (set_attr "mode" "SI")]) +@@ -15943,7 +15958,7 @@ + (plus:P (match_dup 1) + (const_int 2)))] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" +- "stosw" ++ "%^stosw" + [(set_attr "type" "str") + (set_attr "memory" "store") + (set_attr "mode" "HI")]) +@@ -15955,7 +15970,7 @@ + (plus:P (match_dup 1) + (const_int 1)))] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" +- "stosb" ++ "%^stosb" + [(set_attr "type" "str") + (set_attr "memory" "store") + (set (attr "prefix_rex") +@@ -15976,18 +15991,18 @@ + "ix86_current_function_needs_cld = 1;") + + (define_insn "*rep_stosdi_rex64" +- [(set (match_operand:DI 1 "register_operand" "=c") (const_int 0)) +- (set (match_operand:DI 0 "register_operand" "=D") +- (plus:DI (ashift:DI (match_operand:DI 4 "register_operand" "1") +- (const_int 3)) +- (match_operand:DI 3 "register_operand" "0"))) ++ [(set (match_operand:P 1 "register_operand" "=c") (const_int 0)) ++ (set (match_operand:P 0 "register_operand" "=D") ++ (plus:P (ashift:P (match_operand:P 4 "register_operand" "1") ++ (const_int 3)) ++ (match_operand:P 3 "register_operand" "0"))) + (set (mem:BLK (match_dup 3)) + (const_int 0)) + (use (match_operand:DI 2 "register_operand" "a")) + (use (match_dup 4))] + "TARGET_64BIT + && !(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" +- "rep{%;} stosq" ++ "%^rep{%;} stosq" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "store") +@@ -16004,7 +16019,7 @@ + (use (match_operand:SI 2 "register_operand" "a")) + (use (match_dup 4))] + "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" +- "rep{%;} stos{l|d}" ++ "%^rep{%;} stos{l|d}" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "store") +@@ -16020,7 +16035,7 @@ + (use (match_operand:QI 2 "register_operand" "a")) + (use (match_dup 4))] + "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" +- "rep{%;} stosb" ++ "%^rep{%;} stosb" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "store") +@@ -16141,7 +16156,7 @@ + (clobber (match_operand:P 1 "register_operand" "=D")) + (clobber (match_operand:P 2 "register_operand" "=c"))] + "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "repz{%;} cmpsb" ++ "%^repz{%;} cmpsb" + [(set_attr "type" "str") + (set_attr "mode" "QI") + (set (attr "prefix_rex") +@@ -16181,7 +16196,7 @@ + (clobber (match_operand:P 1 "register_operand" "=D")) + (clobber (match_operand:P 2 "register_operand" "=c"))] + "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "repz{%;} cmpsb" ++ "%^repz{%;} cmpsb" + [(set_attr "type" "str") + (set_attr "mode" "QI") + (set (attr "prefix_rex") +@@ -16222,7 +16237,7 @@ + (clobber (match_operand:P 1 "register_operand" "=D")) + (clobber (reg:CC FLAGS_REG))] + "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" +- "repnz{%;} scasb" ++ "%^repnz{%;} scasb" + [(set_attr "type" "str") + (set_attr "mode" "QI") + (set (attr "prefix_rex") +@@ -17367,131 +17382,131 @@ + ;; alternative when no register is available later. + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "(TARGET_SINGLE_PUSH || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == -GET_MODE_SIZE (Pmode)" ++ && INTVAL (operands[0]) == -GET_MODE_SIZE (word_mode)" + [(clobber (match_dup 1)) +- (parallel [(set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1)) ++ (parallel [(set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1)) + (clobber (mem:BLK (scratch)))])]) + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "(TARGET_DOUBLE_PUSH || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == -2*GET_MODE_SIZE (Pmode)" ++ && INTVAL (operands[0]) == -2*GET_MODE_SIZE (word_mode)" + [(clobber (match_dup 1)) +- (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1)) +- (parallel [(set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1)) ++ (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1)) ++ (parallel [(set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1)) + (clobber (mem:BLK (scratch)))])]) + + ;; Convert esp subtractions to push. + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] + "(TARGET_SINGLE_PUSH || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == -GET_MODE_SIZE (Pmode)" ++ && INTVAL (operands[0]) == -GET_MODE_SIZE (word_mode)" + [(clobber (match_dup 1)) +- (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))]) ++ (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))]) + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] + "(TARGET_DOUBLE_PUSH || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == -2*GET_MODE_SIZE (Pmode)" ++ && INTVAL (operands[0]) == -2*GET_MODE_SIZE (word_mode)" + [(clobber (match_dup 1)) +- (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1)) +- (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))]) ++ (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1)) ++ (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))]) + + ;; Convert epilogue deallocator to pop. + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "(TARGET_SINGLE_POP || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == GET_MODE_SIZE (Pmode)" +- [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) ++ && INTVAL (operands[0]) == GET_MODE_SIZE (word_mode)" ++ [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) + (clobber (mem:BLK (scratch)))])]) + + ;; Two pops case is tricky, since pop causes dependency + ;; on destination register. We use two registers if available. + (define_peephole2 +- [(match_scratch:P 1 "r") +- (match_scratch:P 2 "r") ++ [(match_scratch:W 1 "r") ++ (match_scratch:W 2 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "(TARGET_DOUBLE_POP || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)" +- [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) ++ && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)" ++ [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) + (clobber (mem:BLK (scratch)))]) +- (set (match_dup 2) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ (set (match_dup 2) (mem:W (post_inc:P (reg:P SP_REG))))]) + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "optimize_insn_for_size_p () +- && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)" +- [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) ++ && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)" ++ [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) + (clobber (mem:BLK (scratch)))]) +- (set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ (set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))]) + + ;; Convert esp additions to pop. + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] +- "INTVAL (operands[0]) == GET_MODE_SIZE (Pmode)" +- [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ "INTVAL (operands[0]) == GET_MODE_SIZE (word_mode)" ++ [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))]) + + ;; Two pops case is tricky, since pop causes dependency + ;; on destination register. We use two registers if available. + (define_peephole2 +- [(match_scratch:P 1 "r") +- (match_scratch:P 2 "r") ++ [(match_scratch:W 1 "r") ++ (match_scratch:W 2 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] +- "INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)" +- [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) +- (set (match_dup 2) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ "INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)" ++ [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) ++ (set (match_dup 2) (mem:W (post_inc:P (reg:P SP_REG))))]) + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] + "optimize_insn_for_size_p () +- && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)" +- [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) +- (set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)" ++ [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) ++ (set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))]) + + ;; Convert compares with 1 to shorter inc/dec operations when CF is not + ;; required and register dies. Similarly for 128 to -128. +@@ -17602,7 +17617,7 @@ + ;; leal (%edx,%eax,4), %eax + + (define_peephole2 +- [(match_scratch:P 5 "r") ++ [(match_scratch:W 5 "r") + (parallel [(set (match_operand 0 "register_operand" "") + (ashift (match_operand 1 "register_operand" "") + (match_operand 2 "const_int_operand" ""))) +@@ -17628,16 +17643,16 @@ + enum machine_mode op1mode = GET_MODE (operands[1]); + enum machine_mode mode = op1mode == DImode ? DImode : SImode; + int scale = 1 << INTVAL (operands[2]); +- rtx index = gen_lowpart (Pmode, operands[1]); +- rtx base = gen_lowpart (Pmode, operands[5]); ++ rtx index = gen_lowpart (word_mode, operands[1]); ++ rtx base = gen_lowpart (word_mode, operands[5]); + rtx dest = gen_lowpart (mode, operands[3]); + +- operands[1] = gen_rtx_PLUS (Pmode, base, +- gen_rtx_MULT (Pmode, index, GEN_INT (scale))); ++ operands[1] = gen_rtx_PLUS (word_mode, base, ++ gen_rtx_MULT (word_mode, index, GEN_INT (scale))); + operands[5] = base; +- if (mode != Pmode) ++ if (mode != word_mode) + operands[1] = gen_rtx_SUBREG (mode, operands[1], 0); +- if (op1mode != Pmode) ++ if (op1mode != word_mode) + operands[5] = gen_rtx_SUBREG (op1mode, operands[5], 0); + operands[0] = dest; + }) +@@ -18028,7 +18043,7 @@ + { + rtx (*insn)(rtx); + +- insn = (TARGET_64BIT ++ insn = (Pmode == DImode + ? gen_lwp_slwpcbdi + : gen_lwp_slwpcbsi); + +diff --git a/src/gcc/config/i386/i386.opt b/src/gcc/config/i386/i386.opt +index 6c516e7..97130e1 100644 +--- a/src/gcc/config/i386/i386.opt ++++ b/src/gcc/config/i386/i386.opt +@@ -159,6 +159,20 @@ Enum(cmodel) String(32) Value(CM_32) + EnumValue + Enum(cmodel) String(kernel) Value(CM_KERNEL) + ++maddress-mode= ++Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI) ++Use given address mode ++ ++Enum ++Name(pmode) Type(enum pmode) ++Known address mode (for use with the -maddress-mode= option): ++ ++EnumValue ++Enum(pmode) String(short) Value(PMODE_SI) ++ ++EnumValue ++Enum(pmode) String(long) Value(PMODE_DI) ++ + mcpu= + Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) + +@@ -204,7 +218,7 @@ EnumValue + Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) + + mhard-float +-Target RejectNegative Mask(80387) MaskExists Save ++Target RejectNegative Mask(80387) Save + Use hardware fp + + mieee-fp +@@ -411,11 +425,11 @@ Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_f + Generate 32bit i386 code + + m64 +-Target RejectNegative Negative(mx32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) Save ++Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save + Generate 64bit x86-64 code + + mx32 +-Target RejectNegative Negative(m32) Report Mask(ISA_X32) Var(ix86_isa_flags) Save ++Target RejectNegative Negative(m32) Report Mask(ABI_X32) Var(ix86_isa_flags) Save + Generate 32bit x86-64 code + + mmmx +@@ -455,11 +469,11 @@ Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save + Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation + + msse4 +-Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) Save ++Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save + Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation + + mno-sse4 +-Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) Save ++Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save + Do not support SSE4.1 and SSE4.2 built-in functions and code generation + + msse5 +diff --git a/src/gcc/config/i386/predicates.md b/src/gcc/config/i386/predicates.md +index 9e31291..3cafdb9 100644 +--- a/src/gcc/config/i386/predicates.md ++++ b/src/gcc/config/i386/predicates.md +@@ -1,5 +1,5 @@ + ;; Predicate definitions for IA-32 and x86-64. +-;; Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 ++;; Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 + ;; Free Software Foundation, Inc. + ;; + ;; This file is part of GCC. +@@ -341,6 +341,16 @@ + (match_operand 0 "general_operand"))) + + ;; Return true if OP is general operand representable on x86_64 ++;; as zero extended constant. This predicate is used in zero-extending ++;; conversion operations that require non-VOIDmode immediate operands. ++(define_predicate "x86_64_zext_general_operand" ++ (if_then_else (match_test "TARGET_64BIT") ++ (ior (match_operand 0 "nonimmediate_operand") ++ (and (match_operand 0 "x86_64_zext_immediate_operand") ++ (match_test "GET_MODE (op) != VOIDmode"))) ++ (match_operand 0 "general_operand"))) ++ ++;; Return true if OP is general operand representable on x86_64 + ;; as either sign extended or zero extended constant. + (define_predicate "x86_64_szext_general_operand" + (if_then_else (match_test "TARGET_64BIT") +@@ -483,11 +493,11 @@ + (match_operand 0 "local_symbolic_operand"))) + + ;; Test for various thread-local symbols. +-(define_predicate "tls_symbolic_operand" ++(define_special_predicate "tls_symbolic_operand" + (and (match_code "symbol_ref") + (match_test "SYMBOL_REF_TLS_MODEL (op)"))) + +-(define_predicate "tls_modbase_operand" ++(define_special_predicate "tls_modbase_operand" + (and (match_code "symbol_ref") + (match_test "op == ix86_tls_module_base ()"))) + +@@ -558,20 +568,23 @@ + + ;; Test for a valid operand for indirect branch. + (define_predicate "indirect_branch_operand" +- (if_then_else (match_test "TARGET_X32") +- (match_operand 0 "register_operand") +- (match_operand 0 "nonimmediate_operand"))) ++ (ior (match_operand 0 "register_operand") ++ (and (not (match_test "TARGET_X32")) ++ (match_operand 0 "memory_operand")))) + + ;; Test for a valid operand for a call instruction. +-(define_predicate "call_insn_operand" +- (ior (match_operand 0 "constant_call_address_operand") ++;; Allow constant call address operands in Pmode only. ++(define_special_predicate "call_insn_operand" ++ (ior (match_test "constant_call_address_operand ++ (op, mode == VOIDmode ? mode : Pmode)") + (match_operand 0 "call_register_no_elim_operand") + (and (not (match_test "TARGET_X32")) + (match_operand 0 "memory_operand")))) + + ;; Similarly, but for tail calls, in which we cannot allow memory references. +-(define_predicate "sibcall_insn_operand" +- (ior (match_operand 0 "constant_call_address_operand") ++(define_special_predicate "sibcall_insn_operand" ++ (ior (match_test "constant_call_address_operand ++ (op, mode == VOIDmode ? mode : Pmode)") + (match_operand 0 "register_no_elim_operand"))) + + ;; Match exactly zero. +diff --git a/src/gcc/config/i386/sse.md b/src/gcc/config/i386/sse.md +index 0621d61..a69471f 100644 +--- a/src/gcc/config/i386/sse.md ++++ b/src/gcc/config/i386/sse.md +@@ -8079,8 +8079,8 @@ + "monitor\t%0, %1, %2" + [(set_attr "length" "3")]) + +-(define_insn "sse3_monitor64" +- [(unspec_volatile [(match_operand:DI 0 "register_operand" "a") ++(define_insn "sse3_monitor64_" ++ [(unspec_volatile [(match_operand:P 0 "register_operand" "a") + (match_operand:SI 1 "register_operand" "c") + (match_operand:SI 2 "register_operand" "d")] + UNSPECV_MONITOR)] +diff --git a/src/gcc/config/m68k/m68k.opt b/src/gcc/config/m68k/m68k.opt +index 14428fc..00bc2d5 100644 +--- a/src/gcc/config/m68k/m68k.opt ++++ b/src/gcc/config/m68k/m68k.opt +@@ -136,7 +136,7 @@ Target RejectNegative + Generate code for a Fido A + + mhard-float +-Target RejectNegative Mask(HARD_FLOAT) MaskExists ++Target RejectNegative Mask(HARD_FLOAT) + Generate code which uses hardware floating point instructions + + mid-shared-library +diff --git a/src/gcc/config/mep/mep.opt b/src/gcc/config/mep/mep.opt +index 38b8f80..0ea19e6 100644 +--- a/src/gcc/config/mep/mep.opt ++++ b/src/gcc/config/mep/mep.opt +@@ -55,7 +55,7 @@ Target Mask(COP) + Enable MeP Coprocessor + + mcop32 +-Target Mask(COP) MaskExists RejectNegative ++Target Mask(COP) RejectNegative + Enable MeP Coprocessor with 32-bit registers + + mcop64 +diff --git a/src/gcc/config/pa/pa-hpux.opt b/src/gcc/config/pa/pa-hpux.opt +index ed5d6a4..b709b83 100644 +--- a/src/gcc/config/pa/pa-hpux.opt ++++ b/src/gcc/config/pa/pa-hpux.opt +@@ -23,7 +23,7 @@ Variable + int flag_pa_unix = TARGET_HPUX_11_31 ? 2003 : TARGET_HPUX_11_11 ? 1998 : TARGET_HPUX_10_10 ? 1995 : 1993 + + msio +-Target RejectNegative Mask(SIO) MaskExists ++Target RejectNegative Mask(SIO) + Generate cpp defines for server IO + + munix=93 +diff --git a/src/gcc/config/pa/pa64-hpux.opt b/src/gcc/config/pa/pa64-hpux.opt +index 36b1c61..56ca35e 100644 +--- a/src/gcc/config/pa/pa64-hpux.opt ++++ b/src/gcc/config/pa/pa64-hpux.opt +@@ -19,7 +19,7 @@ + ; . + + mgnu-ld +-Target RejectNegative Mask(GNU_LD) MaskExists ++Target RejectNegative Mask(GNU_LD) + Assume code will be linked by GNU ld + + mhp-ld +diff --git a/src/gcc/config/picochip/picochip.opt b/src/gcc/config/picochip/picochip.opt +index 4726f49..a4b25e5 100644 +--- a/src/gcc/config/picochip/picochip.opt ++++ b/src/gcc/config/picochip/picochip.opt +@@ -43,4 +43,4 @@ Target Mask(INEFFICIENT_WARNINGS) + Generate warnings when inefficient code is known to be generated. + + minefficient +-Target Mask(INEFFICIENT_WARNINGS) MaskExists Undocumented ++Target Mask(INEFFICIENT_WARNINGS) Undocumented +diff --git a/src/gcc/config/rs6000/sysv4.opt b/src/gcc/config/rs6000/sysv4.opt +index 0d8d955..474203d 100644 +--- a/src/gcc/config/rs6000/sysv4.opt ++++ b/src/gcc/config/rs6000/sysv4.opt +@@ -66,7 +66,7 @@ Target Report RejectNegative Mask(LITTLE_ENDIAN) + Produce little endian code + + mlittle +-Target Report RejectNegative Mask(LITTLE_ENDIAN) MaskExists ++Target Report RejectNegative Mask(LITTLE_ENDIAN) + Produce little endian code + + mbig-endian +diff --git a/src/gcc/config/sh/sh.opt b/src/gcc/config/sh/sh.opt +index bf3f64d..68c78c6 100644 +--- a/src/gcc/config/sh/sh.opt ++++ b/src/gcc/config/sh/sh.opt +@@ -316,7 +316,7 @@ Target Report RejectNegative Mask(RELAX) + Shorten address references during linking + + mrenesas +-Target Mask(HITACHI) MaskExists ++Target Mask(HITACHI) + Follow Renesas (formerly Hitachi) / SuperH calling conventions + + msoft-atomic +diff --git a/src/gcc/config/sparc/long-double-switch.opt b/src/gcc/config/sparc/long-double-switch.opt +index eb3c1a0..8ad32bd 100644 +--- a/src/gcc/config/sparc/long-double-switch.opt ++++ b/src/gcc/config/sparc/long-double-switch.opt +@@ -19,7 +19,7 @@ + ; . + + mlong-double-128 +-Target Report RejectNegative Mask(LONG_DOUBLE_128) MaskExists ++Target Report RejectNegative Mask(LONG_DOUBLE_128) + Use 128-bit long double + + mlong-double-64 +diff --git a/src/gcc/config/sparc/sparc.opt b/src/gcc/config/sparc/sparc.opt +index 01f3d43..58ba6b7 100644 +--- a/src/gcc/config/sparc/sparc.opt ++++ b/src/gcc/config/sparc/sparc.opt +@@ -30,7 +30,7 @@ Target Report Mask(FPU) + Use hardware FP + + mhard-float +-Target RejectNegative Mask(FPU) MaskExists ++Target RejectNegative Mask(FPU) + Use hardware FP + + msoft-float +diff --git a/src/gcc/config/v850/v850.opt b/src/gcc/config/v850/v850.opt +index 12b0937..8fe244b 100644 +--- a/src/gcc/config/v850/v850.opt ++++ b/src/gcc/config/v850/v850.opt +@@ -102,7 +102,7 @@ Target RejectNegative Mask(V850E1) + Compile for the v850e1 processor + + mv850es +-Target RejectNegative Mask(V850E1) MaskExists ++Target RejectNegative Mask(V850E1) + Compile for the v850es variant of the v850e1 + + mv850e2 +diff --git a/src/gcc/config/vax/vax.opt b/src/gcc/config/vax/vax.opt +index 82d6dee..83527ad 100644 +--- a/src/gcc/config/vax/vax.opt ++++ b/src/gcc/config/vax/vax.opt +@@ -31,7 +31,7 @@ Target RejectNegative Mask(G_FLOAT) + Generate GFLOAT double precision code + + mg-float +-Target RejectNegative Mask(G_FLOAT) MaskExists ++Target RejectNegative Mask(G_FLOAT) + Generate GFLOAT double precision code + + mgnu +diff --git a/src/gcc/configure b/src/gcc/configure +index a1f874b..8c8db53 100755 +--- a/src/gcc/configure ++++ b/src/gcc/configure +@@ -13796,7 +13796,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +diff --git a/src/gcc/dwarf2out.c b/src/gcc/dwarf2out.c +index 06c6c9d..78d9871 100644 +--- a/src/gcc/dwarf2out.c ++++ b/src/gcc/dwarf2out.c +@@ -10183,7 +10183,9 @@ dbx_reg_number (const_rtx rtl) + } + #endif + +- return DBX_REGISTER_NUMBER (regno); ++ regno = DBX_REGISTER_NUMBER (regno); ++ gcc_assert (regno != INVALID_REGNUM); ++ return regno; + } + + /* Optionally add a DW_OP_piece term to a location description expression. +@@ -11671,6 +11673,8 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, + case REG: + if (GET_MODE_CLASS (mode) != MODE_INT + || (GET_MODE_SIZE (mode) > DWARF2_ADDR_SIZE ++ && rtl != arg_pointer_rtx ++ && rtl != frame_pointer_rtx + #ifdef POINTERS_EXTEND_UNSIGNED + && (mode != Pmode || mem_mode == VOIDmode) + #endif +@@ -11943,7 +11947,9 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, + case PLUS: + plus: + if (is_based_loc (rtl) +- && GET_MODE_SIZE (mode) <= DWARF2_ADDR_SIZE ++ && (GET_MODE_SIZE (mode) <= DWARF2_ADDR_SIZE ++ || XEXP (rtl, 0) == arg_pointer_rtx ++ || XEXP (rtl, 0) == frame_pointer_rtx) + && GET_MODE_CLASS (mode) == MODE_INT) + mem_loc_result = based_loc_descr (XEXP (rtl, 0), + INTVAL (XEXP (rtl, 1)), +diff --git a/src/gcc/emit-rtl.c b/src/gcc/emit-rtl.c +index a95c146..8a7ef4a 100644 +--- a/src/gcc/emit-rtl.c ++++ b/src/gcc/emit-rtl.c +@@ -964,6 +964,22 @@ void + set_reg_attrs_from_value (rtx reg, rtx x) + { + int offset; ++ bool can_be_reg_pointer = true; ++ ++ /* Don't call mark_reg_pointer for incompatible pointer sign ++ extension. */ ++ while (GET_CODE (x) == SIGN_EXTEND ++ || GET_CODE (x) == ZERO_EXTEND ++ || GET_CODE (x) == TRUNCATE ++ || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x))) ++ { ++#if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend) ++ if ((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED) ++ || (GET_CODE (x) != SIGN_EXTEND && ! POINTERS_EXTEND_UNSIGNED)) ++ can_be_reg_pointer = false; ++#endif ++ x = XEXP (x, 0); ++ } + + /* Hard registers can be reused for multiple purposes within the same + function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN +@@ -977,14 +993,14 @@ set_reg_attrs_from_value (rtx reg, rtx x) + if (MEM_OFFSET_KNOWN_P (x)) + REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x), + MEM_OFFSET (x) + offset); +- if (MEM_POINTER (x)) ++ if (can_be_reg_pointer && MEM_POINTER (x)) + mark_reg_pointer (reg, 0); + } + else if (REG_P (x)) + { + if (REG_ATTRS (x)) + update_reg_offset (reg, x, offset); +- if (REG_POINTER (x)) ++ if (can_be_reg_pointer && REG_POINTER (x)) + mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x))); + } + } +diff --git a/src/gcc/opth-gen.awk b/src/gcc/opth-gen.awk +index 541bc3e..9a7b6c3 100644 +--- a/src/gcc/opth-gen.awk ++++ b/src/gcc/opth-gen.awk +@@ -298,16 +298,25 @@ print ""; + + for (i = 0; i < n_opts; i++) { + name = opt_args("Mask", flags[i]) +- vname = var_name(flags[i]) +- mask = "MASK_" +- mask_1 = "1" +- if (vname != "") { +- mask = "OPTION_MASK_" +- if (host_wide_int[vname] == "yes") +- mask_1 = "HOST_WIDE_INT_1" ++ if (name == "") { ++ opt = opt_args("InverseMask", flags[i]) ++ if (opt ~ ",") ++ name = nth_arg(0, opt) ++ else ++ name = opt + } +- if (name != "" && !flag_set_p("MaskExists", flags[i])) ++ if (name != "" && mask_bits[name] == 0) { ++ mask_bits[name] = 1 ++ vname = var_name(flags[i]) ++ mask = "MASK_" ++ mask_1 = "1" ++ if (vname != "") { ++ mask = "OPTION_MASK_" ++ if (host_wide_int[vname] == "yes") ++ mask_1 = "HOST_WIDE_INT_1" ++ } + print "#define " mask name " (" mask_1 " << " masknum[vname]++ ")" ++ } + } + for (i = 0; i < n_extra_masks; i++) { + print "#define MASK_" extra_masks[i] " (1 << " masknum[""]++ ")" +@@ -330,17 +339,26 @@ print "" + + for (i = 0; i < n_opts; i++) { + name = opt_args("Mask", flags[i]) +- vname = var_name(flags[i]) +- macro = "OPTION_" +- mask = "OPTION_MASK_" +- if (vname == "") { +- vname = "target_flags" +- macro = "TARGET_" +- mask = "MASK_" ++ if (name == "") { ++ opt = opt_args("InverseMask", flags[i]) ++ if (opt ~ ",") ++ name = nth_arg(0, opt) ++ else ++ name = opt + } +- if (name != "" && !flag_set_p("MaskExists", flags[i])) ++ if (name != "" && mask_macros[name] == 0) { ++ mask_macros[name] = 1 ++ vname = var_name(flags[i]) ++ macro = "OPTION_" ++ mask = "OPTION_MASK_" ++ if (vname == "") { ++ vname = "target_flags" ++ macro = "TARGET_" ++ mask = "MASK_" ++ } + print "#define " macro name \ + " ((" vname " & " mask name ") != 0)" ++ } + } + for (i = 0; i < n_extra_masks; i++) { + print "#define TARGET_" extra_masks[i] \ +diff --git a/src/gcc/reginfo.c b/src/gcc/reginfo.c +index 6353126..f3a08f5 100644 +--- a/src/gcc/reginfo.c ++++ b/src/gcc/reginfo.c +@@ -1222,17 +1222,7 @@ reg_scan_mark_refs (rtx x, rtx insn) + /* If this is setting a register from a register or from a simple + conversion of a register, propagate REG_EXPR. */ + if (REG_P (dest) && !REG_ATTRS (dest)) +- { +- rtx src = SET_SRC (x); +- +- while (GET_CODE (src) == SIGN_EXTEND +- || GET_CODE (src) == ZERO_EXTEND +- || GET_CODE (src) == TRUNCATE +- || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src))) +- src = XEXP (src, 0); +- +- set_reg_attrs_from_value (dest, src); +- } ++ set_reg_attrs_from_value (dest, SET_SRC (x)); + + /* ... fall through ... */ + +diff --git a/src/gcc/testsuite/ChangeLog.x32 b/src/gcc/testsuite/ChangeLog.x32 +new file mode 100644 +index 0000000..acae4a8 +--- /dev/null ++++ b/src/gcc/testsuite/ChangeLog.x32 +@@ -0,0 +1,34 @@ ++2012-08-24 H.J. Lu ++ ++ PR debug/52857 ++ * gcc.target/i386/pr52857-1.c: New. ++ * gcc.target/i386/pr52857-2.c: Likewise. ++ ++2012-08-10 H.J. Lu ++ ++ * gcc.target/i386/pr54157.c (dg-options): Add -maddress-mode=long. ++ ++2012-04-11 H.J. Lu ++ ++ PR rtl-optimization/52876 ++ * gcc.target/i386/pr52876.c: New. ++ ++2012-04-09 Uros Bizjak ++ ++ PR target/52883 ++ * gcc.target/i386/pr52883.c: New testcase. ++ ++2012-04-05 Uros Bizjak ++ ++ PR target/52882 ++ * gcc.target/i386/pr52882.c: New test. ++ ++2012-03-11 Uros Bizjak ++ ++ PR target/52530 ++ * gcc.dg/torture/pr52530.c: New test. ++ ++2012-03-04 H.J. Lu ++ ++ PR target/52146 ++ * gcc.target/i386/pr52146.c: Update final-scan to allow $-18874240. +diff --git a/src/gcc/testsuite/gcc.dg/torture/pr52530.c b/src/gcc/testsuite/gcc.dg/torture/pr52530.c +new file mode 100644 +index 0000000..d32ea82 +--- /dev/null ++++ b/src/gcc/testsuite/gcc.dg/torture/pr52530.c +@@ -0,0 +1,30 @@ ++/* { dg-do run } */ ++ ++extern void abort (void); ++ ++struct foo ++{ ++ int *f; ++ int i; ++}; ++ ++int baz; ++ ++void __attribute__ ((noinline)) ++bar (struct foo x) ++{ ++ *(x.f) = x.i; ++} ++ ++int ++main () ++{ ++ struct foo x = { &baz, 0xdeadbeef }; ++ ++ bar (x); ++ ++ if (baz != 0xdeadbeef) ++ abort (); ++ ++ return 0; ++} +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52146.c b/src/gcc/testsuite/gcc.target/i386/pr52146.c +index a4804e6..4eb91c0 100644 +--- a/src/gcc/testsuite/gcc.target/i386/pr52146.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr52146.c +@@ -15,4 +15,4 @@ test2 (void) + *apic_tpr_addr = 0; + } + +-/* { dg-final { scan-assembler-not "-18874240" } } */ ++/* { dg-final { scan-assembler-not "\[,\\t \]+-18874240" } } */ +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52857-1.c b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c +new file mode 100644 +index 0000000..16fd78f +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile { target { ! { ia32 } } } } */ ++/* { dg-options "-g -O -mx32 -maddress-mode=long" } */ ++ ++extern void get_BID128 (int *); ++void ++__bid128_div (void) ++{ ++ int res; ++ get_BID128 (&res); ++} +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52857-2.c b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c +new file mode 100644 +index 0000000..879240a +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c +@@ -0,0 +1,8 @@ ++/* { dg-do compile { target { ! { ia32 } } } } */ ++/* { dg-options "-g -O -mx32 -maddress-mode=long" } */ ++ ++void uw_init_context_1 (void *); ++void _Unwind_ForcedUnwind (void) ++{ ++ uw_init_context_1 (__builtin_dwarf_cfa ()); ++} +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52876.c b/src/gcc/testsuite/gcc.target/i386/pr52876.c +new file mode 100644 +index 0000000..6d5e47a +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52876.c +@@ -0,0 +1,25 @@ ++/* { dg-do run { target { x32 } } } */ ++/* { dg-options "-O2 -mx32 -maddress-mode=long" } */ ++ ++extern void abort (void); ++ ++long long li; ++ ++long long ++__attribute__ ((noinline)) ++testfunc (void* addr) ++{ ++ li = (long long)(int)addr; ++ li &= 0xffffffff; ++ return li; ++} ++ ++int main (void) ++{ ++ volatile long long rv_test; ++ rv_test = testfunc((void*)0x87651234); ++ if (rv_test != 0x87651234ULL) ++ abort (); ++ ++ return 0; ++} +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52882.c b/src/gcc/testsuite/gcc.target/i386/pr52882.c +new file mode 100644 +index 0000000..5f0f12a +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52882.c +@@ -0,0 +1,19 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O" } */ ++ ++struct S1 { ++ int f0; ++ int f1; ++}; ++ ++int fn1 (); ++void fn2 (struct S1); ++ ++void ++fn3 () { ++ struct S1 a = { 1, 0 }; ++ if (fn1 ()) ++ fn2 (a); ++ for (; a.f1;) { ++ } ++} +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52883.c b/src/gcc/testsuite/gcc.target/i386/pr52883.c +new file mode 100644 +index 0000000..766e87e +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52883.c +@@ -0,0 +1,25 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O" } */ ++ ++int a, b, d, e, f, i, j, k, l, m; ++unsigned c; ++int g[] = { }, h[0]; ++ ++int ++fn1 () { ++ return 0; ++} ++ ++void ++fn2 () { ++ c = 0; ++ e = 0; ++ for (;; e = 0) ++ if (f > j) { ++ k = fn1 (); ++ l = (d || k) * b; ++ m = l * a; ++ h[0] = m <= i; ++ } else ++ i = g[c]; ++} +diff --git a/src/gcc/testsuite/gcc.target/i386/pr54157.c b/src/gcc/testsuite/gcc.target/i386/pr54157.c +index 59fcd79..b5c4528 100644 +--- a/src/gcc/testsuite/gcc.target/i386/pr54157.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr54157.c +@@ -1,5 +1,5 @@ + /* { dg-do compile { target { ! { ia32 } } } } */ +-/* { dg-options "-O2 -mx32 -ftree-vectorize" } */ ++/* { dg-options "-O2 -mx32 -maddress-mode=long -ftree-vectorize" } */ + + struct s2{ + int n[24 -1][24 -1][24 -1]; +diff --git a/src/libffi/ChangeLog.x32 b/src/libffi/ChangeLog.x32 +new file mode 100644 +index 0000000..2cbed64 +--- /dev/null ++++ b/src/libffi/ChangeLog.x32 +@@ -0,0 +1,27 @@ ++2012-07-18 H.J. Lu ++ ++ Backported from mainline ++ 2012-07-18 H.J. Lu ++ ++ * src/x86/ffitarget.h: Check __ILP32__ instead of __LP64__ for ++ x32. ++ (FFI_SIZEOF_JAVA_RAW): Defined to 4 for x32. ++ ++2012-05-17 H.J. Lu ++ ++ Backported from mainline ++ 2012-03-03 H.J. Lu ++ ++ * src/x86/ffi64.c (ffi_call): Cast the return value to unsigned ++ long. ++ (ffi_prep_closure_loc): Cast to 64bit address in trampoline. ++ (ffi_closure_unix64_inner): Cast return pointer to unsigned long ++ first. ++ ++ * src/x86/ffitarget.h (FFI_SIZEOF_ARG): Defined to 8 for x32. ++ (ffi_arg): Set to unsigned long long for x32. ++ (ffi_sarg): Set to long long for x32. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libffi/configure b/src/libffi/configure +index 1591495..28ed513 100755 +--- a/src/libffi/configure ++++ b/src/libffi/configure +@@ -6282,7 +6282,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10766,7 +10773,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10769 "configure" ++#line 10776 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10872,7 +10879,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10875 "configure" ++#line 10882 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libffi/src/x86/ffi64.c b/src/libffi/src/x86/ffi64.c +index bd907d7..41c4e77 100644 +--- a/src/libffi/src/x86/ffi64.c ++++ b/src/libffi/src/x86/ffi64.c +@@ -426,7 +426,7 @@ ffi_call (ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue) + /* If the return value is passed in memory, add the pointer as the + first integer argument. */ + if (ret_in_memory) +- reg_args->gpr[gprcount++] = (long) rvalue; ++ reg_args->gpr[gprcount++] = (unsigned long) rvalue; + + avn = cif->nargs; + arg_types = cif->arg_types; +@@ -501,9 +501,11 @@ ffi_prep_closure_loc (ffi_closure* closure, + tramp = (volatile unsigned short *) &closure->tramp[0]; + + tramp[0] = 0xbb49; /* mov , %r11 */ +- *(void * volatile *) &tramp[1] = ffi_closure_unix64; ++ *((unsigned long long * volatile) &tramp[1]) ++ = (unsigned long) ffi_closure_unix64; + tramp[5] = 0xba49; /* mov , %r10 */ +- *(void * volatile *) &tramp[6] = codeloc; ++ *((unsigned long long * volatile) &tramp[6]) ++ = (unsigned long) codeloc; + + /* Set the carry bit iff the function uses any sse registers. + This is clc or stc, together with the first byte of the jmp. */ +@@ -542,7 +544,7 @@ ffi_closure_unix64_inner(ffi_closure *closure, void *rvalue, + { + /* The return value goes in memory. Arrange for the closure + return value to go directly back to the original caller. */ +- rvalue = (void *) reg_args->gpr[gprcount++]; ++ rvalue = (void *) (unsigned long) reg_args->gpr[gprcount++]; + /* We don't have to do anything in asm for the return. */ + ret = FFI_TYPE_VOID; + } +diff --git a/src/libffi/src/x86/ffitarget.h b/src/libffi/src/x86/ffitarget.h +index dfecd1b..f9548c6 100644 +--- a/src/libffi/src/x86/ffitarget.h ++++ b/src/libffi/src/x86/ffitarget.h +@@ -53,9 +53,16 @@ typedef unsigned long long ffi_arg; + typedef long long ffi_sarg; + #endif + #else ++#if defined __x86_64__ && defined __ILP32__ ++#define FFI_SIZEOF_ARG 8 ++#define FFI_SIZEOF_JAVA_RAW 4 ++typedef unsigned long long ffi_arg; ++typedef long long ffi_sarg; ++#else + typedef unsigned long ffi_arg; + typedef signed long ffi_sarg; + #endif ++#endif + + typedef enum ffi_abi { + FFI_FIRST_ABI = 0, +diff --git a/src/libgcc/ChangeLog.x32 b/src/libgcc/ChangeLog.x32 +new file mode 100644 +index 0000000..e97e4b4 +--- /dev/null ++++ b/src/libgcc/ChangeLog.x32 +@@ -0,0 +1,4 @@ ++2012-03-13 H.J. Lu ++ ++ * unwind-dw2.c (_Unwind_SetGRValue): Assert DWARF register size ++ <= saved reg size. +diff --git a/src/libgcc/unwind-dw2.c b/src/libgcc/unwind-dw2.c +index 475ad00..d1c62ee 100644 +--- a/src/libgcc/unwind-dw2.c ++++ b/src/libgcc/unwind-dw2.c +@@ -294,7 +294,8 @@ _Unwind_SetGRValue (struct _Unwind_Context *context, int index, + { + index = DWARF_REG_TO_UNWIND_COLUMN (index); + gcc_assert (index < (int) sizeof(dwarf_reg_size_table)); +- gcc_assert (dwarf_reg_size_table[index] == sizeof (_Unwind_Context_Reg_Val)); ++ /* Return column size may be smaller than _Unwind_Context_Reg_Val. */ ++ gcc_assert (dwarf_reg_size_table[index] <= sizeof (_Unwind_Context_Reg_Val)); + + context->by_value[index] = 1; + context->reg[index] = _Unwind_Get_Unwind_Context_Reg_Val (val); +diff --git a/src/libgfortran/ChangeLog.x32 b/src/libgfortran/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/libgfortran/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libgfortran/configure b/src/libgfortran/configure +index 227f556..bd8e10b 100755 +--- a/src/libgfortran/configure ++++ b/src/libgfortran/configure +@@ -8071,7 +8071,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -12318,7 +12325,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 12321 "configure" ++#line 12328 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -12424,7 +12431,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 12427 "configure" ++#line 12434 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libgomp/ChangeLog.x32 b/src/libgomp/ChangeLog.x32 +new file mode 100644 +index 0000000..36444bb +--- /dev/null ++++ b/src/libgomp/ChangeLog.x32 +@@ -0,0 +1,8 @@ ++2012-03-31 H.J. Lu ++ ++ PR bootstrap/52812 ++ * configure.tgt (i[456]86-*-linux*): Handle -mx32 like -m64. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libgomp/configure b/src/libgomp/configure +index 8ed841a..418c471 100755 +--- a/src/libgomp/configure ++++ b/src/libgomp/configure +@@ -6596,7 +6596,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11080,7 +11087,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11083 "configure" ++#line 11090 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11186,7 +11193,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11189 "configure" ++#line 11196 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libgomp/configure.tgt b/src/libgomp/configure.tgt +index 210dd5d..853e3fa 100644 +--- a/src/libgomp/configure.tgt ++++ b/src/libgomp/configure.tgt +@@ -59,7 +59,7 @@ if test $enable_linux_futex = yes; then + i[456]86-*-linux*) + config_path="linux/x86 linux posix" + case " ${CC} ${CFLAGS} " in +- *" -m64 "*) ++ *" -m64 "*|*" -mx32 "*) + ;; + *) + if test -z "$with_arch"; then +diff --git a/src/libitm/ChangeLog.x32 b/src/libitm/ChangeLog.x32 +new file mode 100644 +index 0000000..36444bb +--- /dev/null ++++ b/src/libitm/ChangeLog.x32 +@@ -0,0 +1,8 @@ ++2012-03-31 H.J. Lu ++ ++ PR bootstrap/52812 ++ * configure.tgt (i[456]86-*-linux*): Handle -mx32 like -m64. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libitm/configure b/src/libitm/configure +index 30d2f73..9f89ebc 100644 +--- a/src/libitm/configure ++++ b/src/libitm/configure +@@ -7286,7 +7286,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11771,7 +11778,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11774 "configure" ++#line 11781 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11877,7 +11884,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11880 "configure" ++#line 11887 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libitm/configure.tgt b/src/libitm/configure.tgt +index b68c86b..333bdff 100644 +--- a/src/libitm/configure.tgt ++++ b/src/libitm/configure.tgt +@@ -53,7 +53,7 @@ case "${target_cpu}" in + + i[3456]86) + case " ${CC} ${CFLAGS} " in +- *" -m64 "*) ++ *" -m64 "*|*" -mx32 "*) + ;; + *) + if test -z "$with_arch"; then +diff --git a/src/libjava/ChangeLog.x32 b/src/libjava/ChangeLog.x32 +new file mode 100644 +index 0000000..43e8f70 +--- /dev/null ++++ b/src/libjava/ChangeLog.x32 +@@ -0,0 +1,12 @@ ++2012-07-18 H.J. Lu ++ ++ Backported from mainline ++ 2012-07-18 H.J. Lu ++ ++ PR libjava/53973 ++ * include/x86_64-signal.h (HANDLE_DIVIDE_OVERFLOW): Skip 67h ++ address size prefix. Use ULL suffix for 64-bit integer. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libjava/classpath/ChangeLog.x32 b/src/libjava/classpath/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/libjava/classpath/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libjava/classpath/configure b/src/libjava/classpath/configure +index a25f5f7..b6692b6 100755 +--- a/src/libjava/classpath/configure ++++ b/src/libjava/classpath/configure +@@ -7592,7 +7592,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11811,7 +11818,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11814 "configure" ++#line 11821 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11917,7 +11924,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11920 "configure" ++#line 11927 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -23814,7 +23821,7 @@ else + JAVA_TEST=Object.java + CLASS_TEST=Object.class + cat << \EOF > $JAVA_TEST +-/* #line 23817 "configure" */ ++/* #line 23824 "configure" */ + package java.lang; + + public class Object +@@ -23907,7 +23914,7 @@ EOF + if uudecode$EXEEXT Test.uue; then + ac_cv_prog_uudecode_base64=yes + else +- echo "configure: 23910: uudecode had trouble decoding base 64 file 'Test.uue'" >&5 ++ echo "configure: 23917: uudecode had trouble decoding base 64 file 'Test.uue'" >&5 + echo "configure: failed file was:" >&5 + cat Test.uue >&5 + ac_cv_prog_uudecode_base64=no +@@ -23935,7 +23942,7 @@ JAVA_TEST=Test.java + CLASS_TEST=Test.class + TEST=Test + cat << \EOF > $JAVA_TEST +-/* [#]line 23938 "configure" */ ++/* [#]line 23945 "configure" */ + public class Test { + public static void main (String args[]) { + System.exit (0); +@@ -24143,7 +24150,7 @@ if test "x${use_glibj_zip}" = xfalse || \ + JAVA_TEST=Test.java + CLASS_TEST=Test.class + cat << \EOF > $JAVA_TEST +- /* #line 24146 "configure" */ ++ /* #line 24153 "configure" */ + public class Test + { + public static void main(String args) +diff --git a/src/libjava/configure b/src/libjava/configure +index b0b45bb..cbc3ed7 100755 +--- a/src/libjava/configure ++++ b/src/libjava/configure +@@ -8843,7 +8843,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -13359,7 +13366,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 13362 "configure" ++#line 13369 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -13465,7 +13472,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 13468 "configure" ++#line 13475 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -19458,7 +19465,7 @@ if test "${enable_sjlj_exceptions+set}" = set; then : + enableval=$enable_sjlj_exceptions; : + else + cat > conftest.$ac_ext << EOF +-#line 19461 "configure" ++#line 19468 "configure" + struct S { ~S(); }; + void bar(); + void foo() +diff --git a/src/libjava/include/x86_64-signal.h b/src/libjava/include/x86_64-signal.h +index 4bd8a36..d03b914 100644 +--- a/src/libjava/include/x86_64-signal.h ++++ b/src/libjava/include/x86_64-signal.h +@@ -47,6 +47,10 @@ do \ + \ + bool _is_64_bit = false; \ + \ ++ /* Skip 67h address size prefix. */ \ ++ if (_rip[0] == 0x67) \ ++ _rip++; \ ++ \ + if ((_rip[0] & 0xf0) == 0x40) /* REX byte present. */ \ + { \ + unsigned char _rex = _rip[0] & 0x0f; \ +@@ -64,10 +68,10 @@ do \ + { \ + if (_is_64_bit) \ + _min_value_dividend = \ +- _gregs[REG_RAX] == (greg_t)0x8000000000000000UL; \ ++ _gregs[REG_RAX] == (greg_t)0x8000000000000000ULL; \ + else \ + _min_value_dividend = \ +- (_gregs[REG_RAX] & 0xffffffff) == (greg_t)0x80000000UL; \ ++ (_gregs[REG_RAX] & 0xffffffff) == (greg_t)0x80000000ULL; \ + } \ + \ + if (_min_value_dividend) \ +diff --git a/src/libmudflap/ChangeLog.x32 b/src/libmudflap/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/libmudflap/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libmudflap/configure b/src/libmudflap/configure +index f1c74a1..1a76202 100755 +--- a/src/libmudflap/configure ++++ b/src/libmudflap/configure +@@ -6393,7 +6393,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10607,7 +10614,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10610 "configure" ++#line 10617 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10713,7 +10720,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10716 "configure" ++#line 10723 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libobjc/ChangeLog.x32 b/src/libobjc/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/libobjc/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libobjc/configure b/src/libobjc/configure +index 8c07356..376f25e 100755 +--- a/src/libobjc/configure ++++ b/src/libobjc/configure +@@ -6079,7 +6079,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +diff --git a/src/libquadmath/ChangeLog.x32 b/src/libquadmath/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/libquadmath/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libquadmath/configure b/src/libquadmath/configure +index 82065c7..8beb1a6 100755 +--- a/src/libquadmath/configure ++++ b/src/libquadmath/configure +@@ -6264,7 +6264,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10513,7 +10520,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10516 "configure" ++#line 10523 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10619,7 +10626,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10622 "configure" ++#line 10629 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libssp/ChangeLog.x32 b/src/libssp/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/libssp/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libssp/configure b/src/libssp/configure +index 78abc70..84b3712 100755 +--- a/src/libssp/configure ++++ b/src/libssp/configure +@@ -6401,7 +6401,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10650,7 +10657,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10653 "configure" ++#line 10660 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10756,7 +10763,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10759 "configure" ++#line 10766 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libstdc++-v3/ChangeLog.x32 b/src/libstdc++-v3/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/libstdc++-v3/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/libstdc++-v3/configure b/src/libstdc++-v3/configure +index f5aefe2..47ab8a1 100755 +--- a/src/libstdc++-v3/configure ++++ b/src/libstdc++-v3/configure +@@ -7119,7 +7119,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11497,7 +11504,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11500 "configure" ++#line 11507 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11603,7 +11610,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11606 "configure" ++#line 11613 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -14961,7 +14968,7 @@ fi + # + # Fake what AC_TRY_COMPILE does. XXX Look at redoing this new-style. + cat > conftest.$ac_ext << EOF +-#line 14964 "configure" ++#line 14971 "configure" + struct S { ~S(); }; + void bar(); + void foo() +@@ -15296,7 +15303,7 @@ $as_echo "$glibcxx_cv_atomic_long_long" >&6; } + # Fake what AC_TRY_COMPILE does. + + cat > conftest.$ac_ext << EOF +-#line 15299 "configure" ++#line 15306 "configure" + int main() + { + typedef bool atomic_type; +@@ -15331,7 +15338,7 @@ $as_echo "$glibcxx_cv_atomic_bool" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15334 "configure" ++#line 15341 "configure" + int main() + { + typedef short atomic_type; +@@ -15366,7 +15373,7 @@ $as_echo "$glibcxx_cv_atomic_short" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15369 "configure" ++#line 15376 "configure" + int main() + { + // NB: _Atomic_word not necessarily int. +@@ -15402,7 +15409,7 @@ $as_echo "$glibcxx_cv_atomic_int" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15405 "configure" ++#line 15412 "configure" + int main() + { + typedef long long atomic_type; +@@ -15481,7 +15488,7 @@ $as_echo "$as_me: WARNING: Performance of certain classes will degrade as a resu + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15484 "configure" ++#line 15491 "configure" + int main() + { + _Decimal32 d1; +@@ -15523,7 +15530,7 @@ ac_compiler_gnu=$ac_cv_cxx_compiler_gnu + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15526 "configure" ++#line 15533 "configure" + template + struct same + { typedef T2 type; }; +@@ -15557,7 +15564,7 @@ $as_echo "$enable_int128" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15560 "configure" ++#line 15567 "configure" + template + struct same + { typedef T2 type; }; +diff --git a/src/libtool.m4 b/src/libtool.m4 +index 67321a7..a7f99ac 100644 +--- a/src/libtool.m4 ++++ b/src/libtool.m4 +@@ -1232,7 +1232,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +diff --git a/src/lto-plugin/ChangeLog.x32 b/src/lto-plugin/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/lto-plugin/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/lto-plugin/configure b/src/lto-plugin/configure +index 7f1ade1..bd7e75e 100755 +--- a/src/lto-plugin/configure ++++ b/src/lto-plugin/configure +@@ -6060,7 +6060,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10544,7 +10551,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10547 "configure" ++#line 10554 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10650,7 +10657,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10653 "configure" ++#line 10660 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/zlib/ChangeLog.x32 b/src/zlib/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb +--- /dev/null ++++ b/src/zlib/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +diff --git a/src/zlib/configure b/src/zlib/configure +index f7fe2b7..478bef3 100755 +--- a/src/zlib/configure ++++ b/src/zlib/configure +@@ -5869,7 +5869,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10386,7 +10393,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10389 "configure" ++#line 10396 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10492,7 +10499,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10495 "configure" ++#line 10502 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H --- gcc-4.7-4.7.2.orig/debian/patches/note-gnu-stack.diff +++ gcc-4.7-4.7.2/debian/patches/note-gnu-stack.diff @@ -0,0 +1,109 @@ +# DP: Add .note.GNU-stack sections for gcc's crt files, libffi and boehm-gc +# DP: Taken from FC. + +gcc/ + +2004-09-20 Jakub Jelinek + + * config/rs6000/ppc-asm.h: Add .note.GNU-stack section also + on ppc64-linux. + + * config/ia64/lib1funcs.asm: Add .note.GNU-stack section on + ia64-linux. + * config/ia64/crtbegin.asm: Likewise. + * config/ia64/crtend.asm: Likewise. + * config/ia64/crti.asm: Likewise. + * config/ia64/crtn.asm: Likewise. + +2004-05-14 Jakub Jelinek + + * config/ia64/linux.h (TARGET_ASM_FILE_END): Define. + +boehm-gc/ + +2005-02-08 Jakub Jelinek + + * ia64_save_regs_in_stack.s: Moved to... + * ia64_save_regs_in_stack.S: ... this. Add .note.GNU-stack + on Linux. + +libffi/ + +2007-05-11 Daniel Jacobowitz + + * src/arm/sysv.S: Fix ARM comment marker. + +2005-02-08 Jakub Jelinek + + * src/alpha/osf.S: Add .note.GNU-stack on Linux. + * src/s390/sysv.S: Likewise. + * src/powerpc/linux64.S: Likewise. + * src/powerpc/linux64_closure.S: Likewise. + * src/powerpc/ppc_closure.S: Likewise. + * src/powerpc/sysv.S: Likewise. + * src/x86/unix64.S: Likewise. + * src/x86/sysv.S: Likewise. + * src/sparc/v8.S: Likewise. + * src/sparc/v9.S: Likewise. + * src/m68k/sysv.S: Likewise. + * src/ia64/unix.S: Likewise. + * src/arm/sysv.S: Likewise. + +--- + boehm-gc/ia64_save_regs_in_stack.s | 12 ------------ + gcc/config/ia64/crtbegin.asm | 4 ++++ + gcc/config/ia64/crtend.asm | 4 ++++ + gcc/config/ia64/crti.asm | 4 ++++ + gcc/config/ia64/crtn.asm | 4 ++++ + gcc/config/ia64/lib1funcs.asm | 4 ++++ + gcc/config/ia64/linux.h | 2 ++ + gcc/config/rs6000/ppc-asm.h | 2 +- + libffi/src/ia64/unix.S | 4 ++++ + libffi/src/powerpc/linux64.S | 4 ++++ + libffi/src/powerpc/linux64_closure.S | 4 ++++ + 11 files changed, 35 insertions(+), 13 deletions(-) + +--- a/src/boehm-gc/ia64_save_regs_in_stack.s ++++ /dev/null +@@ -1,12 +0,0 @@ +- .text +- .align 16 +- .global GC_save_regs_in_stack +- .proc GC_save_regs_in_stack +-GC_save_regs_in_stack: +- .body +- flushrs +- ;; +- mov r8=ar.bsp +- br.ret.sptk.few rp +- .endp GC_save_regs_in_stack +- +--- /dev/null ++++ b/src/boehm-gc/ia64_save_regs_in_stack.S +@@ -0,0 +1,15 @@ ++ .text ++ .align 16 ++ .global GC_save_regs_in_stack ++ .proc GC_save_regs_in_stack ++GC_save_regs_in_stack: ++ .body ++ flushrs ++ ;; ++ mov r8=ar.bsp ++ br.ret.sptk.few rp ++ .endp GC_save_regs_in_stack ++ ++#ifdef __linux__ ++ .section .note.GNU-stack,"",@progbits ++#endif +--- a/src/gcc/config/rs6000/ppc-asm.h ++++ b/src/gcc/config/rs6000/ppc-asm.h +@@ -352,7 +352,7 @@ + #endif + #endif + +-#if defined __linux__ && !defined __powerpc64__ ++#if defined __linux__ + .section .note.GNU-stack + .previous + #endif --- gcc-4.7-4.7.2.orig/debian/patches/libstdc++-doclink.diff +++ gcc-4.7-4.7.2/debian/patches/libstdc++-doclink.diff @@ -0,0 +1,57 @@ +# DP: adjust hrefs to point to the local documentation + +--- + libstdc++-v3/doc/doxygen/mainpage.html | 10 +++++----- + 1 files changed, 5 insertions(+), 5 deletions(-) + +--- a/src/libstdc++-v3/doc/doxygen/mainpage.html ++++ b/src/libstdc++-v3/doc/doxygen/mainpage.html +@@ -29,8 +29,8 @@ +

There are two types of documentation for libstdc++. One is the + distribution documentation, which can be read online + here +- or offline from the file doc/html/index.html in the library source +- directory. ++ or offline in the documentation directory ++ here. +

+ +

The other type is the source documentation, of which this is the first page. +@@ -81,9 +81,9 @@ + This style guide can also be viewed on the web. + +

License, Copyright, and Other Lawyerly Verbosity

+-

The libstdc++ documentation is released under +- +- these terms. ++

The libstdc++ documentation is released under these terms ++ (read online, or ++ read offline). +

+

Part of the generated documentation involved comments and notes from + SGI, who says we gotta say this: +--- a/src/libstdc++-v3/doc/html/api.html ++++ b/src/libstdc++-v3/doc/html/api.html +@@ -19,6 +19,8 @@ + member functions for the library classes, finding out what is in a + particular include file, looking at inheritance diagrams, etc. +

++ ++

+ The API documentation, rendered into HTML, can be viewed online: +

  • + for the 3.4 release +--- a/src/libstdc++-v3/doc/xml/api.xml ++++ b/src/libstdc++-v3/doc/xml/api.xml +@@ -36,6 +36,11 @@ + particular include file, looking at inheritance diagrams, etc. + + ++ ++ The source-level documentation for this release can be viewed offline. ++ ++ ++ + + The API documentation, rendered into HTML, can be viewed online: + --- gcc-4.7-4.7.2.orig/debian/patches/libjava-stacktrace.diff +++ gcc-4.7-4.7.2/debian/patches/libjava-stacktrace.diff @@ -0,0 +1,50 @@ +# DP: libgcj: Lookup source file name and line number in separated +# DP: debug files found in /usr/lib/debug + +--- + libjava/stacktrace.cc | 27 +++++++++++++++++++++++++++ + 1 files changed, 27 insertions(+), 0 deletions(-) + +--- a/src/libjava/stacktrace.cc ++++ b/src/libjava/stacktrace.cc +@@ -17,6 +17,11 @@ + #include + + #include ++#include ++#include ++#ifdef HAVE_UNISTD_H ++#include ++#endif + + #include + #include +@@ -260,6 +265,28 @@ + finder->lookup (binaryName, (jlong) offset); + *sourceFileName = finder->getSourceFile(); + *lineNum = finder->getLineNum(); ++ if (*lineNum == -1 && info.file_name[0] == '/') ++ { ++ const char *debugPrefix = "/usr/lib/debug"; ++ char *debugPath = (char *) malloc (strlen(debugPrefix) ++ + strlen(info.file_name) ++ + 2); ++ ++ if (debugPath) ++ { ++ strcpy (debugPath, debugPrefix); ++ strcat (debugPath, info.file_name); ++ //printf ("%s: 0x%x\n", debugPath, offset); ++ if (!access (debugPath, R_OK)) ++ { ++ binaryName = JvNewStringUTF (debugPath); ++ finder->lookup (binaryName, (jlong) offset); ++ *sourceFileName = finder->getSourceFile(); ++ *lineNum = finder->getLineNum(); ++ } ++ free (debugPath); ++ } ++ } + if (*lineNum == -1 && NameFinder::showRaw()) + { + gnu::gcj::runtime::StringBuffer *t = --- gcc-4.7-4.7.2.orig/debian/patches/pr39491.diff +++ gcc-4.7-4.7.2/debian/patches/pr39491.diff @@ -0,0 +1,132 @@ +# DP: Proposed patch for PR libstdc++/39491. + +2009-04-16 Benjamin Kosnik + + * src/math_stubs_long_double.cc (__signbitl): Add for hppa linux only. + +Index: a/src/libstdc++-v3/src/math_stubs_long_double.cc +=================================================================== +--- a/src/libstdc++-v3/src/math_stubs_long_double.cc (revision 146216) ++++ b/src/libstdc++-v3/src/math_stubs_long_double.cc (working copy) +@@ -213,4 +221,111 @@ + return tanh((double) x); + } + #endif ++ ++ // From libmath/signbitl.c ++ // XXX ABI mistakenly exported ++#if defined (__hppa__) && defined (__linux__) ++# include ++# include ++ ++typedef unsigned int U_int32_t __attribute ((mode (SI))); ++typedef int Int32_t __attribute ((mode (SI))); ++typedef unsigned int U_int64_t __attribute ((mode (DI))); ++typedef int Int64_t __attribute ((mode (DI))); ++ ++#if BYTE_ORDER == BIG_ENDIAN ++typedef union ++{ ++ long double value; ++ struct ++ { ++ unsigned int sign_exponent:16; ++ unsigned int empty:16; ++ U_int32_t msw; ++ U_int32_t lsw; ++ } parts; ++} ieee_long_double_shape_type; ++#endif ++#if BYTE_ORDER == LITTLE_ENDIAN ++typedef union ++{ ++ long double value; ++ struct ++ { ++ U_int32_t lsw; ++ U_int32_t msw; ++ unsigned int sign_exponent:16; ++ unsigned int empty:16; ++ } parts; ++} ieee_long_double_shape_type; ++#endif ++ ++/* Get int from the exponent of a long double. */ ++#define GET_LDOUBLE_EXP(exp,d) \ ++do { \ ++ ieee_long_double_shape_type ge_u; \ ++ ge_u.value = (d); \ ++ (exp) = ge_u.parts.sign_exponent; \ ++} while (0) ++ ++#if BYTE_ORDER == BIG_ENDIAN ++typedef union ++{ ++ long double value; ++ struct ++ { ++ U_int64_t msw; ++ U_int64_t lsw; ++ } parts64; ++ struct ++ { ++ U_int32_t w0, w1, w2, w3; ++ } parts32; ++} ieee_quad_double_shape_type; ++#endif ++ ++#if BYTE_ORDER == LITTLE_ENDIAN ++typedef union ++{ ++ long double value; ++ struct ++ { ++ U_int64_t lsw; ++ U_int64_t msw; ++ } parts64; ++ struct ++ { ++ U_int32_t w3, w2, w1, w0; ++ } parts32; ++} ieee_quad_double_shape_type; ++#endif ++ ++/* Get most significant 64 bit int from a quad long double. */ ++#define GET_LDOUBLE_MSW64(msw,d) \ ++do { \ ++ ieee_quad_double_shape_type qw_u; \ ++ qw_u.value = (d); \ ++ (msw) = qw_u.parts64.msw; \ ++} while (0) ++ ++int ++__signbitl (long double x) ++{ ++#if LDBL_MANT_DIG == 113 ++ Int64_t msw; ++ ++ GET_LDOUBLE_MSW64 (msw, x); ++ return msw < 0; ++#else ++ Int32_t e; ++ ++ GET_LDOUBLE_EXP (e, x); ++ return e & 0x8000; ++#endif ++} ++#endif ++ ++#ifndef _GLIBCXX_HAVE___SIGNBITL ++ ++#endif + } // extern "C" +--- a/src/libstdc++-v3/config/abi/pre/gnu.ver~ 2009-04-10 01:23:07.000000000 +0200 ++++ b/src/libstdc++-v3/config/abi/pre/gnu.ver 2009-04-21 16:24:24.000000000 +0200 +@@ -635,6 +635,7 @@ + sqrtf; + sqrtl; + copysignf; ++ __signbitl; + + # GLIBCXX_ABI compatibility only. + # std::string --- gcc-4.7-4.7.2.orig/debian/patches/mips-fix-loongson2f-nop.diff +++ gcc-4.7-4.7.2/debian/patches/mips-fix-loongson2f-nop.diff @@ -0,0 +1,13 @@ +# DP: On mips, pass -mfix-loongson2f-nop to as, if -mno-fix-loongson2f-nop +# DP: is not passed. + +--- a/src/gcc/config/mips/mips.h ++++ b/src/gcc/config/mips/mips.h +@@ -1142,6 +1142,7 @@ + %{mshared} %{mno-shared} \ + %{msym32} %{mno-sym32} \ + %{mtune=*} \ ++%{!mno-fix-loongson2f-nop:-mfix-loongson2f-nop} \ + %(subtarget_asm_spec)" + + /* Extra switches sometimes passed to the linker. */ --- gcc-4.7-4.7.2.orig/debian/patches/pr26155.diff +++ gcc-4.7-4.7.2/debian/patches/pr26155.diff @@ -0,0 +1,97 @@ +# DP: Fix PR c++/26155, taken from the trunk. + +gcc/cp/ +2012-06-01 Paolo Carlini + + PR c++/26155 + * name-lookup.c (push_namespace): When error recovery is + impossible just error out in duplicate_decls. + +gcc/testsuite/ + +2012-06-01 Paolo Carlini + + PR c++/26155 + * g++.dg/parse/namespace-alias-1.C: New. + +Index: gcc/testsuite/g++.dg/parse/namespace-alias-1.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/parse/namespace-alias-1.C (revision 0) ++++ b/src/gcc/testsuite/g++.dg/parse/namespace-alias-1.C (revision 188113) +@@ -0,0 +1,7 @@ ++// PR c++/26155 ++ ++namespace N ++{ ++ namespace M = N; // { dg-error "previous declaration" } ++ namespace M {} // { dg-error "declaration of namespace" } ++} +Index: gcc/cp/name-lookup.c +=================================================================== +--- a/src/gcc/cp/name-lookup.c (revision 188112) ++++ b/src/gcc/cp/name-lookup.c (revision 188113) +@@ -3518,8 +3518,8 @@ + push_namespace (tree name) + { + tree d = NULL_TREE; +- int need_new = 1; +- int implicit_use = 0; ++ bool need_new = true; ++ bool implicit_use = false; + bool anon = !name; + + bool subtime = timevar_cond_start (TV_NAME_LOOKUP); +@@ -3535,8 +3535,8 @@ + d = IDENTIFIER_NAMESPACE_VALUE (name); + if (d) + /* Reopening anonymous namespace. */ +- need_new = 0; +- implicit_use = 1; ++ need_new = false; ++ implicit_use = true; + } + else + { +@@ -3544,13 +3544,36 @@ + d = IDENTIFIER_NAMESPACE_VALUE (name); + if (d != NULL_TREE && TREE_CODE (d) == NAMESPACE_DECL) + { +- need_new = 0; +- if (DECL_NAMESPACE_ALIAS (d)) +- { +- error ("namespace alias %qD not allowed here, assuming %qD", +- d, DECL_NAMESPACE_ALIAS (d)); +- d = DECL_NAMESPACE_ALIAS (d); ++ tree dna = DECL_NAMESPACE_ALIAS (d); ++ if (dna) ++ { ++ /* We do some error recovery for, eg, the redeclaration ++ of M here: ++ ++ namespace N {} ++ namespace M = N; ++ namespace M {} ++ ++ However, in nasty cases like: ++ ++ namespace N ++ { ++ namespace M = N; ++ namespace M {} ++ } ++ ++ we just error out below, in duplicate_decls. */ ++ if (NAMESPACE_LEVEL (dna)->level_chain ++ == current_binding_level) ++ { ++ error ("namespace alias %qD not allowed here, " ++ "assuming %qD", d, dna); ++ d = dna; ++ need_new = false; ++ } + } ++ else ++ need_new = false; + } + } + --- gcc-4.7-4.7.2.orig/debian/patches/libjava-multiarch.diff +++ gcc-4.7-4.7.2/debian/patches/libjava-multiarch.diff @@ -0,0 +1,72 @@ +# DP: Install libjava libraries to multiarch location + +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -1592,6 +1592,10 @@ + ../lib*) toolexeclibdir='$(subst /lib/../lib,/lib,'$toolexecmainlibdir/$multi_os_directory')' ;; + *) toolexeclibdir=$toolexecmainlibdir/$multi_os_directory ;; + esac ++ multiarch=`$CC -print-multiarch` ++ if test -n "$multiarch"; then ++ toolexeclibdir=$toolexecmainlibdir/$multiarch ++ fi + ;; + esac + AC_SUBST(toolexecdir) +@@ -1618,6 +1622,10 @@ + dbexecdir='$(libdir)/'$multi_os_directory/$gcjsubdir + ;; + esac ++multiarch=`$CC -print-multiarch` ++if test -n "$multiarch"; then ++ dbexecdir='$(libdir)/'$multiarch/$gcjsubdir ++fi + AC_SUBST(dbexecdir) + AC_SUBST(gcjsubdir) + +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -372,7 +372,7 @@ + -DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \ + -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ + -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ +- -DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \ ++ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.7/$(db_name)\"" \ + -DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\"" + + AM_GCJFLAGS = \ +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -1019,7 +1019,7 @@ + -DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \ + -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ + -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ +- -DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \ ++ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.7/$(db_name)\"" \ + -DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\"" + + AM_GCJFLAGS = \ +--- a/src/libjava/classpath/m4/acinclude.m4 ++++ b/src/libjava/classpath/m4/acinclude.m4 +@@ -252,6 +252,10 @@ + .) toolexeclibdir=${libdir} ;; # Avoid trailing /. + *) toolexeclibdir=${libdir}/${multi_os_directory} ;; + esac ++ multiarch=`$CC -print-multiarch` ++ if test -n "$multiarch"; then ++ toolexeclibdir=${libdir}/${multiarch} ++ fi + AC_SUBST(toolexeclibdir) + ]) + +--- a/src/libjava/classpath/configure.ac ++++ b/src/libjava/classpath/configure.ac +@@ -16,6 +16,8 @@ + + AC_CANONICAL_TARGET + ++dnl dummy change to run autoconf ++ + dnl GCJ LOCAL + AC_ARG_ENABLE(java-maintainer-mode, + AS_HELP_STRING([--enable-java-maintainer-mode], --- gcc-4.7-4.7.2.orig/debian/patches/svn-updates.diff +++ gcc-4.7-4.7.2/debian/patches/svn-updates.diff @@ -0,0 +1,262648 @@ +# DP: updates from the 4.7 branch upto 20121027 (r192873). + +last_updated() +{ + cat > ${dir}LAST_UPDATED < conftest.$ac_ext <<_LT_EOF +-#line 11773 "configure" ++#line 11774 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11876,7 +11877,7 @@ + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11879 "configure" ++#line 11880 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +Index: libitm/Makefile.in +=================================================================== +--- a/src/libitm/Makefile.in (.../tags/gcc_4_7_2_release) ++++ b/src/libitm/Makefile.in (.../branches/gcc-4_7-branch) +@@ -40,13 +40,10 @@ + @ARCH_X86_TRUE@am__append_2 = x86_sse.cc x86_avx.cc + @ARCH_FUTEX_TRUE@am__append_3 = futex.cc + subdir = . +-DIST_COMMON = $(am__configure_deps) $(srcdir)/../config.guess \ +- $(srcdir)/../config.sub $(srcdir)/../depcomp \ +- $(srcdir)/../install-sh $(srcdir)/../ltmain.sh \ +- $(srcdir)/../missing $(srcdir)/../mkinstalldirs \ +- $(srcdir)/Makefile.am $(srcdir)/Makefile.in \ +- $(srcdir)/config.h.in $(srcdir)/libitm.spec.in \ +- $(top_srcdir)/configure ChangeLog ++DIST_COMMON = ChangeLog $(srcdir)/Makefile.in $(srcdir)/Makefile.am \ ++ $(top_srcdir)/configure $(am__configure_deps) \ ++ $(srcdir)/config.h.in $(srcdir)/../mkinstalldirs \ ++ $(srcdir)/libitm.spec.in $(srcdir)/../depcomp + ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 + am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ + $(top_srcdir)/../config/asmcfi.m4 \ +@@ -97,11 +94,6 @@ + "$(DESTDIR)$(toolexeclibdir)" + LTLIBRARIES = $(toolexeclib_LTLIBRARIES) + libitm_la_LIBADD = +-am__libitm_la_SOURCES_DIST = aatree.cc alloc.cc alloc_c.cc \ +- alloc_cpp.cc barrier.cc beginend.cc clone.cc eh_cpp.cc \ +- local.cc query.cc retry.cc rwlock.cc useraction.cc util.cc \ +- sjlj.S tls.cc method-serial.cc method-gl.cc method-ml.cc \ +- hwcap.cc x86_sse.cc x86_avx.cc futex.cc + @ARCH_ARM_TRUE@am__objects_1 = hwcap.lo + @ARCH_X86_TRUE@am__objects_2 = x86_sse.lo x86_avx.lo + @ARCH_FUTEX_TRUE@am__objects_3 = futex.lo +@@ -139,7 +131,6 @@ + --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ + $(LDFLAGS) -o $@ + SOURCES = $(libitm_la_SOURCES) +-DIST_SOURCES = $(am__libitm_la_SOURCES_DIST) + MULTISRCTOP = + MULTIBUILDTOP = + MULTIDIRS = +@@ -169,47 +160,10 @@ + RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \ + distclean-recursive maintainer-clean-recursive + AM_RECURSIVE_TARGETS = $(RECURSIVE_TARGETS:-recursive=) \ +- $(RECURSIVE_CLEAN_TARGETS:-recursive=) tags TAGS ctags CTAGS \ +- distdir dist dist-all distcheck ++ $(RECURSIVE_CLEAN_TARGETS:-recursive=) tags TAGS ctags CTAGS + ETAGS = etags + CTAGS = ctags + DIST_SUBDIRS = $(SUBDIRS) +-DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) +-distdir = $(PACKAGE)-$(VERSION) +-top_distdir = $(distdir) +-am__remove_distdir = \ +- { test ! -d "$(distdir)" \ +- || { find "$(distdir)" -type d ! -perm -200 -exec chmod u+w {} ';' \ +- && rm -fr "$(distdir)"; }; } +-am__relativize = \ +- dir0=`pwd`; \ +- sed_first='s,^\([^/]*\)/.*$$,\1,'; \ +- sed_rest='s,^[^/]*/*,,'; \ +- sed_last='s,^.*/\([^/]*\)$$,\1,'; \ +- sed_butlast='s,/*[^/]*$$,,'; \ +- while test -n "$$dir1"; do \ +- first=`echo "$$dir1" | sed -e "$$sed_first"`; \ +- if test "$$first" != "."; then \ +- if test "$$first" = ".."; then \ +- dir2=`echo "$$dir0" | sed -e "$$sed_last"`/"$$dir2"; \ +- dir0=`echo "$$dir0" | sed -e "$$sed_butlast"`; \ +- else \ +- first2=`echo "$$dir2" | sed -e "$$sed_first"`; \ +- if test "$$first2" = "$$first"; then \ +- dir2=`echo "$$dir2" | sed -e "$$sed_rest"`; \ +- else \ +- dir2="../$$dir2"; \ +- fi; \ +- dir0="$$dir0"/"$$first"; \ +- fi; \ +- fi; \ +- dir1=`echo "$$dir1" | sed -e "$$sed_rest"`; \ +- done; \ +- reldir="$$dir2" +-DIST_ARCHIVES = $(distdir).tar.gz +-GZIP_ENV = --best +-distuninstallcheck_listfiles = find . -type f -print +-distcleancheck_listfiles = find . -type f -print + ACLOCAL = @ACLOCAL@ + AMTAR = @AMTAR@ + AR = @AR@ +@@ -867,185 +821,6 @@ + + distclean-tags: + -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags +- +-distdir: $(DISTFILES) +- $(am__remove_distdir) +- test -d "$(distdir)" || mkdir "$(distdir)" +- @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ +- topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ +- list='$(DISTFILES)'; \ +- dist_files=`for file in $$list; do echo $$file; done | \ +- sed -e "s|^$$srcdirstrip/||;t" \ +- -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ +- case $$dist_files in \ +- */*) $(MKDIR_P) `echo "$$dist_files" | \ +- sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ +- sort -u` ;; \ +- esac; \ +- for file in $$dist_files; do \ +- if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ +- if test -d $$d/$$file; then \ +- dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ +- if test -d "$(distdir)/$$file"; then \ +- find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ +- fi; \ +- if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ +- cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ +- find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ +- fi; \ +- cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ +- else \ +- test -f "$(distdir)/$$file" \ +- || cp -p $$d/$$file "$(distdir)/$$file" \ +- || exit 1; \ +- fi; \ +- done +- @list='$(DIST_SUBDIRS)'; for subdir in $$list; do \ +- if test "$$subdir" = .; then :; else \ +- test -d "$(distdir)/$$subdir" \ +- || $(MKDIR_P) "$(distdir)/$$subdir" \ +- || exit 1; \ +- fi; \ +- done +- @list='$(DIST_SUBDIRS)'; for subdir in $$list; do \ +- if test "$$subdir" = .; then :; else \ +- dir1=$$subdir; dir2="$(distdir)/$$subdir"; \ +- $(am__relativize); \ +- new_distdir=$$reldir; \ +- dir1=$$subdir; dir2="$(top_distdir)"; \ +- $(am__relativize); \ +- new_top_distdir=$$reldir; \ +- echo " (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) top_distdir="$$new_top_distdir" distdir="$$new_distdir" \\"; \ +- echo " am__remove_distdir=: am__skip_length_check=: am__skip_mode_fix=: distdir)"; \ +- ($(am__cd) $$subdir && \ +- $(MAKE) $(AM_MAKEFLAGS) \ +- top_distdir="$$new_top_distdir" \ +- distdir="$$new_distdir" \ +- am__remove_distdir=: \ +- am__skip_length_check=: \ +- am__skip_mode_fix=: \ +- distdir) \ +- || exit 1; \ +- fi; \ +- done +- $(MAKE) $(AM_MAKEFLAGS) \ +- top_distdir="$(top_distdir)" distdir="$(distdir)" \ +- dist-info +- -test -n "$(am__skip_mode_fix)" \ +- || find "$(distdir)" -type d ! -perm -755 \ +- -exec chmod u+rwx,go+rx {} \; -o \ +- ! -type d ! -perm -444 -links 1 -exec chmod a+r {} \; -o \ +- ! -type d ! -perm -400 -exec chmod a+r {} \; -o \ +- ! -type d ! -perm -444 -exec $(install_sh) -c -m a+r {} {} \; \ +- || chmod -R a+r "$(distdir)" +-dist-gzip: distdir +- tardir=$(distdir) && $(am__tar) | GZIP=$(GZIP_ENV) gzip -c >$(distdir).tar.gz +- $(am__remove_distdir) +- +-dist-bzip2: distdir +- tardir=$(distdir) && $(am__tar) | bzip2 -9 -c >$(distdir).tar.bz2 +- $(am__remove_distdir) +- +-dist-lzma: distdir +- tardir=$(distdir) && $(am__tar) | lzma -9 -c >$(distdir).tar.lzma +- $(am__remove_distdir) +- +-dist-xz: distdir +- tardir=$(distdir) && $(am__tar) | xz -c >$(distdir).tar.xz +- $(am__remove_distdir) +- +-dist-tarZ: distdir +- tardir=$(distdir) && $(am__tar) | compress -c >$(distdir).tar.Z +- $(am__remove_distdir) +- +-dist-shar: distdir +- shar $(distdir) | GZIP=$(GZIP_ENV) gzip -c >$(distdir).shar.gz +- $(am__remove_distdir) +- +-dist-zip: distdir +- -rm -f $(distdir).zip +- zip -rq $(distdir).zip $(distdir) +- $(am__remove_distdir) +- +-dist dist-all: distdir +- tardir=$(distdir) && $(am__tar) | GZIP=$(GZIP_ENV) gzip -c >$(distdir).tar.gz +- $(am__remove_distdir) +- +-# This target untars the dist file and tries a VPATH configuration. Then +-# it guarantees that the distribution is self-contained by making another +-# tarfile. +-distcheck: dist +- case '$(DIST_ARCHIVES)' in \ +- *.tar.gz*) \ +- GZIP=$(GZIP_ENV) gzip -dc $(distdir).tar.gz | $(am__untar) ;;\ +- *.tar.bz2*) \ +- bzip2 -dc $(distdir).tar.bz2 | $(am__untar) ;;\ +- *.tar.lzma*) \ +- lzma -dc $(distdir).tar.lzma | $(am__untar) ;;\ +- *.tar.xz*) \ +- xz -dc $(distdir).tar.xz | $(am__untar) ;;\ +- *.tar.Z*) \ +- uncompress -c $(distdir).tar.Z | $(am__untar) ;;\ +- *.shar.gz*) \ +- GZIP=$(GZIP_ENV) gzip -dc $(distdir).shar.gz | unshar ;;\ +- *.zip*) \ +- unzip $(distdir).zip ;;\ +- esac +- chmod -R a-w $(distdir); chmod a+w $(distdir) +- mkdir $(distdir)/_build +- mkdir $(distdir)/_inst +- chmod a-w $(distdir) +- test -d $(distdir)/_build || exit 0; \ +- dc_install_base=`$(am__cd) $(distdir)/_inst && pwd | sed -e 's,^[^:\\/]:[\\/],/,'` \ +- && dc_destdir="$${TMPDIR-/tmp}/am-dc-$$$$/" \ +- && am__cwd=`pwd` \ +- && $(am__cd) $(distdir)/_build \ +- && ../configure --srcdir=.. --prefix="$$dc_install_base" \ +- $(DISTCHECK_CONFIGURE_FLAGS) \ +- && $(MAKE) $(AM_MAKEFLAGS) \ +- && $(MAKE) $(AM_MAKEFLAGS) dvi \ +- && $(MAKE) $(AM_MAKEFLAGS) check \ +- && $(MAKE) $(AM_MAKEFLAGS) install \ +- && $(MAKE) $(AM_MAKEFLAGS) installcheck \ +- && $(MAKE) $(AM_MAKEFLAGS) uninstall \ +- && $(MAKE) $(AM_MAKEFLAGS) distuninstallcheck_dir="$$dc_install_base" \ +- distuninstallcheck \ +- && chmod -R a-w "$$dc_install_base" \ +- && ({ \ +- (cd ../.. && umask 077 && mkdir "$$dc_destdir") \ +- && $(MAKE) $(AM_MAKEFLAGS) DESTDIR="$$dc_destdir" install \ +- && $(MAKE) $(AM_MAKEFLAGS) DESTDIR="$$dc_destdir" uninstall \ +- && $(MAKE) $(AM_MAKEFLAGS) DESTDIR="$$dc_destdir" \ +- distuninstallcheck_dir="$$dc_destdir" distuninstallcheck; \ +- } || { rm -rf "$$dc_destdir"; exit 1; }) \ +- && rm -rf "$$dc_destdir" \ +- && $(MAKE) $(AM_MAKEFLAGS) dist \ +- && rm -rf $(DIST_ARCHIVES) \ +- && $(MAKE) $(AM_MAKEFLAGS) distcleancheck \ +- && cd "$$am__cwd" \ +- || exit 1 +- $(am__remove_distdir) +- @(echo "$(distdir) archives ready for distribution: "; \ +- list='$(DIST_ARCHIVES)'; for i in $$list; do echo $$i; done) | \ +- sed -e 1h -e 1s/./=/g -e 1p -e 1x -e '$$p' -e '$$x' +-distuninstallcheck: +- @$(am__cd) '$(distuninstallcheck_dir)' \ +- && test `$(distuninstallcheck_listfiles) | wc -l` -le 1 \ +- || { echo "ERROR: files left after uninstall:" ; \ +- if test -n "$(DESTDIR)"; then \ +- echo " (check DESTDIR support)"; \ +- fi ; \ +- $(distuninstallcheck_listfiles) ; \ +- exit 1; } >&2 +-distcleancheck: distclean +- @if test '$(srcdir)' = . ; then \ +- echo "ERROR: distcleancheck can only run from a VPATH build" ; \ +- exit 1 ; \ +- fi +- @test `$(distcleancheck_listfiles) | wc -l` -eq 0 \ +- || { echo "ERROR: files left in build directory after distclean:" ; \ +- $(distcleancheck_listfiles) ; \ +- exit 1; } >&2 + check-am: all-am + check: check-recursive + all-am: Makefile $(INFO_DEPS) $(LTLIBRARIES) all-multi $(HEADERS) \ +@@ -1244,13 +1019,10 @@ + .PHONY: $(RECURSIVE_CLEAN_TARGETS) $(RECURSIVE_TARGETS) CTAGS GTAGS \ + all all-am all-local all-multi am--refresh check check-am \ + clean clean-aminfo clean-generic clean-libtool clean-multi \ +- clean-toolexeclibLTLIBRARIES ctags ctags-recursive dist \ +- dist-all dist-bzip2 dist-gzip dist-info dist-lzma dist-shar \ +- dist-tarZ dist-xz dist-zip distcheck distclean \ +- distclean-compile distclean-generic distclean-hdr \ +- distclean-libtool distclean-multi distclean-tags \ +- distcleancheck distdir distuninstallcheck dvi dvi-am html \ +- html-am info info-am install install-am install-data \ ++ clean-toolexeclibLTLIBRARIES ctags ctags-recursive dist-info \ ++ distclean distclean-compile distclean-generic distclean-hdr \ ++ distclean-libtool distclean-multi distclean-tags dvi dvi-am \ ++ html html-am info info-am install install-am install-data \ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-multi \ +Index: libitm/configure.ac +=================================================================== +--- a/src/libitm/configure.ac (.../tags/gcc_4_7_2_release) ++++ b/src/libitm/configure.ac (.../branches/gcc-4_7-branch) +@@ -70,12 +70,13 @@ + # no-define: PACKAGE and VERSION will not be #define'd in config.h (a bunch + # of other PACKAGE_* variables will, however, and there's nothing + # we can do about that; they come from AC_INIT). ++# no-dist: we don't want 'dist' and related rules. + # foreign: we don't follow the normal rules for GNU packages (no COPYING + # file in the top srcdir, etc, etc), so stop complaining. + # -Wall: turns on all automake warnings... + # -Wno-portability: ...except this one, since GNU make is required. + # -Wno-override: ... and this one, since we do want this in testsuite. +-AM_INIT_AUTOMAKE([1.9.0 foreign -Wall -Wno-portability -Wno-override]) ++AM_INIT_AUTOMAKE([1.9.0 foreign no-dist -Wall -Wno-portability -Wno-override]) + AM_ENABLE_MULTILIB(, ..) + + # Calculate toolexeclibdir +Index: libitm/ChangeLog +=================================================================== +--- a/src/libitm/ChangeLog (.../tags/gcc_4_7_2_release) ++++ b/src/libitm/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,11 @@ ++2012-09-20 Jakub Jelinek ++ ++ PR other/43620 ++ * configure.ac (AM_INIT_AUTOMAKE): Add no-dist. ++ * Makefile.in: Regenerated. ++ * configure: Regenerated. ++ * testsuite/Makefile.in: Regenerated. ++ + 2012-09-20 Release Manager + + * GCC 4.7.2 released. +Index: libitm/testsuite/Makefile.in +=================================================================== +--- a/src/libitm/testsuite/Makefile.in (.../tags/gcc_4_7_2_release) ++++ b/src/libitm/testsuite/Makefile.in (.../branches/gcc-4_7-branch) +@@ -35,7 +35,7 @@ + host_triplet = @host@ + target_triplet = @target@ + subdir = testsuite +-DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ++DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/Makefile.am + ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 + am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ + $(top_srcdir)/../config/asmcfi.m4 \ +@@ -60,10 +60,8 @@ + CONFIG_CLEAN_FILES = + CONFIG_CLEAN_VPATH_FILES = + SOURCES = +-DIST_SOURCES = + DEJATOOL = $(PACKAGE) + RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir +-DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) + ACLOCAL = @ACLOCAL@ + AMTAR = @AMTAR@ + AR = @AR@ +@@ -295,37 +293,6 @@ + -l='$(DEJATOOL)'; for tool in $$l; do \ + rm -f $$tool.sum $$tool.log; \ + done +- +-distdir: $(DISTFILES) +- @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ +- topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ +- list='$(DISTFILES)'; \ +- dist_files=`for file in $$list; do echo $$file; done | \ +- sed -e "s|^$$srcdirstrip/||;t" \ +- -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ +- case $$dist_files in \ +- */*) $(MKDIR_P) `echo "$$dist_files" | \ +- sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ +- sort -u` ;; \ +- esac; \ +- for file in $$dist_files; do \ +- if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ +- if test -d $$d/$$file; then \ +- dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ +- if test -d "$(distdir)/$$file"; then \ +- find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ +- fi; \ +- if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ +- cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ +- find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ +- fi; \ +- cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ +- else \ +- test -f "$(distdir)/$$file" \ +- || cp -p $$d/$$file "$(distdir)/$$file" \ +- || exit 1; \ +- fi; \ +- done + check-am: all-am + $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU + check: check-am +@@ -426,8 +393,8 @@ + + .PHONY: all all-am check check-DEJAGNU check-am clean clean-generic \ + clean-libtool distclean distclean-DEJAGNU distclean-generic \ +- distclean-libtool distdir dvi dvi-am html html-am info info-am \ +- install install-am install-data install-data-am install-dvi \ ++ distclean-libtool dvi dvi-am html html-am info info-am install \ ++ install-am install-data install-data-am install-dvi \ + install-dvi-am install-exec install-exec-am install-html \ + install-html-am install-info install-info-am install-man \ + install-pdf install-pdf-am install-ps install-ps-am \ +Index: libstdc++-v3/configure +=================================================================== +--- a/src/libstdc++-v3/configure (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/configure (.../branches/gcc-4_7-branch) +@@ -3025,8 +3025,7 @@ + target_alias=${target_alias-$host_alias} + + # Handy for debugging: +-{ $as_echo "$as_me:${as_lineno-$LINENO}: $build / $host / $target / $host_alias / $target_alias" >&5 +-$as_echo "$as_me: $build / $host / $target / $host_alias / $target_alias" >&6;}; sleep 5 ++#AC_MSG_NOTICE($build / $host / $target / $host_alias / $target_alias); sleep 5 + + if test "$build" != "$host"; then + # We are being configured with some form of cross compiler. +@@ -11498,7 +11497,7 @@ + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11501 "configure" ++#line 11500 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11604,7 +11603,7 @@ + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11607 "configure" ++#line 11606 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -14962,7 +14961,7 @@ + # + # Fake what AC_TRY_COMPILE does. XXX Look at redoing this new-style. + cat > conftest.$ac_ext << EOF +-#line 14965 "configure" ++#line 14964 "configure" + struct S { ~S(); }; + void bar(); + void foo() +@@ -15297,7 +15296,7 @@ + # Fake what AC_TRY_COMPILE does. + + cat > conftest.$ac_ext << EOF +-#line 15300 "configure" ++#line 15299 "configure" + int main() + { + typedef bool atomic_type; +@@ -15332,7 +15331,7 @@ + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15335 "configure" ++#line 15334 "configure" + int main() + { + typedef short atomic_type; +@@ -15367,7 +15366,7 @@ + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15370 "configure" ++#line 15369 "configure" + int main() + { + // NB: _Atomic_word not necessarily int. +@@ -15403,7 +15402,7 @@ + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15406 "configure" ++#line 15405 "configure" + int main() + { + typedef long long atomic_type; +@@ -15482,7 +15481,7 @@ + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15485 "configure" ++#line 15484 "configure" + int main() + { + _Decimal32 d1; +@@ -15524,7 +15523,7 @@ + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15527 "configure" ++#line 15526 "configure" + template + struct same + { typedef T2 type; }; +@@ -15558,7 +15557,7 @@ + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15561 "configure" ++#line 15560 "configure" + template + struct same + { typedef T2 type; }; +@@ -66485,7 +66484,9 @@ + + ac_config_files="$ac_config_files scripts/extract_symvers" + ++ac_config_files="$ac_config_files doc/xsl/customization.xsl" + ++ + # Multilibs need MULTISUBDIR defined correctly in certain makefiles so + # that multilib installs will end up installed in the correct place. + # The testsuite needs it for multilib-aware ABI baseline files. +@@ -67696,6 +67697,7 @@ + "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;; + "scripts/testsuite_flags") CONFIG_FILES="$CONFIG_FILES scripts/testsuite_flags" ;; + "scripts/extract_symvers") CONFIG_FILES="$CONFIG_FILES scripts/extract_symvers" ;; ++ "doc/xsl/customization.xsl") CONFIG_FILES="$CONFIG_FILES doc/xsl/customization.xsl" ;; + "include/Makefile") CONFIG_FILES="$CONFIG_FILES include/Makefile" ;; + "libsupc++/Makefile") CONFIG_FILES="$CONFIG_FILES libsupc++/Makefile" ;; + "python/Makefile") CONFIG_FILES="$CONFIG_FILES python/Makefile" ;; +Index: libstdc++-v3/Makefile.in +=================================================================== +--- a/src/libstdc++-v3/Makefile.in (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/Makefile.in (.../branches/gcc-4_7-branch) +@@ -39,7 +39,8 @@ + $(top_srcdir)/configure $(am__configure_deps) \ + $(srcdir)/config.h.in $(srcdir)/../mkinstalldirs \ + $(top_srcdir)/scripts/testsuite_flags.in \ +- $(top_srcdir)/scripts/extract_symvers.in ++ $(top_srcdir)/scripts/extract_symvers.in \ ++ $(top_srcdir)/doc/xsl/customization.xsl.in + subdir = . + ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 + am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ +@@ -67,7 +68,8 @@ + am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \ + configure.lineno config.status.lineno + CONFIG_HEADER = config.h +-CONFIG_CLEAN_FILES = scripts/testsuite_flags scripts/extract_symvers ++CONFIG_CLEAN_FILES = scripts/testsuite_flags scripts/extract_symvers \ ++ doc/xsl/customization.xsl + CONFIG_CLEAN_VPATH_FILES = + depcomp = + am__depfiles_maybe = +@@ -434,6 +436,8 @@ + cd $(top_builddir) && $(SHELL) ./config.status $@ + scripts/extract_symvers: $(top_builddir)/config.status $(top_srcdir)/scripts/extract_symvers.in + cd $(top_builddir) && $(SHELL) ./config.status $@ ++doc/xsl/customization.xsl: $(top_builddir)/config.status $(top_srcdir)/doc/xsl/customization.xsl.in ++ cd $(top_builddir) && $(SHELL) ./config.status $@ + + mostlyclean-libtool: + -rm -f *.lo +Index: libstdc++-v3/configure.ac +=================================================================== +--- a/src/libstdc++-v3/configure.ac (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/configure.ac (.../branches/gcc-4_7-branch) +@@ -434,6 +434,7 @@ + AC_CONFIG_FILES(Makefile) + AC_CONFIG_FILES([scripts/testsuite_flags],[chmod +x scripts/testsuite_flags]) + AC_CONFIG_FILES([scripts/extract_symvers],[chmod +x scripts/extract_symvers]) ++AC_CONFIG_FILES([doc/xsl/customization.xsl]) + + # Multilibs need MULTISUBDIR defined correctly in certain makefiles so + # that multilib installs will end up installed in the correct place. +Index: libstdc++-v3/doc/Makefile.in +=================================================================== +--- a/src/libstdc++-v3/doc/Makefile.in (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/doc/Makefile.in (.../branches/gcc-4_7-branch) +@@ -517,9 +517,10 @@ + #XSL_STYLE_DIR = /usr/share/xml/docbook/stylesheet/docbook-xsl-ns + #XSL_STYLE_DIR = /usr/share/sgml/docbook/xsl-ns-stylesheets + XSL_FO_STYLE = $(XSL_STYLE_DIR)/fo/docbook.xsl +-XSL_HTML_STYLE = $(XSL_STYLE_DIR)/xhtml-1_1/chunk.xsl +-XSL_HTML_SINGLE_STYLE = $(XSL_STYLE_DIR)/xhtml-1_1/docbook.xsl ++XSL_HTML_STYLE = $(XSL_STYLE_DIR)/xhtml/chunk.xsl ++XSL_HTML_SINGLE_STYLE = $(XSL_STYLE_DIR)/html/docbook.xsl + XSL_EPUB_STYLE = $(XSL_STYLE_DIR)/epub3/chunk.xsl ++XSL_LOCAL_STYLE = ${glibcxx_builddir}/doc/xsl/customization.xsl + LINT_FLAGS = --debug --xinclude --noent --noblanks --noout + SCHEMA_FLAGS = http://www.docbook.org/xml/5.0/dtd/docbook.dtd + #SCHEMA_FLAGS = --nonet /usr/share/xml/docbook5/schema/dtd/5.0/docbook.dtd +@@ -533,6 +534,7 @@ + set_xml = ${docbook_outdir}/xml/libstdc++-set-single.xml + + # HTML, all one page ++# NB: Have to generate customization XSL for UTF-8 output. + manual_html = ${docbook_outdir}/html/libstdc++-manual-single.html + + # PDF, via dblatex +@@ -917,18 +919,21 @@ + stamp-html-docbook-data: stamp-html-docbook-images stamp-html-docbook-lwg + $(STAMP) stamp-html-docbook-data + +-# HTML, index plus chapters ++# HTML, "chunked" into index plus chapters as separate pages + stamp-html-docbook: $(xml_sources) ${docbook_outdir}/html + @echo "Generating html files..." + $(XSLTPROC) $(XSLT_PARAM) $(XSLT_FLAGS) -o ${docbook_outdir}/html/ \ +- $(XSL_HTML_STYLE) ${top_srcdir}/doc/xml/spine.xml ++ --stringparam chunker.output.encoding UTF-8 \ ++ $(XSL_HTML_STYLE) \ ++ ${top_srcdir}/doc/xml/spine.xml + $(STAMP) stamp-html-docbook + + doc-html-docbook: stamp-html-docbook-data + stamp-html-single-docbook: $(xml_sources) ${docbook_outdir}/html + @echo "Generating html single file..." + $(XSLTPROC) $(XSLT_PARAM) $(XSLT_FLAGS) -o ${manual_html} \ +- $(XSL_HTML_SINGLE_STYLE) ${top_srcdir}/doc/xml/spine.xml ++ ${XSL_LOCAL_STYLE} \ ++ ${top_srcdir}/doc/xml/spine.xml + $(STAMP) stamp-html-single-docbook + + doc-html-single-docbook: stamp-html-single-docbook +Index: libstdc++-v3/doc/html/bk02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/bk02.html (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/doc/html/bk02.html (.../branches/gcc-4_7-branch) +@@ -1,3 +1,3 @@ + +- +-<meta name="generator" content="DocBook XSL-NS Stylesheets V1.76.1"/><meta name="keywords" content=" ISO C++ , runtime , library "/><link rel="home" href="index.html" title="The GNU C++ Library"/><link rel="up" href="index.html" title="The GNU C++ Library"/><link rel="prev" href="manual/backwards.html" title="Backwards Compatibility"/><link rel="next" href="api.html" title="The GNU C++ Library API Reference"/></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"/></tr><tr><td align="left"><a accesskey="p" href="manual/backwards.html">Prev</a> </td><th width="60%" align="center"> </th><td align="right"> <a accesskey="n" href="api.html">Next</a></td></tr></table><hr/></div><div class="book"><div class="titlepage"><hr/></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="article"><a href="api.html">The GNU C++ Library API Reference</a></span></dt></dl></div></div><div class="navfooter"><hr/><table width="100%" summary="Navigation footer"><tr><td align="left"><a accesskey="p" href="manual/backwards.html">Prev</a> </td><td align="center"> </td><td align="right"> <a accesskey="n" href="api.html">Next</a></td></tr><tr><td align="left" valign="top">Backwards Compatibility </td><td align="center"><a accesskey="h" href="index.html">Home</a></td><td align="right" valign="top"> The GNU C++ Library API Reference</td></tr></table></div></body></html> ++<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> ++<html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title>

    +Index: libstdc++-v3/doc/html/bk03.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/bk03.html (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/doc/html/bk03.html (.../branches/gcc-4_7-branch) +@@ -1,3 +1,3 @@ + +- +-<meta name="generator" content="DocBook XSL-NS Stylesheets V1.76.1"/><meta name="keywords" content=" ISO C++ , runtime , library "/><link rel="home" href="index.html" title="The GNU C++ Library"/><link rel="up" href="index.html" title="The GNU C++ Library"/><link rel="prev" href="api.html" title="The GNU C++ Library API Reference"/><link rel="next" href="faq.html" title="Frequently Asked Questions"/></head><body><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"/></tr><tr><td align="left"><a accesskey="p" href="api.html">Prev</a> </td><th width="60%" align="center"> </th><td align="right"> <a accesskey="n" href="faq.html">Next</a></td></tr></table><hr/></div><div class="book"><div class="titlepage"><hr/></div><div class="toc"><p><strong>Table of Contents</strong></p><dl><dt><span class="article"><a href="faq.html">Frequently Asked Questions</a></span></dt></dl></div></div><div class="navfooter"><hr/><table width="100%" summary="Navigation footer"><tr><td align="left"><a accesskey="p" href="api.html">Prev</a> </td><td align="center"> </td><td align="right"> <a accesskey="n" href="faq.html">Next</a></td></tr><tr><td align="left" valign="top">The GNU C++ Library API Reference </td><td align="center"><a accesskey="h" href="index.html">Home</a></td><td align="right" valign="top"> Frequently Asked Questions</td></tr></table></div></body></html> ++<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> ++<html xmlns="http://www.w3.org/1999/xhtml"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8" /><title> +Index: libstdc++-v3/doc/html/faq.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/faq.html (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/doc/html/faq.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,10 @@ + +- +-Frequently Asked Questions

    Frequently Asked Questions



    1.1. + What is libstdc++? +
    1.2. + Why should I use libstdc++? +@@ -18,7 +18,7 @@ + What happened to the older libg++? I need that! +
    1.7. + What if I have more questions? +-
    2.1. ++
    2.1. + What are the license terms for libstdc++? +
    2.2. + So any program which uses libstdc++ falls under the GPL? +@@ -26,7 +26,7 @@ + How is that different from the GNU {Lesser,Library} GPL? +
    2.4. + I see. So, what restrictions are there on programs that use the library? +-
    3.1. How do I install libstdc++? ++
    3.1. How do I install libstdc++? +
    3.2. How does one get current libstdc++ sources? +
    3.3. How do I know if it works? +
    3.4. How do I insure that the dynamically linked library will be found? +@@ -34,7 +34,7 @@ + What's libsupc++? +
    3.6. + This library is HUGE! +-
    4.1. ++
    4.1. + Can libstdc++ be used with non-GNU compilers? +
    4.2. + No 'long long' type on Solaris? +@@ -50,13 +50,13 @@ + Recent GNU/Linux glibc required? +
    4.8. + Can't use wchar_t/wstring on FreeBSD +-
    5.1. ++
    5.1. + What works already? +
    5.2. + Bugs in the ISO C++ language or library specification +
    5.3. + Bugs in the compiler (gcc/g++) and not libstdc++ +-
    6.1. ++
    6.1. + Reopening a stream fails +
    6.2. + -Weffc++ complains too much +@@ -76,7 +76,7 @@ + list::size() is O(n)! +
    6.9. + Aw, that's easy to fix! +-
    7.1. ++
    7.1. + string::iterator is not char*; vector<T>::iterator is not T* +
    7.2. + What's next after libstdc++? +@@ -91,7 +91,7 @@ + What's an ABI and why is it so messy? +
    7.8. + How do I make std::vector<T>::capacity() == std::vector<T>::size? +-
    1.1. ++
    1.1. + What is libstdc++? +
    1.2. + Why should I use libstdc++? +@@ -105,19 +105,19 @@ + What happened to the older libg++? I need that! +
    1.7. + What if I have more questions? +-

    1.1.

    ++

    1.1.

    + What is libstdc++? +-

    ++

    + The GNU Standard C++ Library v3 is an ongoing project to + implement the ISO 14882 Standard C++ library as described in + chapters 17 through 27 and annex D. For those who want to see + exactly how far the project has come, or just want the latest + bleeding-edge code, the up-to-date source is available over + anonymous SVN, and can even be browsed over +- the web. +-

    1.2.

    ++ the web. ++

    1.2.

    + Why should I use libstdc++? +-

    ++

    + The completion of the ISO C++ standardization gave the C++ + community a powerful set of reuseable tools in the form of the C++ + Standard Library. However, all existing C++ implementations are +@@ -129,9 +129,9 @@ + (gcc, g++, etc) is widely + considered to be one of the leading compilers in the world. Its + development is overseen by the +- GCC team. All of ++ GCC team. All of + the rapid development and near-legendary +- portability ++ portability + that are the hallmarks of an open-source project are being + applied to libstdc++. +

    +@@ -141,9 +141,9 @@ + vector<>, iostreams, and algorithms.) + Programmers will no longer need to roll their own + nor be worried about platform-specific incompatibilities. +-

    1.3.

    ++

    1.3.

    + Who's in charge of it? +-

    ++

    + The libstdc++ project is contributed to by several developers + all over the world, in the same way as GCC or the Linux kernel. + Benjamin Kosnik, Gabriel Dos Reis, Phil Edwards, Ulrich Drepper, +@@ -153,17 +153,17 @@ + Development and discussion is held on the libstdc++ mailing + list. Subscribing to the list, or searching the list + archives, is open to everyone. You can read instructions for +- doing so on the homepage. ++ doing so on the homepage. + If you have questions, ideas, code, or are just curious, sign up! +-

    1.4.

    ++

    1.4.

    + When is libstdc++ going to be finished? +-

    ++

    + Nathan Myers gave the best of all possible answers, responding to + a Usenet article asking this question: Sooner, if you + help. +-

    1.5.

    ++

    1.5.

    + How do I contribute to the effort? +-

    ++

    + Here is a page devoted to + this topic. Subscribing to the mailing list (see above, or + the homepage) is a very good idea if you have something to +@@ -172,17 +172,17 @@ + anybody who is willing to help write documentation, for example, + or has found a bug in code that we all thought was working and is + willing to provide details, is more than welcome! +-

    1.6.

    ++

    1.6.

    + What happened to the older libg++? I need that! +-

    ++

    + The most recent libg++ README states that libg++ is no longer + being actively maintained. It should not be used for new + projects, and is only being kicked along to support older code. +

    + More information in the backwards compatibility documentation +-

    1.7.

    ++

    1.7.

    + What if I have more questions? +-

    ++

    + If you have read the README file, and your question remains + unanswered, then just ask the mailing list. At present, you do not + need to be subscribed to the list to send a message to it. More +@@ -201,19 +201,19 @@ + How is that different from the GNU {Lesser,Library} GPL? +

    2.4. + I see. So, what restrictions are there on programs that use the library? +-

    2.1.

    ++

    2.1.

    + What are the license terms for libstdc++? +-

    ++

    + See our license description + for these and related questions. +-

    2.2.

    ++

    2.2.

    + So any program which uses libstdc++ falls under the GPL? +-

    ++

    + No. The special exception permits use of the library in + proprietary applications. +-

    2.3.

    ++

    2.3.

    + How is that different from the GNU {Lesser,Library} GPL? +-

    ++

    + The LGPL requires that users be able to replace the LGPL code with a + modified version; this is trivial if the library in question is a C + shared library. But there's no way to make that work with C++, where +@@ -221,9 +221,9 @@ + are expanded inside the code that uses the library. So to allow people + to replace the library code, someone using the library would have to + distribute their own source, rendering the LGPL equivalent to the GPL. +-

    2.4.

    ++

    2.4.

    + I see. So, what restrictions are there on programs that use the library? +-

    ++

    + None. We encourage such programs to be released as open source, + but we won't punish you or sue you if you choose otherwise. +

    3.1. How do I install libstdc++? +@@ -234,8 +234,8 @@ + What's libsupc++? +
    3.6. + This library is HUGE! +-

    3.1.

    How do I install libstdc++? +-

    ++

    3.1.

    How do I install libstdc++? ++

    + Often libstdc++ comes pre-installed as an integral part of many + existing GNU/Linux and Unix systems, as well as many embedded + development tools. It may be necessary to install extra +@@ -247,11 +247,11 @@ + documentation for detailed + instructions. You may wish to browse those files ahead + of time to get a feel for what's required. +-

    3.2.

    How does one get current libstdc++ sources? +-

    ++

    3.2.

    How does one get current libstdc++ sources? ++

    + Libstdc++ sources for all official releases can be obtained as + part of the GCC sources, available from various sites and +- mirrors. A full list of ++ mirrors. A full list of + download sites is provided on the main GCC site. +

    + Current libstdc++ sources can always be checked out of the main +@@ -262,7 +262,7 @@ + Subversion, or SVN, is + one of several revision control packages. It was selected for GNU + projects because it's free (speech), free (beer), and very high +- quality. The Subversion ++ quality. The Subversion + home page has a better description. +

    + The anonymous client checkout feature of SVN is +@@ -270,21 +270,21 @@ + the latest libstdc++ sources. +

    + For more information +- see SVN ++ see SVN + details. +-

    3.3.

    How do I know if it works? +-

    ++

    3.3.

    How do I know if it works? ++

    + Libstdc++ comes with its own validation testsuite, which includes + conformance testing, regression testing, ABI testing, and + performance testing. Please consult the +- testing ++ testing + documentation for more details. +

    + If you find bugs in the testsuite programs themselves, or if you + think of a new test program that should be added to the suite, + please write up your idea and send it to the list! +-

    3.4.

    How do I insure that the dynamically linked library will be found? +-

    ++

    3.4.

    How do I insure that the dynamically linked library will be found? ++

    + Depending on your platform and library version, the error message might + be similar to one of the following: +

    +@@ -318,9 +318,9 @@
    +     

    + Using LD_LIBRARY_PATH is not always the best solution, Finding Dynamic or Shared + Libraries in the manual gives some alternatives. +-

    3.5.

    ++

    3.5.

    + What's libsupc++? +-

    ++

    + If the only functions from libstdc++.a + which you need are language support functions (those listed in + clause 18 of the +@@ -335,9 +335,9 @@ + using anything from the rest of the library, such as IOStreams + or vectors, then you'll still need pieces from + libstdc++.a. +-

    3.6.

    ++

    3.6.

    + This library is HUGE! +-

    ++

    + Usually the size of libraries on disk isn't noticeable. When a + link editor (or simply linker) pulls things from a + static archive library, only the necessary object files are copied +@@ -382,9 +382,9 @@ + Recent GNU/Linux glibc required? +

    4.8. + Can't use wchar_t/wstring on FreeBSD +-

    4.1.

    ++

    4.1.

    + Can libstdc++ be used with non-GNU compilers? +-

    ++

    + Perhaps. +

    + Since the goal of ISO Standardization is for all C++ +@@ -402,9 +402,9 @@ + been known to work with versions of the EDG C++ compiler, and + vendor-specific proprietary C++ compilers such as the Intel ICC + C++ compiler. +-

    4.2.

    ++

    4.2.

    + No 'long long' type on Solaris? +-

    ++

    + By default we try to support the C99 long long type. + This requires that certain functions from your C library be present. +

    +@@ -414,9 +414,9 @@ + commonly reported platform affected was Solaris. +

    + This has been fixed for libstdc++ releases greater than 3.0.3. +-

    4.3.

    ++

    4.3.

    + _XOPEN_SOURCE and _GNU_SOURCE are always defined? +-

    On Solaris, g++ (but not gcc) always defines the preprocessor ++

    On Solaris, g++ (but not gcc) always defines the preprocessor + macro _XOPEN_SOURCE. On GNU/Linux, the same happens + with _GNU_SOURCE. (This is not an exhaustive list; + other macros and other platforms are also affected.) +@@ -440,18 +440,18 @@ + g++ -E -dM - < /dev/null" to display + a list of predefined macros for any particular installation. +

    This has been discussed on the mailing lists +- quite a bit. ++ quite a bit. +

    This method is something of a wart. We'd like to find a cleaner + solution, but nobody yet has contributed the time. +-

    4.4.

    ++

    4.4.

    + Mac OS X ctype.h is broken! How can I fix it? +-

    This is a long-standing bug in the OS X support. Fortunately, ++

    This is a long-standing bug in the OS X support. Fortunately, + the patch is quite simple, and well-known. +- Here's a ++ Here's a + link to the solution. +-

    4.5.

    ++

    4.5.

    + Threading is broken on i386? +-

    ++

    +

    Support for atomic integer operations is/was broken on i386 + platforms. The assembly code accidentally used opcodes that are + only available on the i486 and later. So if you configured GCC +@@ -459,9 +459,9 @@ + on an i686, then you would encounter no problems. Only when + actually running the code on a i386 will the problem appear. +

    This is fixed in 3.2.2. +-

    4.6.

    ++

    4.6.

    + MIPS atomic operations +-

    ++

    + The atomic locking routines for MIPS targets requires MIPS II + and later. A patch went in just after the 3.3 release to + make mips* use the generic implementation instead. You can also +@@ -469,9 +469,9 @@ +

    + The mips*-*-linux* port continues to use the MIPS II routines, and more + work in this area is expected. +-

    4.7.

    ++

    4.7.

    + Recent GNU/Linux glibc required? +-

    When running on GNU/Linux, libstdc++ 3.2.1 (shared library version ++

    When running on GNU/Linux, libstdc++ 3.2.1 (shared library version + 5.0.1) and later uses localization and formatting code from the system + C library (glibc) version 2.2.5 which contains necessary bugfixes. + Most GNU/Linux distros make more recent versions available now. +@@ -480,9 +480,9 @@ +

    The guideline is simple: the more recent the C++ library, the + more recent the C library. (This is also documented in the main + GCC installation instructions.) +-

    4.8.

    ++

    4.8.

    + Can't use wchar_t/wstring on FreeBSD +-

    ++

    + Older versions of FreeBSD's C library do not have sufficient + support for wide character functions, and as a result the + libstdc++ configury decides that wchar_t support should be +@@ -499,9 +499,9 @@ + Bugs in the ISO C++ language or library specification +

    5.3. + Bugs in the compiler (gcc/g++) and not libstdc++ +-

    5.1.

    ++

    5.1.

    + What works already? +-

    ++

    + Short answer: Pretty much everything works + except for some corner cases. Support for localization + in locale may be incomplete on non-GNU +@@ -513,24 +513,24 @@ + C++98, + TR1, and + C++11. +-

    5.2.

    ++

    5.2.

    + Bugs in the ISO C++ language or library specification +-

    ++

    + Unfortunately, there are some. +

    + For those people who are not part of the ISO Library Group + (i.e., nearly all of us needing to read this page in the first + place), a public list of the library defects is occasionally +- published on the WG21 ++ published on the WG21 + website. + Some of these issues have resulted in code changes in libstdc++. +

    + If you think you've discovered a new bug that is not listed, + please post a message describing your problem to the author of + the library issues list or the Usenet group comp.lang.c++.moderated. +-

    5.3.

    ++

    5.3.

    + Bugs in the compiler (gcc/g++) and not libstdc++ +-

    ++

    + On occasion, the compiler is wrong. Please be advised that this + happens much less often than one would think, and avoid jumping to + conclusions. +@@ -541,7 +541,7 @@ + these lists with terms describing your issue. +

    + Before reporting a bug, please examine the +- bugs database with the ++ bugs database with the + category set to g++. +

    6.1. + Reopening a stream fails +@@ -563,19 +563,19 @@ + list::size() is O(n)! +
    6.9. + Aw, that's easy to fix! +-

    6.1.

    ++

    6.1.

    + Reopening a stream fails +-

    ++

    + One of the most-reported non-bug reports. Executing a sequence like: +-


    +-    #include <fstream>
    +-    ...
    +-    std::fstream  fs(a_file);
    +-    // .
    +-    // . do things with fs...
    +-    // .
    +-    fs.close();
    +-    fs.open(a_new_file);
    ++


    ++    #include <fstream>
    ++    ...
    ++    std::fstream  fs(a_file);
    ++    // .
    ++    // . do things with fs...
    ++    // .
    ++    fs.close();
    ++    fs.open(a_new_file);
    +     

    + All operations on the re-opened fs will fail, or at + least act very strangely. Yes, they often will, especially if +@@ -590,9 +590,9 @@ + Update: for GCC 4.0 we implemented the resolution + of DR #409 and open() + now calls clear() on success! +-

    6.2.

    ++

    6.2.

    + -Weffc++ complains too much +-

    ++

    + Many warnings are emitted when -Weffc++ is used. Making + libstdc++ -Weffc++-clean is not a goal of the project, + for a few reasons. Mainly, that option tries to enforce +@@ -602,21 +602,21 @@ + We do, however, try to have libstdc++ sources as clean as possible. If + you see some simple changes that pacify -Weffc++ + without other drawbacks, send us a patch. +-

    6.3.

    ++

    6.3.

    + Ambiguous overloads after including an old-style header +-

    ++

    + Another problem is the rel_ops namespace and the template + comparison operator functions contained therein. If they become + visible in the same namespace as other comparison functions + (e.g., using them and the <iterator> header), + then you will suddenly be faced with huge numbers of ambiguity + errors. This was discussed on the -v3 list; Nathan Myers +- sums ++ sums + things up here. The collisions with vector/string iterator + types have been fixed for 3.1. +-

    6.4.

    ++

    6.4.

    + The g++-3 headers are not ours +-

    ++

    + If you are using headers in + ${prefix}/include/g++-3, or if the installed + library's name looks like libstdc++-2.10.a or +@@ -630,10 +630,10 @@ + 'v'?). Starting with version 3.2 the headers are installed in + ${prefix}/include/c++/${version} as this prevents + headers from previous versions being found by mistake. +-

    6.5.

    ++

    6.5.

    + Errors about *Concept and + constraints in the STL +-

    ++

    + If you see compilation errors containing messages about + foo Concept and something to do with a + constraints member function, then most +@@ -647,31 +647,31 @@ + checks, is available in the + Diagnostics. + chapter of the manual. +-

    6.6.

    ++

    6.6.

    + Program crashes when using library code in a + dynamically-loaded library +-

    ++

    + If you are using the C++ library across dynamically-loaded + objects, make certain that you are passing the correct options + when compiling and linking: +-


    +-    // compile your library components
    +-    g++ -fPIC -c a.cc
    +-    g++ -fPIC -c b.cc
    +-    ...
    +-    g++ -fPIC -c z.cc
    +-
    +-    // create your library
    +-    g++ -fPIC -shared -rdynamic -o libfoo.so a.o b.o ... z.o
    +-
    +-    // link the executable
    +-    g++ -fPIC -rdynamic -o foo ... -L. -lfoo -ldl
    +-    

    6.7.

    ++


    ++    // compile your library components
    ++    g++ -fPIC -c a.cc
    ++    g++ -fPIC -c b.cc
    ++    ...
    ++    g++ -fPIC -c z.cc
    ++
    ++    // create your library
    ++    g++ -fPIC -shared -rdynamic -o libfoo.so a.o b.o ... z.o
    ++
    ++    // link the executable
    ++    g++ -fPIC -rdynamic -o foo ... -L. -lfoo -ldl
    ++    

    6.7.

    + Memory leaks in containers +-

    ++

    + A few people have reported that the standard containers appear + to leak memory when tested with memory checkers such as +- valgrind. ++ valgrind. + The library's default allocators keep free memory in a pool + for later reuse, rather than returning it to the OS. Although + this memory is always reachable by the library and is never +@@ -679,18 +679,18 @@ + want to test the library for memory leaks please read + Tips for memory leak hunting + first. +-

    6.8.

    ++

    6.8.

    + list::size() is O(n)! +-

    ++

    + See + the Containers + chapter. +-

    6.9.

    ++

    6.9.

    + Aw, that's easy to fix! +-

    ++

    + If you have found a bug in the library and you think you have + a working fix, then send it in! The main GCC site has a page +- on submitting ++ on submitting + patches that covers the procedure, but for libstdc++ you + should also send the patch to our mailing list in addition to + the GCC patches mailing list. The libstdc++ +@@ -718,9 +718,9 @@ + What's an ABI and why is it so messy? +

    7.8. + How do I make std::vector<T>::capacity() == std::vector<T>::size? +-

    7.1.

    ++

    7.1.

    + string::iterator is not char*; vector<T>::iterator is not T* +-

    ++

    + If you have code that depends on container<T> iterators + being implemented as pointer-to-T, your code is broken. It's + considered a feature, not a bug, that libstdc++ points this out. +@@ -737,9 +737,9 @@ + certain expressions to &*i. Future revisions + of the Standard are expected to bless this usage for + vector<> (but not for basic_string<>). +-

    7.2.

    ++

    7.2.

    + What's next after libstdc++? +-

    ++

    + Hopefully, not much. The goal of libstdc++ is to produce a + fully-compliant, fully-portable Standard Library. After that, + we're mostly done: there won't be any +@@ -748,12 +748,12 @@ + There is an effort underway to add significant extensions to + the standard library specification. The latest version of + this effort is described in +- ++ + The C++ Library Technical Report 1. +-

    7.3.

    ++

    7.3.

    + What about the STL from SGI? +-

    +- The STL from SGI, ++

    ++ The STL from SGI, + version 3.3, was the final merge of the STL codebase. The + code in libstdc++ contains many fixes and changes, and + the SGI code is no longer under active +@@ -773,24 +773,24 @@ +

    + The FAQ for SGI's STL (one jump off of their main page) is + still recommended reading. +-

    7.4.

    ++

    7.4.

    + Extensions and Backward Compatibility +-

    ++

    + See the link on backwards compatibility and link on evolution. +-

    7.5.

    ++

    7.5.

    + Does libstdc++ support TR1? +-

    ++

    + Yes. +

    + The C++ Standard Library Technical Report adds many new features to + the library. The latest version of this effort is described in +- ++ + Technical Report 1. +

    + The implementation status of TR1 in libstdc++ can be tracked on the TR1 status + page. +-

    7.6.

    How do I get a copy of the ISO C++ Standard? +-

    ++

    7.6.

    How do I get a copy of the ISO C++ Standard? ++

    + Copies of the full ISO 14882 standard are available on line via + the ISO mirror site for committee members. Non-members, or those + who have not paid for the privilege of sitting on the committee +@@ -798,19 +798,19 @@ + get a copy of the standard from their respective national + standards organization. In the USA, this national standards + organization is ANSI and their website is +- right here. (And if ++ right here. (And if + you've already registered with them, clicking this link will take + you to directly to the place where you can +- buy the standard on-line. ++ buy the standard on-line. +

    + Who is your country's member body? Visit the +- ISO homepage and find out! ++ ISO homepage and find out! +

    + The 2003 version of the standard (the 1998 version plus TC1) is + available in print, ISBN 0-470-84674-7. +-

    7.7.

    ++

    7.7.

    + What's an ABI and why is it so messy? +-

    ++

    + ABI stands for Application Binary + Interface. Conventionally, it refers to a great + mass of details about how arguments are arranged on the call +@@ -856,17 +856,17 @@ + so they may later be changed. Deciding which, and implementing + the decisions, must happen before you can reasonably document a + candidate C++ ABI that encompasses the standard library. +-

    7.8.

    ++

    7.8.

    + How do I make std::vector<T>::capacity() == std::vector<T>::size? +-

    ++

    + The standard idiom for deallocating a vector<T>'s + unused memory is to create a temporary copy of the vector and swap their + contents, e.g. for vector<T> v +-


    +-     std::vector<T>(v).swap(v);
    ++


    ++     std::vector<T>(v).swap(v);
    +     

    + The copy will take O(n) time and the swap is constant time. +

    + See Shrink-to-fit + strings for a similar solution for strings. +-

    ++

    +Index: libstdc++-v3/doc/html/index.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/index.html (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/doc/html/index.html (.../branches/gcc-4_7-branch) +@@ -1,8 +1,8 @@ + +- +-The GNU C++ Library

    Short Contents

    ++ ++The GNU C++ Library

    The GNU C++ Library

    Short Contents

    + Copyright 2008, 2009, 2011 +- FSF ++ FSF + +

    + Permission is granted to copy, distribute and/or modify this +@@ -14,14 +14,14 @@ + This is the top level of the libstdc++ documentation set. The + documentation is divided into the following three sections. +

    +-



    Table of Contents

    The GNU C++ Library Manual
    I. + Introduction + +
    1. Status
    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs
    2. Setup
    Prerequisites
    Configure
    Make
    3. Using
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis
    II. +@@ -35,13 +35,13 @@ +
    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking
    6. + Utilities + +-
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. ++
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. + Strings + +
    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)
    8. + Localization + +-
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. ++
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. + Containers + +
    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays
    10. +@@ -65,7 +65,7 @@ +
    API Reference
    III. + Extensions + +-
    16. Compile Time Checks
    17. Debug Mode
    Intro
    Semantics
    Using
    Using the Debug Mode
    Using a Specific Debug Container
    Design
    Goals
    Methods
    The Wrapper Model
    Safe Iterators
    Safe Sequences (Containers)
    Precondition Checking
    Release- and debug-mode coexistence
    Compile-time coexistence of release- and debug-mode components
    Link- and run-time coexistence of release- and ++
    16. Compile Time Checks
    17. Debug Mode
    Intro
    Semantics
    Using
    Using the Debug Mode
    Using a Specific Debug Container
    Design
    Goals
    Methods
    The Wrapper Model
    Safe Iterators
    Safe Sequences (Containers)
    Precondition Checking
    Release- and debug-mode coexistence
    Compile-time coexistence of release- and debug-mode components
    Link- and run-time coexistence of release- and + debug-mode components
    Alternatives for Coexistence
    Other Implementations
    18. Parallel Mode
    Intro
    Semantics
    Using
    Prerequisite Compiler Flags
    Using Parallel Mode
    Using Specific Parallel Components
    Design
    Interface Basics
    Configuration and Tuning
    Setting up the OpenMP Environment
    Compile Time Switches
    Run Time Settings and Defaults
    Implementation Namespaces
    Testing
    Bibliography
    19. Profile Mode
    Intro
    Using the Profile Mode
    Tuning the Profile Mode
    Design
    Wrapper Model
    Instrumentation
    Run Time Behavior
    Analysis and Diagnostics
    Cost Model
    Reports
    Testing
    Extensions for Custom Containers
    Empirical Cost Model
    Implementation Issues
    Stack Traces
    Symbolization of Instruction Addresses
    Concurrency
    Using the Standard Library in the Instrumentation Implementation
    Malloc Hooks
    Construction and Destruction of Global Objects
    Developer Information
    Big Picture
    How To Add A Diagnostic
    Diagnostics
    Diagnostic Template
    Containers
    Hashtable Too Small
    Hashtable Too Large
    Inefficient Hash
    Vector Too Small
    Vector Too Large
    Vector to Hashtable
    Hashtable to Vector
    Vector to List
    List to Vector
    List to Forward List (Slist)
    Ordered to Unordered Associative Container
    Algorithms
    Sort Algorithm Performance
    Data Locality
    Need Software Prefetch
    Linked Structure Locality
    Multithreaded Data Access
    Data Dependence Violations at Container Level
    False Sharing
    Statistics
    Bibliography
    20. The mt_allocator
    Intro
    Design Issues
    Overview
    Implementation
    Tunable Parameters
    Initialization
    Deallocation Notes
    Single Thread Example
    Multiple Thread Example
    21. The bitmap_allocator
    Design
    Implementation
    Free List Store
    Super Block
    Super Block Data Layout
    Maximum Wasted Percentage
    allocate
    deallocate
    Questions
    1
    2
    3
    Locality
    Overhead and Grow Policy
    22. Policy-Based Data Structures
    Intro
    Performance Issues
    Associative
    Priority Que
    Goals
    Associative
    Policy Choices
    Underlying Data Structures
    Iterators
    Functional
    Priority Queues
    Policy Choices
    Underlying Data Structures
    Binary Heaps
    Using
    Prerequisites
    Organization
    Tutorial
    Basic Use
    + Configuring via Template Parameters +
    +@@ -165,4 +165,4 @@ + +
    D. + GNU General Public License version 3 +-
    E. GNU Free Documentation License
    The GNU C++ Library API Reference
    Frequently Asked Questions
    ++
    E. GNU Free Documentation License
    The GNU C++ Library API Reference
    Frequently Asked Questions
    +Index: libstdc++-v3/doc/html/api.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/api.html (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/doc/html/api.html (.../branches/gcc-4_7-branch) +@@ -1,16 +1,16 @@ + +- +-The GNU C++ Library API Reference

    The GNU C++ Library API Reference


    ++


    + The GNU C++ library sources have been specially formatted so that + with the proper invocation of another tool (Doxygen), a set of + indexed reference material can generated from the sources files +@@ -20,29 +20,29 @@ + particular include file, looking at inheritance diagrams, etc. +

    + The API documentation, rendered into HTML, can be viewed online: +-

    ++

    +Index: libstdc++-v3/doc/html/manual/iterators.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/iterators.html (.../tags/gcc_4_7_2_release) ++++ b/src/libstdc++-v3/doc/html/manual/iterators.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,14 @@ + +- +-Chapter 10.  Iterators

    Predefined

    Iterators vs. Pointers

    + The following + FAQ entry points out that + iterators are not implemented as pointers. They are a generalization +@@ -44,7 +44,7 @@ + down through inheritance, so while the compiler has to do work + looking up all the names, your runtime code does not. (This has + been a prime concern from the beginning.) +-

    One Past the End

    This starts off sounding complicated, but is actually very easy, + especially towards the end. Trust me. +

    Beginners usually have a little trouble understand the whole + 'past-the-end' thing, until they remember their early algebra classes +@@ -53,7 +53,7 @@ +

    First, some history, and a reminder of some of the funkier rules in + C and C++ for builtin arrays. The following rules have always been + true for both languages: +-

    1. You can point anywhere in the array, or to the first element ++

      1. You can point anywhere in the array, or to the first element + past the end of the array. A pointer that points to one + past the end of the array is guaranteed to be as unique as a + pointer to somewhere inside the array, so that you can compare +@@ -124,7 +124,7 @@ + sequences very simple to recognize: if the two endpoints compare + equal, then the {array, sequence, container, whatever} is empty. +

        Just don't dereference end(). +-