I check ubuntu bionic branch (4.15.0-130.134), this error of backporting patch (arm64: cpufeature: Detect SSBS and advertise to userspace) still exist. Can you refer to this follow patch to fix this issue?
--- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1070,6 +1070,19 @@ static const struct arm64_cpu_capabilities arm64_features [] = { .cpu_enable = cpu_enable_pan, }, #endif /* CONFIG_ARM64_PAN */ +#ifdef CONFIG_ARM64_SSBD + { + .desc = "Speculative Store Bypassing Safe (SSBS)", + .capability = ARM64_SSBS, + .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, + .matches = has_cpuid_feature, + .sys_reg = SYS_ID_AA64PFR1_EL1, + .field_pos = ID_AA64PFR1_SSBS_SHIFT, + .sign = FTR_UNSIGNED, + .min_field_value = ID_AA64PFR1_SSBS_PSTATE_ONLY, + .cpu_enable = cpu_enable_ssbs, + }, +#endif #if defined(CONFIG_AS_LSE) && defined(CONFIG_ARM64_LSE_ATOMICS) { .desc = "LSE atomic instructions", @@ -1253,19 +1266,6 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { #ifdef CONFIG_ARM64_SVE HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_SVE_SHIFT, FTR_UNSIGNED, ID_AA64PFR0_SVE, CAP_HWCAP, HWCAP_SVE), #endif -#ifdef CONFIG_ARM64_SSBD - { - .desc = "Speculative Store Bypassing Safe (SSBS)", - .capability = ARM64_SSBS, - .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, - .matches = has_cpuid_feature, - .sys_reg = SYS_ID_AA64PFR1_EL1, - .field_pos = ID_AA64PFR1_SSBS_SHIFT, - .sign = FTR_UNSIGNED, - .min_field_value = ID_AA64PFR1_SSBS_PSTATE_ONLY, - .cpu_enable = cpu_enable_ssbs, - }, -#endif
I check ubuntu bionic branch (4.15.0-130.134), this error of backporting patch (arm64: cpufeature: Detect SSBS and advertise to userspace) still exist. Can you refer to this follow patch to fix this issue?
--- a/arch/ arm64/kernel/ cpufeature. c arm64/kernel/ cpufeature. c capabilities arm64_features
.cpu_ enable = cpu_enable_pan, WEAK_LOCAL_ CPU_FEATURE, AA64PFR1_ EL1, SSBS_SHIFT, SSBS_PSTATE_ ONLY, CONFIG_ AS_LSE) && defined( CONFIG_ ARM64_LSE_ ATOMICS)
.desc = "LSE atomic instructions", capabilities arm64_elf_hwcaps[] = {
HWCAP_ CAP(SYS_ ID_AA64PFR0_ EL1, ID_AA64PFR0_ SVE_SHIFT, FTR_UNSIGNED, ID_AA64PFR0_SVE, CAP_HWCAP, HWCAP_SVE), WEAK_LOCAL_ CPU_FEATURE, AA64PFR1_ EL1, SSBS_SHIFT, SSBS_PSTATE_ ONLY,
+++ b/arch/
@@ -1070,6 +1070,19 @@ static const struct arm64_cpu_
[] = {
},
#endif /* CONFIG_ARM64_PAN */
+#ifdef CONFIG_ARM64_SSBD
+ {
+ .desc = "Speculative Store Bypassing Safe (SSBS)",
+ .capability = ARM64_SSBS,
+ .type = ARM64_CPUCAP_
+ .matches = has_cpuid_feature,
+ .sys_reg = SYS_ID_
+ .field_pos = ID_AA64PFR1_
+ .sign = FTR_UNSIGNED,
+ .min_field_value = ID_AA64PFR1_
+ .cpu_enable = cpu_enable_ssbs,
+ },
+#endif
#if defined(
{
@@ -1253,19 +1266,6 @@ static const struct arm64_cpu_
#ifdef CONFIG_ARM64_SVE
#endif
-#ifdef CONFIG_ARM64_SSBD
- {
- .desc = "Speculative Store Bypassing Safe (SSBS)",
- .capability = ARM64_SSBS,
- .type = ARM64_CPUCAP_
- .matches = has_cpuid_feature,
- .sys_reg = SYS_ID_
- .field_pos = ID_AA64PFR1_
- .sign = FTR_UNSIGNED,
- .min_field_value = ID_AA64PFR1_
- .cpu_enable = cpu_enable_ssbs,
- },
-#endif