Confusing using the *Via dia、via drill* (design rules editor) in Pcbnew?

Asked by CWang

when should i confige the two values?

Question information

Language:
English Edit question
Status:
Solved
For:
KiCad Edit question
Assignee:
No assignee Edit question
Solved by:
Wayne Stambaugh
Solved:
Last query:
Last reply:
Revision history for this message
Best Wayne Stambaugh (stambaughw) said :
#1

The short answer is it depends. Setting the via and micro-via for each net class is useful when you define different trace widths that you want to use for specific layout purposes such as power traces that have to carry higher currents. Generally speaking you would create a new net class defined with a wider trace and increase the via and micro via sizes to match your trace widths. Setting the minimum trace, via, and micro-via sizes in the global design rules is useful to make sure you don't exceed you board providers minimum capabilities. You cannot define trace, via, and micro-via sizes less than the minimum sizes defined tin the global design rules. This can vary greatly from provider to provider so setting these limits prevents design rule rejections when submitting your Gerber files to a board vendor.

Revision history for this message
CWang (zjsxhswc+01) said :
#2

Thanks Wayne Stambaugh, that solved my question.