Issues while compiling inline assembly

Asked by Hugo Miguel Eira Araújo on 2017-09-23

I'm trying to run FreeRTOS on a Cortex-M23 but I'm having some trouble while compiling the port.c source file. Problem is when it tries to assemble the inline assembly instructions present in the port.c file.

These are the error messages:

/tmp/cc2wzRQA.s: Assembler messages:
/tmp/cc2wzRQA.s:211: Error: lo register required -- `ldmia r0!,{r4-r11,r14}'
/tmp/cc2wzRQA.s:664: Error: selected processor does not support `stmdb r0!,{r4-r11,r14}' in Thumb mode
/tmp/cc2wzRQA.s:668: Error: selected processor does not support `stmdb sp!,{r3}' in Thumb mode
/tmp/cc2wzRQA.s:676: Error: lo register required -- `ldmia sp!,{r3}'
/tmp/cc2wzRQA.s:681: Error: lo register required -- `ldmia r0!,{r4-r11,r14}'

And these are the flags I'm sending to the compiler: -std=c11 -c -g -O0 -Wall -Werror -mcmse -mthumb -mcpu=cortex-m23 --specs=nano.specs

toolchain: GNU Tools for ARM Embedded Processors 6-2017-q2-update

I wonder what's the problem here... Does anyone know how to solve this? Thanks in advance.

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GNU Arm Embedded Toolchain Edit question
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Solved by:
Tejas Belagod
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Last reply:

Apparently the compiler doesn't allow me to use thumb2 instructions, am I right? But doesn't the ARMv8-M architecture support thumb2? Is it some problem with the toolchain?

Best Tejas Belagod (belagod-tejas) said : #2

Cortex-M23 is Armv8-M Baseline architecture is an extension of the Armv6-M which is more Thumb1. There are a few 32-bit instructions added to Armv8-M Baseline, but its not entirely Thumb2. Here are whitepapers that will give you an idea

Thanks Tejas Belagod, that solved my question.