MOV instruction always assembled as MOVW

Asked by Dan Lewis

There are two versions of the MOV instruction. An instruction like

      MOV R0,1

using an 8-bit constant should assemble into a 16-bit instruction, while an instruction like

     MOVW R0,10000 // May also be written as MOV.W R0,1000

assembles into a 32-bit instruction in order to be able to use a 16-bit constant.

However, I find that the first example above generates:

     MOV.W R0,1

which is a 32-bit instruction.

Shouldn't the assembler use the smallest possible representation?


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GNU Arm Embedded Toolchain Edit question
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Thomas Preud'homme (thomas-preudhomme) said :

Hi Dan,

I can confirm your issue. I agree that it would be nice to use the smallest representation possible for a mov but the code is not currently written to have that kind of behavior and rewriting it would require a substential amount of work. I'm sure this is not the answer you are looking for but right now your only solution is to use movs instead.

Best regards.

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Dan Lewis (danielwlewis) said :

Hi Thomas,

After I posted my inquiry, I did a bit more research and discovered that the only 16-bit Thumb versions of the MOV immediate instruction are such that (1) outside an IT block, only MOVS exists, and (2) inside an IT block, only MOV<c> exists, where <c> is a condition code.

In other words, you're correct: There is no 16-bit version of a MOV immediate that can be used outside an IT block that does not affect the flags.

Reference: Section A6.7.75 of ARM®v7-M Architecture Reference Manual (Feb 2010).



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