GNU Arm Embedded Toolchain

armr5-none-eabi-gcc compiler

Asked by Yun Qu

I used the following flag to compile my code on cortex R5F. armr5 compiler is of version 4.8.4.

CFLAGS_CORTEX_R5 = -static -mlittle-endian -mcpu=cortex-r5 -mfloat-abi=softfp -mfpu=vfpv3-d16 -fsingle-precision-constant -Wdouble-promotion

Notice that I have used vfpv3-d16 option, so I should use at most 16 double precision floating point registers (d0 - d15), which is supported on this ARM core.

However, when I check the binaries, it seems that there are still a lot of codes using d16, d21, etc. For example:

vmulvs.f64 d2, d0, d16
...
vfmacc.f64 d21, d12, d12
...

This should not happen for the option I used. Why?

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Andre Vieira (andre-simoesdiasvieira) said : 		#1

Hi Yun,

I haven't been able to reproduce this on our latest release 4.9Q3. Could you try to see if a newer version of the compiler exhibits the same behavior?

Kind Regards,

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Yun Qu (paradisequyun) said : 		#2

Hi Andre,

Can you provide the flags you used for compilation? Also, I was wondering if you were targeting the arm R5 processor?

Thanks,

Yun Rock Qu

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Andre Vieira (andre-simoesdiasvieira) said : 		#3

Hi Yun,

I used the flags you mentioned above. Could you provide us with a testcase exhibiting this behavior please?

Kind Regards,

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Yun Qu (paradisequyun) said : 		#4

It is not convenient to expose this internal project, so I decided to remove this question and ask for internal help.

Thanks anyway!