LTO and naked functions?

Asked by gastro54

I am having trouble getting a FreeRTOS project to build with -flto. It builds fine without the -flto flag.

It's complaining about symbols used in __attribute__(( naked)), (assembly-only) functions. Any ideas what may be going on?

ARCH_FLAGS = -mthumb -mcpu=cortex-m0plus
CFLAGS = $(ARCH_FLAGS) -std=c99 -g3 -ffunction-sections -fdata-sections -Wall -flto -fpic -Os
LFLAGS = $(ARCH_FLAGS) -Wl,--gc-sections -Wl,-Map=$(NAME).map --specs=nosys.specs -T$(LD_SCRIPT)

$(NAME).elf: $(SRCS)
 $(CC) $^ $(CFLAGS) $(LFLAGS) -o $@ -lm
 arm-none-eabi-size $@

`pxCurrentTCB' referenced in section `.text.vPortStartFirstTask' of C:\Users\amastro\AppData\Local\Temp\ccVReNMj.ltrans0.ltrans.o: defined in discarded section `.text' of C:\Users\amastro\AppData\Local\Temp\ccp3jDRf.o (symbol from plugin)
`vTaskSwitchContext' referenced in section `.text.PendSV_Handler' of C:\Users\amastro\AppData\Local\Temp\ccVReNMj.ltrans0.ltrans.o: defined in discarded section `.text' of C:\Users\amastro\AppData\Local\Temp\ccp3jDRf.o (symbol from plugin)
`pxCurrentTCB' referenced in section `.text.PendSV_Handler' of C:\Users\amastro\AppData\Local\Temp\ccVReNMj.ltrans0.ltrans.o: defined in discarded section `.text' of C:\Users\amastro\AppData\Local\Temp\ccp3jDRf.o (symbol from plugin)

Here are the declarations and definitions for PendSV_Handler

platforms\atsamr21g18\FreeRTOSConfig.h:72:9:#define xPortPendSVHandler PendSV_Handler
platforms\atsamr21g18\freertos\port.c:111:6:void xPortPendSVHandler( void ) __attribute__ (( naked ));

void xPortPendSVHandler( void )
{
 /* This is a naked function. */

 __asm volatile
 (
 " mrs r0, psp \n"
 " \n"
 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
 " ldr r2, [r3] \n"
 " \n"
 " sub r0, r0, #32 \n" /* Make space for the remaining low registers. */
 " str r0, [r2] \n" /* Save the new top of stack. */
 " stmia r0!, {r4-r7} \n" /* Store the low registers that are not saved automatically. */
 " mov r4, r8 \n" /* Store the high registers. */
 " mov r5, r9 \n"
 " mov r6, r10 \n"
 " mov r7, r11 \n"
 " stmia r0!, {r4-r7} \n"
 " \n"
 " push {r3, r14} \n"
 " cpsid i \n"
 " bl vTaskSwitchContext \n"
 " cpsie i \n"
 " pop {r2, r3} \n" /* lr goes in r3. r2 now holds tcb pointer. */
 " \n"
 " ldr r1, [r2] \n"
 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
 " add r0, r0, #16 \n" /* Move to the high registers. */
 " ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
 " mov r8, r4 \n"
 " mov r9, r5 \n"
 " mov r10, r6 \n"
 " mov r11, r7 \n"
 " \n"
 " msr psp, r0 \n" /* Remember the new top of stack for the task. */
 " \n"
 " sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
 " ldmia r0!, {r4-r7} \n" /* Pop low registers. */
 " \n"
 " bx r3 \n"
 " \n"
 " .align 2 \n"
 "pxCurrentTCBConst: .word pxCurrentTCB "
 );
}

platforms\atsamr21g18\freertos\port.c:118:13:static void vPortStartFirstTask( void ) __attribute__ (( naked ));

void vPortStartFirstTask( void )
{
 /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
 table offset register that can be used to locate the initial stack value.
 Not all M0 parts have the application vector table at address 0. */
 __asm volatile(
 " ldr r2, pxCurrentTCBConst2 \n" /* Obtain location of pxCurrentTCB. */
 " ldr r3, [r2] \n"
 " ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
 " add r0, #32 \n" /* Discard everything up to r0. */
 " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
 " movs r0, #2 \n" /* Switch to the psp stack. */
 " msr CONTROL, r0 \n"
 " pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
 " mov lr, r5 \n" /* lr is now in r5. */
 " cpsie i \n" /* The first task has its context and interrupts can be enabled. */
 " pop {pc} \n" /* Finally, pop the PC to jump to the user defined task code. */
 " \n"
 " .align 2 \n"
 "pxCurrentTCBConst2: .word pxCurrentTCB "
      );
}

Question information

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Revision history for this message
Thomas Preud'homme (thomas-preudhomme) said :
#1

Hi,

I don't see the -flto switch in your LFLAGS, yet it is needed both when compiling and linking. Does your problem go away when adding -flto on the link command line as well?

Best regards.

Revision history for this message
gastro54 (opsound) said :
#2

Hi Thomas,

-flto only needs to be included once since compilation and linking happen in a single invocation of $(CC). I'm following the same Make pattern as the examples provided with the GCC ARM Embedded toolchain.

$(NAME).elf: $(SRCS)
    $(CC) $^ $(CFLAGS) $(LFLAGS) -o $@ -lm
    arm-none-eabi-size $@

This is analogous to the LTO use example in the GCC docs.

https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
"
Another (simpler) way to enable link-time optimization is:

          gcc -o myprog -flto -O2 foo.c bar.c
"

Revision history for this message
Thomas Preud'homme (thomas-preudhomme) said :
#3

Hi,

After giving it more thought it seems now quite expected. Since naked function are made of basic assembly (as opposed to extended assembly), the compiler has no visibility into what happens inside. In particular, it doesn't know the symbol that the function references. Therefore if a symbol (such as vTaskSwitchContext in this example) is only referenced by naked functions and the program is compiled with LTO, the compiler will think the symbol is not used and will optimize it away.

It appears that your only option is to add the attribute "used" to such functions. See [1] for more information about this attribute.

[1] https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html

Best regards.

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