GNU Arm Embedded Toolchain

svc call causes an interrupt

Asked by adnan

with the mpu disabled in cortex-r4 when I call the svc instruction everything works and I get the expected result
however when the mpu enabled a SWI interrupt is called.

currently I am making a call to get time
so I move 13 in r0 and then call "svc 0c123456" .

what could be the problem ?

I have tried to create a background region from 0 - 4GB but the problem still prevails.
may be I am not doing it right. Can any one help me to create a background region (if it is the problem)

Question information

Language:
English Edit question
Status:
Solved
For:
GNU Arm Embedded Toolchain Edit question
Assignee:
No assignee Edit question
Solved by:
jdobry
Solved:
Last query:
Last reply:
Revision history for this message
Best jdobry (jdobry) said : 		#1

You can try to enable backgroung region (in MPU terminology)
 mrc p15, #0, r0, c1, c0, #0 // SCTLR, System Control Register
 orr r0, r0, #0x20000 // BR, bit[17] Background Region bit.
 mcr p15, #0, r0, c1, c0, #0 // SCTLR, System Control Register

And generally. For any diagnostic around MPU you need to know status registers after MPU fail. Mainly IFAR, IFSR, DFAR, DFSR.
Very helpful is exception catch and dump conditions whats happen.

Revision history for this message
adnan (m-adnanali-1) said : 		#3

Thanks jdobry, that solved my question.