some contants are not in the correct section

Asked by Maik Siebrand on 2014-04-30

for the malloc and realloc functions the function malloc_r use constants

__malloc_top_pad, __malloc_max_total_mem, __malloc_max_sbrked_mem.

in the map file I can see

########################################################################
               0x2001e620 . = ALIGN (0x4)
                0x2001e620 _ebss = .
                0x2001e620 __bss_end__ = .

.bss.__malloc_max_total_mem
                0x2001e620 0x4 load address 0x081070a8
 .bss.__malloc_max_total_mem
                0x2001e620 0x4 d:/programme/arm_toolchain/bin/../lib/gcc/arm-none-eabi/4.8.3/../../../../arm-none-eabi/lib/armv7e-m\libg.a(lib_a-mallocr.o)
                0x2001e620 __malloc_max_total_mem

.bss.__malloc_max_sbrked_mem
                0x2001e624 0x4 load address 0x081070ac
 .bss.__malloc_max_sbrked_mem
                0x2001e624 0x4 d:/programme/arm_toolchain/bin/../lib/gcc/arm-none-eabi/4.8.3/../../../../arm-none-eabi/lib/armv7e-m\libg.a(lib_a-mallocr.o)
                0x2001e624 __malloc_max_sbrked_mem

.bss.__malloc_top_pad
                0x2001e628 0x4 load address 0x081070b0
 .bss.__malloc_top_pad
                0x2001e628 0x4 d:/programme/arm_toolchain/bin/../lib/gcc/arm-none-eabi/4.8.3/../../../../arm-none-eabi/lib/armv7e-m\libg.a(lib_a-mallocr.o)
                0x2001e628 __malloc_top_pad

.bss.__malloc_current_mallinfo
                0x2001e62c 0x28 load address 0x081070b4
 .bss.__malloc_current_mallinfo
                0x2001e62c 0x28 d:/programme/arm_toolchain/bin/../lib/gcc/arm-none-eabi/4.8.3/../../../../arm-none-eabi/lib/armv7e-m\libg.a(lib_a-mallocr.o)
                0x2001e62c __malloc_current_mallinfo

.noinit 0x2001e654 0x0
                0x2001e654 . = ALIGN (0x4)
                0x2001e654 _noinit = .
 *(.noinit .noinit.*)
                0x2001e654 . = ALIGN (0x4)
                0x2001e654 _end_noinit = .
                0x2001e654 PROVIDE (end, _end_noinit)
                0x2001e654 PROVIDE (_end, _end_noinit)
                0x2001e654 PROVIDE (__end, _end_noinit)
                0x2001e654 PROVIDE (__end__, _end_noinit)

.heap 0x2001e654 0xf000 load address 0x081070dc
                0x2001e654 . = ALIGN (0x4)

########################################################################

the load address is out of the normal constants address from 0x080e8a88 to 0x080EE700

.text.align 0x080e8a88 0x0
                0x080e8a88 . = ALIGN (0x8)
                0x080e8a88 _etext = .
                0x080e8a88 __etext = .
                0x080e8a88 _sidata = _etext

.data 0x20000000 0x5c78 load address 0x080e8a88
                0x20000000 . = ALIGN (0x4)
                0x20000000 _sdata = .
                0x20000000 __data_start__ = .
 *(vtable)

example
.bss.__malloc_max_total_mem
                0x2001e620 0x4 load address 0x081070a8
the startup file will not load this const because it is with 0x081070a8 out of 0x080e8a88 to 0x080EE700

is this a bug or what can I do?

Question information

Language:
English Edit question
Status:
Answered
For:
GNU Arm Embedded Toolchain Edit question
Assignee:
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Last query:
2014-05-05
Last reply:
2014-05-07
Joey Ye (jinyun-ye) said : #1

Maik,

I don't quite understand the issue from your description. I suspect it an issue in your linker script. Can you please doubt-check it or post it here?

Thanks,
Joey

Maik Siebrand (m-siebrand) said : #2

Here the linker script

///////////////////////////////////////////////////////////////////////////////////////////////////////////

/* Memory Spaces Definitions for STM32F427ZI (EVO4.3 - DEBUG) */

MEMORY
{
  RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K
  CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
  MEMORY_ARRAY (xrw) : ORIGIN = 0x20002000, LENGTH = 32
}

/* higher address of the user mode stack (end of 192K RAM on AHB bus)*/
_estack = 0x20030000;

/* include the master4-specific sub-script */
INCLUDE master4.ld

///////////////////////////////////////////////////////////////////////////////////////////////////////////
/* linker script for Master4 */

/*
 * The entry point is informative, for debuggers and simulators,
 * since the Cortex-M vector points to it anyway.
 */

 /* Linker script to place sections and symbol values. Should be used together
 * with other linker script that defines memory regions FLASH and RAM.
 * It references following symbols, which must be defined in code:
 * Reset_Handler : Entry of reset handler
 *
 * It defines following symbols, which code can use without definition:
 * __exidx_start
 * __exidx_end
 * __copy_table_start__
 * __copy_table_end__
 * __zero_table_start__
 * __zero_table_end__
 * __etext
 * __data_start__
 * __preinit_array_start
 * __preinit_array_end
 * __init_array_start
 * __init_array_end
 * __fini_array_start
 * __fini_array_end
 * __data_end__
 * __bss_start__
 * __bss_end__
 * __end__
 * end
 * __HeapLimit
 * __StackLimit
 * __StackTop
 * __stack
 */

ENTRY(Reset_Handler)

/* Sections Definitions */
SECTIONS
{

    /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
    .isr_vector :
    {
  . = ALIGN(4);
        KEEP(*(.isr_vector)) /* Startup code */
  . = ALIGN(4);
    } >FLASH

 ._inits :
    {
        . = ALIGN(4);

        /*
         * These are the old initialisation sections, intended to contain
         * naked code, with the prologue/epilogue added by crti.o/crtn.o
         * when linking with startup files. The standalone startup code
         * currently does not run these, better use the init arrays below.
         */
    KEEP(*(.init))
    KEEP(*(.fini))

    . = ALIGN(4);

    /*
         * The preinit code, i.e. an array of pointers to initialisation
         * functions to be performed before constructors.
         */
    PROVIDE_HIDDEN (__preinit_array_start = .);

        /*
         * Used to run the SystemInit() before anything else.
         */
    KEEP(*(.preinit_array_sysinit .preinit_array_sysinit.*))

        /*
         * Used for other platform inits.
         */
    KEEP(*(.preinit_array_platform .preinit_array_platform.*))

        /*
         * The application inits. If you need to enforce some order in
         * execution, create new sections, as before.
         */
    KEEP(*(.preinit_array .preinit_array.*))

    PROVIDE_HIDDEN (__preinit_array_end = .);

    . = ALIGN(4);

    /*
         * The init code, i.e. an array of pointers to static constructors.
         */
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP(*(SORT(.init_array.*)))
    KEEP(*(.init_array))
    PROVIDE_HIDDEN (__init_array_end = .);

    . = ALIGN(4);

    /*
         * The fini code, i.e. an array of pointers to static destructors.
         */
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP(*(SORT(.fini_array.*)))
    KEEP(*(.fini_array))
    PROVIDE_HIDDEN (__fini_array_end = .);
        . = ALIGN(4);

    } >FLASH

    /*
     * For some STRx devices, the beginning of the startup code
     * is stored in the .flashtext section, which goes to FLASH.
     */
    .flashtext :
    {
        . = ALIGN(4);
        *(.flashtext .flashtext.*) /* Startup code */
        . = ALIGN(4);
    } >FLASH

    /* the program code is stored in the .text section, which goes to Flash */
    .text :
    {
     . = ALIGN(4);

        *(.text) /* remaining code */
        *(.text.*) /* remaining code */
        *(.rodata) /* read-only data (constants) */
        *(.rodata*)
        *(.glue_7)
        *(.glue_7t)

     . = ALIGN(4);
*/ _etext = .; */
     /* This is used by the startup in order to initialize the .data section */

    } >FLASH

    /* ARM magic sections */
  .ARM.extab :
  {
    *(.ARM.extab* .gnu.linkonce.armextab.*)
  } > FLASH

/* .ARM.exidx is sorted, so has to go in its own output section. */
  __exidx_start = .;
  .ARM.exidx :
  {
    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
  } >FLASH
  __exidx_end = .;

  .text.align :
  {
    . = ALIGN(8);
    _etext = .;
  } >FLASH

  /* Variable für die neue Toolchain */
  __etext = .;

  /*
     * This address is used by the startup code to
     * initialise the .data section.
     */
  _sidata = _etext;

    /* This is the initialized data section
    /* The program executes knowing that the data is in the RAM but the loader puts the initial values in the FLASH (inidata). */
    /* It is one task of the startup to copy the initial values from FLASH to RAM. */
    /* The linker will normally set the LMA equal to the VMA. You can change that by using the AT keyword. */

    .data : AT ( _sidata )
    {
     . = ALIGN(4);
        /* This is used by the startup in order to initialize the .data secion */
        _sdata = . ;

        /* STM specific definition */
        __data_start__ = . ;

        *(vtable)

        /* Exclude rdimon command line, to avoid loosing command line */
        *(EXCLUDE_FILE (*rdimon-crt0.o) .data .data.*)

      /* This is used by the startup code to initialise the .data section */
        *(.data)
        *(.data.*)

     . = ALIGN(4);
     /* This is used by the startup in order to initialize the .data secion */
        _edata = . ;
        __data_end__ = . ;

    } >RAM

    /* This is the data section to initialize with zeros */
    .bss :
    {
     . = ALIGN(4);
        /* This is used by the startup in order to initialize the .bss secion */
        _sbss = .;
        __bss_start__ = .;

        *(.bss)
        *(COMMON)

     . = ALIGN(4);
     /* This is used by the startup in order to initialize the .bss secion */
      _ebss = . ;
      __bss_end__ = .;

    } >RAM

    .noinit (NOLOAD):
    {
      . = ALIGN(4);
        _noinit = .;

        *(.noinit .noinit.*)

         . = ALIGN(4) ;
        _end_noinit = .;
    } > RAM

    /* Mandatory to be word aligned, _sbrk assumes this */
    PROVIDE ( end = _end_noinit ); /* was _ebss */
    PROVIDE ( _end = _end_noinit );
    PROVIDE ( __end = _end_noinit );
    PROVIDE ( __end__ = _end_noinit );

 .heap :
 {
   PROVIDE(__HEAP_START = .);
  . = ALIGN(4);
  *(.heap*)
    . = ALIGN(4);
  __HeapLimit = .;
  PROVIDE(__HEAP_END = .);
 } >RAM

    /* This is the uninitialized data section */
    .nvram :
    {
      . = ALIGN(4);
    *(.nvram)
    . = ALIGN(4);
    } >RAM

  /* Set stack top to end of RAM, and stack limit move down by
   * size of stack_dummy section */
  __StackTop = ORIGIN(RAM) + LENGTH(RAM);
  __StackLimit = __StackTop - 256;
  PROVIDE(__stack = __StackTop);

  /* Check if data + heap + stack exceeds RAM limit */
  ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")

 /* Die Stacks für die Tasks des OS werden im CCMRAM abgelegt... */
 OS_TASK_SIZE_IDLE = 2048;
 OS_TASK_SIZE_STAT = 2048;
 OS_TASK_SIZE_DOCKING = 2048;
 OS_TASK_SIZE_IOMODULE = 2048;
 OS_TASK_SIZE_GPS = 2048;
 OS_TASK_SIZE_SIGNAL = 2048;
 OS_TASK_SIZE_COM = 3072;
 OS_TASK_SIZE_ACCESS = 4096;
 OS_TASK_SIZE_SETUP = 8192;
 OS_TASK_SIZE_TP = 4096;
 OS_TASK_SIZE_KEY = 2048;
 OS_TASK_SIZE_TOUCH = 4096;
 OS_TASK_SIZE_SEQUENCE = 4096;
 OS_TASK_SIZE_ACCESSDEV = 4096;
 OS_TASK_SIZE_KERNEL = 4096;
 OS_TASK_SIZE_MOBILE = 4096;
 OS_TASK_SIZE_TCPIP = 3072;
 OS_TASK_SIZE_LED = 2048;
 OS_TASK_SIZE_DISPLAY = 2048;
 OS_TASK_SIZE_RTC = 2048;

 /* Speicherbereich im CCMRAM, hier die definition der SECTION .cram*/
 .cram :
 {
  . = ALIGN(4);

  /* die ersten 8 Byte werden vom Urloader benutzt und dürfen daher NICHT verändert werden! */
  . = . + 8;

  PROVIDE( OS_TASK_STACK_IDLE = .); . = . + OS_TASK_SIZE_IDLE;
  PROVIDE( OS_TASK_STACK_STAT = .); . = . + OS_TASK_SIZE_STAT;
  PROVIDE( OS_TASK_STACK_DOCKING = .); . = . + OS_TASK_SIZE_DOCKING;
  PROVIDE( OS_TASK_STACK_IOMODULE = .); . = . + OS_TASK_SIZE_IOMODULE;
  PROVIDE( OS_TASK_STACK_GPS = .); . = . + OS_TASK_SIZE_GPS;
  PROVIDE( OS_TASK_STACK_SIGNAL = .); . = . + OS_TASK_SIZE_SIGNAL;
  PROVIDE( OS_TASK_STACK_COM = .); . = . + OS_TASK_SIZE_COM;
  PROVIDE( OS_TASK_STACK_ACCESS = .); . = . + OS_TASK_SIZE_ACCESS;
  PROVIDE( OS_TASK_STACK_SETUP = .); . = . + OS_TASK_SIZE_SETUP;
  PROVIDE( OS_TASK_STACK_TP = .); . = . + OS_TASK_SIZE_TP;
  PROVIDE( OS_TASK_STACK_KEY = .); . = . + OS_TASK_SIZE_KEY;
  PROVIDE( OS_TASK_STACK_TOUCH = .); . = . + OS_TASK_SIZE_TOUCH;
  PROVIDE( OS_TASK_STACK_SEQUENCE = .); . = . + OS_TASK_SIZE_SEQUENCE;
  PROVIDE( OS_TASK_STACK_ACCESSDEV = .); . = . + OS_TASK_SIZE_ACCESSDEV;
  PROVIDE( OS_TASK_STACK_KERNEL = .); . = . + OS_TASK_SIZE_KERNEL;
  PROVIDE( OS_TASK_STACK_MOBILE = .); . = . + OS_TASK_SIZE_MOBILE;
  PROVIDE( OS_TASK_STACK_TCPIP = .); . = . + OS_TASK_SIZE_TCPIP;
  PROVIDE( OS_TASK_STACK_LED = .); . = . + OS_TASK_SIZE_LED;
  PROVIDE( OS_TASK_STACK_DISPLAY = .); . = . + OS_TASK_SIZE_DISPLAY;
  PROVIDE( OS_TASK_STACK_RTC = .); . = . + OS_TASK_SIZE_RTC;

  /* deklariere _ecram mit der Endadresse von der SECTION .cram */
    PROVIDE ( _ecram = . );
 } >CCMRAM

    /* after that it's only debugging information. */

    /* remove the debugging information from the standard libraries */
    DISCARD :
    {
      libc.a ( * )
      libm.a ( * )
     libgcc.a ( * )
    }

    /* Stabs debugging sections. */
    .stab 0 : { *(.stab) }
    .stabstr 0 : { *(.stabstr) }
    .stab.excl 0 : { *(.stab.excl) }
    .stab.exclstr 0 : { *(.stab.exclstr) }
    .stab.index 0 : { *(.stab.index) }
    .stab.indexstr 0 : { *(.stab.indexstr) }
    .comment 0 : { *(.comment) }

    /* DWARF debug sections.
    /* Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */

    /* DWARF 1 */
    .debug 0 : { *(.debug) }
    .line 0 : { *(.line) }

    /* GNU DWARF 1 extensions */
    .debug_srcinfo 0 : { *(.debug_srcinfo) }
    .debug_sfnames 0 : { *(.debug_sfnames) }

    /* DWARF 1.1 and DWARF 2 */
    .debug_aranges 0 : { *(.debug_aranges) }
    .debug_pubnames 0 : { *(.debug_pubnames) }

    /* DWARF 2 */
    .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
    .debug_abbrev 0 : { *(.debug_abbrev) }
    .debug_line 0 : { *(.debug_line) }
    .debug_frame 0 : { *(.debug_frame) }
    .debug_str 0 : { *(.debug_str) }
    .debug_loc 0 : { *(.debug_loc) }
    .debug_macinfo 0 : { *(.debug_macinfo) }

    /* SGI/MIPS DWARF 2 extensions */
    .debug_weaknames 0 : { *(.debug_weaknames) }
    .debug_funcnames 0 : { *(.debug_funcnames) }
    .debug_typenames 0 : { *(.debug_typenames) }
    .debug_varnames 0 : { *(.debug_varnames) }

}

Joey Ye (jinyun-ye) said : #3

Maik,

I seem to understand your issue. The symbols you are looking at are actually BSS symbols, which should be initialized to zero at startup. Because their init values are all zero, they needn't be loaded from program image. Instead, you should have a piece of code in your startup to zero they out, or if you are using _start from libc as the entry point, it will initialize for you automatically.

Thanks,
Joey

Maik Siebrand (m-siebrand) said : #4

Hello Joey,

I use now the _start symbol, but the linker makes now the error _exit not found

Building target: evo4.3.elf
Invoking: Cross ARM C Linker
arm-none-eabi-gcc -mcpu=cortex-m4 -mthumb -Os -fmessage-length=0 -fsigned-char -Wall -g3 -T "D:\Design\MasterIV_04.03.03\projects\codebase\1_device\master4\32\evo4.3\build\debug.ld" -Xlinker --gc-sections -L"D:\Design\MasterIV_04.03.03\projects\codebase\8_libraries" -L"D:\Design\MasterIV_04.03.03\projects\codebase\2_application\master4" -Wl,-Map,"evo4.3.map" -o "evo4.3.elf" ./codebase/7_misc/debug.o ./codebase/7_misc/miscellaneous.o ./codebase/6_hardware/touch/mxt224e.o ./codebase/6_hardware/touch/tsc2046.o ./codebase/6_hardware/sensor/lm19.o ./codebase/6_hardware/sensor/mcp97xx.o ./codebase/6_hardware/rtc/rx8564.o ./codebase/6_hardware/reader/reader_usart.o ./codebase/6_hardware/reader/smartrelais.o ./codebase/6_hardware/reader/wiegand.o ./codebase/6_hardware/portexpander/mcp23s17.o ./codebase/6_hardware/modules/m032_mini_din/m032.o ./codebase/6_hardware/modules/m024_usb_host/m024.o ./codebase/6_hardware/modules/m021_transponder/m021.o ./codebase/6_hardware/modules/m020_touch_taste/m020.o ./codebase/6_hardware/modules/m019_display_adapter/m019.o ./codebase/6_hardware/modules/m018_display_adap_sw/m018.o ./codebase/6_hardware/modules/m017_micro_sd/m017.o ./codebase/6_hardware/modules/m016_rs_232_dsub/m016.o ./codebase/6_hardware/modules/m015_mc_55/m015.o ./codebase/6_hardware/modules/m014_rs_485/m014.o ./codebase/6_hardware/modules/m013_enlok_position_receiver/m013.o ./codebase/6_hardware/modules/m012_digital_input_output/m012.o ./codebase/6_hardware/modules/m011_tcp_ip/m011.o ./codebase/6_hardware/modules/m010_backlight/m010.o ./codebase/6_hardware/modules/m009_mobil_master/m009.o ./codebase/6_hardware/modules/m008_analog_input/m008.o ./codebase/6_hardware/modules/m007_gps/m007.o ./codebase/6_hardware/modules/m006_digital_input/m006.o ./codebase/6_hardware/modules/m005_digital_output/m005.o ./codebase/6_hardware/modules/m001_wlan_rs9110/m001.o ./codebase/6_hardware/modules/modules.o ./codebase/6_hardware/modems/mc55.o ./codebase/6_hardware/memory/at45db.o ./codebase/6_hardware/memory/fm25l04b.o ./codebase/6_hardware/memory/s25fl256s.o ./codebase/6_hardware/leddriver/pca9635.o ./codebase/6_hardware/display/fsa506.o ./codebase/6_hardware/display/ili9341.o ./codebase/6_hardware/display/ra8835ap4n.o ./codebase/6_hardware/digital_poti/mcp4131.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_OTG_Driver/src/usb_core.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_OTG_Driver/src/usb_dcd.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_OTG_Driver/src/usb_dcd_int.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_OTG_Driver/src/usb_hcd.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_Library/Core/src/usbd_core.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_Library/Core/src/usbd_desc.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_Library/Core/src/usbd_ioreq.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_Library/Core/src/usbd_req.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_Library/Core/src/usbd_usr.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_Library/Class/hid/src/usbd_hid_core.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_Library/Class/cdc/src/usbd_cdc_core.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_Library/Class/cdc/src/usbd_cdc_vcp.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Core/src/usbh_core.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Core/src/usbh_hcs.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Core/src/usbh_ioreq.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Core/src/usbh_stdreq.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Class/MSC/src/usbh_msc_bot.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Class/MSC/src/usbh_msc_core.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Class/MSC/src/usbh_msc_fatfs.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Class/MSC/src/usbh_msc_scsi.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_HOST_Library/Class/MSC/src/usbh_usr_lcd.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_FileSystem/src/fattime.o ./codebase/6_hardware/cpu/stm32f4xx/STM32_USB_Datafox/USB_FileSystem/src/ff.o ./codebase/6_hardware/cpu/stm32f4xx/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc_ride7/startup_stm32f427_437xx.o ./codebase/6_hardware/cpu/stm32f4xx/adc.o ./codebase/6_hardware/cpu/stm32f4xx/cpu.o ./codebase/6_hardware/cpu/stm32f4xx/eeprom.o ./codebase/6_hardware/cpu/stm32f4xx/i2c.o ./codebase/6_hardware/cpu/stm32f4xx/i2s.o ./codebase/6_hardware/cpu/stm32f4xx/rtc.o ./codebase/6_hardware/cpu/stm32f4xx/spi.o ./codebase/6_hardware/cpu/stm32f4xx/stm32f4xx_it.o ./codebase/6_hardware/cpu/stm32f4xx/timers.o ./codebase/6_hardware/cpu/stm32f4xx/usart.o ./codebase/6_hardware/cpu/stm32f4xx/usb.o ./codebase/6_hardware/backlight/rgbw_2673hm.o ./codebase/6_hardware/backlight/w_2759hm.o ./codebase/6_hardware/audio/tlv320dac3100.o ./codebase/6_hardware/adc/ads1118.o ./codebase/5_hal/at45db_board.o ./codebase/5_hal/barcode_hw_board.o ./codebase/5_hal/biokey_hw_board.o ./codebase/5_hal/board.o ./codebase/5_hal/buzzer_board.o ./codebase/5_hal/debug_board.o ./codebase/5_hal/fm25l04b_board.o ./codebase/5_hal/fsa506_board.o ./codebase/5_hal/hid_hw_board.o ./codebase/5_hal/i2c_board.o ./codebase/5_hal/i2s_board.o ./codebase/5_hal/ibutton_hw_board.o ./codebase/5_hal/ili9341_board.o ./codebase/5_hal/io_input_board.o ./codebase/5_hal/key_board.o ./codebase/5_hal/m001_board.o ./codebase/5_hal/m005_board.o ./codebase/5_hal/m006_board.o ./codebase/5_hal/m007_board.o ./codebase/5_hal/m008_board.o ./codebase/5_hal/m010_board.o ./codebase/5_hal/m011_board.o ./codebase/5_hal/m012_board.o ./codebase/5_hal/m013_board.o ./codebase/5_hal/m014_board.o ./codebase/5_hal/m015_board.o ./codebase/5_hal/m017_board.o ./codebase/5_hal/m018_board.o ./codebase/5_hal/m019_board.o ./codebase/5_hal/m021_board.o ./codebase/5_hal/m024_board.o ./codebase/5_hal/m032_board.o ./codebase/5_hal/m035_board.o ./codebase/5_hal/mc55_board.o ./codebase/5_hal/mcp23s17_board.o ./codebase/5_hal/mcp4131_board.o ./codebase/5_hal/modules_board.o ./codebase/5_hal/mxt224e_board.o ./codebase/5_hal/pca9635_board.o ./codebase/5_hal/power_board.o ./codebase/5_hal/primo100_hw_board.o ./codebase/5_hal/r_oem_uhf_05w_hw_board.o ./codebase/5_hal/ra8835ap4n_board.o ./codebase/5_hal/rgbw_2673hm_board.o ./codebase/5_hal/rtc_board.o ./codebase/5_hal/rx8564_board.o ./codebase/5_hal/s25fl256s_board.o ./codebase/5_hal/simons_voss_hw_board.o ./codebase/5_hal/spi_board.o ./codebase/5_hal/system_stm32f4xx.o ./codebase/5_hal/timer_board.o ./codebase/5_hal/tsc2046_board.o ./codebase/5_hal/tsr32_hw_board.o ./codebase/5_hal/twn3_hw_board.o ./codebase/5_hal/usart_board.o ./codebase/5_hal/usb_board.o ./codebase/5_hal/w_2759hm_board.o ./codebase/5_hal/xs070_hw_board.o ./codebase/4_software/tcp_ip/wlan/wlan_rs9110.o ./codebase/4_software/tcp_ip/tcp_echo_server/src/tcp_echoserver.o ./codebase/4_software/tcp_ip/tcp_echo_client/src/tcp_echoclient.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/auth.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/chap.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/chpms.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/fsm.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/ipcp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/lcp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/magic.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/md5.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/pap.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/ppp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/ppp_oe.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/randm.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/ppp/vj.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/etharp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/loopif.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/netif/slipif.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/snmp/asn1_dec.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/snmp/asn1_enc.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/snmp/mib2.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/snmp/mib_structs.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/snmp/msg_in.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/snmp/msg_out.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/ipv4/autoip.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/ipv4/icmp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/ipv4/igmp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/ipv4/inet.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/ipv4/inet_chksum.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/ipv4/ip.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/ipv4/ip_addr.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/ipv4/ip_frag.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/dhcp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/dns.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/init.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/mem.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/memp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/netif.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/pbuf.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/raw.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/stats.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/sys.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/tcp_in.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/tcp_lw.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/tcp_out.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/core/udp.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/api/api_lib.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/api/api_msg.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/api/err.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/api/netbuf.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/api/netdb.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/api/netifapi.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/api/sockets.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/src/api/tcpip.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/port/STM32F4x7/Standalone/ethernetif.o ./codebase/4_software/tcp_ip/lwip_v1.3.2/lwipversion.o ./codebase/4_software/tcp_ip/lwip.o ./codebase/4_software/service/buzzer.o ./codebase/4_software/service/key.o ./codebase/4_software/reader/barcode_sw.o ./codebase/4_software/reader/biokey_sw.o ./codebase/4_software/reader/df8apdus.o ./codebase/4_software/reader/df8crypt.o ./codebase/4_software/reader/hid_sw.o ./codebase/4_software/reader/ibutton_sw.o ./codebase/4_software/reader/primo130_sw.o ./codebase/4_software/reader/simons_voss_sw.o ./codebase/4_software/reader/tsr32_sw.o ./codebase/4_software/reader/twn3_sw.o ./codebase/4_software/reader/xs070_sw.o ./codebase/4_software/os/port/os_cpu_a.o ./codebase/4_software/os/port/os_cpu_c.o ./codebase/4_software/os/port/os_dbg.o ./codebase/4_software/os/os.o ./codebase/4_software/os/os_core.o ./codebase/4_software/os/os_flag.o ./codebase/4_software/os/os_mbox.o ./codebase/4_software/os/os_mem.o ./codebase/4_software/os/os_mutex.o ./codebase/4_software/os/os_q.o ./codebase/4_software/os/os_sem.o ./codebase/4_software/os/os_task.o ./codebase/4_software/os/os_time.o ./codebase/4_software/os/os_tmr.o ./codebase/4_software/memory/ring.o ./codebase/4_software/memory/sfs.o ./codebase/4_software/memory/spansion.o ./codebase/4_software/kernel/log.o ./codebase/4_software/equipment/equipment.o ./codebase/4_software/display/bitmap.o ./codebase/4_software/display/color.o ./codebase/4_software/display/display_driver.o ./codebase/4_software/display/grafic.o ./codebase/4_software/disk/usb_memory.o ./codebase/3_sal/bitmap_sal.o ./codebase/3_sal/clock_sal.o ./codebase/3_sal/config_sal.o ./codebase/3_sal/equipment_sal.o ./codebase/3_sal/grafics_sal.o ./codebase/3_sal/lan_sal.o ./codebase/3_sal/os_sal.o ./codebase/3_sal/sal.o ./codebase/3_sal/sfs_sal.o ./codebase/3_sal/usb_memory_sal.o ./codebase/2_master4/transponder/hid.o ./codebase/2_master4/transponder/ibutton.o ./codebase/2_master4/transponder/primo100.o ./codebase/2_master4/transponder/primo130.o ./codebase/2_master4/transponder/r_oem_uhf_05w.o ./codebase/2_master4/transponder/smartrelais.o ./codebase/2_master4/transponder/tp4.o ./codebase/2_master4/transponder/tsr32.o ./codebase/2_master4/transponder/twn3_iso.o ./codebase/2_master4/transponder/xs070.o ./codebase/2_master4/setup/config.o ./codebase/2_master4/setup/list.o ./codebase/2_master4/setup/misc_master4.o ./codebase/2_master4/setup/setup.o ./codebase/2_master4/setup/var.o ./codebase/2_master4/service/backlight4.o ./codebase/2_master4/service/bios4.o ./codebase/2_master4/service/buzzer4.o ./codebase/2_master4/service/color4.o ./codebase/2_master4/service/display4.o ./codebase/2_master4/service/gpsservice.o ./codebase/2_master4/service/mobileservice.o ./codebase/2_master4/service/service.o ./codebase/2_master4/service/touch4.o ./codebase/2_master4/service/usb_flash_drive_service.o ./codebase/2_master4/service/wlanservice.o ./codebase/2_master4/security/aes.o ./codebase/2_master4/security/crc.o ./codebase/2_master4/security/des.o ./codebase/2_master4/security/df4.o ./codebase/2_master4/security/diffieHellman.o ./codebase/2_master4/security/md5.o ./codebase/2_master4/security/phgCrypt.o ./codebase/2_master4/security/rijndael.o ./codebase/2_master4/memory/record.o ./codebase/2_master4/memory/repository.o ./codebase/2_master4/memory/storage.o ./codebase/2_master4/memory/wl-at45db.o ./codebase/2_master4/kernel/clock.o ./codebase/2_master4/kernel/energy.o ./codebase/2_master4/kernel/kernel.o ./codebase/2_master4/kernel/log4.o ./codebase/2_master4/kernel/power.o ./codebase/2_master4/kernel/power_event.o ./codebase/2_master4/kernel/power_switch.o ./codebase/2_master4/kernel/timer.o ./codebase/2_master4/kernel/watchdog.o ./codebase/2_master4/io/docking.o ./codebase/2_master4/io/gps.o ./codebase/2_master4/io/io_analog.o ./codebase/2_master4/io/io_input.o ./codebase/2_master4/io/io_machine.o ./codebase/2_master4/io/io_main.o ./codebase/2_master4/io/io_module.o ./codebase/2_master4/io/io_output.o ./codebase/2_master4/io/io_power.o ./codebase/2_master4/io/io_power_kombi.o ./codebase/2_master4/io/io_sps.o ./codebase/2_master4/io/io_timer.o ./codebase/2_master4/io/io_vibration.o ./codebase/2_master4/comm/comm4.o ./codebase/2_master4/comm/comserver.o ./codebase/2_master4/comm/disk.o ./codebase/2_master4/comm/http.o ./codebase/2_master4/comm/lan.o ./codebase/2_master4/comm/mmc.o ./codebase/2_master4/comm/mobile.o ./codebase/2_master4/comm/protocol.o ./codebase/2_master4/comm/rs485.o ./codebase/2_master4/comm/tcp.o ./codebase/2_master4/comm/usb_flash_drive.o ./codebase/2_master4/access/access.o ./codebase/2_master4/access/gis.o ./codebase/2_master4/access/idtronic.o ./codebase/2_master4/access/phg.o ./codebase/1_device/custom.o ./codebase/1_device/display_dev.o ./codebase/1_device/fonts43.o ./codebase/1_device/key_dev.o -lstm32stdlibF427debug -llwiplibdebug
d:/programme/arm_toolchain/bin/../lib/gcc/arm-none-eabi/4.8.3/../../../../arm-none-eabi/lib/armv7e-m\libg.a(lib_a-exit.o): In function `exit':
exit.c:(.text.exit+0x16): undefined reference to `_exit'
collect2.exe: error: ld returned 1 exit status
make: *** [evo4.3.elf] Error 1

Here my startup file

////////////////////////////////////////////////////////////////////////////////////////////////////////////////

/**
  ******************************************************************************
  * @file startup_stm32f427_437xx.s
  * @author MCD Application Team
  * @version V1.3.0
  * @date 08-November-2013
  * @brief STM32F427xx/437xx Devices vector table for RIDE7 toolchain.
  * This module performs:
  * - Set the initial SP
  * - Set the initial PC == Reset_Handler,
  * - Set the vector table entries with the exceptions ISR address
  * - Configure the clock system and the external SRAM mounted on
  * STM324x7I-EVAL board to be used as data memory (optional,
  * to be enabled by user)
  * - Branches to main in the C library (which eventually
  * calls main()).
  * After Reset the Cortex-M4 processor is in Thread mode,
  * priority is Privileged, and the Stack is set to Main.
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  * http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an "AS IS" BASIS,
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
  */

  .syntax unified
  .cpu cortex-m4
  .arch armv7-m
  .fpu softvfp
  .thumb

.global g_pfnVectors
.global Default_Handler

/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */

/**
 * @brief This is the code that gets called when the processor first
 * starts execution following a reset event. Only the absolutely
 * necessary set is performed, after which the application
 * supplied main() routine is called.
 * @param None
 * @retval : None
*/

    .section .text.Reset_Handler
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
  b LoopCopyDataInit

CopyDataInit:
  ldr r3, =_sidata
  ldr r3, [r3, r1]
  str r3, [r0, r1]
  adds r1, r1, #4

LoopCopyDataInit:
  ldr r0, =_sdata
  ldr r3, =_edata
  adds r2, r0, r1
  cmp r2, r3
  bcc CopyDataInit
  ldr r2, =_sbss
  b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
  str r3, [r2], #4

LoopFillZerobss:
  ldr r3, = _ebss
  cmp r2, r3
  bcc FillZerobss

/* Call the clock system intitialization function.*/
  bl SystemInit

/* Call the application's entry point.*/
#ifndef __START
#define __START _start
#endif
  bl __START

/* bl main */

  bx lr
.size Reset_Handler, .-Reset_Handler

/**
 * @brief This is the code that gets called when the processor receives an
 * unexpected interrupt. This simply enters an infinite loop, preserving
 * the system state for examination by a debugger.
 * @param None
 * @retval None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
  .size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
*******************************************************************************/
   .section .isr_vector,"a",%progbits
  .type g_pfnVectors, %object
  .size g_pfnVectors, .-g_pfnVectors

g_pfnVectors:
  .word _estack
  .word Reset_Handler
  .word NMI_Handler
  .word HardFault_Handler
  .word MemManage_Handler
  .word BusFault_Handler
  .word UsageFault_Handler
  .word 0
  .word 0
  .word 0
  .word 0
  .word SVC_Handler
  .word DebugMon_Handler
  .word 0
  .word OS_CPU_PendSVHandler /* PendSV_Handler */
  .word SysTick_Handler

  /* External Interrupts */
  .word WWDG_IRQHandler /* Window WatchDog */
  .word PVD_IRQHandler /* PVD through EXTI Line detection */
  .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
  .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
  .word FLASH_IRQHandler /* FLASH */
  .word RCC_IRQHandler /* RCC */
  .word EXTI0_IRQHandler /* EXTI Line0 */
  .word EXTI1_IRQHandler /* EXTI Line1 */
  .word EXTI2_IRQHandler /* EXTI Line2 */
  .word EXTI3_IRQHandler /* EXTI Line3 */
  .word EXTI4_IRQHandler /* EXTI Line4 */
  .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
  .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
  .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
  .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
  .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
  .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
  .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
  .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
  .word CAN1_TX_IRQHandler /* CAN1 TX */
  .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
  .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
  .word CAN1_SCE_IRQHandler /* CAN1 SCE */
  .word EXTI9_5_IRQHandler /* External Line[9:5]s */
  .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
  .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
  .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
  .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  .word TIM2_IRQHandler /* TIM2 */
  .word TIM3_IRQHandler /* TIM3 */
  .word TIM4_IRQHandler /* TIM4 */
  .word I2C1_EV_IRQHandler /* I2C1 Event */
  .word I2C1_ER_IRQHandler /* I2C1 Error */
  .word I2C2_EV_IRQHandler /* I2C2 Event */
  .word I2C2_ER_IRQHandler /* I2C2 Error */
  .word SPI1_IRQHandler /* SPI1 */
  .word SPI2_IRQHandler /* SPI2 */
  .word USART1_IRQHandler /* USART1 */
  .word USART2_IRQHandler /* USART2 */
  .word USART3_IRQHandler /* USART3 */
  .word EXTI15_10_IRQHandler /* External Line[15:10]s */
  .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
  .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
  .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
  .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
  .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
  .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
  .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
  .word FSMC_IRQHandler /* FSMC */
  .word SDIO_IRQHandler /* SDIO */
  .word TIM5_IRQHandler /* TIM5 */
  .word SPI3_IRQHandler /* SPI3 */
  .word UART4_IRQHandler /* UART4 */
  .word UART5_IRQHandler /* UART5 */
  .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
  .word TIM7_IRQHandler /* TIM7 */
  .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
  .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
  .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
  .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
  .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
  .word ETH_IRQHandler /* Ethernet */
  .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
  .word CAN2_TX_IRQHandler /* CAN2 TX */
  .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
  .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
  .word CAN2_SCE_IRQHandler /* CAN2 SCE */
  .word OTG_FS_IRQHandler /* USB OTG FS */
  .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
  .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
  .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
  .word USART6_IRQHandler /* USART6 */
  .word I2C3_EV_IRQHandler /* I2C3 event */
  .word I2C3_ER_IRQHandler /* I2C3 error */
  .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
  .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
  .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
  .word OTG_HS_IRQHandler /* USB OTG HS */
  .word DCMI_IRQHandler /* DCMI */
  .word CRYP_IRQHandler /* CRYP crypto */
  .word HASH_RNG_IRQHandler /* Hash and Rng */
  .word FPU_IRQHandler /* FPU */
  .word UART7_IRQHandler /* UART7 */
  .word UART8_IRQHandler /* UART8 */
  .word SPI4_IRQHandler /* SPI4 */
  .word SPI5_IRQHandler /* SPI5 */
  .word SPI6_IRQHandler /* SPI6 */
  .word SAI1_IRQHandler /* SAI1 */
  .word LTDC_IRQHandler /* LTDC */
  .word LTDC_ER_IRQHandler /* LTDC error */
  .word DMA2D_IRQHandler /* DMA2D */

/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
   .weak NMI_Handler
   .thumb_set NMI_Handler,Default_Handler

   .weak HardFault_Handler
   .thumb_set HardFault_Handler,Default_Handler

   .weak MemManage_Handler
   .thumb_set MemManage_Handler,Default_Handler

   .weak BusFault_Handler
   .thumb_set BusFault_Handler,Default_Handler

   .weak UsageFault_Handler
   .thumb_set UsageFault_Handler,Default_Handler

   .weak SVC_Handler
   .thumb_set SVC_Handler,Default_Handler

   .weak DebugMon_Handler
   .thumb_set DebugMon_Handler,Default_Handler

   .weak PendSV_Handler
   .thumb_set PendSV_Handler,Default_Handler

   .weak SysTick_Handler
   .thumb_set SysTick_Handler,Default_Handler

   .weak WWDG_IRQHandler
   .thumb_set WWDG_IRQHandler,Default_Handler

   .weak PVD_IRQHandler
   .thumb_set PVD_IRQHandler,Default_Handler

   .weak TAMP_STAMP_IRQHandler
   .thumb_set TAMP_STAMP_IRQHandler,Default_Handler

   .weak RTC_WKUP_IRQHandler
   .thumb_set RTC_WKUP_IRQHandler,Default_Handler

   .weak FLASH_IRQHandler
   .thumb_set FLASH_IRQHandler,Default_Handler

   .weak RCC_IRQHandler
   .thumb_set RCC_IRQHandler,Default_Handler

   .weak EXTI0_IRQHandler
   .thumb_set EXTI0_IRQHandler,Default_Handler

   .weak EXTI1_IRQHandler
   .thumb_set EXTI1_IRQHandler,Default_Handler

   .weak EXTI2_IRQHandler
   .thumb_set EXTI2_IRQHandler,Default_Handler

   .weak EXTI3_IRQHandler
   .thumb_set EXTI3_IRQHandler,Default_Handler

   .weak EXTI4_IRQHandler
   .thumb_set EXTI4_IRQHandler,Default_Handler

   .weak DMA1_Stream0_IRQHandler
   .thumb_set DMA1_Stream0_IRQHandler,Default_Handler

   .weak DMA1_Stream1_IRQHandler
   .thumb_set DMA1_Stream1_IRQHandler,Default_Handler

   .weak DMA1_Stream2_IRQHandler
   .thumb_set DMA1_Stream2_IRQHandler,Default_Handler

   .weak DMA1_Stream3_IRQHandler
   .thumb_set DMA1_Stream3_IRQHandler,Default_Handler

   .weak DMA1_Stream4_IRQHandler
   .thumb_set DMA1_Stream4_IRQHandler,Default_Handler

   .weak DMA1_Stream5_IRQHandler
   .thumb_set DMA1_Stream5_IRQHandler,Default_Handler

   .weak DMA1_Stream6_IRQHandler
   .thumb_set DMA1_Stream6_IRQHandler,Default_Handler

   .weak ADC_IRQHandler
   .thumb_set ADC_IRQHandler,Default_Handler

   .weak CAN1_TX_IRQHandler
   .thumb_set CAN1_TX_IRQHandler,Default_Handler

   .weak CAN1_RX0_IRQHandler
   .thumb_set CAN1_RX0_IRQHandler,Default_Handler

   .weak CAN1_RX1_IRQHandler
   .thumb_set CAN1_RX1_IRQHandler,Default_Handler

   .weak CAN1_SCE_IRQHandler
   .thumb_set CAN1_SCE_IRQHandler,Default_Handler

   .weak EXTI9_5_IRQHandler
   .thumb_set EXTI9_5_IRQHandler,Default_Handler

   .weak TIM1_BRK_TIM9_IRQHandler
   .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler

   .weak TIM1_UP_TIM10_IRQHandler
   .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler

   .weak TIM1_TRG_COM_TIM11_IRQHandler
   .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler

   .weak TIM1_CC_IRQHandler
   .thumb_set TIM1_CC_IRQHandler,Default_Handler

   .weak TIM2_IRQHandler
   .thumb_set TIM2_IRQHandler,Default_Handler

   .weak TIM3_IRQHandler
   .thumb_set TIM3_IRQHandler,Default_Handler

   .weak TIM4_IRQHandler
   .thumb_set TIM4_IRQHandler,Default_Handler

   .weak I2C1_EV_IRQHandler
   .thumb_set I2C1_EV_IRQHandler,Default_Handler

   .weak I2C1_ER_IRQHandler
   .thumb_set I2C1_ER_IRQHandler,Default_Handler

   .weak I2C2_EV_IRQHandler
   .thumb_set I2C2_EV_IRQHandler,Default_Handler

   .weak I2C2_ER_IRQHandler
   .thumb_set I2C2_ER_IRQHandler,Default_Handler

   .weak SPI1_IRQHandler
   .thumb_set SPI1_IRQHandler,Default_Handler

   .weak SPI2_IRQHandler
   .thumb_set SPI2_IRQHandler,Default_Handler

   .weak USART1_IRQHandler
   .thumb_set USART1_IRQHandler,Default_Handler

   .weak USART2_IRQHandler
   .thumb_set USART2_IRQHandler,Default_Handler

   .weak USART3_IRQHandler
   .thumb_set USART3_IRQHandler,Default_Handler

   .weak EXTI15_10_IRQHandler
   .thumb_set EXTI15_10_IRQHandler,Default_Handler

   .weak RTC_Alarm_IRQHandler
   .thumb_set RTC_Alarm_IRQHandler,Default_Handler

   .weak OTG_FS_WKUP_IRQHandler
   .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler

   .weak TIM8_BRK_TIM12_IRQHandler
   .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler

   .weak TIM8_UP_TIM13_IRQHandler
   .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler

   .weak TIM8_TRG_COM_TIM14_IRQHandler
   .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler

   .weak TIM8_CC_IRQHandler
   .thumb_set TIM8_CC_IRQHandler,Default_Handler

   .weak DMA1_Stream7_IRQHandler
   .thumb_set DMA1_Stream7_IRQHandler,Default_Handler

   .weak FSMC_IRQHandler
   .thumb_set FSMC_IRQHandler,Default_Handler

   .weak SDIO_IRQHandler
   .thumb_set SDIO_IRQHandler,Default_Handler

   .weak TIM5_IRQHandler
   .thumb_set TIM5_IRQHandler,Default_Handler

   .weak SPI3_IRQHandler
   .thumb_set SPI3_IRQHandler,Default_Handler

   .weak UART4_IRQHandler
   .thumb_set UART4_IRQHandler,Default_Handler

   .weak UART5_IRQHandler
   .thumb_set UART5_IRQHandler,Default_Handler

   .weak TIM6_DAC_IRQHandler
   .thumb_set TIM6_DAC_IRQHandler,Default_Handler

   .weak TIM7_IRQHandler
   .thumb_set TIM7_IRQHandler,Default_Handler

   .weak DMA2_Stream0_IRQHandler
   .thumb_set DMA2_Stream0_IRQHandler,Default_Handler

   .weak DMA2_Stream1_IRQHandler
   .thumb_set DMA2_Stream1_IRQHandler,Default_Handler

   .weak DMA2_Stream2_IRQHandler
   .thumb_set DMA2_Stream2_IRQHandler,Default_Handler

   .weak DMA2_Stream3_IRQHandler
   .thumb_set DMA2_Stream3_IRQHandler,Default_Handler

   .weak DMA2_Stream4_IRQHandler
   .thumb_set DMA2_Stream4_IRQHandler,Default_Handler

   .weak ETH_IRQHandler
   .thumb_set ETH_IRQHandler,Default_Handler

   .weak ETH_WKUP_IRQHandler
   .thumb_set ETH_WKUP_IRQHandler,Default_Handler

   .weak CAN2_TX_IRQHandler
   .thumb_set CAN2_TX_IRQHandler,Default_Handler

   .weak CAN2_RX0_IRQHandler
   .thumb_set CAN2_RX0_IRQHandler,Default_Handler

   .weak CAN2_RX1_IRQHandler
   .thumb_set CAN2_RX1_IRQHandler,Default_Handler

   .weak CAN2_SCE_IRQHandler
   .thumb_set CAN2_SCE_IRQHandler,Default_Handler

   .weak OTG_FS_IRQHandler
   .thumb_set OTG_FS_IRQHandler,Default_Handler

   .weak DMA2_Stream5_IRQHandler
   .thumb_set DMA2_Stream5_IRQHandler,Default_Handler

   .weak DMA2_Stream6_IRQHandler
   .thumb_set DMA2_Stream6_IRQHandler,Default_Handler

   .weak DMA2_Stream7_IRQHandler
   .thumb_set DMA2_Stream7_IRQHandler,Default_Handler

   .weak USART6_IRQHandler
   .thumb_set USART6_IRQHandler,Default_Handler

   .weak I2C3_EV_IRQHandler
   .thumb_set I2C3_EV_IRQHandler,Default_Handler

   .weak I2C3_ER_IRQHandler
   .thumb_set I2C3_ER_IRQHandler,Default_Handler

   .weak OTG_HS_EP1_OUT_IRQHandler
   .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler

   .weak OTG_HS_EP1_IN_IRQHandler
   .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler

   .weak OTG_HS_WKUP_IRQHandler
   .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler

   .weak OTG_HS_IRQHandler
   .thumb_set OTG_HS_IRQHandler,Default_Handler

   .weak DCMI_IRQHandler
   .thumb_set DCMI_IRQHandler,Default_Handler

   .weak CRYP_IRQHandler
   .thumb_set CRYP_IRQHandler,Default_Handler

   .weak HASH_RNG_IRQHandler
   .thumb_set HASH_RNG_IRQHandler,Default_Handler

   .weak FPU_IRQHandler
   .thumb_set FPU_IRQHandler,Default_Handler

   .weak UART7_IRQHandler
   .thumb_set UART7_IRQHandler,Default_Handler

   .weak UART8_IRQHandler
   .thumb_set UART8_IRQHandler,Default_Handler

   .weak SPI4_IRQHandler
   .thumb_set SPI4_IRQHandler,Default_Handler

   .weak SPI5_IRQHandler
   .thumb_set SPI5_IRQHandler,Default_Handler

   .weak SPI6_IRQHandler
   .thumb_set SPI6_IRQHandler,Default_Handler

   .weak SAI1_IRQHandler
   .thumb_set SAI1_IRQHandler,Default_Handler

   .weak LTDC_IRQHandler
   .thumb_set LTDC_IRQHandler,Default_Handler

   .weak LTDC_ER_IRQHandler
   .thumb_set LTDC_ER_IRQHandler,Default_Handler

   .weak DMA2D_IRQHandler
   .thumb_set DMA2D_IRQHandler,Default_Handler

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Joey Ye (jinyun-ye) said : #5

Joey Ye suggests this article as an answer to your question:
FAQ #2519: “Missing _exit/_kill”.

Maik Siebrand (m-siebrand) said : #6

Hello Joey,
in FAQ #2519 is no solution for me. It is only the question not the answer.

If I not use '_start' symbol, with main a entry point I set __malloc_top_pad to zerro, and the heapsize to __malloc_max_sbrked_mem and __malloc_max_total_mem

On systemstart it looks good, but the first malloc using _sbrk() change the variables
__malloc_max_sbrked_mem from 0x15800 to 0xcb107f68
__malloc_max_total_mem from 0x15800 to 0xcb107f68

only __malloc_top_pad keeps the zerro

the secound access with malloc using _sbrk() change
__malloc_max_sbrked_mem to 0xcb108f68
__malloc_max_total_mem to 0xcb108f68

the third access with malloc using _sbrk() change
__malloc_max_sbrked_mem to 0xcb10cf68
__malloc_max_total_mem to 0xcb10cf68

-----------------------------------
Can I work so ?

__attribute__ ((section(".heap"))) unsigned char heap[HEAP_SIZE_IN_K*1024];

extern int __malloc_top_pad;
extern int __malloc_max_sbrked_mem;
extern int __malloc_max_total_mem;

void CPU_InitHeap(void)
{

      heap_CPU = NULL;
      memset(heap,0,sizeof(heap));
      __malloc_top_pad = 0;
      __malloc_max_sbrked_mem = sizeof(heap);
      __malloc_max_total_mem = sizeof(heap);

}

Joey Ye (jinyun-ye) said : #7

Maik,

I'm sorry the answer is at https://answers.launchpad.net/gcc-arm-embedded/+question/247726. FAQ doesn't work as I expected. It should solve your _exit issue.

Yes of course you can write a CPU_InitHeap function to initlize it after _start. As _start only clean they to zero, your function will set them to correct runtime values.

Thanks,
Joey

Maik Siebrand (m-siebrand) said : #8

Hello Joey,

I did write me a little _exit function and it works. I think the _exit function will be not used for the stm32.

void _exit (int code)
{
    NVIC_SystemReset();
}

greetings

Maik

Can you help with this problem?

Provide an answer of your own, or ask Maik Siebrand for more information if necessary.

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