LDR pseudo-op generates MOVS
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
GNU Arm Embedded Toolchain |
Fix Released
|
Undecided
|
Unassigned |
Bug Description
According to the ARM documentation at
http://
under the heading "LDR in Thumb code", it says:
"The LDR pseudo-instruction never generates a 16-bit flag-setting MOV instruction."
However, when I use the following:
LDR R0,=1
it gets replaced by:
MOVS R0,1 // This is a 16-bit instruction that updates flags N and Z.
To comply with the ARM documentation, the assembler should replace the pseudo-instruction with one of the following that do not modify the flags:
MOV.W R0,1 // Both of these are 32-bit instructions, but
MOVW R0,1 // neither of them affect the flags.
FYI, I use the EmBitz v1.11 IDE which uses gcc 5_4- embedded branch,
and the only assembler directives I use are:
.syntax unified
.cpu cortex-m4
.text
.thumb_func
.align 2
description: | updated |
Changed in gcc-arm-embedded: | |
status: | Confirmed → In Progress |
Changed in gcc-arm-embedded: | |
status: | In Progress → Fix Committed |
Changed in gcc-arm-embedded: | |
milestone: | none → 6-2017-q2-update |
Changed in gcc-arm-embedded: | |
status: | Fix Committed → Fix Released |
Hi Dan,
While I agree this specific case is a bug, please note that the documentation you reference is for ARM compiler and thus the GNU ARM embedded toolchain is not bound to respect it in the general case.
Best regards.